if_tlp_pci.c revision 1.75
1 /* $NetBSD: if_tlp_pci.c,v 1.75 2003/11/28 06:03:09 cube Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.75 2003/11/28 06:03:09 cube Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 116 tlp_pci_match, tlp_pci_attach, NULL, NULL); 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 124 TULIP_CHIP_21040 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 126 TULIP_CHIP_21041 }, 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 128 TULIP_CHIP_21140 }, 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 130 TULIP_CHIP_21142 }, 131 132 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 133 TULIP_CHIP_82C168 }, 134 135 /* 136 * Note: This is like a MX98725 with Wake-On-LAN and a 137 * 128-bit multicast hash table. 138 */ 139 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 140 TULIP_CHIP_82C115 }, 141 142 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 143 TULIP_CHIP_MX98713 }, 144 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 145 TULIP_CHIP_MX98715 }, 146 147 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 148 TULIP_CHIP_MX98713 }, 149 150 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 151 TULIP_CHIP_WB89C840F }, 152 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 153 TULIP_CHIP_WB89C840F }, 154 155 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 156 TULIP_CHIP_DM9102 }, 157 158 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 159 TULIP_CHIP_AL981 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 167 TULIP_CHIP_AN985 }, 168 169 #if 0 170 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 171 TULIP_CHIP_AX88140 }, 172 #endif 173 174 { 0, 0, 175 TULIP_CHIP_INVALID }, 176 }; 177 178 struct tlp_pci_quirks { 179 void (*tpq_func) __P((struct tulip_pci_softc *, 180 const u_int8_t *)); 181 u_int8_t tpq_oui[3]; 182 }; 183 184 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 187 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 188 const u_int8_t *)); 189 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 190 const u_int8_t *)); 191 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 192 const u_int8_t *)); 193 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 194 const u_int8_t *)); 195 196 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 197 const u_int8_t *)); 198 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 199 const u_int8_t *)); 200 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 201 const u_int8_t *)); 202 void tlp_pci_znyx_21142_quirks __P((struct tulip_pci_softc *, 203 const u_int8_t *)); 204 205 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 206 const u_int8_t *)); 207 208 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 209 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 210 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 211 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 212 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 213 { NULL, { 0, 0, 0 } } 214 }; 215 216 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 217 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 218 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 219 { NULL, { 0, 0, 0 } } 220 }; 221 222 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 223 const u_int8_t *)); 224 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 225 const u_int8_t *)); 226 void tlp_pci_vpc_21140_quirks __P((struct tulip_pci_softc *, 227 const u_int8_t *)); 228 229 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 230 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 231 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 232 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 233 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 234 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 235 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 236 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 237 { NULL, { 0, 0, 0 } } 238 }; 239 240 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 241 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 242 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 243 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 244 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 245 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 246 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 247 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 248 { NULL, { 0, 0, 0 } } 249 }; 250 251 int tlp_pci_shared_intr __P((void *)); 252 253 const struct tulip_pci_product *tlp_pci_lookup 254 __P((const struct pci_attach_args *)); 255 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 256 const struct tlp_pci_quirks *)); 257 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 258 259 const struct tulip_pci_product * 260 tlp_pci_lookup(pa) 261 const struct pci_attach_args *pa; 262 { 263 const struct tulip_pci_product *tpp; 264 265 for (tpp = tlp_pci_products; 266 tlp_chip_names[tpp->tpp_chip] != NULL; 267 tpp++) { 268 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 269 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 270 return (tpp); 271 } 272 return (NULL); 273 } 274 275 void 276 tlp_pci_get_quirks(psc, enaddr, tpq) 277 struct tulip_pci_softc *psc; 278 const u_int8_t *enaddr; 279 const struct tlp_pci_quirks *tpq; 280 { 281 282 for (; tpq->tpq_func != NULL; tpq++) { 283 if (tpq->tpq_oui[0] == enaddr[0] && 284 tpq->tpq_oui[1] == enaddr[1] && 285 tpq->tpq_oui[2] == enaddr[2]) { 286 (*tpq->tpq_func)(psc, enaddr); 287 return; 288 } 289 } 290 } 291 292 void 293 tlp_pci_check_slaved(psc, shared, slaved) 294 struct tulip_pci_softc *psc; 295 int shared, slaved; 296 { 297 extern struct cfdriver tlp_cd; 298 struct tulip_pci_softc *cur, *best = NULL; 299 struct tulip_softc *sc = &psc->sc_tulip; 300 int i; 301 302 /* 303 * First of all, find the lowest pcidev numbered device on our 304 * bus marked as shared. That should be our master. 305 */ 306 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 307 if ((cur = tlp_cd.cd_devs[i]) == NULL) 308 continue; 309 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 310 continue; 311 if ((cur->sc_flags & shared) == 0) 312 continue; 313 if (cur == psc) 314 continue; 315 if (best == NULL || 316 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 317 best = cur; 318 } 319 320 if (best != NULL) { 321 psc->sc_master = best; 322 psc->sc_flags |= (shared | slaved); 323 } 324 } 325 326 int 327 tlp_pci_match(parent, match, aux) 328 struct device *parent; 329 struct cfdata *match; 330 void *aux; 331 { 332 struct pci_attach_args *pa = aux; 333 334 if (tlp_pci_lookup(pa) != NULL) 335 return (10); /* beat if_de.c */ 336 337 return (0); 338 } 339 340 void 341 tlp_pci_attach(parent, self, aux) 342 struct device *parent, *self; 343 void *aux; 344 { 345 struct tulip_pci_softc *psc = (void *) self; 346 struct tulip_softc *sc = &psc->sc_tulip; 347 struct pci_attach_args *pa = aux; 348 pci_chipset_tag_t pc = pa->pa_pc; 349 pci_intr_handle_t ih; 350 const char *intrstr = NULL; 351 bus_space_tag_t iot, memt; 352 bus_space_handle_t ioh, memh; 353 int ioh_valid, memh_valid, i, j; 354 const struct tulip_pci_product *tpp; 355 u_int8_t enaddr[ETHER_ADDR_LEN]; 356 u_int32_t val = 0; 357 pcireg_t reg; 358 int pmreg; 359 360 sc->sc_devno = pa->pa_device; 361 psc->sc_pc = pa->pa_pc; 362 psc->sc_pcitag = pa->pa_tag; 363 364 LIST_INIT(&psc->sc_intrslaves); 365 366 tpp = tlp_pci_lookup(pa); 367 if (tpp == NULL) { 368 printf("\n"); 369 panic("tlp_pci_attach: impossible"); 370 } 371 sc->sc_chip = tpp->tpp_chip; 372 373 /* 374 * By default, Tulip registers are 8 bytes long (4 bytes 375 * followed by a 4 byte pad). 376 */ 377 sc->sc_regshift = 3; 378 379 /* 380 * No power management hooks. 381 * XXX Maybe we should add some! 382 */ 383 sc->sc_flags |= TULIPF_ENABLED; 384 385 /* 386 * Get revision info, and set some chip-specific variables. 387 */ 388 sc->sc_rev = PCI_REVISION(pa->pa_class); 389 switch (sc->sc_chip) { 390 case TULIP_CHIP_21140: 391 if (sc->sc_rev >= 0x20) 392 sc->sc_chip = TULIP_CHIP_21140A; 393 break; 394 395 case TULIP_CHIP_21142: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_21143; 398 break; 399 400 case TULIP_CHIP_82C168: 401 if (sc->sc_rev >= 0x20) 402 sc->sc_chip = TULIP_CHIP_82C169; 403 break; 404 405 case TULIP_CHIP_MX98713: 406 if (sc->sc_rev >= 0x10) 407 sc->sc_chip = TULIP_CHIP_MX98713A; 408 break; 409 410 case TULIP_CHIP_MX98715: 411 if (sc->sc_rev >= 0x20) 412 sc->sc_chip = TULIP_CHIP_MX98715A; 413 if (sc->sc_rev >= 0x25) 414 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 415 if (sc->sc_rev >= 0x30) 416 sc->sc_chip = TULIP_CHIP_MX98725; 417 break; 418 419 case TULIP_CHIP_WB89C840F: 420 sc->sc_regshift = 2; 421 break; 422 423 case TULIP_CHIP_AN985: 424 /* 425 * The AN983 and AN985 are very similar, and are 426 * differentiated by a "signature" register that 427 * is like, but not identical, to a PCI ID register. 428 */ 429 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 430 switch (reg) { 431 case 0x09811317: 432 sc->sc_chip = TULIP_CHIP_AN985; 433 break; 434 435 case 0x09851317: 436 sc->sc_chip = TULIP_CHIP_AN983; 437 break; 438 439 default: 440 /* Unknown -- use default. */ 441 break; 442 } 443 break; 444 445 case TULIP_CHIP_AX88140: 446 if (sc->sc_rev >= 0x10) 447 sc->sc_chip = TULIP_CHIP_AX88141; 448 break; 449 450 case TULIP_CHIP_DM9102: 451 if (sc->sc_rev >= 0x30) 452 sc->sc_chip = TULIP_CHIP_DM9102A; 453 break; 454 455 default: 456 /* Nothing. */ 457 break; 458 } 459 460 printf(": %s Ethernet, pass %d.%d\n", 461 tlp_chip_names[sc->sc_chip], 462 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 463 464 switch (sc->sc_chip) { 465 case TULIP_CHIP_21040: 466 if (sc->sc_rev < 0x20) { 467 printf("%s: 21040 must be at least pass 2.0\n", 468 sc->sc_dev.dv_xname); 469 return; 470 } 471 break; 472 473 case TULIP_CHIP_21140: 474 if (sc->sc_rev < 0x11) { 475 printf("%s: 21140 must be at least pass 1.1\n", 476 sc->sc_dev.dv_xname); 477 return; 478 } 479 break; 480 481 default: 482 /* Nothing. */ 483 break; 484 } 485 486 /* 487 * Check to see if the device is in power-save mode, and 488 * being it out if necessary. 489 */ 490 switch (sc->sc_chip) { 491 case TULIP_CHIP_21140: 492 case TULIP_CHIP_21140A: 493 case TULIP_CHIP_21142: 494 case TULIP_CHIP_21143: 495 case TULIP_CHIP_MX98713A: 496 case TULIP_CHIP_MX98715: 497 case TULIP_CHIP_MX98715A: 498 case TULIP_CHIP_MX98715AEC_X: 499 case TULIP_CHIP_MX98725: 500 case TULIP_CHIP_DM9102: 501 case TULIP_CHIP_DM9102A: 502 /* 503 * Clear the "sleep mode" bit in the CFDA register. 504 */ 505 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 506 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 507 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 508 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 509 break; 510 511 default: 512 /* Nothing. */ 513 break; 514 } 515 516 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 517 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 518 switch (reg & PCI_PMCSR_STATE_MASK) { 519 case PCI_PMCSR_STATE_D1: 520 case PCI_PMCSR_STATE_D2: 521 printf("%s: waking up from power state D%d\n%s", 522 sc->sc_dev.dv_xname, 523 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 524 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 525 (reg & ~PCI_PMCSR_STATE_MASK) | 526 PCI_PMCSR_STATE_D0); 527 break; 528 case PCI_PMCSR_STATE_D3: 529 /* 530 * The card has lost all configuration data in 531 * this state, so punt. 532 */ 533 printf("%s: unable to wake up from power state D3, " 534 "reboot required.\n", sc->sc_dev.dv_xname); 535 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 536 (reg & ~PCI_PMCSR_STATE_MASK) | 537 PCI_PMCSR_STATE_D0); 538 return; 539 } 540 } 541 542 /* 543 * Map the device. 544 */ 545 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 546 PCI_MAPREG_TYPE_IO, 0, 547 &iot, &ioh, NULL, NULL) == 0); 548 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 549 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 550 &memt, &memh, NULL, NULL) == 0); 551 552 if (memh_valid) { 553 sc->sc_st = memt; 554 sc->sc_sh = memh; 555 } else if (ioh_valid) { 556 sc->sc_st = iot; 557 sc->sc_sh = ioh; 558 } else { 559 printf("%s: unable to map device registers\n", 560 sc->sc_dev.dv_xname); 561 return; 562 } 563 564 sc->sc_dmat = pa->pa_dmat; 565 566 /* 567 * Make sure bus mastering is enabled. 568 */ 569 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 570 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 571 PCI_COMMAND_MASTER_ENABLE); 572 573 /* 574 * Get the cacheline size. 575 */ 576 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 577 PCI_BHLC_REG)); 578 579 /* 580 * Get PCI data moving command info. 581 */ 582 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 583 sc->sc_flags |= TULIPF_MRL; 584 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 585 sc->sc_flags |= TULIPF_MRM; 586 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 587 sc->sc_flags |= TULIPF_MWI; 588 589 /* 590 * Read the contents of the Ethernet Address ROM/SROM. 591 */ 592 switch (sc->sc_chip) { 593 case TULIP_CHIP_21040: 594 sc->sc_srom_addrbits = 6; 595 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 596 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 597 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 598 for (j = 0; j < 10000; j++) { 599 val = TULIP_READ(sc, CSR_MIIROM); 600 if ((val & MIIROM_DN) == 0) 601 break; 602 } 603 sc->sc_srom[i] = val & MIIROM_DATA; 604 } 605 break; 606 607 case TULIP_CHIP_82C168: 608 case TULIP_CHIP_82C169: 609 { 610 sc->sc_srom_addrbits = 2; 611 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 612 613 /* 614 * The Lite-On PNIC stores the Ethernet address in 615 * the first 3 words of the EEPROM. EEPROM access 616 * is not like the other Tulip chips. 617 */ 618 for (i = 0; i < 6; i += 2) { 619 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 620 PNIC_SROMCTL_READ | (i >> 1)); 621 for (j = 0; j < 500; j++) { 622 delay(2); 623 val = TULIP_READ(sc, CSR_MIIROM); 624 if ((val & PNIC_MIIROM_BUSY) == 0) 625 break; 626 } 627 if (val & PNIC_MIIROM_BUSY) { 628 printf("%s: EEPROM timed out\n", 629 sc->sc_dev.dv_xname); 630 return; 631 } 632 val &= PNIC_MIIROM_DATA; 633 sc->sc_srom[i] = val >> 8; 634 sc->sc_srom[i + 1] = val & 0xff; 635 } 636 break; 637 } 638 639 default: 640 #ifdef algor 641 /* 642 * XXX This should be done with device properties, but 643 * XXX we don't have those yet. 644 */ 645 if (algor_get_ethaddr(pa, NULL)) { 646 extern int tlp_srom_debug; 647 sc->sc_srom_addrbits = 6; 648 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 649 M_NOWAIT|M_ZERO); 650 algor_get_ethaddr(pa, sc->sc_srom); 651 if (tlp_srom_debug) { 652 printf("SROM CONTENTS:"); 653 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 654 if ((i % 8) == 0) 655 printf("\n\t"); 656 printf("0x%02x ", sc->sc_srom[i]); 657 } 658 printf("\n"); 659 } 660 break; 661 } 662 #endif /* algor */ 663 664 /* Check for a slaved ROM on a multi-port board. */ 665 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 666 TULIP_PCI_SLAVEROM); 667 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 668 sc->sc_srom_addrbits = 669 psc->sc_master->sc_tulip.sc_srom_addrbits; 670 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 671 enaddr[5] += 672 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 673 } 674 else if (tlp_read_srom(sc) == 0) 675 goto cant_cope; 676 break; 677 } 678 679 /* 680 * Deal with chip/board quirks. This includes setting up 681 * the mediasw, and extracting the Ethernet address from 682 * the rombuf. 683 */ 684 switch (sc->sc_chip) { 685 case TULIP_CHIP_21040: 686 /* 687 * Parse the Ethernet Address ROM. 688 */ 689 if (tlp_parse_old_srom(sc, enaddr) == 0) 690 goto cant_cope; 691 692 693 /* 694 * All 21040 boards start out with the same 695 * media switch. 696 */ 697 sc->sc_mediasw = &tlp_21040_mediasw; 698 699 /* 700 * Deal with any quirks this board might have. 701 */ 702 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 703 break; 704 705 case TULIP_CHIP_21041: 706 /* Check for new format SROM. */ 707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 708 /* 709 * Not an ISV SROM; try the old DEC Ethernet Address 710 * ROM format. 711 */ 712 if (tlp_parse_old_srom(sc, enaddr) == 0) 713 goto cant_cope; 714 } 715 716 /* 717 * All 21041 boards use the same media switch; they all 718 * work basically the same! Yippee! 719 */ 720 sc->sc_mediasw = &tlp_21041_mediasw; 721 722 /* 723 * Deal with any quirks this board might have. 724 */ 725 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 726 break; 727 728 case TULIP_CHIP_21140: 729 case TULIP_CHIP_21140A: 730 /* Check for new format SROM. */ 731 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 732 /* 733 * Not an ISV SROM; try the old DEC Ethernet Address 734 * ROM format. 735 */ 736 if (tlp_parse_old_srom(sc, enaddr) == 0) 737 goto cant_cope; 738 } else { 739 /* 740 * We start out with the 2114x ISV media switch. 741 * When we search for quirks, we may change to 742 * a different switch. 743 */ 744 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 745 } 746 747 /* 748 * Deal with any quirks this board might have. 749 */ 750 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 751 752 /* 753 * Bail out now if we can't deal with this board. 754 */ 755 if (sc->sc_mediasw == NULL) 756 goto cant_cope; 757 break; 758 759 case TULIP_CHIP_21142: 760 case TULIP_CHIP_21143: 761 /* Check for new format SROM. */ 762 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 763 /* 764 * Not an ISV SROM; try the old DEC Ethernet Address 765 * ROM format. 766 */ 767 if (tlp_parse_old_srom(sc, enaddr) == 0) { 768 /* 769 * One last try: just copy the address 770 * from offset 20 and try to look 771 * up quirks. 772 */ 773 memcpy(enaddr, &sc->sc_srom[20], 774 ETHER_ADDR_LEN); 775 } 776 } else { 777 /* 778 * We start out with the 2114x ISV media switch. 779 * When we search for quirks, we may change to 780 * a different switch. 781 */ 782 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 783 } 784 785 /* 786 * Deal with any quirks this board might have. 787 */ 788 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 789 790 /* 791 * Bail out now if we can't deal with this board. 792 */ 793 if (sc->sc_mediasw == NULL) 794 goto cant_cope; 795 break; 796 797 case TULIP_CHIP_82C168: 798 case TULIP_CHIP_82C169: 799 /* 800 * Lite-On PNIC's Ethernet address is the first 6 801 * bytes of its EEPROM. 802 */ 803 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 804 805 /* 806 * Lite-On PNICs always use the same mediasw; we 807 * select MII vs. internal NWAY automatically. 808 */ 809 sc->sc_mediasw = &tlp_pnic_mediasw; 810 break; 811 812 case TULIP_CHIP_MX98713: 813 /* 814 * The Macronix MX98713 has an MII and GPIO, but no 815 * internal Nway block. This chip is basically a 816 * perfect 21140A clone, with the exception of the 817 * a magic register frobbing in order to make the 818 * interface function. 819 */ 820 if (tlp_isv_srom_enaddr(sc, enaddr)) { 821 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 822 break; 823 } 824 /* FALLTHROUGH */ 825 826 case TULIP_CHIP_82C115: 827 /* 828 * Yippee! The Lite-On 82C115 is a clone of 829 * the MX98725 (the data sheet even says `MXIC' 830 * on it)! Imagine that, a clone of a clone. 831 * 832 * The differences are really minimal: 833 * 834 * - Wake-On-LAN support 835 * - 128-bit multicast hash table, rather than 836 * the standard 512-bit hash table 837 */ 838 /* FALLTHROUGH */ 839 840 case TULIP_CHIP_MX98713A: 841 case TULIP_CHIP_MX98715A: 842 case TULIP_CHIP_MX98715AEC_X: 843 case TULIP_CHIP_MX98725: 844 /* 845 * The MX98713A has an MII as well as an internal Nway block, 846 * but no GPIO. The MX98715 and MX98725 have an internal 847 * Nway block only. 848 * 849 * The internal Nway block, unlike the Lite-On PNIC's, does 850 * just that - performs Nway. Once autonegotiation completes, 851 * we must program the GPR media information into the chip. 852 * 853 * The byte offset of the Ethernet address is stored at 854 * offset 0x70. 855 */ 856 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 857 sc->sc_mediasw = &tlp_pmac_mediasw; 858 break; 859 860 case TULIP_CHIP_WB89C840F: 861 /* 862 * Winbond 89C840F's Ethernet address is the first 863 * 6 bytes of its EEPROM. 864 */ 865 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 866 867 /* 868 * Winbond 89C840F has an MII attached to the SIO. 869 */ 870 sc->sc_mediasw = &tlp_sio_mii_mediasw; 871 break; 872 873 case TULIP_CHIP_AL981: 874 /* 875 * The ADMtek AL981's Ethernet address is located 876 * at offset 8 of its EEPROM. 877 */ 878 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 879 880 /* 881 * ADMtek AL981 has a built-in PHY accessed through 882 * special registers. 883 */ 884 sc->sc_mediasw = &tlp_al981_mediasw; 885 break; 886 887 case TULIP_CHIP_AN983: 888 case TULIP_CHIP_AN985: 889 /* 890 * The ADMtek AN985's Ethernet address is located 891 * at offset 8 of its EEPROM. 892 */ 893 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 894 895 /* 896 * The ADMtek AN985 can be configured in Single-Chip 897 * mode or MAC-only mode. Single-Chip uses the built-in 898 * PHY, MAC-only has an external PHY (usually HomePNA). 899 * The selection is based on an EEPROM setting, and both 900 * PHYs are accessed via MII attached to SIO. 901 * 902 * The AN985 "ghosts" the internal PHY onto all 903 * MII addresses, so we have to use a media init 904 * routine that limits the search. 905 * XXX How does this work with MAC-only mode? 906 */ 907 sc->sc_mediasw = &tlp_an985_mediasw; 908 break; 909 910 case TULIP_CHIP_DM9102: 911 case TULIP_CHIP_DM9102A: 912 /* 913 * Some boards with the Davicom chip have an ISV 914 * SROM (mostly DM9102A boards -- trying to describe 915 * the HomePNA PHY, probably) although the data in 916 * them is generally wrong. Check for ISV format 917 * and grab the Ethernet address that way, and if 918 * that fails, fall back on grabbing it from an 919 * observed offset of 20 (which is where it would 920 * be in an ISV SROM anyhow, tho ISV can cope with 921 * multi-port boards). 922 */ 923 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 924 #ifdef __sparc__ 925 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 926 !sc->sc_srom[22]) { 927 extern void myetheraddr __P((u_char *)); 928 myetheraddr(enaddr); 929 } else 930 #endif 931 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 932 } 933 934 /* 935 * Davicom chips all have an internal MII interface 936 * and a built-in PHY. DM9102A also has a an external 937 * MII interface, usually with a HomePNA PHY attached 938 * to it. 939 */ 940 sc->sc_mediasw = &tlp_dm9102_mediasw; 941 break; 942 943 default: 944 cant_cope: 945 printf("%s: sorry, unable to handle your board\n", 946 sc->sc_dev.dv_xname); 947 return; 948 } 949 950 /* 951 * Handle shared interrupts. 952 */ 953 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 954 if (psc->sc_master) 955 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 956 else { 957 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 958 TULIP_PCI_SLAVEINTR); 959 if (psc->sc_master == NULL) 960 psc->sc_master = psc; 961 } 962 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 963 psc, sc_intrq); 964 } 965 966 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 967 printf("%s: sharing interrupt with %s\n", 968 sc->sc_dev.dv_xname, 969 psc->sc_master->sc_tulip.sc_dev.dv_xname); 970 } else { 971 /* 972 * Map and establish our interrupt. 973 */ 974 if (pci_intr_map(pa, &ih)) { 975 printf("%s: unable to map interrupt\n", 976 sc->sc_dev.dv_xname); 977 return; 978 } 979 intrstr = pci_intr_string(pc, ih); 980 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 981 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 982 tlp_pci_shared_intr : tlp_intr, sc); 983 if (psc->sc_ih == NULL) { 984 printf("%s: unable to establish interrupt", 985 sc->sc_dev.dv_xname); 986 if (intrstr != NULL) 987 printf(" at %s", intrstr); 988 printf("\n"); 989 return; 990 } 991 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 992 intrstr); 993 } 994 995 /* 996 * Finish off the attach. 997 */ 998 tlp_attach(sc, enaddr); 999 } 1000 1001 int 1002 tlp_pci_shared_intr(arg) 1003 void *arg; 1004 { 1005 struct tulip_pci_softc *master = arg, *slave; 1006 int rv = 0; 1007 1008 for (slave = LIST_FIRST(&master->sc_intrslaves); 1009 slave != NULL; 1010 slave = LIST_NEXT(slave, sc_intrq)) 1011 rv |= tlp_intr(&slave->sc_tulip); 1012 1013 return (rv); 1014 } 1015 1016 void 1017 tlp_pci_dec_quirks(psc, enaddr) 1018 struct tulip_pci_softc *psc; 1019 const u_int8_t *enaddr; 1020 { 1021 struct tulip_softc *sc = &psc->sc_tulip; 1022 1023 /* 1024 * This isn't really a quirk-gathering device, really. We 1025 * just want to get the spiffy DEC board name from the SROM. 1026 */ 1027 strcpy(sc->sc_name, "DEC "); 1028 1029 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1030 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1031 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1032 } 1033 1034 void 1035 tlp_pci_znyx_21040_quirks(psc, enaddr) 1036 struct tulip_pci_softc *psc; 1037 const u_int8_t *enaddr; 1038 { 1039 struct tulip_softc *sc = &psc->sc_tulip; 1040 u_int16_t id = 0; 1041 1042 /* 1043 * If we have a slaved ROM, just copy the bits from the master. 1044 * This is in case we fail the ROM ID check (older boards) and 1045 * need to fall back on Ethernet address model checking; that 1046 * will fail for slave chips. 1047 */ 1048 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1049 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1050 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1051 psc->sc_flags |= 1052 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1053 return; 1054 } 1055 1056 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1057 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1058 switch (id) { 1059 zx312: 1060 case 0x0602: /* ZX312 */ 1061 strcpy(sc->sc_name, "ZNYX ZX312"); 1062 return; 1063 1064 case 0x0622: /* ZX312T */ 1065 strcpy(sc->sc_name, "ZNYX ZX312T"); 1066 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1067 return; 1068 1069 zx314_inta: 1070 case 0x0701: /* ZX314 INTA */ 1071 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1072 /* FALLTHROUGH */ 1073 case 0x0711: /* ZX314 */ 1074 strcpy(sc->sc_name, "ZNYX ZX314"); 1075 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1076 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1077 return; 1078 1079 zx315_inta: 1080 case 0x0801: /* ZX315 INTA */ 1081 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1082 /* FALLTHROUGH */ 1083 case 0x0811: /* ZX315 */ 1084 strcpy(sc->sc_name, "ZNYX ZX315"); 1085 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1086 return; 1087 1088 default: 1089 id = 0; 1090 break; 1091 } 1092 } 1093 1094 /* 1095 * Deal with boards that have broken ROMs. 1096 */ 1097 if (id == 0) { 1098 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1099 goto zx314_inta; 1100 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1101 goto zx315_inta; 1102 if ((enaddr[3] & ~3) == 0xec) 1103 goto zx312; 1104 } 1105 1106 strcpy(sc->sc_name, "ZNYX ZX31x"); 1107 } 1108 1109 void tlp_pci_znyx_21142_qs6611_reset __P((struct tulip_softc *)); 1110 1111 void 1112 tlp_pci_znyx_21142_quirks(psc, enaddr) 1113 struct tulip_pci_softc *psc; 1114 const u_int8_t *enaddr; 1115 { 1116 struct tulip_softc *sc = &psc->sc_tulip; 1117 pcireg_t subid; 1118 1119 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1120 1121 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1122 return; /* ? */ 1123 1124 switch (PCI_PRODUCT(subid) & 0xff) { 1125 /* 1126 * ZNYX 21143 boards with QS6611 PHY 1127 */ 1128 case 0x12: /* ZX345Q */ 1129 case 0x13: /* ZX346Q */ 1130 case 0x14: /* ZX348Q */ 1131 case 0x18: /* ZX414 */ 1132 case 0x19: /* ZX412 */ 1133 case 0x1a: /* ZX444 */ 1134 case 0x1b: /* ZX442 */ 1135 case 0x23: /* ZX212 */ 1136 case 0x24: /* ZX214 */ 1137 case 0x29: /* ZX374 */ 1138 case 0x2d: /* ZX372 */ 1139 case 0x2b: /* ZX244 */ 1140 case 0x2c: /* ZX424 */ 1141 case 0x2e: /* ZX422 */ 1142 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1143 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1144 break; 1145 } 1146 } 1147 1148 void 1149 tlp_pci_znyx_21142_qs6611_reset(sc) 1150 struct tulip_softc *sc; 1151 { 1152 1153 /* 1154 * Reset QS6611 PHY. 1155 */ 1156 TULIP_WRITE(sc, CSR_SIAGEN, 1157 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1158 delay(200); 1159 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1160 delay(10000); 1161 } 1162 1163 void 1164 tlp_pci_smc_21040_quirks(psc, enaddr) 1165 struct tulip_pci_softc *psc; 1166 const u_int8_t *enaddr; 1167 { 1168 struct tulip_softc *sc = &psc->sc_tulip; 1169 u_int16_t id1, id2, ei; 1170 int auibnc = 0, utp = 0; 1171 char *cp; 1172 1173 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1174 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1175 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1176 1177 strcpy(sc->sc_name, "SMC 8432"); 1178 cp = &sc->sc_name[8]; 1179 1180 if ((id1 & 1) == 0) { 1181 *cp++ = 'B'; 1182 auibnc = 1; 1183 } 1184 if ((id1 & 0xff) > 0x32) { 1185 *cp++ = 'T'; 1186 utp = 1; 1187 } 1188 if ((id1 & 0x4000) == 0) { 1189 *cp++ = 'A'; 1190 auibnc = 1; 1191 } 1192 if (id2 == 0x15) { 1193 sc->sc_name[7] = '4'; 1194 *cp++ = '-'; 1195 *cp++ = 'C'; 1196 *cp++ = 'H'; 1197 *cp++ = ei ? '2' : '1'; 1198 } 1199 *cp = '\0'; 1200 1201 if (utp != 0 && auibnc == 0) 1202 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1203 else if (utp == 0 && auibnc != 0) 1204 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1205 } 1206 1207 void 1208 tlp_pci_cogent_21040_quirks(psc, enaddr) 1209 struct tulip_pci_softc *psc; 1210 const u_int8_t *enaddr; 1211 { 1212 1213 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1214 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1215 } 1216 1217 void 1218 tlp_pci_accton_21040_quirks(psc, enaddr) 1219 struct tulip_pci_softc *psc; 1220 const u_int8_t *enaddr; 1221 { 1222 1223 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1224 } 1225 1226 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1227 1228 void 1229 tlp_pci_asante_21140_quirks(psc, enaddr) 1230 struct tulip_pci_softc *psc; 1231 const u_int8_t *enaddr; 1232 { 1233 struct tulip_softc *sc = &psc->sc_tulip; 1234 1235 /* 1236 * Some Asante boards don't use the ISV SROM format. For 1237 * those that don't, we initialize the GPIO direction bits, 1238 * and provide our own reset hook, which resets the MII. 1239 * 1240 * All of these boards use SIO-attached-MII media. 1241 */ 1242 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1243 return; 1244 1245 strcpy(sc->sc_name, "Asante"); 1246 1247 sc->sc_gp_dir = 0xbf; 1248 sc->sc_reset = tlp_pci_asante_21140_reset; 1249 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1250 } 1251 1252 void 1253 tlp_pci_asante_21140_reset(sc) 1254 struct tulip_softc *sc; 1255 { 1256 1257 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1258 TULIP_WRITE(sc, CSR_GPP, 0x8); 1259 delay(100); 1260 TULIP_WRITE(sc, CSR_GPP, 0); 1261 } 1262 1263 /* 1264 * SMC 9332DST media switch. 1265 */ 1266 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1267 1268 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1269 tlp_smc9332dst_tmsw_init, 1270 tlp_21140_gpio_get, 1271 tlp_21140_gpio_set 1272 }; 1273 1274 void 1275 tlp_pci_smc_21140_quirks(psc, enaddr) 1276 struct tulip_pci_softc *psc; 1277 const u_int8_t *enaddr; 1278 { 1279 struct tulip_softc *sc = &psc->sc_tulip; 1280 1281 if (sc->sc_mediasw != NULL) { 1282 return; 1283 } 1284 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1285 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1286 } 1287 1288 void 1289 tlp_smc9332dst_tmsw_init(sc) 1290 struct tulip_softc *sc; 1291 { 1292 struct tulip_21x4x_media *tm; 1293 const char *sep = ""; 1294 uint32_t reg; 1295 int i, cnt; 1296 1297 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1298 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1299 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1300 1301 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1302 tlp_mediastatus); 1303 printf("%s: ", sc->sc_dev.dv_xname); 1304 1305 #define ADD(m, c) \ 1306 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1307 tm->tm_opmode = (c); \ 1308 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1309 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1310 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1311 1312 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1313 PRINT("10baseT"); 1314 1315 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1316 OPMODE_TTM | OPMODE_FD); 1317 PRINT("10baseT-FDX"); 1318 1319 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1320 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1321 PRINT("100baseTX"); 1322 1323 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1324 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1325 PRINT("100baseTX-FDX"); 1326 1327 #undef ADD 1328 #undef PRINT 1329 1330 printf("\n"); 1331 1332 tlp_reset(sc); 1333 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1334 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1335 delay(10); 1336 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1337 delay(200000); 1338 cnt = 0; 1339 for (i = 1000; i > 0; i--) { 1340 reg = TULIP_READ(sc, CSR_GPP); 1341 if ((~reg & (GPP_SMC9332DST_OK10 | 1342 GPP_SMC9332DST_OK100)) == 0) { 1343 if (cnt++ > 100) { 1344 break; 1345 } 1346 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1347 break; 1348 } else { 1349 cnt = 0; 1350 } 1351 delay(1000); 1352 } 1353 if (cnt > 100) { 1354 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1355 } else { 1356 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1357 } 1358 } 1359 1360 void 1361 tlp_pci_vpc_21140_quirks(psc, enaddr) 1362 struct tulip_pci_softc *psc; 1363 const u_int8_t *enaddr; 1364 { 1365 struct tulip_softc *sc = &psc->sc_tulip; 1366 char *p1 = (char *) &sc->sc_srom[32]; 1367 char *p2 = &sc->sc_name[0]; 1368 1369 do { 1370 if ((unsigned char) *p1 & 0x80) 1371 *p2++ = ' '; 1372 else 1373 *p2++ = *p1; 1374 } while (*p1++); 1375 } 1376 1377 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1378 1379 void 1380 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1381 struct tulip_pci_softc *psc; 1382 const u_int8_t *enaddr; 1383 { 1384 struct tulip_softc *sc = &psc->sc_tulip; 1385 1386 /* 1387 * Cobalt Networks interfaces are just MII-on-SIO. 1388 */ 1389 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1390 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1391 1392 /* 1393 * The Cobalt systems tend to fall back to store-and-forward 1394 * pretty quickly, so we select that from the beginning to 1395 * avoid initial timeouts. 1396 */ 1397 sc->sc_txthresh = TXTH_SF; 1398 } 1399 1400 void 1401 tlp_pci_cobalt_21142_reset(sc) 1402 struct tulip_softc *sc; 1403 { 1404 /* 1405 * Reset PHY. 1406 */ 1407 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1408 delay(10); 1409 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1410 delay(10); 1411 } 1412 1413 void 1414 tlp_pci_algor_21142_quirks(psc, enaddr) 1415 struct tulip_pci_softc *psc; 1416 const u_int8_t *enaddr; 1417 { 1418 struct tulip_softc *sc = &psc->sc_tulip; 1419 1420 /* 1421 * Algorithmics boards just have MII-on-SIO. 1422 * 1423 * XXX They also have AUI on the serial interface. 1424 * XXX Deal with this. 1425 */ 1426 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1427 } 1428 1429 /* 1430 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1431 */ 1432 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1433 1434 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1435 tlp_cogent_em1x0_tmsw_init, 1436 tlp_21140_gpio_get, 1437 tlp_21140_gpio_set 1438 }; 1439 1440 void 1441 tlp_pci_adaptec_quirks(psc, enaddr) 1442 struct tulip_pci_softc *psc; 1443 const u_int8_t *enaddr; 1444 { 1445 struct tulip_softc *sc = &psc->sc_tulip; 1446 uint8_t *srom = sc->sc_srom, id0; 1447 uint16_t id1, id2; 1448 1449 if (sc->sc_mediasw == NULL) { 1450 id0 = srom[32]; 1451 switch (id0) { 1452 case 0x12: 1453 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1454 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1455 break; 1456 1457 case 0x15: 1458 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1459 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1460 break; 1461 1462 #if 0 1463 case XXX: 1464 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1465 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1466 break; 1467 #endif 1468 1469 default: 1470 printf("%s: unknown Cogent board ID 0x%02x\n", 1471 sc->sc_dev.dv_xname, id0); 1472 } 1473 return; 1474 } 1475 1476 id1 = TULIP_ROM_GETW(srom, 0); 1477 id2 = TULIP_ROM_GETW(srom, 2); 1478 if (id1 != 0x1109) { 1479 goto unknown; 1480 } 1481 1482 switch (id2) { 1483 case 0x1900: 1484 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1485 break; 1486 1487 case 0x2400: 1488 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1489 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1490 break; 1491 1492 case 0x2b00: 1493 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1494 break; 1495 1496 case 0x3000: 1497 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1498 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1499 break; 1500 1501 default: 1502 unknown: 1503 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1504 sc->sc_dev.dv_xname, id1, id2); 1505 } 1506 } 1507 1508 void 1509 tlp_cogent_em1x0_tmsw_init(sc) 1510 struct tulip_softc *sc; 1511 { 1512 struct tulip_21x4x_media *tm; 1513 const char *sep = ""; 1514 1515 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1516 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1517 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1518 1519 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1520 tlp_mediastatus); 1521 printf("%s: ", sc->sc_dev.dv_xname); 1522 1523 #define ADD(m, c) \ 1524 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1525 tm->tm_opmode = (c); \ 1526 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1527 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1528 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1529 1530 if (sc->sc_srom[32] == 0x15) { 1531 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1532 OPMODE_PS | OPMODE_PCS); 1533 PRINT("100baseFX"); 1534 1535 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1536 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1537 PRINT("100baseFX-FDX"); 1538 printf("\n"); 1539 1540 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1541 } else { 1542 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1543 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1544 PRINT("100baseTX"); 1545 1546 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1547 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1548 PRINT("100baseTX-FDX"); 1549 printf("\n"); 1550 1551 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1552 } 1553 1554 #undef ADD 1555 #undef PRINT 1556 } 1557 1558 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1559 1560 void 1561 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1562 struct tulip_pci_softc *psc; 1563 const u_int8_t *enaddr; 1564 { 1565 struct tulip_softc *sc = &psc->sc_tulip; 1566 1567 /* 1568 * Netwinders just use MII-on_SIO. 1569 */ 1570 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1571 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1572 } 1573 1574 void 1575 tlp_pci_netwinder_21142_reset(sc) 1576 struct tulip_softc *sc; 1577 { 1578 1579 /* 1580 * Reset the PHY. 1581 */ 1582 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1583 delay(10); 1584 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1585 delay(10); 1586 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1587 delay(10); 1588 } 1589
Indexes created Sat Sep 20 22:09:52 GMT 2025