if_tlp_pci.c revision 1.76.4.1
1 /* $NetBSD: if_tlp_pci.c,v 1.76.4.1 2005/07/24 03:56:24 riz Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.76.4.1 2005/07/24 03:56:24 riz Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 116 void tlp_pci_attach __P((struct device *, struct device *, void *)); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 #if 0 173 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 174 TULIP_CHIP_AX88140 }, 175 #endif 176 177 { 0, 0, 178 TULIP_CHIP_INVALID }, 179 }; 180 181 struct tlp_pci_quirks { 182 void (*tpq_func) __P((struct tulip_pci_softc *, 183 const u_int8_t *)); 184 u_int8_t tpq_oui[3]; 185 }; 186 187 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 188 const u_int8_t *)); 189 190 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 191 const u_int8_t *)); 192 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 193 const u_int8_t *)); 194 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 195 const u_int8_t *)); 196 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 197 const u_int8_t *)); 198 199 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 204 const u_int8_t *)); 205 void tlp_pci_znyx_21142_quirks __P((struct tulip_pci_softc *, 206 const u_int8_t *)); 207 208 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 209 const u_int8_t *)); 210 211 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 226 const u_int8_t *)); 227 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 228 const u_int8_t *)); 229 void tlp_pci_vpc_21140_quirks __P((struct tulip_pci_softc *, 230 const u_int8_t *)); 231 232 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 233 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 234 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 235 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 236 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 238 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 239 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 240 { NULL, { 0, 0, 0 } } 241 }; 242 243 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 246 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 247 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 249 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 250 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 251 { NULL, { 0, 0, 0 } } 252 }; 253 254 int tlp_pci_shared_intr __P((void *)); 255 256 const struct tulip_pci_product *tlp_pci_lookup 257 __P((const struct pci_attach_args *)); 258 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 259 const struct tlp_pci_quirks *)); 260 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 261 262 const struct tulip_pci_product * 263 tlp_pci_lookup(pa) 264 const struct pci_attach_args *pa; 265 { 266 const struct tulip_pci_product *tpp; 267 268 for (tpp = tlp_pci_products; 269 tlp_chip_names[tpp->tpp_chip] != NULL; 270 tpp++) { 271 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 272 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 273 return (tpp); 274 } 275 return (NULL); 276 } 277 278 void 279 tlp_pci_get_quirks(psc, enaddr, tpq) 280 struct tulip_pci_softc *psc; 281 const u_int8_t *enaddr; 282 const struct tlp_pci_quirks *tpq; 283 { 284 285 for (; tpq->tpq_func != NULL; tpq++) { 286 if (tpq->tpq_oui[0] == enaddr[0] && 287 tpq->tpq_oui[1] == enaddr[1] && 288 tpq->tpq_oui[2] == enaddr[2]) { 289 (*tpq->tpq_func)(psc, enaddr); 290 return; 291 } 292 } 293 } 294 295 void 296 tlp_pci_check_slaved(psc, shared, slaved) 297 struct tulip_pci_softc *psc; 298 int shared, slaved; 299 { 300 extern struct cfdriver tlp_cd; 301 struct tulip_pci_softc *cur, *best = NULL; 302 struct tulip_softc *sc = &psc->sc_tulip; 303 int i; 304 305 /* 306 * First of all, find the lowest pcidev numbered device on our 307 * bus marked as shared. That should be our master. 308 */ 309 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 310 if ((cur = tlp_cd.cd_devs[i]) == NULL) 311 continue; 312 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 313 continue; 314 if ((cur->sc_flags & shared) == 0) 315 continue; 316 if (cur == psc) 317 continue; 318 if (best == NULL || 319 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 320 best = cur; 321 } 322 323 if (best != NULL) { 324 psc->sc_master = best; 325 psc->sc_flags |= (shared | slaved); 326 } 327 } 328 329 int 330 tlp_pci_match(parent, match, aux) 331 struct device *parent; 332 struct cfdata *match; 333 void *aux; 334 { 335 struct pci_attach_args *pa = aux; 336 337 if (tlp_pci_lookup(pa) != NULL) 338 return (10); /* beat if_de.c */ 339 340 return (0); 341 } 342 343 void 344 tlp_pci_attach(parent, self, aux) 345 struct device *parent, *self; 346 void *aux; 347 { 348 struct tulip_pci_softc *psc = (void *) self; 349 struct tulip_softc *sc = &psc->sc_tulip; 350 struct pci_attach_args *pa = aux; 351 pci_chipset_tag_t pc = pa->pa_pc; 352 pci_intr_handle_t ih; 353 const char *intrstr = NULL; 354 bus_space_tag_t iot, memt; 355 bus_space_handle_t ioh, memh; 356 int ioh_valid, memh_valid, i, j; 357 const struct tulip_pci_product *tpp; 358 u_int8_t enaddr[ETHER_ADDR_LEN]; 359 u_int32_t val = 0; 360 pcireg_t reg; 361 int pmreg; 362 363 sc->sc_devno = pa->pa_device; 364 psc->sc_pc = pa->pa_pc; 365 psc->sc_pcitag = pa->pa_tag; 366 367 LIST_INIT(&psc->sc_intrslaves); 368 369 tpp = tlp_pci_lookup(pa); 370 if (tpp == NULL) { 371 printf("\n"); 372 panic("tlp_pci_attach: impossible"); 373 } 374 sc->sc_chip = tpp->tpp_chip; 375 376 /* 377 * By default, Tulip registers are 8 bytes long (4 bytes 378 * followed by a 4 byte pad). 379 */ 380 sc->sc_regshift = 3; 381 382 /* 383 * No power management hooks. 384 * XXX Maybe we should add some! 385 */ 386 sc->sc_flags |= TULIPF_ENABLED; 387 388 /* 389 * Get revision info, and set some chip-specific variables. 390 */ 391 sc->sc_rev = PCI_REVISION(pa->pa_class); 392 switch (sc->sc_chip) { 393 case TULIP_CHIP_21140: 394 if (sc->sc_rev >= 0x20) 395 sc->sc_chip = TULIP_CHIP_21140A; 396 break; 397 398 case TULIP_CHIP_21142: 399 if (sc->sc_rev >= 0x20) 400 sc->sc_chip = TULIP_CHIP_21143; 401 break; 402 403 case TULIP_CHIP_82C168: 404 if (sc->sc_rev >= 0x20) 405 sc->sc_chip = TULIP_CHIP_82C169; 406 break; 407 408 case TULIP_CHIP_MX98713: 409 if (sc->sc_rev >= 0x10) 410 sc->sc_chip = TULIP_CHIP_MX98713A; 411 break; 412 413 case TULIP_CHIP_MX98715: 414 if (sc->sc_rev >= 0x20) 415 sc->sc_chip = TULIP_CHIP_MX98715A; 416 if (sc->sc_rev >= 0x25) 417 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 418 if (sc->sc_rev >= 0x30) 419 sc->sc_chip = TULIP_CHIP_MX98725; 420 break; 421 422 case TULIP_CHIP_WB89C840F: 423 sc->sc_regshift = 2; 424 break; 425 426 case TULIP_CHIP_AN985: 427 /* 428 * The AN983 and AN985 are very similar, and are 429 * differentiated by a "signature" register that 430 * is like, but not identical, to a PCI ID register. 431 */ 432 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 433 switch (reg) { 434 case 0x09811317: 435 sc->sc_chip = TULIP_CHIP_AN985; 436 break; 437 438 case 0x09851317: 439 sc->sc_chip = TULIP_CHIP_AN983; 440 break; 441 442 default: 443 /* Unknown -- use default. */ 444 break; 445 } 446 break; 447 448 case TULIP_CHIP_AX88140: 449 if (sc->sc_rev >= 0x10) 450 sc->sc_chip = TULIP_CHIP_AX88141; 451 break; 452 453 case TULIP_CHIP_DM9102: 454 if (sc->sc_rev >= 0x30) 455 sc->sc_chip = TULIP_CHIP_DM9102A; 456 break; 457 458 default: 459 /* Nothing. */ 460 break; 461 } 462 463 printf(": %s Ethernet, pass %d.%d\n", 464 tlp_chip_names[sc->sc_chip], 465 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 466 467 switch (sc->sc_chip) { 468 case TULIP_CHIP_21040: 469 if (sc->sc_rev < 0x20) { 470 printf("%s: 21040 must be at least pass 2.0\n", 471 sc->sc_dev.dv_xname); 472 return; 473 } 474 break; 475 476 case TULIP_CHIP_21140: 477 if (sc->sc_rev < 0x11) { 478 printf("%s: 21140 must be at least pass 1.1\n", 479 sc->sc_dev.dv_xname); 480 return; 481 } 482 break; 483 484 default: 485 /* Nothing. */ 486 break; 487 } 488 489 /* 490 * Check to see if the device is in power-save mode, and 491 * being it out if necessary. 492 */ 493 switch (sc->sc_chip) { 494 case TULIP_CHIP_21140: 495 case TULIP_CHIP_21140A: 496 case TULIP_CHIP_21142: 497 case TULIP_CHIP_21143: 498 case TULIP_CHIP_MX98713A: 499 case TULIP_CHIP_MX98715: 500 case TULIP_CHIP_MX98715A: 501 case TULIP_CHIP_MX98715AEC_X: 502 case TULIP_CHIP_MX98725: 503 case TULIP_CHIP_DM9102: 504 case TULIP_CHIP_DM9102A: 505 /* 506 * Clear the "sleep mode" bit in the CFDA register. 507 */ 508 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 509 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 510 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 511 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 512 break; 513 514 default: 515 /* Nothing. */ 516 break; 517 } 518 519 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 520 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 521 switch (reg & PCI_PMCSR_STATE_MASK) { 522 case PCI_PMCSR_STATE_D1: 523 case PCI_PMCSR_STATE_D2: 524 printf("%s: waking up from power state D%d\n%s", 525 sc->sc_dev.dv_xname, 526 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 527 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 528 (reg & ~PCI_PMCSR_STATE_MASK) | 529 PCI_PMCSR_STATE_D0); 530 break; 531 case PCI_PMCSR_STATE_D3: 532 /* 533 * The card has lost all configuration data in 534 * this state, so punt. 535 */ 536 printf("%s: unable to wake up from power state D3, " 537 "reboot required.\n", sc->sc_dev.dv_xname); 538 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 539 (reg & ~PCI_PMCSR_STATE_MASK) | 540 PCI_PMCSR_STATE_D0); 541 return; 542 } 543 } 544 545 /* 546 * Map the device. 547 */ 548 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 549 PCI_MAPREG_TYPE_IO, 0, 550 &iot, &ioh, NULL, NULL) == 0); 551 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 552 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 553 &memt, &memh, NULL, NULL) == 0); 554 555 if (memh_valid) { 556 sc->sc_st = memt; 557 sc->sc_sh = memh; 558 } else if (ioh_valid) { 559 sc->sc_st = iot; 560 sc->sc_sh = ioh; 561 } else { 562 printf("%s: unable to map device registers\n", 563 sc->sc_dev.dv_xname); 564 return; 565 } 566 567 sc->sc_dmat = pa->pa_dmat; 568 569 /* 570 * Make sure bus mastering is enabled. 571 */ 572 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 573 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 574 PCI_COMMAND_MASTER_ENABLE); 575 576 /* 577 * Get the cacheline size. 578 */ 579 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 580 PCI_BHLC_REG)); 581 582 /* 583 * Get PCI data moving command info. 584 */ 585 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 586 sc->sc_flags |= TULIPF_MRL; 587 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 588 sc->sc_flags |= TULIPF_MRM; 589 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 590 sc->sc_flags |= TULIPF_MWI; 591 592 /* 593 * Read the contents of the Ethernet Address ROM/SROM. 594 */ 595 switch (sc->sc_chip) { 596 case TULIP_CHIP_21040: 597 sc->sc_srom_addrbits = 6; 598 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 599 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 600 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 601 for (j = 0; j < 10000; j++) { 602 val = TULIP_READ(sc, CSR_MIIROM); 603 if ((val & MIIROM_DN) == 0) 604 break; 605 } 606 sc->sc_srom[i] = val & MIIROM_DATA; 607 } 608 break; 609 610 case TULIP_CHIP_82C168: 611 case TULIP_CHIP_82C169: 612 { 613 sc->sc_srom_addrbits = 2; 614 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 615 616 /* 617 * The Lite-On PNIC stores the Ethernet address in 618 * the first 3 words of the EEPROM. EEPROM access 619 * is not like the other Tulip chips. 620 */ 621 for (i = 0; i < 6; i += 2) { 622 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 623 PNIC_SROMCTL_READ | (i >> 1)); 624 for (j = 0; j < 500; j++) { 625 delay(2); 626 val = TULIP_READ(sc, CSR_MIIROM); 627 if ((val & PNIC_MIIROM_BUSY) == 0) 628 break; 629 } 630 if (val & PNIC_MIIROM_BUSY) { 631 printf("%s: EEPROM timed out\n", 632 sc->sc_dev.dv_xname); 633 return; 634 } 635 val &= PNIC_MIIROM_DATA; 636 sc->sc_srom[i] = val >> 8; 637 sc->sc_srom[i + 1] = val & 0xff; 638 } 639 break; 640 } 641 642 default: 643 #ifdef algor 644 /* 645 * XXX This should be done with device properties, but 646 * XXX we don't have those yet. 647 */ 648 if (algor_get_ethaddr(pa, NULL)) { 649 extern int tlp_srom_debug; 650 sc->sc_srom_addrbits = 6; 651 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 652 M_NOWAIT|M_ZERO); 653 algor_get_ethaddr(pa, sc->sc_srom); 654 if (tlp_srom_debug) { 655 printf("SROM CONTENTS:"); 656 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 657 if ((i % 8) == 0) 658 printf("\n\t"); 659 printf("0x%02x ", sc->sc_srom[i]); 660 } 661 printf("\n"); 662 } 663 break; 664 } 665 #endif /* algor */ 666 667 /* Check for a slaved ROM on a multi-port board. */ 668 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 669 TULIP_PCI_SLAVEROM); 670 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 671 sc->sc_srom_addrbits = 672 psc->sc_master->sc_tulip.sc_srom_addrbits; 673 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 674 enaddr[5] += 675 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 676 } 677 else if (tlp_read_srom(sc) == 0) 678 goto cant_cope; 679 break; 680 } 681 682 /* 683 * Deal with chip/board quirks. This includes setting up 684 * the mediasw, and extracting the Ethernet address from 685 * the rombuf. 686 */ 687 switch (sc->sc_chip) { 688 case TULIP_CHIP_21040: 689 /* 690 * Parse the Ethernet Address ROM. 691 */ 692 if (tlp_parse_old_srom(sc, enaddr) == 0) 693 goto cant_cope; 694 695 696 /* 697 * All 21040 boards start out with the same 698 * media switch. 699 */ 700 sc->sc_mediasw = &tlp_21040_mediasw; 701 702 /* 703 * Deal with any quirks this board might have. 704 */ 705 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 706 break; 707 708 case TULIP_CHIP_21041: 709 /* Check for new format SROM. */ 710 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 711 /* 712 * Not an ISV SROM; try the old DEC Ethernet Address 713 * ROM format. 714 */ 715 if (tlp_parse_old_srom(sc, enaddr) == 0) 716 goto cant_cope; 717 } 718 719 /* 720 * All 21041 boards use the same media switch; they all 721 * work basically the same! Yippee! 722 */ 723 sc->sc_mediasw = &tlp_21041_mediasw; 724 725 /* 726 * Deal with any quirks this board might have. 727 */ 728 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 729 break; 730 731 case TULIP_CHIP_21140: 732 case TULIP_CHIP_21140A: 733 /* Check for new format SROM. */ 734 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 735 /* 736 * Not an ISV SROM; try the old DEC Ethernet Address 737 * ROM format. 738 */ 739 if (tlp_parse_old_srom(sc, enaddr) == 0) 740 goto cant_cope; 741 } else { 742 /* 743 * We start out with the 2114x ISV media switch. 744 * When we search for quirks, we may change to 745 * a different switch. 746 */ 747 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 748 } 749 750 /* 751 * Deal with any quirks this board might have. 752 */ 753 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 754 755 /* 756 * Bail out now if we can't deal with this board. 757 */ 758 if (sc->sc_mediasw == NULL) 759 goto cant_cope; 760 break; 761 762 case TULIP_CHIP_21142: 763 case TULIP_CHIP_21143: 764 /* Check for new format SROM. */ 765 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 766 /* 767 * Not an ISV SROM; try the old DEC Ethernet Address 768 * ROM format. 769 */ 770 if (tlp_parse_old_srom(sc, enaddr) == 0) { 771 /* 772 * One last try: just copy the address 773 * from offset 20 and try to look 774 * up quirks. 775 */ 776 memcpy(enaddr, &sc->sc_srom[20], 777 ETHER_ADDR_LEN); 778 } 779 } else { 780 /* 781 * We start out with the 2114x ISV media switch. 782 * When we search for quirks, we may change to 783 * a different switch. 784 */ 785 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 786 } 787 788 /* 789 * Deal with any quirks this board might have. 790 */ 791 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 792 793 /* 794 * Bail out now if we can't deal with this board. 795 */ 796 if (sc->sc_mediasw == NULL) 797 goto cant_cope; 798 break; 799 800 case TULIP_CHIP_82C168: 801 case TULIP_CHIP_82C169: 802 /* 803 * Lite-On PNIC's Ethernet address is the first 6 804 * bytes of its EEPROM. 805 */ 806 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 807 808 /* 809 * Lite-On PNICs always use the same mediasw; we 810 * select MII vs. internal NWAY automatically. 811 */ 812 sc->sc_mediasw = &tlp_pnic_mediasw; 813 break; 814 815 case TULIP_CHIP_MX98713: 816 /* 817 * The Macronix MX98713 has an MII and GPIO, but no 818 * internal Nway block. This chip is basically a 819 * perfect 21140A clone, with the exception of the 820 * a magic register frobbing in order to make the 821 * interface function. 822 */ 823 if (tlp_isv_srom_enaddr(sc, enaddr)) { 824 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 825 break; 826 } 827 /* FALLTHROUGH */ 828 829 case TULIP_CHIP_82C115: 830 /* 831 * Yippee! The Lite-On 82C115 is a clone of 832 * the MX98725 (the data sheet even says `MXIC' 833 * on it)! Imagine that, a clone of a clone. 834 * 835 * The differences are really minimal: 836 * 837 * - Wake-On-LAN support 838 * - 128-bit multicast hash table, rather than 839 * the standard 512-bit hash table 840 */ 841 /* FALLTHROUGH */ 842 843 case TULIP_CHIP_MX98713A: 844 case TULIP_CHIP_MX98715A: 845 case TULIP_CHIP_MX98715AEC_X: 846 case TULIP_CHIP_MX98725: 847 /* 848 * The MX98713A has an MII as well as an internal Nway block, 849 * but no GPIO. The MX98715 and MX98725 have an internal 850 * Nway block only. 851 * 852 * The internal Nway block, unlike the Lite-On PNIC's, does 853 * just that - performs Nway. Once autonegotiation completes, 854 * we must program the GPR media information into the chip. 855 * 856 * The byte offset of the Ethernet address is stored at 857 * offset 0x70. 858 */ 859 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 860 sc->sc_mediasw = &tlp_pmac_mediasw; 861 break; 862 863 case TULIP_CHIP_WB89C840F: 864 /* 865 * Winbond 89C840F's Ethernet address is the first 866 * 6 bytes of its EEPROM. 867 */ 868 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 869 870 /* 871 * Winbond 89C840F has an MII attached to the SIO. 872 */ 873 sc->sc_mediasw = &tlp_sio_mii_mediasw; 874 break; 875 876 case TULIP_CHIP_AL981: 877 /* 878 * The ADMtek AL981's Ethernet address is located 879 * at offset 8 of its EEPROM. 880 */ 881 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 882 883 /* 884 * ADMtek AL981 has a built-in PHY accessed through 885 * special registers. 886 */ 887 sc->sc_mediasw = &tlp_al981_mediasw; 888 break; 889 890 case TULIP_CHIP_AN983: 891 case TULIP_CHIP_AN985: 892 /* 893 * The ADMtek AN985's Ethernet address is located 894 * at offset 8 of its EEPROM. 895 */ 896 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 897 898 /* 899 * The ADMtek AN985 can be configured in Single-Chip 900 * mode or MAC-only mode. Single-Chip uses the built-in 901 * PHY, MAC-only has an external PHY (usually HomePNA). 902 * The selection is based on an EEPROM setting, and both 903 * PHYs are accessed via MII attached to SIO. 904 * 905 * The AN985 "ghosts" the internal PHY onto all 906 * MII addresses, so we have to use a media init 907 * routine that limits the search. 908 * XXX How does this work with MAC-only mode? 909 */ 910 sc->sc_mediasw = &tlp_an985_mediasw; 911 break; 912 913 case TULIP_CHIP_DM9102: 914 case TULIP_CHIP_DM9102A: 915 /* 916 * Some boards with the Davicom chip have an ISV 917 * SROM (mostly DM9102A boards -- trying to describe 918 * the HomePNA PHY, probably) although the data in 919 * them is generally wrong. Check for ISV format 920 * and grab the Ethernet address that way, and if 921 * that fails, fall back on grabbing it from an 922 * observed offset of 20 (which is where it would 923 * be in an ISV SROM anyhow, tho ISV can cope with 924 * multi-port boards). 925 */ 926 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 927 #ifdef __sparc__ 928 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 929 !sc->sc_srom[22]) { 930 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 931 } else 932 #endif 933 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 934 } 935 936 /* 937 * Davicom chips all have an internal MII interface 938 * and a built-in PHY. DM9102A also has a an external 939 * MII interface, usually with a HomePNA PHY attached 940 * to it. 941 */ 942 sc->sc_mediasw = &tlp_dm9102_mediasw; 943 break; 944 945 default: 946 cant_cope: 947 printf("%s: sorry, unable to handle your board\n", 948 sc->sc_dev.dv_xname); 949 return; 950 } 951 952 /* 953 * Handle shared interrupts. 954 */ 955 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 956 if (psc->sc_master) 957 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 958 else { 959 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 960 TULIP_PCI_SLAVEINTR); 961 if (psc->sc_master == NULL) 962 psc->sc_master = psc; 963 } 964 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 965 psc, sc_intrq); 966 } 967 968 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 969 printf("%s: sharing interrupt with %s\n", 970 sc->sc_dev.dv_xname, 971 psc->sc_master->sc_tulip.sc_dev.dv_xname); 972 } else { 973 /* 974 * Map and establish our interrupt. 975 */ 976 if (pci_intr_map(pa, &ih)) { 977 printf("%s: unable to map interrupt\n", 978 sc->sc_dev.dv_xname); 979 return; 980 } 981 intrstr = pci_intr_string(pc, ih); 982 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 983 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 984 tlp_pci_shared_intr : tlp_intr, sc); 985 if (psc->sc_ih == NULL) { 986 printf("%s: unable to establish interrupt", 987 sc->sc_dev.dv_xname); 988 if (intrstr != NULL) 989 printf(" at %s", intrstr); 990 printf("\n"); 991 return; 992 } 993 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 994 intrstr); 995 } 996 997 /* 998 * Finish off the attach. 999 */ 1000 tlp_attach(sc, enaddr); 1001 } 1002 1003 int 1004 tlp_pci_shared_intr(arg) 1005 void *arg; 1006 { 1007 struct tulip_pci_softc *master = arg, *slave; 1008 int rv = 0; 1009 1010 for (slave = LIST_FIRST(&master->sc_intrslaves); 1011 slave != NULL; 1012 slave = LIST_NEXT(slave, sc_intrq)) 1013 rv |= tlp_intr(&slave->sc_tulip); 1014 1015 return (rv); 1016 } 1017 1018 void 1019 tlp_pci_dec_quirks(psc, enaddr) 1020 struct tulip_pci_softc *psc; 1021 const u_int8_t *enaddr; 1022 { 1023 struct tulip_softc *sc = &psc->sc_tulip; 1024 1025 /* 1026 * This isn't really a quirk-gathering device, really. We 1027 * just want to get the spiffy DEC board name from the SROM. 1028 */ 1029 strcpy(sc->sc_name, "DEC "); 1030 1031 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1032 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1033 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1034 else 1035 sc->sc_name[3] = '\0'; 1036 } 1037 1038 void 1039 tlp_pci_znyx_21040_quirks(psc, enaddr) 1040 struct tulip_pci_softc *psc; 1041 const u_int8_t *enaddr; 1042 { 1043 struct tulip_softc *sc = &psc->sc_tulip; 1044 u_int16_t id = 0; 1045 1046 /* 1047 * If we have a slaved ROM, just copy the bits from the master. 1048 * This is in case we fail the ROM ID check (older boards) and 1049 * need to fall back on Ethernet address model checking; that 1050 * will fail for slave chips. 1051 */ 1052 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1053 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1054 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1055 psc->sc_flags |= 1056 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1057 return; 1058 } 1059 1060 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1061 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1062 switch (id) { 1063 zx312: 1064 case 0x0602: /* ZX312 */ 1065 strcpy(sc->sc_name, "ZNYX ZX312"); 1066 return; 1067 1068 case 0x0622: /* ZX312T */ 1069 strcpy(sc->sc_name, "ZNYX ZX312T"); 1070 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1071 return; 1072 1073 zx314_inta: 1074 case 0x0701: /* ZX314 INTA */ 1075 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1076 /* FALLTHROUGH */ 1077 case 0x0711: /* ZX314 */ 1078 strcpy(sc->sc_name, "ZNYX ZX314"); 1079 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1080 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1081 return; 1082 1083 zx315_inta: 1084 case 0x0801: /* ZX315 INTA */ 1085 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1086 /* FALLTHROUGH */ 1087 case 0x0811: /* ZX315 */ 1088 strcpy(sc->sc_name, "ZNYX ZX315"); 1089 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1090 return; 1091 1092 default: 1093 id = 0; 1094 break; 1095 } 1096 } 1097 1098 /* 1099 * Deal with boards that have broken ROMs. 1100 */ 1101 if (id == 0) { 1102 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1103 goto zx314_inta; 1104 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1105 goto zx315_inta; 1106 if ((enaddr[3] & ~3) == 0xec) 1107 goto zx312; 1108 } 1109 1110 strcpy(sc->sc_name, "ZNYX ZX31x"); 1111 } 1112 1113 void tlp_pci_znyx_21142_qs6611_reset __P((struct tulip_softc *)); 1114 1115 void 1116 tlp_pci_znyx_21142_quirks(psc, enaddr) 1117 struct tulip_pci_softc *psc; 1118 const u_int8_t *enaddr; 1119 { 1120 struct tulip_softc *sc = &psc->sc_tulip; 1121 pcireg_t subid; 1122 1123 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1124 1125 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1126 return; /* ? */ 1127 1128 switch (PCI_PRODUCT(subid) & 0xff) { 1129 /* 1130 * ZNYX 21143 boards with QS6611 PHY 1131 */ 1132 case 0x12: /* ZX345Q */ 1133 case 0x13: /* ZX346Q */ 1134 case 0x14: /* ZX348Q */ 1135 case 0x18: /* ZX414 */ 1136 case 0x19: /* ZX412 */ 1137 case 0x1a: /* ZX444 */ 1138 case 0x1b: /* ZX442 */ 1139 case 0x23: /* ZX212 */ 1140 case 0x24: /* ZX214 */ 1141 case 0x29: /* ZX374 */ 1142 case 0x2d: /* ZX372 */ 1143 case 0x2b: /* ZX244 */ 1144 case 0x2c: /* ZX424 */ 1145 case 0x2e: /* ZX422 */ 1146 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1147 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1148 break; 1149 } 1150 } 1151 1152 void 1153 tlp_pci_znyx_21142_qs6611_reset(sc) 1154 struct tulip_softc *sc; 1155 { 1156 1157 /* 1158 * Reset QS6611 PHY. 1159 */ 1160 TULIP_WRITE(sc, CSR_SIAGEN, 1161 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1162 delay(200); 1163 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1164 delay(10000); 1165 } 1166 1167 void 1168 tlp_pci_smc_21040_quirks(psc, enaddr) 1169 struct tulip_pci_softc *psc; 1170 const u_int8_t *enaddr; 1171 { 1172 struct tulip_softc *sc = &psc->sc_tulip; 1173 u_int16_t id1, id2, ei; 1174 int auibnc = 0, utp = 0; 1175 char *cp; 1176 1177 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1178 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1179 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1180 1181 strcpy(sc->sc_name, "SMC 8432"); 1182 cp = &sc->sc_name[8]; 1183 1184 if ((id1 & 1) == 0) { 1185 *cp++ = 'B'; 1186 auibnc = 1; 1187 } 1188 if ((id1 & 0xff) > 0x32) { 1189 *cp++ = 'T'; 1190 utp = 1; 1191 } 1192 if ((id1 & 0x4000) == 0) { 1193 *cp++ = 'A'; 1194 auibnc = 1; 1195 } 1196 if (id2 == 0x15) { 1197 sc->sc_name[7] = '4'; 1198 *cp++ = '-'; 1199 *cp++ = 'C'; 1200 *cp++ = 'H'; 1201 *cp++ = ei ? '2' : '1'; 1202 } 1203 *cp = '\0'; 1204 1205 if (utp != 0 && auibnc == 0) 1206 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1207 else if (utp == 0 && auibnc != 0) 1208 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1209 } 1210 1211 void 1212 tlp_pci_cogent_21040_quirks(psc, enaddr) 1213 struct tulip_pci_softc *psc; 1214 const u_int8_t *enaddr; 1215 { 1216 1217 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1218 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1219 } 1220 1221 void 1222 tlp_pci_accton_21040_quirks(psc, enaddr) 1223 struct tulip_pci_softc *psc; 1224 const u_int8_t *enaddr; 1225 { 1226 1227 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1228 } 1229 1230 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1231 1232 void 1233 tlp_pci_asante_21140_quirks(psc, enaddr) 1234 struct tulip_pci_softc *psc; 1235 const u_int8_t *enaddr; 1236 { 1237 struct tulip_softc *sc = &psc->sc_tulip; 1238 1239 /* 1240 * Some Asante boards don't use the ISV SROM format. For 1241 * those that don't, we initialize the GPIO direction bits, 1242 * and provide our own reset hook, which resets the MII. 1243 * 1244 * All of these boards use SIO-attached-MII media. 1245 */ 1246 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1247 return; 1248 1249 strcpy(sc->sc_name, "Asante"); 1250 1251 sc->sc_gp_dir = 0xbf; 1252 sc->sc_reset = tlp_pci_asante_21140_reset; 1253 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1254 } 1255 1256 void 1257 tlp_pci_asante_21140_reset(sc) 1258 struct tulip_softc *sc; 1259 { 1260 1261 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1262 TULIP_WRITE(sc, CSR_GPP, 0x8); 1263 delay(100); 1264 TULIP_WRITE(sc, CSR_GPP, 0); 1265 } 1266 1267 /* 1268 * SMC 9332DST media switch. 1269 */ 1270 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1271 1272 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1273 tlp_smc9332dst_tmsw_init, 1274 tlp_21140_gpio_get, 1275 tlp_21140_gpio_set 1276 }; 1277 1278 void 1279 tlp_pci_smc_21140_quirks(psc, enaddr) 1280 struct tulip_pci_softc *psc; 1281 const u_int8_t *enaddr; 1282 { 1283 struct tulip_softc *sc = &psc->sc_tulip; 1284 1285 if (sc->sc_mediasw != NULL) { 1286 return; 1287 } 1288 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1289 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1290 } 1291 1292 void 1293 tlp_smc9332dst_tmsw_init(sc) 1294 struct tulip_softc *sc; 1295 { 1296 struct tulip_21x4x_media *tm; 1297 const char *sep = ""; 1298 uint32_t reg; 1299 int i, cnt; 1300 1301 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1302 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1303 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1304 1305 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1306 tlp_mediastatus); 1307 printf("%s: ", sc->sc_dev.dv_xname); 1308 1309 #define ADD(m, c) \ 1310 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1311 tm->tm_opmode = (c); \ 1312 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1313 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1314 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1315 1316 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1317 PRINT("10baseT"); 1318 1319 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1320 OPMODE_TTM | OPMODE_FD); 1321 PRINT("10baseT-FDX"); 1322 1323 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1324 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1325 PRINT("100baseTX"); 1326 1327 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1328 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1329 PRINT("100baseTX-FDX"); 1330 1331 #undef ADD 1332 #undef PRINT 1333 1334 printf("\n"); 1335 1336 tlp_reset(sc); 1337 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1338 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1339 delay(10); 1340 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1341 delay(200000); 1342 cnt = 0; 1343 for (i = 1000; i > 0; i--) { 1344 reg = TULIP_READ(sc, CSR_GPP); 1345 if ((~reg & (GPP_SMC9332DST_OK10 | 1346 GPP_SMC9332DST_OK100)) == 0) { 1347 if (cnt++ > 100) { 1348 break; 1349 } 1350 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1351 break; 1352 } else { 1353 cnt = 0; 1354 } 1355 delay(1000); 1356 } 1357 if (cnt > 100) { 1358 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1359 } else { 1360 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1361 } 1362 } 1363 1364 void 1365 tlp_pci_vpc_21140_quirks(psc, enaddr) 1366 struct tulip_pci_softc *psc; 1367 const u_int8_t *enaddr; 1368 { 1369 struct tulip_softc *sc = &psc->sc_tulip; 1370 char *p1 = (char *) &sc->sc_srom[32]; 1371 char *p2 = &sc->sc_name[0]; 1372 1373 do { 1374 if ((unsigned char) *p1 & 0x80) 1375 *p2++ = ' '; 1376 else 1377 *p2++ = *p1; 1378 } while (*p1++); 1379 } 1380 1381 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1382 1383 void 1384 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1385 struct tulip_pci_softc *psc; 1386 const u_int8_t *enaddr; 1387 { 1388 struct tulip_softc *sc = &psc->sc_tulip; 1389 1390 /* 1391 * Cobalt Networks interfaces are just MII-on-SIO. 1392 */ 1393 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1394 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1395 1396 /* 1397 * The Cobalt systems tend to fall back to store-and-forward 1398 * pretty quickly, so we select that from the beginning to 1399 * avoid initial timeouts. 1400 */ 1401 sc->sc_txthresh = TXTH_SF; 1402 } 1403 1404 void 1405 tlp_pci_cobalt_21142_reset(sc) 1406 struct tulip_softc *sc; 1407 { 1408 /* 1409 * Reset PHY. 1410 */ 1411 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1412 delay(10); 1413 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1414 delay(10); 1415 } 1416 1417 void 1418 tlp_pci_algor_21142_quirks(psc, enaddr) 1419 struct tulip_pci_softc *psc; 1420 const u_int8_t *enaddr; 1421 { 1422 struct tulip_softc *sc = &psc->sc_tulip; 1423 1424 /* 1425 * Algorithmics boards just have MII-on-SIO. 1426 * 1427 * XXX They also have AUI on the serial interface. 1428 * XXX Deal with this. 1429 */ 1430 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1431 } 1432 1433 /* 1434 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1435 */ 1436 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1437 1438 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1439 tlp_cogent_em1x0_tmsw_init, 1440 tlp_21140_gpio_get, 1441 tlp_21140_gpio_set 1442 }; 1443 1444 void 1445 tlp_pci_adaptec_quirks(psc, enaddr) 1446 struct tulip_pci_softc *psc; 1447 const u_int8_t *enaddr; 1448 { 1449 struct tulip_softc *sc = &psc->sc_tulip; 1450 uint8_t *srom = sc->sc_srom, id0; 1451 uint16_t id1, id2; 1452 1453 if (sc->sc_mediasw == NULL) { 1454 id0 = srom[32]; 1455 switch (id0) { 1456 case 0x12: 1457 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1458 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1459 break; 1460 1461 case 0x15: 1462 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1463 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1464 break; 1465 1466 #if 0 1467 case XXX: 1468 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1469 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1470 break; 1471 #endif 1472 1473 default: 1474 printf("%s: unknown Cogent board ID 0x%02x\n", 1475 sc->sc_dev.dv_xname, id0); 1476 } 1477 return; 1478 } 1479 1480 id1 = TULIP_ROM_GETW(srom, 0); 1481 id2 = TULIP_ROM_GETW(srom, 2); 1482 if (id1 != 0x1109) { 1483 goto unknown; 1484 } 1485 1486 switch (id2) { 1487 case 0x1900: 1488 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1489 break; 1490 1491 case 0x2400: 1492 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1493 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1494 break; 1495 1496 case 0x2b00: 1497 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1498 break; 1499 1500 case 0x3000: 1501 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1502 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1503 break; 1504 1505 default: 1506 unknown: 1507 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1508 sc->sc_dev.dv_xname, id1, id2); 1509 } 1510 } 1511 1512 void 1513 tlp_cogent_em1x0_tmsw_init(sc) 1514 struct tulip_softc *sc; 1515 { 1516 struct tulip_21x4x_media *tm; 1517 const char *sep = ""; 1518 1519 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1520 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1521 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1522 1523 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1524 tlp_mediastatus); 1525 printf("%s: ", sc->sc_dev.dv_xname); 1526 1527 #define ADD(m, c) \ 1528 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1529 tm->tm_opmode = (c); \ 1530 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1531 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1532 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1533 1534 if (sc->sc_srom[32] == 0x15) { 1535 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1536 OPMODE_PS | OPMODE_PCS); 1537 PRINT("100baseFX"); 1538 1539 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1540 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1541 PRINT("100baseFX-FDX"); 1542 printf("\n"); 1543 1544 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1545 } else { 1546 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1547 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1548 PRINT("100baseTX"); 1549 1550 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1551 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1552 PRINT("100baseTX-FDX"); 1553 printf("\n"); 1554 1555 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1556 } 1557 1558 #undef ADD 1559 #undef PRINT 1560 } 1561 1562 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1563 1564 void 1565 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1566 struct tulip_pci_softc *psc; 1567 const u_int8_t *enaddr; 1568 { 1569 struct tulip_softc *sc = &psc->sc_tulip; 1570 1571 /* 1572 * Netwinders just use MII-on_SIO. 1573 */ 1574 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1575 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1576 } 1577 1578 void 1579 tlp_pci_netwinder_21142_reset(sc) 1580 struct tulip_softc *sc; 1581 { 1582 1583 /* 1584 * Reset the PHY. 1585 */ 1586 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1587 delay(10); 1588 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1589 delay(10); 1590 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1591 delay(10); 1592 } 1593
Indexes created Tue Sep 30 20:09:53 GMT 2025