if_tlp_pci.c revision 1.77 1 /* $NetBSD: if_tlp_pci.c,v 1.77 2004/08/21 23:48:33 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center; and Charles M. Hannum.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.77 2004/08/21 23:48:33 thorpej Exp $");
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/mbuf.h>
51 #include <sys/malloc.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
54 #include <sys/ioctl.h>
55 #include <sys/errno.h>
56 #include <sys/device.h>
57
58 #include <machine/endian.h>
59
60 #include <net/if.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
63 #include <net/if_ether.h>
64
65 #include <machine/bus.h>
66 #include <machine/intr.h>
67 #ifdef __sparc__
68 #include <machine/promlib.h>
69 #endif
70
71 #include <dev/mii/miivar.h>
72 #include <dev/mii/mii_bitbang.h>
73
74 #include <dev/ic/tulipreg.h>
75 #include <dev/ic/tulipvar.h>
76
77 #include <dev/pci/pcivar.h>
78 #include <dev/pci/pcireg.h>
79 #include <dev/pci/pcidevs.h>
80
81 /*
82 * PCI configuration space registers used by the Tulip.
83 */
84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
87
88 #define CFDA_SLEEP 0x80000000 /* sleep mode */
89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
90
91 struct tulip_pci_softc {
92 struct tulip_softc sc_tulip; /* real Tulip softc */
93
94 /* PCI-specific goo. */
95 void *sc_ih; /* interrupt handle */
96
97 pci_chipset_tag_t sc_pc; /* our PCI chipset */
98 pcitag_t sc_pcitag; /* our PCI tag */
99
100 int sc_flags; /* flags; see below */
101
102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
103 LIST_ENTRY(tulip_pci_softc) sc_intrq;
104
105 /* Our {ROM,interrupt} master. */
106 struct tulip_pci_softc *sc_master;
107 };
108
109 /* sc_flags */
110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
114
115 static int tlp_pci_match(struct device *, struct cfdata *, void *);
116 static void tlp_pci_attach(struct device *, struct device *, void *);
117
118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc),
119 tlp_pci_match, tlp_pci_attach, NULL, NULL);
120
121 static const struct tulip_pci_product {
122 u_int32_t tpp_vendor; /* PCI vendor ID */
123 u_int32_t tpp_product; /* PCI product ID */
124 tulip_chip_t tpp_chip; /* base Tulip chip type */
125 } tlp_pci_products[] = {
126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
127 TULIP_CHIP_21040 },
128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
129 TULIP_CHIP_21041 },
130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
131 TULIP_CHIP_21140 },
132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
133 TULIP_CHIP_21142 },
134
135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
136 TULIP_CHIP_82C168 },
137
138 /*
139 * Note: This is like a MX98725 with Wake-On-LAN and a
140 * 128-bit multicast hash table.
141 */
142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
143 TULIP_CHIP_82C115 },
144
145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
146 TULIP_CHIP_MX98713 },
147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
148 TULIP_CHIP_MX98715 },
149
150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
151 TULIP_CHIP_MX98713 },
152
153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
154 TULIP_CHIP_WB89C840F },
155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
156 TULIP_CHIP_WB89C840F },
157
158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
159 TULIP_CHIP_DM9102 },
160
161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
162 TULIP_CHIP_AL981 },
163
164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
165 TULIP_CHIP_AN985 },
166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
167 TULIP_CHIP_AN985 },
168
169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB,
170 TULIP_CHIP_AN985 },
171
172 #if 0
173 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
174 TULIP_CHIP_AX88140 },
175 #endif
176
177 { 0, 0,
178 TULIP_CHIP_INVALID },
179 };
180
181 struct tlp_pci_quirks {
182 void (*tpq_func)(struct tulip_pci_softc *,
183 const u_int8_t *);
184 u_int8_t tpq_oui[3];
185 };
186
187 static void tlp_pci_dec_quirks(struct tulip_pci_softc *,
188 const u_int8_t *);
189
190 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *,
191 const u_int8_t *);
192 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *,
193 const u_int8_t *);
194 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *,
195 const u_int8_t *);
196 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *,
197 const u_int8_t *);
198
199 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *,
200 const u_int8_t *);
201 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *,
202 const u_int8_t *);
203 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *,
204 const u_int8_t *);
205 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *,
206 const u_int8_t *);
207
208 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *,
209 const u_int8_t *);
210
211 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
216 { NULL, { 0, 0, 0 } }
217 };
218
219 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
222 { NULL, { 0, 0, 0 } }
223 };
224
225 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *,
226 const u_int8_t *);
227 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *,
228 const u_int8_t *);
229 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *,
230 const u_int8_t *);
231
232 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
233 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
234 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
235 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
236 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } },
237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
238 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } },
239 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } },
240 { NULL, { 0, 0, 0 } }
241 };
242
243 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
246 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
247 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } },
248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
249 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } },
250 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } },
251 { NULL, { 0, 0, 0 } }
252 };
253
254 static int tlp_pci_shared_intr(void *);
255
256 static const struct tulip_pci_product *
257 tlp_pci_lookup(const struct pci_attach_args *pa)
258 {
259 const struct tulip_pci_product *tpp;
260
261 for (tpp = tlp_pci_products;
262 tlp_chip_names[tpp->tpp_chip] != NULL;
263 tpp++) {
264 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
265 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
266 return (tpp);
267 }
268 return (NULL);
269 }
270
271 static void
272 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr,
273 const struct tlp_pci_quirks *tpq)
274 {
275
276 for (; tpq->tpq_func != NULL; tpq++) {
277 if (tpq->tpq_oui[0] == enaddr[0] &&
278 tpq->tpq_oui[1] == enaddr[1] &&
279 tpq->tpq_oui[2] == enaddr[2]) {
280 (*tpq->tpq_func)(psc, enaddr);
281 return;
282 }
283 }
284 }
285
286 static void
287 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved)
288 {
289 extern struct cfdriver tlp_cd;
290 struct tulip_pci_softc *cur, *best = NULL;
291 struct tulip_softc *sc = &psc->sc_tulip;
292 int i;
293
294 /*
295 * First of all, find the lowest pcidev numbered device on our
296 * bus marked as shared. That should be our master.
297 */
298 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
299 if ((cur = tlp_cd.cd_devs[i]) == NULL)
300 continue;
301 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
302 continue;
303 if ((cur->sc_flags & shared) == 0)
304 continue;
305 if (cur == psc)
306 continue;
307 if (best == NULL ||
308 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
309 best = cur;
310 }
311
312 if (best != NULL) {
313 psc->sc_master = best;
314 psc->sc_flags |= (shared | slaved);
315 }
316 }
317
318 static int
319 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux)
320 {
321 struct pci_attach_args *pa = aux;
322
323 if (tlp_pci_lookup(pa) != NULL)
324 return (10); /* beat if_de.c */
325
326 return (0);
327 }
328
329 static void
330 tlp_pci_attach(struct device *parent, struct device *self, void *aux)
331 {
332 struct tulip_pci_softc *psc = (void *) self;
333 struct tulip_softc *sc = &psc->sc_tulip;
334 struct pci_attach_args *pa = aux;
335 pci_chipset_tag_t pc = pa->pa_pc;
336 pci_intr_handle_t ih;
337 const char *intrstr = NULL;
338 bus_space_tag_t iot, memt;
339 bus_space_handle_t ioh, memh;
340 int ioh_valid, memh_valid, i, j;
341 const struct tulip_pci_product *tpp;
342 u_int8_t enaddr[ETHER_ADDR_LEN];
343 u_int32_t val = 0;
344 pcireg_t reg;
345 int pmreg;
346
347 sc->sc_devno = pa->pa_device;
348 psc->sc_pc = pa->pa_pc;
349 psc->sc_pcitag = pa->pa_tag;
350
351 LIST_INIT(&psc->sc_intrslaves);
352
353 tpp = tlp_pci_lookup(pa);
354 if (tpp == NULL) {
355 printf("\n");
356 panic("tlp_pci_attach: impossible");
357 }
358 sc->sc_chip = tpp->tpp_chip;
359
360 /*
361 * By default, Tulip registers are 8 bytes long (4 bytes
362 * followed by a 4 byte pad).
363 */
364 sc->sc_regshift = 3;
365
366 /*
367 * No power management hooks.
368 * XXX Maybe we should add some!
369 */
370 sc->sc_flags |= TULIPF_ENABLED;
371
372 /*
373 * Get revision info, and set some chip-specific variables.
374 */
375 sc->sc_rev = PCI_REVISION(pa->pa_class);
376 switch (sc->sc_chip) {
377 case TULIP_CHIP_21140:
378 if (sc->sc_rev >= 0x20)
379 sc->sc_chip = TULIP_CHIP_21140A;
380 break;
381
382 case TULIP_CHIP_21142:
383 if (sc->sc_rev >= 0x20)
384 sc->sc_chip = TULIP_CHIP_21143;
385 break;
386
387 case TULIP_CHIP_82C168:
388 if (sc->sc_rev >= 0x20)
389 sc->sc_chip = TULIP_CHIP_82C169;
390 break;
391
392 case TULIP_CHIP_MX98713:
393 if (sc->sc_rev >= 0x10)
394 sc->sc_chip = TULIP_CHIP_MX98713A;
395 break;
396
397 case TULIP_CHIP_MX98715:
398 if (sc->sc_rev >= 0x20)
399 sc->sc_chip = TULIP_CHIP_MX98715A;
400 if (sc->sc_rev >= 0x25)
401 sc->sc_chip = TULIP_CHIP_MX98715AEC_X;
402 if (sc->sc_rev >= 0x30)
403 sc->sc_chip = TULIP_CHIP_MX98725;
404 break;
405
406 case TULIP_CHIP_WB89C840F:
407 sc->sc_regshift = 2;
408 break;
409
410 case TULIP_CHIP_AN985:
411 /*
412 * The AN983 and AN985 are very similar, and are
413 * differentiated by a "signature" register that
414 * is like, but not identical, to a PCI ID register.
415 */
416 reg = pci_conf_read(pc, pa->pa_tag, 0x80);
417 switch (reg) {
418 case 0x09811317:
419 sc->sc_chip = TULIP_CHIP_AN985;
420 break;
421
422 case 0x09851317:
423 sc->sc_chip = TULIP_CHIP_AN983;
424 break;
425
426 default:
427 /* Unknown -- use default. */
428 break;
429 }
430 break;
431
432 case TULIP_CHIP_AX88140:
433 if (sc->sc_rev >= 0x10)
434 sc->sc_chip = TULIP_CHIP_AX88141;
435 break;
436
437 case TULIP_CHIP_DM9102:
438 if (sc->sc_rev >= 0x30)
439 sc->sc_chip = TULIP_CHIP_DM9102A;
440 break;
441
442 default:
443 /* Nothing. */
444 break;
445 }
446
447 printf(": %s Ethernet, pass %d.%d\n",
448 tlp_chip_names[sc->sc_chip],
449 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
450
451 switch (sc->sc_chip) {
452 case TULIP_CHIP_21040:
453 if (sc->sc_rev < 0x20) {
454 printf("%s: 21040 must be at least pass 2.0\n",
455 sc->sc_dev.dv_xname);
456 return;
457 }
458 break;
459
460 case TULIP_CHIP_21140:
461 if (sc->sc_rev < 0x11) {
462 printf("%s: 21140 must be at least pass 1.1\n",
463 sc->sc_dev.dv_xname);
464 return;
465 }
466 break;
467
468 default:
469 /* Nothing. */
470 break;
471 }
472
473 /*
474 * Check to see if the device is in power-save mode, and
475 * being it out if necessary.
476 */
477 switch (sc->sc_chip) {
478 case TULIP_CHIP_21140:
479 case TULIP_CHIP_21140A:
480 case TULIP_CHIP_21142:
481 case TULIP_CHIP_21143:
482 case TULIP_CHIP_MX98713A:
483 case TULIP_CHIP_MX98715:
484 case TULIP_CHIP_MX98715A:
485 case TULIP_CHIP_MX98715AEC_X:
486 case TULIP_CHIP_MX98725:
487 case TULIP_CHIP_DM9102:
488 case TULIP_CHIP_DM9102A:
489 /*
490 * Clear the "sleep mode" bit in the CFDA register.
491 */
492 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
493 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
494 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
495 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
496 break;
497
498 default:
499 /* Nothing. */
500 break;
501 }
502
503 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
504 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
505 switch (reg & PCI_PMCSR_STATE_MASK) {
506 case PCI_PMCSR_STATE_D1:
507 case PCI_PMCSR_STATE_D2:
508 printf("%s: waking up from power state D%d\n%s",
509 sc->sc_dev.dv_xname,
510 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
511 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
512 (reg & ~PCI_PMCSR_STATE_MASK) |
513 PCI_PMCSR_STATE_D0);
514 break;
515 case PCI_PMCSR_STATE_D3:
516 /*
517 * The card has lost all configuration data in
518 * this state, so punt.
519 */
520 printf("%s: unable to wake up from power state D3, "
521 "reboot required.\n", sc->sc_dev.dv_xname);
522 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
523 (reg & ~PCI_PMCSR_STATE_MASK) |
524 PCI_PMCSR_STATE_D0);
525 return;
526 }
527 }
528
529 /*
530 * Map the device.
531 */
532 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
533 PCI_MAPREG_TYPE_IO, 0,
534 &iot, &ioh, NULL, NULL) == 0);
535 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
536 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
537 &memt, &memh, NULL, NULL) == 0);
538
539 if (memh_valid) {
540 sc->sc_st = memt;
541 sc->sc_sh = memh;
542 } else if (ioh_valid) {
543 sc->sc_st = iot;
544 sc->sc_sh = ioh;
545 } else {
546 printf("%s: unable to map device registers\n",
547 sc->sc_dev.dv_xname);
548 return;
549 }
550
551 sc->sc_dmat = pa->pa_dmat;
552
553 /*
554 * Make sure bus mastering is enabled.
555 */
556 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
557 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
558 PCI_COMMAND_MASTER_ENABLE);
559
560 /*
561 * Get the cacheline size.
562 */
563 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
564 PCI_BHLC_REG));
565
566 /*
567 * Get PCI data moving command info.
568 */
569 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
570 sc->sc_flags |= TULIPF_MRL;
571 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
572 sc->sc_flags |= TULIPF_MRM;
573 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
574 sc->sc_flags |= TULIPF_MWI;
575
576 /*
577 * Read the contents of the Ethernet Address ROM/SROM.
578 */
579 switch (sc->sc_chip) {
580 case TULIP_CHIP_21040:
581 sc->sc_srom_addrbits = 6;
582 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT);
583 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
584 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
585 for (j = 0; j < 10000; j++) {
586 val = TULIP_READ(sc, CSR_MIIROM);
587 if ((val & MIIROM_DN) == 0)
588 break;
589 }
590 sc->sc_srom[i] = val & MIIROM_DATA;
591 }
592 break;
593
594 case TULIP_CHIP_82C168:
595 case TULIP_CHIP_82C169:
596 {
597 sc->sc_srom_addrbits = 2;
598 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT);
599
600 /*
601 * The Lite-On PNIC stores the Ethernet address in
602 * the first 3 words of the EEPROM. EEPROM access
603 * is not like the other Tulip chips.
604 */
605 for (i = 0; i < 6; i += 2) {
606 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
607 PNIC_SROMCTL_READ | (i >> 1));
608 for (j = 0; j < 500; j++) {
609 delay(2);
610 val = TULIP_READ(sc, CSR_MIIROM);
611 if ((val & PNIC_MIIROM_BUSY) == 0)
612 break;
613 }
614 if (val & PNIC_MIIROM_BUSY) {
615 printf("%s: EEPROM timed out\n",
616 sc->sc_dev.dv_xname);
617 return;
618 }
619 val &= PNIC_MIIROM_DATA;
620 sc->sc_srom[i] = val >> 8;
621 sc->sc_srom[i + 1] = val & 0xff;
622 }
623 break;
624 }
625
626 default:
627 #ifdef algor
628 /*
629 * XXX This should be done with device properties, but
630 * XXX we don't have those yet.
631 */
632 if (algor_get_ethaddr(pa, NULL)) {
633 extern int tlp_srom_debug;
634 sc->sc_srom_addrbits = 6;
635 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF,
636 M_NOWAIT|M_ZERO);
637 algor_get_ethaddr(pa, sc->sc_srom);
638 if (tlp_srom_debug) {
639 printf("SROM CONTENTS:");
640 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
641 if ((i % 8) == 0)
642 printf("\n\t");
643 printf("0x%02x ", sc->sc_srom[i]);
644 }
645 printf("\n");
646 }
647 break;
648 }
649 #endif /* algor */
650
651 /* Check for a slaved ROM on a multi-port board. */
652 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
653 TULIP_PCI_SLAVEROM);
654 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
655 sc->sc_srom_addrbits =
656 psc->sc_master->sc_tulip.sc_srom_addrbits;
657 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom;
658 enaddr[5] +=
659 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
660 }
661 else if (tlp_read_srom(sc) == 0)
662 goto cant_cope;
663 break;
664 }
665
666 /*
667 * Deal with chip/board quirks. This includes setting up
668 * the mediasw, and extracting the Ethernet address from
669 * the rombuf.
670 */
671 switch (sc->sc_chip) {
672 case TULIP_CHIP_21040:
673 /*
674 * Parse the Ethernet Address ROM.
675 */
676 if (tlp_parse_old_srom(sc, enaddr) == 0)
677 goto cant_cope;
678
679
680 /*
681 * All 21040 boards start out with the same
682 * media switch.
683 */
684 sc->sc_mediasw = &tlp_21040_mediasw;
685
686 /*
687 * Deal with any quirks this board might have.
688 */
689 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
690 break;
691
692 case TULIP_CHIP_21041:
693 /* Check for new format SROM. */
694 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
695 /*
696 * Not an ISV SROM; try the old DEC Ethernet Address
697 * ROM format.
698 */
699 if (tlp_parse_old_srom(sc, enaddr) == 0)
700 goto cant_cope;
701 }
702
703 /*
704 * All 21041 boards use the same media switch; they all
705 * work basically the same! Yippee!
706 */
707 sc->sc_mediasw = &tlp_21041_mediasw;
708
709 /*
710 * Deal with any quirks this board might have.
711 */
712 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
713 break;
714
715 case TULIP_CHIP_21140:
716 case TULIP_CHIP_21140A:
717 /* Check for new format SROM. */
718 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
719 /*
720 * Not an ISV SROM; try the old DEC Ethernet Address
721 * ROM format.
722 */
723 if (tlp_parse_old_srom(sc, enaddr) == 0)
724 goto cant_cope;
725 } else {
726 /*
727 * We start out with the 2114x ISV media switch.
728 * When we search for quirks, we may change to
729 * a different switch.
730 */
731 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
732 }
733
734 /*
735 * Deal with any quirks this board might have.
736 */
737 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
738
739 /*
740 * Bail out now if we can't deal with this board.
741 */
742 if (sc->sc_mediasw == NULL)
743 goto cant_cope;
744 break;
745
746 case TULIP_CHIP_21142:
747 case TULIP_CHIP_21143:
748 /* Check for new format SROM. */
749 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
750 /*
751 * Not an ISV SROM; try the old DEC Ethernet Address
752 * ROM format.
753 */
754 if (tlp_parse_old_srom(sc, enaddr) == 0) {
755 /*
756 * One last try: just copy the address
757 * from offset 20 and try to look
758 * up quirks.
759 */
760 memcpy(enaddr, &sc->sc_srom[20],
761 ETHER_ADDR_LEN);
762 }
763 } else {
764 /*
765 * We start out with the 2114x ISV media switch.
766 * When we search for quirks, we may change to
767 * a different switch.
768 */
769 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
770 }
771
772 /*
773 * Deal with any quirks this board might have.
774 */
775 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
776
777 /*
778 * Bail out now if we can't deal with this board.
779 */
780 if (sc->sc_mediasw == NULL)
781 goto cant_cope;
782 break;
783
784 case TULIP_CHIP_82C168:
785 case TULIP_CHIP_82C169:
786 /*
787 * Lite-On PNIC's Ethernet address is the first 6
788 * bytes of its EEPROM.
789 */
790 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
791
792 /*
793 * Lite-On PNICs always use the same mediasw; we
794 * select MII vs. internal NWAY automatically.
795 */
796 sc->sc_mediasw = &tlp_pnic_mediasw;
797 break;
798
799 case TULIP_CHIP_MX98713:
800 /*
801 * The Macronix MX98713 has an MII and GPIO, but no
802 * internal Nway block. This chip is basically a
803 * perfect 21140A clone, with the exception of the
804 * a magic register frobbing in order to make the
805 * interface function.
806 */
807 if (tlp_isv_srom_enaddr(sc, enaddr)) {
808 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
809 break;
810 }
811 /* FALLTHROUGH */
812
813 case TULIP_CHIP_82C115:
814 /*
815 * Yippee! The Lite-On 82C115 is a clone of
816 * the MX98725 (the data sheet even says `MXIC'
817 * on it)! Imagine that, a clone of a clone.
818 *
819 * The differences are really minimal:
820 *
821 * - Wake-On-LAN support
822 * - 128-bit multicast hash table, rather than
823 * the standard 512-bit hash table
824 */
825 /* FALLTHROUGH */
826
827 case TULIP_CHIP_MX98713A:
828 case TULIP_CHIP_MX98715A:
829 case TULIP_CHIP_MX98715AEC_X:
830 case TULIP_CHIP_MX98725:
831 /*
832 * The MX98713A has an MII as well as an internal Nway block,
833 * but no GPIO. The MX98715 and MX98725 have an internal
834 * Nway block only.
835 *
836 * The internal Nway block, unlike the Lite-On PNIC's, does
837 * just that - performs Nway. Once autonegotiation completes,
838 * we must program the GPR media information into the chip.
839 *
840 * The byte offset of the Ethernet address is stored at
841 * offset 0x70.
842 */
843 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
844 sc->sc_mediasw = &tlp_pmac_mediasw;
845 break;
846
847 case TULIP_CHIP_WB89C840F:
848 /*
849 * Winbond 89C840F's Ethernet address is the first
850 * 6 bytes of its EEPROM.
851 */
852 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
853
854 /*
855 * Winbond 89C840F has an MII attached to the SIO.
856 */
857 sc->sc_mediasw = &tlp_sio_mii_mediasw;
858 break;
859
860 case TULIP_CHIP_AL981:
861 /*
862 * The ADMtek AL981's Ethernet address is located
863 * at offset 8 of its EEPROM.
864 */
865 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
866
867 /*
868 * ADMtek AL981 has a built-in PHY accessed through
869 * special registers.
870 */
871 sc->sc_mediasw = &tlp_al981_mediasw;
872 break;
873
874 case TULIP_CHIP_AN983:
875 case TULIP_CHIP_AN985:
876 /*
877 * The ADMtek AN985's Ethernet address is located
878 * at offset 8 of its EEPROM.
879 */
880 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
881
882 /*
883 * The ADMtek AN985 can be configured in Single-Chip
884 * mode or MAC-only mode. Single-Chip uses the built-in
885 * PHY, MAC-only has an external PHY (usually HomePNA).
886 * The selection is based on an EEPROM setting, and both
887 * PHYs are accessed via MII attached to SIO.
888 *
889 * The AN985 "ghosts" the internal PHY onto all
890 * MII addresses, so we have to use a media init
891 * routine that limits the search.
892 * XXX How does this work with MAC-only mode?
893 */
894 sc->sc_mediasw = &tlp_an985_mediasw;
895 break;
896
897 case TULIP_CHIP_DM9102:
898 case TULIP_CHIP_DM9102A:
899 /*
900 * Some boards with the Davicom chip have an ISV
901 * SROM (mostly DM9102A boards -- trying to describe
902 * the HomePNA PHY, probably) although the data in
903 * them is generally wrong. Check for ISV format
904 * and grab the Ethernet address that way, and if
905 * that fails, fall back on grabbing it from an
906 * observed offset of 20 (which is where it would
907 * be in an ISV SROM anyhow, tho ISV can cope with
908 * multi-port boards).
909 */
910 if (!tlp_isv_srom_enaddr(sc, enaddr)) {
911 #ifdef __sparc__
912 if (!sc->sc_srom[20] && !sc->sc_srom[21] &&
913 !sc->sc_srom[22]) {
914 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr);
915 } else
916 #endif
917 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
918 }
919
920 /*
921 * Davicom chips all have an internal MII interface
922 * and a built-in PHY. DM9102A also has a an external
923 * MII interface, usually with a HomePNA PHY attached
924 * to it.
925 */
926 sc->sc_mediasw = &tlp_dm9102_mediasw;
927 break;
928
929 default:
930 cant_cope:
931 printf("%s: sorry, unable to handle your board\n",
932 sc->sc_dev.dv_xname);
933 return;
934 }
935
936 /*
937 * Handle shared interrupts.
938 */
939 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
940 if (psc->sc_master)
941 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
942 else {
943 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
944 TULIP_PCI_SLAVEINTR);
945 if (psc->sc_master == NULL)
946 psc->sc_master = psc;
947 }
948 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
949 psc, sc_intrq);
950 }
951
952 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
953 printf("%s: sharing interrupt with %s\n",
954 sc->sc_dev.dv_xname,
955 psc->sc_master->sc_tulip.sc_dev.dv_xname);
956 } else {
957 /*
958 * Map and establish our interrupt.
959 */
960 if (pci_intr_map(pa, &ih)) {
961 printf("%s: unable to map interrupt\n",
962 sc->sc_dev.dv_xname);
963 return;
964 }
965 intrstr = pci_intr_string(pc, ih);
966 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
967 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
968 tlp_pci_shared_intr : tlp_intr, sc);
969 if (psc->sc_ih == NULL) {
970 printf("%s: unable to establish interrupt",
971 sc->sc_dev.dv_xname);
972 if (intrstr != NULL)
973 printf(" at %s", intrstr);
974 printf("\n");
975 return;
976 }
977 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
978 intrstr);
979 }
980
981 /*
982 * Finish off the attach.
983 */
984 tlp_attach(sc, enaddr);
985 }
986
987 static int
988 tlp_pci_shared_intr(void *arg)
989 {
990 struct tulip_pci_softc *master = arg, *slave;
991 int rv = 0;
992
993 for (slave = LIST_FIRST(&master->sc_intrslaves);
994 slave != NULL;
995 slave = LIST_NEXT(slave, sc_intrq))
996 rv |= tlp_intr(&slave->sc_tulip);
997
998 return (rv);
999 }
1000
1001 static void
1002 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1003 {
1004 struct tulip_softc *sc = &psc->sc_tulip;
1005
1006 /*
1007 * This isn't really a quirk-gathering device, really. We
1008 * just want to get the spiffy DEC board name from the SROM.
1009 */
1010 strcpy(sc->sc_name, "DEC ");
1011
1012 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
1013 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
1014 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
1015 }
1016
1017 static void
1018 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1019 {
1020 struct tulip_softc *sc = &psc->sc_tulip;
1021 u_int16_t id = 0;
1022
1023 /*
1024 * If we have a slaved ROM, just copy the bits from the master.
1025 * This is in case we fail the ROM ID check (older boards) and
1026 * need to fall back on Ethernet address model checking; that
1027 * will fail for slave chips.
1028 */
1029 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
1030 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
1031 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
1032 psc->sc_flags |=
1033 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
1034 return;
1035 }
1036
1037 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
1038 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
1039 switch (id) {
1040 zx312:
1041 case 0x0602: /* ZX312 */
1042 strcpy(sc->sc_name, "ZNYX ZX312");
1043 return;
1044
1045 case 0x0622: /* ZX312T */
1046 strcpy(sc->sc_name, "ZNYX ZX312T");
1047 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1048 return;
1049
1050 zx314_inta:
1051 case 0x0701: /* ZX314 INTA */
1052 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1053 /* FALLTHROUGH */
1054 case 0x0711: /* ZX314 */
1055 strcpy(sc->sc_name, "ZNYX ZX314");
1056 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1057 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1058 return;
1059
1060 zx315_inta:
1061 case 0x0801: /* ZX315 INTA */
1062 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1063 /* FALLTHROUGH */
1064 case 0x0811: /* ZX315 */
1065 strcpy(sc->sc_name, "ZNYX ZX315");
1066 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1067 return;
1068
1069 default:
1070 id = 0;
1071 break;
1072 }
1073 }
1074
1075 /*
1076 * Deal with boards that have broken ROMs.
1077 */
1078 if (id == 0) {
1079 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1080 goto zx314_inta;
1081 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1082 goto zx315_inta;
1083 if ((enaddr[3] & ~3) == 0xec)
1084 goto zx312;
1085 }
1086
1087 strcpy(sc->sc_name, "ZNYX ZX31x");
1088 }
1089
1090 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *);
1091
1092 static void
1093 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1094 {
1095 struct tulip_softc *sc = &psc->sc_tulip;
1096 pcireg_t subid;
1097
1098 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG);
1099
1100 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX)
1101 return; /* ? */
1102
1103 switch (PCI_PRODUCT(subid) & 0xff) {
1104 /*
1105 * ZNYX 21143 boards with QS6611 PHY
1106 */
1107 case 0x12: /* ZX345Q */
1108 case 0x13: /* ZX346Q */
1109 case 0x14: /* ZX348Q */
1110 case 0x18: /* ZX414 */
1111 case 0x19: /* ZX412 */
1112 case 0x1a: /* ZX444 */
1113 case 0x1b: /* ZX442 */
1114 case 0x23: /* ZX212 */
1115 case 0x24: /* ZX214 */
1116 case 0x29: /* ZX374 */
1117 case 0x2d: /* ZX372 */
1118 case 0x2b: /* ZX244 */
1119 case 0x2c: /* ZX424 */
1120 case 0x2e: /* ZX422 */
1121 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname);
1122 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset;
1123 break;
1124 }
1125 }
1126
1127 static void
1128 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc)
1129 {
1130
1131 /*
1132 * Reset QS6611 PHY.
1133 */
1134 TULIP_WRITE(sc, CSR_SIAGEN,
1135 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16));
1136 delay(200);
1137 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16));
1138 delay(10000);
1139 }
1140
1141 static void
1142 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1143 {
1144 struct tulip_softc *sc = &psc->sc_tulip;
1145 u_int16_t id1, id2, ei;
1146 int auibnc = 0, utp = 0;
1147 char *cp;
1148
1149 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1150 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1151 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1152
1153 strcpy(sc->sc_name, "SMC 8432");
1154 cp = &sc->sc_name[8];
1155
1156 if ((id1 & 1) == 0) {
1157 *cp++ = 'B';
1158 auibnc = 1;
1159 }
1160 if ((id1 & 0xff) > 0x32) {
1161 *cp++ = 'T';
1162 utp = 1;
1163 }
1164 if ((id1 & 0x4000) == 0) {
1165 *cp++ = 'A';
1166 auibnc = 1;
1167 }
1168 if (id2 == 0x15) {
1169 sc->sc_name[7] = '4';
1170 *cp++ = '-';
1171 *cp++ = 'C';
1172 *cp++ = 'H';
1173 *cp++ = ei ? '2' : '1';
1174 }
1175 *cp = '\0';
1176
1177 if (utp != 0 && auibnc == 0)
1178 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1179 else if (utp == 0 && auibnc != 0)
1180 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1181 }
1182
1183 static void
1184 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1185 {
1186
1187 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1188 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1189 }
1190
1191 static void
1192 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1193 {
1194
1195 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1196 }
1197
1198 static void tlp_pci_asante_21140_reset(struct tulip_softc *);
1199
1200 static void
1201 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1202 {
1203 struct tulip_softc *sc = &psc->sc_tulip;
1204
1205 /*
1206 * Some Asante boards don't use the ISV SROM format. For
1207 * those that don't, we initialize the GPIO direction bits,
1208 * and provide our own reset hook, which resets the MII.
1209 *
1210 * All of these boards use SIO-attached-MII media.
1211 */
1212 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1213 return;
1214
1215 strcpy(sc->sc_name, "Asante");
1216
1217 sc->sc_gp_dir = 0xbf;
1218 sc->sc_reset = tlp_pci_asante_21140_reset;
1219 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1220 }
1221
1222 static void
1223 tlp_pci_asante_21140_reset(struct tulip_softc *sc)
1224 {
1225
1226 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1227 TULIP_WRITE(sc, CSR_GPP, 0x8);
1228 delay(100);
1229 TULIP_WRITE(sc, CSR_GPP, 0);
1230 }
1231
1232 /*
1233 * SMC 9332DST media switch.
1234 */
1235 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *);
1236
1237 static const struct tulip_mediasw tlp_smc9332dst_mediasw = {
1238 tlp_smc9332dst_tmsw_init,
1239 tlp_21140_gpio_get,
1240 tlp_21140_gpio_set
1241 };
1242
1243 static void
1244 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1245 {
1246 struct tulip_softc *sc = &psc->sc_tulip;
1247
1248 if (sc->sc_mediasw != NULL) {
1249 return;
1250 }
1251 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST");
1252 sc->sc_mediasw = &tlp_smc9332dst_mediasw;
1253 }
1254
1255 static void
1256 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc)
1257 {
1258 struct tulip_21x4x_media *tm;
1259 const char *sep = "";
1260 uint32_t reg;
1261 int i, cnt;
1262
1263 sc->sc_gp_dir = GPP_SMC9332DST_PINS;
1264 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1265 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1266
1267 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
1268 tlp_mediastatus);
1269 printf("%s: ", sc->sc_dev.dv_xname);
1270
1271 #define ADD(m, c) \
1272 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \
1273 tm->tm_opmode = (c); \
1274 tm->tm_gpdata = GPP_SMC9332DST_INIT; \
1275 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm)
1276 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
1277
1278 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM);
1279 PRINT("10baseT");
1280
1281 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
1282 OPMODE_TTM | OPMODE_FD);
1283 PRINT("10baseT-FDX");
1284
1285 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1286 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1287 PRINT("100baseTX");
1288
1289 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
1290 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1291 PRINT("100baseTX-FDX");
1292
1293 #undef ADD
1294 #undef PRINT
1295
1296 printf("\n");
1297
1298 tlp_reset(sc);
1299 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR);
1300 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1301 delay(10);
1302 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT);
1303 delay(200000);
1304 cnt = 0;
1305 for (i = 1000; i > 0; i--) {
1306 reg = TULIP_READ(sc, CSR_GPP);
1307 if ((~reg & (GPP_SMC9332DST_OK10 |
1308 GPP_SMC9332DST_OK100)) == 0) {
1309 if (cnt++ > 100) {
1310 break;
1311 }
1312 } else if ((reg & GPP_SMC9332DST_OK10) == 0) {
1313 break;
1314 } else {
1315 cnt = 0;
1316 }
1317 delay(1000);
1318 }
1319 if (cnt > 100) {
1320 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX);
1321 } else {
1322 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
1323 }
1324 }
1325
1326 static void
1327 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1328 {
1329 struct tulip_softc *sc = &psc->sc_tulip;
1330 char *p1 = (char *) &sc->sc_srom[32];
1331 char *p2 = &sc->sc_name[0];
1332
1333 do {
1334 if ((unsigned char) *p1 & 0x80)
1335 *p2++ = ' ';
1336 else
1337 *p2++ = *p1;
1338 } while (*p1++);
1339 }
1340
1341 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *);
1342
1343 static void
1344 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1345 {
1346 struct tulip_softc *sc = &psc->sc_tulip;
1347
1348 /*
1349 * Cobalt Networks interfaces are just MII-on-SIO.
1350 */
1351 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1352 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1353
1354 /*
1355 * The Cobalt systems tend to fall back to store-and-forward
1356 * pretty quickly, so we select that from the beginning to
1357 * avoid initial timeouts.
1358 */
1359 sc->sc_txthresh = TXTH_SF;
1360 }
1361
1362 static void
1363 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc)
1364 {
1365 /*
1366 * Reset PHY.
1367 */
1368 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1369 delay(10);
1370 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1371 delay(10);
1372 }
1373
1374 static void
1375 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1376 {
1377 struct tulip_softc *sc = &psc->sc_tulip;
1378
1379 /*
1380 * Algorithmics boards just have MII-on-SIO.
1381 *
1382 * XXX They also have AUI on the serial interface.
1383 * XXX Deal with this.
1384 */
1385 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1386 }
1387
1388 /*
1389 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch.
1390 */
1391 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *);
1392
1393 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = {
1394 tlp_cogent_em1x0_tmsw_init,
1395 tlp_21140_gpio_get,
1396 tlp_21140_gpio_set
1397 };
1398
1399 static void
1400 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr)
1401 {
1402 struct tulip_softc *sc = &psc->sc_tulip;
1403 uint8_t *srom = sc->sc_srom, id0;
1404 uint16_t id1, id2;
1405
1406 if (sc->sc_mediasw == NULL) {
1407 id0 = srom[32];
1408 switch (id0) {
1409 case 0x12:
1410 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX");
1411 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1412 break;
1413
1414 case 0x15:
1415 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX");
1416 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1417 break;
1418
1419 #if 0
1420 case XXX:
1421 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX");
1422 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1423 break;
1424 #endif
1425
1426 default:
1427 printf("%s: unknown Cogent board ID 0x%02x\n",
1428 sc->sc_dev.dv_xname, id0);
1429 }
1430 return;
1431 }
1432
1433 id1 = TULIP_ROM_GETW(srom, 0);
1434 id2 = TULIP_ROM_GETW(srom, 2);
1435 if (id1 != 0x1109) {
1436 goto unknown;
1437 }
1438
1439 switch (id2) {
1440 case 0x1900:
1441 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911");
1442 break;
1443
1444 case 0x2400:
1445 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A");
1446 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1447 break;
1448
1449 case 0x2b00:
1450 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A");
1451 break;
1452
1453 case 0x3000:
1454 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922");
1455 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1456 break;
1457
1458 default:
1459 unknown:
1460 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n",
1461 sc->sc_dev.dv_xname, id1, id2);
1462 }
1463 }
1464
1465 static void
1466 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc)
1467 {
1468 struct tulip_21x4x_media *tm;
1469 const char *sep = "";
1470
1471 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS;
1472 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1473 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1474
1475 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
1476 tlp_mediastatus);
1477 printf("%s: ", sc->sc_dev.dv_xname);
1478
1479 #define ADD(m, c) \
1480 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \
1481 tm->tm_opmode = (c); \
1482 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \
1483 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm)
1484 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
1485
1486 if (sc->sc_srom[32] == 0x15) {
1487 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0),
1488 OPMODE_PS | OPMODE_PCS);
1489 PRINT("100baseFX");
1490
1491 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1492 OPMODE_PS | OPMODE_PCS | OPMODE_FD);
1493 PRINT("100baseFX-FDX");
1494 printf("\n");
1495
1496 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX);
1497 } else {
1498 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1499 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1500 PRINT("100baseTX");
1501
1502 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1503 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1504 PRINT("100baseTX-FDX");
1505 printf("\n");
1506
1507 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX);
1508 }
1509
1510 #undef ADD
1511 #undef PRINT
1512 }
1513
1514 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *);
1515
1516 static void
1517 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc,
1518 const u_int8_t *enaddr)
1519 {
1520 struct tulip_softc *sc = &psc->sc_tulip;
1521
1522 /*
1523 * Netwinders just use MII-on_SIO.
1524 */
1525 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1526 sc->sc_reset = tlp_pci_netwinder_21142_reset;
1527 }
1528
1529 void
1530 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc)
1531 {
1532
1533 /*
1534 * Reset the PHY.
1535 */
1536 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16);
1537 delay(10);
1538 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16);
1539 delay(10);
1540 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16);
1541 delay(10);
1542 }
1543