if_tlp_pci.c revision 1.81
1 /* $NetBSD: if_tlp_pci.c,v 1.81 2005/07/17 00:44:13 rpaulo Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.81 2005/07/17 00:44:13 rpaulo Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const u_int8_t *); 182 u_int8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const u_int8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const u_int8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const u_int8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 204 const u_int8_t *); 205 206 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 210 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 211 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 212 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 213 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 218 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 219 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 220 { NULL, { 0, 0, 0 } } 221 }; 222 223 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 224 const u_int8_t *); 225 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 226 const u_int8_t *); 227 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 228 const u_int8_t *); 229 230 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 231 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 232 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 233 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 234 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 235 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 236 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 237 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 238 { NULL, { 0, 0, 0 } } 239 }; 240 241 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 245 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 248 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 249 { NULL, { 0, 0, 0 } } 250 }; 251 252 static int tlp_pci_shared_intr(void *); 253 254 static const struct tulip_pci_product * 255 tlp_pci_lookup(const struct pci_attach_args *pa) 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 static void 270 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 271 const struct tlp_pci_quirks *tpq) 272 { 273 274 for (; tpq->tpq_func != NULL; tpq++) { 275 if (tpq->tpq_oui[0] == enaddr[0] && 276 tpq->tpq_oui[1] == enaddr[1] && 277 tpq->tpq_oui[2] == enaddr[2]) { 278 (*tpq->tpq_func)(psc, enaddr); 279 return; 280 } 281 } 282 } 283 284 static void 285 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 286 { 287 extern struct cfdriver tlp_cd; 288 struct tulip_pci_softc *cur, *best = NULL; 289 struct tulip_softc *sc = &psc->sc_tulip; 290 int i; 291 292 /* 293 * First of all, find the lowest pcidev numbered device on our 294 * bus marked as shared. That should be our master. 295 */ 296 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 297 if ((cur = tlp_cd.cd_devs[i]) == NULL) 298 continue; 299 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 300 continue; 301 if ((cur->sc_flags & shared) == 0) 302 continue; 303 if (cur == psc) 304 continue; 305 if (best == NULL || 306 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 307 best = cur; 308 } 309 310 if (best != NULL) { 311 psc->sc_master = best; 312 psc->sc_flags |= (shared | slaved); 313 } 314 } 315 316 static int 317 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 318 { 319 struct pci_attach_args *pa = aux; 320 321 if (tlp_pci_lookup(pa) != NULL) 322 return (10); /* beat if_de.c */ 323 324 return (0); 325 } 326 327 static void 328 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 329 { 330 struct tulip_pci_softc *psc = (void *) self; 331 struct tulip_softc *sc = &psc->sc_tulip; 332 struct pci_attach_args *pa = aux; 333 pci_chipset_tag_t pc = pa->pa_pc; 334 pci_intr_handle_t ih; 335 const char *intrstr = NULL; 336 bus_space_tag_t iot, memt; 337 bus_space_handle_t ioh, memh; 338 int ioh_valid, memh_valid, i, j; 339 const struct tulip_pci_product *tpp; 340 u_int8_t enaddr[ETHER_ADDR_LEN]; 341 u_int32_t val = 0; 342 pcireg_t reg; 343 int pmreg; 344 345 sc->sc_devno = pa->pa_device; 346 psc->sc_pc = pa->pa_pc; 347 psc->sc_pcitag = pa->pa_tag; 348 349 LIST_INIT(&psc->sc_intrslaves); 350 351 tpp = tlp_pci_lookup(pa); 352 if (tpp == NULL) { 353 printf("\n"); 354 panic("tlp_pci_attach: impossible"); 355 } 356 sc->sc_chip = tpp->tpp_chip; 357 358 /* 359 * By default, Tulip registers are 8 bytes long (4 bytes 360 * followed by a 4 byte pad). 361 */ 362 sc->sc_regshift = 3; 363 364 /* 365 * No power management hooks. 366 * XXX Maybe we should add some! 367 */ 368 sc->sc_flags |= TULIPF_ENABLED; 369 370 /* 371 * Get revision info, and set some chip-specific variables. 372 */ 373 sc->sc_rev = PCI_REVISION(pa->pa_class); 374 switch (sc->sc_chip) { 375 case TULIP_CHIP_21140: 376 if (sc->sc_rev >= 0x20) 377 sc->sc_chip = TULIP_CHIP_21140A; 378 break; 379 380 case TULIP_CHIP_21142: 381 if (sc->sc_rev >= 0x20) 382 sc->sc_chip = TULIP_CHIP_21143; 383 break; 384 385 case TULIP_CHIP_82C168: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_82C169; 388 break; 389 390 case TULIP_CHIP_MX98713: 391 if (sc->sc_rev >= 0x10) 392 sc->sc_chip = TULIP_CHIP_MX98713A; 393 break; 394 395 case TULIP_CHIP_MX98715: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_MX98715A; 398 if (sc->sc_rev >= 0x25) 399 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 400 if (sc->sc_rev >= 0x30) 401 sc->sc_chip = TULIP_CHIP_MX98725; 402 break; 403 404 case TULIP_CHIP_WB89C840F: 405 sc->sc_regshift = 2; 406 break; 407 408 case TULIP_CHIP_AN985: 409 /* 410 * The AN983 and AN985 are very similar, and are 411 * differentiated by a "signature" register that 412 * is like, but not identical, to a PCI ID register. 413 */ 414 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 415 switch (reg) { 416 case 0x09811317: 417 sc->sc_chip = TULIP_CHIP_AN985; 418 break; 419 420 case 0x09851317: 421 sc->sc_chip = TULIP_CHIP_AN983; 422 break; 423 424 default: 425 /* Unknown -- use default. */ 426 break; 427 } 428 break; 429 430 case TULIP_CHIP_AX88140: 431 if (sc->sc_rev >= 0x10) 432 sc->sc_chip = TULIP_CHIP_AX88141; 433 break; 434 435 case TULIP_CHIP_DM9102: 436 if (sc->sc_rev >= 0x30) 437 sc->sc_chip = TULIP_CHIP_DM9102A; 438 break; 439 440 default: 441 /* Nothing. */ 442 break; 443 } 444 445 printf(": %s Ethernet, pass %d.%d\n", 446 tlp_chip_names[sc->sc_chip], 447 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 448 449 switch (sc->sc_chip) { 450 case TULIP_CHIP_21040: 451 if (sc->sc_rev < 0x20) { 452 printf("%s: 21040 must be at least pass 2.0\n", 453 sc->sc_dev.dv_xname); 454 return; 455 } 456 break; 457 458 case TULIP_CHIP_21140: 459 if (sc->sc_rev < 0x11) { 460 printf("%s: 21140 must be at least pass 1.1\n", 461 sc->sc_dev.dv_xname); 462 return; 463 } 464 break; 465 466 default: 467 /* Nothing. */ 468 break; 469 } 470 471 /* 472 * Check to see if the device is in power-save mode, and 473 * being it out if necessary. 474 */ 475 switch (sc->sc_chip) { 476 case TULIP_CHIP_21140: 477 case TULIP_CHIP_21140A: 478 case TULIP_CHIP_21142: 479 case TULIP_CHIP_21143: 480 case TULIP_CHIP_MX98713A: 481 case TULIP_CHIP_MX98715: 482 case TULIP_CHIP_MX98715A: 483 case TULIP_CHIP_MX98715AEC_X: 484 case TULIP_CHIP_MX98725: 485 case TULIP_CHIP_DM9102: 486 case TULIP_CHIP_DM9102A: 487 case TULIP_CHIP_AX88140: 488 case TULIP_CHIP_AX88141: 489 /* 490 * Clear the "sleep mode" bit in the CFDA register. 491 */ 492 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 493 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 494 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 495 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 496 break; 497 498 default: 499 /* Nothing. */ 500 break; 501 } 502 503 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 504 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 505 switch (reg & PCI_PMCSR_STATE_MASK) { 506 case PCI_PMCSR_STATE_D1: 507 case PCI_PMCSR_STATE_D2: 508 printf("%s: waking up from power state D%d\n%s", 509 sc->sc_dev.dv_xname, 510 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 511 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 512 (reg & ~PCI_PMCSR_STATE_MASK) | 513 PCI_PMCSR_STATE_D0); 514 break; 515 case PCI_PMCSR_STATE_D3: 516 /* 517 * The card has lost all configuration data in 518 * this state, so punt. 519 */ 520 printf("%s: unable to wake up from power state D3, " 521 "reboot required.\n", sc->sc_dev.dv_xname); 522 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 523 (reg & ~PCI_PMCSR_STATE_MASK) | 524 PCI_PMCSR_STATE_D0); 525 return; 526 } 527 } 528 529 /* 530 * Map the device. 531 */ 532 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 533 PCI_MAPREG_TYPE_IO, 0, 534 &iot, &ioh, NULL, NULL) == 0); 535 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 536 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 537 &memt, &memh, NULL, NULL) == 0); 538 539 if (memh_valid) { 540 sc->sc_st = memt; 541 sc->sc_sh = memh; 542 } else if (ioh_valid) { 543 sc->sc_st = iot; 544 sc->sc_sh = ioh; 545 } else { 546 printf("%s: unable to map device registers\n", 547 sc->sc_dev.dv_xname); 548 return; 549 } 550 551 sc->sc_dmat = pa->pa_dmat; 552 553 /* 554 * Make sure bus mastering is enabled. 555 */ 556 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 557 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 558 PCI_COMMAND_MASTER_ENABLE); 559 560 /* 561 * Get the cacheline size. 562 */ 563 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 564 PCI_BHLC_REG)); 565 566 /* 567 * Get PCI data moving command info. 568 */ 569 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 570 sc->sc_flags |= TULIPF_MRL; 571 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 572 sc->sc_flags |= TULIPF_MRM; 573 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 574 sc->sc_flags |= TULIPF_MWI; 575 576 /* 577 * Read the contents of the Ethernet Address ROM/SROM. 578 */ 579 switch (sc->sc_chip) { 580 case TULIP_CHIP_21040: 581 sc->sc_srom_addrbits = 6; 582 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 583 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 584 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 585 for (j = 0; j < 10000; j++) { 586 val = TULIP_READ(sc, CSR_MIIROM); 587 if ((val & MIIROM_DN) == 0) 588 break; 589 } 590 sc->sc_srom[i] = val & MIIROM_DATA; 591 } 592 break; 593 594 case TULIP_CHIP_82C168: 595 case TULIP_CHIP_82C169: 596 { 597 sc->sc_srom_addrbits = 2; 598 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 599 600 /* 601 * The Lite-On PNIC stores the Ethernet address in 602 * the first 3 words of the EEPROM. EEPROM access 603 * is not like the other Tulip chips. 604 */ 605 for (i = 0; i < 6; i += 2) { 606 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 607 PNIC_SROMCTL_READ | (i >> 1)); 608 for (j = 0; j < 500; j++) { 609 delay(2); 610 val = TULIP_READ(sc, CSR_MIIROM); 611 if ((val & PNIC_MIIROM_BUSY) == 0) 612 break; 613 } 614 if (val & PNIC_MIIROM_BUSY) { 615 printf("%s: EEPROM timed out\n", 616 sc->sc_dev.dv_xname); 617 return; 618 } 619 val &= PNIC_MIIROM_DATA; 620 sc->sc_srom[i] = val >> 8; 621 sc->sc_srom[i + 1] = val & 0xff; 622 } 623 break; 624 } 625 626 default: 627 #ifdef algor 628 /* 629 * XXX This should be done with device properties, but 630 * XXX we don't have those yet. 631 */ 632 if (algor_get_ethaddr(pa, NULL)) { 633 extern int tlp_srom_debug; 634 sc->sc_srom_addrbits = 6; 635 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 636 M_NOWAIT|M_ZERO); 637 algor_get_ethaddr(pa, sc->sc_srom); 638 if (tlp_srom_debug) { 639 printf("SROM CONTENTS:"); 640 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 641 if ((i % 8) == 0) 642 printf("\n\t"); 643 printf("0x%02x ", sc->sc_srom[i]); 644 } 645 printf("\n"); 646 } 647 break; 648 } 649 #endif /* algor */ 650 651 /* Check for a slaved ROM on a multi-port board. */ 652 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 653 TULIP_PCI_SLAVEROM); 654 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 655 sc->sc_srom_addrbits = 656 psc->sc_master->sc_tulip.sc_srom_addrbits; 657 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 658 enaddr[5] += 659 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 660 } 661 else if (tlp_read_srom(sc) == 0) 662 goto cant_cope; 663 break; 664 } 665 666 /* 667 * Deal with chip/board quirks. This includes setting up 668 * the mediasw, and extracting the Ethernet address from 669 * the rombuf. 670 */ 671 switch (sc->sc_chip) { 672 case TULIP_CHIP_21040: 673 /* 674 * Parse the Ethernet Address ROM. 675 */ 676 if (tlp_parse_old_srom(sc, enaddr) == 0) 677 goto cant_cope; 678 679 680 /* 681 * All 21040 boards start out with the same 682 * media switch. 683 */ 684 sc->sc_mediasw = &tlp_21040_mediasw; 685 686 /* 687 * Deal with any quirks this board might have. 688 */ 689 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 690 break; 691 692 case TULIP_CHIP_21041: 693 /* Check for new format SROM. */ 694 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 695 /* 696 * Not an ISV SROM; try the old DEC Ethernet Address 697 * ROM format. 698 */ 699 if (tlp_parse_old_srom(sc, enaddr) == 0) 700 goto cant_cope; 701 } 702 703 /* 704 * All 21041 boards use the same media switch; they all 705 * work basically the same! Yippee! 706 */ 707 sc->sc_mediasw = &tlp_21041_mediasw; 708 709 /* 710 * Deal with any quirks this board might have. 711 */ 712 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 713 break; 714 715 case TULIP_CHIP_21140: 716 case TULIP_CHIP_21140A: 717 /* Check for new format SROM. */ 718 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 719 /* 720 * Not an ISV SROM; try the old DEC Ethernet Address 721 * ROM format. 722 */ 723 if (tlp_parse_old_srom(sc, enaddr) == 0) 724 goto cant_cope; 725 } else { 726 /* 727 * We start out with the 2114x ISV media switch. 728 * When we search for quirks, we may change to 729 * a different switch. 730 */ 731 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 732 } 733 734 /* 735 * Deal with any quirks this board might have. 736 */ 737 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 738 739 /* 740 * Bail out now if we can't deal with this board. 741 */ 742 if (sc->sc_mediasw == NULL) 743 goto cant_cope; 744 break; 745 746 case TULIP_CHIP_21142: 747 case TULIP_CHIP_21143: 748 /* Check for new format SROM. */ 749 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 750 /* 751 * Not an ISV SROM; try the old DEC Ethernet Address 752 * ROM format. 753 */ 754 if (tlp_parse_old_srom(sc, enaddr) == 0) { 755 /* 756 * One last try: just copy the address 757 * from offset 20 and try to look 758 * up quirks. 759 */ 760 memcpy(enaddr, &sc->sc_srom[20], 761 ETHER_ADDR_LEN); 762 } 763 } else { 764 /* 765 * We start out with the 2114x ISV media switch. 766 * When we search for quirks, we may change to 767 * a different switch. 768 */ 769 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 770 } 771 772 /* 773 * Deal with any quirks this board might have. 774 */ 775 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 776 777 /* 778 * Bail out now if we can't deal with this board. 779 */ 780 if (sc->sc_mediasw == NULL) 781 goto cant_cope; 782 break; 783 784 case TULIP_CHIP_82C168: 785 case TULIP_CHIP_82C169: 786 /* 787 * Lite-On PNIC's Ethernet address is the first 6 788 * bytes of its EEPROM. 789 */ 790 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 791 792 /* 793 * Lite-On PNICs always use the same mediasw; we 794 * select MII vs. internal NWAY automatically. 795 */ 796 sc->sc_mediasw = &tlp_pnic_mediasw; 797 break; 798 799 case TULIP_CHIP_MX98713: 800 /* 801 * The Macronix MX98713 has an MII and GPIO, but no 802 * internal Nway block. This chip is basically a 803 * perfect 21140A clone, with the exception of the 804 * a magic register frobbing in order to make the 805 * interface function. 806 */ 807 if (tlp_isv_srom_enaddr(sc, enaddr)) { 808 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 809 break; 810 } 811 /* FALLTHROUGH */ 812 813 case TULIP_CHIP_82C115: 814 /* 815 * Yippee! The Lite-On 82C115 is a clone of 816 * the MX98725 (the data sheet even says `MXIC' 817 * on it)! Imagine that, a clone of a clone. 818 * 819 * The differences are really minimal: 820 * 821 * - Wake-On-LAN support 822 * - 128-bit multicast hash table, rather than 823 * the standard 512-bit hash table 824 */ 825 /* FALLTHROUGH */ 826 827 case TULIP_CHIP_MX98713A: 828 case TULIP_CHIP_MX98715A: 829 case TULIP_CHIP_MX98715AEC_X: 830 case TULIP_CHIP_MX98725: 831 /* 832 * The MX98713A has an MII as well as an internal Nway block, 833 * but no GPIO. The MX98715 and MX98725 have an internal 834 * Nway block only. 835 * 836 * The internal Nway block, unlike the Lite-On PNIC's, does 837 * just that - performs Nway. Once autonegotiation completes, 838 * we must program the GPR media information into the chip. 839 * 840 * The byte offset of the Ethernet address is stored at 841 * offset 0x70. 842 */ 843 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 844 sc->sc_mediasw = &tlp_pmac_mediasw; 845 break; 846 847 case TULIP_CHIP_WB89C840F: 848 /* 849 * Winbond 89C840F's Ethernet address is the first 850 * 6 bytes of its EEPROM. 851 */ 852 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 853 854 /* 855 * Winbond 89C840F has an MII attached to the SIO. 856 */ 857 sc->sc_mediasw = &tlp_sio_mii_mediasw; 858 break; 859 860 case TULIP_CHIP_AL981: 861 /* 862 * The ADMtek AL981's Ethernet address is located 863 * at offset 8 of its EEPROM. 864 */ 865 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 866 867 /* 868 * ADMtek AL981 has a built-in PHY accessed through 869 * special registers. 870 */ 871 sc->sc_mediasw = &tlp_al981_mediasw; 872 break; 873 874 case TULIP_CHIP_AN983: 875 case TULIP_CHIP_AN985: 876 /* 877 * The ADMtek AN985's Ethernet address is located 878 * at offset 8 of its EEPROM. 879 */ 880 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 881 882 /* 883 * The ADMtek AN985 can be configured in Single-Chip 884 * mode or MAC-only mode. Single-Chip uses the built-in 885 * PHY, MAC-only has an external PHY (usually HomePNA). 886 * The selection is based on an EEPROM setting, and both 887 * PHYs are accessed via MII attached to SIO. 888 * 889 * The AN985 "ghosts" the internal PHY onto all 890 * MII addresses, so we have to use a media init 891 * routine that limits the search. 892 * XXX How does this work with MAC-only mode? 893 */ 894 sc->sc_mediasw = &tlp_an985_mediasw; 895 break; 896 897 case TULIP_CHIP_DM9102: 898 case TULIP_CHIP_DM9102A: 899 /* 900 * Some boards with the Davicom chip have an ISV 901 * SROM (mostly DM9102A boards -- trying to describe 902 * the HomePNA PHY, probably) although the data in 903 * them is generally wrong. Check for ISV format 904 * and grab the Ethernet address that way, and if 905 * that fails, fall back on grabbing it from an 906 * observed offset of 20 (which is where it would 907 * be in an ISV SROM anyhow, tho ISV can cope with 908 * multi-port boards). 909 */ 910 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 911 #ifdef __sparc__ 912 if ((sc->sc_srom[20] == 0 && 913 sc->sc_srom[21] == 0 && 914 sc->sc_srom[22] == 0) || 915 (sc->sc_srom[20] == 0xff && 916 sc->sc_srom[21] == 0xff && 917 sc->sc_srom[22] == 0xff)) { 918 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 919 } else 920 #endif 921 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 922 } 923 924 /* 925 * Davicom chips all have an internal MII interface 926 * and a built-in PHY. DM9102A also has a an external 927 * MII interface, usually with a HomePNA PHY attached 928 * to it. 929 */ 930 sc->sc_mediasw = &tlp_dm9102_mediasw; 931 break; 932 933 case TULIP_CHIP_AX88140: 934 case TULIP_CHIP_AX88141: 935 /* 936 * ASIX AX88140/AX88141 Ethernet Address is located at offset 937 * 20 of the SROM. 938 */ 939 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 940 941 /* 942 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 943 * an external MII interface. 944 */ 945 sc->sc_mediasw = &tlp_asix_mediasw; 946 break; 947 948 default: 949 cant_cope: 950 printf("%s: sorry, unable to handle your board\n", 951 sc->sc_dev.dv_xname); 952 return; 953 } 954 955 /* 956 * Handle shared interrupts. 957 */ 958 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 959 if (psc->sc_master) 960 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 961 else { 962 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 963 TULIP_PCI_SLAVEINTR); 964 if (psc->sc_master == NULL) 965 psc->sc_master = psc; 966 } 967 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 968 psc, sc_intrq); 969 } 970 971 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 972 printf("%s: sharing interrupt with %s\n", 973 sc->sc_dev.dv_xname, 974 psc->sc_master->sc_tulip.sc_dev.dv_xname); 975 } else { 976 /* 977 * Map and establish our interrupt. 978 */ 979 if (pci_intr_map(pa, &ih)) { 980 printf("%s: unable to map interrupt\n", 981 sc->sc_dev.dv_xname); 982 return; 983 } 984 intrstr = pci_intr_string(pc, ih); 985 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 986 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 987 tlp_pci_shared_intr : tlp_intr, sc); 988 if (psc->sc_ih == NULL) { 989 printf("%s: unable to establish interrupt", 990 sc->sc_dev.dv_xname); 991 if (intrstr != NULL) 992 printf(" at %s", intrstr); 993 printf("\n"); 994 return; 995 } 996 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 997 intrstr); 998 } 999 1000 /* 1001 * Finish off the attach. 1002 */ 1003 tlp_attach(sc, enaddr); 1004 } 1005 1006 static int 1007 tlp_pci_shared_intr(void *arg) 1008 { 1009 struct tulip_pci_softc *master = arg, *slave; 1010 int rv = 0; 1011 1012 for (slave = LIST_FIRST(&master->sc_intrslaves); 1013 slave != NULL; 1014 slave = LIST_NEXT(slave, sc_intrq)) 1015 rv |= tlp_intr(&slave->sc_tulip); 1016 1017 return (rv); 1018 } 1019 1020 static void 1021 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1022 { 1023 struct tulip_softc *sc = &psc->sc_tulip; 1024 1025 /* 1026 * This isn't really a quirk-gathering device, really. We 1027 * just want to get the spiffy DEC board name from the SROM. 1028 */ 1029 strcpy(sc->sc_name, "DEC "); 1030 1031 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1032 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1033 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1034 else 1035 sc->sc_name[3] = '\0'; 1036 } 1037 1038 static void 1039 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1040 { 1041 struct tulip_softc *sc = &psc->sc_tulip; 1042 u_int16_t id = 0; 1043 1044 /* 1045 * If we have a slaved ROM, just copy the bits from the master. 1046 * This is in case we fail the ROM ID check (older boards) and 1047 * need to fall back on Ethernet address model checking; that 1048 * will fail for slave chips. 1049 */ 1050 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1051 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1052 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1053 psc->sc_flags |= 1054 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1055 return; 1056 } 1057 1058 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1059 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1060 switch (id) { 1061 zx312: 1062 case 0x0602: /* ZX312 */ 1063 strcpy(sc->sc_name, "ZNYX ZX312"); 1064 return; 1065 1066 case 0x0622: /* ZX312T */ 1067 strcpy(sc->sc_name, "ZNYX ZX312T"); 1068 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1069 return; 1070 1071 zx314_inta: 1072 case 0x0701: /* ZX314 INTA */ 1073 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1074 /* FALLTHROUGH */ 1075 case 0x0711: /* ZX314 */ 1076 strcpy(sc->sc_name, "ZNYX ZX314"); 1077 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1078 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1079 return; 1080 1081 zx315_inta: 1082 case 0x0801: /* ZX315 INTA */ 1083 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1084 /* FALLTHROUGH */ 1085 case 0x0811: /* ZX315 */ 1086 strcpy(sc->sc_name, "ZNYX ZX315"); 1087 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1088 return; 1089 1090 default: 1091 id = 0; 1092 break; 1093 } 1094 } 1095 1096 /* 1097 * Deal with boards that have broken ROMs. 1098 */ 1099 if (id == 0) { 1100 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1101 goto zx314_inta; 1102 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1103 goto zx315_inta; 1104 if ((enaddr[3] & ~3) == 0xec) 1105 goto zx312; 1106 } 1107 1108 strcpy(sc->sc_name, "ZNYX ZX31x"); 1109 } 1110 1111 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1112 1113 static void 1114 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1115 { 1116 struct tulip_softc *sc = &psc->sc_tulip; 1117 pcireg_t subid; 1118 1119 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1120 1121 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1122 return; /* ? */ 1123 1124 switch (PCI_PRODUCT(subid) & 0xff) { 1125 /* 1126 * ZNYX 21143 boards with QS6611 PHY 1127 */ 1128 case 0x12: /* ZX345Q */ 1129 case 0x13: /* ZX346Q */ 1130 case 0x14: /* ZX348Q */ 1131 case 0x18: /* ZX414 */ 1132 case 0x19: /* ZX412 */ 1133 case 0x1a: /* ZX444 */ 1134 case 0x1b: /* ZX442 */ 1135 case 0x23: /* ZX212 */ 1136 case 0x24: /* ZX214 */ 1137 case 0x29: /* ZX374 */ 1138 case 0x2d: /* ZX372 */ 1139 case 0x2b: /* ZX244 */ 1140 case 0x2c: /* ZX424 */ 1141 case 0x2e: /* ZX422 */ 1142 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1143 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1144 break; 1145 } 1146 } 1147 1148 static void 1149 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1150 { 1151 1152 /* 1153 * Reset QS6611 PHY. 1154 */ 1155 TULIP_WRITE(sc, CSR_SIAGEN, 1156 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1157 delay(200); 1158 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1159 delay(10000); 1160 } 1161 1162 static void 1163 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1164 { 1165 struct tulip_softc *sc = &psc->sc_tulip; 1166 u_int16_t id1, id2, ei; 1167 int auibnc = 0, utp = 0; 1168 char *cp; 1169 1170 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1171 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1172 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1173 1174 strcpy(sc->sc_name, "SMC 8432"); 1175 cp = &sc->sc_name[8]; 1176 1177 if ((id1 & 1) == 0) { 1178 *cp++ = 'B'; 1179 auibnc = 1; 1180 } 1181 if ((id1 & 0xff) > 0x32) { 1182 *cp++ = 'T'; 1183 utp = 1; 1184 } 1185 if ((id1 & 0x4000) == 0) { 1186 *cp++ = 'A'; 1187 auibnc = 1; 1188 } 1189 if (id2 == 0x15) { 1190 sc->sc_name[7] = '4'; 1191 *cp++ = '-'; 1192 *cp++ = 'C'; 1193 *cp++ = 'H'; 1194 *cp++ = ei ? '2' : '1'; 1195 } 1196 *cp = '\0'; 1197 1198 if (utp != 0 && auibnc == 0) 1199 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1200 else if (utp == 0 && auibnc != 0) 1201 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1202 } 1203 1204 static void 1205 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1206 { 1207 1208 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1209 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1210 } 1211 1212 static void 1213 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1214 { 1215 1216 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1217 } 1218 1219 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1220 1221 static void 1222 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1223 { 1224 struct tulip_softc *sc = &psc->sc_tulip; 1225 1226 /* 1227 * Some Asante boards don't use the ISV SROM format. For 1228 * those that don't, we initialize the GPIO direction bits, 1229 * and provide our own reset hook, which resets the MII. 1230 * 1231 * All of these boards use SIO-attached-MII media. 1232 */ 1233 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1234 return; 1235 1236 strcpy(sc->sc_name, "Asante"); 1237 1238 sc->sc_gp_dir = 0xbf; 1239 sc->sc_reset = tlp_pci_asante_21140_reset; 1240 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1241 } 1242 1243 static void 1244 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1245 { 1246 1247 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1248 TULIP_WRITE(sc, CSR_GPP, 0x8); 1249 delay(100); 1250 TULIP_WRITE(sc, CSR_GPP, 0); 1251 } 1252 1253 /* 1254 * SMC 9332DST media switch. 1255 */ 1256 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1257 1258 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1259 tlp_smc9332dst_tmsw_init, 1260 tlp_21140_gpio_get, 1261 tlp_21140_gpio_set 1262 }; 1263 1264 static void 1265 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1266 { 1267 struct tulip_softc *sc = &psc->sc_tulip; 1268 1269 if (sc->sc_mediasw != NULL) { 1270 return; 1271 } 1272 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1273 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1274 } 1275 1276 static void 1277 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1278 { 1279 struct tulip_21x4x_media *tm; 1280 const char *sep = ""; 1281 uint32_t reg; 1282 int i, cnt; 1283 1284 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1285 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1286 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1287 1288 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1289 tlp_mediastatus); 1290 printf("%s: ", sc->sc_dev.dv_xname); 1291 1292 #define ADD(m, c) \ 1293 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1294 tm->tm_opmode = (c); \ 1295 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1296 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1297 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1298 1299 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1300 PRINT("10baseT"); 1301 1302 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1303 OPMODE_TTM | OPMODE_FD); 1304 PRINT("10baseT-FDX"); 1305 1306 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1307 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1308 PRINT("100baseTX"); 1309 1310 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1311 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1312 PRINT("100baseTX-FDX"); 1313 1314 #undef ADD 1315 #undef PRINT 1316 1317 printf("\n"); 1318 1319 tlp_reset(sc); 1320 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1321 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1322 delay(10); 1323 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1324 delay(200000); 1325 cnt = 0; 1326 for (i = 1000; i > 0; i--) { 1327 reg = TULIP_READ(sc, CSR_GPP); 1328 if ((~reg & (GPP_SMC9332DST_OK10 | 1329 GPP_SMC9332DST_OK100)) == 0) { 1330 if (cnt++ > 100) { 1331 break; 1332 } 1333 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1334 break; 1335 } else { 1336 cnt = 0; 1337 } 1338 delay(1000); 1339 } 1340 if (cnt > 100) { 1341 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1342 } else { 1343 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1344 } 1345 } 1346 1347 static void 1348 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1349 { 1350 struct tulip_softc *sc = &psc->sc_tulip; 1351 char *p1 = (char *) &sc->sc_srom[32]; 1352 char *p2 = &sc->sc_name[0]; 1353 1354 do { 1355 if ((unsigned char) *p1 & 0x80) 1356 *p2++ = ' '; 1357 else 1358 *p2++ = *p1; 1359 } while (*p1++); 1360 } 1361 1362 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1363 1364 static void 1365 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1366 { 1367 struct tulip_softc *sc = &psc->sc_tulip; 1368 1369 /* 1370 * Cobalt Networks interfaces are just MII-on-SIO. 1371 */ 1372 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1373 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1374 1375 /* 1376 * The Cobalt systems tend to fall back to store-and-forward 1377 * pretty quickly, so we select that from the beginning to 1378 * avoid initial timeouts. 1379 */ 1380 sc->sc_txthresh = TXTH_SF; 1381 } 1382 1383 static void 1384 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1385 { 1386 /* 1387 * Reset PHY. 1388 */ 1389 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1390 delay(10); 1391 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1392 delay(10); 1393 } 1394 1395 static void 1396 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1397 { 1398 struct tulip_softc *sc = &psc->sc_tulip; 1399 1400 /* 1401 * Algorithmics boards just have MII-on-SIO. 1402 * 1403 * XXX They also have AUI on the serial interface. 1404 * XXX Deal with this. 1405 */ 1406 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1407 } 1408 1409 /* 1410 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1411 */ 1412 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1413 1414 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1415 tlp_cogent_em1x0_tmsw_init, 1416 tlp_21140_gpio_get, 1417 tlp_21140_gpio_set 1418 }; 1419 1420 static void 1421 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1422 { 1423 struct tulip_softc *sc = &psc->sc_tulip; 1424 uint8_t *srom = sc->sc_srom, id0; 1425 uint16_t id1, id2; 1426 1427 if (sc->sc_mediasw == NULL) { 1428 id0 = srom[32]; 1429 switch (id0) { 1430 case 0x12: 1431 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1432 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1433 break; 1434 1435 case 0x15: 1436 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1437 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1438 break; 1439 1440 #if 0 1441 case XXX: 1442 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1443 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1444 break; 1445 #endif 1446 1447 default: 1448 printf("%s: unknown Cogent board ID 0x%02x\n", 1449 sc->sc_dev.dv_xname, id0); 1450 } 1451 return; 1452 } 1453 1454 id1 = TULIP_ROM_GETW(srom, 0); 1455 id2 = TULIP_ROM_GETW(srom, 2); 1456 if (id1 != 0x1109) { 1457 goto unknown; 1458 } 1459 1460 switch (id2) { 1461 case 0x1900: 1462 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1463 break; 1464 1465 case 0x2400: 1466 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1467 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1468 break; 1469 1470 case 0x2b00: 1471 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1472 break; 1473 1474 case 0x3000: 1475 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1476 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1477 break; 1478 1479 default: 1480 unknown: 1481 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1482 sc->sc_dev.dv_xname, id1, id2); 1483 } 1484 } 1485 1486 static void 1487 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1488 { 1489 struct tulip_21x4x_media *tm; 1490 const char *sep = ""; 1491 1492 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1493 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1494 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1495 1496 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1497 tlp_mediastatus); 1498 printf("%s: ", sc->sc_dev.dv_xname); 1499 1500 #define ADD(m, c) \ 1501 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1502 tm->tm_opmode = (c); \ 1503 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1504 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1505 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1506 1507 if (sc->sc_srom[32] == 0x15) { 1508 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1509 OPMODE_PS | OPMODE_PCS); 1510 PRINT("100baseFX"); 1511 1512 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1513 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1514 PRINT("100baseFX-FDX"); 1515 printf("\n"); 1516 1517 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1518 } else { 1519 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1520 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1521 PRINT("100baseTX"); 1522 1523 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1524 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1525 PRINT("100baseTX-FDX"); 1526 printf("\n"); 1527 1528 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1529 } 1530 1531 #undef ADD 1532 #undef PRINT 1533 } 1534 1535 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1536 1537 static void 1538 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1539 const u_int8_t *enaddr) 1540 { 1541 struct tulip_softc *sc = &psc->sc_tulip; 1542 1543 /* 1544 * Netwinders just use MII-on_SIO. 1545 */ 1546 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1547 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1548 } 1549 1550 void 1551 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1552 { 1553 1554 /* 1555 * Reset the PHY. 1556 */ 1557 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1558 delay(10); 1559 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1560 delay(10); 1561 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1562 delay(10); 1563 } 1564
Indexes created Sat Sep 20 22:09:52 GMT 2025