if_tlp_pci.c revision 1.83
1 /* $NetBSD: if_tlp_pci.c,v 1.83 2005/12/06 15:40:16 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.83 2005/12/06 15:40:16 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const u_int8_t *); 182 u_int8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const u_int8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const u_int8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const u_int8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 204 const u_int8_t *); 205 206 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 210 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 211 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 212 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 213 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 218 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 219 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 220 { NULL, { 0, 0, 0 } } 221 }; 222 223 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 224 const u_int8_t *); 225 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 226 const u_int8_t *); 227 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 228 const u_int8_t *); 229 230 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 231 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 232 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 233 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 234 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 235 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 236 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 237 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 238 { NULL, { 0, 0, 0 } } 239 }; 240 241 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 245 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 248 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 249 { NULL, { 0, 0, 0 } } 250 }; 251 252 static int tlp_pci_shared_intr(void *); 253 254 static const struct tulip_pci_product * 255 tlp_pci_lookup(const struct pci_attach_args *pa) 256 { 257 const struct tulip_pci_product *tpp; 258 259 /* Don't match lmc cards */ 260 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 261 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 262 return 0; 263 264 for (tpp = tlp_pci_products; 265 tlp_chip_names[tpp->tpp_chip] != NULL; 266 tpp++) { 267 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 268 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 269 return (tpp); 270 } 271 return (NULL); 272 } 273 274 static void 275 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 276 const struct tlp_pci_quirks *tpq) 277 { 278 279 for (; tpq->tpq_func != NULL; tpq++) { 280 if (tpq->tpq_oui[0] == enaddr[0] && 281 tpq->tpq_oui[1] == enaddr[1] && 282 tpq->tpq_oui[2] == enaddr[2]) { 283 (*tpq->tpq_func)(psc, enaddr); 284 return; 285 } 286 } 287 } 288 289 static void 290 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 291 { 292 extern struct cfdriver tlp_cd; 293 struct tulip_pci_softc *cur, *best = NULL; 294 struct tulip_softc *sc = &psc->sc_tulip; 295 int i; 296 297 /* 298 * First of all, find the lowest pcidev numbered device on our 299 * bus marked as shared. That should be our master. 300 */ 301 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 302 if ((cur = tlp_cd.cd_devs[i]) == NULL) 303 continue; 304 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 305 continue; 306 if ((cur->sc_flags & shared) == 0) 307 continue; 308 if (cur == psc) 309 continue; 310 if (best == NULL || 311 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 312 best = cur; 313 } 314 315 if (best != NULL) { 316 psc->sc_master = best; 317 psc->sc_flags |= (shared | slaved); 318 } 319 } 320 321 static int 322 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 323 { 324 struct pci_attach_args *pa = aux; 325 326 if (tlp_pci_lookup(pa) != NULL) 327 return (10); /* beat if_de.c */ 328 329 return (0); 330 } 331 332 static void 333 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 334 { 335 struct tulip_pci_softc *psc = (void *) self; 336 struct tulip_softc *sc = &psc->sc_tulip; 337 struct pci_attach_args *pa = aux; 338 pci_chipset_tag_t pc = pa->pa_pc; 339 pci_intr_handle_t ih; 340 const char *intrstr = NULL; 341 bus_space_tag_t iot, memt; 342 bus_space_handle_t ioh, memh; 343 int ioh_valid, memh_valid, i, j; 344 const struct tulip_pci_product *tpp; 345 u_int8_t enaddr[ETHER_ADDR_LEN]; 346 u_int32_t val = 0; 347 pcireg_t reg; 348 int pmreg; 349 350 sc->sc_devno = pa->pa_device; 351 psc->sc_pc = pa->pa_pc; 352 psc->sc_pcitag = pa->pa_tag; 353 354 LIST_INIT(&psc->sc_intrslaves); 355 356 tpp = tlp_pci_lookup(pa); 357 if (tpp == NULL) { 358 printf("\n"); 359 panic("tlp_pci_attach: impossible"); 360 } 361 sc->sc_chip = tpp->tpp_chip; 362 363 /* 364 * By default, Tulip registers are 8 bytes long (4 bytes 365 * followed by a 4 byte pad). 366 */ 367 sc->sc_regshift = 3; 368 369 /* 370 * No power management hooks. 371 * XXX Maybe we should add some! 372 */ 373 sc->sc_flags |= TULIPF_ENABLED; 374 375 /* 376 * Get revision info, and set some chip-specific variables. 377 */ 378 sc->sc_rev = PCI_REVISION(pa->pa_class); 379 switch (sc->sc_chip) { 380 case TULIP_CHIP_21140: 381 if (sc->sc_rev >= 0x20) 382 sc->sc_chip = TULIP_CHIP_21140A; 383 break; 384 385 case TULIP_CHIP_21142: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_21143; 388 break; 389 390 case TULIP_CHIP_82C168: 391 if (sc->sc_rev >= 0x20) 392 sc->sc_chip = TULIP_CHIP_82C169; 393 break; 394 395 case TULIP_CHIP_MX98713: 396 if (sc->sc_rev >= 0x10) 397 sc->sc_chip = TULIP_CHIP_MX98713A; 398 break; 399 400 case TULIP_CHIP_MX98715: 401 if (sc->sc_rev >= 0x20) 402 sc->sc_chip = TULIP_CHIP_MX98715A; 403 if (sc->sc_rev >= 0x25) 404 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 405 if (sc->sc_rev >= 0x30) 406 sc->sc_chip = TULIP_CHIP_MX98725; 407 break; 408 409 case TULIP_CHIP_WB89C840F: 410 sc->sc_regshift = 2; 411 break; 412 413 case TULIP_CHIP_AN985: 414 /* 415 * The AN983 and AN985 are very similar, and are 416 * differentiated by a "signature" register that 417 * is like, but not identical, to a PCI ID register. 418 */ 419 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 420 switch (reg) { 421 case 0x09811317: 422 sc->sc_chip = TULIP_CHIP_AN985; 423 break; 424 425 case 0x09851317: 426 sc->sc_chip = TULIP_CHIP_AN983; 427 break; 428 429 default: 430 /* Unknown -- use default. */ 431 break; 432 } 433 break; 434 435 case TULIP_CHIP_AX88140: 436 if (sc->sc_rev >= 0x10) 437 sc->sc_chip = TULIP_CHIP_AX88141; 438 break; 439 440 case TULIP_CHIP_DM9102: 441 if (sc->sc_rev >= 0x30) 442 sc->sc_chip = TULIP_CHIP_DM9102A; 443 break; 444 445 default: 446 /* Nothing. */ 447 break; 448 } 449 450 printf(": %s Ethernet, pass %d.%d\n", 451 tlp_chip_names[sc->sc_chip], 452 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 453 454 switch (sc->sc_chip) { 455 case TULIP_CHIP_21040: 456 if (sc->sc_rev < 0x20) { 457 printf("%s: 21040 must be at least pass 2.0\n", 458 sc->sc_dev.dv_xname); 459 return; 460 } 461 break; 462 463 case TULIP_CHIP_21140: 464 if (sc->sc_rev < 0x11) { 465 printf("%s: 21140 must be at least pass 1.1\n", 466 sc->sc_dev.dv_xname); 467 return; 468 } 469 break; 470 471 default: 472 /* Nothing. */ 473 break; 474 } 475 476 /* 477 * Check to see if the device is in power-save mode, and 478 * being it out if necessary. 479 */ 480 switch (sc->sc_chip) { 481 case TULIP_CHIP_21140: 482 case TULIP_CHIP_21140A: 483 case TULIP_CHIP_21142: 484 case TULIP_CHIP_21143: 485 case TULIP_CHIP_MX98713A: 486 case TULIP_CHIP_MX98715: 487 case TULIP_CHIP_MX98715A: 488 case TULIP_CHIP_MX98715AEC_X: 489 case TULIP_CHIP_MX98725: 490 case TULIP_CHIP_DM9102: 491 case TULIP_CHIP_DM9102A: 492 case TULIP_CHIP_AX88140: 493 case TULIP_CHIP_AX88141: 494 /* 495 * Clear the "sleep mode" bit in the CFDA register. 496 */ 497 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 498 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 499 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 500 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 501 break; 502 503 default: 504 /* Nothing. */ 505 break; 506 } 507 508 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 509 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 510 switch (reg & PCI_PMCSR_STATE_MASK) { 511 case PCI_PMCSR_STATE_D1: 512 case PCI_PMCSR_STATE_D2: 513 printf("%s: waking up from power state D%d\n%s", 514 sc->sc_dev.dv_xname, 515 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 516 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 517 (reg & ~PCI_PMCSR_STATE_MASK) | 518 PCI_PMCSR_STATE_D0); 519 break; 520 case PCI_PMCSR_STATE_D3: 521 /* 522 * The card has lost all configuration data in 523 * this state, so punt. 524 */ 525 printf("%s: unable to wake up from power state D3, " 526 "reboot required.\n", sc->sc_dev.dv_xname); 527 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 528 (reg & ~PCI_PMCSR_STATE_MASK) | 529 PCI_PMCSR_STATE_D0); 530 return; 531 } 532 } 533 534 /* 535 * Map the device. 536 */ 537 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 538 PCI_MAPREG_TYPE_IO, 0, 539 &iot, &ioh, NULL, NULL) == 0); 540 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 541 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 542 &memt, &memh, NULL, NULL) == 0); 543 544 if (memh_valid) { 545 sc->sc_st = memt; 546 sc->sc_sh = memh; 547 } else if (ioh_valid) { 548 sc->sc_st = iot; 549 sc->sc_sh = ioh; 550 } else { 551 printf("%s: unable to map device registers\n", 552 sc->sc_dev.dv_xname); 553 return; 554 } 555 556 sc->sc_dmat = pa->pa_dmat; 557 558 /* 559 * Make sure bus mastering is enabled. 560 */ 561 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 562 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 563 PCI_COMMAND_MASTER_ENABLE); 564 565 /* 566 * Get the cacheline size. 567 */ 568 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 569 PCI_BHLC_REG)); 570 571 /* 572 * Get PCI data moving command info. 573 */ 574 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 575 sc->sc_flags |= TULIPF_MRL; 576 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 577 sc->sc_flags |= TULIPF_MRM; 578 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 579 sc->sc_flags |= TULIPF_MWI; 580 581 /* 582 * Read the contents of the Ethernet Address ROM/SROM. 583 */ 584 switch (sc->sc_chip) { 585 case TULIP_CHIP_21040: 586 sc->sc_srom_addrbits = 6; 587 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 588 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 589 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 590 for (j = 0; j < 10000; j++) { 591 val = TULIP_READ(sc, CSR_MIIROM); 592 if ((val & MIIROM_DN) == 0) 593 break; 594 } 595 sc->sc_srom[i] = val & MIIROM_DATA; 596 } 597 break; 598 599 case TULIP_CHIP_82C168: 600 case TULIP_CHIP_82C169: 601 { 602 sc->sc_srom_addrbits = 2; 603 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 604 605 /* 606 * The Lite-On PNIC stores the Ethernet address in 607 * the first 3 words of the EEPROM. EEPROM access 608 * is not like the other Tulip chips. 609 */ 610 for (i = 0; i < 6; i += 2) { 611 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 612 PNIC_SROMCTL_READ | (i >> 1)); 613 for (j = 0; j < 500; j++) { 614 delay(2); 615 val = TULIP_READ(sc, CSR_MIIROM); 616 if ((val & PNIC_MIIROM_BUSY) == 0) 617 break; 618 } 619 if (val & PNIC_MIIROM_BUSY) { 620 printf("%s: EEPROM timed out\n", 621 sc->sc_dev.dv_xname); 622 return; 623 } 624 val &= PNIC_MIIROM_DATA; 625 sc->sc_srom[i] = val >> 8; 626 sc->sc_srom[i + 1] = val & 0xff; 627 } 628 break; 629 } 630 631 default: 632 #ifdef algor 633 /* 634 * XXX This should be done with device properties, but 635 * XXX we don't have those yet. 636 */ 637 if (algor_get_ethaddr(pa, NULL)) { 638 extern int tlp_srom_debug; 639 sc->sc_srom_addrbits = 6; 640 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 641 M_NOWAIT|M_ZERO); 642 algor_get_ethaddr(pa, sc->sc_srom); 643 if (tlp_srom_debug) { 644 printf("SROM CONTENTS:"); 645 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 646 if ((i % 8) == 0) 647 printf("\n\t"); 648 printf("0x%02x ", sc->sc_srom[i]); 649 } 650 printf("\n"); 651 } 652 break; 653 } 654 #endif /* algor */ 655 656 /* Check for a slaved ROM on a multi-port board. */ 657 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 658 TULIP_PCI_SLAVEROM); 659 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 660 sc->sc_srom_addrbits = 661 psc->sc_master->sc_tulip.sc_srom_addrbits; 662 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 663 enaddr[5] += 664 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 665 } 666 else if (tlp_read_srom(sc) == 0) 667 goto cant_cope; 668 break; 669 } 670 671 /* 672 * Deal with chip/board quirks. This includes setting up 673 * the mediasw, and extracting the Ethernet address from 674 * the rombuf. 675 */ 676 switch (sc->sc_chip) { 677 case TULIP_CHIP_21040: 678 /* 679 * Parse the Ethernet Address ROM. 680 */ 681 if (tlp_parse_old_srom(sc, enaddr) == 0) 682 goto cant_cope; 683 684 685 /* 686 * All 21040 boards start out with the same 687 * media switch. 688 */ 689 sc->sc_mediasw = &tlp_21040_mediasw; 690 691 /* 692 * Deal with any quirks this board might have. 693 */ 694 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 695 break; 696 697 case TULIP_CHIP_21041: 698 /* Check for new format SROM. */ 699 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 700 /* 701 * Not an ISV SROM; try the old DEC Ethernet Address 702 * ROM format. 703 */ 704 if (tlp_parse_old_srom(sc, enaddr) == 0) 705 goto cant_cope; 706 } 707 708 /* 709 * All 21041 boards use the same media switch; they all 710 * work basically the same! Yippee! 711 */ 712 sc->sc_mediasw = &tlp_21041_mediasw; 713 714 /* 715 * Deal with any quirks this board might have. 716 */ 717 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 718 break; 719 720 case TULIP_CHIP_21140: 721 case TULIP_CHIP_21140A: 722 /* Check for new format SROM. */ 723 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 724 /* 725 * Not an ISV SROM; try the old DEC Ethernet Address 726 * ROM format. 727 */ 728 if (tlp_parse_old_srom(sc, enaddr) == 0) 729 goto cant_cope; 730 } else { 731 /* 732 * We start out with the 2114x ISV media switch. 733 * When we search for quirks, we may change to 734 * a different switch. 735 */ 736 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 737 } 738 739 /* 740 * Deal with any quirks this board might have. 741 */ 742 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 743 744 /* 745 * Bail out now if we can't deal with this board. 746 */ 747 if (sc->sc_mediasw == NULL) 748 goto cant_cope; 749 break; 750 751 case TULIP_CHIP_21142: 752 case TULIP_CHIP_21143: 753 /* Check for new format SROM. */ 754 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 755 /* 756 * Not an ISV SROM; try the old DEC Ethernet Address 757 * ROM format. 758 */ 759 if (tlp_parse_old_srom(sc, enaddr) == 0) { 760 /* 761 * One last try: just copy the address 762 * from offset 20 and try to look 763 * up quirks. 764 */ 765 memcpy(enaddr, &sc->sc_srom[20], 766 ETHER_ADDR_LEN); 767 } 768 } else { 769 /* 770 * We start out with the 2114x ISV media switch. 771 * When we search for quirks, we may change to 772 * a different switch. 773 */ 774 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 775 } 776 777 /* 778 * Deal with any quirks this board might have. 779 */ 780 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 781 782 /* 783 * Bail out now if we can't deal with this board. 784 */ 785 if (sc->sc_mediasw == NULL) 786 goto cant_cope; 787 break; 788 789 case TULIP_CHIP_82C168: 790 case TULIP_CHIP_82C169: 791 /* 792 * Lite-On PNIC's Ethernet address is the first 6 793 * bytes of its EEPROM. 794 */ 795 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 796 797 /* 798 * Lite-On PNICs always use the same mediasw; we 799 * select MII vs. internal NWAY automatically. 800 */ 801 sc->sc_mediasw = &tlp_pnic_mediasw; 802 break; 803 804 case TULIP_CHIP_MX98713: 805 /* 806 * The Macronix MX98713 has an MII and GPIO, but no 807 * internal Nway block. This chip is basically a 808 * perfect 21140A clone, with the exception of the 809 * a magic register frobbing in order to make the 810 * interface function. 811 */ 812 if (tlp_isv_srom_enaddr(sc, enaddr)) { 813 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 814 break; 815 } 816 /* FALLTHROUGH */ 817 818 case TULIP_CHIP_82C115: 819 /* 820 * Yippee! The Lite-On 82C115 is a clone of 821 * the MX98725 (the data sheet even says `MXIC' 822 * on it)! Imagine that, a clone of a clone. 823 * 824 * The differences are really minimal: 825 * 826 * - Wake-On-LAN support 827 * - 128-bit multicast hash table, rather than 828 * the standard 512-bit hash table 829 */ 830 /* FALLTHROUGH */ 831 832 case TULIP_CHIP_MX98713A: 833 case TULIP_CHIP_MX98715A: 834 case TULIP_CHIP_MX98715AEC_X: 835 case TULIP_CHIP_MX98725: 836 /* 837 * The MX98713A has an MII as well as an internal Nway block, 838 * but no GPIO. The MX98715 and MX98725 have an internal 839 * Nway block only. 840 * 841 * The internal Nway block, unlike the Lite-On PNIC's, does 842 * just that - performs Nway. Once autonegotiation completes, 843 * we must program the GPR media information into the chip. 844 * 845 * The byte offset of the Ethernet address is stored at 846 * offset 0x70. 847 */ 848 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 849 sc->sc_mediasw = &tlp_pmac_mediasw; 850 break; 851 852 case TULIP_CHIP_WB89C840F: 853 /* 854 * Winbond 89C840F's Ethernet address is the first 855 * 6 bytes of its EEPROM. 856 */ 857 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 858 859 /* 860 * Winbond 89C840F has an MII attached to the SIO. 861 */ 862 sc->sc_mediasw = &tlp_sio_mii_mediasw; 863 break; 864 865 case TULIP_CHIP_AL981: 866 /* 867 * The ADMtek AL981's Ethernet address is located 868 * at offset 8 of its EEPROM. 869 */ 870 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 871 872 /* 873 * ADMtek AL981 has a built-in PHY accessed through 874 * special registers. 875 */ 876 sc->sc_mediasw = &tlp_al981_mediasw; 877 break; 878 879 case TULIP_CHIP_AN983: 880 case TULIP_CHIP_AN985: 881 /* 882 * The ADMtek AN985's Ethernet address is located 883 * at offset 8 of its EEPROM. 884 */ 885 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 886 887 /* 888 * The ADMtek AN985 can be configured in Single-Chip 889 * mode or MAC-only mode. Single-Chip uses the built-in 890 * PHY, MAC-only has an external PHY (usually HomePNA). 891 * The selection is based on an EEPROM setting, and both 892 * PHYs are accessed via MII attached to SIO. 893 * 894 * The AN985 "ghosts" the internal PHY onto all 895 * MII addresses, so we have to use a media init 896 * routine that limits the search. 897 * XXX How does this work with MAC-only mode? 898 */ 899 sc->sc_mediasw = &tlp_an985_mediasw; 900 break; 901 902 case TULIP_CHIP_DM9102: 903 case TULIP_CHIP_DM9102A: 904 /* 905 * Some boards with the Davicom chip have an ISV 906 * SROM (mostly DM9102A boards -- trying to describe 907 * the HomePNA PHY, probably) although the data in 908 * them is generally wrong. Check for ISV format 909 * and grab the Ethernet address that way, and if 910 * that fails, fall back on grabbing it from an 911 * observed offset of 20 (which is where it would 912 * be in an ISV SROM anyhow, tho ISV can cope with 913 * multi-port boards). 914 */ 915 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 916 #ifdef __sparc__ 917 if ((sc->sc_srom[20] == 0 && 918 sc->sc_srom[21] == 0 && 919 sc->sc_srom[22] == 0) || 920 (sc->sc_srom[20] == 0xff && 921 sc->sc_srom[21] == 0xff && 922 sc->sc_srom[22] == 0xff)) { 923 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 924 } else 925 #endif 926 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 927 } 928 929 /* 930 * Davicom chips all have an internal MII interface 931 * and a built-in PHY. DM9102A also has a an external 932 * MII interface, usually with a HomePNA PHY attached 933 * to it. 934 */ 935 sc->sc_mediasw = &tlp_dm9102_mediasw; 936 break; 937 938 case TULIP_CHIP_AX88140: 939 case TULIP_CHIP_AX88141: 940 /* 941 * ASIX AX88140/AX88141 Ethernet Address is located at offset 942 * 20 of the SROM. 943 */ 944 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 945 946 /* 947 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 948 * an external MII interface. 949 */ 950 sc->sc_mediasw = &tlp_asix_mediasw; 951 break; 952 953 default: 954 cant_cope: 955 printf("%s: sorry, unable to handle your board\n", 956 sc->sc_dev.dv_xname); 957 return; 958 } 959 960 /* 961 * Handle shared interrupts. 962 */ 963 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 964 if (psc->sc_master) 965 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 966 else { 967 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 968 TULIP_PCI_SLAVEINTR); 969 if (psc->sc_master == NULL) 970 psc->sc_master = psc; 971 } 972 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 973 psc, sc_intrq); 974 } 975 976 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 977 printf("%s: sharing interrupt with %s\n", 978 sc->sc_dev.dv_xname, 979 psc->sc_master->sc_tulip.sc_dev.dv_xname); 980 } else { 981 /* 982 * Map and establish our interrupt. 983 */ 984 if (pci_intr_map(pa, &ih)) { 985 printf("%s: unable to map interrupt\n", 986 sc->sc_dev.dv_xname); 987 return; 988 } 989 intrstr = pci_intr_string(pc, ih); 990 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 991 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 992 tlp_pci_shared_intr : tlp_intr, sc); 993 if (psc->sc_ih == NULL) { 994 printf("%s: unable to establish interrupt", 995 sc->sc_dev.dv_xname); 996 if (intrstr != NULL) 997 printf(" at %s", intrstr); 998 printf("\n"); 999 return; 1000 } 1001 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1002 intrstr); 1003 } 1004 1005 /* 1006 * Finish off the attach. 1007 */ 1008 tlp_attach(sc, enaddr); 1009 } 1010 1011 static int 1012 tlp_pci_shared_intr(void *arg) 1013 { 1014 struct tulip_pci_softc *master = arg, *slave; 1015 int rv = 0; 1016 1017 for (slave = LIST_FIRST(&master->sc_intrslaves); 1018 slave != NULL; 1019 slave = LIST_NEXT(slave, sc_intrq)) 1020 rv |= tlp_intr(&slave->sc_tulip); 1021 1022 return (rv); 1023 } 1024 1025 static void 1026 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1027 { 1028 struct tulip_softc *sc = &psc->sc_tulip; 1029 1030 /* 1031 * This isn't really a quirk-gathering device, really. We 1032 * just want to get the spiffy DEC board name from the SROM. 1033 */ 1034 strcpy(sc->sc_name, "DEC "); 1035 1036 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1037 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1038 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1039 else 1040 sc->sc_name[3] = '\0'; 1041 } 1042 1043 static void 1044 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1045 { 1046 struct tulip_softc *sc = &psc->sc_tulip; 1047 u_int16_t id = 0; 1048 1049 /* 1050 * If we have a slaved ROM, just copy the bits from the master. 1051 * This is in case we fail the ROM ID check (older boards) and 1052 * need to fall back on Ethernet address model checking; that 1053 * will fail for slave chips. 1054 */ 1055 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1056 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1057 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1058 psc->sc_flags |= 1059 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1060 return; 1061 } 1062 1063 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1064 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1065 switch (id) { 1066 zx312: 1067 case 0x0602: /* ZX312 */ 1068 strcpy(sc->sc_name, "ZNYX ZX312"); 1069 return; 1070 1071 case 0x0622: /* ZX312T */ 1072 strcpy(sc->sc_name, "ZNYX ZX312T"); 1073 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1074 return; 1075 1076 zx314_inta: 1077 case 0x0701: /* ZX314 INTA */ 1078 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1079 /* FALLTHROUGH */ 1080 case 0x0711: /* ZX314 */ 1081 strcpy(sc->sc_name, "ZNYX ZX314"); 1082 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1083 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1084 return; 1085 1086 zx315_inta: 1087 case 0x0801: /* ZX315 INTA */ 1088 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1089 /* FALLTHROUGH */ 1090 case 0x0811: /* ZX315 */ 1091 strcpy(sc->sc_name, "ZNYX ZX315"); 1092 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1093 return; 1094 1095 default: 1096 id = 0; 1097 break; 1098 } 1099 } 1100 1101 /* 1102 * Deal with boards that have broken ROMs. 1103 */ 1104 if (id == 0) { 1105 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1106 goto zx314_inta; 1107 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1108 goto zx315_inta; 1109 if ((enaddr[3] & ~3) == 0xec) 1110 goto zx312; 1111 } 1112 1113 strcpy(sc->sc_name, "ZNYX ZX31x"); 1114 } 1115 1116 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1117 1118 static void 1119 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1120 { 1121 struct tulip_softc *sc = &psc->sc_tulip; 1122 pcireg_t subid; 1123 1124 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1125 1126 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1127 return; /* ? */ 1128 1129 switch (PCI_PRODUCT(subid) & 0xff) { 1130 /* 1131 * ZNYX 21143 boards with QS6611 PHY 1132 */ 1133 case 0x12: /* ZX345Q */ 1134 case 0x13: /* ZX346Q */ 1135 case 0x14: /* ZX348Q */ 1136 case 0x18: /* ZX414 */ 1137 case 0x19: /* ZX412 */ 1138 case 0x1a: /* ZX444 */ 1139 case 0x1b: /* ZX442 */ 1140 case 0x23: /* ZX212 */ 1141 case 0x24: /* ZX214 */ 1142 case 0x29: /* ZX374 */ 1143 case 0x2d: /* ZX372 */ 1144 case 0x2b: /* ZX244 */ 1145 case 0x2c: /* ZX424 */ 1146 case 0x2e: /* ZX422 */ 1147 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1148 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1149 break; 1150 } 1151 } 1152 1153 static void 1154 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1155 { 1156 1157 /* 1158 * Reset QS6611 PHY. 1159 */ 1160 TULIP_WRITE(sc, CSR_SIAGEN, 1161 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1162 delay(200); 1163 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1164 delay(10000); 1165 } 1166 1167 static void 1168 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1169 { 1170 struct tulip_softc *sc = &psc->sc_tulip; 1171 u_int16_t id1, id2, ei; 1172 int auibnc = 0, utp = 0; 1173 char *cp; 1174 1175 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1176 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1177 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1178 1179 strcpy(sc->sc_name, "SMC 8432"); 1180 cp = &sc->sc_name[8]; 1181 1182 if ((id1 & 1) == 0) { 1183 *cp++ = 'B'; 1184 auibnc = 1; 1185 } 1186 if ((id1 & 0xff) > 0x32) { 1187 *cp++ = 'T'; 1188 utp = 1; 1189 } 1190 if ((id1 & 0x4000) == 0) { 1191 *cp++ = 'A'; 1192 auibnc = 1; 1193 } 1194 if (id2 == 0x15) { 1195 sc->sc_name[7] = '4'; 1196 *cp++ = '-'; 1197 *cp++ = 'C'; 1198 *cp++ = 'H'; 1199 *cp++ = ei ? '2' : '1'; 1200 } 1201 *cp = '\0'; 1202 1203 if (utp != 0 && auibnc == 0) 1204 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1205 else if (utp == 0 && auibnc != 0) 1206 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1207 } 1208 1209 static void 1210 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1211 { 1212 1213 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1214 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1215 } 1216 1217 static void 1218 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1219 { 1220 1221 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1222 } 1223 1224 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1225 1226 static void 1227 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1228 { 1229 struct tulip_softc *sc = &psc->sc_tulip; 1230 1231 /* 1232 * Some Asante boards don't use the ISV SROM format. For 1233 * those that don't, we initialize the GPIO direction bits, 1234 * and provide our own reset hook, which resets the MII. 1235 * 1236 * All of these boards use SIO-attached-MII media. 1237 */ 1238 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1239 return; 1240 1241 strcpy(sc->sc_name, "Asante"); 1242 1243 sc->sc_gp_dir = 0xbf; 1244 sc->sc_reset = tlp_pci_asante_21140_reset; 1245 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1246 } 1247 1248 static void 1249 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1250 { 1251 1252 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1253 TULIP_WRITE(sc, CSR_GPP, 0x8); 1254 delay(100); 1255 TULIP_WRITE(sc, CSR_GPP, 0); 1256 } 1257 1258 /* 1259 * SMC 9332DST media switch. 1260 */ 1261 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1262 1263 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1264 tlp_smc9332dst_tmsw_init, 1265 tlp_21140_gpio_get, 1266 tlp_21140_gpio_set 1267 }; 1268 1269 static void 1270 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1271 { 1272 struct tulip_softc *sc = &psc->sc_tulip; 1273 1274 if (sc->sc_mediasw != NULL) { 1275 return; 1276 } 1277 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1278 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1279 } 1280 1281 static void 1282 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1283 { 1284 struct tulip_21x4x_media *tm; 1285 const char *sep = ""; 1286 uint32_t reg; 1287 int i, cnt; 1288 1289 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1290 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1291 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1292 1293 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1294 tlp_mediastatus); 1295 printf("%s: ", sc->sc_dev.dv_xname); 1296 1297 #define ADD(m, c) \ 1298 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1299 tm->tm_opmode = (c); \ 1300 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1301 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1302 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1303 1304 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1305 PRINT("10baseT"); 1306 1307 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1308 OPMODE_TTM | OPMODE_FD); 1309 PRINT("10baseT-FDX"); 1310 1311 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1312 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1313 PRINT("100baseTX"); 1314 1315 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1316 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1317 PRINT("100baseTX-FDX"); 1318 1319 #undef ADD 1320 #undef PRINT 1321 1322 printf("\n"); 1323 1324 tlp_reset(sc); 1325 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1326 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1327 delay(10); 1328 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1329 delay(200000); 1330 cnt = 0; 1331 for (i = 1000; i > 0; i--) { 1332 reg = TULIP_READ(sc, CSR_GPP); 1333 if ((~reg & (GPP_SMC9332DST_OK10 | 1334 GPP_SMC9332DST_OK100)) == 0) { 1335 if (cnt++ > 100) { 1336 break; 1337 } 1338 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1339 break; 1340 } else { 1341 cnt = 0; 1342 } 1343 delay(1000); 1344 } 1345 if (cnt > 100) { 1346 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1347 } else { 1348 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1349 } 1350 } 1351 1352 static void 1353 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1354 { 1355 struct tulip_softc *sc = &psc->sc_tulip; 1356 char *p1 = (char *) &sc->sc_srom[32]; 1357 char *p2 = &sc->sc_name[0]; 1358 1359 do { 1360 if ((unsigned char) *p1 & 0x80) 1361 *p2++ = ' '; 1362 else 1363 *p2++ = *p1; 1364 } while (*p1++); 1365 } 1366 1367 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1368 1369 static void 1370 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1371 { 1372 struct tulip_softc *sc = &psc->sc_tulip; 1373 1374 /* 1375 * Cobalt Networks interfaces are just MII-on-SIO. 1376 */ 1377 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1378 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1379 1380 /* 1381 * The Cobalt systems tend to fall back to store-and-forward 1382 * pretty quickly, so we select that from the beginning to 1383 * avoid initial timeouts. 1384 */ 1385 sc->sc_txthresh = TXTH_SF; 1386 } 1387 1388 static void 1389 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1390 { 1391 /* 1392 * Reset PHY. 1393 */ 1394 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1395 delay(10); 1396 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1397 delay(10); 1398 } 1399 1400 static void 1401 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1402 { 1403 struct tulip_softc *sc = &psc->sc_tulip; 1404 1405 /* 1406 * Algorithmics boards just have MII-on-SIO. 1407 * 1408 * XXX They also have AUI on the serial interface. 1409 * XXX Deal with this. 1410 */ 1411 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1412 } 1413 1414 /* 1415 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1416 */ 1417 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1418 1419 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1420 tlp_cogent_em1x0_tmsw_init, 1421 tlp_21140_gpio_get, 1422 tlp_21140_gpio_set 1423 }; 1424 1425 static void 1426 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1427 { 1428 struct tulip_softc *sc = &psc->sc_tulip; 1429 uint8_t *srom = sc->sc_srom, id0; 1430 uint16_t id1, id2; 1431 1432 if (sc->sc_mediasw == NULL) { 1433 id0 = srom[32]; 1434 switch (id0) { 1435 case 0x12: 1436 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1437 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1438 break; 1439 1440 case 0x15: 1441 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1442 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1443 break; 1444 1445 #if 0 1446 case XXX: 1447 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1448 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1449 break; 1450 #endif 1451 1452 default: 1453 printf("%s: unknown Cogent board ID 0x%02x\n", 1454 sc->sc_dev.dv_xname, id0); 1455 } 1456 return; 1457 } 1458 1459 id1 = TULIP_ROM_GETW(srom, 0); 1460 id2 = TULIP_ROM_GETW(srom, 2); 1461 if (id1 != 0x1109) { 1462 goto unknown; 1463 } 1464 1465 switch (id2) { 1466 case 0x1900: 1467 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1468 break; 1469 1470 case 0x2400: 1471 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1472 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1473 break; 1474 1475 case 0x2b00: 1476 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1477 break; 1478 1479 case 0x3000: 1480 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1481 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1482 break; 1483 1484 default: 1485 unknown: 1486 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1487 sc->sc_dev.dv_xname, id1, id2); 1488 } 1489 } 1490 1491 static void 1492 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1493 { 1494 struct tulip_21x4x_media *tm; 1495 const char *sep = ""; 1496 1497 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1498 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1499 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1500 1501 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1502 tlp_mediastatus); 1503 printf("%s: ", sc->sc_dev.dv_xname); 1504 1505 #define ADD(m, c) \ 1506 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1507 tm->tm_opmode = (c); \ 1508 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1509 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1510 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1511 1512 if (sc->sc_srom[32] == 0x15) { 1513 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1514 OPMODE_PS | OPMODE_PCS); 1515 PRINT("100baseFX"); 1516 1517 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1518 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1519 PRINT("100baseFX-FDX"); 1520 printf("\n"); 1521 1522 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1523 } else { 1524 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1525 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1526 PRINT("100baseTX"); 1527 1528 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1529 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1530 PRINT("100baseTX-FDX"); 1531 printf("\n"); 1532 1533 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1534 } 1535 1536 #undef ADD 1537 #undef PRINT 1538 } 1539 1540 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1541 1542 static void 1543 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1544 const u_int8_t *enaddr) 1545 { 1546 struct tulip_softc *sc = &psc->sc_tulip; 1547 1548 /* 1549 * Netwinders just use MII-on_SIO. 1550 */ 1551 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1552 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1553 } 1554 1555 void 1556 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1557 { 1558 1559 /* 1560 * Reset the PHY. 1561 */ 1562 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1563 delay(10); 1564 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1565 delay(10); 1566 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1567 delay(10); 1568 } 1569
Indexes created Wed Oct 01 13:09:50 GMT 2025