if_tlp_pci.c revision 1.85
1 /* $NetBSD: if_tlp_pci.c,v 1.85 2006/02/16 18:20:31 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.85 2006/02/16 18:20:31 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const u_int8_t *); 182 u_int8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const u_int8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const u_int8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const u_int8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 204 const u_int8_t *); 205 206 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 210 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 211 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 212 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 213 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 218 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 219 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 220 { NULL, { 0, 0, 0 } } 221 }; 222 223 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 224 const u_int8_t *); 225 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 226 const u_int8_t *); 227 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 228 const u_int8_t *); 229 230 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 231 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 232 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 233 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 234 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 235 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 236 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 237 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 238 { NULL, { 0, 0, 0 } } 239 }; 240 241 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 245 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 248 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 249 { NULL, { 0, 0, 0 } } 250 }; 251 252 static int tlp_pci_shared_intr(void *); 253 254 static const struct tulip_pci_product * 255 tlp_pci_lookup(const struct pci_attach_args *pa) 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 static void 270 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 271 const struct tlp_pci_quirks *tpq) 272 { 273 274 for (; tpq->tpq_func != NULL; tpq++) { 275 if (tpq->tpq_oui[0] == enaddr[0] && 276 tpq->tpq_oui[1] == enaddr[1] && 277 tpq->tpq_oui[2] == enaddr[2]) { 278 (*tpq->tpq_func)(psc, enaddr); 279 return; 280 } 281 } 282 } 283 284 static void 285 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 286 { 287 extern struct cfdriver tlp_cd; 288 struct tulip_pci_softc *cur, *best = NULL; 289 struct tulip_softc *sc = &psc->sc_tulip; 290 int i; 291 292 /* 293 * First of all, find the lowest pcidev numbered device on our 294 * bus marked as shared. That should be our master. 295 */ 296 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 297 if ((cur = tlp_cd.cd_devs[i]) == NULL) 298 continue; 299 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 300 continue; 301 if ((cur->sc_flags & shared) == 0) 302 continue; 303 if (cur == psc) 304 continue; 305 if (best == NULL || 306 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 307 best = cur; 308 } 309 310 if (best != NULL) { 311 psc->sc_master = best; 312 psc->sc_flags |= (shared | slaved); 313 } 314 } 315 316 static int 317 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 318 { 319 struct pci_attach_args *pa = aux; 320 321 if (tlp_pci_lookup(pa) != NULL) 322 return (10); /* beat if_de.c */ 323 324 return (0); 325 } 326 327 static void 328 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 329 { 330 struct tulip_pci_softc *psc = (void *) self; 331 struct tulip_softc *sc = &psc->sc_tulip; 332 struct pci_attach_args *pa = aux; 333 pci_chipset_tag_t pc = pa->pa_pc; 334 pci_intr_handle_t ih; 335 const char *intrstr = NULL; 336 bus_space_tag_t iot, memt; 337 bus_space_handle_t ioh, memh; 338 int ioh_valid, memh_valid, i, j; 339 const struct tulip_pci_product *tpp; 340 u_int8_t enaddr[ETHER_ADDR_LEN]; 341 u_int32_t val = 0; 342 pcireg_t reg; 343 int pmreg; 344 345 sc->sc_devno = pa->pa_device; 346 psc->sc_pc = pa->pa_pc; 347 psc->sc_pcitag = pa->pa_tag; 348 349 LIST_INIT(&psc->sc_intrslaves); 350 351 tpp = tlp_pci_lookup(pa); 352 if (tpp == NULL) { 353 printf("\n"); 354 panic("tlp_pci_attach: impossible"); 355 } 356 sc->sc_chip = tpp->tpp_chip; 357 358 /* 359 * By default, Tulip registers are 8 bytes long (4 bytes 360 * followed by a 4 byte pad). 361 */ 362 sc->sc_regshift = 3; 363 364 /* 365 * No power management hooks. 366 * XXX Maybe we should add some! 367 */ 368 sc->sc_flags |= TULIPF_ENABLED; 369 370 /* 371 * Get revision info, and set some chip-specific variables. 372 */ 373 sc->sc_rev = PCI_REVISION(pa->pa_class); 374 switch (sc->sc_chip) { 375 case TULIP_CHIP_21140: 376 if (sc->sc_rev >= 0x20) 377 sc->sc_chip = TULIP_CHIP_21140A; 378 break; 379 380 case TULIP_CHIP_21142: 381 if (sc->sc_rev >= 0x20) 382 sc->sc_chip = TULIP_CHIP_21143; 383 break; 384 385 case TULIP_CHIP_82C168: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_82C169; 388 break; 389 390 case TULIP_CHIP_MX98713: 391 if (sc->sc_rev >= 0x10) 392 sc->sc_chip = TULIP_CHIP_MX98713A; 393 break; 394 395 case TULIP_CHIP_MX98715: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_MX98715A; 398 if (sc->sc_rev >= 0x25) 399 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 400 if (sc->sc_rev >= 0x30) 401 sc->sc_chip = TULIP_CHIP_MX98725; 402 break; 403 404 case TULIP_CHIP_WB89C840F: 405 sc->sc_regshift = 2; 406 break; 407 408 case TULIP_CHIP_AN985: 409 /* 410 * The AN983 and AN985 are very similar, and are 411 * differentiated by a "signature" register that 412 * is like, but not identical, to a PCI ID register. 413 */ 414 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 415 switch (reg) { 416 case 0x09811317: 417 sc->sc_chip = TULIP_CHIP_AN985; 418 break; 419 420 case 0x09851317: 421 sc->sc_chip = TULIP_CHIP_AN983; 422 break; 423 424 default: 425 /* Unknown -- use default. */ 426 break; 427 } 428 break; 429 430 case TULIP_CHIP_AX88140: 431 if (sc->sc_rev >= 0x10) 432 sc->sc_chip = TULIP_CHIP_AX88141; 433 break; 434 435 case TULIP_CHIP_DM9102: 436 if (sc->sc_rev >= 0x30) 437 sc->sc_chip = TULIP_CHIP_DM9102A; 438 break; 439 440 default: 441 /* Nothing. */ 442 break; 443 } 444 445 printf(": %s Ethernet, pass %d.%d\n", 446 tlp_chip_names[sc->sc_chip], 447 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 448 449 switch (sc->sc_chip) { 450 case TULIP_CHIP_21040: 451 if (sc->sc_rev < 0x20) { 452 printf("%s: 21040 must be at least pass 2.0\n", 453 sc->sc_dev.dv_xname); 454 return; 455 } 456 break; 457 458 case TULIP_CHIP_21140: 459 if (sc->sc_rev < 0x11) { 460 printf("%s: 21140 must be at least pass 1.1\n", 461 sc->sc_dev.dv_xname); 462 return; 463 } 464 break; 465 466 default: 467 /* Nothing. */ 468 break; 469 } 470 471 /* 472 * Check to see if the device is in power-save mode, and 473 * being it out if necessary. 474 */ 475 switch (sc->sc_chip) { 476 case TULIP_CHIP_21140: 477 case TULIP_CHIP_21140A: 478 case TULIP_CHIP_21142: 479 case TULIP_CHIP_21143: 480 case TULIP_CHIP_MX98713A: 481 case TULIP_CHIP_MX98715: 482 case TULIP_CHIP_MX98715A: 483 case TULIP_CHIP_MX98715AEC_X: 484 case TULIP_CHIP_MX98725: 485 case TULIP_CHIP_DM9102: 486 case TULIP_CHIP_DM9102A: 487 case TULIP_CHIP_AX88140: 488 case TULIP_CHIP_AX88141: 489 /* 490 * Clear the "sleep mode" bit in the CFDA register. 491 */ 492 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 493 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 494 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 495 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 496 break; 497 498 default: 499 /* Nothing. */ 500 break; 501 } 502 503 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 504 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 505 switch (reg & PCI_PMCSR_STATE_MASK) { 506 case PCI_PMCSR_STATE_D1: 507 case PCI_PMCSR_STATE_D2: 508 printf("%s: waking up from power state D%d\n%s", 509 sc->sc_dev.dv_xname, 510 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 511 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 512 (reg & ~PCI_PMCSR_STATE_MASK) | 513 PCI_PMCSR_STATE_D0); 514 break; 515 case PCI_PMCSR_STATE_D3: 516 /* 517 * The card has lost all configuration data in 518 * this state, so punt. 519 */ 520 printf("%s: unable to wake up from power state D3, " 521 "reboot required.\n", sc->sc_dev.dv_xname); 522 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 523 (reg & ~PCI_PMCSR_STATE_MASK) | 524 PCI_PMCSR_STATE_D0); 525 return; 526 } 527 } 528 529 /* 530 * Map the device. 531 */ 532 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 533 PCI_MAPREG_TYPE_IO, 0, 534 &iot, &ioh, NULL, NULL) == 0); 535 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 536 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 537 &memt, &memh, NULL, NULL) == 0); 538 539 if (memh_valid) { 540 sc->sc_st = memt; 541 sc->sc_sh = memh; 542 } else if (ioh_valid) { 543 sc->sc_st = iot; 544 sc->sc_sh = ioh; 545 } else { 546 printf("%s: unable to map device registers\n", 547 sc->sc_dev.dv_xname); 548 return; 549 } 550 551 sc->sc_dmat = pa->pa_dmat; 552 553 /* 554 * Make sure bus mastering is enabled. 555 */ 556 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 557 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 558 PCI_COMMAND_MASTER_ENABLE); 559 560 /* 561 * Get the cacheline size. 562 */ 563 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 564 PCI_BHLC_REG)); 565 566 /* 567 * Get PCI data moving command info. 568 */ 569 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 570 sc->sc_flags |= TULIPF_MRL; 571 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 572 sc->sc_flags |= TULIPF_MRM; 573 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 574 sc->sc_flags |= TULIPF_MWI; 575 576 /* 577 * Read the contents of the Ethernet Address ROM/SROM. 578 */ 579 switch (sc->sc_chip) { 580 case TULIP_CHIP_21040: 581 sc->sc_srom_addrbits = 6; 582 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 583 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 584 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 585 for (j = 0; j < 10000; j++) { 586 val = TULIP_READ(sc, CSR_MIIROM); 587 if ((val & MIIROM_DN) == 0) 588 break; 589 } 590 sc->sc_srom[i] = val & MIIROM_DATA; 591 } 592 break; 593 594 case TULIP_CHIP_82C168: 595 case TULIP_CHIP_82C169: 596 { 597 sc->sc_srom_addrbits = 2; 598 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 599 600 /* 601 * The Lite-On PNIC stores the Ethernet address in 602 * the first 3 words of the EEPROM. EEPROM access 603 * is not like the other Tulip chips. 604 */ 605 for (i = 0; i < 6; i += 2) { 606 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 607 PNIC_SROMCTL_READ | (i >> 1)); 608 for (j = 0; j < 500; j++) { 609 delay(2); 610 val = TULIP_READ(sc, CSR_MIIROM); 611 if ((val & PNIC_MIIROM_BUSY) == 0) 612 break; 613 } 614 if (val & PNIC_MIIROM_BUSY) { 615 printf("%s: EEPROM timed out\n", 616 sc->sc_dev.dv_xname); 617 return; 618 } 619 val &= PNIC_MIIROM_DATA; 620 sc->sc_srom[i] = val >> 8; 621 sc->sc_srom[i + 1] = val & 0xff; 622 } 623 break; 624 } 625 626 default: 627 /* 628 * XXX This isn't quite the right way to do this; we should 629 * XXX be attempting to fetch the mac-addr property in the 630 * XXX bus-agnostic part of the driver independently. But 631 * XXX that requires a larger change in the SROM handling 632 * XXX logic, and for now we can at least remove a machine- 633 * XXX dependent wart from the PCI front-end. 634 */ 635 if (prop_get(dev_propdb, &sc->sc_dev, "mac-addr", 636 enaddr, sizeof(enaddr), NULL) == 637 sizeof(enaddr)) { 638 extern int tlp_srom_debug; 639 sc->sc_srom_addrbits = 6; 640 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 641 M_NOWAIT|M_ZERO); 642 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 643 if (tlp_srom_debug) { 644 printf("SROM CONTENTS:"); 645 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 646 if ((i % 8) == 0) 647 printf("\n\t"); 648 printf("0x%02x ", sc->sc_srom[i]); 649 } 650 printf("\n"); 651 } 652 break; 653 } 654 655 /* Check for a slaved ROM on a multi-port board. */ 656 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 657 TULIP_PCI_SLAVEROM); 658 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 659 sc->sc_srom_addrbits = 660 psc->sc_master->sc_tulip.sc_srom_addrbits; 661 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 662 enaddr[5] += 663 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 664 } 665 else if (tlp_read_srom(sc) == 0) 666 goto cant_cope; 667 break; 668 } 669 670 /* 671 * Deal with chip/board quirks. This includes setting up 672 * the mediasw, and extracting the Ethernet address from 673 * the rombuf. 674 */ 675 switch (sc->sc_chip) { 676 case TULIP_CHIP_21040: 677 /* 678 * Parse the Ethernet Address ROM. 679 */ 680 if (tlp_parse_old_srom(sc, enaddr) == 0) 681 goto cant_cope; 682 683 684 /* 685 * All 21040 boards start out with the same 686 * media switch. 687 */ 688 sc->sc_mediasw = &tlp_21040_mediasw; 689 690 /* 691 * Deal with any quirks this board might have. 692 */ 693 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 694 break; 695 696 case TULIP_CHIP_21041: 697 /* Check for new format SROM. */ 698 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 699 /* 700 * Not an ISV SROM; try the old DEC Ethernet Address 701 * ROM format. 702 */ 703 if (tlp_parse_old_srom(sc, enaddr) == 0) 704 goto cant_cope; 705 } 706 707 /* 708 * All 21041 boards use the same media switch; they all 709 * work basically the same! Yippee! 710 */ 711 sc->sc_mediasw = &tlp_21041_mediasw; 712 713 /* 714 * Deal with any quirks this board might have. 715 */ 716 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 717 break; 718 719 case TULIP_CHIP_21140: 720 case TULIP_CHIP_21140A: 721 /* Check for new format SROM. */ 722 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 723 /* 724 * Not an ISV SROM; try the old DEC Ethernet Address 725 * ROM format. 726 */ 727 if (tlp_parse_old_srom(sc, enaddr) == 0) 728 goto cant_cope; 729 } else { 730 /* 731 * We start out with the 2114x ISV media switch. 732 * When we search for quirks, we may change to 733 * a different switch. 734 */ 735 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 736 } 737 738 /* 739 * Deal with any quirks this board might have. 740 */ 741 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 742 743 /* 744 * Bail out now if we can't deal with this board. 745 */ 746 if (sc->sc_mediasw == NULL) 747 goto cant_cope; 748 break; 749 750 case TULIP_CHIP_21142: 751 case TULIP_CHIP_21143: 752 /* Check for new format SROM. */ 753 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 754 /* 755 * Not an ISV SROM; try the old DEC Ethernet Address 756 * ROM format. 757 */ 758 if (tlp_parse_old_srom(sc, enaddr) == 0) { 759 /* 760 * One last try: just copy the address 761 * from offset 20 and try to look 762 * up quirks. 763 */ 764 memcpy(enaddr, &sc->sc_srom[20], 765 ETHER_ADDR_LEN); 766 } 767 } else { 768 /* 769 * We start out with the 2114x ISV media switch. 770 * When we search for quirks, we may change to 771 * a different switch. 772 */ 773 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 774 } 775 776 /* 777 * Deal with any quirks this board might have. 778 */ 779 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 780 781 /* 782 * Bail out now if we can't deal with this board. 783 */ 784 if (sc->sc_mediasw == NULL) 785 goto cant_cope; 786 break; 787 788 case TULIP_CHIP_82C168: 789 case TULIP_CHIP_82C169: 790 /* 791 * Lite-On PNIC's Ethernet address is the first 6 792 * bytes of its EEPROM. 793 */ 794 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 795 796 /* 797 * Lite-On PNICs always use the same mediasw; we 798 * select MII vs. internal NWAY automatically. 799 */ 800 sc->sc_mediasw = &tlp_pnic_mediasw; 801 break; 802 803 case TULIP_CHIP_MX98713: 804 /* 805 * The Macronix MX98713 has an MII and GPIO, but no 806 * internal Nway block. This chip is basically a 807 * perfect 21140A clone, with the exception of the 808 * a magic register frobbing in order to make the 809 * interface function. 810 */ 811 if (tlp_isv_srom_enaddr(sc, enaddr)) { 812 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 813 break; 814 } 815 /* FALLTHROUGH */ 816 817 case TULIP_CHIP_82C115: 818 /* 819 * Yippee! The Lite-On 82C115 is a clone of 820 * the MX98725 (the data sheet even says `MXIC' 821 * on it)! Imagine that, a clone of a clone. 822 * 823 * The differences are really minimal: 824 * 825 * - Wake-On-LAN support 826 * - 128-bit multicast hash table, rather than 827 * the standard 512-bit hash table 828 */ 829 /* FALLTHROUGH */ 830 831 case TULIP_CHIP_MX98713A: 832 case TULIP_CHIP_MX98715A: 833 case TULIP_CHIP_MX98715AEC_X: 834 case TULIP_CHIP_MX98725: 835 /* 836 * The MX98713A has an MII as well as an internal Nway block, 837 * but no GPIO. The MX98715 and MX98725 have an internal 838 * Nway block only. 839 * 840 * The internal Nway block, unlike the Lite-On PNIC's, does 841 * just that - performs Nway. Once autonegotiation completes, 842 * we must program the GPR media information into the chip. 843 * 844 * The byte offset of the Ethernet address is stored at 845 * offset 0x70. 846 */ 847 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 848 sc->sc_mediasw = &tlp_pmac_mediasw; 849 break; 850 851 case TULIP_CHIP_WB89C840F: 852 /* 853 * Winbond 89C840F's Ethernet address is the first 854 * 6 bytes of its EEPROM. 855 */ 856 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 857 858 /* 859 * Winbond 89C840F has an MII attached to the SIO. 860 */ 861 sc->sc_mediasw = &tlp_sio_mii_mediasw; 862 break; 863 864 case TULIP_CHIP_AL981: 865 /* 866 * The ADMtek AL981's Ethernet address is located 867 * at offset 8 of its EEPROM. 868 */ 869 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 870 871 /* 872 * ADMtek AL981 has a built-in PHY accessed through 873 * special registers. 874 */ 875 sc->sc_mediasw = &tlp_al981_mediasw; 876 break; 877 878 case TULIP_CHIP_AN983: 879 case TULIP_CHIP_AN985: 880 /* 881 * The ADMtek AN985's Ethernet address is located 882 * at offset 8 of its EEPROM. 883 */ 884 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 885 886 /* 887 * The ADMtek AN985 can be configured in Single-Chip 888 * mode or MAC-only mode. Single-Chip uses the built-in 889 * PHY, MAC-only has an external PHY (usually HomePNA). 890 * The selection is based on an EEPROM setting, and both 891 * PHYs are accessed via MII attached to SIO. 892 * 893 * The AN985 "ghosts" the internal PHY onto all 894 * MII addresses, so we have to use a media init 895 * routine that limits the search. 896 * XXX How does this work with MAC-only mode? 897 */ 898 sc->sc_mediasw = &tlp_an985_mediasw; 899 break; 900 901 case TULIP_CHIP_DM9102: 902 case TULIP_CHIP_DM9102A: 903 /* 904 * Some boards with the Davicom chip have an ISV 905 * SROM (mostly DM9102A boards -- trying to describe 906 * the HomePNA PHY, probably) although the data in 907 * them is generally wrong. Check for ISV format 908 * and grab the Ethernet address that way, and if 909 * that fails, fall back on grabbing it from an 910 * observed offset of 20 (which is where it would 911 * be in an ISV SROM anyhow, tho ISV can cope with 912 * multi-port boards). 913 */ 914 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 915 #ifdef __sparc__ 916 if ((sc->sc_srom[20] == 0 && 917 sc->sc_srom[21] == 0 && 918 sc->sc_srom[22] == 0) || 919 (sc->sc_srom[20] == 0xff && 920 sc->sc_srom[21] == 0xff && 921 sc->sc_srom[22] == 0xff)) { 922 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 923 } else 924 #endif 925 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 926 } 927 928 /* 929 * Davicom chips all have an internal MII interface 930 * and a built-in PHY. DM9102A also has a an external 931 * MII interface, usually with a HomePNA PHY attached 932 * to it. 933 */ 934 sc->sc_mediasw = &tlp_dm9102_mediasw; 935 break; 936 937 case TULIP_CHIP_AX88140: 938 case TULIP_CHIP_AX88141: 939 /* 940 * ASIX AX88140/AX88141 Ethernet Address is located at offset 941 * 20 of the SROM. 942 */ 943 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 944 945 /* 946 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 947 * an external MII interface. 948 */ 949 sc->sc_mediasw = &tlp_asix_mediasw; 950 break; 951 952 default: 953 cant_cope: 954 printf("%s: sorry, unable to handle your board\n", 955 sc->sc_dev.dv_xname); 956 return; 957 } 958 959 /* 960 * Handle shared interrupts. 961 */ 962 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 963 if (psc->sc_master) 964 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 965 else { 966 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 967 TULIP_PCI_SLAVEINTR); 968 if (psc->sc_master == NULL) 969 psc->sc_master = psc; 970 } 971 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 972 psc, sc_intrq); 973 } 974 975 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 976 printf("%s: sharing interrupt with %s\n", 977 sc->sc_dev.dv_xname, 978 psc->sc_master->sc_tulip.sc_dev.dv_xname); 979 } else { 980 /* 981 * Map and establish our interrupt. 982 */ 983 if (pci_intr_map(pa, &ih)) { 984 printf("%s: unable to map interrupt\n", 985 sc->sc_dev.dv_xname); 986 return; 987 } 988 intrstr = pci_intr_string(pc, ih); 989 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 990 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 991 tlp_pci_shared_intr : tlp_intr, sc); 992 if (psc->sc_ih == NULL) { 993 printf("%s: unable to establish interrupt", 994 sc->sc_dev.dv_xname); 995 if (intrstr != NULL) 996 printf(" at %s", intrstr); 997 printf("\n"); 998 return; 999 } 1000 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1001 intrstr); 1002 } 1003 1004 /* 1005 * Finish off the attach. 1006 */ 1007 tlp_attach(sc, enaddr); 1008 } 1009 1010 static int 1011 tlp_pci_shared_intr(void *arg) 1012 { 1013 struct tulip_pci_softc *master = arg, *slave; 1014 int rv = 0; 1015 1016 for (slave = LIST_FIRST(&master->sc_intrslaves); 1017 slave != NULL; 1018 slave = LIST_NEXT(slave, sc_intrq)) 1019 rv |= tlp_intr(&slave->sc_tulip); 1020 1021 return (rv); 1022 } 1023 1024 static void 1025 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1026 { 1027 struct tulip_softc *sc = &psc->sc_tulip; 1028 1029 /* 1030 * This isn't really a quirk-gathering device, really. We 1031 * just want to get the spiffy DEC board name from the SROM. 1032 */ 1033 strcpy(sc->sc_name, "DEC "); 1034 1035 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1036 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1037 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1038 else 1039 sc->sc_name[3] = '\0'; 1040 } 1041 1042 static void 1043 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1044 { 1045 struct tulip_softc *sc = &psc->sc_tulip; 1046 u_int16_t id = 0; 1047 1048 /* 1049 * If we have a slaved ROM, just copy the bits from the master. 1050 * This is in case we fail the ROM ID check (older boards) and 1051 * need to fall back on Ethernet address model checking; that 1052 * will fail for slave chips. 1053 */ 1054 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1055 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1056 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1057 psc->sc_flags |= 1058 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1059 return; 1060 } 1061 1062 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1063 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1064 switch (id) { 1065 zx312: 1066 case 0x0602: /* ZX312 */ 1067 strcpy(sc->sc_name, "ZNYX ZX312"); 1068 return; 1069 1070 case 0x0622: /* ZX312T */ 1071 strcpy(sc->sc_name, "ZNYX ZX312T"); 1072 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1073 return; 1074 1075 zx314_inta: 1076 case 0x0701: /* ZX314 INTA */ 1077 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1078 /* FALLTHROUGH */ 1079 case 0x0711: /* ZX314 */ 1080 strcpy(sc->sc_name, "ZNYX ZX314"); 1081 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1082 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1083 return; 1084 1085 zx315_inta: 1086 case 0x0801: /* ZX315 INTA */ 1087 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1088 /* FALLTHROUGH */ 1089 case 0x0811: /* ZX315 */ 1090 strcpy(sc->sc_name, "ZNYX ZX315"); 1091 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1092 return; 1093 1094 default: 1095 id = 0; 1096 break; 1097 } 1098 } 1099 1100 /* 1101 * Deal with boards that have broken ROMs. 1102 */ 1103 if (id == 0) { 1104 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1105 goto zx314_inta; 1106 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1107 goto zx315_inta; 1108 if ((enaddr[3] & ~3) == 0xec) 1109 goto zx312; 1110 } 1111 1112 strcpy(sc->sc_name, "ZNYX ZX31x"); 1113 } 1114 1115 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1116 1117 static void 1118 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1119 { 1120 struct tulip_softc *sc = &psc->sc_tulip; 1121 pcireg_t subid; 1122 1123 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1124 1125 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1126 return; /* ? */ 1127 1128 switch (PCI_PRODUCT(subid) & 0xff) { 1129 /* 1130 * ZNYX 21143 boards with QS6611 PHY 1131 */ 1132 case 0x12: /* ZX345Q */ 1133 case 0x13: /* ZX346Q */ 1134 case 0x14: /* ZX348Q */ 1135 case 0x18: /* ZX414 */ 1136 case 0x19: /* ZX412 */ 1137 case 0x1a: /* ZX444 */ 1138 case 0x1b: /* ZX442 */ 1139 case 0x23: /* ZX212 */ 1140 case 0x24: /* ZX214 */ 1141 case 0x29: /* ZX374 */ 1142 case 0x2d: /* ZX372 */ 1143 case 0x2b: /* ZX244 */ 1144 case 0x2c: /* ZX424 */ 1145 case 0x2e: /* ZX422 */ 1146 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1147 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1148 break; 1149 } 1150 } 1151 1152 static void 1153 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1154 { 1155 1156 /* 1157 * Reset QS6611 PHY. 1158 */ 1159 TULIP_WRITE(sc, CSR_SIAGEN, 1160 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1161 delay(200); 1162 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1163 delay(10000); 1164 } 1165 1166 static void 1167 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1168 { 1169 struct tulip_softc *sc = &psc->sc_tulip; 1170 u_int16_t id1, id2, ei; 1171 int auibnc = 0, utp = 0; 1172 char *cp; 1173 1174 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1175 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1176 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1177 1178 strcpy(sc->sc_name, "SMC 8432"); 1179 cp = &sc->sc_name[8]; 1180 1181 if ((id1 & 1) == 0) { 1182 *cp++ = 'B'; 1183 auibnc = 1; 1184 } 1185 if ((id1 & 0xff) > 0x32) { 1186 *cp++ = 'T'; 1187 utp = 1; 1188 } 1189 if ((id1 & 0x4000) == 0) { 1190 *cp++ = 'A'; 1191 auibnc = 1; 1192 } 1193 if (id2 == 0x15) { 1194 sc->sc_name[7] = '4'; 1195 *cp++ = '-'; 1196 *cp++ = 'C'; 1197 *cp++ = 'H'; 1198 *cp++ = ei ? '2' : '1'; 1199 } 1200 *cp = '\0'; 1201 1202 if (utp != 0 && auibnc == 0) 1203 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1204 else if (utp == 0 && auibnc != 0) 1205 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1206 } 1207 1208 static void 1209 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1210 { 1211 1212 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1213 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1214 } 1215 1216 static void 1217 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1218 { 1219 1220 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1221 } 1222 1223 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1224 1225 static void 1226 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1227 { 1228 struct tulip_softc *sc = &psc->sc_tulip; 1229 1230 /* 1231 * Some Asante boards don't use the ISV SROM format. For 1232 * those that don't, we initialize the GPIO direction bits, 1233 * and provide our own reset hook, which resets the MII. 1234 * 1235 * All of these boards use SIO-attached-MII media. 1236 */ 1237 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1238 return; 1239 1240 strcpy(sc->sc_name, "Asante"); 1241 1242 sc->sc_gp_dir = 0xbf; 1243 sc->sc_reset = tlp_pci_asante_21140_reset; 1244 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1245 } 1246 1247 static void 1248 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1249 { 1250 1251 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1252 TULIP_WRITE(sc, CSR_GPP, 0x8); 1253 delay(100); 1254 TULIP_WRITE(sc, CSR_GPP, 0); 1255 } 1256 1257 /* 1258 * SMC 9332DST media switch. 1259 */ 1260 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1261 1262 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1263 tlp_smc9332dst_tmsw_init, 1264 tlp_21140_gpio_get, 1265 tlp_21140_gpio_set 1266 }; 1267 1268 static void 1269 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1270 { 1271 struct tulip_softc *sc = &psc->sc_tulip; 1272 1273 if (sc->sc_mediasw != NULL) { 1274 return; 1275 } 1276 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1277 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1278 } 1279 1280 static void 1281 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1282 { 1283 struct tulip_21x4x_media *tm; 1284 const char *sep = ""; 1285 uint32_t reg; 1286 int i, cnt; 1287 1288 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1289 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1290 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1291 1292 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1293 tlp_mediastatus); 1294 printf("%s: ", sc->sc_dev.dv_xname); 1295 1296 #define ADD(m, c) \ 1297 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1298 tm->tm_opmode = (c); \ 1299 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1300 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1301 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1302 1303 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1304 PRINT("10baseT"); 1305 1306 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1307 OPMODE_TTM | OPMODE_FD); 1308 PRINT("10baseT-FDX"); 1309 1310 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1311 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1312 PRINT("100baseTX"); 1313 1314 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1315 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1316 PRINT("100baseTX-FDX"); 1317 1318 #undef ADD 1319 #undef PRINT 1320 1321 printf("\n"); 1322 1323 tlp_reset(sc); 1324 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1325 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1326 delay(10); 1327 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1328 delay(200000); 1329 cnt = 0; 1330 for (i = 1000; i > 0; i--) { 1331 reg = TULIP_READ(sc, CSR_GPP); 1332 if ((~reg & (GPP_SMC9332DST_OK10 | 1333 GPP_SMC9332DST_OK100)) == 0) { 1334 if (cnt++ > 100) { 1335 break; 1336 } 1337 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1338 break; 1339 } else { 1340 cnt = 0; 1341 } 1342 delay(1000); 1343 } 1344 if (cnt > 100) { 1345 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1346 } else { 1347 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1348 } 1349 } 1350 1351 static void 1352 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1353 { 1354 struct tulip_softc *sc = &psc->sc_tulip; 1355 char *p1 = (char *) &sc->sc_srom[32]; 1356 char *p2 = &sc->sc_name[0]; 1357 1358 do { 1359 if ((unsigned char) *p1 & 0x80) 1360 *p2++ = ' '; 1361 else 1362 *p2++ = *p1; 1363 } while (*p1++); 1364 } 1365 1366 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1367 1368 static void 1369 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1370 { 1371 struct tulip_softc *sc = &psc->sc_tulip; 1372 1373 /* 1374 * Cobalt Networks interfaces are just MII-on-SIO. 1375 */ 1376 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1377 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1378 1379 /* 1380 * The Cobalt systems tend to fall back to store-and-forward 1381 * pretty quickly, so we select that from the beginning to 1382 * avoid initial timeouts. 1383 */ 1384 sc->sc_txthresh = TXTH_SF; 1385 } 1386 1387 static void 1388 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1389 { 1390 /* 1391 * Reset PHY. 1392 */ 1393 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1394 delay(10); 1395 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1396 delay(10); 1397 } 1398 1399 static void 1400 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1401 { 1402 struct tulip_softc *sc = &psc->sc_tulip; 1403 1404 /* 1405 * Algorithmics boards just have MII-on-SIO. 1406 * 1407 * XXX They also have AUI on the serial interface. 1408 * XXX Deal with this. 1409 */ 1410 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1411 } 1412 1413 /* 1414 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1415 */ 1416 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1417 1418 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1419 tlp_cogent_em1x0_tmsw_init, 1420 tlp_21140_gpio_get, 1421 tlp_21140_gpio_set 1422 }; 1423 1424 static void 1425 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1426 { 1427 struct tulip_softc *sc = &psc->sc_tulip; 1428 uint8_t *srom = sc->sc_srom, id0; 1429 uint16_t id1, id2; 1430 1431 if (sc->sc_mediasw == NULL) { 1432 id0 = srom[32]; 1433 switch (id0) { 1434 case 0x12: 1435 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1436 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1437 break; 1438 1439 case 0x15: 1440 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1441 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1442 break; 1443 1444 #if 0 1445 case XXX: 1446 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1447 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1448 break; 1449 #endif 1450 1451 default: 1452 printf("%s: unknown Cogent board ID 0x%02x\n", 1453 sc->sc_dev.dv_xname, id0); 1454 } 1455 return; 1456 } 1457 1458 id1 = TULIP_ROM_GETW(srom, 0); 1459 id2 = TULIP_ROM_GETW(srom, 2); 1460 if (id1 != 0x1109) { 1461 goto unknown; 1462 } 1463 1464 switch (id2) { 1465 case 0x1900: 1466 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1467 break; 1468 1469 case 0x2400: 1470 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1471 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1472 break; 1473 1474 case 0x2b00: 1475 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1476 break; 1477 1478 case 0x3000: 1479 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1480 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1481 break; 1482 1483 default: 1484 unknown: 1485 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1486 sc->sc_dev.dv_xname, id1, id2); 1487 } 1488 } 1489 1490 static void 1491 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1492 { 1493 struct tulip_21x4x_media *tm; 1494 const char *sep = ""; 1495 1496 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1497 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1498 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1499 1500 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1501 tlp_mediastatus); 1502 printf("%s: ", sc->sc_dev.dv_xname); 1503 1504 #define ADD(m, c) \ 1505 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1506 tm->tm_opmode = (c); \ 1507 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1508 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1509 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1510 1511 if (sc->sc_srom[32] == 0x15) { 1512 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1513 OPMODE_PS | OPMODE_PCS); 1514 PRINT("100baseFX"); 1515 1516 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1517 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1518 PRINT("100baseFX-FDX"); 1519 printf("\n"); 1520 1521 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1522 } else { 1523 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1524 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1525 PRINT("100baseTX"); 1526 1527 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1528 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1529 PRINT("100baseTX-FDX"); 1530 printf("\n"); 1531 1532 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1533 } 1534 1535 #undef ADD 1536 #undef PRINT 1537 } 1538 1539 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1540 1541 static void 1542 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1543 const u_int8_t *enaddr) 1544 { 1545 struct tulip_softc *sc = &psc->sc_tulip; 1546 1547 /* 1548 * Netwinders just use MII-on_SIO. 1549 */ 1550 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1551 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1552 } 1553 1554 void 1555 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1556 { 1557 1558 /* 1559 * Reset the PHY. 1560 */ 1561 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1562 delay(10); 1563 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1564 delay(10); 1565 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1566 delay(10); 1567 } 1568
Indexes created Sun Sep 21 20:09:37 GMT 2025