if_tlp_pci.c revision 1.86.2.3
1 /* $NetBSD: if_tlp_pci.c,v 1.86.2.3 2006/06/26 12:51:22 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.86.2.3 2006/06/26 12:51:22 yamt Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 176 TULIP_CHIP_RS7112 }, 177 178 { 0, 0, 179 TULIP_CHIP_INVALID }, 180 }; 181 182 struct tlp_pci_quirks { 183 void (*tpq_func)(struct tulip_pci_softc *, 184 const u_int8_t *); 185 u_int8_t tpq_oui[3]; 186 }; 187 188 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 191 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 192 const u_int8_t *); 193 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 194 const u_int8_t *); 195 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 200 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 201 const u_int8_t *); 202 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 203 const u_int8_t *); 204 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 210 const u_int8_t *); 211 212 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 213 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 214 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 215 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 216 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 221 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 222 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 227 const u_int8_t *); 228 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 229 const u_int8_t *); 230 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 231 const u_int8_t *); 232 233 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 238 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 239 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 240 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 241 { NULL, { 0, 0, 0 } } 242 }; 243 244 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 245 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 246 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 247 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 248 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 251 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 252 { NULL, { 0, 0, 0 } } 253 }; 254 255 static int tlp_pci_shared_intr(void *); 256 257 static const struct tulip_pci_product * 258 tlp_pci_lookup(const struct pci_attach_args *pa) 259 { 260 const struct tulip_pci_product *tpp; 261 262 /* Don't match lmc cards */ 263 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 264 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 265 return NULL; 266 267 for (tpp = tlp_pci_products; 268 tlp_chip_names[tpp->tpp_chip] != NULL; 269 tpp++) { 270 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 271 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 272 return (tpp); 273 } 274 return (NULL); 275 } 276 277 static void 278 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 279 const struct tlp_pci_quirks *tpq) 280 { 281 282 for (; tpq->tpq_func != NULL; tpq++) { 283 if (tpq->tpq_oui[0] == enaddr[0] && 284 tpq->tpq_oui[1] == enaddr[1] && 285 tpq->tpq_oui[2] == enaddr[2]) { 286 (*tpq->tpq_func)(psc, enaddr); 287 return; 288 } 289 } 290 } 291 292 static void 293 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 294 { 295 extern struct cfdriver tlp_cd; 296 struct tulip_pci_softc *cur, *best = NULL; 297 struct tulip_softc *sc = &psc->sc_tulip; 298 int i; 299 300 /* 301 * First of all, find the lowest pcidev numbered device on our 302 * bus marked as shared. That should be our master. 303 */ 304 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 305 if ((cur = tlp_cd.cd_devs[i]) == NULL) 306 continue; 307 if (device_parent(&cur->sc_tulip.sc_dev) != 308 device_parent(&sc->sc_dev)) 309 continue; 310 if ((cur->sc_flags & shared) == 0) 311 continue; 312 if (cur == psc) 313 continue; 314 if (best == NULL || 315 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 316 best = cur; 317 } 318 319 if (best != NULL) { 320 psc->sc_master = best; 321 psc->sc_flags |= (shared | slaved); 322 } 323 } 324 325 static int 326 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 327 { 328 struct pci_attach_args *pa = aux; 329 330 if (tlp_pci_lookup(pa) != NULL) 331 return (10); /* beat if_de.c */ 332 333 return (0); 334 } 335 336 static void 337 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 338 { 339 struct tulip_pci_softc *psc = (void *) self; 340 struct tulip_softc *sc = &psc->sc_tulip; 341 struct pci_attach_args *pa = aux; 342 pci_chipset_tag_t pc = pa->pa_pc; 343 pci_intr_handle_t ih; 344 const char *intrstr = NULL; 345 bus_space_tag_t iot, memt; 346 bus_space_handle_t ioh, memh; 347 int ioh_valid, memh_valid, i, j; 348 const struct tulip_pci_product *tpp; 349 prop_data_t ea; 350 u_int8_t enaddr[ETHER_ADDR_LEN]; 351 u_int32_t val = 0; 352 pcireg_t reg; 353 int error; 354 355 sc->sc_devno = pa->pa_device; 356 psc->sc_pc = pa->pa_pc; 357 psc->sc_pcitag = pa->pa_tag; 358 359 LIST_INIT(&psc->sc_intrslaves); 360 361 tpp = tlp_pci_lookup(pa); 362 if (tpp == NULL) { 363 printf("\n"); 364 panic("tlp_pci_attach: impossible"); 365 } 366 sc->sc_chip = tpp->tpp_chip; 367 368 /* 369 * By default, Tulip registers are 8 bytes long (4 bytes 370 * followed by a 4 byte pad). 371 */ 372 sc->sc_regshift = 3; 373 374 /* 375 * No power management hooks. 376 * XXX Maybe we should add some! 377 */ 378 sc->sc_flags |= TULIPF_ENABLED; 379 380 /* 381 * Get revision info, and set some chip-specific variables. 382 */ 383 sc->sc_rev = PCI_REVISION(pa->pa_class); 384 switch (sc->sc_chip) { 385 case TULIP_CHIP_21140: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_21140A; 388 break; 389 390 case TULIP_CHIP_21142: 391 if (sc->sc_rev >= 0x20) 392 sc->sc_chip = TULIP_CHIP_21143; 393 break; 394 395 case TULIP_CHIP_82C168: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_82C169; 398 break; 399 400 case TULIP_CHIP_MX98713: 401 if (sc->sc_rev >= 0x10) 402 sc->sc_chip = TULIP_CHIP_MX98713A; 403 break; 404 405 case TULIP_CHIP_MX98715: 406 if (sc->sc_rev >= 0x20) 407 sc->sc_chip = TULIP_CHIP_MX98715A; 408 if (sc->sc_rev >= 0x25) 409 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 410 if (sc->sc_rev >= 0x30) 411 sc->sc_chip = TULIP_CHIP_MX98725; 412 break; 413 414 case TULIP_CHIP_WB89C840F: 415 sc->sc_regshift = 2; 416 break; 417 418 case TULIP_CHIP_AN985: 419 /* 420 * The AN983 and AN985 are very similar, and are 421 * differentiated by a "signature" register that 422 * is like, but not identical, to a PCI ID register. 423 */ 424 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 425 switch (reg) { 426 case 0x09811317: 427 sc->sc_chip = TULIP_CHIP_AN985; 428 break; 429 430 case 0x09851317: 431 sc->sc_chip = TULIP_CHIP_AN983; 432 break; 433 434 default: 435 /* Unknown -- use default. */ 436 break; 437 } 438 break; 439 440 case TULIP_CHIP_AX88140: 441 if (sc->sc_rev >= 0x10) 442 sc->sc_chip = TULIP_CHIP_AX88141; 443 break; 444 445 case TULIP_CHIP_DM9102: 446 if (sc->sc_rev >= 0x30) 447 sc->sc_chip = TULIP_CHIP_DM9102A; 448 break; 449 450 default: 451 /* Nothing. */ 452 break; 453 } 454 455 printf(": %s Ethernet, pass %d.%d\n", 456 tlp_chip_names[sc->sc_chip], 457 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 458 459 switch (sc->sc_chip) { 460 case TULIP_CHIP_21040: 461 if (sc->sc_rev < 0x20) { 462 printf("%s: 21040 must be at least pass 2.0\n", 463 sc->sc_dev.dv_xname); 464 return; 465 } 466 break; 467 468 case TULIP_CHIP_21140: 469 if (sc->sc_rev < 0x11) { 470 printf("%s: 21140 must be at least pass 1.1\n", 471 sc->sc_dev.dv_xname); 472 return; 473 } 474 break; 475 476 default: 477 /* Nothing. */ 478 break; 479 } 480 481 /* 482 * Check to see if the device is in power-save mode, and 483 * being it out if necessary. 484 */ 485 switch (sc->sc_chip) { 486 case TULIP_CHIP_21140: 487 case TULIP_CHIP_21140A: 488 case TULIP_CHIP_21142: 489 case TULIP_CHIP_21143: 490 case TULIP_CHIP_MX98713A: 491 case TULIP_CHIP_MX98715: 492 case TULIP_CHIP_MX98715A: 493 case TULIP_CHIP_MX98715AEC_X: 494 case TULIP_CHIP_MX98725: 495 case TULIP_CHIP_DM9102: 496 case TULIP_CHIP_DM9102A: 497 case TULIP_CHIP_AX88140: 498 case TULIP_CHIP_AX88141: 499 case TULIP_CHIP_RS7112: 500 /* 501 * Clear the "sleep mode" bit in the CFDA register. 502 */ 503 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 504 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 505 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 506 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 507 break; 508 509 default: 510 /* Nothing. */ 511 break; 512 } 513 514 /* power up chip */ 515 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 516 NULL)) && error != EOPNOTSUPP) { 517 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 518 error); 519 return; 520 } 521 522 /* 523 * Map the device. 524 */ 525 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 526 PCI_MAPREG_TYPE_IO, 0, 527 &iot, &ioh, NULL, NULL) == 0); 528 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 529 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 530 &memt, &memh, NULL, NULL) == 0); 531 532 if (memh_valid) { 533 sc->sc_st = memt; 534 sc->sc_sh = memh; 535 } else if (ioh_valid) { 536 sc->sc_st = iot; 537 sc->sc_sh = ioh; 538 } else { 539 printf("%s: unable to map device registers\n", 540 sc->sc_dev.dv_xname); 541 return; 542 } 543 544 sc->sc_dmat = pa->pa_dmat; 545 546 /* 547 * Make sure bus mastering is enabled. 548 */ 549 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 550 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 551 PCI_COMMAND_MASTER_ENABLE); 552 553 /* 554 * Get the cacheline size. 555 */ 556 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 557 PCI_BHLC_REG)); 558 559 /* 560 * Get PCI data moving command info. 561 */ 562 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 563 sc->sc_flags |= TULIPF_MRL; 564 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 565 sc->sc_flags |= TULIPF_MRM; 566 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 567 sc->sc_flags |= TULIPF_MWI; 568 569 /* 570 * Read the contents of the Ethernet Address ROM/SROM. 571 */ 572 switch (sc->sc_chip) { 573 case TULIP_CHIP_21040: 574 sc->sc_srom_addrbits = 6; 575 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 576 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 577 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 578 for (j = 0; j < 10000; j++) { 579 val = TULIP_READ(sc, CSR_MIIROM); 580 if ((val & MIIROM_DN) == 0) 581 break; 582 } 583 sc->sc_srom[i] = val & MIIROM_DATA; 584 } 585 break; 586 587 case TULIP_CHIP_82C168: 588 case TULIP_CHIP_82C169: 589 { 590 sc->sc_srom_addrbits = 2; 591 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 592 593 /* 594 * The Lite-On PNIC stores the Ethernet address in 595 * the first 3 words of the EEPROM. EEPROM access 596 * is not like the other Tulip chips. 597 */ 598 for (i = 0; i < 6; i += 2) { 599 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 600 PNIC_SROMCTL_READ | (i >> 1)); 601 for (j = 0; j < 500; j++) { 602 delay(2); 603 val = TULIP_READ(sc, CSR_MIIROM); 604 if ((val & PNIC_MIIROM_BUSY) == 0) 605 break; 606 } 607 if (val & PNIC_MIIROM_BUSY) { 608 printf("%s: EEPROM timed out\n", 609 sc->sc_dev.dv_xname); 610 return; 611 } 612 val &= PNIC_MIIROM_DATA; 613 sc->sc_srom[i] = val >> 8; 614 sc->sc_srom[i + 1] = val & 0xff; 615 } 616 break; 617 } 618 619 default: 620 /* 621 * XXX This isn't quite the right way to do this; we should 622 * XXX be attempting to fetch the mac-addr property in the 623 * XXX bus-agnostic part of the driver independently. But 624 * XXX that requires a larger change in the SROM handling 625 * XXX logic, and for now we can at least remove a machine- 626 * XXX dependent wart from the PCI front-end. 627 */ 628 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 629 "mac-addr"); 630 if (ea != NULL) { 631 extern int tlp_srom_debug; 632 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 633 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 634 635 memcpy(enaddr, prop_data_data_nocopy(ea), 636 ETHER_ADDR_LEN); 637 638 sc->sc_srom_addrbits = 6; 639 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 640 M_NOWAIT|M_ZERO); 641 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 642 if (tlp_srom_debug) { 643 printf("SROM CONTENTS:"); 644 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 645 if ((i % 8) == 0) 646 printf("\n\t"); 647 printf("0x%02x ", sc->sc_srom[i]); 648 } 649 printf("\n"); 650 } 651 break; 652 } 653 654 /* Check for a slaved ROM on a multi-port board. */ 655 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 656 TULIP_PCI_SLAVEROM); 657 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 658 sc->sc_srom_addrbits = 659 psc->sc_master->sc_tulip.sc_srom_addrbits; 660 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 661 enaddr[5] += 662 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 663 } 664 else if (tlp_read_srom(sc) == 0) 665 goto cant_cope; 666 break; 667 } 668 669 /* 670 * Deal with chip/board quirks. This includes setting up 671 * the mediasw, and extracting the Ethernet address from 672 * the rombuf. 673 */ 674 switch (sc->sc_chip) { 675 case TULIP_CHIP_21040: 676 /* 677 * Parse the Ethernet Address ROM. 678 */ 679 if (tlp_parse_old_srom(sc, enaddr) == 0) 680 goto cant_cope; 681 682 683 /* 684 * All 21040 boards start out with the same 685 * media switch. 686 */ 687 sc->sc_mediasw = &tlp_21040_mediasw; 688 689 /* 690 * Deal with any quirks this board might have. 691 */ 692 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 693 break; 694 695 case TULIP_CHIP_21041: 696 /* Check for new format SROM. */ 697 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 698 /* 699 * Not an ISV SROM; try the old DEC Ethernet Address 700 * ROM format. 701 */ 702 if (tlp_parse_old_srom(sc, enaddr) == 0) 703 goto cant_cope; 704 } 705 706 /* 707 * All 21041 boards use the same media switch; they all 708 * work basically the same! Yippee! 709 */ 710 sc->sc_mediasw = &tlp_21041_mediasw; 711 712 /* 713 * Deal with any quirks this board might have. 714 */ 715 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 716 break; 717 718 case TULIP_CHIP_21140: 719 case TULIP_CHIP_21140A: 720 /* Check for new format SROM. */ 721 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 722 /* 723 * Not an ISV SROM; try the old DEC Ethernet Address 724 * ROM format. 725 */ 726 if (tlp_parse_old_srom(sc, enaddr) == 0) 727 goto cant_cope; 728 } else { 729 /* 730 * We start out with the 2114x ISV media switch. 731 * When we search for quirks, we may change to 732 * a different switch. 733 */ 734 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 735 } 736 737 /* 738 * Deal with any quirks this board might have. 739 */ 740 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 741 742 /* 743 * Bail out now if we can't deal with this board. 744 */ 745 if (sc->sc_mediasw == NULL) 746 goto cant_cope; 747 break; 748 749 case TULIP_CHIP_21142: 750 case TULIP_CHIP_21143: 751 /* Check for new format SROM. */ 752 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 753 /* 754 * Not an ISV SROM; try the old DEC Ethernet Address 755 * ROM format. 756 */ 757 if (tlp_parse_old_srom(sc, enaddr) == 0) { 758 /* 759 * One last try: just copy the address 760 * from offset 20 and try to look 761 * up quirks. 762 */ 763 memcpy(enaddr, &sc->sc_srom[20], 764 ETHER_ADDR_LEN); 765 } 766 } else { 767 /* 768 * We start out with the 2114x ISV media switch. 769 * When we search for quirks, we may change to 770 * a different switch. 771 */ 772 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 773 } 774 775 /* 776 * Deal with any quirks this board might have. 777 */ 778 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 779 780 /* 781 * Bail out now if we can't deal with this board. 782 */ 783 if (sc->sc_mediasw == NULL) 784 goto cant_cope; 785 break; 786 787 case TULIP_CHIP_82C168: 788 case TULIP_CHIP_82C169: 789 /* 790 * Lite-On PNIC's Ethernet address is the first 6 791 * bytes of its EEPROM. 792 */ 793 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 794 795 /* 796 * Lite-On PNICs always use the same mediasw; we 797 * select MII vs. internal NWAY automatically. 798 */ 799 sc->sc_mediasw = &tlp_pnic_mediasw; 800 break; 801 802 case TULIP_CHIP_MX98713: 803 /* 804 * The Macronix MX98713 has an MII and GPIO, but no 805 * internal Nway block. This chip is basically a 806 * perfect 21140A clone, with the exception of the 807 * a magic register frobbing in order to make the 808 * interface function. 809 */ 810 if (tlp_isv_srom_enaddr(sc, enaddr)) { 811 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 812 break; 813 } 814 /* FALLTHROUGH */ 815 816 case TULIP_CHIP_82C115: 817 /* 818 * Yippee! The Lite-On 82C115 is a clone of 819 * the MX98725 (the data sheet even says `MXIC' 820 * on it)! Imagine that, a clone of a clone. 821 * 822 * The differences are really minimal: 823 * 824 * - Wake-On-LAN support 825 * - 128-bit multicast hash table, rather than 826 * the standard 512-bit hash table 827 */ 828 /* FALLTHROUGH */ 829 830 case TULIP_CHIP_MX98713A: 831 case TULIP_CHIP_MX98715A: 832 case TULIP_CHIP_MX98715AEC_X: 833 case TULIP_CHIP_MX98725: 834 /* 835 * The MX98713A has an MII as well as an internal Nway block, 836 * but no GPIO. The MX98715 and MX98725 have an internal 837 * Nway block only. 838 * 839 * The internal Nway block, unlike the Lite-On PNIC's, does 840 * just that - performs Nway. Once autonegotiation completes, 841 * we must program the GPR media information into the chip. 842 * 843 * The byte offset of the Ethernet address is stored at 844 * offset 0x70. 845 */ 846 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 847 sc->sc_mediasw = &tlp_pmac_mediasw; 848 break; 849 850 case TULIP_CHIP_WB89C840F: 851 /* 852 * Winbond 89C840F's Ethernet address is the first 853 * 6 bytes of its EEPROM. 854 */ 855 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 856 857 /* 858 * Winbond 89C840F has an MII attached to the SIO. 859 */ 860 sc->sc_mediasw = &tlp_sio_mii_mediasw; 861 break; 862 863 case TULIP_CHIP_AL981: 864 /* 865 * The ADMtek AL981's Ethernet address is located 866 * at offset 8 of its EEPROM. 867 */ 868 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 869 870 /* 871 * ADMtek AL981 has a built-in PHY accessed through 872 * special registers. 873 */ 874 sc->sc_mediasw = &tlp_al981_mediasw; 875 break; 876 877 case TULIP_CHIP_AN983: 878 case TULIP_CHIP_AN985: 879 /* 880 * The ADMtek AN985's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * The ADMtek AN985 can be configured in Single-Chip 887 * mode or MAC-only mode. Single-Chip uses the built-in 888 * PHY, MAC-only has an external PHY (usually HomePNA). 889 * The selection is based on an EEPROM setting, and both 890 * PHYs are accessed via MII attached to SIO. 891 * 892 * The AN985 "ghosts" the internal PHY onto all 893 * MII addresses, so we have to use a media init 894 * routine that limits the search. 895 * XXX How does this work with MAC-only mode? 896 */ 897 sc->sc_mediasw = &tlp_an985_mediasw; 898 break; 899 900 case TULIP_CHIP_DM9102: 901 case TULIP_CHIP_DM9102A: 902 /* 903 * Some boards with the Davicom chip have an ISV 904 * SROM (mostly DM9102A boards -- trying to describe 905 * the HomePNA PHY, probably) although the data in 906 * them is generally wrong. Check for ISV format 907 * and grab the Ethernet address that way, and if 908 * that fails, fall back on grabbing it from an 909 * observed offset of 20 (which is where it would 910 * be in an ISV SROM anyhow, tho ISV can cope with 911 * multi-port boards). 912 */ 913 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 914 #ifdef __sparc__ 915 if ((sc->sc_srom[20] == 0 && 916 sc->sc_srom[21] == 0 && 917 sc->sc_srom[22] == 0) || 918 (sc->sc_srom[20] == 0xff && 919 sc->sc_srom[21] == 0xff && 920 sc->sc_srom[22] == 0xff)) { 921 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 922 } else 923 #endif 924 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 925 } 926 927 /* 928 * Davicom chips all have an internal MII interface 929 * and a built-in PHY. DM9102A also has a an external 930 * MII interface, usually with a HomePNA PHY attached 931 * to it. 932 */ 933 sc->sc_mediasw = &tlp_dm9102_mediasw; 934 break; 935 936 case TULIP_CHIP_AX88140: 937 case TULIP_CHIP_AX88141: 938 /* 939 * ASIX AX88140/AX88141 Ethernet Address is located at offset 940 * 20 of the SROM. 941 */ 942 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 943 944 /* 945 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 946 * an external MII interface. 947 */ 948 sc->sc_mediasw = &tlp_asix_mediasw; 949 break; 950 951 case TULIP_CHIP_RS7112: 952 /* 953 * RS7112 Ethernet Address is located of offset 0x19a 954 * of the SROM 955 */ 956 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 957 958 /* RS7112 chip has a PHY at MII address 1 */ 959 sc->sc_mediasw = &tlp_rs7112_mediasw; 960 break; 961 962 default: 963 cant_cope: 964 printf("%s: sorry, unable to handle your board\n", 965 sc->sc_dev.dv_xname); 966 return; 967 } 968 969 /* 970 * Handle shared interrupts. 971 */ 972 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 973 if (psc->sc_master) 974 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 975 else { 976 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 977 TULIP_PCI_SLAVEINTR); 978 if (psc->sc_master == NULL) 979 psc->sc_master = psc; 980 } 981 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 982 psc, sc_intrq); 983 } 984 985 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 986 printf("%s: sharing interrupt with %s\n", 987 sc->sc_dev.dv_xname, 988 psc->sc_master->sc_tulip.sc_dev.dv_xname); 989 } else { 990 /* 991 * Map and establish our interrupt. 992 */ 993 if (pci_intr_map(pa, &ih)) { 994 printf("%s: unable to map interrupt\n", 995 sc->sc_dev.dv_xname); 996 return; 997 } 998 intrstr = pci_intr_string(pc, ih); 999 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1000 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1001 tlp_pci_shared_intr : tlp_intr, sc); 1002 if (psc->sc_ih == NULL) { 1003 printf("%s: unable to establish interrupt", 1004 sc->sc_dev.dv_xname); 1005 if (intrstr != NULL) 1006 printf(" at %s", intrstr); 1007 printf("\n"); 1008 return; 1009 } 1010 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1011 intrstr); 1012 } 1013 1014 /* 1015 * Finish off the attach. 1016 */ 1017 tlp_attach(sc, enaddr); 1018 } 1019 1020 static int 1021 tlp_pci_shared_intr(void *arg) 1022 { 1023 struct tulip_pci_softc *master = arg, *slave; 1024 int rv = 0; 1025 1026 for (slave = LIST_FIRST(&master->sc_intrslaves); 1027 slave != NULL; 1028 slave = LIST_NEXT(slave, sc_intrq)) 1029 rv |= tlp_intr(&slave->sc_tulip); 1030 1031 return (rv); 1032 } 1033 1034 static void 1035 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1036 { 1037 struct tulip_softc *sc = &psc->sc_tulip; 1038 1039 /* 1040 * This isn't really a quirk-gathering device, really. We 1041 * just want to get the spiffy DEC board name from the SROM. 1042 */ 1043 strcpy(sc->sc_name, "DEC "); 1044 1045 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1046 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1047 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1048 else 1049 sc->sc_name[3] = '\0'; 1050 } 1051 1052 static void 1053 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1054 { 1055 struct tulip_softc *sc = &psc->sc_tulip; 1056 u_int16_t id = 0; 1057 1058 /* 1059 * If we have a slaved ROM, just copy the bits from the master. 1060 * This is in case we fail the ROM ID check (older boards) and 1061 * need to fall back on Ethernet address model checking; that 1062 * will fail for slave chips. 1063 */ 1064 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1065 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1066 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1067 psc->sc_flags |= 1068 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1069 return; 1070 } 1071 1072 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1073 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1074 switch (id) { 1075 zx312: 1076 case 0x0602: /* ZX312 */ 1077 strcpy(sc->sc_name, "ZNYX ZX312"); 1078 return; 1079 1080 case 0x0622: /* ZX312T */ 1081 strcpy(sc->sc_name, "ZNYX ZX312T"); 1082 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1083 return; 1084 1085 zx314_inta: 1086 case 0x0701: /* ZX314 INTA */ 1087 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1088 /* FALLTHROUGH */ 1089 case 0x0711: /* ZX314 */ 1090 strcpy(sc->sc_name, "ZNYX ZX314"); 1091 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1092 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1093 return; 1094 1095 zx315_inta: 1096 case 0x0801: /* ZX315 INTA */ 1097 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1098 /* FALLTHROUGH */ 1099 case 0x0811: /* ZX315 */ 1100 strcpy(sc->sc_name, "ZNYX ZX315"); 1101 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1102 return; 1103 1104 default: 1105 id = 0; 1106 break; 1107 } 1108 } 1109 1110 /* 1111 * Deal with boards that have broken ROMs. 1112 */ 1113 if (id == 0) { 1114 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1115 goto zx314_inta; 1116 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1117 goto zx315_inta; 1118 if ((enaddr[3] & ~3) == 0xec) 1119 goto zx312; 1120 } 1121 1122 strcpy(sc->sc_name, "ZNYX ZX31x"); 1123 } 1124 1125 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1126 1127 static void 1128 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1129 { 1130 struct tulip_softc *sc = &psc->sc_tulip; 1131 pcireg_t subid; 1132 1133 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1134 1135 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1136 return; /* ? */ 1137 1138 switch (PCI_PRODUCT(subid) & 0xff) { 1139 /* 1140 * ZNYX 21143 boards with QS6611 PHY 1141 */ 1142 case 0x12: /* ZX345Q */ 1143 case 0x13: /* ZX346Q */ 1144 case 0x14: /* ZX348Q */ 1145 case 0x18: /* ZX414 */ 1146 case 0x19: /* ZX412 */ 1147 case 0x1a: /* ZX444 */ 1148 case 0x1b: /* ZX442 */ 1149 case 0x23: /* ZX212 */ 1150 case 0x24: /* ZX214 */ 1151 case 0x29: /* ZX374 */ 1152 case 0x2d: /* ZX372 */ 1153 case 0x2b: /* ZX244 */ 1154 case 0x2c: /* ZX424 */ 1155 case 0x2e: /* ZX422 */ 1156 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1157 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1158 break; 1159 } 1160 } 1161 1162 static void 1163 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1164 { 1165 1166 /* 1167 * Reset QS6611 PHY. 1168 */ 1169 TULIP_WRITE(sc, CSR_SIAGEN, 1170 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1171 delay(200); 1172 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1173 delay(10000); 1174 } 1175 1176 static void 1177 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1178 { 1179 struct tulip_softc *sc = &psc->sc_tulip; 1180 u_int16_t id1, id2, ei; 1181 int auibnc = 0, utp = 0; 1182 char *cp; 1183 1184 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1185 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1186 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1187 1188 strcpy(sc->sc_name, "SMC 8432"); 1189 cp = &sc->sc_name[8]; 1190 1191 if ((id1 & 1) == 0) { 1192 *cp++ = 'B'; 1193 auibnc = 1; 1194 } 1195 if ((id1 & 0xff) > 0x32) { 1196 *cp++ = 'T'; 1197 utp = 1; 1198 } 1199 if ((id1 & 0x4000) == 0) { 1200 *cp++ = 'A'; 1201 auibnc = 1; 1202 } 1203 if (id2 == 0x15) { 1204 sc->sc_name[7] = '4'; 1205 *cp++ = '-'; 1206 *cp++ = 'C'; 1207 *cp++ = 'H'; 1208 *cp++ = ei ? '2' : '1'; 1209 } 1210 *cp = '\0'; 1211 1212 if (utp != 0 && auibnc == 0) 1213 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1214 else if (utp == 0 && auibnc != 0) 1215 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1216 } 1217 1218 static void 1219 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1220 { 1221 1222 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1223 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1224 } 1225 1226 static void 1227 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1228 { 1229 1230 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1231 } 1232 1233 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1234 1235 static void 1236 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1237 { 1238 struct tulip_softc *sc = &psc->sc_tulip; 1239 1240 /* 1241 * Some Asante boards don't use the ISV SROM format. For 1242 * those that don't, we initialize the GPIO direction bits, 1243 * and provide our own reset hook, which resets the MII. 1244 * 1245 * All of these boards use SIO-attached-MII media. 1246 */ 1247 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1248 return; 1249 1250 strcpy(sc->sc_name, "Asante"); 1251 1252 sc->sc_gp_dir = 0xbf; 1253 sc->sc_reset = tlp_pci_asante_21140_reset; 1254 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1255 } 1256 1257 static void 1258 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1259 { 1260 1261 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1262 TULIP_WRITE(sc, CSR_GPP, 0x8); 1263 delay(100); 1264 TULIP_WRITE(sc, CSR_GPP, 0); 1265 } 1266 1267 /* 1268 * SMC 9332DST media switch. 1269 */ 1270 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1271 1272 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1273 tlp_smc9332dst_tmsw_init, 1274 tlp_21140_gpio_get, 1275 tlp_21140_gpio_set 1276 }; 1277 1278 static void 1279 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1280 { 1281 struct tulip_softc *sc = &psc->sc_tulip; 1282 1283 if (sc->sc_mediasw != NULL) { 1284 return; 1285 } 1286 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1287 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1288 } 1289 1290 static void 1291 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1292 { 1293 struct tulip_21x4x_media *tm; 1294 const char *sep = ""; 1295 uint32_t reg; 1296 int i, cnt; 1297 1298 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1299 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1300 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1301 1302 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1303 tlp_mediastatus); 1304 printf("%s: ", sc->sc_dev.dv_xname); 1305 1306 #define ADD(m, c) \ 1307 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1308 tm->tm_opmode = (c); \ 1309 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1310 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1311 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1312 1313 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1314 PRINT("10baseT"); 1315 1316 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1317 OPMODE_TTM | OPMODE_FD); 1318 PRINT("10baseT-FDX"); 1319 1320 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1321 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1322 PRINT("100baseTX"); 1323 1324 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1325 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1326 PRINT("100baseTX-FDX"); 1327 1328 #undef ADD 1329 #undef PRINT 1330 1331 printf("\n"); 1332 1333 tlp_reset(sc); 1334 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1335 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1336 delay(10); 1337 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1338 delay(200000); 1339 cnt = 0; 1340 for (i = 1000; i > 0; i--) { 1341 reg = TULIP_READ(sc, CSR_GPP); 1342 if ((~reg & (GPP_SMC9332DST_OK10 | 1343 GPP_SMC9332DST_OK100)) == 0) { 1344 if (cnt++ > 100) { 1345 break; 1346 } 1347 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1348 break; 1349 } else { 1350 cnt = 0; 1351 } 1352 delay(1000); 1353 } 1354 if (cnt > 100) { 1355 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1356 } else { 1357 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1358 } 1359 } 1360 1361 static void 1362 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1363 { 1364 struct tulip_softc *sc = &psc->sc_tulip; 1365 char *p1 = (char *) &sc->sc_srom[32]; 1366 char *p2 = &sc->sc_name[0]; 1367 1368 do { 1369 if ((unsigned char) *p1 & 0x80) 1370 *p2++ = ' '; 1371 else 1372 *p2++ = *p1; 1373 } while (*p1++); 1374 } 1375 1376 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1377 1378 static void 1379 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1380 { 1381 struct tulip_softc *sc = &psc->sc_tulip; 1382 1383 /* 1384 * Cobalt Networks interfaces are just MII-on-SIO. 1385 */ 1386 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1387 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1388 1389 /* 1390 * The Cobalt systems tend to fall back to store-and-forward 1391 * pretty quickly, so we select that from the beginning to 1392 * avoid initial timeouts. 1393 */ 1394 sc->sc_txthresh = TXTH_SF; 1395 } 1396 1397 static void 1398 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1399 { 1400 /* 1401 * Reset PHY. 1402 */ 1403 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1404 delay(10); 1405 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1406 delay(10); 1407 } 1408 1409 static void 1410 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1411 { 1412 struct tulip_softc *sc = &psc->sc_tulip; 1413 1414 /* 1415 * Algorithmics boards just have MII-on-SIO. 1416 * 1417 * XXX They also have AUI on the serial interface. 1418 * XXX Deal with this. 1419 */ 1420 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1421 } 1422 1423 /* 1424 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1425 */ 1426 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1427 1428 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1429 tlp_cogent_em1x0_tmsw_init, 1430 tlp_21140_gpio_get, 1431 tlp_21140_gpio_set 1432 }; 1433 1434 static void 1435 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1436 { 1437 struct tulip_softc *sc = &psc->sc_tulip; 1438 uint8_t *srom = sc->sc_srom, id0; 1439 uint16_t id1, id2; 1440 1441 if (sc->sc_mediasw == NULL) { 1442 id0 = srom[32]; 1443 switch (id0) { 1444 case 0x12: 1445 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1446 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1447 break; 1448 1449 case 0x15: 1450 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1451 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1452 break; 1453 1454 #if 0 1455 case XXX: 1456 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1457 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1458 break; 1459 #endif 1460 1461 default: 1462 printf("%s: unknown Cogent board ID 0x%02x\n", 1463 sc->sc_dev.dv_xname, id0); 1464 } 1465 return; 1466 } 1467 1468 id1 = TULIP_ROM_GETW(srom, 0); 1469 id2 = TULIP_ROM_GETW(srom, 2); 1470 if (id1 != 0x1109) { 1471 goto unknown; 1472 } 1473 1474 switch (id2) { 1475 case 0x1900: 1476 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1477 break; 1478 1479 case 0x2400: 1480 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1481 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1482 break; 1483 1484 case 0x2b00: 1485 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1486 break; 1487 1488 case 0x3000: 1489 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1490 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1491 break; 1492 1493 default: 1494 unknown: 1495 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1496 sc->sc_dev.dv_xname, id1, id2); 1497 } 1498 } 1499 1500 static void 1501 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1502 { 1503 struct tulip_21x4x_media *tm; 1504 const char *sep = ""; 1505 1506 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1507 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1508 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1509 1510 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1511 tlp_mediastatus); 1512 printf("%s: ", sc->sc_dev.dv_xname); 1513 1514 #define ADD(m, c) \ 1515 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1516 tm->tm_opmode = (c); \ 1517 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1518 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1519 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1520 1521 if (sc->sc_srom[32] == 0x15) { 1522 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1523 OPMODE_PS | OPMODE_PCS); 1524 PRINT("100baseFX"); 1525 1526 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1527 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1528 PRINT("100baseFX-FDX"); 1529 printf("\n"); 1530 1531 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1532 } else { 1533 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1534 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1535 PRINT("100baseTX"); 1536 1537 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1538 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1539 PRINT("100baseTX-FDX"); 1540 printf("\n"); 1541 1542 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1543 } 1544 1545 #undef ADD 1546 #undef PRINT 1547 } 1548 1549 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1550 1551 static void 1552 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1553 const u_int8_t *enaddr) 1554 { 1555 struct tulip_softc *sc = &psc->sc_tulip; 1556 1557 /* 1558 * Netwinders just use MII-on_SIO. 1559 */ 1560 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1561 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1562 } 1563 1564 void 1565 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1566 { 1567 1568 /* 1569 * Reset the PHY. 1570 */ 1571 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1572 delay(10); 1573 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1574 delay(10); 1575 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1576 delay(10); 1577 } 1578
Indexes created Wed Oct 01 13:09:50 GMT 2025