if_tlp_pci.c revision 1.86.2.5
1 /* $NetBSD: if_tlp_pci.c,v 1.86.2.5 2006/09/03 15:24:22 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.86.2.5 2006/09/03 15:24:22 yamt Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const u_int8_t *); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const u_int8_t *); 210 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 211 const u_int8_t *); 212 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 213 const u_int8_t *); 214 215 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 216 const u_int8_t *); 217 218 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 233 const u_int8_t *); 234 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 235 const u_int8_t *); 236 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 237 const u_int8_t *); 238 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 239 const u_int8_t *); 240 241 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 245 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 248 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 249 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 250 { NULL, { 0, 0, 0 } } 251 }; 252 253 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 254 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 255 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 256 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 257 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 258 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 259 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 260 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 261 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 262 { NULL, { 0, 0, 0 } } 263 }; 264 265 static int tlp_pci_shared_intr(void *); 266 267 static const struct tulip_pci_product * 268 tlp_pci_lookup(const struct pci_attach_args *pa) 269 { 270 const struct tulip_pci_product *tpp; 271 272 /* Don't match lmc cards */ 273 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 274 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 275 return NULL; 276 277 for (tpp = tlp_pci_products; 278 tlp_chip_names[tpp->tpp_chip] != NULL; 279 tpp++) { 280 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 281 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 282 return (tpp); 283 } 284 return (NULL); 285 } 286 287 static void 288 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 289 const struct tlp_pci_quirks *tpq) 290 { 291 292 for (; tpq->tpq_func != NULL; tpq++) { 293 if (tpq->tpq_oui[0] == enaddr[0] && 294 tpq->tpq_oui[1] == enaddr[1] && 295 tpq->tpq_oui[2] == enaddr[2]) { 296 (*tpq->tpq_func)(psc, enaddr); 297 return; 298 } 299 } 300 } 301 302 static void 303 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 304 { 305 extern struct cfdriver tlp_cd; 306 struct tulip_pci_softc *cur, *best = NULL; 307 struct tulip_softc *sc = &psc->sc_tulip; 308 int i; 309 310 /* 311 * First of all, find the lowest pcidev numbered device on our 312 * bus marked as shared. That should be our master. 313 */ 314 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 315 if ((cur = tlp_cd.cd_devs[i]) == NULL) 316 continue; 317 if (device_parent(&cur->sc_tulip.sc_dev) != 318 device_parent(&sc->sc_dev)) 319 continue; 320 if ((cur->sc_flags & shared) == 0) 321 continue; 322 if (cur == psc) 323 continue; 324 if (best == NULL || 325 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 326 best = cur; 327 } 328 329 if (best != NULL) { 330 psc->sc_master = best; 331 psc->sc_flags |= (shared | slaved); 332 } 333 } 334 335 static int 336 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 337 { 338 struct pci_attach_args *pa = aux; 339 340 if (tlp_pci_lookup(pa) != NULL) 341 return (10); /* beat if_de.c */ 342 343 return (0); 344 } 345 346 static void 347 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 348 { 349 struct tulip_pci_softc *psc = (void *) self; 350 struct tulip_softc *sc = &psc->sc_tulip; 351 struct pci_attach_args *pa = aux; 352 pci_chipset_tag_t pc = pa->pa_pc; 353 pci_intr_handle_t ih; 354 const char *intrstr = NULL; 355 bus_space_tag_t iot, memt; 356 bus_space_handle_t ioh, memh; 357 int ioh_valid, memh_valid, i, j; 358 const struct tulip_pci_product *tpp; 359 prop_data_t ea; 360 u_int8_t enaddr[ETHER_ADDR_LEN]; 361 u_int32_t val = 0; 362 pcireg_t reg; 363 int error; 364 365 sc->sc_devno = pa->pa_device; 366 psc->sc_pc = pa->pa_pc; 367 psc->sc_pcitag = pa->pa_tag; 368 369 LIST_INIT(&psc->sc_intrslaves); 370 371 tpp = tlp_pci_lookup(pa); 372 if (tpp == NULL) { 373 printf("\n"); 374 panic("tlp_pci_attach: impossible"); 375 } 376 sc->sc_chip = tpp->tpp_chip; 377 378 /* 379 * By default, Tulip registers are 8 bytes long (4 bytes 380 * followed by a 4 byte pad). 381 */ 382 sc->sc_regshift = 3; 383 384 /* 385 * No power management hooks. 386 * XXX Maybe we should add some! 387 */ 388 sc->sc_flags |= TULIPF_ENABLED; 389 390 /* 391 * Get revision info, and set some chip-specific variables. 392 */ 393 sc->sc_rev = PCI_REVISION(pa->pa_class); 394 switch (sc->sc_chip) { 395 case TULIP_CHIP_21140: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_21140A; 398 break; 399 400 case TULIP_CHIP_21142: 401 if (sc->sc_rev >= 0x20) 402 sc->sc_chip = TULIP_CHIP_21143; 403 break; 404 405 case TULIP_CHIP_82C168: 406 if (sc->sc_rev >= 0x20) 407 sc->sc_chip = TULIP_CHIP_82C169; 408 break; 409 410 case TULIP_CHIP_MX98713: 411 if (sc->sc_rev >= 0x10) 412 sc->sc_chip = TULIP_CHIP_MX98713A; 413 break; 414 415 case TULIP_CHIP_MX98715: 416 if (sc->sc_rev >= 0x20) 417 sc->sc_chip = TULIP_CHIP_MX98715A; 418 if (sc->sc_rev >= 0x25) 419 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 420 if (sc->sc_rev >= 0x30) 421 sc->sc_chip = TULIP_CHIP_MX98725; 422 break; 423 424 case TULIP_CHIP_WB89C840F: 425 sc->sc_regshift = 2; 426 break; 427 428 case TULIP_CHIP_AN985: 429 /* 430 * The AN983 and AN985 are very similar, and are 431 * differentiated by a "signature" register that 432 * is like, but not identical, to a PCI ID register. 433 */ 434 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 435 switch (reg) { 436 case 0x09811317: 437 sc->sc_chip = TULIP_CHIP_AN985; 438 break; 439 440 case 0x09851317: 441 sc->sc_chip = TULIP_CHIP_AN983; 442 break; 443 444 default: 445 /* Unknown -- use default. */ 446 break; 447 } 448 break; 449 450 case TULIP_CHIP_AX88140: 451 if (sc->sc_rev >= 0x10) 452 sc->sc_chip = TULIP_CHIP_AX88141; 453 break; 454 455 case TULIP_CHIP_DM9102: 456 if (sc->sc_rev >= 0x30) 457 sc->sc_chip = TULIP_CHIP_DM9102A; 458 break; 459 460 default: 461 /* Nothing. */ 462 break; 463 } 464 465 printf(": %s Ethernet, pass %d.%d\n", 466 tlp_chip_names[sc->sc_chip], 467 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 468 469 switch (sc->sc_chip) { 470 case TULIP_CHIP_21040: 471 if (sc->sc_rev < 0x20) { 472 printf("%s: 21040 must be at least pass 2.0\n", 473 sc->sc_dev.dv_xname); 474 return; 475 } 476 break; 477 478 case TULIP_CHIP_21140: 479 if (sc->sc_rev < 0x11) { 480 printf("%s: 21140 must be at least pass 1.1\n", 481 sc->sc_dev.dv_xname); 482 return; 483 } 484 break; 485 486 default: 487 /* Nothing. */ 488 break; 489 } 490 491 /* 492 * Check to see if the device is in power-save mode, and 493 * being it out if necessary. 494 */ 495 switch (sc->sc_chip) { 496 case TULIP_CHIP_21140: 497 case TULIP_CHIP_21140A: 498 case TULIP_CHIP_21142: 499 case TULIP_CHIP_21143: 500 case TULIP_CHIP_MX98713A: 501 case TULIP_CHIP_MX98715: 502 case TULIP_CHIP_MX98715A: 503 case TULIP_CHIP_MX98715AEC_X: 504 case TULIP_CHIP_MX98725: 505 case TULIP_CHIP_DM9102: 506 case TULIP_CHIP_DM9102A: 507 case TULIP_CHIP_AX88140: 508 case TULIP_CHIP_AX88141: 509 case TULIP_CHIP_RS7112: 510 /* 511 * Clear the "sleep mode" bit in the CFDA register. 512 */ 513 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 514 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 515 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 516 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 517 break; 518 519 default: 520 /* Nothing. */ 521 break; 522 } 523 524 /* power up chip */ 525 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 526 NULL)) && error != EOPNOTSUPP) { 527 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 528 error); 529 return; 530 } 531 532 /* 533 * Map the device. 534 */ 535 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 536 PCI_MAPREG_TYPE_IO, 0, 537 &iot, &ioh, NULL, NULL) == 0); 538 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 539 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 540 &memt, &memh, NULL, NULL) == 0); 541 542 if (memh_valid) { 543 sc->sc_st = memt; 544 sc->sc_sh = memh; 545 } else if (ioh_valid) { 546 sc->sc_st = iot; 547 sc->sc_sh = ioh; 548 } else { 549 printf("%s: unable to map device registers\n", 550 sc->sc_dev.dv_xname); 551 return; 552 } 553 554 sc->sc_dmat = pa->pa_dmat; 555 556 /* 557 * Make sure bus mastering is enabled. 558 */ 559 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 560 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 561 PCI_COMMAND_MASTER_ENABLE); 562 563 /* 564 * Get the cacheline size. 565 */ 566 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 567 PCI_BHLC_REG)); 568 569 /* 570 * Get PCI data moving command info. 571 */ 572 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 573 sc->sc_flags |= TULIPF_MRL; 574 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 575 sc->sc_flags |= TULIPF_MRM; 576 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 577 sc->sc_flags |= TULIPF_MWI; 578 579 /* 580 * Read the contents of the Ethernet Address ROM/SROM. 581 */ 582 switch (sc->sc_chip) { 583 case TULIP_CHIP_21040: 584 sc->sc_srom_addrbits = 6; 585 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 586 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 587 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 588 for (j = 0; j < 10000; j++) { 589 val = TULIP_READ(sc, CSR_MIIROM); 590 if ((val & MIIROM_DN) == 0) 591 break; 592 } 593 sc->sc_srom[i] = val & MIIROM_DATA; 594 } 595 break; 596 597 case TULIP_CHIP_82C168: 598 case TULIP_CHIP_82C169: 599 { 600 sc->sc_srom_addrbits = 2; 601 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 602 603 /* 604 * The Lite-On PNIC stores the Ethernet address in 605 * the first 3 words of the EEPROM. EEPROM access 606 * is not like the other Tulip chips. 607 */ 608 for (i = 0; i < 6; i += 2) { 609 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 610 PNIC_SROMCTL_READ | (i >> 1)); 611 for (j = 0; j < 500; j++) { 612 delay(2); 613 val = TULIP_READ(sc, CSR_MIIROM); 614 if ((val & PNIC_MIIROM_BUSY) == 0) 615 break; 616 } 617 if (val & PNIC_MIIROM_BUSY) { 618 printf("%s: EEPROM timed out\n", 619 sc->sc_dev.dv_xname); 620 return; 621 } 622 val &= PNIC_MIIROM_DATA; 623 sc->sc_srom[i] = val >> 8; 624 sc->sc_srom[i + 1] = val & 0xff; 625 } 626 break; 627 } 628 629 default: 630 /* 631 * XXX This isn't quite the right way to do this; we should 632 * XXX be attempting to fetch the mac-addr property in the 633 * XXX bus-agnostic part of the driver independently. But 634 * XXX that requires a larger change in the SROM handling 635 * XXX logic, and for now we can at least remove a machine- 636 * XXX dependent wart from the PCI front-end. 637 */ 638 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 639 "mac-addr"); 640 if (ea != NULL) { 641 extern int tlp_srom_debug; 642 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 643 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 644 645 memcpy(enaddr, prop_data_data_nocopy(ea), 646 ETHER_ADDR_LEN); 647 648 sc->sc_srom_addrbits = 6; 649 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 650 M_NOWAIT|M_ZERO); 651 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 652 if (tlp_srom_debug) { 653 printf("SROM CONTENTS:"); 654 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 655 if ((i % 8) == 0) 656 printf("\n\t"); 657 printf("0x%02x ", sc->sc_srom[i]); 658 } 659 printf("\n"); 660 } 661 break; 662 } 663 664 /* Check for a slaved ROM on a multi-port board. */ 665 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 666 TULIP_PCI_SLAVEROM); 667 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 668 sc->sc_srom_addrbits = 669 psc->sc_master->sc_tulip.sc_srom_addrbits; 670 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 671 enaddr[5] += 672 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 673 } 674 else if (tlp_read_srom(sc) == 0) 675 goto cant_cope; 676 break; 677 } 678 679 /* 680 * Deal with chip/board quirks. This includes setting up 681 * the mediasw, and extracting the Ethernet address from 682 * the rombuf. 683 */ 684 switch (sc->sc_chip) { 685 case TULIP_CHIP_21040: 686 /* 687 * Parse the Ethernet Address ROM. 688 */ 689 if (tlp_parse_old_srom(sc, enaddr) == 0) 690 goto cant_cope; 691 692 693 /* 694 * All 21040 boards start out with the same 695 * media switch. 696 */ 697 sc->sc_mediasw = &tlp_21040_mediasw; 698 699 /* 700 * Deal with any quirks this board might have. 701 */ 702 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 703 break; 704 705 case TULIP_CHIP_21041: 706 /* Check for new format SROM. */ 707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 708 /* 709 * Not an ISV SROM; try the old DEC Ethernet Address 710 * ROM format. 711 */ 712 if (tlp_parse_old_srom(sc, enaddr) == 0) 713 goto cant_cope; 714 } 715 716 /* 717 * All 21041 boards use the same media switch; they all 718 * work basically the same! Yippee! 719 */ 720 sc->sc_mediasw = &tlp_21041_mediasw; 721 722 /* 723 * Deal with any quirks this board might have. 724 */ 725 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 726 break; 727 728 case TULIP_CHIP_21140: 729 case TULIP_CHIP_21140A: 730 /* Check for new format SROM. */ 731 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 732 /* 733 * Not an ISV SROM; try the old DEC Ethernet Address 734 * ROM format. 735 */ 736 if (tlp_parse_old_srom(sc, enaddr) == 0) 737 goto cant_cope; 738 } else { 739 /* 740 * We start out with the 2114x ISV media switch. 741 * When we search for quirks, we may change to 742 * a different switch. 743 */ 744 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 745 } 746 747 /* 748 * Deal with any quirks this board might have. 749 */ 750 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 751 752 /* 753 * Bail out now if we can't deal with this board. 754 */ 755 if (sc->sc_mediasw == NULL) 756 goto cant_cope; 757 break; 758 759 case TULIP_CHIP_21142: 760 case TULIP_CHIP_21143: 761 /* Check for new format SROM. */ 762 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 763 /* 764 * Not an ISV SROM; try the old DEC Ethernet Address 765 * ROM format. 766 */ 767 if (tlp_parse_old_srom(sc, enaddr) == 0) { 768 /* 769 * One last try: just copy the address 770 * from offset 20 and try to look 771 * up quirks. 772 */ 773 memcpy(enaddr, &sc->sc_srom[20], 774 ETHER_ADDR_LEN); 775 } 776 } else { 777 /* 778 * We start out with the 2114x ISV media switch. 779 * When we search for quirks, we may change to 780 * a different switch. 781 */ 782 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 783 } 784 785 /* 786 * Deal with any quirks this board might have. 787 */ 788 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 789 790 /* 791 * Bail out now if we can't deal with this board. 792 */ 793 if (sc->sc_mediasw == NULL) 794 goto cant_cope; 795 break; 796 797 case TULIP_CHIP_82C168: 798 case TULIP_CHIP_82C169: 799 /* 800 * Lite-On PNIC's Ethernet address is the first 6 801 * bytes of its EEPROM. 802 */ 803 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 804 805 /* 806 * Lite-On PNICs always use the same mediasw; we 807 * select MII vs. internal NWAY automatically. 808 */ 809 sc->sc_mediasw = &tlp_pnic_mediasw; 810 break; 811 812 case TULIP_CHIP_MX98713: 813 /* 814 * The Macronix MX98713 has an MII and GPIO, but no 815 * internal Nway block. This chip is basically a 816 * perfect 21140A clone, with the exception of the 817 * a magic register frobbing in order to make the 818 * interface function. 819 */ 820 if (tlp_isv_srom_enaddr(sc, enaddr)) { 821 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 822 break; 823 } 824 /* FALLTHROUGH */ 825 826 case TULIP_CHIP_82C115: 827 /* 828 * Yippee! The Lite-On 82C115 is a clone of 829 * the MX98725 (the data sheet even says `MXIC' 830 * on it)! Imagine that, a clone of a clone. 831 * 832 * The differences are really minimal: 833 * 834 * - Wake-On-LAN support 835 * - 128-bit multicast hash table, rather than 836 * the standard 512-bit hash table 837 */ 838 /* FALLTHROUGH */ 839 840 case TULIP_CHIP_MX98713A: 841 case TULIP_CHIP_MX98715A: 842 case TULIP_CHIP_MX98715AEC_X: 843 case TULIP_CHIP_MX98725: 844 /* 845 * The MX98713A has an MII as well as an internal Nway block, 846 * but no GPIO. The MX98715 and MX98725 have an internal 847 * Nway block only. 848 * 849 * The internal Nway block, unlike the Lite-On PNIC's, does 850 * just that - performs Nway. Once autonegotiation completes, 851 * we must program the GPR media information into the chip. 852 * 853 * The byte offset of the Ethernet address is stored at 854 * offset 0x70. 855 */ 856 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 857 sc->sc_mediasw = &tlp_pmac_mediasw; 858 break; 859 860 case TULIP_CHIP_WB89C840F: 861 /* 862 * Winbond 89C840F's Ethernet address is the first 863 * 6 bytes of its EEPROM. 864 */ 865 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 866 867 /* 868 * Winbond 89C840F has an MII attached to the SIO. 869 */ 870 sc->sc_mediasw = &tlp_sio_mii_mediasw; 871 break; 872 873 case TULIP_CHIP_AL981: 874 /* 875 * The ADMtek AL981's Ethernet address is located 876 * at offset 8 of its EEPROM. 877 */ 878 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 879 880 /* 881 * ADMtek AL981 has a built-in PHY accessed through 882 * special registers. 883 */ 884 sc->sc_mediasw = &tlp_al981_mediasw; 885 break; 886 887 case TULIP_CHIP_AN983: 888 case TULIP_CHIP_AN985: 889 /* 890 * The ADMtek AN985's Ethernet address is located 891 * at offset 8 of its EEPROM. 892 */ 893 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 894 895 /* 896 * The ADMtek AN985 can be configured in Single-Chip 897 * mode or MAC-only mode. Single-Chip uses the built-in 898 * PHY, MAC-only has an external PHY (usually HomePNA). 899 * The selection is based on an EEPROM setting, and both 900 * PHYs are accessed via MII attached to SIO. 901 * 902 * The AN985 "ghosts" the internal PHY onto all 903 * MII addresses, so we have to use a media init 904 * routine that limits the search. 905 * XXX How does this work with MAC-only mode? 906 */ 907 sc->sc_mediasw = &tlp_an985_mediasw; 908 break; 909 910 case TULIP_CHIP_DM9102: 911 case TULIP_CHIP_DM9102A: 912 /* 913 * Some boards with the Davicom chip have an ISV 914 * SROM (mostly DM9102A boards -- trying to describe 915 * the HomePNA PHY, probably) although the data in 916 * them is generally wrong. Check for ISV format 917 * and grab the Ethernet address that way, and if 918 * that fails, fall back on grabbing it from an 919 * observed offset of 20 (which is where it would 920 * be in an ISV SROM anyhow, tho ISV can cope with 921 * multi-port boards). 922 */ 923 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 924 #ifdef __sparc__ 925 if ((sc->sc_srom[20] == 0 && 926 sc->sc_srom[21] == 0 && 927 sc->sc_srom[22] == 0) || 928 (sc->sc_srom[20] == 0xff && 929 sc->sc_srom[21] == 0xff && 930 sc->sc_srom[22] == 0xff)) { 931 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 932 } else 933 #endif 934 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 935 } 936 937 /* 938 * Davicom chips all have an internal MII interface 939 * and a built-in PHY. DM9102A also has a an external 940 * MII interface, usually with a HomePNA PHY attached 941 * to it. 942 */ 943 sc->sc_mediasw = &tlp_dm9102_mediasw; 944 break; 945 946 case TULIP_CHIP_AX88140: 947 case TULIP_CHIP_AX88141: 948 /* 949 * ASIX AX88140/AX88141 Ethernet Address is located at offset 950 * 20 of the SROM. 951 */ 952 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 953 954 /* 955 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 956 * an external MII interface. 957 */ 958 sc->sc_mediasw = &tlp_asix_mediasw; 959 break; 960 961 case TULIP_CHIP_RS7112: 962 /* 963 * RS7112 Ethernet Address is located of offset 0x19a 964 * of the SROM 965 */ 966 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 967 968 /* RS7112 chip has a PHY at MII address 1 */ 969 sc->sc_mediasw = &tlp_rs7112_mediasw; 970 break; 971 972 default: 973 cant_cope: 974 printf("%s: sorry, unable to handle your board\n", 975 sc->sc_dev.dv_xname); 976 return; 977 } 978 979 /* 980 * Handle shared interrupts. 981 */ 982 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 983 if (psc->sc_master) 984 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 985 else { 986 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 987 TULIP_PCI_SLAVEINTR); 988 if (psc->sc_master == NULL) 989 psc->sc_master = psc; 990 } 991 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 992 psc, sc_intrq); 993 } 994 995 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 996 printf("%s: sharing interrupt with %s\n", 997 sc->sc_dev.dv_xname, 998 psc->sc_master->sc_tulip.sc_dev.dv_xname); 999 } else { 1000 /* 1001 * Map and establish our interrupt. 1002 */ 1003 if (pci_intr_map(pa, &ih)) { 1004 printf("%s: unable to map interrupt\n", 1005 sc->sc_dev.dv_xname); 1006 return; 1007 } 1008 intrstr = pci_intr_string(pc, ih); 1009 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1010 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1011 tlp_pci_shared_intr : tlp_intr, sc); 1012 if (psc->sc_ih == NULL) { 1013 printf("%s: unable to establish interrupt", 1014 sc->sc_dev.dv_xname); 1015 if (intrstr != NULL) 1016 printf(" at %s", intrstr); 1017 printf("\n"); 1018 return; 1019 } 1020 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1021 intrstr); 1022 } 1023 1024 /* 1025 * Finish off the attach. 1026 */ 1027 tlp_attach(sc, enaddr); 1028 } 1029 1030 static int 1031 tlp_pci_shared_intr(void *arg) 1032 { 1033 struct tulip_pci_softc *master = arg, *slave; 1034 int rv = 0; 1035 1036 for (slave = LIST_FIRST(&master->sc_intrslaves); 1037 slave != NULL; 1038 slave = LIST_NEXT(slave, sc_intrq)) 1039 rv |= tlp_intr(&slave->sc_tulip); 1040 1041 return (rv); 1042 } 1043 1044 static void 1045 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1046 { 1047 struct tulip_softc *sc = &psc->sc_tulip; 1048 1049 /* 1050 * This isn't really a quirk-gathering device, really. We 1051 * just want to get the spiffy DEC board name from the SROM. 1052 */ 1053 strcpy(sc->sc_name, "DEC "); 1054 1055 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1056 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1057 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1058 else 1059 sc->sc_name[3] = '\0'; 1060 } 1061 1062 static void 1063 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1064 { 1065 struct tulip_softc *sc = &psc->sc_tulip; 1066 u_int16_t id = 0; 1067 1068 /* 1069 * If we have a slaved ROM, just copy the bits from the master. 1070 * This is in case we fail the ROM ID check (older boards) and 1071 * need to fall back on Ethernet address model checking; that 1072 * will fail for slave chips. 1073 */ 1074 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1075 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1076 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1077 psc->sc_flags |= 1078 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1079 return; 1080 } 1081 1082 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1083 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1084 switch (id) { 1085 zx312: 1086 case 0x0602: /* ZX312 */ 1087 strcpy(sc->sc_name, "ZNYX ZX312"); 1088 return; 1089 1090 case 0x0622: /* ZX312T */ 1091 strcpy(sc->sc_name, "ZNYX ZX312T"); 1092 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1093 return; 1094 1095 zx314_inta: 1096 case 0x0701: /* ZX314 INTA */ 1097 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1098 /* FALLTHROUGH */ 1099 case 0x0711: /* ZX314 */ 1100 strcpy(sc->sc_name, "ZNYX ZX314"); 1101 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1102 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1103 return; 1104 1105 zx315_inta: 1106 case 0x0801: /* ZX315 INTA */ 1107 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1108 /* FALLTHROUGH */ 1109 case 0x0811: /* ZX315 */ 1110 strcpy(sc->sc_name, "ZNYX ZX315"); 1111 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1112 return; 1113 1114 default: 1115 id = 0; 1116 break; 1117 } 1118 } 1119 1120 /* 1121 * Deal with boards that have broken ROMs. 1122 */ 1123 if (id == 0) { 1124 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1125 goto zx314_inta; 1126 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1127 goto zx315_inta; 1128 if ((enaddr[3] & ~3) == 0xec) 1129 goto zx312; 1130 } 1131 1132 strcpy(sc->sc_name, "ZNYX ZX31x"); 1133 } 1134 1135 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1136 1137 static void 1138 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1139 { 1140 struct tulip_softc *sc = &psc->sc_tulip; 1141 pcireg_t subid; 1142 1143 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1144 1145 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1146 return; /* ? */ 1147 1148 switch (PCI_PRODUCT(subid) & 0xff) { 1149 /* 1150 * ZNYX 21143 boards with QS6611 PHY 1151 */ 1152 case 0x12: /* ZX345Q */ 1153 case 0x13: /* ZX346Q */ 1154 case 0x14: /* ZX348Q */ 1155 case 0x18: /* ZX414 */ 1156 case 0x19: /* ZX412 */ 1157 case 0x1a: /* ZX444 */ 1158 case 0x1b: /* ZX442 */ 1159 case 0x23: /* ZX212 */ 1160 case 0x24: /* ZX214 */ 1161 case 0x29: /* ZX374 */ 1162 case 0x2d: /* ZX372 */ 1163 case 0x2b: /* ZX244 */ 1164 case 0x2c: /* ZX424 */ 1165 case 0x2e: /* ZX422 */ 1166 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1167 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1168 break; 1169 } 1170 } 1171 1172 static void 1173 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1174 { 1175 1176 /* 1177 * Reset QS6611 PHY. 1178 */ 1179 TULIP_WRITE(sc, CSR_SIAGEN, 1180 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1181 delay(200); 1182 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1183 delay(10000); 1184 } 1185 1186 static void 1187 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1188 { 1189 struct tulip_softc *sc = &psc->sc_tulip; 1190 u_int16_t id1, id2, ei; 1191 int auibnc = 0, utp = 0; 1192 char *cp; 1193 1194 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1195 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1196 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1197 1198 strcpy(sc->sc_name, "SMC 8432"); 1199 cp = &sc->sc_name[8]; 1200 1201 if ((id1 & 1) == 0) { 1202 *cp++ = 'B'; 1203 auibnc = 1; 1204 } 1205 if ((id1 & 0xff) > 0x32) { 1206 *cp++ = 'T'; 1207 utp = 1; 1208 } 1209 if ((id1 & 0x4000) == 0) { 1210 *cp++ = 'A'; 1211 auibnc = 1; 1212 } 1213 if (id2 == 0x15) { 1214 sc->sc_name[7] = '4'; 1215 *cp++ = '-'; 1216 *cp++ = 'C'; 1217 *cp++ = 'H'; 1218 *cp++ = ei ? '2' : '1'; 1219 } 1220 *cp = '\0'; 1221 1222 if (utp != 0 && auibnc == 0) 1223 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1224 else if (utp == 0 && auibnc != 0) 1225 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1226 } 1227 1228 static void 1229 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1230 { 1231 1232 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1233 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1234 } 1235 1236 static void 1237 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1238 { 1239 1240 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1241 } 1242 1243 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1244 1245 static void 1246 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1247 { 1248 struct tulip_softc *sc = &psc->sc_tulip; 1249 1250 /* 1251 * Some Asante boards don't use the ISV SROM format. For 1252 * those that don't, we initialize the GPIO direction bits, 1253 * and provide our own reset hook, which resets the MII. 1254 * 1255 * All of these boards use SIO-attached-MII media. 1256 */ 1257 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1258 return; 1259 1260 strcpy(sc->sc_name, "Asante"); 1261 1262 sc->sc_gp_dir = 0xbf; 1263 sc->sc_reset = tlp_pci_asante_21140_reset; 1264 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1265 } 1266 1267 static void 1268 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1269 { 1270 1271 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1272 TULIP_WRITE(sc, CSR_GPP, 0x8); 1273 delay(100); 1274 TULIP_WRITE(sc, CSR_GPP, 0); 1275 } 1276 1277 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1278 1279 static void 1280 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1281 { 1282 struct tulip_softc *sc = &psc->sc_tulip; 1283 1284 /* 1285 * Phobo boards just use MII-on_SIO. 1286 */ 1287 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1288 sc->sc_reset = tlp_pci_phobos_21140_reset; 1289 1290 /* 1291 * These boards appear solely on sgimips machines behind a special 1292 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1293 */ 1294 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1295 } 1296 1297 static void 1298 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1299 { 1300 1301 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1302 delay(10); 1303 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1304 delay(10); 1305 TULIP_WRITE(sc, CSR_GPP, 0); 1306 } 1307 1308 /* 1309 * SMC 9332DST media switch. 1310 */ 1311 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1312 1313 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1314 tlp_smc9332dst_tmsw_init, 1315 tlp_21140_gpio_get, 1316 tlp_21140_gpio_set 1317 }; 1318 1319 static void 1320 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1321 { 1322 struct tulip_softc *sc = &psc->sc_tulip; 1323 1324 if (sc->sc_mediasw != NULL) { 1325 return; 1326 } 1327 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1328 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1329 } 1330 1331 static void 1332 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1333 { 1334 struct tulip_21x4x_media *tm; 1335 const char *sep = ""; 1336 uint32_t reg; 1337 int i, cnt; 1338 1339 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1340 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1341 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1342 1343 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1344 tlp_mediastatus); 1345 printf("%s: ", sc->sc_dev.dv_xname); 1346 1347 #define ADD(m, c) \ 1348 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1349 tm->tm_opmode = (c); \ 1350 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1351 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1352 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1353 1354 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1355 PRINT("10baseT"); 1356 1357 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1358 OPMODE_TTM | OPMODE_FD); 1359 PRINT("10baseT-FDX"); 1360 1361 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1362 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1363 PRINT("100baseTX"); 1364 1365 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1366 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1367 PRINT("100baseTX-FDX"); 1368 1369 #undef ADD 1370 #undef PRINT 1371 1372 printf("\n"); 1373 1374 tlp_reset(sc); 1375 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1376 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1377 delay(10); 1378 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1379 delay(200000); 1380 cnt = 0; 1381 for (i = 1000; i > 0; i--) { 1382 reg = TULIP_READ(sc, CSR_GPP); 1383 if ((~reg & (GPP_SMC9332DST_OK10 | 1384 GPP_SMC9332DST_OK100)) == 0) { 1385 if (cnt++ > 100) { 1386 break; 1387 } 1388 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1389 break; 1390 } else { 1391 cnt = 0; 1392 } 1393 delay(1000); 1394 } 1395 if (cnt > 100) { 1396 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1397 } else { 1398 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1399 } 1400 } 1401 1402 static void 1403 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1404 { 1405 struct tulip_softc *sc = &psc->sc_tulip; 1406 char *p1 = (char *) &sc->sc_srom[32]; 1407 char *p2 = &sc->sc_name[0]; 1408 1409 do { 1410 if ((unsigned char) *p1 & 0x80) 1411 *p2++ = ' '; 1412 else 1413 *p2++ = *p1; 1414 } while (*p1++); 1415 } 1416 1417 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1418 1419 static void 1420 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1421 { 1422 struct tulip_softc *sc = &psc->sc_tulip; 1423 1424 /* 1425 * Cobalt Networks interfaces are just MII-on-SIO. 1426 */ 1427 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1428 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1429 1430 /* 1431 * The Cobalt systems tend to fall back to store-and-forward 1432 * pretty quickly, so we select that from the beginning to 1433 * avoid initial timeouts. 1434 */ 1435 sc->sc_txthresh = TXTH_SF; 1436 } 1437 1438 static void 1439 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1440 { 1441 /* 1442 * Reset PHY. 1443 */ 1444 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1445 delay(10); 1446 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1447 delay(10); 1448 } 1449 1450 static void 1451 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1452 { 1453 struct tulip_softc *sc = &psc->sc_tulip; 1454 1455 /* 1456 * Algorithmics boards just have MII-on-SIO. 1457 * 1458 * XXX They also have AUI on the serial interface. 1459 * XXX Deal with this. 1460 */ 1461 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1462 } 1463 1464 /* 1465 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1466 */ 1467 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1468 1469 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1470 tlp_cogent_em1x0_tmsw_init, 1471 tlp_21140_gpio_get, 1472 tlp_21140_gpio_set 1473 }; 1474 1475 static void 1476 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1477 { 1478 struct tulip_softc *sc = &psc->sc_tulip; 1479 uint8_t *srom = sc->sc_srom, id0; 1480 uint16_t id1, id2; 1481 1482 if (sc->sc_mediasw == NULL) { 1483 id0 = srom[32]; 1484 switch (id0) { 1485 case 0x12: 1486 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1487 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1488 break; 1489 1490 case 0x15: 1491 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1492 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1493 break; 1494 1495 #if 0 1496 case XXX: 1497 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1498 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1499 break; 1500 #endif 1501 1502 default: 1503 printf("%s: unknown Cogent board ID 0x%02x\n", 1504 sc->sc_dev.dv_xname, id0); 1505 } 1506 return; 1507 } 1508 1509 id1 = TULIP_ROM_GETW(srom, 0); 1510 id2 = TULIP_ROM_GETW(srom, 2); 1511 if (id1 != 0x1109) { 1512 goto unknown; 1513 } 1514 1515 switch (id2) { 1516 case 0x1900: 1517 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1518 break; 1519 1520 case 0x2400: 1521 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1522 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1523 break; 1524 1525 case 0x2b00: 1526 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1527 break; 1528 1529 case 0x3000: 1530 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1531 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1532 break; 1533 1534 default: 1535 unknown: 1536 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1537 sc->sc_dev.dv_xname, id1, id2); 1538 } 1539 } 1540 1541 static void 1542 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1543 { 1544 struct tulip_21x4x_media *tm; 1545 const char *sep = ""; 1546 1547 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1548 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1549 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1550 1551 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1552 tlp_mediastatus); 1553 printf("%s: ", sc->sc_dev.dv_xname); 1554 1555 #define ADD(m, c) \ 1556 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1557 tm->tm_opmode = (c); \ 1558 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1559 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1560 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1561 1562 if (sc->sc_srom[32] == 0x15) { 1563 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1564 OPMODE_PS | OPMODE_PCS); 1565 PRINT("100baseFX"); 1566 1567 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1568 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1569 PRINT("100baseFX-FDX"); 1570 printf("\n"); 1571 1572 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1573 } else { 1574 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1575 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1576 PRINT("100baseTX"); 1577 1578 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1579 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1580 PRINT("100baseTX-FDX"); 1581 printf("\n"); 1582 1583 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1584 } 1585 1586 #undef ADD 1587 #undef PRINT 1588 } 1589 1590 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1591 1592 static void 1593 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1594 const u_int8_t *enaddr) 1595 { 1596 struct tulip_softc *sc = &psc->sc_tulip; 1597 1598 /* 1599 * Netwinders just use MII-on_SIO. 1600 */ 1601 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1602 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1603 } 1604 1605 void 1606 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1607 { 1608 1609 /* 1610 * Reset the PHY. 1611 */ 1612 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1613 delay(10); 1614 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1615 delay(10); 1616 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1617 delay(10); 1618 } 1619 1620 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1621 1622 static void 1623 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1624 { 1625 struct tulip_softc *sc = &psc->sc_tulip; 1626 1627 /* 1628 * Phobo boards just use MII-on_SIO. 1629 */ 1630 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1631 sc->sc_reset = tlp_pci_phobos_21142_reset; 1632 1633 /* 1634 * These boards appear solely on sgimips machines behind a special 1635 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1636 */ 1637 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1638 } 1639 1640 static void 1641 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1642 { 1643 /* 1644 * Reset PHY. 1645 */ 1646 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1647 delay(10); 1648 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1649 delay(10); 1650 } 1651
Indexes created Wed Oct 01 13:09:50 GMT 2025