if_tlp_pci.c revision 1.88
1 /* $NetBSD: if_tlp_pci.c,v 1.88 2006/03/25 23:10:50 rpaulo Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.88 2006/03/25 23:10:50 rpaulo Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 176 TULIP_CHIP_RS7112 }, 177 178 { 0, 0, 179 TULIP_CHIP_INVALID }, 180 }; 181 182 struct tlp_pci_quirks { 183 void (*tpq_func)(struct tulip_pci_softc *, 184 const u_int8_t *); 185 u_int8_t tpq_oui[3]; 186 }; 187 188 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 191 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 192 const u_int8_t *); 193 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 194 const u_int8_t *); 195 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 200 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 201 const u_int8_t *); 202 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 203 const u_int8_t *); 204 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 210 const u_int8_t *); 211 212 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 213 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 214 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 215 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 216 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 221 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 222 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 227 const u_int8_t *); 228 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 229 const u_int8_t *); 230 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 231 const u_int8_t *); 232 233 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 238 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 239 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 240 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 241 { NULL, { 0, 0, 0 } } 242 }; 243 244 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 245 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 246 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 247 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 248 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 251 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 252 { NULL, { 0, 0, 0 } } 253 }; 254 255 static int tlp_pci_shared_intr(void *); 256 257 static const struct tulip_pci_product * 258 tlp_pci_lookup(const struct pci_attach_args *pa) 259 { 260 const struct tulip_pci_product *tpp; 261 262 for (tpp = tlp_pci_products; 263 tlp_chip_names[tpp->tpp_chip] != NULL; 264 tpp++) { 265 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 266 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 267 return (tpp); 268 } 269 return (NULL); 270 } 271 272 static void 273 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 274 const struct tlp_pci_quirks *tpq) 275 { 276 277 for (; tpq->tpq_func != NULL; tpq++) { 278 if (tpq->tpq_oui[0] == enaddr[0] && 279 tpq->tpq_oui[1] == enaddr[1] && 280 tpq->tpq_oui[2] == enaddr[2]) { 281 (*tpq->tpq_func)(psc, enaddr); 282 return; 283 } 284 } 285 } 286 287 static void 288 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 289 { 290 extern struct cfdriver tlp_cd; 291 struct tulip_pci_softc *cur, *best = NULL; 292 struct tulip_softc *sc = &psc->sc_tulip; 293 int i; 294 295 /* 296 * First of all, find the lowest pcidev numbered device on our 297 * bus marked as shared. That should be our master. 298 */ 299 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 300 if ((cur = tlp_cd.cd_devs[i]) == NULL) 301 continue; 302 if (device_parent(&cur->sc_tulip.sc_dev) != 303 device_parent(&sc->sc_dev)) 304 continue; 305 if ((cur->sc_flags & shared) == 0) 306 continue; 307 if (cur == psc) 308 continue; 309 if (best == NULL || 310 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 311 best = cur; 312 } 313 314 if (best != NULL) { 315 psc->sc_master = best; 316 psc->sc_flags |= (shared | slaved); 317 } 318 } 319 320 static int 321 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 322 { 323 struct pci_attach_args *pa = aux; 324 325 if (tlp_pci_lookup(pa) != NULL) 326 return (10); /* beat if_de.c */ 327 328 return (0); 329 } 330 331 static void 332 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 333 { 334 struct tulip_pci_softc *psc = (void *) self; 335 struct tulip_softc *sc = &psc->sc_tulip; 336 struct pci_attach_args *pa = aux; 337 pci_chipset_tag_t pc = pa->pa_pc; 338 pci_intr_handle_t ih; 339 const char *intrstr = NULL; 340 bus_space_tag_t iot, memt; 341 bus_space_handle_t ioh, memh; 342 int ioh_valid, memh_valid, i, j; 343 const struct tulip_pci_product *tpp; 344 u_int8_t enaddr[ETHER_ADDR_LEN]; 345 u_int32_t val = 0; 346 pcireg_t reg; 347 int pmreg; 348 349 sc->sc_devno = pa->pa_device; 350 psc->sc_pc = pa->pa_pc; 351 psc->sc_pcitag = pa->pa_tag; 352 353 LIST_INIT(&psc->sc_intrslaves); 354 355 tpp = tlp_pci_lookup(pa); 356 if (tpp == NULL) { 357 printf("\n"); 358 panic("tlp_pci_attach: impossible"); 359 } 360 sc->sc_chip = tpp->tpp_chip; 361 362 /* 363 * By default, Tulip registers are 8 bytes long (4 bytes 364 * followed by a 4 byte pad). 365 */ 366 sc->sc_regshift = 3; 367 368 /* 369 * No power management hooks. 370 * XXX Maybe we should add some! 371 */ 372 sc->sc_flags |= TULIPF_ENABLED; 373 374 /* 375 * Get revision info, and set some chip-specific variables. 376 */ 377 sc->sc_rev = PCI_REVISION(pa->pa_class); 378 switch (sc->sc_chip) { 379 case TULIP_CHIP_21140: 380 if (sc->sc_rev >= 0x20) 381 sc->sc_chip = TULIP_CHIP_21140A; 382 break; 383 384 case TULIP_CHIP_21142: 385 if (sc->sc_rev >= 0x20) 386 sc->sc_chip = TULIP_CHIP_21143; 387 break; 388 389 case TULIP_CHIP_82C168: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_82C169; 392 break; 393 394 case TULIP_CHIP_MX98713: 395 if (sc->sc_rev >= 0x10) 396 sc->sc_chip = TULIP_CHIP_MX98713A; 397 break; 398 399 case TULIP_CHIP_MX98715: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_MX98715A; 402 if (sc->sc_rev >= 0x25) 403 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 404 if (sc->sc_rev >= 0x30) 405 sc->sc_chip = TULIP_CHIP_MX98725; 406 break; 407 408 case TULIP_CHIP_WB89C840F: 409 sc->sc_regshift = 2; 410 break; 411 412 case TULIP_CHIP_AN985: 413 /* 414 * The AN983 and AN985 are very similar, and are 415 * differentiated by a "signature" register that 416 * is like, but not identical, to a PCI ID register. 417 */ 418 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 419 switch (reg) { 420 case 0x09811317: 421 sc->sc_chip = TULIP_CHIP_AN985; 422 break; 423 424 case 0x09851317: 425 sc->sc_chip = TULIP_CHIP_AN983; 426 break; 427 428 default: 429 /* Unknown -- use default. */ 430 break; 431 } 432 break; 433 434 case TULIP_CHIP_AX88140: 435 if (sc->sc_rev >= 0x10) 436 sc->sc_chip = TULIP_CHIP_AX88141; 437 break; 438 439 case TULIP_CHIP_DM9102: 440 if (sc->sc_rev >= 0x30) 441 sc->sc_chip = TULIP_CHIP_DM9102A; 442 break; 443 444 default: 445 /* Nothing. */ 446 break; 447 } 448 449 printf(": %s Ethernet, pass %d.%d\n", 450 tlp_chip_names[sc->sc_chip], 451 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 452 453 switch (sc->sc_chip) { 454 case TULIP_CHIP_21040: 455 if (sc->sc_rev < 0x20) { 456 printf("%s: 21040 must be at least pass 2.0\n", 457 sc->sc_dev.dv_xname); 458 return; 459 } 460 break; 461 462 case TULIP_CHIP_21140: 463 if (sc->sc_rev < 0x11) { 464 printf("%s: 21140 must be at least pass 1.1\n", 465 sc->sc_dev.dv_xname); 466 return; 467 } 468 break; 469 470 default: 471 /* Nothing. */ 472 break; 473 } 474 475 /* 476 * Check to see if the device is in power-save mode, and 477 * being it out if necessary. 478 */ 479 switch (sc->sc_chip) { 480 case TULIP_CHIP_21140: 481 case TULIP_CHIP_21140A: 482 case TULIP_CHIP_21142: 483 case TULIP_CHIP_21143: 484 case TULIP_CHIP_MX98713A: 485 case TULIP_CHIP_MX98715: 486 case TULIP_CHIP_MX98715A: 487 case TULIP_CHIP_MX98715AEC_X: 488 case TULIP_CHIP_MX98725: 489 case TULIP_CHIP_DM9102: 490 case TULIP_CHIP_DM9102A: 491 case TULIP_CHIP_AX88140: 492 case TULIP_CHIP_AX88141: 493 case TULIP_CHIP_RS7112: 494 /* 495 * Clear the "sleep mode" bit in the CFDA register. 496 */ 497 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 498 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 499 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 500 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 501 break; 502 503 default: 504 /* Nothing. */ 505 break; 506 } 507 508 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 509 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 510 switch (reg & PCI_PMCSR_STATE_MASK) { 511 case PCI_PMCSR_STATE_D1: 512 case PCI_PMCSR_STATE_D2: 513 printf("%s: waking up from power state D%d\n%s", 514 sc->sc_dev.dv_xname, 515 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 516 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 517 (reg & ~PCI_PMCSR_STATE_MASK) | 518 PCI_PMCSR_STATE_D0); 519 break; 520 case PCI_PMCSR_STATE_D3: 521 /* 522 * The card has lost all configuration data in 523 * this state, so punt. 524 */ 525 printf("%s: unable to wake up from power state D3, " 526 "reboot required.\n", sc->sc_dev.dv_xname); 527 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 528 (reg & ~PCI_PMCSR_STATE_MASK) | 529 PCI_PMCSR_STATE_D0); 530 return; 531 } 532 } 533 534 /* 535 * Map the device. 536 */ 537 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 538 PCI_MAPREG_TYPE_IO, 0, 539 &iot, &ioh, NULL, NULL) == 0); 540 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 541 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 542 &memt, &memh, NULL, NULL) == 0); 543 544 if (memh_valid) { 545 sc->sc_st = memt; 546 sc->sc_sh = memh; 547 } else if (ioh_valid) { 548 sc->sc_st = iot; 549 sc->sc_sh = ioh; 550 } else { 551 printf("%s: unable to map device registers\n", 552 sc->sc_dev.dv_xname); 553 return; 554 } 555 556 sc->sc_dmat = pa->pa_dmat; 557 558 /* 559 * Make sure bus mastering is enabled. 560 */ 561 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 562 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 563 PCI_COMMAND_MASTER_ENABLE); 564 565 /* 566 * Get the cacheline size. 567 */ 568 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 569 PCI_BHLC_REG)); 570 571 /* 572 * Get PCI data moving command info. 573 */ 574 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 575 sc->sc_flags |= TULIPF_MRL; 576 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 577 sc->sc_flags |= TULIPF_MRM; 578 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 579 sc->sc_flags |= TULIPF_MWI; 580 581 /* 582 * Read the contents of the Ethernet Address ROM/SROM. 583 */ 584 switch (sc->sc_chip) { 585 case TULIP_CHIP_21040: 586 sc->sc_srom_addrbits = 6; 587 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 588 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 589 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 590 for (j = 0; j < 10000; j++) { 591 val = TULIP_READ(sc, CSR_MIIROM); 592 if ((val & MIIROM_DN) == 0) 593 break; 594 } 595 sc->sc_srom[i] = val & MIIROM_DATA; 596 } 597 break; 598 599 case TULIP_CHIP_82C168: 600 case TULIP_CHIP_82C169: 601 { 602 sc->sc_srom_addrbits = 2; 603 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 604 605 /* 606 * The Lite-On PNIC stores the Ethernet address in 607 * the first 3 words of the EEPROM. EEPROM access 608 * is not like the other Tulip chips. 609 */ 610 for (i = 0; i < 6; i += 2) { 611 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 612 PNIC_SROMCTL_READ | (i >> 1)); 613 for (j = 0; j < 500; j++) { 614 delay(2); 615 val = TULIP_READ(sc, CSR_MIIROM); 616 if ((val & PNIC_MIIROM_BUSY) == 0) 617 break; 618 } 619 if (val & PNIC_MIIROM_BUSY) { 620 printf("%s: EEPROM timed out\n", 621 sc->sc_dev.dv_xname); 622 return; 623 } 624 val &= PNIC_MIIROM_DATA; 625 sc->sc_srom[i] = val >> 8; 626 sc->sc_srom[i + 1] = val & 0xff; 627 } 628 break; 629 } 630 631 default: 632 /* 633 * XXX This isn't quite the right way to do this; we should 634 * XXX be attempting to fetch the mac-addr property in the 635 * XXX bus-agnostic part of the driver independently. But 636 * XXX that requires a larger change in the SROM handling 637 * XXX logic, and for now we can at least remove a machine- 638 * XXX dependent wart from the PCI front-end. 639 */ 640 if (devprop_get(&sc->sc_dev, "mac-addr", 641 enaddr, sizeof(enaddr), NULL) == sizeof(enaddr)) { 642 extern int tlp_srom_debug; 643 sc->sc_srom_addrbits = 6; 644 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 645 M_NOWAIT|M_ZERO); 646 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 647 if (tlp_srom_debug) { 648 printf("SROM CONTENTS:"); 649 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 650 if ((i % 8) == 0) 651 printf("\n\t"); 652 printf("0x%02x ", sc->sc_srom[i]); 653 } 654 printf("\n"); 655 } 656 break; 657 } 658 659 /* Check for a slaved ROM on a multi-port board. */ 660 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 661 TULIP_PCI_SLAVEROM); 662 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 663 sc->sc_srom_addrbits = 664 psc->sc_master->sc_tulip.sc_srom_addrbits; 665 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 666 enaddr[5] += 667 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 668 } 669 else if (tlp_read_srom(sc) == 0) 670 goto cant_cope; 671 break; 672 } 673 674 /* 675 * Deal with chip/board quirks. This includes setting up 676 * the mediasw, and extracting the Ethernet address from 677 * the rombuf. 678 */ 679 switch (sc->sc_chip) { 680 case TULIP_CHIP_21040: 681 /* 682 * Parse the Ethernet Address ROM. 683 */ 684 if (tlp_parse_old_srom(sc, enaddr) == 0) 685 goto cant_cope; 686 687 688 /* 689 * All 21040 boards start out with the same 690 * media switch. 691 */ 692 sc->sc_mediasw = &tlp_21040_mediasw; 693 694 /* 695 * Deal with any quirks this board might have. 696 */ 697 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 698 break; 699 700 case TULIP_CHIP_21041: 701 /* Check for new format SROM. */ 702 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 703 /* 704 * Not an ISV SROM; try the old DEC Ethernet Address 705 * ROM format. 706 */ 707 if (tlp_parse_old_srom(sc, enaddr) == 0) 708 goto cant_cope; 709 } 710 711 /* 712 * All 21041 boards use the same media switch; they all 713 * work basically the same! Yippee! 714 */ 715 sc->sc_mediasw = &tlp_21041_mediasw; 716 717 /* 718 * Deal with any quirks this board might have. 719 */ 720 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 721 break; 722 723 case TULIP_CHIP_21140: 724 case TULIP_CHIP_21140A: 725 /* Check for new format SROM. */ 726 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 727 /* 728 * Not an ISV SROM; try the old DEC Ethernet Address 729 * ROM format. 730 */ 731 if (tlp_parse_old_srom(sc, enaddr) == 0) 732 goto cant_cope; 733 } else { 734 /* 735 * We start out with the 2114x ISV media switch. 736 * When we search for quirks, we may change to 737 * a different switch. 738 */ 739 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 740 } 741 742 /* 743 * Deal with any quirks this board might have. 744 */ 745 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 746 747 /* 748 * Bail out now if we can't deal with this board. 749 */ 750 if (sc->sc_mediasw == NULL) 751 goto cant_cope; 752 break; 753 754 case TULIP_CHIP_21142: 755 case TULIP_CHIP_21143: 756 /* Check for new format SROM. */ 757 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 758 /* 759 * Not an ISV SROM; try the old DEC Ethernet Address 760 * ROM format. 761 */ 762 if (tlp_parse_old_srom(sc, enaddr) == 0) { 763 /* 764 * One last try: just copy the address 765 * from offset 20 and try to look 766 * up quirks. 767 */ 768 memcpy(enaddr, &sc->sc_srom[20], 769 ETHER_ADDR_LEN); 770 } 771 } else { 772 /* 773 * We start out with the 2114x ISV media switch. 774 * When we search for quirks, we may change to 775 * a different switch. 776 */ 777 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 778 } 779 780 /* 781 * Deal with any quirks this board might have. 782 */ 783 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 784 785 /* 786 * Bail out now if we can't deal with this board. 787 */ 788 if (sc->sc_mediasw == NULL) 789 goto cant_cope; 790 break; 791 792 case TULIP_CHIP_82C168: 793 case TULIP_CHIP_82C169: 794 /* 795 * Lite-On PNIC's Ethernet address is the first 6 796 * bytes of its EEPROM. 797 */ 798 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 799 800 /* 801 * Lite-On PNICs always use the same mediasw; we 802 * select MII vs. internal NWAY automatically. 803 */ 804 sc->sc_mediasw = &tlp_pnic_mediasw; 805 break; 806 807 case TULIP_CHIP_MX98713: 808 /* 809 * The Macronix MX98713 has an MII and GPIO, but no 810 * internal Nway block. This chip is basically a 811 * perfect 21140A clone, with the exception of the 812 * a magic register frobbing in order to make the 813 * interface function. 814 */ 815 if (tlp_isv_srom_enaddr(sc, enaddr)) { 816 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 817 break; 818 } 819 /* FALLTHROUGH */ 820 821 case TULIP_CHIP_82C115: 822 /* 823 * Yippee! The Lite-On 82C115 is a clone of 824 * the MX98725 (the data sheet even says `MXIC' 825 * on it)! Imagine that, a clone of a clone. 826 * 827 * The differences are really minimal: 828 * 829 * - Wake-On-LAN support 830 * - 128-bit multicast hash table, rather than 831 * the standard 512-bit hash table 832 */ 833 /* FALLTHROUGH */ 834 835 case TULIP_CHIP_MX98713A: 836 case TULIP_CHIP_MX98715A: 837 case TULIP_CHIP_MX98715AEC_X: 838 case TULIP_CHIP_MX98725: 839 /* 840 * The MX98713A has an MII as well as an internal Nway block, 841 * but no GPIO. The MX98715 and MX98725 have an internal 842 * Nway block only. 843 * 844 * The internal Nway block, unlike the Lite-On PNIC's, does 845 * just that - performs Nway. Once autonegotiation completes, 846 * we must program the GPR media information into the chip. 847 * 848 * The byte offset of the Ethernet address is stored at 849 * offset 0x70. 850 */ 851 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 852 sc->sc_mediasw = &tlp_pmac_mediasw; 853 break; 854 855 case TULIP_CHIP_WB89C840F: 856 /* 857 * Winbond 89C840F's Ethernet address is the first 858 * 6 bytes of its EEPROM. 859 */ 860 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 861 862 /* 863 * Winbond 89C840F has an MII attached to the SIO. 864 */ 865 sc->sc_mediasw = &tlp_sio_mii_mediasw; 866 break; 867 868 case TULIP_CHIP_AL981: 869 /* 870 * The ADMtek AL981's Ethernet address is located 871 * at offset 8 of its EEPROM. 872 */ 873 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 874 875 /* 876 * ADMtek AL981 has a built-in PHY accessed through 877 * special registers. 878 */ 879 sc->sc_mediasw = &tlp_al981_mediasw; 880 break; 881 882 case TULIP_CHIP_AN983: 883 case TULIP_CHIP_AN985: 884 /* 885 * The ADMtek AN985's Ethernet address is located 886 * at offset 8 of its EEPROM. 887 */ 888 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 889 890 /* 891 * The ADMtek AN985 can be configured in Single-Chip 892 * mode or MAC-only mode. Single-Chip uses the built-in 893 * PHY, MAC-only has an external PHY (usually HomePNA). 894 * The selection is based on an EEPROM setting, and both 895 * PHYs are accessed via MII attached to SIO. 896 * 897 * The AN985 "ghosts" the internal PHY onto all 898 * MII addresses, so we have to use a media init 899 * routine that limits the search. 900 * XXX How does this work with MAC-only mode? 901 */ 902 sc->sc_mediasw = &tlp_an985_mediasw; 903 break; 904 905 case TULIP_CHIP_DM9102: 906 case TULIP_CHIP_DM9102A: 907 /* 908 * Some boards with the Davicom chip have an ISV 909 * SROM (mostly DM9102A boards -- trying to describe 910 * the HomePNA PHY, probably) although the data in 911 * them is generally wrong. Check for ISV format 912 * and grab the Ethernet address that way, and if 913 * that fails, fall back on grabbing it from an 914 * observed offset of 20 (which is where it would 915 * be in an ISV SROM anyhow, tho ISV can cope with 916 * multi-port boards). 917 */ 918 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 919 #ifdef __sparc__ 920 if ((sc->sc_srom[20] == 0 && 921 sc->sc_srom[21] == 0 && 922 sc->sc_srom[22] == 0) || 923 (sc->sc_srom[20] == 0xff && 924 sc->sc_srom[21] == 0xff && 925 sc->sc_srom[22] == 0xff)) { 926 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 927 } else 928 #endif 929 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 930 } 931 932 /* 933 * Davicom chips all have an internal MII interface 934 * and a built-in PHY. DM9102A also has a an external 935 * MII interface, usually with a HomePNA PHY attached 936 * to it. 937 */ 938 sc->sc_mediasw = &tlp_dm9102_mediasw; 939 break; 940 941 case TULIP_CHIP_AX88140: 942 case TULIP_CHIP_AX88141: 943 /* 944 * ASIX AX88140/AX88141 Ethernet Address is located at offset 945 * 20 of the SROM. 946 */ 947 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 948 949 /* 950 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 951 * an external MII interface. 952 */ 953 sc->sc_mediasw = &tlp_asix_mediasw; 954 break; 955 956 case TULIP_CHIP_RS7112: 957 /* 958 * RS7112 Ethernet Address is located of offset 0x19a 959 * of the SROM 960 */ 961 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 962 963 /* RS7112 chip has a PHY at MII address 1 */ 964 sc->sc_mediasw = &tlp_rs7112_mediasw; 965 break; 966 967 default: 968 cant_cope: 969 printf("%s: sorry, unable to handle your board\n", 970 sc->sc_dev.dv_xname); 971 return; 972 } 973 974 /* 975 * Handle shared interrupts. 976 */ 977 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 978 if (psc->sc_master) 979 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 980 else { 981 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 982 TULIP_PCI_SLAVEINTR); 983 if (psc->sc_master == NULL) 984 psc->sc_master = psc; 985 } 986 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 987 psc, sc_intrq); 988 } 989 990 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 991 printf("%s: sharing interrupt with %s\n", 992 sc->sc_dev.dv_xname, 993 psc->sc_master->sc_tulip.sc_dev.dv_xname); 994 } else { 995 /* 996 * Map and establish our interrupt. 997 */ 998 if (pci_intr_map(pa, &ih)) { 999 printf("%s: unable to map interrupt\n", 1000 sc->sc_dev.dv_xname); 1001 return; 1002 } 1003 intrstr = pci_intr_string(pc, ih); 1004 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1005 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1006 tlp_pci_shared_intr : tlp_intr, sc); 1007 if (psc->sc_ih == NULL) { 1008 printf("%s: unable to establish interrupt", 1009 sc->sc_dev.dv_xname); 1010 if (intrstr != NULL) 1011 printf(" at %s", intrstr); 1012 printf("\n"); 1013 return; 1014 } 1015 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1016 intrstr); 1017 } 1018 1019 /* 1020 * Finish off the attach. 1021 */ 1022 tlp_attach(sc, enaddr); 1023 } 1024 1025 static int 1026 tlp_pci_shared_intr(void *arg) 1027 { 1028 struct tulip_pci_softc *master = arg, *slave; 1029 int rv = 0; 1030 1031 for (slave = LIST_FIRST(&master->sc_intrslaves); 1032 slave != NULL; 1033 slave = LIST_NEXT(slave, sc_intrq)) 1034 rv |= tlp_intr(&slave->sc_tulip); 1035 1036 return (rv); 1037 } 1038 1039 static void 1040 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1041 { 1042 struct tulip_softc *sc = &psc->sc_tulip; 1043 1044 /* 1045 * This isn't really a quirk-gathering device, really. We 1046 * just want to get the spiffy DEC board name from the SROM. 1047 */ 1048 strcpy(sc->sc_name, "DEC "); 1049 1050 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1051 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1052 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1053 else 1054 sc->sc_name[3] = '\0'; 1055 } 1056 1057 static void 1058 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1059 { 1060 struct tulip_softc *sc = &psc->sc_tulip; 1061 u_int16_t id = 0; 1062 1063 /* 1064 * If we have a slaved ROM, just copy the bits from the master. 1065 * This is in case we fail the ROM ID check (older boards) and 1066 * need to fall back on Ethernet address model checking; that 1067 * will fail for slave chips. 1068 */ 1069 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1070 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1071 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1072 psc->sc_flags |= 1073 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1074 return; 1075 } 1076 1077 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1078 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1079 switch (id) { 1080 zx312: 1081 case 0x0602: /* ZX312 */ 1082 strcpy(sc->sc_name, "ZNYX ZX312"); 1083 return; 1084 1085 case 0x0622: /* ZX312T */ 1086 strcpy(sc->sc_name, "ZNYX ZX312T"); 1087 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1088 return; 1089 1090 zx314_inta: 1091 case 0x0701: /* ZX314 INTA */ 1092 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1093 /* FALLTHROUGH */ 1094 case 0x0711: /* ZX314 */ 1095 strcpy(sc->sc_name, "ZNYX ZX314"); 1096 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1097 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1098 return; 1099 1100 zx315_inta: 1101 case 0x0801: /* ZX315 INTA */ 1102 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1103 /* FALLTHROUGH */ 1104 case 0x0811: /* ZX315 */ 1105 strcpy(sc->sc_name, "ZNYX ZX315"); 1106 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1107 return; 1108 1109 default: 1110 id = 0; 1111 break; 1112 } 1113 } 1114 1115 /* 1116 * Deal with boards that have broken ROMs. 1117 */ 1118 if (id == 0) { 1119 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1120 goto zx314_inta; 1121 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1122 goto zx315_inta; 1123 if ((enaddr[3] & ~3) == 0xec) 1124 goto zx312; 1125 } 1126 1127 strcpy(sc->sc_name, "ZNYX ZX31x"); 1128 } 1129 1130 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1131 1132 static void 1133 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1134 { 1135 struct tulip_softc *sc = &psc->sc_tulip; 1136 pcireg_t subid; 1137 1138 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1139 1140 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1141 return; /* ? */ 1142 1143 switch (PCI_PRODUCT(subid) & 0xff) { 1144 /* 1145 * ZNYX 21143 boards with QS6611 PHY 1146 */ 1147 case 0x12: /* ZX345Q */ 1148 case 0x13: /* ZX346Q */ 1149 case 0x14: /* ZX348Q */ 1150 case 0x18: /* ZX414 */ 1151 case 0x19: /* ZX412 */ 1152 case 0x1a: /* ZX444 */ 1153 case 0x1b: /* ZX442 */ 1154 case 0x23: /* ZX212 */ 1155 case 0x24: /* ZX214 */ 1156 case 0x29: /* ZX374 */ 1157 case 0x2d: /* ZX372 */ 1158 case 0x2b: /* ZX244 */ 1159 case 0x2c: /* ZX424 */ 1160 case 0x2e: /* ZX422 */ 1161 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1162 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1163 break; 1164 } 1165 } 1166 1167 static void 1168 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1169 { 1170 1171 /* 1172 * Reset QS6611 PHY. 1173 */ 1174 TULIP_WRITE(sc, CSR_SIAGEN, 1175 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1176 delay(200); 1177 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1178 delay(10000); 1179 } 1180 1181 static void 1182 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1183 { 1184 struct tulip_softc *sc = &psc->sc_tulip; 1185 u_int16_t id1, id2, ei; 1186 int auibnc = 0, utp = 0; 1187 char *cp; 1188 1189 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1190 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1191 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1192 1193 strcpy(sc->sc_name, "SMC 8432"); 1194 cp = &sc->sc_name[8]; 1195 1196 if ((id1 & 1) == 0) { 1197 *cp++ = 'B'; 1198 auibnc = 1; 1199 } 1200 if ((id1 & 0xff) > 0x32) { 1201 *cp++ = 'T'; 1202 utp = 1; 1203 } 1204 if ((id1 & 0x4000) == 0) { 1205 *cp++ = 'A'; 1206 auibnc = 1; 1207 } 1208 if (id2 == 0x15) { 1209 sc->sc_name[7] = '4'; 1210 *cp++ = '-'; 1211 *cp++ = 'C'; 1212 *cp++ = 'H'; 1213 *cp++ = ei ? '2' : '1'; 1214 } 1215 *cp = '\0'; 1216 1217 if (utp != 0 && auibnc == 0) 1218 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1219 else if (utp == 0 && auibnc != 0) 1220 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1221 } 1222 1223 static void 1224 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1225 { 1226 1227 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1228 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1229 } 1230 1231 static void 1232 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1233 { 1234 1235 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1236 } 1237 1238 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1239 1240 static void 1241 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1242 { 1243 struct tulip_softc *sc = &psc->sc_tulip; 1244 1245 /* 1246 * Some Asante boards don't use the ISV SROM format. For 1247 * those that don't, we initialize the GPIO direction bits, 1248 * and provide our own reset hook, which resets the MII. 1249 * 1250 * All of these boards use SIO-attached-MII media. 1251 */ 1252 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1253 return; 1254 1255 strcpy(sc->sc_name, "Asante"); 1256 1257 sc->sc_gp_dir = 0xbf; 1258 sc->sc_reset = tlp_pci_asante_21140_reset; 1259 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1260 } 1261 1262 static void 1263 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1264 { 1265 1266 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1267 TULIP_WRITE(sc, CSR_GPP, 0x8); 1268 delay(100); 1269 TULIP_WRITE(sc, CSR_GPP, 0); 1270 } 1271 1272 /* 1273 * SMC 9332DST media switch. 1274 */ 1275 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1276 1277 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1278 tlp_smc9332dst_tmsw_init, 1279 tlp_21140_gpio_get, 1280 tlp_21140_gpio_set 1281 }; 1282 1283 static void 1284 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1285 { 1286 struct tulip_softc *sc = &psc->sc_tulip; 1287 1288 if (sc->sc_mediasw != NULL) { 1289 return; 1290 } 1291 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1292 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1293 } 1294 1295 static void 1296 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1297 { 1298 struct tulip_21x4x_media *tm; 1299 const char *sep = ""; 1300 uint32_t reg; 1301 int i, cnt; 1302 1303 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1304 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1305 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1306 1307 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1308 tlp_mediastatus); 1309 printf("%s: ", sc->sc_dev.dv_xname); 1310 1311 #define ADD(m, c) \ 1312 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1313 tm->tm_opmode = (c); \ 1314 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1315 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1316 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1317 1318 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1319 PRINT("10baseT"); 1320 1321 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1322 OPMODE_TTM | OPMODE_FD); 1323 PRINT("10baseT-FDX"); 1324 1325 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1326 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1327 PRINT("100baseTX"); 1328 1329 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1330 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1331 PRINT("100baseTX-FDX"); 1332 1333 #undef ADD 1334 #undef PRINT 1335 1336 printf("\n"); 1337 1338 tlp_reset(sc); 1339 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1340 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1341 delay(10); 1342 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1343 delay(200000); 1344 cnt = 0; 1345 for (i = 1000; i > 0; i--) { 1346 reg = TULIP_READ(sc, CSR_GPP); 1347 if ((~reg & (GPP_SMC9332DST_OK10 | 1348 GPP_SMC9332DST_OK100)) == 0) { 1349 if (cnt++ > 100) { 1350 break; 1351 } 1352 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1353 break; 1354 } else { 1355 cnt = 0; 1356 } 1357 delay(1000); 1358 } 1359 if (cnt > 100) { 1360 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1361 } else { 1362 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1363 } 1364 } 1365 1366 static void 1367 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1368 { 1369 struct tulip_softc *sc = &psc->sc_tulip; 1370 char *p1 = (char *) &sc->sc_srom[32]; 1371 char *p2 = &sc->sc_name[0]; 1372 1373 do { 1374 if ((unsigned char) *p1 & 0x80) 1375 *p2++ = ' '; 1376 else 1377 *p2++ = *p1; 1378 } while (*p1++); 1379 } 1380 1381 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1382 1383 static void 1384 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1385 { 1386 struct tulip_softc *sc = &psc->sc_tulip; 1387 1388 /* 1389 * Cobalt Networks interfaces are just MII-on-SIO. 1390 */ 1391 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1392 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1393 1394 /* 1395 * The Cobalt systems tend to fall back to store-and-forward 1396 * pretty quickly, so we select that from the beginning to 1397 * avoid initial timeouts. 1398 */ 1399 sc->sc_txthresh = TXTH_SF; 1400 } 1401 1402 static void 1403 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1404 { 1405 /* 1406 * Reset PHY. 1407 */ 1408 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1409 delay(10); 1410 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1411 delay(10); 1412 } 1413 1414 static void 1415 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1416 { 1417 struct tulip_softc *sc = &psc->sc_tulip; 1418 1419 /* 1420 * Algorithmics boards just have MII-on-SIO. 1421 * 1422 * XXX They also have AUI on the serial interface. 1423 * XXX Deal with this. 1424 */ 1425 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1426 } 1427 1428 /* 1429 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1430 */ 1431 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1432 1433 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1434 tlp_cogent_em1x0_tmsw_init, 1435 tlp_21140_gpio_get, 1436 tlp_21140_gpio_set 1437 }; 1438 1439 static void 1440 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1441 { 1442 struct tulip_softc *sc = &psc->sc_tulip; 1443 uint8_t *srom = sc->sc_srom, id0; 1444 uint16_t id1, id2; 1445 1446 if (sc->sc_mediasw == NULL) { 1447 id0 = srom[32]; 1448 switch (id0) { 1449 case 0x12: 1450 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1451 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1452 break; 1453 1454 case 0x15: 1455 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1456 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1457 break; 1458 1459 #if 0 1460 case XXX: 1461 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1462 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1463 break; 1464 #endif 1465 1466 default: 1467 printf("%s: unknown Cogent board ID 0x%02x\n", 1468 sc->sc_dev.dv_xname, id0); 1469 } 1470 return; 1471 } 1472 1473 id1 = TULIP_ROM_GETW(srom, 0); 1474 id2 = TULIP_ROM_GETW(srom, 2); 1475 if (id1 != 0x1109) { 1476 goto unknown; 1477 } 1478 1479 switch (id2) { 1480 case 0x1900: 1481 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1482 break; 1483 1484 case 0x2400: 1485 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1486 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1487 break; 1488 1489 case 0x2b00: 1490 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1491 break; 1492 1493 case 0x3000: 1494 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1495 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1496 break; 1497 1498 default: 1499 unknown: 1500 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1501 sc->sc_dev.dv_xname, id1, id2); 1502 } 1503 } 1504 1505 static void 1506 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1507 { 1508 struct tulip_21x4x_media *tm; 1509 const char *sep = ""; 1510 1511 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1512 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1513 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1514 1515 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1516 tlp_mediastatus); 1517 printf("%s: ", sc->sc_dev.dv_xname); 1518 1519 #define ADD(m, c) \ 1520 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1521 tm->tm_opmode = (c); \ 1522 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1523 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1524 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1525 1526 if (sc->sc_srom[32] == 0x15) { 1527 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1528 OPMODE_PS | OPMODE_PCS); 1529 PRINT("100baseFX"); 1530 1531 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1532 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1533 PRINT("100baseFX-FDX"); 1534 printf("\n"); 1535 1536 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1537 } else { 1538 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1539 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1540 PRINT("100baseTX"); 1541 1542 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1543 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1544 PRINT("100baseTX-FDX"); 1545 printf("\n"); 1546 1547 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1548 } 1549 1550 #undef ADD 1551 #undef PRINT 1552 } 1553 1554 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1555 1556 static void 1557 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1558 const u_int8_t *enaddr) 1559 { 1560 struct tulip_softc *sc = &psc->sc_tulip; 1561 1562 /* 1563 * Netwinders just use MII-on_SIO. 1564 */ 1565 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1566 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1567 } 1568 1569 void 1570 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1571 { 1572 1573 /* 1574 * Reset the PHY. 1575 */ 1576 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1577 delay(10); 1578 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1579 delay(10); 1580 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1581 delay(10); 1582 } 1583
Indexes created Mon Sep 22 05:09:51 GMT 2025