if_tlp_pci.c revision 1.91
1 /* $NetBSD: if_tlp_pci.c,v 1.91 2006/05/20 14:23:07 rpaulo Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.91 2006/05/20 14:23:07 rpaulo Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 176 TULIP_CHIP_RS7112 }, 177 178 { 0, 0, 179 TULIP_CHIP_INVALID }, 180 }; 181 182 struct tlp_pci_quirks { 183 void (*tpq_func)(struct tulip_pci_softc *, 184 const u_int8_t *); 185 u_int8_t tpq_oui[3]; 186 }; 187 188 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 191 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 192 const u_int8_t *); 193 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 194 const u_int8_t *); 195 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 200 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 201 const u_int8_t *); 202 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 203 const u_int8_t *); 204 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 210 const u_int8_t *); 211 212 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 213 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 214 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 215 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 216 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 221 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 222 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 227 const u_int8_t *); 228 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 229 const u_int8_t *); 230 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 231 const u_int8_t *); 232 233 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 238 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 239 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 240 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 241 { NULL, { 0, 0, 0 } } 242 }; 243 244 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 245 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 246 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 247 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 248 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 251 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 252 { NULL, { 0, 0, 0 } } 253 }; 254 255 static int tlp_pci_shared_intr(void *); 256 257 static const struct tulip_pci_product * 258 tlp_pci_lookup(const struct pci_attach_args *pa) 259 { 260 const struct tulip_pci_product *tpp; 261 262 /* Don't match lmc cards */ 263 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 264 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 265 return NULL; 266 267 for (tpp = tlp_pci_products; 268 tlp_chip_names[tpp->tpp_chip] != NULL; 269 tpp++) { 270 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 271 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 272 return (tpp); 273 } 274 return (NULL); 275 } 276 277 static void 278 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 279 const struct tlp_pci_quirks *tpq) 280 { 281 282 for (; tpq->tpq_func != NULL; tpq++) { 283 if (tpq->tpq_oui[0] == enaddr[0] && 284 tpq->tpq_oui[1] == enaddr[1] && 285 tpq->tpq_oui[2] == enaddr[2]) { 286 (*tpq->tpq_func)(psc, enaddr); 287 return; 288 } 289 } 290 } 291 292 static void 293 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 294 { 295 extern struct cfdriver tlp_cd; 296 struct tulip_pci_softc *cur, *best = NULL; 297 struct tulip_softc *sc = &psc->sc_tulip; 298 int i; 299 300 /* 301 * First of all, find the lowest pcidev numbered device on our 302 * bus marked as shared. That should be our master. 303 */ 304 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 305 if ((cur = tlp_cd.cd_devs[i]) == NULL) 306 continue; 307 if (device_parent(&cur->sc_tulip.sc_dev) != 308 device_parent(&sc->sc_dev)) 309 continue; 310 if ((cur->sc_flags & shared) == 0) 311 continue; 312 if (cur == psc) 313 continue; 314 if (best == NULL || 315 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 316 best = cur; 317 } 318 319 if (best != NULL) { 320 psc->sc_master = best; 321 psc->sc_flags |= (shared | slaved); 322 } 323 } 324 325 static int 326 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 327 { 328 struct pci_attach_args *pa = aux; 329 330 if (tlp_pci_lookup(pa) != NULL) 331 return (10); /* beat if_de.c */ 332 333 return (0); 334 } 335 336 static void 337 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 338 { 339 struct tulip_pci_softc *psc = (void *) self; 340 struct tulip_softc *sc = &psc->sc_tulip; 341 struct pci_attach_args *pa = aux; 342 pci_chipset_tag_t pc = pa->pa_pc; 343 pci_intr_handle_t ih; 344 const char *intrstr = NULL; 345 bus_space_tag_t iot, memt; 346 bus_space_handle_t ioh, memh; 347 int ioh_valid, memh_valid, i, j; 348 const struct tulip_pci_product *tpp; 349 prop_data_t ea; 350 u_int8_t enaddr[ETHER_ADDR_LEN]; 351 u_int32_t val = 0; 352 pcireg_t reg; 353 int pmreg; 354 355 sc->sc_devno = pa->pa_device; 356 psc->sc_pc = pa->pa_pc; 357 psc->sc_pcitag = pa->pa_tag; 358 359 LIST_INIT(&psc->sc_intrslaves); 360 361 tpp = tlp_pci_lookup(pa); 362 if (tpp == NULL) { 363 printf("\n"); 364 panic("tlp_pci_attach: impossible"); 365 } 366 sc->sc_chip = tpp->tpp_chip; 367 368 /* 369 * By default, Tulip registers are 8 bytes long (4 bytes 370 * followed by a 4 byte pad). 371 */ 372 sc->sc_regshift = 3; 373 374 /* 375 * No power management hooks. 376 * XXX Maybe we should add some! 377 */ 378 sc->sc_flags |= TULIPF_ENABLED; 379 380 /* 381 * Get revision info, and set some chip-specific variables. 382 */ 383 sc->sc_rev = PCI_REVISION(pa->pa_class); 384 switch (sc->sc_chip) { 385 case TULIP_CHIP_21140: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_21140A; 388 break; 389 390 case TULIP_CHIP_21142: 391 if (sc->sc_rev >= 0x20) 392 sc->sc_chip = TULIP_CHIP_21143; 393 break; 394 395 case TULIP_CHIP_82C168: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_82C169; 398 break; 399 400 case TULIP_CHIP_MX98713: 401 if (sc->sc_rev >= 0x10) 402 sc->sc_chip = TULIP_CHIP_MX98713A; 403 break; 404 405 case TULIP_CHIP_MX98715: 406 if (sc->sc_rev >= 0x20) 407 sc->sc_chip = TULIP_CHIP_MX98715A; 408 if (sc->sc_rev >= 0x25) 409 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 410 if (sc->sc_rev >= 0x30) 411 sc->sc_chip = TULIP_CHIP_MX98725; 412 break; 413 414 case TULIP_CHIP_WB89C840F: 415 sc->sc_regshift = 2; 416 break; 417 418 case TULIP_CHIP_AN985: 419 /* 420 * The AN983 and AN985 are very similar, and are 421 * differentiated by a "signature" register that 422 * is like, but not identical, to a PCI ID register. 423 */ 424 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 425 switch (reg) { 426 case 0x09811317: 427 sc->sc_chip = TULIP_CHIP_AN985; 428 break; 429 430 case 0x09851317: 431 sc->sc_chip = TULIP_CHIP_AN983; 432 break; 433 434 default: 435 /* Unknown -- use default. */ 436 break; 437 } 438 break; 439 440 case TULIP_CHIP_AX88140: 441 if (sc->sc_rev >= 0x10) 442 sc->sc_chip = TULIP_CHIP_AX88141; 443 break; 444 445 case TULIP_CHIP_DM9102: 446 if (sc->sc_rev >= 0x30) 447 sc->sc_chip = TULIP_CHIP_DM9102A; 448 break; 449 450 default: 451 /* Nothing. */ 452 break; 453 } 454 455 printf(": %s Ethernet, pass %d.%d\n", 456 tlp_chip_names[sc->sc_chip], 457 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 458 459 switch (sc->sc_chip) { 460 case TULIP_CHIP_21040: 461 if (sc->sc_rev < 0x20) { 462 printf("%s: 21040 must be at least pass 2.0\n", 463 sc->sc_dev.dv_xname); 464 return; 465 } 466 break; 467 468 case TULIP_CHIP_21140: 469 if (sc->sc_rev < 0x11) { 470 printf("%s: 21140 must be at least pass 1.1\n", 471 sc->sc_dev.dv_xname); 472 return; 473 } 474 break; 475 476 default: 477 /* Nothing. */ 478 break; 479 } 480 481 /* 482 * Check to see if the device is in power-save mode, and 483 * being it out if necessary. 484 */ 485 switch (sc->sc_chip) { 486 case TULIP_CHIP_21140: 487 case TULIP_CHIP_21140A: 488 case TULIP_CHIP_21142: 489 case TULIP_CHIP_21143: 490 case TULIP_CHIP_MX98713A: 491 case TULIP_CHIP_MX98715: 492 case TULIP_CHIP_MX98715A: 493 case TULIP_CHIP_MX98715AEC_X: 494 case TULIP_CHIP_MX98725: 495 case TULIP_CHIP_DM9102: 496 case TULIP_CHIP_DM9102A: 497 case TULIP_CHIP_AX88140: 498 case TULIP_CHIP_AX88141: 499 case TULIP_CHIP_RS7112: 500 /* 501 * Clear the "sleep mode" bit in the CFDA register. 502 */ 503 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 504 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 505 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 506 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 507 break; 508 509 default: 510 /* Nothing. */ 511 break; 512 } 513 514 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 515 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 516 switch (reg & PCI_PMCSR_STATE_MASK) { 517 case PCI_PMCSR_STATE_D1: 518 case PCI_PMCSR_STATE_D2: 519 printf("%s: waking up from power state D%d\n%s", 520 sc->sc_dev.dv_xname, 521 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 522 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 523 (reg & ~PCI_PMCSR_STATE_MASK) | 524 PCI_PMCSR_STATE_D0); 525 break; 526 case PCI_PMCSR_STATE_D3: 527 /* 528 * The card has lost all configuration data in 529 * this state, so punt. 530 */ 531 printf("%s: unable to wake up from power state D3, " 532 "reboot required.\n", sc->sc_dev.dv_xname); 533 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 534 (reg & ~PCI_PMCSR_STATE_MASK) | 535 PCI_PMCSR_STATE_D0); 536 return; 537 } 538 } 539 540 /* 541 * Map the device. 542 */ 543 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 544 PCI_MAPREG_TYPE_IO, 0, 545 &iot, &ioh, NULL, NULL) == 0); 546 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 547 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 548 &memt, &memh, NULL, NULL) == 0); 549 550 if (memh_valid) { 551 sc->sc_st = memt; 552 sc->sc_sh = memh; 553 } else if (ioh_valid) { 554 sc->sc_st = iot; 555 sc->sc_sh = ioh; 556 } else { 557 printf("%s: unable to map device registers\n", 558 sc->sc_dev.dv_xname); 559 return; 560 } 561 562 sc->sc_dmat = pa->pa_dmat; 563 564 /* 565 * Make sure bus mastering is enabled. 566 */ 567 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 568 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 569 PCI_COMMAND_MASTER_ENABLE); 570 571 /* 572 * Get the cacheline size. 573 */ 574 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 575 PCI_BHLC_REG)); 576 577 /* 578 * Get PCI data moving command info. 579 */ 580 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 581 sc->sc_flags |= TULIPF_MRL; 582 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 583 sc->sc_flags |= TULIPF_MRM; 584 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 585 sc->sc_flags |= TULIPF_MWI; 586 587 /* 588 * Read the contents of the Ethernet Address ROM/SROM. 589 */ 590 switch (sc->sc_chip) { 591 case TULIP_CHIP_21040: 592 sc->sc_srom_addrbits = 6; 593 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 594 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 595 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 596 for (j = 0; j < 10000; j++) { 597 val = TULIP_READ(sc, CSR_MIIROM); 598 if ((val & MIIROM_DN) == 0) 599 break; 600 } 601 sc->sc_srom[i] = val & MIIROM_DATA; 602 } 603 break; 604 605 case TULIP_CHIP_82C168: 606 case TULIP_CHIP_82C169: 607 { 608 sc->sc_srom_addrbits = 2; 609 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 610 611 /* 612 * The Lite-On PNIC stores the Ethernet address in 613 * the first 3 words of the EEPROM. EEPROM access 614 * is not like the other Tulip chips. 615 */ 616 for (i = 0; i < 6; i += 2) { 617 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 618 PNIC_SROMCTL_READ | (i >> 1)); 619 for (j = 0; j < 500; j++) { 620 delay(2); 621 val = TULIP_READ(sc, CSR_MIIROM); 622 if ((val & PNIC_MIIROM_BUSY) == 0) 623 break; 624 } 625 if (val & PNIC_MIIROM_BUSY) { 626 printf("%s: EEPROM timed out\n", 627 sc->sc_dev.dv_xname); 628 return; 629 } 630 val &= PNIC_MIIROM_DATA; 631 sc->sc_srom[i] = val >> 8; 632 sc->sc_srom[i + 1] = val & 0xff; 633 } 634 break; 635 } 636 637 default: 638 /* 639 * XXX This isn't quite the right way to do this; we should 640 * XXX be attempting to fetch the mac-addr property in the 641 * XXX bus-agnostic part of the driver independently. But 642 * XXX that requires a larger change in the SROM handling 643 * XXX logic, and for now we can at least remove a machine- 644 * XXX dependent wart from the PCI front-end. 645 */ 646 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 647 "mac-addr"); 648 if (ea != NULL) { 649 extern int tlp_srom_debug; 650 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 651 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 652 653 memcpy(enaddr, prop_data_data_nocopy(ea), 654 ETHER_ADDR_LEN); 655 656 sc->sc_srom_addrbits = 6; 657 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 658 M_NOWAIT|M_ZERO); 659 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 660 if (tlp_srom_debug) { 661 printf("SROM CONTENTS:"); 662 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 663 if ((i % 8) == 0) 664 printf("\n\t"); 665 printf("0x%02x ", sc->sc_srom[i]); 666 } 667 printf("\n"); 668 } 669 break; 670 } 671 672 /* Check for a slaved ROM on a multi-port board. */ 673 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 674 TULIP_PCI_SLAVEROM); 675 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 676 sc->sc_srom_addrbits = 677 psc->sc_master->sc_tulip.sc_srom_addrbits; 678 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 679 enaddr[5] += 680 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 681 } 682 else if (tlp_read_srom(sc) == 0) 683 goto cant_cope; 684 break; 685 } 686 687 /* 688 * Deal with chip/board quirks. This includes setting up 689 * the mediasw, and extracting the Ethernet address from 690 * the rombuf. 691 */ 692 switch (sc->sc_chip) { 693 case TULIP_CHIP_21040: 694 /* 695 * Parse the Ethernet Address ROM. 696 */ 697 if (tlp_parse_old_srom(sc, enaddr) == 0) 698 goto cant_cope; 699 700 701 /* 702 * All 21040 boards start out with the same 703 * media switch. 704 */ 705 sc->sc_mediasw = &tlp_21040_mediasw; 706 707 /* 708 * Deal with any quirks this board might have. 709 */ 710 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 711 break; 712 713 case TULIP_CHIP_21041: 714 /* Check for new format SROM. */ 715 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 716 /* 717 * Not an ISV SROM; try the old DEC Ethernet Address 718 * ROM format. 719 */ 720 if (tlp_parse_old_srom(sc, enaddr) == 0) 721 goto cant_cope; 722 } 723 724 /* 725 * All 21041 boards use the same media switch; they all 726 * work basically the same! Yippee! 727 */ 728 sc->sc_mediasw = &tlp_21041_mediasw; 729 730 /* 731 * Deal with any quirks this board might have. 732 */ 733 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 734 break; 735 736 case TULIP_CHIP_21140: 737 case TULIP_CHIP_21140A: 738 /* Check for new format SROM. */ 739 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 740 /* 741 * Not an ISV SROM; try the old DEC Ethernet Address 742 * ROM format. 743 */ 744 if (tlp_parse_old_srom(sc, enaddr) == 0) 745 goto cant_cope; 746 } else { 747 /* 748 * We start out with the 2114x ISV media switch. 749 * When we search for quirks, we may change to 750 * a different switch. 751 */ 752 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 753 } 754 755 /* 756 * Deal with any quirks this board might have. 757 */ 758 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 759 760 /* 761 * Bail out now if we can't deal with this board. 762 */ 763 if (sc->sc_mediasw == NULL) 764 goto cant_cope; 765 break; 766 767 case TULIP_CHIP_21142: 768 case TULIP_CHIP_21143: 769 /* Check for new format SROM. */ 770 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 771 /* 772 * Not an ISV SROM; try the old DEC Ethernet Address 773 * ROM format. 774 */ 775 if (tlp_parse_old_srom(sc, enaddr) == 0) { 776 /* 777 * One last try: just copy the address 778 * from offset 20 and try to look 779 * up quirks. 780 */ 781 memcpy(enaddr, &sc->sc_srom[20], 782 ETHER_ADDR_LEN); 783 } 784 } else { 785 /* 786 * We start out with the 2114x ISV media switch. 787 * When we search for quirks, we may change to 788 * a different switch. 789 */ 790 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 791 } 792 793 /* 794 * Deal with any quirks this board might have. 795 */ 796 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 797 798 /* 799 * Bail out now if we can't deal with this board. 800 */ 801 if (sc->sc_mediasw == NULL) 802 goto cant_cope; 803 break; 804 805 case TULIP_CHIP_82C168: 806 case TULIP_CHIP_82C169: 807 /* 808 * Lite-On PNIC's Ethernet address is the first 6 809 * bytes of its EEPROM. 810 */ 811 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 812 813 /* 814 * Lite-On PNICs always use the same mediasw; we 815 * select MII vs. internal NWAY automatically. 816 */ 817 sc->sc_mediasw = &tlp_pnic_mediasw; 818 break; 819 820 case TULIP_CHIP_MX98713: 821 /* 822 * The Macronix MX98713 has an MII and GPIO, but no 823 * internal Nway block. This chip is basically a 824 * perfect 21140A clone, with the exception of the 825 * a magic register frobbing in order to make the 826 * interface function. 827 */ 828 if (tlp_isv_srom_enaddr(sc, enaddr)) { 829 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 830 break; 831 } 832 /* FALLTHROUGH */ 833 834 case TULIP_CHIP_82C115: 835 /* 836 * Yippee! The Lite-On 82C115 is a clone of 837 * the MX98725 (the data sheet even says `MXIC' 838 * on it)! Imagine that, a clone of a clone. 839 * 840 * The differences are really minimal: 841 * 842 * - Wake-On-LAN support 843 * - 128-bit multicast hash table, rather than 844 * the standard 512-bit hash table 845 */ 846 /* FALLTHROUGH */ 847 848 case TULIP_CHIP_MX98713A: 849 case TULIP_CHIP_MX98715A: 850 case TULIP_CHIP_MX98715AEC_X: 851 case TULIP_CHIP_MX98725: 852 /* 853 * The MX98713A has an MII as well as an internal Nway block, 854 * but no GPIO. The MX98715 and MX98725 have an internal 855 * Nway block only. 856 * 857 * The internal Nway block, unlike the Lite-On PNIC's, does 858 * just that - performs Nway. Once autonegotiation completes, 859 * we must program the GPR media information into the chip. 860 * 861 * The byte offset of the Ethernet address is stored at 862 * offset 0x70. 863 */ 864 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 865 sc->sc_mediasw = &tlp_pmac_mediasw; 866 break; 867 868 case TULIP_CHIP_WB89C840F: 869 /* 870 * Winbond 89C840F's Ethernet address is the first 871 * 6 bytes of its EEPROM. 872 */ 873 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 874 875 /* 876 * Winbond 89C840F has an MII attached to the SIO. 877 */ 878 sc->sc_mediasw = &tlp_sio_mii_mediasw; 879 break; 880 881 case TULIP_CHIP_AL981: 882 /* 883 * The ADMtek AL981's Ethernet address is located 884 * at offset 8 of its EEPROM. 885 */ 886 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 887 888 /* 889 * ADMtek AL981 has a built-in PHY accessed through 890 * special registers. 891 */ 892 sc->sc_mediasw = &tlp_al981_mediasw; 893 break; 894 895 case TULIP_CHIP_AN983: 896 case TULIP_CHIP_AN985: 897 /* 898 * The ADMtek AN985's Ethernet address is located 899 * at offset 8 of its EEPROM. 900 */ 901 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 902 903 /* 904 * The ADMtek AN985 can be configured in Single-Chip 905 * mode or MAC-only mode. Single-Chip uses the built-in 906 * PHY, MAC-only has an external PHY (usually HomePNA). 907 * The selection is based on an EEPROM setting, and both 908 * PHYs are accessed via MII attached to SIO. 909 * 910 * The AN985 "ghosts" the internal PHY onto all 911 * MII addresses, so we have to use a media init 912 * routine that limits the search. 913 * XXX How does this work with MAC-only mode? 914 */ 915 sc->sc_mediasw = &tlp_an985_mediasw; 916 break; 917 918 case TULIP_CHIP_DM9102: 919 case TULIP_CHIP_DM9102A: 920 /* 921 * Some boards with the Davicom chip have an ISV 922 * SROM (mostly DM9102A boards -- trying to describe 923 * the HomePNA PHY, probably) although the data in 924 * them is generally wrong. Check for ISV format 925 * and grab the Ethernet address that way, and if 926 * that fails, fall back on grabbing it from an 927 * observed offset of 20 (which is where it would 928 * be in an ISV SROM anyhow, tho ISV can cope with 929 * multi-port boards). 930 */ 931 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 932 #ifdef __sparc__ 933 if ((sc->sc_srom[20] == 0 && 934 sc->sc_srom[21] == 0 && 935 sc->sc_srom[22] == 0) || 936 (sc->sc_srom[20] == 0xff && 937 sc->sc_srom[21] == 0xff && 938 sc->sc_srom[22] == 0xff)) { 939 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 940 } else 941 #endif 942 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 943 } 944 945 /* 946 * Davicom chips all have an internal MII interface 947 * and a built-in PHY. DM9102A also has a an external 948 * MII interface, usually with a HomePNA PHY attached 949 * to it. 950 */ 951 sc->sc_mediasw = &tlp_dm9102_mediasw; 952 break; 953 954 case TULIP_CHIP_AX88140: 955 case TULIP_CHIP_AX88141: 956 /* 957 * ASIX AX88140/AX88141 Ethernet Address is located at offset 958 * 20 of the SROM. 959 */ 960 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 961 962 /* 963 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 964 * an external MII interface. 965 */ 966 sc->sc_mediasw = &tlp_asix_mediasw; 967 break; 968 969 case TULIP_CHIP_RS7112: 970 /* 971 * RS7112 Ethernet Address is located of offset 0x19a 972 * of the SROM 973 */ 974 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 975 976 /* RS7112 chip has a PHY at MII address 1 */ 977 sc->sc_mediasw = &tlp_rs7112_mediasw; 978 break; 979 980 default: 981 cant_cope: 982 printf("%s: sorry, unable to handle your board\n", 983 sc->sc_dev.dv_xname); 984 return; 985 } 986 987 /* 988 * Handle shared interrupts. 989 */ 990 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 991 if (psc->sc_master) 992 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 993 else { 994 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 995 TULIP_PCI_SLAVEINTR); 996 if (psc->sc_master == NULL) 997 psc->sc_master = psc; 998 } 999 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 1000 psc, sc_intrq); 1001 } 1002 1003 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 1004 printf("%s: sharing interrupt with %s\n", 1005 sc->sc_dev.dv_xname, 1006 psc->sc_master->sc_tulip.sc_dev.dv_xname); 1007 } else { 1008 /* 1009 * Map and establish our interrupt. 1010 */ 1011 if (pci_intr_map(pa, &ih)) { 1012 printf("%s: unable to map interrupt\n", 1013 sc->sc_dev.dv_xname); 1014 return; 1015 } 1016 intrstr = pci_intr_string(pc, ih); 1017 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1018 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1019 tlp_pci_shared_intr : tlp_intr, sc); 1020 if (psc->sc_ih == NULL) { 1021 printf("%s: unable to establish interrupt", 1022 sc->sc_dev.dv_xname); 1023 if (intrstr != NULL) 1024 printf(" at %s", intrstr); 1025 printf("\n"); 1026 return; 1027 } 1028 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1029 intrstr); 1030 } 1031 1032 /* 1033 * Finish off the attach. 1034 */ 1035 tlp_attach(sc, enaddr); 1036 } 1037 1038 static int 1039 tlp_pci_shared_intr(void *arg) 1040 { 1041 struct tulip_pci_softc *master = arg, *slave; 1042 int rv = 0; 1043 1044 for (slave = LIST_FIRST(&master->sc_intrslaves); 1045 slave != NULL; 1046 slave = LIST_NEXT(slave, sc_intrq)) 1047 rv |= tlp_intr(&slave->sc_tulip); 1048 1049 return (rv); 1050 } 1051 1052 static void 1053 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1054 { 1055 struct tulip_softc *sc = &psc->sc_tulip; 1056 1057 /* 1058 * This isn't really a quirk-gathering device, really. We 1059 * just want to get the spiffy DEC board name from the SROM. 1060 */ 1061 strcpy(sc->sc_name, "DEC "); 1062 1063 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1064 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1065 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1066 else 1067 sc->sc_name[3] = '\0'; 1068 } 1069 1070 static void 1071 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1072 { 1073 struct tulip_softc *sc = &psc->sc_tulip; 1074 u_int16_t id = 0; 1075 1076 /* 1077 * If we have a slaved ROM, just copy the bits from the master. 1078 * This is in case we fail the ROM ID check (older boards) and 1079 * need to fall back on Ethernet address model checking; that 1080 * will fail for slave chips. 1081 */ 1082 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1083 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1084 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1085 psc->sc_flags |= 1086 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1087 return; 1088 } 1089 1090 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1091 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1092 switch (id) { 1093 zx312: 1094 case 0x0602: /* ZX312 */ 1095 strcpy(sc->sc_name, "ZNYX ZX312"); 1096 return; 1097 1098 case 0x0622: /* ZX312T */ 1099 strcpy(sc->sc_name, "ZNYX ZX312T"); 1100 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1101 return; 1102 1103 zx314_inta: 1104 case 0x0701: /* ZX314 INTA */ 1105 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1106 /* FALLTHROUGH */ 1107 case 0x0711: /* ZX314 */ 1108 strcpy(sc->sc_name, "ZNYX ZX314"); 1109 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1110 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1111 return; 1112 1113 zx315_inta: 1114 case 0x0801: /* ZX315 INTA */ 1115 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1116 /* FALLTHROUGH */ 1117 case 0x0811: /* ZX315 */ 1118 strcpy(sc->sc_name, "ZNYX ZX315"); 1119 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1120 return; 1121 1122 default: 1123 id = 0; 1124 break; 1125 } 1126 } 1127 1128 /* 1129 * Deal with boards that have broken ROMs. 1130 */ 1131 if (id == 0) { 1132 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1133 goto zx314_inta; 1134 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1135 goto zx315_inta; 1136 if ((enaddr[3] & ~3) == 0xec) 1137 goto zx312; 1138 } 1139 1140 strcpy(sc->sc_name, "ZNYX ZX31x"); 1141 } 1142 1143 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1144 1145 static void 1146 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1147 { 1148 struct tulip_softc *sc = &psc->sc_tulip; 1149 pcireg_t subid; 1150 1151 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1152 1153 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1154 return; /* ? */ 1155 1156 switch (PCI_PRODUCT(subid) & 0xff) { 1157 /* 1158 * ZNYX 21143 boards with QS6611 PHY 1159 */ 1160 case 0x12: /* ZX345Q */ 1161 case 0x13: /* ZX346Q */ 1162 case 0x14: /* ZX348Q */ 1163 case 0x18: /* ZX414 */ 1164 case 0x19: /* ZX412 */ 1165 case 0x1a: /* ZX444 */ 1166 case 0x1b: /* ZX442 */ 1167 case 0x23: /* ZX212 */ 1168 case 0x24: /* ZX214 */ 1169 case 0x29: /* ZX374 */ 1170 case 0x2d: /* ZX372 */ 1171 case 0x2b: /* ZX244 */ 1172 case 0x2c: /* ZX424 */ 1173 case 0x2e: /* ZX422 */ 1174 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1175 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1176 break; 1177 } 1178 } 1179 1180 static void 1181 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1182 { 1183 1184 /* 1185 * Reset QS6611 PHY. 1186 */ 1187 TULIP_WRITE(sc, CSR_SIAGEN, 1188 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1189 delay(200); 1190 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1191 delay(10000); 1192 } 1193 1194 static void 1195 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1196 { 1197 struct tulip_softc *sc = &psc->sc_tulip; 1198 u_int16_t id1, id2, ei; 1199 int auibnc = 0, utp = 0; 1200 char *cp; 1201 1202 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1203 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1204 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1205 1206 strcpy(sc->sc_name, "SMC 8432"); 1207 cp = &sc->sc_name[8]; 1208 1209 if ((id1 & 1) == 0) { 1210 *cp++ = 'B'; 1211 auibnc = 1; 1212 } 1213 if ((id1 & 0xff) > 0x32) { 1214 *cp++ = 'T'; 1215 utp = 1; 1216 } 1217 if ((id1 & 0x4000) == 0) { 1218 *cp++ = 'A'; 1219 auibnc = 1; 1220 } 1221 if (id2 == 0x15) { 1222 sc->sc_name[7] = '4'; 1223 *cp++ = '-'; 1224 *cp++ = 'C'; 1225 *cp++ = 'H'; 1226 *cp++ = ei ? '2' : '1'; 1227 } 1228 *cp = '\0'; 1229 1230 if (utp != 0 && auibnc == 0) 1231 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1232 else if (utp == 0 && auibnc != 0) 1233 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1234 } 1235 1236 static void 1237 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1238 { 1239 1240 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1241 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1242 } 1243 1244 static void 1245 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1246 { 1247 1248 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1249 } 1250 1251 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1252 1253 static void 1254 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1255 { 1256 struct tulip_softc *sc = &psc->sc_tulip; 1257 1258 /* 1259 * Some Asante boards don't use the ISV SROM format. For 1260 * those that don't, we initialize the GPIO direction bits, 1261 * and provide our own reset hook, which resets the MII. 1262 * 1263 * All of these boards use SIO-attached-MII media. 1264 */ 1265 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1266 return; 1267 1268 strcpy(sc->sc_name, "Asante"); 1269 1270 sc->sc_gp_dir = 0xbf; 1271 sc->sc_reset = tlp_pci_asante_21140_reset; 1272 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1273 } 1274 1275 static void 1276 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1277 { 1278 1279 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1280 TULIP_WRITE(sc, CSR_GPP, 0x8); 1281 delay(100); 1282 TULIP_WRITE(sc, CSR_GPP, 0); 1283 } 1284 1285 /* 1286 * SMC 9332DST media switch. 1287 */ 1288 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1289 1290 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1291 tlp_smc9332dst_tmsw_init, 1292 tlp_21140_gpio_get, 1293 tlp_21140_gpio_set 1294 }; 1295 1296 static void 1297 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1298 { 1299 struct tulip_softc *sc = &psc->sc_tulip; 1300 1301 if (sc->sc_mediasw != NULL) { 1302 return; 1303 } 1304 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1305 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1306 } 1307 1308 static void 1309 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1310 { 1311 struct tulip_21x4x_media *tm; 1312 const char *sep = ""; 1313 uint32_t reg; 1314 int i, cnt; 1315 1316 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1317 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1318 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1319 1320 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1321 tlp_mediastatus); 1322 printf("%s: ", sc->sc_dev.dv_xname); 1323 1324 #define ADD(m, c) \ 1325 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1326 tm->tm_opmode = (c); \ 1327 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1328 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1329 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1330 1331 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1332 PRINT("10baseT"); 1333 1334 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1335 OPMODE_TTM | OPMODE_FD); 1336 PRINT("10baseT-FDX"); 1337 1338 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1339 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1340 PRINT("100baseTX"); 1341 1342 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1343 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1344 PRINT("100baseTX-FDX"); 1345 1346 #undef ADD 1347 #undef PRINT 1348 1349 printf("\n"); 1350 1351 tlp_reset(sc); 1352 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1353 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1354 delay(10); 1355 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1356 delay(200000); 1357 cnt = 0; 1358 for (i = 1000; i > 0; i--) { 1359 reg = TULIP_READ(sc, CSR_GPP); 1360 if ((~reg & (GPP_SMC9332DST_OK10 | 1361 GPP_SMC9332DST_OK100)) == 0) { 1362 if (cnt++ > 100) { 1363 break; 1364 } 1365 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1366 break; 1367 } else { 1368 cnt = 0; 1369 } 1370 delay(1000); 1371 } 1372 if (cnt > 100) { 1373 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1374 } else { 1375 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1376 } 1377 } 1378 1379 static void 1380 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1381 { 1382 struct tulip_softc *sc = &psc->sc_tulip; 1383 char *p1 = (char *) &sc->sc_srom[32]; 1384 char *p2 = &sc->sc_name[0]; 1385 1386 do { 1387 if ((unsigned char) *p1 & 0x80) 1388 *p2++ = ' '; 1389 else 1390 *p2++ = *p1; 1391 } while (*p1++); 1392 } 1393 1394 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1395 1396 static void 1397 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1398 { 1399 struct tulip_softc *sc = &psc->sc_tulip; 1400 1401 /* 1402 * Cobalt Networks interfaces are just MII-on-SIO. 1403 */ 1404 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1405 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1406 1407 /* 1408 * The Cobalt systems tend to fall back to store-and-forward 1409 * pretty quickly, so we select that from the beginning to 1410 * avoid initial timeouts. 1411 */ 1412 sc->sc_txthresh = TXTH_SF; 1413 } 1414 1415 static void 1416 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1417 { 1418 /* 1419 * Reset PHY. 1420 */ 1421 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1422 delay(10); 1423 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1424 delay(10); 1425 } 1426 1427 static void 1428 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1429 { 1430 struct tulip_softc *sc = &psc->sc_tulip; 1431 1432 /* 1433 * Algorithmics boards just have MII-on-SIO. 1434 * 1435 * XXX They also have AUI on the serial interface. 1436 * XXX Deal with this. 1437 */ 1438 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1439 } 1440 1441 /* 1442 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1443 */ 1444 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1445 1446 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1447 tlp_cogent_em1x0_tmsw_init, 1448 tlp_21140_gpio_get, 1449 tlp_21140_gpio_set 1450 }; 1451 1452 static void 1453 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1454 { 1455 struct tulip_softc *sc = &psc->sc_tulip; 1456 uint8_t *srom = sc->sc_srom, id0; 1457 uint16_t id1, id2; 1458 1459 if (sc->sc_mediasw == NULL) { 1460 id0 = srom[32]; 1461 switch (id0) { 1462 case 0x12: 1463 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1464 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1465 break; 1466 1467 case 0x15: 1468 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1469 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1470 break; 1471 1472 #if 0 1473 case XXX: 1474 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1475 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1476 break; 1477 #endif 1478 1479 default: 1480 printf("%s: unknown Cogent board ID 0x%02x\n", 1481 sc->sc_dev.dv_xname, id0); 1482 } 1483 return; 1484 } 1485 1486 id1 = TULIP_ROM_GETW(srom, 0); 1487 id2 = TULIP_ROM_GETW(srom, 2); 1488 if (id1 != 0x1109) { 1489 goto unknown; 1490 } 1491 1492 switch (id2) { 1493 case 0x1900: 1494 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1495 break; 1496 1497 case 0x2400: 1498 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1499 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1500 break; 1501 1502 case 0x2b00: 1503 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1504 break; 1505 1506 case 0x3000: 1507 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1508 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1509 break; 1510 1511 default: 1512 unknown: 1513 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1514 sc->sc_dev.dv_xname, id1, id2); 1515 } 1516 } 1517 1518 static void 1519 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1520 { 1521 struct tulip_21x4x_media *tm; 1522 const char *sep = ""; 1523 1524 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1525 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1526 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1527 1528 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1529 tlp_mediastatus); 1530 printf("%s: ", sc->sc_dev.dv_xname); 1531 1532 #define ADD(m, c) \ 1533 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1534 tm->tm_opmode = (c); \ 1535 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1536 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1537 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1538 1539 if (sc->sc_srom[32] == 0x15) { 1540 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1541 OPMODE_PS | OPMODE_PCS); 1542 PRINT("100baseFX"); 1543 1544 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1545 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1546 PRINT("100baseFX-FDX"); 1547 printf("\n"); 1548 1549 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1550 } else { 1551 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1552 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1553 PRINT("100baseTX"); 1554 1555 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1556 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1557 PRINT("100baseTX-FDX"); 1558 printf("\n"); 1559 1560 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1561 } 1562 1563 #undef ADD 1564 #undef PRINT 1565 } 1566 1567 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1568 1569 static void 1570 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1571 const u_int8_t *enaddr) 1572 { 1573 struct tulip_softc *sc = &psc->sc_tulip; 1574 1575 /* 1576 * Netwinders just use MII-on_SIO. 1577 */ 1578 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1579 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1580 } 1581 1582 void 1583 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1584 { 1585 1586 /* 1587 * Reset the PHY. 1588 */ 1589 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1590 delay(10); 1591 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1592 delay(10); 1593 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1594 delay(10); 1595 } 1596
Indexes created Mon Sep 22 10:09:38 GMT 2025