if_tlp_pci.c revision 1.93
1 /* $NetBSD: if_tlp_pci.c,v 1.93 2006/07/18 14:26:57 itohy Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.93 2006/07/18 14:26:57 itohy Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983B, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 169 TULIP_CHIP_AN985 }, 170 171 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 172 TULIP_CHIP_AN985 }, 173 174 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 175 TULIP_CHIP_AX88140 }, 176 177 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 178 TULIP_CHIP_RS7112 }, 179 180 { 0, 0, 181 TULIP_CHIP_INVALID }, 182 }; 183 184 struct tlp_pci_quirks { 185 void (*tpq_func)(struct tulip_pci_softc *, 186 const u_int8_t *); 187 u_int8_t tpq_oui[3]; 188 }; 189 190 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 191 const u_int8_t *); 192 193 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 194 const u_int8_t *); 195 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 202 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 203 const u_int8_t *); 204 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 209 const u_int8_t *); 210 211 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 212 const u_int8_t *); 213 214 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 215 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 216 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 217 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 218 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 219 { NULL, { 0, 0, 0 } } 220 }; 221 222 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 223 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 224 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 225 { NULL, { 0, 0, 0 } } 226 }; 227 228 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 229 const u_int8_t *); 230 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 231 const u_int8_t *); 232 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 233 const u_int8_t *); 234 235 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 236 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 237 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 238 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 239 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 240 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 241 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 242 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 243 { NULL, { 0, 0, 0 } } 244 }; 245 246 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 247 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 248 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 249 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 250 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 251 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 252 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 253 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 254 { NULL, { 0, 0, 0 } } 255 }; 256 257 static int tlp_pci_shared_intr(void *); 258 259 static const struct tulip_pci_product * 260 tlp_pci_lookup(const struct pci_attach_args *pa) 261 { 262 const struct tulip_pci_product *tpp; 263 264 /* Don't match lmc cards */ 265 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 266 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 267 return NULL; 268 269 for (tpp = tlp_pci_products; 270 tlp_chip_names[tpp->tpp_chip] != NULL; 271 tpp++) { 272 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 273 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 274 return (tpp); 275 } 276 return (NULL); 277 } 278 279 static void 280 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 281 const struct tlp_pci_quirks *tpq) 282 { 283 284 for (; tpq->tpq_func != NULL; tpq++) { 285 if (tpq->tpq_oui[0] == enaddr[0] && 286 tpq->tpq_oui[1] == enaddr[1] && 287 tpq->tpq_oui[2] == enaddr[2]) { 288 (*tpq->tpq_func)(psc, enaddr); 289 return; 290 } 291 } 292 } 293 294 static void 295 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 296 { 297 extern struct cfdriver tlp_cd; 298 struct tulip_pci_softc *cur, *best = NULL; 299 struct tulip_softc *sc = &psc->sc_tulip; 300 int i; 301 302 /* 303 * First of all, find the lowest pcidev numbered device on our 304 * bus marked as shared. That should be our master. 305 */ 306 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 307 if ((cur = tlp_cd.cd_devs[i]) == NULL) 308 continue; 309 if (device_parent(&cur->sc_tulip.sc_dev) != 310 device_parent(&sc->sc_dev)) 311 continue; 312 if ((cur->sc_flags & shared) == 0) 313 continue; 314 if (cur == psc) 315 continue; 316 if (best == NULL || 317 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 318 best = cur; 319 } 320 321 if (best != NULL) { 322 psc->sc_master = best; 323 psc->sc_flags |= (shared | slaved); 324 } 325 } 326 327 static int 328 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 329 { 330 struct pci_attach_args *pa = aux; 331 332 if (tlp_pci_lookup(pa) != NULL) 333 return (10); /* beat if_de.c */ 334 335 return (0); 336 } 337 338 static void 339 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 340 { 341 struct tulip_pci_softc *psc = (void *) self; 342 struct tulip_softc *sc = &psc->sc_tulip; 343 struct pci_attach_args *pa = aux; 344 pci_chipset_tag_t pc = pa->pa_pc; 345 pci_intr_handle_t ih; 346 const char *intrstr = NULL; 347 bus_space_tag_t iot, memt; 348 bus_space_handle_t ioh, memh; 349 int ioh_valid, memh_valid, i, j; 350 const struct tulip_pci_product *tpp; 351 prop_data_t ea; 352 u_int8_t enaddr[ETHER_ADDR_LEN]; 353 u_int32_t val = 0; 354 pcireg_t reg; 355 int error; 356 357 sc->sc_devno = pa->pa_device; 358 psc->sc_pc = pa->pa_pc; 359 psc->sc_pcitag = pa->pa_tag; 360 361 LIST_INIT(&psc->sc_intrslaves); 362 363 tpp = tlp_pci_lookup(pa); 364 if (tpp == NULL) { 365 printf("\n"); 366 panic("tlp_pci_attach: impossible"); 367 } 368 sc->sc_chip = tpp->tpp_chip; 369 370 /* 371 * By default, Tulip registers are 8 bytes long (4 bytes 372 * followed by a 4 byte pad). 373 */ 374 sc->sc_regshift = 3; 375 376 /* 377 * No power management hooks. 378 * XXX Maybe we should add some! 379 */ 380 sc->sc_flags |= TULIPF_ENABLED; 381 382 /* 383 * Get revision info, and set some chip-specific variables. 384 */ 385 sc->sc_rev = PCI_REVISION(pa->pa_class); 386 switch (sc->sc_chip) { 387 case TULIP_CHIP_21140: 388 if (sc->sc_rev >= 0x20) 389 sc->sc_chip = TULIP_CHIP_21140A; 390 break; 391 392 case TULIP_CHIP_21142: 393 if (sc->sc_rev >= 0x20) 394 sc->sc_chip = TULIP_CHIP_21143; 395 break; 396 397 case TULIP_CHIP_82C168: 398 if (sc->sc_rev >= 0x20) 399 sc->sc_chip = TULIP_CHIP_82C169; 400 break; 401 402 case TULIP_CHIP_MX98713: 403 if (sc->sc_rev >= 0x10) 404 sc->sc_chip = TULIP_CHIP_MX98713A; 405 break; 406 407 case TULIP_CHIP_MX98715: 408 if (sc->sc_rev >= 0x20) 409 sc->sc_chip = TULIP_CHIP_MX98715A; 410 if (sc->sc_rev >= 0x25) 411 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 412 if (sc->sc_rev >= 0x30) 413 sc->sc_chip = TULIP_CHIP_MX98725; 414 break; 415 416 case TULIP_CHIP_WB89C840F: 417 sc->sc_regshift = 2; 418 break; 419 420 case TULIP_CHIP_AN985: 421 /* 422 * The AN983 and AN985 are very similar, and are 423 * differentiated by a "signature" register that 424 * is like, but not identical, to a PCI ID register. 425 */ 426 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 427 switch (reg) { 428 case 0x09811317: 429 sc->sc_chip = TULIP_CHIP_AN985; 430 break; 431 432 case 0x09851317: 433 case 0x69851317: /* 983B */ 434 sc->sc_chip = TULIP_CHIP_AN983; 435 break; 436 437 default: 438 /* Unknown -- use default. */ 439 break; 440 } 441 break; 442 443 case TULIP_CHIP_AX88140: 444 if (sc->sc_rev >= 0x10) 445 sc->sc_chip = TULIP_CHIP_AX88141; 446 break; 447 448 case TULIP_CHIP_DM9102: 449 if (sc->sc_rev >= 0x30) 450 sc->sc_chip = TULIP_CHIP_DM9102A; 451 break; 452 453 default: 454 /* Nothing. */ 455 break; 456 } 457 458 printf(": %s Ethernet, pass %d.%d\n", 459 tlp_chip_names[sc->sc_chip], 460 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 461 462 switch (sc->sc_chip) { 463 case TULIP_CHIP_21040: 464 if (sc->sc_rev < 0x20) { 465 printf("%s: 21040 must be at least pass 2.0\n", 466 sc->sc_dev.dv_xname); 467 return; 468 } 469 break; 470 471 case TULIP_CHIP_21140: 472 if (sc->sc_rev < 0x11) { 473 printf("%s: 21140 must be at least pass 1.1\n", 474 sc->sc_dev.dv_xname); 475 return; 476 } 477 break; 478 479 default: 480 /* Nothing. */ 481 break; 482 } 483 484 /* 485 * Check to see if the device is in power-save mode, and 486 * being it out if necessary. 487 */ 488 switch (sc->sc_chip) { 489 case TULIP_CHIP_21140: 490 case TULIP_CHIP_21140A: 491 case TULIP_CHIP_21142: 492 case TULIP_CHIP_21143: 493 case TULIP_CHIP_MX98713A: 494 case TULIP_CHIP_MX98715: 495 case TULIP_CHIP_MX98715A: 496 case TULIP_CHIP_MX98715AEC_X: 497 case TULIP_CHIP_MX98725: 498 case TULIP_CHIP_DM9102: 499 case TULIP_CHIP_DM9102A: 500 case TULIP_CHIP_AX88140: 501 case TULIP_CHIP_AX88141: 502 case TULIP_CHIP_RS7112: 503 /* 504 * Clear the "sleep mode" bit in the CFDA register. 505 */ 506 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 507 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 508 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 509 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 510 break; 511 512 default: 513 /* Nothing. */ 514 break; 515 } 516 517 /* power up chip */ 518 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 519 NULL)) && error != EOPNOTSUPP) { 520 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 521 error); 522 return; 523 } 524 525 /* 526 * Map the device. 527 */ 528 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 529 PCI_MAPREG_TYPE_IO, 0, 530 &iot, &ioh, NULL, NULL) == 0); 531 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 532 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 533 &memt, &memh, NULL, NULL) == 0); 534 535 if (memh_valid) { 536 sc->sc_st = memt; 537 sc->sc_sh = memh; 538 } else if (ioh_valid) { 539 sc->sc_st = iot; 540 sc->sc_sh = ioh; 541 } else { 542 printf("%s: unable to map device registers\n", 543 sc->sc_dev.dv_xname); 544 return; 545 } 546 547 sc->sc_dmat = pa->pa_dmat; 548 549 /* 550 * Make sure bus mastering is enabled. 551 */ 552 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 553 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 554 PCI_COMMAND_MASTER_ENABLE); 555 556 /* 557 * Get the cacheline size. 558 */ 559 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 560 PCI_BHLC_REG)); 561 562 /* 563 * Get PCI data moving command info. 564 */ 565 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 566 sc->sc_flags |= TULIPF_MRL; 567 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 568 sc->sc_flags |= TULIPF_MRM; 569 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 570 sc->sc_flags |= TULIPF_MWI; 571 572 /* 573 * Read the contents of the Ethernet Address ROM/SROM. 574 */ 575 switch (sc->sc_chip) { 576 case TULIP_CHIP_21040: 577 sc->sc_srom_addrbits = 6; 578 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 579 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 580 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 581 for (j = 0; j < 10000; j++) { 582 val = TULIP_READ(sc, CSR_MIIROM); 583 if ((val & MIIROM_DN) == 0) 584 break; 585 } 586 sc->sc_srom[i] = val & MIIROM_DATA; 587 } 588 break; 589 590 case TULIP_CHIP_82C168: 591 case TULIP_CHIP_82C169: 592 { 593 sc->sc_srom_addrbits = 2; 594 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 595 596 /* 597 * The Lite-On PNIC stores the Ethernet address in 598 * the first 3 words of the EEPROM. EEPROM access 599 * is not like the other Tulip chips. 600 */ 601 for (i = 0; i < 6; i += 2) { 602 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 603 PNIC_SROMCTL_READ | (i >> 1)); 604 for (j = 0; j < 500; j++) { 605 delay(2); 606 val = TULIP_READ(sc, CSR_MIIROM); 607 if ((val & PNIC_MIIROM_BUSY) == 0) 608 break; 609 } 610 if (val & PNIC_MIIROM_BUSY) { 611 printf("%s: EEPROM timed out\n", 612 sc->sc_dev.dv_xname); 613 return; 614 } 615 val &= PNIC_MIIROM_DATA; 616 sc->sc_srom[i] = val >> 8; 617 sc->sc_srom[i + 1] = val & 0xff; 618 } 619 break; 620 } 621 622 default: 623 /* 624 * XXX This isn't quite the right way to do this; we should 625 * XXX be attempting to fetch the mac-addr property in the 626 * XXX bus-agnostic part of the driver independently. But 627 * XXX that requires a larger change in the SROM handling 628 * XXX logic, and for now we can at least remove a machine- 629 * XXX dependent wart from the PCI front-end. 630 */ 631 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 632 "mac-addr"); 633 if (ea != NULL) { 634 extern int tlp_srom_debug; 635 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 636 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 637 638 memcpy(enaddr, prop_data_data_nocopy(ea), 639 ETHER_ADDR_LEN); 640 641 sc->sc_srom_addrbits = 6; 642 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 643 M_NOWAIT|M_ZERO); 644 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 645 if (tlp_srom_debug) { 646 printf("SROM CONTENTS:"); 647 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 648 if ((i % 8) == 0) 649 printf("\n\t"); 650 printf("0x%02x ", sc->sc_srom[i]); 651 } 652 printf("\n"); 653 } 654 break; 655 } 656 657 /* Check for a slaved ROM on a multi-port board. */ 658 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 659 TULIP_PCI_SLAVEROM); 660 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 661 sc->sc_srom_addrbits = 662 psc->sc_master->sc_tulip.sc_srom_addrbits; 663 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 664 enaddr[5] += 665 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 666 } 667 else if (tlp_read_srom(sc) == 0) 668 goto cant_cope; 669 break; 670 } 671 672 /* 673 * Deal with chip/board quirks. This includes setting up 674 * the mediasw, and extracting the Ethernet address from 675 * the rombuf. 676 */ 677 switch (sc->sc_chip) { 678 case TULIP_CHIP_21040: 679 /* 680 * Parse the Ethernet Address ROM. 681 */ 682 if (tlp_parse_old_srom(sc, enaddr) == 0) 683 goto cant_cope; 684 685 686 /* 687 * All 21040 boards start out with the same 688 * media switch. 689 */ 690 sc->sc_mediasw = &tlp_21040_mediasw; 691 692 /* 693 * Deal with any quirks this board might have. 694 */ 695 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 696 break; 697 698 case TULIP_CHIP_21041: 699 /* Check for new format SROM. */ 700 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 701 /* 702 * Not an ISV SROM; try the old DEC Ethernet Address 703 * ROM format. 704 */ 705 if (tlp_parse_old_srom(sc, enaddr) == 0) 706 goto cant_cope; 707 } 708 709 /* 710 * All 21041 boards use the same media switch; they all 711 * work basically the same! Yippee! 712 */ 713 sc->sc_mediasw = &tlp_21041_mediasw; 714 715 /* 716 * Deal with any quirks this board might have. 717 */ 718 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 719 break; 720 721 case TULIP_CHIP_21140: 722 case TULIP_CHIP_21140A: 723 /* Check for new format SROM. */ 724 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 725 /* 726 * Not an ISV SROM; try the old DEC Ethernet Address 727 * ROM format. 728 */ 729 if (tlp_parse_old_srom(sc, enaddr) == 0) 730 goto cant_cope; 731 } else { 732 /* 733 * We start out with the 2114x ISV media switch. 734 * When we search for quirks, we may change to 735 * a different switch. 736 */ 737 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 738 } 739 740 /* 741 * Deal with any quirks this board might have. 742 */ 743 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 744 745 /* 746 * Bail out now if we can't deal with this board. 747 */ 748 if (sc->sc_mediasw == NULL) 749 goto cant_cope; 750 break; 751 752 case TULIP_CHIP_21142: 753 case TULIP_CHIP_21143: 754 /* Check for new format SROM. */ 755 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 756 /* 757 * Not an ISV SROM; try the old DEC Ethernet Address 758 * ROM format. 759 */ 760 if (tlp_parse_old_srom(sc, enaddr) == 0) { 761 /* 762 * One last try: just copy the address 763 * from offset 20 and try to look 764 * up quirks. 765 */ 766 memcpy(enaddr, &sc->sc_srom[20], 767 ETHER_ADDR_LEN); 768 } 769 } else { 770 /* 771 * We start out with the 2114x ISV media switch. 772 * When we search for quirks, we may change to 773 * a different switch. 774 */ 775 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 776 } 777 778 /* 779 * Deal with any quirks this board might have. 780 */ 781 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 782 783 /* 784 * Bail out now if we can't deal with this board. 785 */ 786 if (sc->sc_mediasw == NULL) 787 goto cant_cope; 788 break; 789 790 case TULIP_CHIP_82C168: 791 case TULIP_CHIP_82C169: 792 /* 793 * Lite-On PNIC's Ethernet address is the first 6 794 * bytes of its EEPROM. 795 */ 796 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 797 798 /* 799 * Lite-On PNICs always use the same mediasw; we 800 * select MII vs. internal NWAY automatically. 801 */ 802 sc->sc_mediasw = &tlp_pnic_mediasw; 803 break; 804 805 case TULIP_CHIP_MX98713: 806 /* 807 * The Macronix MX98713 has an MII and GPIO, but no 808 * internal Nway block. This chip is basically a 809 * perfect 21140A clone, with the exception of the 810 * a magic register frobbing in order to make the 811 * interface function. 812 */ 813 if (tlp_isv_srom_enaddr(sc, enaddr)) { 814 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 815 break; 816 } 817 /* FALLTHROUGH */ 818 819 case TULIP_CHIP_82C115: 820 /* 821 * Yippee! The Lite-On 82C115 is a clone of 822 * the MX98725 (the data sheet even says `MXIC' 823 * on it)! Imagine that, a clone of a clone. 824 * 825 * The differences are really minimal: 826 * 827 * - Wake-On-LAN support 828 * - 128-bit multicast hash table, rather than 829 * the standard 512-bit hash table 830 */ 831 /* FALLTHROUGH */ 832 833 case TULIP_CHIP_MX98713A: 834 case TULIP_CHIP_MX98715A: 835 case TULIP_CHIP_MX98715AEC_X: 836 case TULIP_CHIP_MX98725: 837 /* 838 * The MX98713A has an MII as well as an internal Nway block, 839 * but no GPIO. The MX98715 and MX98725 have an internal 840 * Nway block only. 841 * 842 * The internal Nway block, unlike the Lite-On PNIC's, does 843 * just that - performs Nway. Once autonegotiation completes, 844 * we must program the GPR media information into the chip. 845 * 846 * The byte offset of the Ethernet address is stored at 847 * offset 0x70. 848 */ 849 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 850 sc->sc_mediasw = &tlp_pmac_mediasw; 851 break; 852 853 case TULIP_CHIP_WB89C840F: 854 /* 855 * Winbond 89C840F's Ethernet address is the first 856 * 6 bytes of its EEPROM. 857 */ 858 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 859 860 /* 861 * Winbond 89C840F has an MII attached to the SIO. 862 */ 863 sc->sc_mediasw = &tlp_sio_mii_mediasw; 864 break; 865 866 case TULIP_CHIP_AL981: 867 /* 868 * The ADMtek AL981's Ethernet address is located 869 * at offset 8 of its EEPROM. 870 */ 871 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 872 873 /* 874 * ADMtek AL981 has a built-in PHY accessed through 875 * special registers. 876 */ 877 sc->sc_mediasw = &tlp_al981_mediasw; 878 break; 879 880 case TULIP_CHIP_AN983: 881 case TULIP_CHIP_AN985: 882 /* 883 * The ADMtek AN985's Ethernet address is located 884 * at offset 8 of its EEPROM. 885 */ 886 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 887 888 /* 889 * The ADMtek AN985 can be configured in Single-Chip 890 * mode or MAC-only mode. Single-Chip uses the built-in 891 * PHY, MAC-only has an external PHY (usually HomePNA). 892 * The selection is based on an EEPROM setting, and both 893 * PHYs are accessed via MII attached to SIO. 894 * 895 * The AN985 "ghosts" the internal PHY onto all 896 * MII addresses, so we have to use a media init 897 * routine that limits the search. 898 * XXX How does this work with MAC-only mode? 899 */ 900 sc->sc_mediasw = &tlp_an985_mediasw; 901 break; 902 903 case TULIP_CHIP_DM9102: 904 case TULIP_CHIP_DM9102A: 905 /* 906 * Some boards with the Davicom chip have an ISV 907 * SROM (mostly DM9102A boards -- trying to describe 908 * the HomePNA PHY, probably) although the data in 909 * them is generally wrong. Check for ISV format 910 * and grab the Ethernet address that way, and if 911 * that fails, fall back on grabbing it from an 912 * observed offset of 20 (which is where it would 913 * be in an ISV SROM anyhow, tho ISV can cope with 914 * multi-port boards). 915 */ 916 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 917 #ifdef __sparc__ 918 if ((sc->sc_srom[20] == 0 && 919 sc->sc_srom[21] == 0 && 920 sc->sc_srom[22] == 0) || 921 (sc->sc_srom[20] == 0xff && 922 sc->sc_srom[21] == 0xff && 923 sc->sc_srom[22] == 0xff)) { 924 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 925 } else 926 #endif 927 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 928 } 929 930 /* 931 * Davicom chips all have an internal MII interface 932 * and a built-in PHY. DM9102A also has a an external 933 * MII interface, usually with a HomePNA PHY attached 934 * to it. 935 */ 936 sc->sc_mediasw = &tlp_dm9102_mediasw; 937 break; 938 939 case TULIP_CHIP_AX88140: 940 case TULIP_CHIP_AX88141: 941 /* 942 * ASIX AX88140/AX88141 Ethernet Address is located at offset 943 * 20 of the SROM. 944 */ 945 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 946 947 /* 948 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 949 * an external MII interface. 950 */ 951 sc->sc_mediasw = &tlp_asix_mediasw; 952 break; 953 954 case TULIP_CHIP_RS7112: 955 /* 956 * RS7112 Ethernet Address is located of offset 0x19a 957 * of the SROM 958 */ 959 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 960 961 /* RS7112 chip has a PHY at MII address 1 */ 962 sc->sc_mediasw = &tlp_rs7112_mediasw; 963 break; 964 965 default: 966 cant_cope: 967 printf("%s: sorry, unable to handle your board\n", 968 sc->sc_dev.dv_xname); 969 return; 970 } 971 972 /* 973 * Handle shared interrupts. 974 */ 975 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 976 if (psc->sc_master) 977 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 978 else { 979 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 980 TULIP_PCI_SLAVEINTR); 981 if (psc->sc_master == NULL) 982 psc->sc_master = psc; 983 } 984 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 985 psc, sc_intrq); 986 } 987 988 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 989 printf("%s: sharing interrupt with %s\n", 990 sc->sc_dev.dv_xname, 991 psc->sc_master->sc_tulip.sc_dev.dv_xname); 992 } else { 993 /* 994 * Map and establish our interrupt. 995 */ 996 if (pci_intr_map(pa, &ih)) { 997 printf("%s: unable to map interrupt\n", 998 sc->sc_dev.dv_xname); 999 return; 1000 } 1001 intrstr = pci_intr_string(pc, ih); 1002 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1003 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1004 tlp_pci_shared_intr : tlp_intr, sc); 1005 if (psc->sc_ih == NULL) { 1006 printf("%s: unable to establish interrupt", 1007 sc->sc_dev.dv_xname); 1008 if (intrstr != NULL) 1009 printf(" at %s", intrstr); 1010 printf("\n"); 1011 return; 1012 } 1013 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1014 intrstr); 1015 } 1016 1017 /* 1018 * Finish off the attach. 1019 */ 1020 tlp_attach(sc, enaddr); 1021 } 1022 1023 static int 1024 tlp_pci_shared_intr(void *arg) 1025 { 1026 struct tulip_pci_softc *master = arg, *slave; 1027 int rv = 0; 1028 1029 for (slave = LIST_FIRST(&master->sc_intrslaves); 1030 slave != NULL; 1031 slave = LIST_NEXT(slave, sc_intrq)) 1032 rv |= tlp_intr(&slave->sc_tulip); 1033 1034 return (rv); 1035 } 1036 1037 static void 1038 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1039 { 1040 struct tulip_softc *sc = &psc->sc_tulip; 1041 1042 /* 1043 * This isn't really a quirk-gathering device, really. We 1044 * just want to get the spiffy DEC board name from the SROM. 1045 */ 1046 strcpy(sc->sc_name, "DEC "); 1047 1048 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1049 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1050 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1051 else 1052 sc->sc_name[3] = '\0'; 1053 } 1054 1055 static void 1056 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1057 { 1058 struct tulip_softc *sc = &psc->sc_tulip; 1059 u_int16_t id = 0; 1060 1061 /* 1062 * If we have a slaved ROM, just copy the bits from the master. 1063 * This is in case we fail the ROM ID check (older boards) and 1064 * need to fall back on Ethernet address model checking; that 1065 * will fail for slave chips. 1066 */ 1067 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1068 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1069 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1070 psc->sc_flags |= 1071 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1072 return; 1073 } 1074 1075 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1076 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1077 switch (id) { 1078 zx312: 1079 case 0x0602: /* ZX312 */ 1080 strcpy(sc->sc_name, "ZNYX ZX312"); 1081 return; 1082 1083 case 0x0622: /* ZX312T */ 1084 strcpy(sc->sc_name, "ZNYX ZX312T"); 1085 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1086 return; 1087 1088 zx314_inta: 1089 case 0x0701: /* ZX314 INTA */ 1090 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1091 /* FALLTHROUGH */ 1092 case 0x0711: /* ZX314 */ 1093 strcpy(sc->sc_name, "ZNYX ZX314"); 1094 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1095 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1096 return; 1097 1098 zx315_inta: 1099 case 0x0801: /* ZX315 INTA */ 1100 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1101 /* FALLTHROUGH */ 1102 case 0x0811: /* ZX315 */ 1103 strcpy(sc->sc_name, "ZNYX ZX315"); 1104 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1105 return; 1106 1107 default: 1108 id = 0; 1109 break; 1110 } 1111 } 1112 1113 /* 1114 * Deal with boards that have broken ROMs. 1115 */ 1116 if (id == 0) { 1117 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1118 goto zx314_inta; 1119 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1120 goto zx315_inta; 1121 if ((enaddr[3] & ~3) == 0xec) 1122 goto zx312; 1123 } 1124 1125 strcpy(sc->sc_name, "ZNYX ZX31x"); 1126 } 1127 1128 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1129 1130 static void 1131 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1132 { 1133 struct tulip_softc *sc = &psc->sc_tulip; 1134 pcireg_t subid; 1135 1136 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1137 1138 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1139 return; /* ? */ 1140 1141 switch (PCI_PRODUCT(subid) & 0xff) { 1142 /* 1143 * ZNYX 21143 boards with QS6611 PHY 1144 */ 1145 case 0x12: /* ZX345Q */ 1146 case 0x13: /* ZX346Q */ 1147 case 0x14: /* ZX348Q */ 1148 case 0x18: /* ZX414 */ 1149 case 0x19: /* ZX412 */ 1150 case 0x1a: /* ZX444 */ 1151 case 0x1b: /* ZX442 */ 1152 case 0x23: /* ZX212 */ 1153 case 0x24: /* ZX214 */ 1154 case 0x29: /* ZX374 */ 1155 case 0x2d: /* ZX372 */ 1156 case 0x2b: /* ZX244 */ 1157 case 0x2c: /* ZX424 */ 1158 case 0x2e: /* ZX422 */ 1159 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1160 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1161 break; 1162 } 1163 } 1164 1165 static void 1166 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1167 { 1168 1169 /* 1170 * Reset QS6611 PHY. 1171 */ 1172 TULIP_WRITE(sc, CSR_SIAGEN, 1173 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1174 delay(200); 1175 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1176 delay(10000); 1177 } 1178 1179 static void 1180 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1181 { 1182 struct tulip_softc *sc = &psc->sc_tulip; 1183 u_int16_t id1, id2, ei; 1184 int auibnc = 0, utp = 0; 1185 char *cp; 1186 1187 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1188 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1189 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1190 1191 strcpy(sc->sc_name, "SMC 8432"); 1192 cp = &sc->sc_name[8]; 1193 1194 if ((id1 & 1) == 0) { 1195 *cp++ = 'B'; 1196 auibnc = 1; 1197 } 1198 if ((id1 & 0xff) > 0x32) { 1199 *cp++ = 'T'; 1200 utp = 1; 1201 } 1202 if ((id1 & 0x4000) == 0) { 1203 *cp++ = 'A'; 1204 auibnc = 1; 1205 } 1206 if (id2 == 0x15) { 1207 sc->sc_name[7] = '4'; 1208 *cp++ = '-'; 1209 *cp++ = 'C'; 1210 *cp++ = 'H'; 1211 *cp++ = ei ? '2' : '1'; 1212 } 1213 *cp = '\0'; 1214 1215 if (utp != 0 && auibnc == 0) 1216 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1217 else if (utp == 0 && auibnc != 0) 1218 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1219 } 1220 1221 static void 1222 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1223 { 1224 1225 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1226 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1227 } 1228 1229 static void 1230 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1231 { 1232 1233 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1234 } 1235 1236 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1237 1238 static void 1239 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1240 { 1241 struct tulip_softc *sc = &psc->sc_tulip; 1242 1243 /* 1244 * Some Asante boards don't use the ISV SROM format. For 1245 * those that don't, we initialize the GPIO direction bits, 1246 * and provide our own reset hook, which resets the MII. 1247 * 1248 * All of these boards use SIO-attached-MII media. 1249 */ 1250 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1251 return; 1252 1253 strcpy(sc->sc_name, "Asante"); 1254 1255 sc->sc_gp_dir = 0xbf; 1256 sc->sc_reset = tlp_pci_asante_21140_reset; 1257 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1258 } 1259 1260 static void 1261 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1262 { 1263 1264 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1265 TULIP_WRITE(sc, CSR_GPP, 0x8); 1266 delay(100); 1267 TULIP_WRITE(sc, CSR_GPP, 0); 1268 } 1269 1270 /* 1271 * SMC 9332DST media switch. 1272 */ 1273 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1274 1275 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1276 tlp_smc9332dst_tmsw_init, 1277 tlp_21140_gpio_get, 1278 tlp_21140_gpio_set 1279 }; 1280 1281 static void 1282 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1283 { 1284 struct tulip_softc *sc = &psc->sc_tulip; 1285 1286 if (sc->sc_mediasw != NULL) { 1287 return; 1288 } 1289 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1290 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1291 } 1292 1293 static void 1294 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1295 { 1296 struct tulip_21x4x_media *tm; 1297 const char *sep = ""; 1298 uint32_t reg; 1299 int i, cnt; 1300 1301 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1302 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1303 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1304 1305 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1306 tlp_mediastatus); 1307 printf("%s: ", sc->sc_dev.dv_xname); 1308 1309 #define ADD(m, c) \ 1310 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1311 tm->tm_opmode = (c); \ 1312 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1313 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1314 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1315 1316 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1317 PRINT("10baseT"); 1318 1319 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1320 OPMODE_TTM | OPMODE_FD); 1321 PRINT("10baseT-FDX"); 1322 1323 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1324 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1325 PRINT("100baseTX"); 1326 1327 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1328 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1329 PRINT("100baseTX-FDX"); 1330 1331 #undef ADD 1332 #undef PRINT 1333 1334 printf("\n"); 1335 1336 tlp_reset(sc); 1337 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1338 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1339 delay(10); 1340 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1341 delay(200000); 1342 cnt = 0; 1343 for (i = 1000; i > 0; i--) { 1344 reg = TULIP_READ(sc, CSR_GPP); 1345 if ((~reg & (GPP_SMC9332DST_OK10 | 1346 GPP_SMC9332DST_OK100)) == 0) { 1347 if (cnt++ > 100) { 1348 break; 1349 } 1350 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1351 break; 1352 } else { 1353 cnt = 0; 1354 } 1355 delay(1000); 1356 } 1357 if (cnt > 100) { 1358 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1359 } else { 1360 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1361 } 1362 } 1363 1364 static void 1365 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1366 { 1367 struct tulip_softc *sc = &psc->sc_tulip; 1368 char *p1 = (char *) &sc->sc_srom[32]; 1369 char *p2 = &sc->sc_name[0]; 1370 1371 do { 1372 if ((unsigned char) *p1 & 0x80) 1373 *p2++ = ' '; 1374 else 1375 *p2++ = *p1; 1376 } while (*p1++); 1377 } 1378 1379 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1380 1381 static void 1382 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1383 { 1384 struct tulip_softc *sc = &psc->sc_tulip; 1385 1386 /* 1387 * Cobalt Networks interfaces are just MII-on-SIO. 1388 */ 1389 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1390 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1391 1392 /* 1393 * The Cobalt systems tend to fall back to store-and-forward 1394 * pretty quickly, so we select that from the beginning to 1395 * avoid initial timeouts. 1396 */ 1397 sc->sc_txthresh = TXTH_SF; 1398 } 1399 1400 static void 1401 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1402 { 1403 /* 1404 * Reset PHY. 1405 */ 1406 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1407 delay(10); 1408 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1409 delay(10); 1410 } 1411 1412 static void 1413 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1414 { 1415 struct tulip_softc *sc = &psc->sc_tulip; 1416 1417 /* 1418 * Algorithmics boards just have MII-on-SIO. 1419 * 1420 * XXX They also have AUI on the serial interface. 1421 * XXX Deal with this. 1422 */ 1423 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1424 } 1425 1426 /* 1427 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1428 */ 1429 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1430 1431 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1432 tlp_cogent_em1x0_tmsw_init, 1433 tlp_21140_gpio_get, 1434 tlp_21140_gpio_set 1435 }; 1436 1437 static void 1438 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1439 { 1440 struct tulip_softc *sc = &psc->sc_tulip; 1441 uint8_t *srom = sc->sc_srom, id0; 1442 uint16_t id1, id2; 1443 1444 if (sc->sc_mediasw == NULL) { 1445 id0 = srom[32]; 1446 switch (id0) { 1447 case 0x12: 1448 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1449 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1450 break; 1451 1452 case 0x15: 1453 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1454 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1455 break; 1456 1457 #if 0 1458 case XXX: 1459 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1460 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1461 break; 1462 #endif 1463 1464 default: 1465 printf("%s: unknown Cogent board ID 0x%02x\n", 1466 sc->sc_dev.dv_xname, id0); 1467 } 1468 return; 1469 } 1470 1471 id1 = TULIP_ROM_GETW(srom, 0); 1472 id2 = TULIP_ROM_GETW(srom, 2); 1473 if (id1 != 0x1109) { 1474 goto unknown; 1475 } 1476 1477 switch (id2) { 1478 case 0x1900: 1479 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1480 break; 1481 1482 case 0x2400: 1483 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1484 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1485 break; 1486 1487 case 0x2b00: 1488 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1489 break; 1490 1491 case 0x3000: 1492 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1493 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1494 break; 1495 1496 default: 1497 unknown: 1498 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1499 sc->sc_dev.dv_xname, id1, id2); 1500 } 1501 } 1502 1503 static void 1504 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1505 { 1506 struct tulip_21x4x_media *tm; 1507 const char *sep = ""; 1508 1509 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1510 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1511 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1512 1513 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1514 tlp_mediastatus); 1515 printf("%s: ", sc->sc_dev.dv_xname); 1516 1517 #define ADD(m, c) \ 1518 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1519 tm->tm_opmode = (c); \ 1520 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1521 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1522 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1523 1524 if (sc->sc_srom[32] == 0x15) { 1525 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1526 OPMODE_PS | OPMODE_PCS); 1527 PRINT("100baseFX"); 1528 1529 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1530 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1531 PRINT("100baseFX-FDX"); 1532 printf("\n"); 1533 1534 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1535 } else { 1536 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1537 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1538 PRINT("100baseTX"); 1539 1540 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1541 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1542 PRINT("100baseTX-FDX"); 1543 printf("\n"); 1544 1545 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1546 } 1547 1548 #undef ADD 1549 #undef PRINT 1550 } 1551 1552 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1553 1554 static void 1555 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1556 const u_int8_t *enaddr) 1557 { 1558 struct tulip_softc *sc = &psc->sc_tulip; 1559 1560 /* 1561 * Netwinders just use MII-on_SIO. 1562 */ 1563 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1564 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1565 } 1566 1567 void 1568 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1569 { 1570 1571 /* 1572 * Reset the PHY. 1573 */ 1574 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1575 delay(10); 1576 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1577 delay(10); 1578 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1579 delay(10); 1580 } 1581
Indexes created Sun Sep 21 16:09:51 GMT 2025