if_tlp_pci.c revision 1.95
1 /* $NetBSD: if_tlp_pci.c,v 1.95 2006/07/26 14:21:20 itohy Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.95 2006/07/26 14:21:20 itohy Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const u_int8_t *); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const u_int8_t *); 210 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 211 const u_int8_t *); 212 213 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 214 const u_int8_t *); 215 216 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 217 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 218 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 219 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 220 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 221 { NULL, { 0, 0, 0 } } 222 }; 223 224 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 225 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 226 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 227 { NULL, { 0, 0, 0 } } 228 }; 229 230 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 231 const u_int8_t *); 232 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 233 const u_int8_t *); 234 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 235 const u_int8_t *); 236 237 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 238 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 239 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 240 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 241 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 244 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 245 { NULL, { 0, 0, 0 } } 246 }; 247 248 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 249 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 250 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 251 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 252 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 253 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 254 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 255 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 256 { NULL, { 0, 0, 0 } } 257 }; 258 259 static int tlp_pci_shared_intr(void *); 260 261 static const struct tulip_pci_product * 262 tlp_pci_lookup(const struct pci_attach_args *pa) 263 { 264 const struct tulip_pci_product *tpp; 265 266 /* Don't match lmc cards */ 267 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 268 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 269 return NULL; 270 271 for (tpp = tlp_pci_products; 272 tlp_chip_names[tpp->tpp_chip] != NULL; 273 tpp++) { 274 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 275 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 276 return (tpp); 277 } 278 return (NULL); 279 } 280 281 static void 282 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 283 const struct tlp_pci_quirks *tpq) 284 { 285 286 for (; tpq->tpq_func != NULL; tpq++) { 287 if (tpq->tpq_oui[0] == enaddr[0] && 288 tpq->tpq_oui[1] == enaddr[1] && 289 tpq->tpq_oui[2] == enaddr[2]) { 290 (*tpq->tpq_func)(psc, enaddr); 291 return; 292 } 293 } 294 } 295 296 static void 297 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 298 { 299 extern struct cfdriver tlp_cd; 300 struct tulip_pci_softc *cur, *best = NULL; 301 struct tulip_softc *sc = &psc->sc_tulip; 302 int i; 303 304 /* 305 * First of all, find the lowest pcidev numbered device on our 306 * bus marked as shared. That should be our master. 307 */ 308 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 309 if ((cur = tlp_cd.cd_devs[i]) == NULL) 310 continue; 311 if (device_parent(&cur->sc_tulip.sc_dev) != 312 device_parent(&sc->sc_dev)) 313 continue; 314 if ((cur->sc_flags & shared) == 0) 315 continue; 316 if (cur == psc) 317 continue; 318 if (best == NULL || 319 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 320 best = cur; 321 } 322 323 if (best != NULL) { 324 psc->sc_master = best; 325 psc->sc_flags |= (shared | slaved); 326 } 327 } 328 329 static int 330 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 331 { 332 struct pci_attach_args *pa = aux; 333 334 if (tlp_pci_lookup(pa) != NULL) 335 return (10); /* beat if_de.c */ 336 337 return (0); 338 } 339 340 static void 341 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 342 { 343 struct tulip_pci_softc *psc = (void *) self; 344 struct tulip_softc *sc = &psc->sc_tulip; 345 struct pci_attach_args *pa = aux; 346 pci_chipset_tag_t pc = pa->pa_pc; 347 pci_intr_handle_t ih; 348 const char *intrstr = NULL; 349 bus_space_tag_t iot, memt; 350 bus_space_handle_t ioh, memh; 351 int ioh_valid, memh_valid, i, j; 352 const struct tulip_pci_product *tpp; 353 prop_data_t ea; 354 u_int8_t enaddr[ETHER_ADDR_LEN]; 355 u_int32_t val = 0; 356 pcireg_t reg; 357 int error; 358 359 sc->sc_devno = pa->pa_device; 360 psc->sc_pc = pa->pa_pc; 361 psc->sc_pcitag = pa->pa_tag; 362 363 LIST_INIT(&psc->sc_intrslaves); 364 365 tpp = tlp_pci_lookup(pa); 366 if (tpp == NULL) { 367 printf("\n"); 368 panic("tlp_pci_attach: impossible"); 369 } 370 sc->sc_chip = tpp->tpp_chip; 371 372 /* 373 * By default, Tulip registers are 8 bytes long (4 bytes 374 * followed by a 4 byte pad). 375 */ 376 sc->sc_regshift = 3; 377 378 /* 379 * No power management hooks. 380 * XXX Maybe we should add some! 381 */ 382 sc->sc_flags |= TULIPF_ENABLED; 383 384 /* 385 * Get revision info, and set some chip-specific variables. 386 */ 387 sc->sc_rev = PCI_REVISION(pa->pa_class); 388 switch (sc->sc_chip) { 389 case TULIP_CHIP_21140: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21140A; 392 break; 393 394 case TULIP_CHIP_21142: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_21143; 397 break; 398 399 case TULIP_CHIP_82C168: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_82C169; 402 break; 403 404 case TULIP_CHIP_MX98713: 405 if (sc->sc_rev >= 0x10) 406 sc->sc_chip = TULIP_CHIP_MX98713A; 407 break; 408 409 case TULIP_CHIP_MX98715: 410 if (sc->sc_rev >= 0x20) 411 sc->sc_chip = TULIP_CHIP_MX98715A; 412 if (sc->sc_rev >= 0x25) 413 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 414 if (sc->sc_rev >= 0x30) 415 sc->sc_chip = TULIP_CHIP_MX98725; 416 break; 417 418 case TULIP_CHIP_WB89C840F: 419 sc->sc_regshift = 2; 420 break; 421 422 case TULIP_CHIP_AN985: 423 /* 424 * The AN983 and AN985 are very similar, and are 425 * differentiated by a "signature" register that 426 * is like, but not identical, to a PCI ID register. 427 */ 428 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 429 switch (reg) { 430 case 0x09811317: 431 sc->sc_chip = TULIP_CHIP_AN985; 432 break; 433 434 case 0x09851317: 435 sc->sc_chip = TULIP_CHIP_AN983; 436 break; 437 438 default: 439 /* Unknown -- use default. */ 440 break; 441 } 442 break; 443 444 case TULIP_CHIP_AX88140: 445 if (sc->sc_rev >= 0x10) 446 sc->sc_chip = TULIP_CHIP_AX88141; 447 break; 448 449 case TULIP_CHIP_DM9102: 450 if (sc->sc_rev >= 0x30) 451 sc->sc_chip = TULIP_CHIP_DM9102A; 452 break; 453 454 default: 455 /* Nothing. */ 456 break; 457 } 458 459 printf(": %s Ethernet, pass %d.%d\n", 460 tlp_chip_names[sc->sc_chip], 461 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 462 463 switch (sc->sc_chip) { 464 case TULIP_CHIP_21040: 465 if (sc->sc_rev < 0x20) { 466 printf("%s: 21040 must be at least pass 2.0\n", 467 sc->sc_dev.dv_xname); 468 return; 469 } 470 break; 471 472 case TULIP_CHIP_21140: 473 if (sc->sc_rev < 0x11) { 474 printf("%s: 21140 must be at least pass 1.1\n", 475 sc->sc_dev.dv_xname); 476 return; 477 } 478 break; 479 480 default: 481 /* Nothing. */ 482 break; 483 } 484 485 /* 486 * Check to see if the device is in power-save mode, and 487 * being it out if necessary. 488 */ 489 switch (sc->sc_chip) { 490 case TULIP_CHIP_21140: 491 case TULIP_CHIP_21140A: 492 case TULIP_CHIP_21142: 493 case TULIP_CHIP_21143: 494 case TULIP_CHIP_MX98713A: 495 case TULIP_CHIP_MX98715: 496 case TULIP_CHIP_MX98715A: 497 case TULIP_CHIP_MX98715AEC_X: 498 case TULIP_CHIP_MX98725: 499 case TULIP_CHIP_DM9102: 500 case TULIP_CHIP_DM9102A: 501 case TULIP_CHIP_AX88140: 502 case TULIP_CHIP_AX88141: 503 case TULIP_CHIP_RS7112: 504 /* 505 * Clear the "sleep mode" bit in the CFDA register. 506 */ 507 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 508 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 509 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 510 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 511 break; 512 513 default: 514 /* Nothing. */ 515 break; 516 } 517 518 /* power up chip */ 519 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 520 NULL)) && error != EOPNOTSUPP) { 521 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 522 error); 523 return; 524 } 525 526 /* 527 * Map the device. 528 */ 529 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 530 PCI_MAPREG_TYPE_IO, 0, 531 &iot, &ioh, NULL, NULL) == 0); 532 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 533 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 534 &memt, &memh, NULL, NULL) == 0); 535 536 if (memh_valid) { 537 sc->sc_st = memt; 538 sc->sc_sh = memh; 539 } else if (ioh_valid) { 540 sc->sc_st = iot; 541 sc->sc_sh = ioh; 542 } else { 543 printf("%s: unable to map device registers\n", 544 sc->sc_dev.dv_xname); 545 return; 546 } 547 548 sc->sc_dmat = pa->pa_dmat; 549 550 /* 551 * Make sure bus mastering is enabled. 552 */ 553 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 554 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 555 PCI_COMMAND_MASTER_ENABLE); 556 557 /* 558 * Get the cacheline size. 559 */ 560 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 561 PCI_BHLC_REG)); 562 563 /* 564 * Get PCI data moving command info. 565 */ 566 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 567 sc->sc_flags |= TULIPF_MRL; 568 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 569 sc->sc_flags |= TULIPF_MRM; 570 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 571 sc->sc_flags |= TULIPF_MWI; 572 573 /* 574 * Read the contents of the Ethernet Address ROM/SROM. 575 */ 576 switch (sc->sc_chip) { 577 case TULIP_CHIP_21040: 578 sc->sc_srom_addrbits = 6; 579 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 580 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 581 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 582 for (j = 0; j < 10000; j++) { 583 val = TULIP_READ(sc, CSR_MIIROM); 584 if ((val & MIIROM_DN) == 0) 585 break; 586 } 587 sc->sc_srom[i] = val & MIIROM_DATA; 588 } 589 break; 590 591 case TULIP_CHIP_82C168: 592 case TULIP_CHIP_82C169: 593 { 594 sc->sc_srom_addrbits = 2; 595 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 596 597 /* 598 * The Lite-On PNIC stores the Ethernet address in 599 * the first 3 words of the EEPROM. EEPROM access 600 * is not like the other Tulip chips. 601 */ 602 for (i = 0; i < 6; i += 2) { 603 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 604 PNIC_SROMCTL_READ | (i >> 1)); 605 for (j = 0; j < 500; j++) { 606 delay(2); 607 val = TULIP_READ(sc, CSR_MIIROM); 608 if ((val & PNIC_MIIROM_BUSY) == 0) 609 break; 610 } 611 if (val & PNIC_MIIROM_BUSY) { 612 printf("%s: EEPROM timed out\n", 613 sc->sc_dev.dv_xname); 614 return; 615 } 616 val &= PNIC_MIIROM_DATA; 617 sc->sc_srom[i] = val >> 8; 618 sc->sc_srom[i + 1] = val & 0xff; 619 } 620 break; 621 } 622 623 default: 624 /* 625 * XXX This isn't quite the right way to do this; we should 626 * XXX be attempting to fetch the mac-addr property in the 627 * XXX bus-agnostic part of the driver independently. But 628 * XXX that requires a larger change in the SROM handling 629 * XXX logic, and for now we can at least remove a machine- 630 * XXX dependent wart from the PCI front-end. 631 */ 632 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 633 "mac-addr"); 634 if (ea != NULL) { 635 extern int tlp_srom_debug; 636 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 637 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 638 639 memcpy(enaddr, prop_data_data_nocopy(ea), 640 ETHER_ADDR_LEN); 641 642 sc->sc_srom_addrbits = 6; 643 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 644 M_NOWAIT|M_ZERO); 645 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 646 if (tlp_srom_debug) { 647 printf("SROM CONTENTS:"); 648 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 649 if ((i % 8) == 0) 650 printf("\n\t"); 651 printf("0x%02x ", sc->sc_srom[i]); 652 } 653 printf("\n"); 654 } 655 break; 656 } 657 658 /* Check for a slaved ROM on a multi-port board. */ 659 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 660 TULIP_PCI_SLAVEROM); 661 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 662 sc->sc_srom_addrbits = 663 psc->sc_master->sc_tulip.sc_srom_addrbits; 664 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 665 enaddr[5] += 666 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 667 } 668 else if (tlp_read_srom(sc) == 0) 669 goto cant_cope; 670 break; 671 } 672 673 /* 674 * Deal with chip/board quirks. This includes setting up 675 * the mediasw, and extracting the Ethernet address from 676 * the rombuf. 677 */ 678 switch (sc->sc_chip) { 679 case TULIP_CHIP_21040: 680 /* 681 * Parse the Ethernet Address ROM. 682 */ 683 if (tlp_parse_old_srom(sc, enaddr) == 0) 684 goto cant_cope; 685 686 687 /* 688 * All 21040 boards start out with the same 689 * media switch. 690 */ 691 sc->sc_mediasw = &tlp_21040_mediasw; 692 693 /* 694 * Deal with any quirks this board might have. 695 */ 696 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 697 break; 698 699 case TULIP_CHIP_21041: 700 /* Check for new format SROM. */ 701 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 702 /* 703 * Not an ISV SROM; try the old DEC Ethernet Address 704 * ROM format. 705 */ 706 if (tlp_parse_old_srom(sc, enaddr) == 0) 707 goto cant_cope; 708 } 709 710 /* 711 * All 21041 boards use the same media switch; they all 712 * work basically the same! Yippee! 713 */ 714 sc->sc_mediasw = &tlp_21041_mediasw; 715 716 /* 717 * Deal with any quirks this board might have. 718 */ 719 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 720 break; 721 722 case TULIP_CHIP_21140: 723 case TULIP_CHIP_21140A: 724 /* Check for new format SROM. */ 725 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 726 /* 727 * Not an ISV SROM; try the old DEC Ethernet Address 728 * ROM format. 729 */ 730 if (tlp_parse_old_srom(sc, enaddr) == 0) 731 goto cant_cope; 732 } else { 733 /* 734 * We start out with the 2114x ISV media switch. 735 * When we search for quirks, we may change to 736 * a different switch. 737 */ 738 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 739 } 740 741 /* 742 * Deal with any quirks this board might have. 743 */ 744 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 745 746 /* 747 * Bail out now if we can't deal with this board. 748 */ 749 if (sc->sc_mediasw == NULL) 750 goto cant_cope; 751 break; 752 753 case TULIP_CHIP_21142: 754 case TULIP_CHIP_21143: 755 /* Check for new format SROM. */ 756 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 757 /* 758 * Not an ISV SROM; try the old DEC Ethernet Address 759 * ROM format. 760 */ 761 if (tlp_parse_old_srom(sc, enaddr) == 0) { 762 /* 763 * One last try: just copy the address 764 * from offset 20 and try to look 765 * up quirks. 766 */ 767 memcpy(enaddr, &sc->sc_srom[20], 768 ETHER_ADDR_LEN); 769 } 770 } else { 771 /* 772 * We start out with the 2114x ISV media switch. 773 * When we search for quirks, we may change to 774 * a different switch. 775 */ 776 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 777 } 778 779 /* 780 * Deal with any quirks this board might have. 781 */ 782 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 783 784 /* 785 * Bail out now if we can't deal with this board. 786 */ 787 if (sc->sc_mediasw == NULL) 788 goto cant_cope; 789 break; 790 791 case TULIP_CHIP_82C168: 792 case TULIP_CHIP_82C169: 793 /* 794 * Lite-On PNIC's Ethernet address is the first 6 795 * bytes of its EEPROM. 796 */ 797 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 798 799 /* 800 * Lite-On PNICs always use the same mediasw; we 801 * select MII vs. internal NWAY automatically. 802 */ 803 sc->sc_mediasw = &tlp_pnic_mediasw; 804 break; 805 806 case TULIP_CHIP_MX98713: 807 /* 808 * The Macronix MX98713 has an MII and GPIO, but no 809 * internal Nway block. This chip is basically a 810 * perfect 21140A clone, with the exception of the 811 * a magic register frobbing in order to make the 812 * interface function. 813 */ 814 if (tlp_isv_srom_enaddr(sc, enaddr)) { 815 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 816 break; 817 } 818 /* FALLTHROUGH */ 819 820 case TULIP_CHIP_82C115: 821 /* 822 * Yippee! The Lite-On 82C115 is a clone of 823 * the MX98725 (the data sheet even says `MXIC' 824 * on it)! Imagine that, a clone of a clone. 825 * 826 * The differences are really minimal: 827 * 828 * - Wake-On-LAN support 829 * - 128-bit multicast hash table, rather than 830 * the standard 512-bit hash table 831 */ 832 /* FALLTHROUGH */ 833 834 case TULIP_CHIP_MX98713A: 835 case TULIP_CHIP_MX98715A: 836 case TULIP_CHIP_MX98715AEC_X: 837 case TULIP_CHIP_MX98725: 838 /* 839 * The MX98713A has an MII as well as an internal Nway block, 840 * but no GPIO. The MX98715 and MX98725 have an internal 841 * Nway block only. 842 * 843 * The internal Nway block, unlike the Lite-On PNIC's, does 844 * just that - performs Nway. Once autonegotiation completes, 845 * we must program the GPR media information into the chip. 846 * 847 * The byte offset of the Ethernet address is stored at 848 * offset 0x70. 849 */ 850 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 851 sc->sc_mediasw = &tlp_pmac_mediasw; 852 break; 853 854 case TULIP_CHIP_WB89C840F: 855 /* 856 * Winbond 89C840F's Ethernet address is the first 857 * 6 bytes of its EEPROM. 858 */ 859 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 860 861 /* 862 * Winbond 89C840F has an MII attached to the SIO. 863 */ 864 sc->sc_mediasw = &tlp_sio_mii_mediasw; 865 break; 866 867 case TULIP_CHIP_AL981: 868 /* 869 * The ADMtek AL981's Ethernet address is located 870 * at offset 8 of its EEPROM. 871 */ 872 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 873 874 /* 875 * ADMtek AL981 has a built-in PHY accessed through 876 * special registers. 877 */ 878 sc->sc_mediasw = &tlp_al981_mediasw; 879 break; 880 881 case TULIP_CHIP_AN983: 882 case TULIP_CHIP_AN985: 883 /* 884 * The ADMtek AN985's Ethernet address is located 885 * at offset 8 of its EEPROM. 886 */ 887 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 888 889 /* 890 * The ADMtek AN985 can be configured in Single-Chip 891 * mode or MAC-only mode. Single-Chip uses the built-in 892 * PHY, MAC-only has an external PHY (usually HomePNA). 893 * The selection is based on an EEPROM setting, and both 894 * PHYs are accessed via MII attached to SIO. 895 * 896 * The AN985 "ghosts" the internal PHY onto all 897 * MII addresses, so we have to use a media init 898 * routine that limits the search. 899 * XXX How does this work with MAC-only mode? 900 */ 901 sc->sc_mediasw = &tlp_an985_mediasw; 902 break; 903 904 case TULIP_CHIP_DM9102: 905 case TULIP_CHIP_DM9102A: 906 /* 907 * Some boards with the Davicom chip have an ISV 908 * SROM (mostly DM9102A boards -- trying to describe 909 * the HomePNA PHY, probably) although the data in 910 * them is generally wrong. Check for ISV format 911 * and grab the Ethernet address that way, and if 912 * that fails, fall back on grabbing it from an 913 * observed offset of 20 (which is where it would 914 * be in an ISV SROM anyhow, tho ISV can cope with 915 * multi-port boards). 916 */ 917 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 918 #ifdef __sparc__ 919 if ((sc->sc_srom[20] == 0 && 920 sc->sc_srom[21] == 0 && 921 sc->sc_srom[22] == 0) || 922 (sc->sc_srom[20] == 0xff && 923 sc->sc_srom[21] == 0xff && 924 sc->sc_srom[22] == 0xff)) { 925 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 926 } else 927 #endif 928 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 929 } 930 931 /* 932 * Davicom chips all have an internal MII interface 933 * and a built-in PHY. DM9102A also has a an external 934 * MII interface, usually with a HomePNA PHY attached 935 * to it. 936 */ 937 sc->sc_mediasw = &tlp_dm9102_mediasw; 938 break; 939 940 case TULIP_CHIP_AX88140: 941 case TULIP_CHIP_AX88141: 942 /* 943 * ASIX AX88140/AX88141 Ethernet Address is located at offset 944 * 20 of the SROM. 945 */ 946 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 947 948 /* 949 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 950 * an external MII interface. 951 */ 952 sc->sc_mediasw = &tlp_asix_mediasw; 953 break; 954 955 case TULIP_CHIP_RS7112: 956 /* 957 * RS7112 Ethernet Address is located of offset 0x19a 958 * of the SROM 959 */ 960 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 961 962 /* RS7112 chip has a PHY at MII address 1 */ 963 sc->sc_mediasw = &tlp_rs7112_mediasw; 964 break; 965 966 default: 967 cant_cope: 968 printf("%s: sorry, unable to handle your board\n", 969 sc->sc_dev.dv_xname); 970 return; 971 } 972 973 /* 974 * Handle shared interrupts. 975 */ 976 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 977 if (psc->sc_master) 978 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 979 else { 980 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 981 TULIP_PCI_SLAVEINTR); 982 if (psc->sc_master == NULL) 983 psc->sc_master = psc; 984 } 985 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 986 psc, sc_intrq); 987 } 988 989 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 990 printf("%s: sharing interrupt with %s\n", 991 sc->sc_dev.dv_xname, 992 psc->sc_master->sc_tulip.sc_dev.dv_xname); 993 } else { 994 /* 995 * Map and establish our interrupt. 996 */ 997 if (pci_intr_map(pa, &ih)) { 998 printf("%s: unable to map interrupt\n", 999 sc->sc_dev.dv_xname); 1000 return; 1001 } 1002 intrstr = pci_intr_string(pc, ih); 1003 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1004 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1005 tlp_pci_shared_intr : tlp_intr, sc); 1006 if (psc->sc_ih == NULL) { 1007 printf("%s: unable to establish interrupt", 1008 sc->sc_dev.dv_xname); 1009 if (intrstr != NULL) 1010 printf(" at %s", intrstr); 1011 printf("\n"); 1012 return; 1013 } 1014 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1015 intrstr); 1016 } 1017 1018 /* 1019 * Finish off the attach. 1020 */ 1021 tlp_attach(sc, enaddr); 1022 } 1023 1024 static int 1025 tlp_pci_shared_intr(void *arg) 1026 { 1027 struct tulip_pci_softc *master = arg, *slave; 1028 int rv = 0; 1029 1030 for (slave = LIST_FIRST(&master->sc_intrslaves); 1031 slave != NULL; 1032 slave = LIST_NEXT(slave, sc_intrq)) 1033 rv |= tlp_intr(&slave->sc_tulip); 1034 1035 return (rv); 1036 } 1037 1038 static void 1039 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1040 { 1041 struct tulip_softc *sc = &psc->sc_tulip; 1042 1043 /* 1044 * This isn't really a quirk-gathering device, really. We 1045 * just want to get the spiffy DEC board name from the SROM. 1046 */ 1047 strcpy(sc->sc_name, "DEC "); 1048 1049 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1050 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1051 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1052 else 1053 sc->sc_name[3] = '\0'; 1054 } 1055 1056 static void 1057 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1058 { 1059 struct tulip_softc *sc = &psc->sc_tulip; 1060 u_int16_t id = 0; 1061 1062 /* 1063 * If we have a slaved ROM, just copy the bits from the master. 1064 * This is in case we fail the ROM ID check (older boards) and 1065 * need to fall back on Ethernet address model checking; that 1066 * will fail for slave chips. 1067 */ 1068 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1069 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1070 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1071 psc->sc_flags |= 1072 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1073 return; 1074 } 1075 1076 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1077 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1078 switch (id) { 1079 zx312: 1080 case 0x0602: /* ZX312 */ 1081 strcpy(sc->sc_name, "ZNYX ZX312"); 1082 return; 1083 1084 case 0x0622: /* ZX312T */ 1085 strcpy(sc->sc_name, "ZNYX ZX312T"); 1086 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1087 return; 1088 1089 zx314_inta: 1090 case 0x0701: /* ZX314 INTA */ 1091 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1092 /* FALLTHROUGH */ 1093 case 0x0711: /* ZX314 */ 1094 strcpy(sc->sc_name, "ZNYX ZX314"); 1095 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1096 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1097 return; 1098 1099 zx315_inta: 1100 case 0x0801: /* ZX315 INTA */ 1101 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1102 /* FALLTHROUGH */ 1103 case 0x0811: /* ZX315 */ 1104 strcpy(sc->sc_name, "ZNYX ZX315"); 1105 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1106 return; 1107 1108 default: 1109 id = 0; 1110 break; 1111 } 1112 } 1113 1114 /* 1115 * Deal with boards that have broken ROMs. 1116 */ 1117 if (id == 0) { 1118 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1119 goto zx314_inta; 1120 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1121 goto zx315_inta; 1122 if ((enaddr[3] & ~3) == 0xec) 1123 goto zx312; 1124 } 1125 1126 strcpy(sc->sc_name, "ZNYX ZX31x"); 1127 } 1128 1129 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1130 1131 static void 1132 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1133 { 1134 struct tulip_softc *sc = &psc->sc_tulip; 1135 pcireg_t subid; 1136 1137 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1138 1139 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1140 return; /* ? */ 1141 1142 switch (PCI_PRODUCT(subid) & 0xff) { 1143 /* 1144 * ZNYX 21143 boards with QS6611 PHY 1145 */ 1146 case 0x12: /* ZX345Q */ 1147 case 0x13: /* ZX346Q */ 1148 case 0x14: /* ZX348Q */ 1149 case 0x18: /* ZX414 */ 1150 case 0x19: /* ZX412 */ 1151 case 0x1a: /* ZX444 */ 1152 case 0x1b: /* ZX442 */ 1153 case 0x23: /* ZX212 */ 1154 case 0x24: /* ZX214 */ 1155 case 0x29: /* ZX374 */ 1156 case 0x2d: /* ZX372 */ 1157 case 0x2b: /* ZX244 */ 1158 case 0x2c: /* ZX424 */ 1159 case 0x2e: /* ZX422 */ 1160 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1161 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1162 break; 1163 } 1164 } 1165 1166 static void 1167 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1168 { 1169 1170 /* 1171 * Reset QS6611 PHY. 1172 */ 1173 TULIP_WRITE(sc, CSR_SIAGEN, 1174 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1175 delay(200); 1176 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1177 delay(10000); 1178 } 1179 1180 static void 1181 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1182 { 1183 struct tulip_softc *sc = &psc->sc_tulip; 1184 u_int16_t id1, id2, ei; 1185 int auibnc = 0, utp = 0; 1186 char *cp; 1187 1188 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1189 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1190 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1191 1192 strcpy(sc->sc_name, "SMC 8432"); 1193 cp = &sc->sc_name[8]; 1194 1195 if ((id1 & 1) == 0) { 1196 *cp++ = 'B'; 1197 auibnc = 1; 1198 } 1199 if ((id1 & 0xff) > 0x32) { 1200 *cp++ = 'T'; 1201 utp = 1; 1202 } 1203 if ((id1 & 0x4000) == 0) { 1204 *cp++ = 'A'; 1205 auibnc = 1; 1206 } 1207 if (id2 == 0x15) { 1208 sc->sc_name[7] = '4'; 1209 *cp++ = '-'; 1210 *cp++ = 'C'; 1211 *cp++ = 'H'; 1212 *cp++ = ei ? '2' : '1'; 1213 } 1214 *cp = '\0'; 1215 1216 if (utp != 0 && auibnc == 0) 1217 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1218 else if (utp == 0 && auibnc != 0) 1219 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1220 } 1221 1222 static void 1223 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1224 { 1225 1226 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1227 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1228 } 1229 1230 static void 1231 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1232 { 1233 1234 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1235 } 1236 1237 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1238 1239 static void 1240 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1241 { 1242 struct tulip_softc *sc = &psc->sc_tulip; 1243 1244 /* 1245 * Some Asante boards don't use the ISV SROM format. For 1246 * those that don't, we initialize the GPIO direction bits, 1247 * and provide our own reset hook, which resets the MII. 1248 * 1249 * All of these boards use SIO-attached-MII media. 1250 */ 1251 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1252 return; 1253 1254 strcpy(sc->sc_name, "Asante"); 1255 1256 sc->sc_gp_dir = 0xbf; 1257 sc->sc_reset = tlp_pci_asante_21140_reset; 1258 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1259 } 1260 1261 static void 1262 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1263 { 1264 1265 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1266 TULIP_WRITE(sc, CSR_GPP, 0x8); 1267 delay(100); 1268 TULIP_WRITE(sc, CSR_GPP, 0); 1269 } 1270 1271 /* 1272 * SMC 9332DST media switch. 1273 */ 1274 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1275 1276 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1277 tlp_smc9332dst_tmsw_init, 1278 tlp_21140_gpio_get, 1279 tlp_21140_gpio_set 1280 }; 1281 1282 static void 1283 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1284 { 1285 struct tulip_softc *sc = &psc->sc_tulip; 1286 1287 if (sc->sc_mediasw != NULL) { 1288 return; 1289 } 1290 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1291 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1292 } 1293 1294 static void 1295 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1296 { 1297 struct tulip_21x4x_media *tm; 1298 const char *sep = ""; 1299 uint32_t reg; 1300 int i, cnt; 1301 1302 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1303 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1304 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1305 1306 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1307 tlp_mediastatus); 1308 printf("%s: ", sc->sc_dev.dv_xname); 1309 1310 #define ADD(m, c) \ 1311 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1312 tm->tm_opmode = (c); \ 1313 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1314 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1315 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1316 1317 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1318 PRINT("10baseT"); 1319 1320 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1321 OPMODE_TTM | OPMODE_FD); 1322 PRINT("10baseT-FDX"); 1323 1324 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1325 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1326 PRINT("100baseTX"); 1327 1328 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1329 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1330 PRINT("100baseTX-FDX"); 1331 1332 #undef ADD 1333 #undef PRINT 1334 1335 printf("\n"); 1336 1337 tlp_reset(sc); 1338 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1339 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1340 delay(10); 1341 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1342 delay(200000); 1343 cnt = 0; 1344 for (i = 1000; i > 0; i--) { 1345 reg = TULIP_READ(sc, CSR_GPP); 1346 if ((~reg & (GPP_SMC9332DST_OK10 | 1347 GPP_SMC9332DST_OK100)) == 0) { 1348 if (cnt++ > 100) { 1349 break; 1350 } 1351 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1352 break; 1353 } else { 1354 cnt = 0; 1355 } 1356 delay(1000); 1357 } 1358 if (cnt > 100) { 1359 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1360 } else { 1361 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1362 } 1363 } 1364 1365 static void 1366 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1367 { 1368 struct tulip_softc *sc = &psc->sc_tulip; 1369 char *p1 = (char *) &sc->sc_srom[32]; 1370 char *p2 = &sc->sc_name[0]; 1371 1372 do { 1373 if ((unsigned char) *p1 & 0x80) 1374 *p2++ = ' '; 1375 else 1376 *p2++ = *p1; 1377 } while (*p1++); 1378 } 1379 1380 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1381 1382 static void 1383 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1384 { 1385 struct tulip_softc *sc = &psc->sc_tulip; 1386 1387 /* 1388 * Cobalt Networks interfaces are just MII-on-SIO. 1389 */ 1390 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1391 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1392 1393 /* 1394 * The Cobalt systems tend to fall back to store-and-forward 1395 * pretty quickly, so we select that from the beginning to 1396 * avoid initial timeouts. 1397 */ 1398 sc->sc_txthresh = TXTH_SF; 1399 } 1400 1401 static void 1402 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1403 { 1404 /* 1405 * Reset PHY. 1406 */ 1407 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1408 delay(10); 1409 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1410 delay(10); 1411 } 1412 1413 static void 1414 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1415 { 1416 struct tulip_softc *sc = &psc->sc_tulip; 1417 1418 /* 1419 * Algorithmics boards just have MII-on-SIO. 1420 * 1421 * XXX They also have AUI on the serial interface. 1422 * XXX Deal with this. 1423 */ 1424 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1425 } 1426 1427 /* 1428 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1429 */ 1430 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1431 1432 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1433 tlp_cogent_em1x0_tmsw_init, 1434 tlp_21140_gpio_get, 1435 tlp_21140_gpio_set 1436 }; 1437 1438 static void 1439 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1440 { 1441 struct tulip_softc *sc = &psc->sc_tulip; 1442 uint8_t *srom = sc->sc_srom, id0; 1443 uint16_t id1, id2; 1444 1445 if (sc->sc_mediasw == NULL) { 1446 id0 = srom[32]; 1447 switch (id0) { 1448 case 0x12: 1449 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1450 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1451 break; 1452 1453 case 0x15: 1454 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1455 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1456 break; 1457 1458 #if 0 1459 case XXX: 1460 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1461 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1462 break; 1463 #endif 1464 1465 default: 1466 printf("%s: unknown Cogent board ID 0x%02x\n", 1467 sc->sc_dev.dv_xname, id0); 1468 } 1469 return; 1470 } 1471 1472 id1 = TULIP_ROM_GETW(srom, 0); 1473 id2 = TULIP_ROM_GETW(srom, 2); 1474 if (id1 != 0x1109) { 1475 goto unknown; 1476 } 1477 1478 switch (id2) { 1479 case 0x1900: 1480 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1481 break; 1482 1483 case 0x2400: 1484 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1485 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1486 break; 1487 1488 case 0x2b00: 1489 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1490 break; 1491 1492 case 0x3000: 1493 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1494 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1495 break; 1496 1497 default: 1498 unknown: 1499 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1500 sc->sc_dev.dv_xname, id1, id2); 1501 } 1502 } 1503 1504 static void 1505 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1506 { 1507 struct tulip_21x4x_media *tm; 1508 const char *sep = ""; 1509 1510 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1511 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1512 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1513 1514 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1515 tlp_mediastatus); 1516 printf("%s: ", sc->sc_dev.dv_xname); 1517 1518 #define ADD(m, c) \ 1519 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1520 tm->tm_opmode = (c); \ 1521 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1522 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1523 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1524 1525 if (sc->sc_srom[32] == 0x15) { 1526 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1527 OPMODE_PS | OPMODE_PCS); 1528 PRINT("100baseFX"); 1529 1530 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1531 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1532 PRINT("100baseFX-FDX"); 1533 printf("\n"); 1534 1535 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1536 } else { 1537 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1538 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1539 PRINT("100baseTX"); 1540 1541 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1542 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1543 PRINT("100baseTX-FDX"); 1544 printf("\n"); 1545 1546 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1547 } 1548 1549 #undef ADD 1550 #undef PRINT 1551 } 1552 1553 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1554 1555 static void 1556 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1557 const u_int8_t *enaddr) 1558 { 1559 struct tulip_softc *sc = &psc->sc_tulip; 1560 1561 /* 1562 * Netwinders just use MII-on_SIO. 1563 */ 1564 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1565 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1566 } 1567 1568 void 1569 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1570 { 1571 1572 /* 1573 * Reset the PHY. 1574 */ 1575 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1576 delay(10); 1577 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1578 delay(10); 1579 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1580 delay(10); 1581 } 1582
Indexes created Wed Oct 01 13:09:50 GMT 2025