if_tlp_pci.c revision 1.98
1 /* $NetBSD: if_tlp_pci.c,v 1.98 2006/11/16 01:33:09 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.98 2006/11/16 01:33:09 christos Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const u_int8_t *); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const u_int8_t *); 210 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 211 const u_int8_t *); 212 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 213 const u_int8_t *); 214 215 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 216 const u_int8_t *); 217 218 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 233 const u_int8_t *); 234 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 235 const u_int8_t *); 236 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 237 const u_int8_t *); 238 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 239 const u_int8_t *); 240 241 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 245 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 248 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 249 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 250 { NULL, { 0, 0, 0 } } 251 }; 252 253 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 254 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 255 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 256 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 257 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 258 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 259 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 260 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 261 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 262 { NULL, { 0, 0, 0 } } 263 }; 264 265 static int tlp_pci_shared_intr(void *); 266 267 static const struct tulip_pci_product * 268 tlp_pci_lookup(const struct pci_attach_args *pa) 269 { 270 const struct tulip_pci_product *tpp; 271 272 /* Don't match lmc cards */ 273 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 274 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 275 return NULL; 276 277 for (tpp = tlp_pci_products; 278 tlp_chip_names[tpp->tpp_chip] != NULL; 279 tpp++) { 280 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 281 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 282 return (tpp); 283 } 284 return (NULL); 285 } 286 287 static void 288 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 289 const struct tlp_pci_quirks *tpq) 290 { 291 292 for (; tpq->tpq_func != NULL; tpq++) { 293 if (tpq->tpq_oui[0] == enaddr[0] && 294 tpq->tpq_oui[1] == enaddr[1] && 295 tpq->tpq_oui[2] == enaddr[2]) { 296 (*tpq->tpq_func)(psc, enaddr); 297 return; 298 } 299 } 300 } 301 302 static void 303 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 304 { 305 extern struct cfdriver tlp_cd; 306 struct tulip_pci_softc *cur, *best = NULL; 307 struct tulip_softc *sc = &psc->sc_tulip; 308 int i; 309 310 /* 311 * First of all, find the lowest pcidev numbered device on our 312 * bus marked as shared. That should be our master. 313 */ 314 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 315 if ((cur = tlp_cd.cd_devs[i]) == NULL) 316 continue; 317 if (device_parent(&cur->sc_tulip.sc_dev) != 318 device_parent(&sc->sc_dev)) 319 continue; 320 if ((cur->sc_flags & shared) == 0) 321 continue; 322 if (cur == psc) 323 continue; 324 if (best == NULL || 325 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 326 best = cur; 327 } 328 329 if (best != NULL) { 330 psc->sc_master = best; 331 psc->sc_flags |= (shared | slaved); 332 } 333 } 334 335 static int 336 tlp_pci_match(struct device *parent, struct cfdata *match, 337 void *aux) 338 { 339 struct pci_attach_args *pa = aux; 340 341 if (tlp_pci_lookup(pa) != NULL) 342 return (10); /* beat if_de.c */ 343 344 return (0); 345 } 346 347 static void 348 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 349 { 350 struct tulip_pci_softc *psc = (void *) self; 351 struct tulip_softc *sc = &psc->sc_tulip; 352 struct pci_attach_args *pa = aux; 353 pci_chipset_tag_t pc = pa->pa_pc; 354 pci_intr_handle_t ih; 355 const char *intrstr = NULL; 356 bus_space_tag_t iot, memt; 357 bus_space_handle_t ioh, memh; 358 int ioh_valid, memh_valid, i, j; 359 const struct tulip_pci_product *tpp; 360 prop_data_t ea; 361 u_int8_t enaddr[ETHER_ADDR_LEN]; 362 u_int32_t val = 0; 363 pcireg_t reg; 364 int error; 365 366 sc->sc_devno = pa->pa_device; 367 psc->sc_pc = pa->pa_pc; 368 psc->sc_pcitag = pa->pa_tag; 369 370 LIST_INIT(&psc->sc_intrslaves); 371 372 tpp = tlp_pci_lookup(pa); 373 if (tpp == NULL) { 374 printf("\n"); 375 panic("tlp_pci_attach: impossible"); 376 } 377 sc->sc_chip = tpp->tpp_chip; 378 379 /* 380 * By default, Tulip registers are 8 bytes long (4 bytes 381 * followed by a 4 byte pad). 382 */ 383 sc->sc_regshift = 3; 384 385 /* 386 * No power management hooks. 387 * XXX Maybe we should add some! 388 */ 389 sc->sc_flags |= TULIPF_ENABLED; 390 391 /* 392 * Get revision info, and set some chip-specific variables. 393 */ 394 sc->sc_rev = PCI_REVISION(pa->pa_class); 395 switch (sc->sc_chip) { 396 case TULIP_CHIP_21140: 397 if (sc->sc_rev >= 0x20) 398 sc->sc_chip = TULIP_CHIP_21140A; 399 break; 400 401 case TULIP_CHIP_21142: 402 if (sc->sc_rev >= 0x20) 403 sc->sc_chip = TULIP_CHIP_21143; 404 break; 405 406 case TULIP_CHIP_82C168: 407 if (sc->sc_rev >= 0x20) 408 sc->sc_chip = TULIP_CHIP_82C169; 409 break; 410 411 case TULIP_CHIP_MX98713: 412 if (sc->sc_rev >= 0x10) 413 sc->sc_chip = TULIP_CHIP_MX98713A; 414 break; 415 416 case TULIP_CHIP_MX98715: 417 if (sc->sc_rev >= 0x20) 418 sc->sc_chip = TULIP_CHIP_MX98715A; 419 if (sc->sc_rev >= 0x25) 420 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 421 if (sc->sc_rev >= 0x30) 422 sc->sc_chip = TULIP_CHIP_MX98725; 423 break; 424 425 case TULIP_CHIP_WB89C840F: 426 sc->sc_regshift = 2; 427 break; 428 429 case TULIP_CHIP_AN985: 430 /* 431 * The AN983 and AN985 are very similar, and are 432 * differentiated by a "signature" register that 433 * is like, but not identical, to a PCI ID register. 434 */ 435 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 436 switch (reg) { 437 case 0x09811317: 438 sc->sc_chip = TULIP_CHIP_AN985; 439 break; 440 441 case 0x09851317: 442 sc->sc_chip = TULIP_CHIP_AN983; 443 break; 444 445 default: 446 /* Unknown -- use default. */ 447 break; 448 } 449 break; 450 451 case TULIP_CHIP_AX88140: 452 if (sc->sc_rev >= 0x10) 453 sc->sc_chip = TULIP_CHIP_AX88141; 454 break; 455 456 case TULIP_CHIP_DM9102: 457 if (sc->sc_rev >= 0x30) 458 sc->sc_chip = TULIP_CHIP_DM9102A; 459 break; 460 461 default: 462 /* Nothing. */ 463 break; 464 } 465 466 printf(": %s Ethernet, pass %d.%d\n", 467 tlp_chip_names[sc->sc_chip], 468 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 469 470 switch (sc->sc_chip) { 471 case TULIP_CHIP_21040: 472 if (sc->sc_rev < 0x20) { 473 printf("%s: 21040 must be at least pass 2.0\n", 474 sc->sc_dev.dv_xname); 475 return; 476 } 477 break; 478 479 case TULIP_CHIP_21140: 480 if (sc->sc_rev < 0x11) { 481 printf("%s: 21140 must be at least pass 1.1\n", 482 sc->sc_dev.dv_xname); 483 return; 484 } 485 break; 486 487 default: 488 /* Nothing. */ 489 break; 490 } 491 492 /* 493 * Check to see if the device is in power-save mode, and 494 * being it out if necessary. 495 */ 496 switch (sc->sc_chip) { 497 case TULIP_CHIP_21140: 498 case TULIP_CHIP_21140A: 499 case TULIP_CHIP_21142: 500 case TULIP_CHIP_21143: 501 case TULIP_CHIP_MX98713A: 502 case TULIP_CHIP_MX98715: 503 case TULIP_CHIP_MX98715A: 504 case TULIP_CHIP_MX98715AEC_X: 505 case TULIP_CHIP_MX98725: 506 case TULIP_CHIP_DM9102: 507 case TULIP_CHIP_DM9102A: 508 case TULIP_CHIP_AX88140: 509 case TULIP_CHIP_AX88141: 510 case TULIP_CHIP_RS7112: 511 /* 512 * Clear the "sleep mode" bit in the CFDA register. 513 */ 514 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 515 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 516 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 517 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 518 break; 519 520 default: 521 /* Nothing. */ 522 break; 523 } 524 525 /* power up chip */ 526 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 527 NULL)) && error != EOPNOTSUPP) { 528 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 529 error); 530 return; 531 } 532 533 /* 534 * Map the device. 535 */ 536 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 537 PCI_MAPREG_TYPE_IO, 0, 538 &iot, &ioh, NULL, NULL) == 0); 539 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 540 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 541 &memt, &memh, NULL, NULL) == 0); 542 543 if (memh_valid) { 544 sc->sc_st = memt; 545 sc->sc_sh = memh; 546 } else if (ioh_valid) { 547 sc->sc_st = iot; 548 sc->sc_sh = ioh; 549 } else { 550 printf("%s: unable to map device registers\n", 551 sc->sc_dev.dv_xname); 552 return; 553 } 554 555 sc->sc_dmat = pa->pa_dmat; 556 557 /* 558 * Make sure bus mastering is enabled. 559 */ 560 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 561 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 562 PCI_COMMAND_MASTER_ENABLE); 563 564 /* 565 * Get the cacheline size. 566 */ 567 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 568 PCI_BHLC_REG)); 569 570 /* 571 * Get PCI data moving command info. 572 */ 573 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 574 sc->sc_flags |= TULIPF_MRL; 575 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 576 sc->sc_flags |= TULIPF_MRM; 577 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 578 sc->sc_flags |= TULIPF_MWI; 579 580 /* 581 * Read the contents of the Ethernet Address ROM/SROM. 582 */ 583 switch (sc->sc_chip) { 584 case TULIP_CHIP_21040: 585 sc->sc_srom_addrbits = 6; 586 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 587 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 588 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 589 for (j = 0; j < 10000; j++) { 590 val = TULIP_READ(sc, CSR_MIIROM); 591 if ((val & MIIROM_DN) == 0) 592 break; 593 } 594 sc->sc_srom[i] = val & MIIROM_DATA; 595 } 596 break; 597 598 case TULIP_CHIP_82C168: 599 case TULIP_CHIP_82C169: 600 { 601 sc->sc_srom_addrbits = 2; 602 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 603 604 /* 605 * The Lite-On PNIC stores the Ethernet address in 606 * the first 3 words of the EEPROM. EEPROM access 607 * is not like the other Tulip chips. 608 */ 609 for (i = 0; i < 6; i += 2) { 610 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 611 PNIC_SROMCTL_READ | (i >> 1)); 612 for (j = 0; j < 500; j++) { 613 delay(2); 614 val = TULIP_READ(sc, CSR_MIIROM); 615 if ((val & PNIC_MIIROM_BUSY) == 0) 616 break; 617 } 618 if (val & PNIC_MIIROM_BUSY) { 619 printf("%s: EEPROM timed out\n", 620 sc->sc_dev.dv_xname); 621 return; 622 } 623 val &= PNIC_MIIROM_DATA; 624 sc->sc_srom[i] = val >> 8; 625 sc->sc_srom[i + 1] = val & 0xff; 626 } 627 break; 628 } 629 630 default: 631 /* 632 * XXX This isn't quite the right way to do this; we should 633 * XXX be attempting to fetch the mac-addr property in the 634 * XXX bus-agnostic part of the driver independently. But 635 * XXX that requires a larger change in the SROM handling 636 * XXX logic, and for now we can at least remove a machine- 637 * XXX dependent wart from the PCI front-end. 638 */ 639 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 640 "mac-addr"); 641 if (ea != NULL) { 642 extern int tlp_srom_debug; 643 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 644 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 645 646 memcpy(enaddr, prop_data_data_nocopy(ea), 647 ETHER_ADDR_LEN); 648 649 sc->sc_srom_addrbits = 6; 650 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 651 M_NOWAIT|M_ZERO); 652 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 653 if (tlp_srom_debug) { 654 printf("SROM CONTENTS:"); 655 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 656 if ((i % 8) == 0) 657 printf("\n\t"); 658 printf("0x%02x ", sc->sc_srom[i]); 659 } 660 printf("\n"); 661 } 662 break; 663 } 664 665 /* Check for a slaved ROM on a multi-port board. */ 666 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 667 TULIP_PCI_SLAVEROM); 668 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 669 sc->sc_srom_addrbits = 670 psc->sc_master->sc_tulip.sc_srom_addrbits; 671 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 672 enaddr[5] += 673 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 674 } 675 else if (tlp_read_srom(sc) == 0) 676 goto cant_cope; 677 break; 678 } 679 680 /* 681 * Deal with chip/board quirks. This includes setting up 682 * the mediasw, and extracting the Ethernet address from 683 * the rombuf. 684 */ 685 switch (sc->sc_chip) { 686 case TULIP_CHIP_21040: 687 /* 688 * Parse the Ethernet Address ROM. 689 */ 690 if (tlp_parse_old_srom(sc, enaddr) == 0) 691 goto cant_cope; 692 693 694 /* 695 * All 21040 boards start out with the same 696 * media switch. 697 */ 698 sc->sc_mediasw = &tlp_21040_mediasw; 699 700 /* 701 * Deal with any quirks this board might have. 702 */ 703 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 704 break; 705 706 case TULIP_CHIP_21041: 707 /* Check for new format SROM. */ 708 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 709 /* 710 * Not an ISV SROM; try the old DEC Ethernet Address 711 * ROM format. 712 */ 713 if (tlp_parse_old_srom(sc, enaddr) == 0) 714 goto cant_cope; 715 } 716 717 /* 718 * All 21041 boards use the same media switch; they all 719 * work basically the same! Yippee! 720 */ 721 sc->sc_mediasw = &tlp_21041_mediasw; 722 723 /* 724 * Deal with any quirks this board might have. 725 */ 726 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 727 break; 728 729 case TULIP_CHIP_21140: 730 case TULIP_CHIP_21140A: 731 /* Check for new format SROM. */ 732 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 733 /* 734 * Not an ISV SROM; try the old DEC Ethernet Address 735 * ROM format. 736 */ 737 if (tlp_parse_old_srom(sc, enaddr) == 0) 738 goto cant_cope; 739 } else { 740 /* 741 * We start out with the 2114x ISV media switch. 742 * When we search for quirks, we may change to 743 * a different switch. 744 */ 745 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 746 } 747 748 /* 749 * Deal with any quirks this board might have. 750 */ 751 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 752 753 /* 754 * Bail out now if we can't deal with this board. 755 */ 756 if (sc->sc_mediasw == NULL) 757 goto cant_cope; 758 break; 759 760 case TULIP_CHIP_21142: 761 case TULIP_CHIP_21143: 762 /* Check for new format SROM. */ 763 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 764 /* 765 * Not an ISV SROM; try the old DEC Ethernet Address 766 * ROM format. 767 */ 768 if (tlp_parse_old_srom(sc, enaddr) == 0) { 769 /* 770 * One last try: just copy the address 771 * from offset 20 and try to look 772 * up quirks. 773 */ 774 memcpy(enaddr, &sc->sc_srom[20], 775 ETHER_ADDR_LEN); 776 } 777 } else { 778 /* 779 * We start out with the 2114x ISV media switch. 780 * When we search for quirks, we may change to 781 * a different switch. 782 */ 783 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 784 } 785 786 /* 787 * Deal with any quirks this board might have. 788 */ 789 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 790 791 /* 792 * Bail out now if we can't deal with this board. 793 */ 794 if (sc->sc_mediasw == NULL) 795 goto cant_cope; 796 break; 797 798 case TULIP_CHIP_82C168: 799 case TULIP_CHIP_82C169: 800 /* 801 * Lite-On PNIC's Ethernet address is the first 6 802 * bytes of its EEPROM. 803 */ 804 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 805 806 /* 807 * Lite-On PNICs always use the same mediasw; we 808 * select MII vs. internal NWAY automatically. 809 */ 810 sc->sc_mediasw = &tlp_pnic_mediasw; 811 break; 812 813 case TULIP_CHIP_MX98713: 814 /* 815 * The Macronix MX98713 has an MII and GPIO, but no 816 * internal Nway block. This chip is basically a 817 * perfect 21140A clone, with the exception of the 818 * a magic register frobbing in order to make the 819 * interface function. 820 */ 821 if (tlp_isv_srom_enaddr(sc, enaddr)) { 822 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 823 break; 824 } 825 /* FALLTHROUGH */ 826 827 case TULIP_CHIP_82C115: 828 /* 829 * Yippee! The Lite-On 82C115 is a clone of 830 * the MX98725 (the data sheet even says `MXIC' 831 * on it)! Imagine that, a clone of a clone. 832 * 833 * The differences are really minimal: 834 * 835 * - Wake-On-LAN support 836 * - 128-bit multicast hash table, rather than 837 * the standard 512-bit hash table 838 */ 839 /* FALLTHROUGH */ 840 841 case TULIP_CHIP_MX98713A: 842 case TULIP_CHIP_MX98715A: 843 case TULIP_CHIP_MX98715AEC_X: 844 case TULIP_CHIP_MX98725: 845 /* 846 * The MX98713A has an MII as well as an internal Nway block, 847 * but no GPIO. The MX98715 and MX98725 have an internal 848 * Nway block only. 849 * 850 * The internal Nway block, unlike the Lite-On PNIC's, does 851 * just that - performs Nway. Once autonegotiation completes, 852 * we must program the GPR media information into the chip. 853 * 854 * The byte offset of the Ethernet address is stored at 855 * offset 0x70. 856 */ 857 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 858 sc->sc_mediasw = &tlp_pmac_mediasw; 859 break; 860 861 case TULIP_CHIP_WB89C840F: 862 /* 863 * Winbond 89C840F's Ethernet address is the first 864 * 6 bytes of its EEPROM. 865 */ 866 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 867 868 /* 869 * Winbond 89C840F has an MII attached to the SIO. 870 */ 871 sc->sc_mediasw = &tlp_sio_mii_mediasw; 872 break; 873 874 case TULIP_CHIP_AL981: 875 /* 876 * The ADMtek AL981's Ethernet address is located 877 * at offset 8 of its EEPROM. 878 */ 879 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 880 881 /* 882 * ADMtek AL981 has a built-in PHY accessed through 883 * special registers. 884 */ 885 sc->sc_mediasw = &tlp_al981_mediasw; 886 break; 887 888 case TULIP_CHIP_AN983: 889 case TULIP_CHIP_AN985: 890 /* 891 * The ADMtek AN985's Ethernet address is located 892 * at offset 8 of its EEPROM. 893 */ 894 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 895 896 /* 897 * The ADMtek AN985 can be configured in Single-Chip 898 * mode or MAC-only mode. Single-Chip uses the built-in 899 * PHY, MAC-only has an external PHY (usually HomePNA). 900 * The selection is based on an EEPROM setting, and both 901 * PHYs are accessed via MII attached to SIO. 902 * 903 * The AN985 "ghosts" the internal PHY onto all 904 * MII addresses, so we have to use a media init 905 * routine that limits the search. 906 * XXX How does this work with MAC-only mode? 907 */ 908 sc->sc_mediasw = &tlp_an985_mediasw; 909 break; 910 911 case TULIP_CHIP_DM9102: 912 case TULIP_CHIP_DM9102A: 913 /* 914 * Some boards with the Davicom chip have an ISV 915 * SROM (mostly DM9102A boards -- trying to describe 916 * the HomePNA PHY, probably) although the data in 917 * them is generally wrong. Check for ISV format 918 * and grab the Ethernet address that way, and if 919 * that fails, fall back on grabbing it from an 920 * observed offset of 20 (which is where it would 921 * be in an ISV SROM anyhow, tho ISV can cope with 922 * multi-port boards). 923 */ 924 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 925 #ifdef __sparc__ 926 if ((sc->sc_srom[20] == 0 && 927 sc->sc_srom[21] == 0 && 928 sc->sc_srom[22] == 0) || 929 (sc->sc_srom[20] == 0xff && 930 sc->sc_srom[21] == 0xff && 931 sc->sc_srom[22] == 0xff)) { 932 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 933 } else 934 #endif 935 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 936 } 937 938 /* 939 * Davicom chips all have an internal MII interface 940 * and a built-in PHY. DM9102A also has a an external 941 * MII interface, usually with a HomePNA PHY attached 942 * to it. 943 */ 944 sc->sc_mediasw = &tlp_dm9102_mediasw; 945 break; 946 947 case TULIP_CHIP_AX88140: 948 case TULIP_CHIP_AX88141: 949 /* 950 * ASIX AX88140/AX88141 Ethernet Address is located at offset 951 * 20 of the SROM. 952 */ 953 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 954 955 /* 956 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 957 * an external MII interface. 958 */ 959 sc->sc_mediasw = &tlp_asix_mediasw; 960 break; 961 962 case TULIP_CHIP_RS7112: 963 /* 964 * RS7112 Ethernet Address is located of offset 0x19a 965 * of the SROM 966 */ 967 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 968 969 /* RS7112 chip has a PHY at MII address 1 */ 970 sc->sc_mediasw = &tlp_rs7112_mediasw; 971 break; 972 973 default: 974 cant_cope: 975 printf("%s: sorry, unable to handle your board\n", 976 sc->sc_dev.dv_xname); 977 return; 978 } 979 980 /* 981 * Handle shared interrupts. 982 */ 983 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 984 if (psc->sc_master) 985 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 986 else { 987 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 988 TULIP_PCI_SLAVEINTR); 989 if (psc->sc_master == NULL) 990 psc->sc_master = psc; 991 } 992 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 993 psc, sc_intrq); 994 } 995 996 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 997 printf("%s: sharing interrupt with %s\n", 998 sc->sc_dev.dv_xname, 999 psc->sc_master->sc_tulip.sc_dev.dv_xname); 1000 } else { 1001 /* 1002 * Map and establish our interrupt. 1003 */ 1004 if (pci_intr_map(pa, &ih)) { 1005 printf("%s: unable to map interrupt\n", 1006 sc->sc_dev.dv_xname); 1007 return; 1008 } 1009 intrstr = pci_intr_string(pc, ih); 1010 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1011 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1012 tlp_pci_shared_intr : tlp_intr, sc); 1013 if (psc->sc_ih == NULL) { 1014 printf("%s: unable to establish interrupt", 1015 sc->sc_dev.dv_xname); 1016 if (intrstr != NULL) 1017 printf(" at %s", intrstr); 1018 printf("\n"); 1019 return; 1020 } 1021 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1022 intrstr); 1023 } 1024 1025 /* 1026 * Finish off the attach. 1027 */ 1028 tlp_attach(sc, enaddr); 1029 } 1030 1031 static int 1032 tlp_pci_shared_intr(void *arg) 1033 { 1034 struct tulip_pci_softc *master = arg, *slave; 1035 int rv = 0; 1036 1037 for (slave = LIST_FIRST(&master->sc_intrslaves); 1038 slave != NULL; 1039 slave = LIST_NEXT(slave, sc_intrq)) 1040 rv |= tlp_intr(&slave->sc_tulip); 1041 1042 return (rv); 1043 } 1044 1045 static void 1046 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1047 { 1048 struct tulip_softc *sc = &psc->sc_tulip; 1049 1050 /* 1051 * This isn't really a quirk-gathering device, really. We 1052 * just want to get the spiffy DEC board name from the SROM. 1053 */ 1054 strcpy(sc->sc_name, "DEC "); 1055 1056 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1057 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1058 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1059 else 1060 sc->sc_name[3] = '\0'; 1061 } 1062 1063 static void 1064 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1065 { 1066 struct tulip_softc *sc = &psc->sc_tulip; 1067 u_int16_t id = 0; 1068 1069 /* 1070 * If we have a slaved ROM, just copy the bits from the master. 1071 * This is in case we fail the ROM ID check (older boards) and 1072 * need to fall back on Ethernet address model checking; that 1073 * will fail for slave chips. 1074 */ 1075 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1076 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1077 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1078 psc->sc_flags |= 1079 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1080 return; 1081 } 1082 1083 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1084 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1085 switch (id) { 1086 zx312: 1087 case 0x0602: /* ZX312 */ 1088 strcpy(sc->sc_name, "ZNYX ZX312"); 1089 return; 1090 1091 case 0x0622: /* ZX312T */ 1092 strcpy(sc->sc_name, "ZNYX ZX312T"); 1093 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1094 return; 1095 1096 zx314_inta: 1097 case 0x0701: /* ZX314 INTA */ 1098 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1099 /* FALLTHROUGH */ 1100 case 0x0711: /* ZX314 */ 1101 strcpy(sc->sc_name, "ZNYX ZX314"); 1102 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1103 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1104 return; 1105 1106 zx315_inta: 1107 case 0x0801: /* ZX315 INTA */ 1108 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1109 /* FALLTHROUGH */ 1110 case 0x0811: /* ZX315 */ 1111 strcpy(sc->sc_name, "ZNYX ZX315"); 1112 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1113 return; 1114 1115 default: 1116 id = 0; 1117 break; 1118 } 1119 } 1120 1121 /* 1122 * Deal with boards that have broken ROMs. 1123 */ 1124 if (id == 0) { 1125 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1126 goto zx314_inta; 1127 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1128 goto zx315_inta; 1129 if ((enaddr[3] & ~3) == 0xec) 1130 goto zx312; 1131 } 1132 1133 strcpy(sc->sc_name, "ZNYX ZX31x"); 1134 } 1135 1136 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1137 1138 static void 1139 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, 1140 const u_int8_t *enaddr) 1141 { 1142 struct tulip_softc *sc = &psc->sc_tulip; 1143 pcireg_t subid; 1144 1145 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1146 1147 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1148 return; /* ? */ 1149 1150 switch (PCI_PRODUCT(subid) & 0xff) { 1151 /* 1152 * ZNYX 21143 boards with QS6611 PHY 1153 */ 1154 case 0x12: /* ZX345Q */ 1155 case 0x13: /* ZX346Q */ 1156 case 0x14: /* ZX348Q */ 1157 case 0x18: /* ZX414 */ 1158 case 0x19: /* ZX412 */ 1159 case 0x1a: /* ZX444 */ 1160 case 0x1b: /* ZX442 */ 1161 case 0x23: /* ZX212 */ 1162 case 0x24: /* ZX214 */ 1163 case 0x29: /* ZX374 */ 1164 case 0x2d: /* ZX372 */ 1165 case 0x2b: /* ZX244 */ 1166 case 0x2c: /* ZX424 */ 1167 case 0x2e: /* ZX422 */ 1168 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1169 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1170 break; 1171 } 1172 } 1173 1174 static void 1175 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1176 { 1177 1178 /* 1179 * Reset QS6611 PHY. 1180 */ 1181 TULIP_WRITE(sc, CSR_SIAGEN, 1182 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1183 delay(200); 1184 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1185 delay(10000); 1186 } 1187 1188 static void 1189 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, 1190 const u_int8_t *enaddr) 1191 { 1192 struct tulip_softc *sc = &psc->sc_tulip; 1193 u_int16_t id1, id2, ei; 1194 int auibnc = 0, utp = 0; 1195 char *cp; 1196 1197 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1198 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1199 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1200 1201 strcpy(sc->sc_name, "SMC 8432"); 1202 cp = &sc->sc_name[8]; 1203 1204 if ((id1 & 1) == 0) { 1205 *cp++ = 'B'; 1206 auibnc = 1; 1207 } 1208 if ((id1 & 0xff) > 0x32) { 1209 *cp++ = 'T'; 1210 utp = 1; 1211 } 1212 if ((id1 & 0x4000) == 0) { 1213 *cp++ = 'A'; 1214 auibnc = 1; 1215 } 1216 if (id2 == 0x15) { 1217 sc->sc_name[7] = '4'; 1218 *cp++ = '-'; 1219 *cp++ = 'C'; 1220 *cp++ = 'H'; 1221 *cp++ = ei ? '2' : '1'; 1222 } 1223 *cp = '\0'; 1224 1225 if (utp != 0 && auibnc == 0) 1226 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1227 else if (utp == 0 && auibnc != 0) 1228 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1229 } 1230 1231 static void 1232 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, 1233 const u_int8_t *enaddr) 1234 { 1235 1236 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1237 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1238 } 1239 1240 static void 1241 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, 1242 const u_int8_t *enaddr) 1243 { 1244 1245 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1246 } 1247 1248 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1249 1250 static void 1251 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, 1252 const u_int8_t *enaddr) 1253 { 1254 struct tulip_softc *sc = &psc->sc_tulip; 1255 1256 /* 1257 * Some Asante boards don't use the ISV SROM format. For 1258 * those that don't, we initialize the GPIO direction bits, 1259 * and provide our own reset hook, which resets the MII. 1260 * 1261 * All of these boards use SIO-attached-MII media. 1262 */ 1263 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1264 return; 1265 1266 strcpy(sc->sc_name, "Asante"); 1267 1268 sc->sc_gp_dir = 0xbf; 1269 sc->sc_reset = tlp_pci_asante_21140_reset; 1270 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1271 } 1272 1273 static void 1274 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1275 { 1276 1277 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1278 TULIP_WRITE(sc, CSR_GPP, 0x8); 1279 delay(100); 1280 TULIP_WRITE(sc, CSR_GPP, 0); 1281 } 1282 1283 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1284 1285 static void 1286 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, 1287 const u_int8_t *enaddr) 1288 { 1289 struct tulip_softc *sc = &psc->sc_tulip; 1290 1291 /* 1292 * Phobo boards just use MII-on_SIO. 1293 */ 1294 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1295 sc->sc_reset = tlp_pci_phobos_21140_reset; 1296 1297 /* 1298 * These boards appear solely on sgimips machines behind a special 1299 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1300 */ 1301 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1302 } 1303 1304 static void 1305 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1306 { 1307 1308 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1309 delay(10); 1310 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1311 delay(10); 1312 TULIP_WRITE(sc, CSR_GPP, 0); 1313 } 1314 1315 /* 1316 * SMC 9332DST media switch. 1317 */ 1318 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1319 1320 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1321 tlp_smc9332dst_tmsw_init, 1322 tlp_21140_gpio_get, 1323 tlp_21140_gpio_set 1324 }; 1325 1326 static void 1327 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, 1328 const u_int8_t *enaddr) 1329 { 1330 struct tulip_softc *sc = &psc->sc_tulip; 1331 1332 if (sc->sc_mediasw != NULL) { 1333 return; 1334 } 1335 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1336 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1337 } 1338 1339 static void 1340 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1341 { 1342 struct tulip_21x4x_media *tm; 1343 const char *sep = ""; 1344 uint32_t reg; 1345 int i, cnt; 1346 1347 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1348 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1349 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1350 1351 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1352 tlp_mediastatus); 1353 printf("%s: ", sc->sc_dev.dv_xname); 1354 1355 #define ADD(m, c) \ 1356 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1357 tm->tm_opmode = (c); \ 1358 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1359 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1360 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1361 1362 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1363 PRINT("10baseT"); 1364 1365 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1366 OPMODE_TTM | OPMODE_FD); 1367 PRINT("10baseT-FDX"); 1368 1369 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1370 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1371 PRINT("100baseTX"); 1372 1373 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1374 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1375 PRINT("100baseTX-FDX"); 1376 1377 #undef ADD 1378 #undef PRINT 1379 1380 printf("\n"); 1381 1382 tlp_reset(sc); 1383 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1384 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1385 delay(10); 1386 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1387 delay(200000); 1388 cnt = 0; 1389 for (i = 1000; i > 0; i--) { 1390 reg = TULIP_READ(sc, CSR_GPP); 1391 if ((~reg & (GPP_SMC9332DST_OK10 | 1392 GPP_SMC9332DST_OK100)) == 0) { 1393 if (cnt++ > 100) { 1394 break; 1395 } 1396 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1397 break; 1398 } else { 1399 cnt = 0; 1400 } 1401 delay(1000); 1402 } 1403 if (cnt > 100) { 1404 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1405 } else { 1406 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1407 } 1408 } 1409 1410 static void 1411 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, 1412 const u_int8_t *enaddr) 1413 { 1414 struct tulip_softc *sc = &psc->sc_tulip; 1415 char *p1 = (char *) &sc->sc_srom[32]; 1416 char *p2 = &sc->sc_name[0]; 1417 1418 do { 1419 if ((unsigned char) *p1 & 0x80) 1420 *p2++ = ' '; 1421 else 1422 *p2++ = *p1; 1423 } while (*p1++); 1424 } 1425 1426 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1427 1428 static void 1429 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, 1430 const u_int8_t *enaddr) 1431 { 1432 struct tulip_softc *sc = &psc->sc_tulip; 1433 1434 /* 1435 * Cobalt Networks interfaces are just MII-on-SIO. 1436 */ 1437 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1438 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1439 1440 /* 1441 * The Cobalt systems tend to fall back to store-and-forward 1442 * pretty quickly, so we select that from the beginning to 1443 * avoid initial timeouts. 1444 */ 1445 sc->sc_txthresh = TXTH_SF; 1446 } 1447 1448 static void 1449 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1450 { 1451 /* 1452 * Reset PHY. 1453 */ 1454 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1455 delay(10); 1456 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1457 delay(10); 1458 } 1459 1460 static void 1461 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, 1462 const u_int8_t *enaddr) 1463 { 1464 struct tulip_softc *sc = &psc->sc_tulip; 1465 1466 /* 1467 * Algorithmics boards just have MII-on-SIO. 1468 * 1469 * XXX They also have AUI on the serial interface. 1470 * XXX Deal with this. 1471 */ 1472 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1473 } 1474 1475 /* 1476 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1477 */ 1478 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1479 1480 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1481 tlp_cogent_em1x0_tmsw_init, 1482 tlp_21140_gpio_get, 1483 tlp_21140_gpio_set 1484 }; 1485 1486 static void 1487 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, 1488 const u_int8_t *enaddr) 1489 { 1490 struct tulip_softc *sc = &psc->sc_tulip; 1491 uint8_t *srom = sc->sc_srom, id0; 1492 uint16_t id1, id2; 1493 1494 if (sc->sc_mediasw == NULL) { 1495 id0 = srom[32]; 1496 switch (id0) { 1497 case 0x12: 1498 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1499 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1500 break; 1501 1502 case 0x15: 1503 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1504 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1505 break; 1506 1507 #if 0 1508 case XXX: 1509 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1510 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1511 break; 1512 #endif 1513 1514 default: 1515 printf("%s: unknown Cogent board ID 0x%02x\n", 1516 sc->sc_dev.dv_xname, id0); 1517 } 1518 return; 1519 } 1520 1521 id1 = TULIP_ROM_GETW(srom, 0); 1522 id2 = TULIP_ROM_GETW(srom, 2); 1523 if (id1 != 0x1109) { 1524 goto unknown; 1525 } 1526 1527 switch (id2) { 1528 case 0x1900: 1529 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1530 break; 1531 1532 case 0x2400: 1533 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1534 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1535 break; 1536 1537 case 0x2b00: 1538 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1539 break; 1540 1541 case 0x3000: 1542 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1543 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1544 break; 1545 1546 default: 1547 unknown: 1548 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1549 sc->sc_dev.dv_xname, id1, id2); 1550 } 1551 } 1552 1553 static void 1554 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1555 { 1556 struct tulip_21x4x_media *tm; 1557 const char *sep = ""; 1558 1559 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1560 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1561 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1562 1563 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1564 tlp_mediastatus); 1565 printf("%s: ", sc->sc_dev.dv_xname); 1566 1567 #define ADD(m, c) \ 1568 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1569 tm->tm_opmode = (c); \ 1570 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1571 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1572 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1573 1574 if (sc->sc_srom[32] == 0x15) { 1575 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1576 OPMODE_PS | OPMODE_PCS); 1577 PRINT("100baseFX"); 1578 1579 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1580 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1581 PRINT("100baseFX-FDX"); 1582 printf("\n"); 1583 1584 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1585 } else { 1586 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1587 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1588 PRINT("100baseTX"); 1589 1590 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1591 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1592 PRINT("100baseTX-FDX"); 1593 printf("\n"); 1594 1595 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1596 } 1597 1598 #undef ADD 1599 #undef PRINT 1600 } 1601 1602 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1603 1604 static void 1605 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1606 const u_int8_t *enaddr) 1607 { 1608 struct tulip_softc *sc = &psc->sc_tulip; 1609 1610 /* 1611 * Netwinders just use MII-on_SIO. 1612 */ 1613 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1614 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1615 } 1616 1617 void 1618 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1619 { 1620 1621 /* 1622 * Reset the PHY. 1623 */ 1624 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1625 delay(10); 1626 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1627 delay(10); 1628 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1629 delay(10); 1630 } 1631 1632 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1633 1634 static void 1635 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, 1636 const u_int8_t *enaddr) 1637 { 1638 struct tulip_softc *sc = &psc->sc_tulip; 1639 1640 /* 1641 * Phobo boards just use MII-on_SIO. 1642 */ 1643 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1644 sc->sc_reset = tlp_pci_phobos_21142_reset; 1645 1646 /* 1647 * These boards appear solely on sgimips machines behind a special 1648 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1649 */ 1650 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1651 } 1652 1653 static void 1654 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1655 { 1656 /* 1657 * Reset PHY. 1658 */ 1659 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1660 delay(10); 1661 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1662 delay(10); 1663 } 1664
Indexes created Sun Sep 21 20:09:37 GMT 2025