if_tlp_pci.c revision 1.99
1 /* $NetBSD: if_tlp_pci.c,v 1.99 2007/02/09 21:39:38 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.99 2007/02/09 21:39:38 macallan Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const u_int8_t *); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const u_int8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const u_int8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const u_int8_t *); 210 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 211 const u_int8_t *); 212 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 213 const u_int8_t *); 214 215 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 216 const u_int8_t *); 217 218 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 233 const u_int8_t *); 234 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 235 const u_int8_t *); 236 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 237 const u_int8_t *); 238 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 239 const u_int8_t *); 240 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 241 const u_int8_t *); 242 243 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 246 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 247 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 251 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 252 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 253 { NULL, { 0, 0, 0 } } 254 }; 255 256 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 257 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 258 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 259 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 260 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 261 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 262 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 263 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 264 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 265 { NULL, { 0, 0, 0 } } 266 }; 267 268 static int tlp_pci_shared_intr(void *); 269 270 static const struct tulip_pci_product * 271 tlp_pci_lookup(const struct pci_attach_args *pa) 272 { 273 const struct tulip_pci_product *tpp; 274 275 /* Don't match lmc cards */ 276 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 277 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 278 return NULL; 279 280 for (tpp = tlp_pci_products; 281 tlp_chip_names[tpp->tpp_chip] != NULL; 282 tpp++) { 283 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 284 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 285 return (tpp); 286 } 287 return (NULL); 288 } 289 290 static void 291 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 292 const struct tlp_pci_quirks *tpq) 293 { 294 295 for (; tpq->tpq_func != NULL; tpq++) { 296 if (tpq->tpq_oui[0] == enaddr[0] && 297 tpq->tpq_oui[1] == enaddr[1] && 298 tpq->tpq_oui[2] == enaddr[2]) { 299 (*tpq->tpq_func)(psc, enaddr); 300 return; 301 } 302 } 303 } 304 305 static void 306 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 307 { 308 extern struct cfdriver tlp_cd; 309 struct tulip_pci_softc *cur, *best = NULL; 310 struct tulip_softc *sc = &psc->sc_tulip; 311 int i; 312 313 /* 314 * First of all, find the lowest pcidev numbered device on our 315 * bus marked as shared. That should be our master. 316 */ 317 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 318 if ((cur = tlp_cd.cd_devs[i]) == NULL) 319 continue; 320 if (device_parent(&cur->sc_tulip.sc_dev) != 321 device_parent(&sc->sc_dev)) 322 continue; 323 if ((cur->sc_flags & shared) == 0) 324 continue; 325 if (cur == psc) 326 continue; 327 if (best == NULL || 328 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 329 best = cur; 330 } 331 332 if (best != NULL) { 333 psc->sc_master = best; 334 psc->sc_flags |= (shared | slaved); 335 } 336 } 337 338 static int 339 tlp_pci_match(struct device *parent, struct cfdata *match, 340 void *aux) 341 { 342 struct pci_attach_args *pa = aux; 343 344 if (tlp_pci_lookup(pa) != NULL) 345 return (10); /* beat if_de.c */ 346 347 return (0); 348 } 349 350 static void 351 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 352 { 353 struct tulip_pci_softc *psc = (void *) self; 354 struct tulip_softc *sc = &psc->sc_tulip; 355 struct pci_attach_args *pa = aux; 356 pci_chipset_tag_t pc = pa->pa_pc; 357 pci_intr_handle_t ih; 358 const char *intrstr = NULL; 359 bus_space_tag_t iot, memt; 360 bus_space_handle_t ioh, memh; 361 int ioh_valid, memh_valid, i, j; 362 const struct tulip_pci_product *tpp; 363 prop_data_t ea; 364 u_int8_t enaddr[ETHER_ADDR_LEN]; 365 u_int32_t val = 0; 366 pcireg_t reg, addr, size; 367 int error; 368 369 sc->sc_devno = pa->pa_device; 370 psc->sc_pc = pa->pa_pc; 371 psc->sc_pcitag = pa->pa_tag; 372 373 LIST_INIT(&psc->sc_intrslaves); 374 375 tpp = tlp_pci_lookup(pa); 376 if (tpp == NULL) { 377 printf("\n"); 378 panic("tlp_pci_attach: impossible"); 379 } 380 sc->sc_chip = tpp->tpp_chip; 381 382 /* 383 * By default, Tulip registers are 8 bytes long (4 bytes 384 * followed by a 4 byte pad). 385 */ 386 sc->sc_regshift = 3; 387 388 /* 389 * No power management hooks. 390 * XXX Maybe we should add some! 391 */ 392 sc->sc_flags |= TULIPF_ENABLED; 393 394 /* 395 * Get revision info, and set some chip-specific variables. 396 */ 397 sc->sc_rev = PCI_REVISION(pa->pa_class); 398 switch (sc->sc_chip) { 399 case TULIP_CHIP_21140: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_21140A; 402 break; 403 404 case TULIP_CHIP_21142: 405 if (sc->sc_rev >= 0x20) 406 sc->sc_chip = TULIP_CHIP_21143; 407 break; 408 409 case TULIP_CHIP_82C168: 410 if (sc->sc_rev >= 0x20) 411 sc->sc_chip = TULIP_CHIP_82C169; 412 break; 413 414 case TULIP_CHIP_MX98713: 415 if (sc->sc_rev >= 0x10) 416 sc->sc_chip = TULIP_CHIP_MX98713A; 417 break; 418 419 case TULIP_CHIP_MX98715: 420 if (sc->sc_rev >= 0x20) 421 sc->sc_chip = TULIP_CHIP_MX98715A; 422 if (sc->sc_rev >= 0x25) 423 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 424 if (sc->sc_rev >= 0x30) 425 sc->sc_chip = TULIP_CHIP_MX98725; 426 break; 427 428 case TULIP_CHIP_WB89C840F: 429 sc->sc_regshift = 2; 430 break; 431 432 case TULIP_CHIP_AN985: 433 /* 434 * The AN983 and AN985 are very similar, and are 435 * differentiated by a "signature" register that 436 * is like, but not identical, to a PCI ID register. 437 */ 438 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 439 switch (reg) { 440 case 0x09811317: 441 sc->sc_chip = TULIP_CHIP_AN985; 442 break; 443 444 case 0x09851317: 445 sc->sc_chip = TULIP_CHIP_AN983; 446 break; 447 448 default: 449 /* Unknown -- use default. */ 450 break; 451 } 452 break; 453 454 case TULIP_CHIP_AX88140: 455 if (sc->sc_rev >= 0x10) 456 sc->sc_chip = TULIP_CHIP_AX88141; 457 break; 458 459 case TULIP_CHIP_DM9102: 460 if (sc->sc_rev >= 0x30) 461 sc->sc_chip = TULIP_CHIP_DM9102A; 462 break; 463 464 default: 465 /* Nothing. */ 466 break; 467 } 468 469 printf(": %s Ethernet, pass %d.%d\n", 470 tlp_chip_names[sc->sc_chip], 471 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 472 473 switch (sc->sc_chip) { 474 case TULIP_CHIP_21040: 475 if (sc->sc_rev < 0x20) { 476 printf("%s: 21040 must be at least pass 2.0\n", 477 sc->sc_dev.dv_xname); 478 return; 479 } 480 break; 481 482 case TULIP_CHIP_21140: 483 if (sc->sc_rev < 0x11) { 484 printf("%s: 21140 must be at least pass 1.1\n", 485 sc->sc_dev.dv_xname); 486 return; 487 } 488 break; 489 490 default: 491 /* Nothing. */ 492 break; 493 } 494 495 /* 496 * Check to see if the device is in power-save mode, and 497 * being it out if necessary. 498 */ 499 switch (sc->sc_chip) { 500 case TULIP_CHIP_21140: 501 case TULIP_CHIP_21140A: 502 case TULIP_CHIP_21142: 503 case TULIP_CHIP_21143: 504 case TULIP_CHIP_MX98713A: 505 case TULIP_CHIP_MX98715: 506 case TULIP_CHIP_MX98715A: 507 case TULIP_CHIP_MX98715AEC_X: 508 case TULIP_CHIP_MX98725: 509 case TULIP_CHIP_DM9102: 510 case TULIP_CHIP_DM9102A: 511 case TULIP_CHIP_AX88140: 512 case TULIP_CHIP_AX88141: 513 case TULIP_CHIP_RS7112: 514 /* 515 * Clear the "sleep mode" bit in the CFDA register. 516 */ 517 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 518 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 519 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 520 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 521 break; 522 523 default: 524 /* Nothing. */ 525 break; 526 } 527 528 /* power up chip */ 529 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 530 NULL)) && error != EOPNOTSUPP) { 531 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 532 error); 533 return; 534 } 535 536 /* 537 * Map the device. 538 */ 539 540 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 541 PCI_MAPREG_TYPE_IO, 0, 542 &iot, &ioh, NULL, NULL) == 0); 543 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 544 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 545 &memt, &memh, &addr, &size) == 0); 546 if (memh_valid) { 547 sc->sc_st = memt; 548 sc->sc_sh = memh; 549 } else if (ioh_valid) { 550 sc->sc_st = iot; 551 sc->sc_sh = ioh; 552 } else { 553 printf("%s: unable to map device registers\n", 554 sc->sc_dev.dv_xname); 555 return; 556 } 557 558 sc->sc_dmat = pa->pa_dmat; 559 560 /* 561 * Make sure bus mastering is enabled. 562 */ 563 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 564 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 565 PCI_COMMAND_MASTER_ENABLE); 566 567 /* 568 * Get the cacheline size. 569 */ 570 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 571 PCI_BHLC_REG)); 572 573 /* 574 * Get PCI data moving command info. 575 */ 576 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 577 sc->sc_flags |= TULIPF_MRL; 578 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 579 sc->sc_flags |= TULIPF_MRM; 580 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 581 sc->sc_flags |= TULIPF_MWI; 582 583 /* 584 * Read the contents of the Ethernet Address ROM/SROM. 585 */ 586 switch (sc->sc_chip) { 587 case TULIP_CHIP_21040: 588 sc->sc_srom_addrbits = 6; 589 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 590 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 591 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 592 for (j = 0; j < 10000; j++) { 593 val = TULIP_READ(sc, CSR_MIIROM); 594 if ((val & MIIROM_DN) == 0) 595 break; 596 } 597 sc->sc_srom[i] = val & MIIROM_DATA; 598 } 599 break; 600 601 case TULIP_CHIP_82C168: 602 case TULIP_CHIP_82C169: 603 { 604 sc->sc_srom_addrbits = 2; 605 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 606 607 /* 608 * The Lite-On PNIC stores the Ethernet address in 609 * the first 3 words of the EEPROM. EEPROM access 610 * is not like the other Tulip chips. 611 */ 612 for (i = 0; i < 6; i += 2) { 613 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 614 PNIC_SROMCTL_READ | (i >> 1)); 615 for (j = 0; j < 500; j++) { 616 delay(2); 617 val = TULIP_READ(sc, CSR_MIIROM); 618 if ((val & PNIC_MIIROM_BUSY) == 0) 619 break; 620 } 621 if (val & PNIC_MIIROM_BUSY) { 622 printf("%s: EEPROM timed out\n", 623 sc->sc_dev.dv_xname); 624 return; 625 } 626 val &= PNIC_MIIROM_DATA; 627 sc->sc_srom[i] = val >> 8; 628 sc->sc_srom[i + 1] = val & 0xff; 629 } 630 break; 631 } 632 633 default: 634 /* 635 * XXX This isn't quite the right way to do this; we should 636 * XXX be attempting to fetch the mac-addr property in the 637 * XXX bus-agnostic part of the driver independently. But 638 * XXX that requires a larger change in the SROM handling 639 * XXX logic, and for now we can at least remove a machine- 640 * XXX dependent wart from the PCI front-end. 641 */ 642 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 643 "mac-addr"); 644 if (ea != NULL) { 645 extern int tlp_srom_debug; 646 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 647 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 648 649 memcpy(enaddr, prop_data_data_nocopy(ea), 650 ETHER_ADDR_LEN); 651 652 sc->sc_srom_addrbits = 6; 653 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 654 M_NOWAIT|M_ZERO); 655 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 656 if (tlp_srom_debug) { 657 printf("SROM CONTENTS:"); 658 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 659 if ((i % 8) == 0) 660 printf("\n\t"); 661 printf("0x%02x ", sc->sc_srom[i]); 662 } 663 printf("\n"); 664 } 665 break; 666 } 667 668 /* Check for a slaved ROM on a multi-port board. */ 669 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 670 TULIP_PCI_SLAVEROM); 671 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 672 sc->sc_srom_addrbits = 673 psc->sc_master->sc_tulip.sc_srom_addrbits; 674 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 675 enaddr[5] += 676 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 677 } 678 else if (tlp_read_srom(sc) == 0) 679 goto cant_cope; 680 break; 681 } 682 683 /* 684 * Deal with chip/board quirks. This includes setting up 685 * the mediasw, and extracting the Ethernet address from 686 * the rombuf. 687 */ 688 switch (sc->sc_chip) { 689 case TULIP_CHIP_21040: 690 /* 691 * Parse the Ethernet Address ROM. 692 */ 693 if (tlp_parse_old_srom(sc, enaddr) == 0) 694 goto cant_cope; 695 696 697 /* 698 * All 21040 boards start out with the same 699 * media switch. 700 */ 701 sc->sc_mediasw = &tlp_21040_mediasw; 702 703 /* 704 * Deal with any quirks this board might have. 705 */ 706 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 707 break; 708 709 case TULIP_CHIP_21041: 710 /* Check for new format SROM. */ 711 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 712 /* 713 * Not an ISV SROM; try the old DEC Ethernet Address 714 * ROM format. 715 */ 716 if (tlp_parse_old_srom(sc, enaddr) == 0) 717 goto cant_cope; 718 } 719 720 /* 721 * All 21041 boards use the same media switch; they all 722 * work basically the same! Yippee! 723 */ 724 sc->sc_mediasw = &tlp_21041_mediasw; 725 726 /* 727 * Deal with any quirks this board might have. 728 */ 729 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 730 break; 731 732 case TULIP_CHIP_21140: 733 case TULIP_CHIP_21140A: 734 /* Check for new format SROM. */ 735 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 736 /* 737 * Not an ISV SROM; try the old DEC Ethernet Address 738 * ROM format. 739 */ 740 if (tlp_parse_old_srom(sc, enaddr) == 0) 741 goto cant_cope; 742 } else { 743 /* 744 * We start out with the 2114x ISV media switch. 745 * When we search for quirks, we may change to 746 * a different switch. 747 */ 748 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 749 } 750 751 /* 752 * Deal with any quirks this board might have. 753 */ 754 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 755 756 /* 757 * Bail out now if we can't deal with this board. 758 */ 759 if (sc->sc_mediasw == NULL) 760 goto cant_cope; 761 break; 762 763 case TULIP_CHIP_21142: 764 case TULIP_CHIP_21143: 765 /* Check for new format SROM. */ 766 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 767 /* 768 * Not an ISV SROM; try the old DEC Ethernet Address 769 * ROM format. 770 */ 771 if (tlp_parse_old_srom(sc, enaddr) == 0) { 772 /* 773 * One last try: just copy the address 774 * from offset 20 and try to look 775 * up quirks. 776 */ 777 memcpy(enaddr, &sc->sc_srom[20], 778 ETHER_ADDR_LEN); 779 } 780 } else { 781 /* 782 * We start out with the 2114x ISV media switch. 783 * When we search for quirks, we may change to 784 * a different switch. 785 */ 786 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 787 } 788 789 /* 790 * Deal with any quirks this board might have. 791 */ 792 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 793 794 /* 795 * Bail out now if we can't deal with this board. 796 */ 797 if (sc->sc_mediasw == NULL) 798 goto cant_cope; 799 break; 800 801 case TULIP_CHIP_82C168: 802 case TULIP_CHIP_82C169: 803 /* 804 * Lite-On PNIC's Ethernet address is the first 6 805 * bytes of its EEPROM. 806 */ 807 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 808 809 /* 810 * Lite-On PNICs always use the same mediasw; we 811 * select MII vs. internal NWAY automatically. 812 */ 813 sc->sc_mediasw = &tlp_pnic_mediasw; 814 break; 815 816 case TULIP_CHIP_MX98713: 817 /* 818 * The Macronix MX98713 has an MII and GPIO, but no 819 * internal Nway block. This chip is basically a 820 * perfect 21140A clone, with the exception of the 821 * a magic register frobbing in order to make the 822 * interface function. 823 */ 824 if (tlp_isv_srom_enaddr(sc, enaddr)) { 825 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 826 break; 827 } 828 /* FALLTHROUGH */ 829 830 case TULIP_CHIP_82C115: 831 /* 832 * Yippee! The Lite-On 82C115 is a clone of 833 * the MX98725 (the data sheet even says `MXIC' 834 * on it)! Imagine that, a clone of a clone. 835 * 836 * The differences are really minimal: 837 * 838 * - Wake-On-LAN support 839 * - 128-bit multicast hash table, rather than 840 * the standard 512-bit hash table 841 */ 842 /* FALLTHROUGH */ 843 844 case TULIP_CHIP_MX98713A: 845 case TULIP_CHIP_MX98715A: 846 case TULIP_CHIP_MX98715AEC_X: 847 case TULIP_CHIP_MX98725: 848 /* 849 * The MX98713A has an MII as well as an internal Nway block, 850 * but no GPIO. The MX98715 and MX98725 have an internal 851 * Nway block only. 852 * 853 * The internal Nway block, unlike the Lite-On PNIC's, does 854 * just that - performs Nway. Once autonegotiation completes, 855 * we must program the GPR media information into the chip. 856 * 857 * The byte offset of the Ethernet address is stored at 858 * offset 0x70. 859 */ 860 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 861 sc->sc_mediasw = &tlp_pmac_mediasw; 862 break; 863 864 case TULIP_CHIP_WB89C840F: 865 /* 866 * Winbond 89C840F's Ethernet address is the first 867 * 6 bytes of its EEPROM. 868 */ 869 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 870 871 /* 872 * Winbond 89C840F has an MII attached to the SIO. 873 */ 874 sc->sc_mediasw = &tlp_sio_mii_mediasw; 875 break; 876 877 case TULIP_CHIP_AL981: 878 /* 879 * The ADMtek AL981's Ethernet address is located 880 * at offset 8 of its EEPROM. 881 */ 882 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 883 884 /* 885 * ADMtek AL981 has a built-in PHY accessed through 886 * special registers. 887 */ 888 sc->sc_mediasw = &tlp_al981_mediasw; 889 break; 890 891 case TULIP_CHIP_AN983: 892 case TULIP_CHIP_AN985: 893 /* 894 * The ADMtek AN985's Ethernet address is located 895 * at offset 8 of its EEPROM. 896 */ 897 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 898 899 /* 900 * The ADMtek AN985 can be configured in Single-Chip 901 * mode or MAC-only mode. Single-Chip uses the built-in 902 * PHY, MAC-only has an external PHY (usually HomePNA). 903 * The selection is based on an EEPROM setting, and both 904 * PHYs are accessed via MII attached to SIO. 905 * 906 * The AN985 "ghosts" the internal PHY onto all 907 * MII addresses, so we have to use a media init 908 * routine that limits the search. 909 * XXX How does this work with MAC-only mode? 910 */ 911 sc->sc_mediasw = &tlp_an985_mediasw; 912 break; 913 914 case TULIP_CHIP_DM9102: 915 case TULIP_CHIP_DM9102A: 916 /* 917 * Some boards with the Davicom chip have an ISV 918 * SROM (mostly DM9102A boards -- trying to describe 919 * the HomePNA PHY, probably) although the data in 920 * them is generally wrong. Check for ISV format 921 * and grab the Ethernet address that way, and if 922 * that fails, fall back on grabbing it from an 923 * observed offset of 20 (which is where it would 924 * be in an ISV SROM anyhow, tho ISV can cope with 925 * multi-port boards). 926 */ 927 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 928 #ifdef __sparc__ 929 if ((sc->sc_srom[20] == 0 && 930 sc->sc_srom[21] == 0 && 931 sc->sc_srom[22] == 0) || 932 (sc->sc_srom[20] == 0xff && 933 sc->sc_srom[21] == 0xff && 934 sc->sc_srom[22] == 0xff)) { 935 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 936 } else 937 #endif 938 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 939 } 940 941 /* 942 * Davicom chips all have an internal MII interface 943 * and a built-in PHY. DM9102A also has a an external 944 * MII interface, usually with a HomePNA PHY attached 945 * to it. 946 */ 947 sc->sc_mediasw = &tlp_dm9102_mediasw; 948 break; 949 950 case TULIP_CHIP_AX88140: 951 case TULIP_CHIP_AX88141: 952 /* 953 * ASIX AX88140/AX88141 Ethernet Address is located at offset 954 * 20 of the SROM. 955 */ 956 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 957 958 /* 959 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 960 * an external MII interface. 961 */ 962 sc->sc_mediasw = &tlp_asix_mediasw; 963 break; 964 965 case TULIP_CHIP_RS7112: 966 /* 967 * RS7112 Ethernet Address is located of offset 0x19a 968 * of the SROM 969 */ 970 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 971 972 /* RS7112 chip has a PHY at MII address 1 */ 973 sc->sc_mediasw = &tlp_rs7112_mediasw; 974 break; 975 976 default: 977 cant_cope: 978 printf("%s: sorry, unable to handle your board\n", 979 sc->sc_dev.dv_xname); 980 return; 981 } 982 983 /* 984 * Handle shared interrupts. 985 */ 986 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 987 if (psc->sc_master) 988 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 989 else { 990 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 991 TULIP_PCI_SLAVEINTR); 992 if (psc->sc_master == NULL) 993 psc->sc_master = psc; 994 } 995 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 996 psc, sc_intrq); 997 } 998 999 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 1000 printf("%s: sharing interrupt with %s\n", 1001 sc->sc_dev.dv_xname, 1002 psc->sc_master->sc_tulip.sc_dev.dv_xname); 1003 } else { 1004 /* 1005 * Map and establish our interrupt. 1006 */ 1007 if (pci_intr_map(pa, &ih)) { 1008 printf("%s: unable to map interrupt\n", 1009 sc->sc_dev.dv_xname); 1010 return; 1011 } 1012 intrstr = pci_intr_string(pc, ih); 1013 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1014 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1015 tlp_pci_shared_intr : tlp_intr, sc); 1016 if (psc->sc_ih == NULL) { 1017 printf("%s: unable to establish interrupt", 1018 sc->sc_dev.dv_xname); 1019 if (intrstr != NULL) 1020 printf(" at %s", intrstr); 1021 printf("\n"); 1022 return; 1023 } 1024 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1025 intrstr); 1026 } 1027 1028 /* 1029 * Finish off the attach. 1030 */ 1031 tlp_attach(sc, enaddr); 1032 } 1033 1034 static int 1035 tlp_pci_shared_intr(void *arg) 1036 { 1037 struct tulip_pci_softc *master = arg, *slave; 1038 int rv = 0; 1039 1040 for (slave = LIST_FIRST(&master->sc_intrslaves); 1041 slave != NULL; 1042 slave = LIST_NEXT(slave, sc_intrq)) 1043 rv |= tlp_intr(&slave->sc_tulip); 1044 1045 return (rv); 1046 } 1047 1048 static void 1049 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1050 { 1051 struct tulip_softc *sc = &psc->sc_tulip; 1052 1053 /* 1054 * This isn't really a quirk-gathering device, really. We 1055 * just want to get the spiffy DEC board name from the SROM. 1056 */ 1057 strcpy(sc->sc_name, "DEC "); 1058 1059 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1060 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1061 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1062 else 1063 sc->sc_name[3] = '\0'; 1064 } 1065 1066 static void 1067 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1068 { 1069 struct tulip_softc *sc = &psc->sc_tulip; 1070 u_int16_t id = 0; 1071 1072 /* 1073 * If we have a slaved ROM, just copy the bits from the master. 1074 * This is in case we fail the ROM ID check (older boards) and 1075 * need to fall back on Ethernet address model checking; that 1076 * will fail for slave chips. 1077 */ 1078 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1079 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1080 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1081 psc->sc_flags |= 1082 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1083 return; 1084 } 1085 1086 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1087 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1088 switch (id) { 1089 zx312: 1090 case 0x0602: /* ZX312 */ 1091 strcpy(sc->sc_name, "ZNYX ZX312"); 1092 return; 1093 1094 case 0x0622: /* ZX312T */ 1095 strcpy(sc->sc_name, "ZNYX ZX312T"); 1096 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1097 return; 1098 1099 zx314_inta: 1100 case 0x0701: /* ZX314 INTA */ 1101 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1102 /* FALLTHROUGH */ 1103 case 0x0711: /* ZX314 */ 1104 strcpy(sc->sc_name, "ZNYX ZX314"); 1105 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1106 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1107 return; 1108 1109 zx315_inta: 1110 case 0x0801: /* ZX315 INTA */ 1111 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1112 /* FALLTHROUGH */ 1113 case 0x0811: /* ZX315 */ 1114 strcpy(sc->sc_name, "ZNYX ZX315"); 1115 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1116 return; 1117 1118 default: 1119 id = 0; 1120 break; 1121 } 1122 } 1123 1124 /* 1125 * Deal with boards that have broken ROMs. 1126 */ 1127 if (id == 0) { 1128 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1129 goto zx314_inta; 1130 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1131 goto zx315_inta; 1132 if ((enaddr[3] & ~3) == 0xec) 1133 goto zx312; 1134 } 1135 1136 strcpy(sc->sc_name, "ZNYX ZX31x"); 1137 } 1138 1139 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1140 1141 static void 1142 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, 1143 const u_int8_t *enaddr) 1144 { 1145 struct tulip_softc *sc = &psc->sc_tulip; 1146 pcireg_t subid; 1147 1148 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1149 1150 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1151 return; /* ? */ 1152 1153 switch (PCI_PRODUCT(subid) & 0xff) { 1154 /* 1155 * ZNYX 21143 boards with QS6611 PHY 1156 */ 1157 case 0x12: /* ZX345Q */ 1158 case 0x13: /* ZX346Q */ 1159 case 0x14: /* ZX348Q */ 1160 case 0x18: /* ZX414 */ 1161 case 0x19: /* ZX412 */ 1162 case 0x1a: /* ZX444 */ 1163 case 0x1b: /* ZX442 */ 1164 case 0x23: /* ZX212 */ 1165 case 0x24: /* ZX214 */ 1166 case 0x29: /* ZX374 */ 1167 case 0x2d: /* ZX372 */ 1168 case 0x2b: /* ZX244 */ 1169 case 0x2c: /* ZX424 */ 1170 case 0x2e: /* ZX422 */ 1171 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1172 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1173 break; 1174 } 1175 } 1176 1177 static void 1178 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1179 { 1180 1181 /* 1182 * Reset QS6611 PHY. 1183 */ 1184 TULIP_WRITE(sc, CSR_SIAGEN, 1185 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1186 delay(200); 1187 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1188 delay(10000); 1189 } 1190 1191 static void 1192 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, 1193 const u_int8_t *enaddr) 1194 { 1195 struct tulip_softc *sc = &psc->sc_tulip; 1196 u_int16_t id1, id2, ei; 1197 int auibnc = 0, utp = 0; 1198 char *cp; 1199 1200 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1201 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1202 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1203 1204 strcpy(sc->sc_name, "SMC 8432"); 1205 cp = &sc->sc_name[8]; 1206 1207 if ((id1 & 1) == 0) { 1208 *cp++ = 'B'; 1209 auibnc = 1; 1210 } 1211 if ((id1 & 0xff) > 0x32) { 1212 *cp++ = 'T'; 1213 utp = 1; 1214 } 1215 if ((id1 & 0x4000) == 0) { 1216 *cp++ = 'A'; 1217 auibnc = 1; 1218 } 1219 if (id2 == 0x15) { 1220 sc->sc_name[7] = '4'; 1221 *cp++ = '-'; 1222 *cp++ = 'C'; 1223 *cp++ = 'H'; 1224 *cp++ = ei ? '2' : '1'; 1225 } 1226 *cp = '\0'; 1227 1228 if (utp != 0 && auibnc == 0) 1229 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1230 else if (utp == 0 && auibnc != 0) 1231 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1232 } 1233 1234 static void 1235 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, 1236 const u_int8_t *enaddr) 1237 { 1238 1239 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1240 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1241 } 1242 1243 static void 1244 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, 1245 const u_int8_t *enaddr) 1246 { 1247 1248 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1249 } 1250 1251 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1252 1253 static void 1254 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, 1255 const u_int8_t *enaddr) 1256 { 1257 struct tulip_softc *sc = &psc->sc_tulip; 1258 1259 /* 1260 * Some Asante boards don't use the ISV SROM format. For 1261 * those that don't, we initialize the GPIO direction bits, 1262 * and provide our own reset hook, which resets the MII. 1263 * 1264 * All of these boards use SIO-attached-MII media. 1265 */ 1266 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1267 return; 1268 1269 strcpy(sc->sc_name, "Asante"); 1270 1271 sc->sc_gp_dir = 0xbf; 1272 sc->sc_reset = tlp_pci_asante_21140_reset; 1273 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1274 } 1275 1276 static void tlp_pci_e100_quirks(psc, enaddr) 1277 struct tulip_pci_softc *psc; 1278 const u_int8_t *enaddr; 1279 { 1280 struct tulip_softc *sc = &psc->sc_tulip; 1281 1282 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1283 return; 1284 1285 strcpy(sc->sc_name, "UMAX E100"); 1286 1287 sc->sc_gp_dir = 0xbf; 1288 sc->sc_reset = tlp_pci_asante_21140_reset; 1289 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1290 } 1291 1292 static void 1293 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1294 { 1295 1296 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1297 TULIP_WRITE(sc, CSR_GPP, 0x8); 1298 delay(100); 1299 TULIP_WRITE(sc, CSR_GPP, 0); 1300 } 1301 1302 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1303 1304 static void 1305 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, 1306 const u_int8_t *enaddr) 1307 { 1308 struct tulip_softc *sc = &psc->sc_tulip; 1309 1310 /* 1311 * Phobo boards just use MII-on_SIO. 1312 */ 1313 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1314 sc->sc_reset = tlp_pci_phobos_21140_reset; 1315 1316 /* 1317 * These boards appear solely on sgimips machines behind a special 1318 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1319 */ 1320 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1321 } 1322 1323 static void 1324 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1325 { 1326 1327 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1328 delay(10); 1329 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1330 delay(10); 1331 TULIP_WRITE(sc, CSR_GPP, 0); 1332 } 1333 1334 /* 1335 * SMC 9332DST media switch. 1336 */ 1337 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1338 1339 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1340 tlp_smc9332dst_tmsw_init, 1341 tlp_21140_gpio_get, 1342 tlp_21140_gpio_set 1343 }; 1344 1345 static void 1346 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, 1347 const u_int8_t *enaddr) 1348 { 1349 struct tulip_softc *sc = &psc->sc_tulip; 1350 1351 if (sc->sc_mediasw != NULL) { 1352 return; 1353 } 1354 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1355 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1356 } 1357 1358 static void 1359 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1360 { 1361 struct tulip_21x4x_media *tm; 1362 const char *sep = ""; 1363 uint32_t reg; 1364 int i, cnt; 1365 1366 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1367 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1368 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1369 1370 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1371 tlp_mediastatus); 1372 printf("%s: ", sc->sc_dev.dv_xname); 1373 1374 #define ADD(m, c) \ 1375 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1376 tm->tm_opmode = (c); \ 1377 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1378 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1379 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1380 1381 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1382 PRINT("10baseT"); 1383 1384 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1385 OPMODE_TTM | OPMODE_FD); 1386 PRINT("10baseT-FDX"); 1387 1388 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1389 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1390 PRINT("100baseTX"); 1391 1392 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1393 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1394 PRINT("100baseTX-FDX"); 1395 1396 #undef ADD 1397 #undef PRINT 1398 1399 printf("\n"); 1400 1401 tlp_reset(sc); 1402 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1403 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1404 delay(10); 1405 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1406 delay(200000); 1407 cnt = 0; 1408 for (i = 1000; i > 0; i--) { 1409 reg = TULIP_READ(sc, CSR_GPP); 1410 if ((~reg & (GPP_SMC9332DST_OK10 | 1411 GPP_SMC9332DST_OK100)) == 0) { 1412 if (cnt++ > 100) { 1413 break; 1414 } 1415 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1416 break; 1417 } else { 1418 cnt = 0; 1419 } 1420 delay(1000); 1421 } 1422 if (cnt > 100) { 1423 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1424 } else { 1425 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1426 } 1427 } 1428 1429 static void 1430 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, 1431 const u_int8_t *enaddr) 1432 { 1433 struct tulip_softc *sc = &psc->sc_tulip; 1434 char *p1 = (char *) &sc->sc_srom[32]; 1435 char *p2 = &sc->sc_name[0]; 1436 1437 do { 1438 if ((unsigned char) *p1 & 0x80) 1439 *p2++ = ' '; 1440 else 1441 *p2++ = *p1; 1442 } while (*p1++); 1443 } 1444 1445 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1446 1447 static void 1448 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, 1449 const u_int8_t *enaddr) 1450 { 1451 struct tulip_softc *sc = &psc->sc_tulip; 1452 1453 /* 1454 * Cobalt Networks interfaces are just MII-on-SIO. 1455 */ 1456 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1457 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1458 1459 /* 1460 * The Cobalt systems tend to fall back to store-and-forward 1461 * pretty quickly, so we select that from the beginning to 1462 * avoid initial timeouts. 1463 */ 1464 sc->sc_txthresh = TXTH_SF; 1465 } 1466 1467 static void 1468 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1469 { 1470 /* 1471 * Reset PHY. 1472 */ 1473 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1474 delay(10); 1475 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1476 delay(10); 1477 } 1478 1479 static void 1480 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, 1481 const u_int8_t *enaddr) 1482 { 1483 struct tulip_softc *sc = &psc->sc_tulip; 1484 1485 /* 1486 * Algorithmics boards just have MII-on-SIO. 1487 * 1488 * XXX They also have AUI on the serial interface. 1489 * XXX Deal with this. 1490 */ 1491 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1492 } 1493 1494 /* 1495 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1496 */ 1497 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1498 1499 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1500 tlp_cogent_em1x0_tmsw_init, 1501 tlp_21140_gpio_get, 1502 tlp_21140_gpio_set 1503 }; 1504 1505 static void 1506 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, 1507 const u_int8_t *enaddr) 1508 { 1509 struct tulip_softc *sc = &psc->sc_tulip; 1510 uint8_t *srom = sc->sc_srom, id0; 1511 uint16_t id1, id2; 1512 1513 if (sc->sc_mediasw == NULL) { 1514 id0 = srom[32]; 1515 switch (id0) { 1516 case 0x12: 1517 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1518 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1519 break; 1520 1521 case 0x15: 1522 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1523 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1524 break; 1525 1526 #if 0 1527 case XXX: 1528 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1529 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1530 break; 1531 #endif 1532 1533 default: 1534 printf("%s: unknown Cogent board ID 0x%02x\n", 1535 sc->sc_dev.dv_xname, id0); 1536 } 1537 return; 1538 } 1539 1540 id1 = TULIP_ROM_GETW(srom, 0); 1541 id2 = TULIP_ROM_GETW(srom, 2); 1542 if (id1 != 0x1109) { 1543 goto unknown; 1544 } 1545 1546 switch (id2) { 1547 case 0x1900: 1548 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1549 break; 1550 1551 case 0x2400: 1552 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1553 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1554 break; 1555 1556 case 0x2b00: 1557 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1558 break; 1559 1560 case 0x3000: 1561 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1562 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1563 break; 1564 1565 default: 1566 unknown: 1567 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1568 sc->sc_dev.dv_xname, id1, id2); 1569 } 1570 } 1571 1572 static void 1573 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1574 { 1575 struct tulip_21x4x_media *tm; 1576 const char *sep = ""; 1577 1578 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1579 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1580 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1581 1582 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1583 tlp_mediastatus); 1584 printf("%s: ", sc->sc_dev.dv_xname); 1585 1586 #define ADD(m, c) \ 1587 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1588 tm->tm_opmode = (c); \ 1589 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1590 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1591 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1592 1593 if (sc->sc_srom[32] == 0x15) { 1594 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1595 OPMODE_PS | OPMODE_PCS); 1596 PRINT("100baseFX"); 1597 1598 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1599 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1600 PRINT("100baseFX-FDX"); 1601 printf("\n"); 1602 1603 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1604 } else { 1605 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1606 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1607 PRINT("100baseTX"); 1608 1609 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1610 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1611 PRINT("100baseTX-FDX"); 1612 printf("\n"); 1613 1614 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1615 } 1616 1617 #undef ADD 1618 #undef PRINT 1619 } 1620 1621 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1622 1623 static void 1624 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1625 const u_int8_t *enaddr) 1626 { 1627 struct tulip_softc *sc = &psc->sc_tulip; 1628 1629 /* 1630 * Netwinders just use MII-on_SIO. 1631 */ 1632 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1633 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1634 } 1635 1636 void 1637 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1638 { 1639 1640 /* 1641 * Reset the PHY. 1642 */ 1643 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1644 delay(10); 1645 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1646 delay(10); 1647 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1648 delay(10); 1649 } 1650 1651 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1652 1653 static void 1654 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, 1655 const u_int8_t *enaddr) 1656 { 1657 struct tulip_softc *sc = &psc->sc_tulip; 1658 1659 /* 1660 * Phobo boards just use MII-on_SIO. 1661 */ 1662 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1663 sc->sc_reset = tlp_pci_phobos_21142_reset; 1664 1665 /* 1666 * These boards appear solely on sgimips machines behind a special 1667 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1668 */ 1669 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1670 } 1671 1672 static void 1673 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1674 { 1675 /* 1676 * Reset PHY. 1677 */ 1678 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1679 delay(10); 1680 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1681 delay(10); 1682 } 1683
Indexes created Sun Sep 21 20:09:37 GMT 2025