if_vioif.c revision 1.2.6.2 1 1.2.6.2 riz /* $NetBSD: if_vioif.c,v 1.2.6.2 2012/01/25 21:18:15 riz Exp $ */
2 1.2.6.2 riz
3 1.2.6.2 riz /*
4 1.2.6.2 riz * Copyright (c) 2010 Minoura Makoto.
5 1.2.6.2 riz * All rights reserved.
6 1.2.6.2 riz *
7 1.2.6.2 riz * Redistribution and use in source and binary forms, with or without
8 1.2.6.2 riz * modification, are permitted provided that the following conditions
9 1.2.6.2 riz * are met:
10 1.2.6.2 riz * 1. Redistributions of source code must retain the above copyright
11 1.2.6.2 riz * notice, this list of conditions and the following disclaimer.
12 1.2.6.2 riz * 2. Redistributions in binary form must reproduce the above copyright
13 1.2.6.2 riz * notice, this list of conditions and the following disclaimer in the
14 1.2.6.2 riz * documentation and/or other materials provided with the distribution.
15 1.2.6.2 riz *
16 1.2.6.2 riz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.2.6.2 riz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.2.6.2 riz * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.2.6.2 riz * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.2.6.2 riz * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 1.2.6.2 riz * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 1.2.6.2 riz * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 1.2.6.2 riz * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 1.2.6.2 riz * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 1.2.6.2 riz * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 1.2.6.2 riz */
27 1.2.6.2 riz
28 1.2.6.2 riz #include <sys/cdefs.h>
29 1.2.6.2 riz __KERNEL_RCSID(0, "$NetBSD: if_vioif.c,v 1.2.6.2 2012/01/25 21:18:15 riz Exp $");
30 1.2.6.2 riz
31 1.2.6.2 riz #include "bpfilter.h"
32 1.2.6.2 riz
33 1.2.6.2 riz #include <sys/param.h>
34 1.2.6.2 riz #include <sys/systm.h>
35 1.2.6.2 riz #include <sys/kernel.h>
36 1.2.6.2 riz #include <sys/bus.h>
37 1.2.6.2 riz #include <sys/condvar.h>
38 1.2.6.2 riz #include <sys/device.h>
39 1.2.6.2 riz #include <sys/intr.h>
40 1.2.6.2 riz #include <sys/kmem.h>
41 1.2.6.2 riz #include <sys/mbuf.h>
42 1.2.6.2 riz #include <sys/mutex.h>
43 1.2.6.2 riz #include <sys/sockio.h>
44 1.2.6.2 riz
45 1.2.6.2 riz #include <dev/pci/pcidevs.h>
46 1.2.6.2 riz #include <dev/pci/pcireg.h>
47 1.2.6.2 riz #include <dev/pci/pcivar.h>
48 1.2.6.2 riz #include <dev/pci/virtioreg.h>
49 1.2.6.2 riz #include <dev/pci/virtiovar.h>
50 1.2.6.2 riz
51 1.2.6.2 riz #include <net/if.h>
52 1.2.6.2 riz #include <net/if_media.h>
53 1.2.6.2 riz #include <net/if_ether.h>
54 1.2.6.2 riz
55 1.2.6.2 riz #if NBPFILTER > 0
56 1.2.6.2 riz #include <net/bpf.h>
57 1.2.6.2 riz #endif
58 1.2.6.2 riz
59 1.2.6.2 riz
60 1.2.6.2 riz /*
61 1.2.6.2 riz * if_vioifreg.h:
62 1.2.6.2 riz */
63 1.2.6.2 riz /* Configuration registers */
64 1.2.6.2 riz #define VIRTIO_NET_CONFIG_MAC 0 /* 8bit x 6byte */
65 1.2.6.2 riz #define VIRTIO_NET_CONFIG_STATUS 6 /* 16bit */
66 1.2.6.2 riz
67 1.2.6.2 riz /* Feature bits */
68 1.2.6.2 riz #define VIRTIO_NET_F_CSUM (1<<0)
69 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_CSUM (1<<1)
70 1.2.6.2 riz #define VIRTIO_NET_F_MAC (1<<5)
71 1.2.6.2 riz #define VIRTIO_NET_F_GSO (1<<6)
72 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_TSO4 (1<<7)
73 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_TSO6 (1<<8)
74 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_ECN (1<<9)
75 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_UFO (1<<10)
76 1.2.6.2 riz #define VIRTIO_NET_F_HOST_TSO4 (1<<11)
77 1.2.6.2 riz #define VIRTIO_NET_F_HOST_TSO6 (1<<12)
78 1.2.6.2 riz #define VIRTIO_NET_F_HOST_ECN (1<<13)
79 1.2.6.2 riz #define VIRTIO_NET_F_HOST_UFO (1<<14)
80 1.2.6.2 riz #define VIRTIO_NET_F_MRG_RXBUF (1<<15)
81 1.2.6.2 riz #define VIRTIO_NET_F_STATUS (1<<16)
82 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_VQ (1<<17)
83 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_RX (1<<18)
84 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_VLAN (1<<19)
85 1.2.6.2 riz
86 1.2.6.2 riz /* Status */
87 1.2.6.2 riz #define VIRTIO_NET_S_LINK_UP 1
88 1.2.6.2 riz
89 1.2.6.2 riz /* Packet header structure */
90 1.2.6.2 riz struct virtio_net_hdr {
91 1.2.6.2 riz uint8_t flags;
92 1.2.6.2 riz uint8_t gso_type;
93 1.2.6.2 riz uint16_t hdr_len;
94 1.2.6.2 riz uint16_t gso_size;
95 1.2.6.2 riz uint16_t csum_start;
96 1.2.6.2 riz uint16_t csum_offset;
97 1.2.6.2 riz #if 0
98 1.2.6.2 riz uint16_t num_buffers; /* if VIRTIO_NET_F_MRG_RXBUF enabled */
99 1.2.6.2 riz #endif
100 1.2.6.2 riz } __packed;
101 1.2.6.2 riz
102 1.2.6.2 riz #define VIRTIO_NET_HDR_F_NEEDS_CSUM 1 /* flags */
103 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_NONE 0 /* gso_type */
104 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_TCPV4 1 /* gso_type */
105 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_UDP 3 /* gso_type */
106 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_TCPV6 4 /* gso_type */
107 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_ECN 0x80 /* gso_type, |'ed */
108 1.2.6.2 riz
109 1.2.6.2 riz #define VIRTIO_NET_MAX_GSO_LEN (65536+ETHER_HDR_LEN)
110 1.2.6.2 riz
111 1.2.6.2 riz /* Control virtqueue */
112 1.2.6.2 riz struct virtio_net_ctrl_cmd {
113 1.2.6.2 riz uint8_t class;
114 1.2.6.2 riz uint8_t command;
115 1.2.6.2 riz } __packed;
116 1.2.6.2 riz #define VIRTIO_NET_CTRL_RX 0
117 1.2.6.2 riz # define VIRTIO_NET_CTRL_RX_PROMISC 0
118 1.2.6.2 riz # define VIRTIO_NET_CTRL_RX_ALLMULTI 1
119 1.2.6.2 riz
120 1.2.6.2 riz #define VIRTIO_NET_CTRL_MAC 1
121 1.2.6.2 riz # define VIRTIO_NET_CTRL_MAC_TABLE_SET 0
122 1.2.6.2 riz
123 1.2.6.2 riz #define VIRTIO_NET_CTRL_VLAN 2
124 1.2.6.2 riz # define VIRTIO_NET_CTRL_VLAN_ADD 0
125 1.2.6.2 riz # define VIRTIO_NET_CTRL_VLAN_DEL 1
126 1.2.6.2 riz
127 1.2.6.2 riz struct virtio_net_ctrl_status {
128 1.2.6.2 riz uint8_t ack;
129 1.2.6.2 riz } __packed;
130 1.2.6.2 riz #define VIRTIO_NET_OK 0
131 1.2.6.2 riz #define VIRTIO_NET_ERR 1
132 1.2.6.2 riz
133 1.2.6.2 riz struct virtio_net_ctrl_rx {
134 1.2.6.2 riz uint8_t onoff;
135 1.2.6.2 riz } __packed;
136 1.2.6.2 riz
137 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl {
138 1.2.6.2 riz uint32_t nentries;
139 1.2.6.2 riz uint8_t macs[][ETHER_ADDR_LEN];
140 1.2.6.2 riz } __packed;
141 1.2.6.2 riz
142 1.2.6.2 riz struct virtio_net_ctrl_vlan {
143 1.2.6.2 riz uint16_t id;
144 1.2.6.2 riz } __packed;
145 1.2.6.2 riz
146 1.2.6.2 riz
147 1.2.6.2 riz /*
148 1.2.6.2 riz * if_vioifvar.h:
149 1.2.6.2 riz */
150 1.2.6.2 riz struct vioif_softc {
151 1.2.6.2 riz device_t sc_dev;
152 1.2.6.2 riz
153 1.2.6.2 riz struct virtio_softc *sc_virtio;
154 1.2.6.2 riz struct virtqueue sc_vq[3];
155 1.2.6.2 riz
156 1.2.6.2 riz uint8_t sc_mac[ETHER_ADDR_LEN];
157 1.2.6.2 riz struct ethercom sc_ethercom;
158 1.2.6.2 riz uint32_t sc_features;
159 1.2.6.2 riz short sc_ifflags;
160 1.2.6.2 riz
161 1.2.6.2 riz /* bus_dmamem */
162 1.2.6.2 riz bus_dma_segment_t sc_hdr_segs[1];
163 1.2.6.2 riz struct virtio_net_hdr *sc_hdrs;
164 1.2.6.2 riz #define sc_rx_hdrs sc_hdrs
165 1.2.6.2 riz struct virtio_net_hdr *sc_tx_hdrs;
166 1.2.6.2 riz struct virtio_net_ctrl_cmd *sc_ctrl_cmd;
167 1.2.6.2 riz struct virtio_net_ctrl_status *sc_ctrl_status;
168 1.2.6.2 riz struct virtio_net_ctrl_rx *sc_ctrl_rx;
169 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl *sc_ctrl_mac_tbl_uc;
170 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl *sc_ctrl_mac_tbl_mc;
171 1.2.6.2 riz
172 1.2.6.2 riz /* kmem */
173 1.2.6.2 riz bus_dmamap_t *sc_arrays;
174 1.2.6.2 riz #define sc_rxhdr_dmamaps sc_arrays
175 1.2.6.2 riz bus_dmamap_t *sc_txhdr_dmamaps;
176 1.2.6.2 riz bus_dmamap_t *sc_rx_dmamaps;
177 1.2.6.2 riz bus_dmamap_t *sc_tx_dmamaps;
178 1.2.6.2 riz struct mbuf **sc_rx_mbufs;
179 1.2.6.2 riz struct mbuf **sc_tx_mbufs;
180 1.2.6.2 riz
181 1.2.6.2 riz bus_dmamap_t sc_ctrl_cmd_dmamap;
182 1.2.6.2 riz bus_dmamap_t sc_ctrl_status_dmamap;
183 1.2.6.2 riz bus_dmamap_t sc_ctrl_rx_dmamap;
184 1.2.6.2 riz bus_dmamap_t sc_ctrl_tbl_uc_dmamap;
185 1.2.6.2 riz bus_dmamap_t sc_ctrl_tbl_mc_dmamap;
186 1.2.6.2 riz
187 1.2.6.2 riz void *sc_rx_softint;
188 1.2.6.2 riz
189 1.2.6.2 riz enum {
190 1.2.6.2 riz FREE, INUSE, DONE
191 1.2.6.2 riz } sc_ctrl_inuse;
192 1.2.6.2 riz kcondvar_t sc_ctrl_wait;
193 1.2.6.2 riz kmutex_t sc_ctrl_wait_lock;
194 1.2.6.2 riz };
195 1.2.6.2 riz #define VIRTIO_NET_TX_MAXNSEGS (16) /* XXX */
196 1.2.6.2 riz #define VIRTIO_NET_CTRL_MAC_MAXENTRIES (64) /* XXX */
197 1.2.6.2 riz
198 1.2.6.2 riz /* cfattach interface functions */
199 1.2.6.2 riz static int vioif_match(device_t, cfdata_t, void *);
200 1.2.6.2 riz static void vioif_attach(device_t, device_t, void *);
201 1.2.6.2 riz static void vioif_deferred_init(device_t);
202 1.2.6.2 riz
203 1.2.6.2 riz /* ifnet interface functions */
204 1.2.6.2 riz static int vioif_init(struct ifnet *);
205 1.2.6.2 riz static void vioif_stop(struct ifnet *, int);
206 1.2.6.2 riz static void vioif_start(struct ifnet *);
207 1.2.6.2 riz static int vioif_ioctl(struct ifnet *, u_long, void *);
208 1.2.6.2 riz static void vioif_watchdog(struct ifnet *);
209 1.2.6.2 riz
210 1.2.6.2 riz /* rx */
211 1.2.6.2 riz static int vioif_add_rx_mbuf(struct vioif_softc *, int);
212 1.2.6.2 riz static void vioif_free_rx_mbuf(struct vioif_softc *, int);
213 1.2.6.2 riz static void vioif_populate_rx_mbufs(struct vioif_softc *);
214 1.2.6.2 riz static int vioif_rx_deq(struct vioif_softc *);
215 1.2.6.2 riz static int vioif_rx_vq_done(struct virtqueue *);
216 1.2.6.2 riz static void vioif_rx_softint(void *);
217 1.2.6.2 riz static void vioif_rx_drain(struct vioif_softc *);
218 1.2.6.2 riz
219 1.2.6.2 riz /* tx */
220 1.2.6.2 riz static int vioif_tx_vq_done(struct virtqueue *);
221 1.2.6.2 riz static void vioif_tx_drain(struct vioif_softc *);
222 1.2.6.2 riz
223 1.2.6.2 riz /* other control */
224 1.2.6.2 riz static int vioif_updown(struct vioif_softc *, bool);
225 1.2.6.2 riz static int vioif_ctrl_rx(struct vioif_softc *, int, bool);
226 1.2.6.2 riz static int vioif_set_promisc(struct vioif_softc *, bool);
227 1.2.6.2 riz static int vioif_set_allmulti(struct vioif_softc *, bool);
228 1.2.6.2 riz static int vioif_set_rx_filter(struct vioif_softc *);
229 1.2.6.2 riz static int vioif_rx_filter(struct vioif_softc *);
230 1.2.6.2 riz static int vioif_ctrl_vq_done(struct virtqueue *);
231 1.2.6.2 riz
232 1.2.6.2 riz CFATTACH_DECL_NEW(vioif, sizeof(struct vioif_softc),
233 1.2.6.2 riz vioif_match, vioif_attach, NULL, NULL);
234 1.2.6.2 riz
235 1.2.6.2 riz static int
236 1.2.6.2 riz vioif_match(device_t parent, cfdata_t match, void *aux)
237 1.2.6.2 riz {
238 1.2.6.2 riz struct virtio_softc *va = aux;
239 1.2.6.2 riz
240 1.2.6.2 riz if (va->sc_childdevid == PCI_PRODUCT_VIRTIO_NETWORK)
241 1.2.6.2 riz return 1;
242 1.2.6.2 riz
243 1.2.6.2 riz return 0;
244 1.2.6.2 riz }
245 1.2.6.2 riz
246 1.2.6.2 riz /* allocate memory */
247 1.2.6.2 riz /*
248 1.2.6.2 riz * dma memory is used for:
249 1.2.6.2 riz * sc_rx_hdrs[slot]: metadata array for recieved frames (READ)
250 1.2.6.2 riz * sc_tx_hdrs[slot]: metadata array for frames to be sent (WRITE)
251 1.2.6.2 riz * sc_ctrl_cmd: command to be sent via ctrl vq (WRITE)
252 1.2.6.2 riz * sc_ctrl_status: return value for a command via ctrl vq (READ)
253 1.2.6.2 riz * sc_ctrl_rx: parameter for a VIRTIO_NET_CTRL_RX class command
254 1.2.6.2 riz * (WRITE)
255 1.2.6.2 riz * sc_ctrl_mac_tbl_uc: unicast MAC address filter for a VIRTIO_NET_CTRL_MAC
256 1.2.6.2 riz * class command (WRITE)
257 1.2.6.2 riz * sc_ctrl_mac_tbl_mc: multicast MAC address filter for a VIRTIO_NET_CTRL_MAC
258 1.2.6.2 riz * class command (WRITE)
259 1.2.6.2 riz * sc_ctrl_* structures are allocated only one each; they are protected by
260 1.2.6.2 riz * sc_ctrl_inuse variable and sc_ctrl_wait condvar.
261 1.2.6.2 riz */
262 1.2.6.2 riz /*
263 1.2.6.2 riz * dynamically allocated memory is used for:
264 1.2.6.2 riz * sc_rxhdr_dmamaps[slot]: bus_dmamap_t array for sc_rx_hdrs[slot]
265 1.2.6.2 riz * sc_txhdr_dmamaps[slot]: bus_dmamap_t array for sc_tx_hdrs[slot]
266 1.2.6.2 riz * sc_rx_dmamaps[slot]: bus_dmamap_t array for recieved payload
267 1.2.6.2 riz * sc_tx_dmamaps[slot]: bus_dmamap_t array for sent payload
268 1.2.6.2 riz * sc_rx_mbufs[slot]: mbuf pointer array for recieved frames
269 1.2.6.2 riz * sc_tx_mbufs[slot]: mbuf pointer array for sent frames
270 1.2.6.2 riz */
271 1.2.6.2 riz static int
272 1.2.6.2 riz vioif_alloc_mems(struct vioif_softc *sc)
273 1.2.6.2 riz {
274 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
275 1.2.6.2 riz int allocsize, allocsize2, r, rsegs, i;
276 1.2.6.2 riz void *vaddr;
277 1.2.6.2 riz intptr_t p;
278 1.2.6.2 riz int rxqsize, txqsize;
279 1.2.6.2 riz
280 1.2.6.2 riz rxqsize = vsc->sc_vqs[0].vq_num;
281 1.2.6.2 riz txqsize = vsc->sc_vqs[1].vq_num;
282 1.2.6.2 riz
283 1.2.6.2 riz allocsize = sizeof(struct virtio_net_hdr) * rxqsize;
284 1.2.6.2 riz allocsize += sizeof(struct virtio_net_hdr) * txqsize;
285 1.2.6.2 riz if (vsc->sc_nvqs == 3) {
286 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_cmd) * 1;
287 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_status) * 1;
288 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_rx) * 1;
289 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_mac_tbl)
290 1.2.6.2 riz + sizeof(struct virtio_net_ctrl_mac_tbl)
291 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES;
292 1.2.6.2 riz }
293 1.2.6.2 riz r = bus_dmamem_alloc(vsc->sc_dmat, allocsize, 0, 0,
294 1.2.6.2 riz &sc->sc_hdr_segs[0], 1, &rsegs, BUS_DMA_NOWAIT);
295 1.2.6.2 riz if (r != 0) {
296 1.2.6.2 riz aprint_error_dev(sc->sc_dev,
297 1.2.6.2 riz "DMA memory allocation failed, size %d, "
298 1.2.6.2 riz "error code %d\n", allocsize, r);
299 1.2.6.2 riz goto err_none;
300 1.2.6.2 riz }
301 1.2.6.2 riz r = bus_dmamem_map(vsc->sc_dmat,
302 1.2.6.2 riz &sc->sc_hdr_segs[0], 1, allocsize,
303 1.2.6.2 riz &vaddr, BUS_DMA_NOWAIT);
304 1.2.6.2 riz if (r != 0) {
305 1.2.6.2 riz aprint_error_dev(sc->sc_dev,
306 1.2.6.2 riz "DMA memory map failed, "
307 1.2.6.2 riz "error code %d\n", r);
308 1.2.6.2 riz goto err_dmamem_alloc;
309 1.2.6.2 riz }
310 1.2.6.2 riz sc->sc_hdrs = vaddr;
311 1.2.6.2 riz memset(vaddr, 0, allocsize);
312 1.2.6.2 riz p = (intptr_t) vaddr;
313 1.2.6.2 riz p += sizeof(struct virtio_net_hdr) * rxqsize;
314 1.2.6.2 riz #define P(name,size) do { sc->sc_ ##name = (void*) p; \
315 1.2.6.2 riz p += size; } while (0)
316 1.2.6.2 riz P(tx_hdrs, sizeof(struct virtio_net_hdr) * txqsize);
317 1.2.6.2 riz if (vsc->sc_nvqs == 3) {
318 1.2.6.2 riz P(ctrl_cmd, sizeof(struct virtio_net_ctrl_cmd));
319 1.2.6.2 riz P(ctrl_status, sizeof(struct virtio_net_ctrl_status));
320 1.2.6.2 riz P(ctrl_rx, sizeof(struct virtio_net_ctrl_rx));
321 1.2.6.2 riz P(ctrl_mac_tbl_uc, sizeof(struct virtio_net_ctrl_mac_tbl));
322 1.2.6.2 riz P(ctrl_mac_tbl_mc,
323 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
324 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES));
325 1.2.6.2 riz }
326 1.2.6.2 riz #undef P
327 1.2.6.2 riz
328 1.2.6.2 riz allocsize2 = sizeof(bus_dmamap_t) * (rxqsize + txqsize);
329 1.2.6.2 riz allocsize2 += sizeof(bus_dmamap_t) * (rxqsize + txqsize);
330 1.2.6.2 riz allocsize2 += sizeof(struct mbuf*) * (rxqsize + txqsize);
331 1.2.6.2 riz sc->sc_arrays = kmem_zalloc(allocsize2, KM_SLEEP);
332 1.2.6.2 riz if (sc->sc_arrays == NULL)
333 1.2.6.2 riz goto err_dmamem_map;
334 1.2.6.2 riz sc->sc_txhdr_dmamaps = sc->sc_arrays + rxqsize;
335 1.2.6.2 riz sc->sc_rx_dmamaps = sc->sc_txhdr_dmamaps + txqsize;
336 1.2.6.2 riz sc->sc_tx_dmamaps = sc->sc_rx_dmamaps + rxqsize;
337 1.2.6.2 riz sc->sc_rx_mbufs = (void*) (sc->sc_tx_dmamaps + txqsize);
338 1.2.6.2 riz sc->sc_tx_mbufs = sc->sc_rx_mbufs + rxqsize;
339 1.2.6.2 riz
340 1.2.6.2 riz #define C(map, buf, size, nsegs, rw, usage) \
341 1.2.6.2 riz do { \
342 1.2.6.2 riz r = bus_dmamap_create(vsc->sc_dmat, size, nsegs, size, 0, \
343 1.2.6.2 riz BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, \
344 1.2.6.2 riz &sc->sc_ ##map); \
345 1.2.6.2 riz if (r != 0) { \
346 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \
347 1.2.6.2 riz usage " dmamap creation failed, " \
348 1.2.6.2 riz "error code %d\n", r); \
349 1.2.6.2 riz goto err_reqs; \
350 1.2.6.2 riz } \
351 1.2.6.2 riz } while (0)
352 1.2.6.2 riz #define C_L1(map, buf, size, nsegs, rw, usage) \
353 1.2.6.2 riz C(map, buf, size, nsegs, rw, usage); \
354 1.2.6.2 riz do { \
355 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ ##map, \
356 1.2.6.2 riz &sc->sc_ ##buf, size, NULL, \
357 1.2.6.2 riz BUS_DMA_ ##rw | BUS_DMA_NOWAIT); \
358 1.2.6.2 riz if (r != 0) { \
359 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \
360 1.2.6.2 riz usage " dmamap load failed, " \
361 1.2.6.2 riz "error code %d\n", r); \
362 1.2.6.2 riz goto err_reqs; \
363 1.2.6.2 riz } \
364 1.2.6.2 riz } while (0)
365 1.2.6.2 riz #define C_L2(map, buf, size, nsegs, rw, usage) \
366 1.2.6.2 riz C(map, buf, size, nsegs, rw, usage); \
367 1.2.6.2 riz do { \
368 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ ##map, \
369 1.2.6.2 riz sc->sc_ ##buf, size, NULL, \
370 1.2.6.2 riz BUS_DMA_ ##rw | BUS_DMA_NOWAIT); \
371 1.2.6.2 riz if (r != 0) { \
372 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \
373 1.2.6.2 riz usage " dmamap load failed, " \
374 1.2.6.2 riz "error code %d\n", r); \
375 1.2.6.2 riz goto err_reqs; \
376 1.2.6.2 riz } \
377 1.2.6.2 riz } while (0)
378 1.2.6.2 riz for (i = 0; i < rxqsize; i++) {
379 1.2.6.2 riz C_L1(rxhdr_dmamaps[i], rx_hdrs[i],
380 1.2.6.2 riz sizeof(struct virtio_net_hdr), 1,
381 1.2.6.2 riz READ, "rx header");
382 1.2.6.2 riz C(rx_dmamaps[i], NULL, MCLBYTES, 1, 0, "rx payload");
383 1.2.6.2 riz }
384 1.2.6.2 riz
385 1.2.6.2 riz for (i = 0; i < txqsize; i++) {
386 1.2.6.2 riz C_L1(txhdr_dmamaps[i], rx_hdrs[i],
387 1.2.6.2 riz sizeof(struct virtio_net_hdr), 1,
388 1.2.6.2 riz WRITE, "tx header");
389 1.2.6.2 riz C(tx_dmamaps[i], NULL, ETHER_MAX_LEN, 256 /* XXX */, 0,
390 1.2.6.2 riz "tx payload");
391 1.2.6.2 riz }
392 1.2.6.2 riz
393 1.2.6.2 riz if (vsc->sc_nvqs == 3) {
394 1.2.6.2 riz /* control vq class & command */
395 1.2.6.2 riz C_L2(ctrl_cmd_dmamap, ctrl_cmd,
396 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd), 1, WRITE,
397 1.2.6.2 riz "control command");
398 1.2.6.2 riz
399 1.2.6.2 riz /* control vq status */
400 1.2.6.2 riz C_L2(ctrl_status_dmamap, ctrl_status,
401 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status), 1, READ,
402 1.2.6.2 riz "control status");
403 1.2.6.2 riz
404 1.2.6.2 riz /* control vq rx mode command parameter */
405 1.2.6.2 riz C_L2(ctrl_rx_dmamap, ctrl_rx,
406 1.2.6.2 riz sizeof(struct virtio_net_ctrl_rx), 1, WRITE,
407 1.2.6.2 riz "rx mode control command");
408 1.2.6.2 riz
409 1.2.6.2 riz /* control vq MAC filter table for unicast */
410 1.2.6.2 riz /* do not load now since its length is variable */
411 1.2.6.2 riz C(ctrl_tbl_uc_dmamap, NULL,
412 1.2.6.2 riz sizeof(struct virtio_net_ctrl_mac_tbl) + 0, 1, WRITE,
413 1.2.6.2 riz "unicast MAC address filter command");
414 1.2.6.2 riz
415 1.2.6.2 riz /* control vq MAC filter table for multicast */
416 1.2.6.2 riz C(ctrl_tbl_mc_dmamap, NULL,
417 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
418 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES),
419 1.2.6.2 riz 1, WRITE, "multicast MAC address filter command");
420 1.2.6.2 riz }
421 1.2.6.2 riz #undef C_L2
422 1.2.6.2 riz #undef C_L1
423 1.2.6.2 riz #undef C
424 1.2.6.2 riz
425 1.2.6.2 riz return 0;
426 1.2.6.2 riz
427 1.2.6.2 riz err_reqs:
428 1.2.6.2 riz #define D(map) \
429 1.2.6.2 riz do { \
430 1.2.6.2 riz if (sc->sc_ ##map) { \
431 1.2.6.2 riz bus_dmamap_destroy(vsc->sc_dmat, sc->sc_ ##map); \
432 1.2.6.2 riz sc->sc_ ##map = NULL; \
433 1.2.6.2 riz } \
434 1.2.6.2 riz } while (0)
435 1.2.6.2 riz D(ctrl_tbl_mc_dmamap);
436 1.2.6.2 riz D(ctrl_tbl_uc_dmamap);
437 1.2.6.2 riz D(ctrl_rx_dmamap);
438 1.2.6.2 riz D(ctrl_status_dmamap);
439 1.2.6.2 riz D(ctrl_cmd_dmamap);
440 1.2.6.2 riz for (i = 0; i < txqsize; i++) {
441 1.2.6.2 riz D(tx_dmamaps[i]);
442 1.2.6.2 riz D(txhdr_dmamaps[i]);
443 1.2.6.2 riz }
444 1.2.6.2 riz for (i = 0; i < rxqsize; i++) {
445 1.2.6.2 riz D(rx_dmamaps[i]);
446 1.2.6.2 riz D(rxhdr_dmamaps[i]);
447 1.2.6.2 riz }
448 1.2.6.2 riz #undef D
449 1.2.6.2 riz if (sc->sc_arrays) {
450 1.2.6.2 riz kmem_free(sc->sc_arrays, allocsize2);
451 1.2.6.2 riz sc->sc_arrays = 0;
452 1.2.6.2 riz }
453 1.2.6.2 riz err_dmamem_map:
454 1.2.6.2 riz bus_dmamem_unmap(vsc->sc_dmat, sc->sc_hdrs, allocsize);
455 1.2.6.2 riz err_dmamem_alloc:
456 1.2.6.2 riz bus_dmamem_free(vsc->sc_dmat, &sc->sc_hdr_segs[0], 1);
457 1.2.6.2 riz err_none:
458 1.2.6.2 riz return -1;
459 1.2.6.2 riz }
460 1.2.6.2 riz
461 1.2.6.2 riz static void
462 1.2.6.2 riz vioif_attach(device_t parent, device_t self, void *aux)
463 1.2.6.2 riz {
464 1.2.6.2 riz struct vioif_softc *sc = device_private(self);
465 1.2.6.2 riz struct virtio_softc *vsc = device_private(parent);
466 1.2.6.2 riz uint32_t features;
467 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if;
468 1.2.6.2 riz
469 1.2.6.2 riz if (vsc->sc_child != NULL) {
470 1.2.6.2 riz aprint_normal(": child already attached for %s; "
471 1.2.6.2 riz "something wrong...\n",
472 1.2.6.2 riz device_xname(parent));
473 1.2.6.2 riz return;
474 1.2.6.2 riz }
475 1.2.6.2 riz
476 1.2.6.2 riz sc->sc_dev = self;
477 1.2.6.2 riz sc->sc_virtio = vsc;
478 1.2.6.2 riz
479 1.2.6.2 riz vsc->sc_child = self;
480 1.2.6.2 riz vsc->sc_ipl = IPL_NET;
481 1.2.6.2 riz vsc->sc_vqs = &sc->sc_vq[0];
482 1.2.6.2 riz vsc->sc_config_change = 0;
483 1.2.6.2 riz vsc->sc_intrhand = virtio_vq_intr;
484 1.2.6.2 riz
485 1.2.6.2 riz features = virtio_negotiate_features(vsc,
486 1.2.6.2 riz (VIRTIO_NET_F_MAC |
487 1.2.6.2 riz VIRTIO_NET_F_STATUS |
488 1.2.6.2 riz VIRTIO_NET_F_CTRL_VQ |
489 1.2.6.2 riz VIRTIO_NET_F_CTRL_RX |
490 1.2.6.2 riz VIRTIO_F_NOTIFY_ON_EMPTY));
491 1.2.6.2 riz if (features & VIRTIO_NET_F_MAC) {
492 1.2.6.2 riz sc->sc_mac[0] = virtio_read_device_config_1(vsc,
493 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+0);
494 1.2.6.2 riz sc->sc_mac[1] = virtio_read_device_config_1(vsc,
495 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+1);
496 1.2.6.2 riz sc->sc_mac[2] = virtio_read_device_config_1(vsc,
497 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+2);
498 1.2.6.2 riz sc->sc_mac[3] = virtio_read_device_config_1(vsc,
499 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+3);
500 1.2.6.2 riz sc->sc_mac[4] = virtio_read_device_config_1(vsc,
501 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+4);
502 1.2.6.2 riz sc->sc_mac[5] = virtio_read_device_config_1(vsc,
503 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+5);
504 1.2.6.2 riz } else {
505 1.2.6.2 riz /* code stolen from sys/net/if_tap.c */
506 1.2.6.2 riz struct timeval tv;
507 1.2.6.2 riz uint32_t ui;
508 1.2.6.2 riz getmicrouptime(&tv);
509 1.2.6.2 riz ui = (tv.tv_sec ^ tv.tv_usec) & 0xffffff;
510 1.2.6.2 riz memcpy(sc->sc_mac+3, (uint8_t *)&ui, 3);
511 1.2.6.2 riz virtio_write_device_config_1(vsc,
512 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+0,
513 1.2.6.2 riz sc->sc_mac[0]);
514 1.2.6.2 riz virtio_write_device_config_1(vsc,
515 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+1,
516 1.2.6.2 riz sc->sc_mac[1]);
517 1.2.6.2 riz virtio_write_device_config_1(vsc,
518 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+2,
519 1.2.6.2 riz sc->sc_mac[2]);
520 1.2.6.2 riz virtio_write_device_config_1(vsc,
521 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+3,
522 1.2.6.2 riz sc->sc_mac[3]);
523 1.2.6.2 riz virtio_write_device_config_1(vsc,
524 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+4,
525 1.2.6.2 riz sc->sc_mac[4]);
526 1.2.6.2 riz virtio_write_device_config_1(vsc,
527 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+5,
528 1.2.6.2 riz sc->sc_mac[5]);
529 1.2.6.2 riz }
530 1.2.6.2 riz aprint_normal(": Ethernet address %s\n", ether_sprintf(sc->sc_mac));
531 1.2.6.2 riz aprint_naive("\n");
532 1.2.6.2 riz
533 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[0], 0,
534 1.2.6.2 riz MCLBYTES+sizeof(struct virtio_net_hdr), 2,
535 1.2.6.2 riz "rx") != 0) {
536 1.2.6.2 riz goto err;
537 1.2.6.2 riz }
538 1.2.6.2 riz vsc->sc_nvqs = 1;
539 1.2.6.2 riz sc->sc_vq[0].vq_done = vioif_rx_vq_done;
540 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[1], 1,
541 1.2.6.2 riz (sizeof(struct virtio_net_hdr)
542 1.2.6.2 riz + (ETHER_MAX_LEN - ETHER_HDR_LEN)),
543 1.2.6.2 riz VIRTIO_NET_TX_MAXNSEGS + 1,
544 1.2.6.2 riz "tx") != 0) {
545 1.2.6.2 riz goto err;
546 1.2.6.2 riz }
547 1.2.6.2 riz vsc->sc_nvqs = 2;
548 1.2.6.2 riz sc->sc_vq[1].vq_done = vioif_tx_vq_done;
549 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[0]);
550 1.2.6.2 riz virtio_stop_vq_intr(vsc, &sc->sc_vq[1]); /* not urgent; do it later */
551 1.2.6.2 riz if ((features & VIRTIO_NET_F_CTRL_VQ)
552 1.2.6.2 riz && (features & VIRTIO_NET_F_CTRL_RX)) {
553 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[2], 2,
554 1.2.6.2 riz NBPG, 1, "control") == 0) {
555 1.2.6.2 riz sc->sc_vq[2].vq_done = vioif_ctrl_vq_done;
556 1.2.6.2 riz cv_init(&sc->sc_ctrl_wait, "ctrl_vq");
557 1.2.6.2 riz mutex_init(&sc->sc_ctrl_wait_lock,
558 1.2.6.2 riz MUTEX_DEFAULT, IPL_NET);
559 1.2.6.2 riz sc->sc_ctrl_inuse = FREE;
560 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[2]);
561 1.2.6.2 riz vsc->sc_nvqs = 3;
562 1.2.6.2 riz }
563 1.2.6.2 riz }
564 1.2.6.2 riz
565 1.2.6.2 riz sc->sc_rx_softint = softint_establish(SOFTINT_NET|SOFTINT_MPSAFE,
566 1.2.6.2 riz vioif_rx_softint, sc);
567 1.2.6.2 riz if (sc->sc_rx_softint == NULL) {
568 1.2.6.2 riz aprint_error_dev(self, "cannot establish softint\n");
569 1.2.6.2 riz goto err;
570 1.2.6.2 riz }
571 1.2.6.2 riz
572 1.2.6.2 riz if (vioif_alloc_mems(sc) < 0)
573 1.2.6.2 riz goto err;
574 1.2.6.2 riz if (vsc->sc_nvqs == 3)
575 1.2.6.2 riz config_interrupts(self, vioif_deferred_init);
576 1.2.6.2 riz
577 1.2.6.2 riz strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
578 1.2.6.2 riz ifp->if_softc = sc;
579 1.2.6.2 riz ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
580 1.2.6.2 riz ifp->if_start = vioif_start;
581 1.2.6.2 riz ifp->if_ioctl = vioif_ioctl;
582 1.2.6.2 riz ifp->if_init = vioif_init;
583 1.2.6.2 riz ifp->if_stop = vioif_stop;
584 1.2.6.2 riz ifp->if_capabilities = 0;
585 1.2.6.2 riz ifp->if_watchdog = vioif_watchdog;
586 1.2.6.2 riz
587 1.2.6.2 riz if_attach(ifp);
588 1.2.6.2 riz ether_ifattach(ifp, sc->sc_mac);
589 1.2.6.2 riz
590 1.2.6.2 riz return;
591 1.2.6.2 riz
592 1.2.6.2 riz err:
593 1.2.6.2 riz if (vsc->sc_nvqs == 3) {
594 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[2]);
595 1.2.6.2 riz cv_destroy(&sc->sc_ctrl_wait);
596 1.2.6.2 riz mutex_destroy(&sc->sc_ctrl_wait_lock);
597 1.2.6.2 riz vsc->sc_nvqs = 2;
598 1.2.6.2 riz }
599 1.2.6.2 riz if (vsc->sc_nvqs == 2) {
600 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[1]);
601 1.2.6.2 riz vsc->sc_nvqs = 1;
602 1.2.6.2 riz }
603 1.2.6.2 riz if (vsc->sc_nvqs == 1) {
604 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[0]);
605 1.2.6.2 riz vsc->sc_nvqs = 0;
606 1.2.6.2 riz }
607 1.2.6.2 riz vsc->sc_child = (void*)1;
608 1.2.6.2 riz return;
609 1.2.6.2 riz }
610 1.2.6.2 riz
611 1.2.6.2 riz /* we need interrupts to make promiscuous mode off */
612 1.2.6.2 riz static void
613 1.2.6.2 riz vioif_deferred_init(device_t self)
614 1.2.6.2 riz {
615 1.2.6.2 riz struct vioif_softc *sc = device_private(self);
616 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if;
617 1.2.6.2 riz int r;
618 1.2.6.2 riz
619 1.2.6.2 riz r = vioif_set_promisc(sc, false);
620 1.2.6.2 riz if (r != 0)
621 1.2.6.2 riz aprint_error_dev(self, "resetting promisc mode failed, "
622 1.2.6.2 riz "errror code %d\n", r);
623 1.2.6.2 riz else
624 1.2.6.2 riz ifp->if_flags &= ~IFF_PROMISC;
625 1.2.6.2 riz }
626 1.2.6.2 riz
627 1.2.6.2 riz /*
628 1.2.6.2 riz * Interface functions for ifnet
629 1.2.6.2 riz */
630 1.2.6.2 riz static int
631 1.2.6.2 riz vioif_init(struct ifnet *ifp)
632 1.2.6.2 riz {
633 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc;
634 1.2.6.2 riz
635 1.2.6.2 riz vioif_stop(ifp, 0);
636 1.2.6.2 riz vioif_populate_rx_mbufs(sc);
637 1.2.6.2 riz vioif_updown(sc, true);
638 1.2.6.2 riz ifp->if_flags |= IFF_RUNNING;
639 1.2.6.2 riz ifp->if_flags &= ~IFF_OACTIVE;
640 1.2.6.2 riz vioif_rx_filter(sc);
641 1.2.6.2 riz
642 1.2.6.2 riz return 0;
643 1.2.6.2 riz }
644 1.2.6.2 riz
645 1.2.6.2 riz static void
646 1.2.6.2 riz vioif_stop(struct ifnet *ifp, int disable)
647 1.2.6.2 riz {
648 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc;
649 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
650 1.2.6.2 riz
651 1.2.6.2 riz /* only way to stop I/O and DMA is resetting... */
652 1.2.6.2 riz virtio_reset(vsc);
653 1.2.6.2 riz vioif_rx_deq(sc);
654 1.2.6.2 riz vioif_tx_drain(sc);
655 1.2.6.2 riz ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
656 1.2.6.2 riz
657 1.2.6.2 riz if (disable)
658 1.2.6.2 riz vioif_rx_drain(sc);
659 1.2.6.2 riz
660 1.2.6.2 riz virtio_reinit_start(vsc);
661 1.2.6.2 riz virtio_negotiate_features(vsc, sc->sc_features);
662 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[0]);
663 1.2.6.2 riz virtio_stop_vq_intr(vsc, &sc->sc_vq[1]);
664 1.2.6.2 riz if (vsc->sc_nvqs >= 3)
665 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[2]);
666 1.2.6.2 riz virtio_reinit_end(vsc);
667 1.2.6.2 riz vioif_updown(sc, false);
668 1.2.6.2 riz }
669 1.2.6.2 riz
670 1.2.6.2 riz static void
671 1.2.6.2 riz vioif_start(struct ifnet *ifp)
672 1.2.6.2 riz {
673 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc;
674 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
675 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[1]; /* tx vq */
676 1.2.6.2 riz struct mbuf *m;
677 1.2.6.2 riz int queued = 0, retry = 0;
678 1.2.6.2 riz
679 1.2.6.2 riz if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
680 1.2.6.2 riz return;
681 1.2.6.2 riz
682 1.2.6.2 riz for (;;) {
683 1.2.6.2 riz int slot, r;
684 1.2.6.2 riz
685 1.2.6.2 riz IFQ_POLL(&ifp->if_snd, m);
686 1.2.6.2 riz if (m == NULL)
687 1.2.6.2 riz break;
688 1.2.6.2 riz
689 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot);
690 1.2.6.2 riz if (r == EAGAIN) {
691 1.2.6.2 riz ifp->if_flags |= IFF_OACTIVE;
692 1.2.6.2 riz vioif_tx_vq_done(vq);
693 1.2.6.2 riz if (retry++ == 0)
694 1.2.6.2 riz continue;
695 1.2.6.2 riz else
696 1.2.6.2 riz break;
697 1.2.6.2 riz }
698 1.2.6.2 riz if (r != 0)
699 1.2.6.2 riz panic("enqueue_prep for a tx buffer");
700 1.2.6.2 riz r = bus_dmamap_load_mbuf(vsc->sc_dmat,
701 1.2.6.2 riz sc->sc_tx_dmamaps[slot],
702 1.2.6.2 riz m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
703 1.2.6.2 riz if (r != 0) {
704 1.2.6.2 riz virtio_enqueue_abort(vsc, vq, slot);
705 1.2.6.2 riz printf("%s: tx dmamap load failed, error code %d\n",
706 1.2.6.2 riz device_xname(sc->sc_dev), r);
707 1.2.6.2 riz break;
708 1.2.6.2 riz }
709 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot,
710 1.2.6.2 riz sc->sc_tx_dmamaps[slot]->dm_nsegs + 1);
711 1.2.6.2 riz if (r != 0) {
712 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat,
713 1.2.6.2 riz sc->sc_tx_dmamaps[slot]);
714 1.2.6.2 riz ifp->if_flags |= IFF_OACTIVE;
715 1.2.6.2 riz vioif_tx_vq_done(vq);
716 1.2.6.2 riz if (retry++ == 0)
717 1.2.6.2 riz continue;
718 1.2.6.2 riz else
719 1.2.6.2 riz break;
720 1.2.6.2 riz }
721 1.2.6.2 riz IFQ_DEQUEUE(&ifp->if_snd, m);
722 1.2.6.2 riz sc->sc_tx_mbufs[slot] = m;
723 1.2.6.2 riz
724 1.2.6.2 riz memset(&sc->sc_tx_hdrs[slot], 0, sizeof(struct virtio_net_hdr));
725 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_tx_dmamaps[slot],
726 1.2.6.2 riz 0, sc->sc_tx_dmamaps[slot]->dm_mapsize,
727 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
728 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_txhdr_dmamaps[slot],
729 1.2.6.2 riz 0, sc->sc_txhdr_dmamaps[slot]->dm_mapsize,
730 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
731 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_txhdr_dmamaps[slot], true);
732 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_tx_dmamaps[slot], true);
733 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, false);
734 1.2.6.2 riz queued++;
735 1.2.6.2 riz #if NBPFILTER > 0
736 1.2.6.2 riz if (ifp->if_bpf)
737 1.2.6.2 riz bpf_mtap(ifp->if_bpf, m);
738 1.2.6.2 riz #endif
739 1.2.6.2 riz }
740 1.2.6.2 riz
741 1.2.6.2 riz if (queued > 0) {
742 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, -1, true);
743 1.2.6.2 riz ifp->if_timer = 5;
744 1.2.6.2 riz }
745 1.2.6.2 riz }
746 1.2.6.2 riz
747 1.2.6.2 riz static int
748 1.2.6.2 riz vioif_ioctl(struct ifnet *ifp, u_long cmd, void *data)
749 1.2.6.2 riz {
750 1.2.6.2 riz int s, r;
751 1.2.6.2 riz
752 1.2.6.2 riz s = splnet();
753 1.2.6.2 riz
754 1.2.6.2 riz r = ether_ioctl(ifp, cmd, data);
755 1.2.6.2 riz if ((r == 0 && cmd == SIOCSIFFLAGS) ||
756 1.2.6.2 riz (r == ENETRESET && (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI))) {
757 1.2.6.2 riz if (ifp->if_flags & IFF_RUNNING)
758 1.2.6.2 riz r = vioif_rx_filter(ifp->if_softc);
759 1.2.6.2 riz else
760 1.2.6.2 riz r = 0;
761 1.2.6.2 riz }
762 1.2.6.2 riz
763 1.2.6.2 riz splx(s);
764 1.2.6.2 riz
765 1.2.6.2 riz return r;
766 1.2.6.2 riz }
767 1.2.6.2 riz
768 1.2.6.2 riz void
769 1.2.6.2 riz vioif_watchdog(struct ifnet *ifp)
770 1.2.6.2 riz {
771 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc;
772 1.2.6.2 riz
773 1.2.6.2 riz if (ifp->if_flags & IFF_RUNNING)
774 1.2.6.2 riz vioif_tx_vq_done(&sc->sc_vq[1]);
775 1.2.6.2 riz }
776 1.2.6.2 riz
777 1.2.6.2 riz
778 1.2.6.2 riz /*
779 1.2.6.2 riz * Recieve implementation
780 1.2.6.2 riz */
781 1.2.6.2 riz /* allocate and initialize a mbuf for recieve */
782 1.2.6.2 riz static int
783 1.2.6.2 riz vioif_add_rx_mbuf(struct vioif_softc *sc, int i)
784 1.2.6.2 riz {
785 1.2.6.2 riz struct mbuf *m;
786 1.2.6.2 riz int r;
787 1.2.6.2 riz
788 1.2.6.2 riz MGETHDR(m, M_DONTWAIT, MT_DATA);
789 1.2.6.2 riz if (m == NULL)
790 1.2.6.2 riz return ENOBUFS;
791 1.2.6.2 riz MCLGET(m, M_DONTWAIT);
792 1.2.6.2 riz if ((m->m_flags & M_EXT) == 0) {
793 1.2.6.2 riz m_freem(m);
794 1.2.6.2 riz return ENOBUFS;
795 1.2.6.2 riz }
796 1.2.6.2 riz sc->sc_rx_mbufs[i] = m;
797 1.2.6.2 riz m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
798 1.2.6.2 riz r = bus_dmamap_load_mbuf(sc->sc_virtio->sc_dmat,
799 1.2.6.2 riz sc->sc_rx_dmamaps[i],
800 1.2.6.2 riz m, BUS_DMA_READ|BUS_DMA_NOWAIT);
801 1.2.6.2 riz if (r) {
802 1.2.6.2 riz m_freem(m);
803 1.2.6.2 riz sc->sc_rx_mbufs[i] = 0;
804 1.2.6.2 riz return r;
805 1.2.6.2 riz }
806 1.2.6.2 riz
807 1.2.6.2 riz return 0;
808 1.2.6.2 riz }
809 1.2.6.2 riz
810 1.2.6.2 riz /* free a mbuf for recieve */
811 1.2.6.2 riz static void
812 1.2.6.2 riz vioif_free_rx_mbuf(struct vioif_softc *sc, int i)
813 1.2.6.2 riz {
814 1.2.6.2 riz bus_dmamap_unload(sc->sc_virtio->sc_dmat, sc->sc_rx_dmamaps[i]);
815 1.2.6.2 riz m_freem(sc->sc_rx_mbufs[i]);
816 1.2.6.2 riz sc->sc_rx_mbufs[i] = NULL;
817 1.2.6.2 riz }
818 1.2.6.2 riz
819 1.2.6.2 riz /* add mbufs for all the empty recieve slots */
820 1.2.6.2 riz static void
821 1.2.6.2 riz vioif_populate_rx_mbufs(struct vioif_softc *sc)
822 1.2.6.2 riz {
823 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
824 1.2.6.2 riz int i, r, ndone = 0;
825 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0]; /* rx vq */
826 1.2.6.2 riz
827 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) {
828 1.2.6.2 riz int slot;
829 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot);
830 1.2.6.2 riz if (r == EAGAIN)
831 1.2.6.2 riz break;
832 1.2.6.2 riz if (r != 0)
833 1.2.6.2 riz panic("enqueue_prep for rx buffers");
834 1.2.6.2 riz if (sc->sc_rx_mbufs[slot] == NULL) {
835 1.2.6.2 riz r = vioif_add_rx_mbuf(sc, slot);
836 1.2.6.2 riz if (r != 0) {
837 1.2.6.2 riz printf("%s: rx mbuf allocation failed, "
838 1.2.6.2 riz "error code %d\n",
839 1.2.6.2 riz device_xname(sc->sc_dev), r);
840 1.2.6.2 riz break;
841 1.2.6.2 riz }
842 1.2.6.2 riz }
843 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot,
844 1.2.6.2 riz sc->sc_rx_dmamaps[slot]->dm_nsegs + 1);
845 1.2.6.2 riz if (r != 0) {
846 1.2.6.2 riz vioif_free_rx_mbuf(sc, slot);
847 1.2.6.2 riz break;
848 1.2.6.2 riz }
849 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rxhdr_dmamaps[slot],
850 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr), BUS_DMASYNC_PREREAD);
851 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rx_dmamaps[slot],
852 1.2.6.2 riz 0, MCLBYTES, BUS_DMASYNC_PREREAD);
853 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_rxhdr_dmamaps[slot], false);
854 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_rx_dmamaps[slot], false);
855 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, false);
856 1.2.6.2 riz ndone++;
857 1.2.6.2 riz }
858 1.2.6.2 riz if (ndone > 0)
859 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, -1, true);
860 1.2.6.2 riz }
861 1.2.6.2 riz
862 1.2.6.2 riz /* dequeue recieved packets */
863 1.2.6.2 riz static int
864 1.2.6.2 riz vioif_rx_deq(struct vioif_softc *sc)
865 1.2.6.2 riz {
866 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
867 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0];
868 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if;
869 1.2.6.2 riz struct mbuf *m;
870 1.2.6.2 riz int r = 0;
871 1.2.6.2 riz int slot, len;
872 1.2.6.2 riz
873 1.2.6.2 riz while (virtio_dequeue(vsc, vq, &slot, &len) == 0) {
874 1.2.6.2 riz len -= sizeof(struct virtio_net_hdr);
875 1.2.6.2 riz r = 1;
876 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rxhdr_dmamaps[slot],
877 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr),
878 1.2.6.2 riz BUS_DMASYNC_POSTREAD);
879 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rx_dmamaps[slot],
880 1.2.6.2 riz 0, MCLBYTES,
881 1.2.6.2 riz BUS_DMASYNC_POSTREAD);
882 1.2.6.2 riz m = sc->sc_rx_mbufs[slot];
883 1.2.6.2 riz KASSERT(m != NULL);
884 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_rx_dmamaps[slot]);
885 1.2.6.2 riz sc->sc_rx_mbufs[slot] = 0;
886 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot);
887 1.2.6.2 riz m->m_pkthdr.rcvif = ifp;
888 1.2.6.2 riz m->m_len = m->m_pkthdr.len = len;
889 1.2.6.2 riz ifp->if_ipackets++;
890 1.2.6.2 riz #if NBPFILTER > 0
891 1.2.6.2 riz if (ifp->if_bpf)
892 1.2.6.2 riz bpf_mtap(ifp->if_bpf, m);
893 1.2.6.2 riz #endif
894 1.2.6.2 riz (*ifp->if_input)(ifp, m);
895 1.2.6.2 riz }
896 1.2.6.2 riz
897 1.2.6.2 riz return r;
898 1.2.6.2 riz }
899 1.2.6.2 riz
900 1.2.6.2 riz /* rx interrupt; call _dequeue above and schedule a softint */
901 1.2.6.2 riz static int
902 1.2.6.2 riz vioif_rx_vq_done(struct virtqueue *vq)
903 1.2.6.2 riz {
904 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner;
905 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child);
906 1.2.6.2 riz int r;
907 1.2.6.2 riz
908 1.2.6.2 riz r = vioif_rx_deq(sc);
909 1.2.6.2 riz if (r)
910 1.2.6.2 riz softint_schedule(sc->sc_rx_softint);
911 1.2.6.2 riz
912 1.2.6.2 riz return r;
913 1.2.6.2 riz }
914 1.2.6.2 riz
915 1.2.6.2 riz /* softint: enqueue recieve requests for new incoming packets */
916 1.2.6.2 riz static void
917 1.2.6.2 riz vioif_rx_softint(void *arg)
918 1.2.6.2 riz {
919 1.2.6.2 riz struct vioif_softc *sc = arg;
920 1.2.6.2 riz
921 1.2.6.2 riz vioif_populate_rx_mbufs(sc);
922 1.2.6.2 riz }
923 1.2.6.2 riz
924 1.2.6.2 riz /* free all the mbufs; called from if_stop(disable) */
925 1.2.6.2 riz static void
926 1.2.6.2 riz vioif_rx_drain(struct vioif_softc *sc)
927 1.2.6.2 riz {
928 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0];
929 1.2.6.2 riz int i;
930 1.2.6.2 riz
931 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) {
932 1.2.6.2 riz if (sc->sc_rx_mbufs[i] == NULL)
933 1.2.6.2 riz continue;
934 1.2.6.2 riz vioif_free_rx_mbuf(sc, i);
935 1.2.6.2 riz }
936 1.2.6.2 riz }
937 1.2.6.2 riz
938 1.2.6.2 riz
939 1.2.6.2 riz /*
940 1.2.6.2 riz * Transmition implementation
941 1.2.6.2 riz */
942 1.2.6.2 riz /* actual transmission is done in if_start */
943 1.2.6.2 riz /* tx interrupt; dequeue and free mbufs */
944 1.2.6.2 riz /*
945 1.2.6.2 riz * tx interrupt is actually disabled; this should be called upon
946 1.2.6.2 riz * tx vq full and watchdog
947 1.2.6.2 riz */
948 1.2.6.2 riz static int
949 1.2.6.2 riz vioif_tx_vq_done(struct virtqueue *vq)
950 1.2.6.2 riz {
951 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner;
952 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child);
953 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if;
954 1.2.6.2 riz struct mbuf *m;
955 1.2.6.2 riz int r = 0;
956 1.2.6.2 riz int slot, len;
957 1.2.6.2 riz
958 1.2.6.2 riz while (virtio_dequeue(vsc, vq, &slot, &len) == 0) {
959 1.2.6.2 riz r++;
960 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_txhdr_dmamaps[slot],
961 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr),
962 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
963 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_tx_dmamaps[slot],
964 1.2.6.2 riz 0, sc->sc_tx_dmamaps[slot]->dm_mapsize,
965 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
966 1.2.6.2 riz m = sc->sc_tx_mbufs[slot];
967 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_tx_dmamaps[slot]);
968 1.2.6.2 riz sc->sc_tx_mbufs[slot] = 0;
969 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot);
970 1.2.6.2 riz ifp->if_opackets++;
971 1.2.6.2 riz m_freem(m);
972 1.2.6.2 riz }
973 1.2.6.2 riz
974 1.2.6.2 riz if (r)
975 1.2.6.2 riz ifp->if_flags &= ~IFF_OACTIVE;
976 1.2.6.2 riz return r;
977 1.2.6.2 riz }
978 1.2.6.2 riz
979 1.2.6.2 riz /* free all the mbufs already put on vq; called from if_stop(disable) */
980 1.2.6.2 riz static void
981 1.2.6.2 riz vioif_tx_drain(struct vioif_softc *sc)
982 1.2.6.2 riz {
983 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
984 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[1];
985 1.2.6.2 riz int i;
986 1.2.6.2 riz
987 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) {
988 1.2.6.2 riz if (sc->sc_tx_mbufs[i] == NULL)
989 1.2.6.2 riz continue;
990 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_tx_dmamaps[i]);
991 1.2.6.2 riz m_freem(sc->sc_tx_mbufs[i]);
992 1.2.6.2 riz sc->sc_tx_mbufs[i] = NULL;
993 1.2.6.2 riz }
994 1.2.6.2 riz }
995 1.2.6.2 riz
996 1.2.6.2 riz /*
997 1.2.6.2 riz * Control vq
998 1.2.6.2 riz */
999 1.2.6.2 riz /* issue a VIRTIO_NET_CTRL_RX class command and wait for completion */
1000 1.2.6.2 riz static int
1001 1.2.6.2 riz vioif_ctrl_rx(struct vioif_softc *sc, int cmd, bool onoff)
1002 1.2.6.2 riz {
1003 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
1004 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[2];
1005 1.2.6.2 riz int r, slot;
1006 1.2.6.2 riz
1007 1.2.6.2 riz if (vsc->sc_nvqs < 3)
1008 1.2.6.2 riz return ENOTSUP;
1009 1.2.6.2 riz
1010 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1011 1.2.6.2 riz while (sc->sc_ctrl_inuse != FREE)
1012 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock);
1013 1.2.6.2 riz sc->sc_ctrl_inuse = INUSE;
1014 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1015 1.2.6.2 riz
1016 1.2.6.2 riz sc->sc_ctrl_cmd->class = VIRTIO_NET_CTRL_RX;
1017 1.2.6.2 riz sc->sc_ctrl_cmd->command = cmd;
1018 1.2.6.2 riz sc->sc_ctrl_rx->onoff = onoff;
1019 1.2.6.2 riz
1020 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap,
1021 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_cmd),
1022 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
1023 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_rx_dmamap,
1024 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_rx),
1025 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
1026 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap,
1027 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_status),
1028 1.2.6.2 riz BUS_DMASYNC_PREREAD);
1029 1.2.6.2 riz
1030 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot);
1031 1.2.6.2 riz if (r != 0)
1032 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev));
1033 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 3);
1034 1.2.6.2 riz if (r != 0)
1035 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev));
1036 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_cmd_dmamap, true);
1037 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_rx_dmamap, true);
1038 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_status_dmamap, false);
1039 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, true);
1040 1.2.6.2 riz
1041 1.2.6.2 riz /* wait for done */
1042 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1043 1.2.6.2 riz while (sc->sc_ctrl_inuse != DONE)
1044 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock);
1045 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1046 1.2.6.2 riz /* already dequeueued */
1047 1.2.6.2 riz
1048 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 0,
1049 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd),
1050 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
1051 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_rx_dmamap, 0,
1052 1.2.6.2 riz sizeof(struct virtio_net_ctrl_rx),
1053 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
1054 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 0,
1055 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status),
1056 1.2.6.2 riz BUS_DMASYNC_POSTREAD);
1057 1.2.6.2 riz
1058 1.2.6.2 riz if (sc->sc_ctrl_status->ack == VIRTIO_NET_OK)
1059 1.2.6.2 riz r = 0;
1060 1.2.6.2 riz else {
1061 1.2.6.2 riz printf("%s: failed setting rx mode\n",
1062 1.2.6.2 riz device_xname(sc->sc_dev));
1063 1.2.6.2 riz r = EIO;
1064 1.2.6.2 riz }
1065 1.2.6.2 riz
1066 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1067 1.2.6.2 riz sc->sc_ctrl_inuse = FREE;
1068 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait);
1069 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1070 1.2.6.2 riz
1071 1.2.6.2 riz return r;
1072 1.2.6.2 riz }
1073 1.2.6.2 riz
1074 1.2.6.2 riz static int
1075 1.2.6.2 riz vioif_set_promisc(struct vioif_softc *sc, bool onoff)
1076 1.2.6.2 riz {
1077 1.2.6.2 riz int r;
1078 1.2.6.2 riz
1079 1.2.6.2 riz r = vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_PROMISC, onoff);
1080 1.2.6.2 riz
1081 1.2.6.2 riz return r;
1082 1.2.6.2 riz }
1083 1.2.6.2 riz
1084 1.2.6.2 riz static int
1085 1.2.6.2 riz vioif_set_allmulti(struct vioif_softc *sc, bool onoff)
1086 1.2.6.2 riz {
1087 1.2.6.2 riz int r;
1088 1.2.6.2 riz
1089 1.2.6.2 riz r = vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_ALLMULTI, onoff);
1090 1.2.6.2 riz
1091 1.2.6.2 riz return r;
1092 1.2.6.2 riz }
1093 1.2.6.2 riz
1094 1.2.6.2 riz /* issue VIRTIO_NET_CTRL_MAC_TABLE_SET command and wait for completion */
1095 1.2.6.2 riz static int
1096 1.2.6.2 riz vioif_set_rx_filter(struct vioif_softc *sc)
1097 1.2.6.2 riz {
1098 1.2.6.2 riz /* filter already set in sc_ctrl_mac_tbl */
1099 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
1100 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[2];
1101 1.2.6.2 riz int r, slot;
1102 1.2.6.2 riz
1103 1.2.6.2 riz if (vsc->sc_nvqs < 3)
1104 1.2.6.2 riz return ENOTSUP;
1105 1.2.6.2 riz
1106 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1107 1.2.6.2 riz while (sc->sc_ctrl_inuse != FREE)
1108 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock);
1109 1.2.6.2 riz sc->sc_ctrl_inuse = INUSE;
1110 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1111 1.2.6.2 riz
1112 1.2.6.2 riz sc->sc_ctrl_cmd->class = VIRTIO_NET_CTRL_MAC;
1113 1.2.6.2 riz sc->sc_ctrl_cmd->command = VIRTIO_NET_CTRL_MAC_TABLE_SET;
1114 1.2.6.2 riz
1115 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap,
1116 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc,
1117 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1118 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries),
1119 1.2.6.2 riz NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1120 1.2.6.2 riz if (r) {
1121 1.2.6.2 riz printf("%s: control command dmamap load failed, "
1122 1.2.6.2 riz "error code %d\n", device_xname(sc->sc_dev), r);
1123 1.2.6.2 riz goto out;
1124 1.2.6.2 riz }
1125 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap,
1126 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc,
1127 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1128 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries),
1129 1.2.6.2 riz NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1130 1.2.6.2 riz if (r) {
1131 1.2.6.2 riz printf("%s: control command dmamap load failed, "
1132 1.2.6.2 riz "error code %d\n", device_xname(sc->sc_dev), r);
1133 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap);
1134 1.2.6.2 riz goto out;
1135 1.2.6.2 riz }
1136 1.2.6.2 riz
1137 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap,
1138 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_cmd),
1139 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
1140 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap, 0,
1141 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1142 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries),
1143 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
1144 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap, 0,
1145 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1146 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries),
1147 1.2.6.2 riz BUS_DMASYNC_PREWRITE);
1148 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap,
1149 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_status),
1150 1.2.6.2 riz BUS_DMASYNC_PREREAD);
1151 1.2.6.2 riz
1152 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot);
1153 1.2.6.2 riz if (r != 0)
1154 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev));
1155 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 4);
1156 1.2.6.2 riz if (r != 0)
1157 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev));
1158 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_cmd_dmamap, true);
1159 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_tbl_uc_dmamap, true);
1160 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_tbl_mc_dmamap, true);
1161 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_status_dmamap, false);
1162 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, true);
1163 1.2.6.2 riz
1164 1.2.6.2 riz /* wait for done */
1165 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1166 1.2.6.2 riz while (sc->sc_ctrl_inuse != DONE)
1167 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock);
1168 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1169 1.2.6.2 riz /* already dequeueued */
1170 1.2.6.2 riz
1171 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 0,
1172 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd),
1173 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
1174 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap, 0,
1175 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1176 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries),
1177 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
1178 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap, 0,
1179 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl)
1180 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries),
1181 1.2.6.2 riz BUS_DMASYNC_POSTWRITE);
1182 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 0,
1183 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status),
1184 1.2.6.2 riz BUS_DMASYNC_POSTREAD);
1185 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap);
1186 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap);
1187 1.2.6.2 riz
1188 1.2.6.2 riz if (sc->sc_ctrl_status->ack == VIRTIO_NET_OK)
1189 1.2.6.2 riz r = 0;
1190 1.2.6.2 riz else {
1191 1.2.6.2 riz printf("%s: failed setting rx filter\n",
1192 1.2.6.2 riz device_xname(sc->sc_dev));
1193 1.2.6.2 riz r = EIO;
1194 1.2.6.2 riz }
1195 1.2.6.2 riz
1196 1.2.6.2 riz out:
1197 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1198 1.2.6.2 riz sc->sc_ctrl_inuse = FREE;
1199 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait);
1200 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1201 1.2.6.2 riz
1202 1.2.6.2 riz return r;
1203 1.2.6.2 riz }
1204 1.2.6.2 riz
1205 1.2.6.2 riz /* ctrl vq interrupt; wake up the command issuer */
1206 1.2.6.2 riz static int
1207 1.2.6.2 riz vioif_ctrl_vq_done(struct virtqueue *vq)
1208 1.2.6.2 riz {
1209 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner;
1210 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child);
1211 1.2.6.2 riz int r, slot;
1212 1.2.6.2 riz
1213 1.2.6.2 riz r = virtio_dequeue(vsc, vq, &slot, NULL);
1214 1.2.6.2 riz if (r == ENOENT)
1215 1.2.6.2 riz return 0;
1216 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot);
1217 1.2.6.2 riz
1218 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock);
1219 1.2.6.2 riz sc->sc_ctrl_inuse = DONE;
1220 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait);
1221 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock);
1222 1.2.6.2 riz
1223 1.2.6.2 riz return 1;
1224 1.2.6.2 riz }
1225 1.2.6.2 riz
1226 1.2.6.2 riz /*
1227 1.2.6.2 riz * If IFF_PROMISC requested, set promiscuous
1228 1.2.6.2 riz * If multicast filter small enough (<=MAXENTRIES) set rx filter
1229 1.2.6.2 riz * If large multicast filter exist use ALLMULTI
1230 1.2.6.2 riz */
1231 1.2.6.2 riz /*
1232 1.2.6.2 riz * If setting rx filter fails fall back to ALLMULTI
1233 1.2.6.2 riz * If ALLMULTI fails fall back to PROMISC
1234 1.2.6.2 riz */
1235 1.2.6.2 riz static int
1236 1.2.6.2 riz vioif_rx_filter(struct vioif_softc *sc)
1237 1.2.6.2 riz {
1238 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
1239 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1240 1.2.6.2 riz struct ether_multi *enm;
1241 1.2.6.2 riz struct ether_multistep step;
1242 1.2.6.2 riz int nentries;
1243 1.2.6.2 riz int promisc = 0, allmulti = 0, rxfilter = 0;
1244 1.2.6.2 riz int r;
1245 1.2.6.2 riz
1246 1.2.6.2 riz if (vsc->sc_nvqs < 3) { /* no ctrl vq; always promisc */
1247 1.2.6.2 riz ifp->if_flags |= IFF_PROMISC;
1248 1.2.6.2 riz return 0;
1249 1.2.6.2 riz }
1250 1.2.6.2 riz
1251 1.2.6.2 riz if (ifp->if_flags & IFF_PROMISC) {
1252 1.2.6.2 riz promisc = 1;
1253 1.2.6.2 riz goto set;
1254 1.2.6.2 riz }
1255 1.2.6.2 riz
1256 1.2.6.2 riz nentries = -1;
1257 1.2.6.2 riz ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
1258 1.2.6.2 riz while (nentries++, enm != NULL) {
1259 1.2.6.2 riz if (nentries >= VIRTIO_NET_CTRL_MAC_MAXENTRIES) {
1260 1.2.6.2 riz allmulti = 1;
1261 1.2.6.2 riz goto set;
1262 1.2.6.2 riz }
1263 1.2.6.2 riz if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1264 1.2.6.2 riz ETHER_ADDR_LEN)) {
1265 1.2.6.2 riz allmulti = 1;
1266 1.2.6.2 riz goto set;
1267 1.2.6.2 riz }
1268 1.2.6.2 riz memcpy(sc->sc_ctrl_mac_tbl_mc->macs[nentries],
1269 1.2.6.2 riz enm->enm_addrlo, ETHER_ADDR_LEN);
1270 1.2.6.2 riz ETHER_NEXT_MULTI(step, enm);
1271 1.2.6.2 riz }
1272 1.2.6.2 riz rxfilter = 1;
1273 1.2.6.2 riz
1274 1.2.6.2 riz set:
1275 1.2.6.2 riz if (rxfilter) {
1276 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc->nentries = 0;
1277 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc->nentries = nentries;
1278 1.2.6.2 riz r = vioif_set_rx_filter(sc);
1279 1.2.6.2 riz if (r != 0) {
1280 1.2.6.2 riz rxfilter = 0;
1281 1.2.6.2 riz allmulti = 1; /* fallback */
1282 1.2.6.2 riz }
1283 1.2.6.2 riz } else {
1284 1.2.6.2 riz /* remove rx filter */
1285 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc->nentries = 0;
1286 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc->nentries = 0;
1287 1.2.6.2 riz r = vioif_set_rx_filter(sc);
1288 1.2.6.2 riz /* what to do on failure? */
1289 1.2.6.2 riz }
1290 1.2.6.2 riz if (allmulti) {
1291 1.2.6.2 riz r = vioif_set_allmulti(sc, true);
1292 1.2.6.2 riz if (r != 0) {
1293 1.2.6.2 riz allmulti = 0;
1294 1.2.6.2 riz promisc = 1; /* fallback */
1295 1.2.6.2 riz }
1296 1.2.6.2 riz } else {
1297 1.2.6.2 riz r = vioif_set_allmulti(sc, false);
1298 1.2.6.2 riz /* what to do on failure? */
1299 1.2.6.2 riz }
1300 1.2.6.2 riz if (promisc) {
1301 1.2.6.2 riz r = vioif_set_promisc(sc, true);
1302 1.2.6.2 riz } else {
1303 1.2.6.2 riz r = vioif_set_promisc(sc, false);
1304 1.2.6.2 riz }
1305 1.2.6.2 riz
1306 1.2.6.2 riz return r;
1307 1.2.6.2 riz }
1308 1.2.6.2 riz
1309 1.2.6.2 riz /* change link status */
1310 1.2.6.2 riz static int
1311 1.2.6.2 riz vioif_updown(struct vioif_softc *sc, bool isup)
1312 1.2.6.2 riz {
1313 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio;
1314 1.2.6.2 riz
1315 1.2.6.2 riz if (!(vsc->sc_features & VIRTIO_NET_F_STATUS))
1316 1.2.6.2 riz return ENODEV;
1317 1.2.6.2 riz virtio_write_device_config_1(vsc,
1318 1.2.6.2 riz VIRTIO_NET_CONFIG_STATUS,
1319 1.2.6.2 riz isup?VIRTIO_NET_S_LINK_UP:0);
1320 1.2.6.2 riz return 0;
1321 1.2.6.2 riz }
1322