if_vioif.c revision 1.2.6.3
1 1.2.6.3 msaitoh /* $NetBSD: if_vioif.c,v 1.2.6.3 2013/06/09 11:51:40 msaitoh Exp $ */ 2 1.2.6.2 riz 3 1.2.6.2 riz /* 4 1.2.6.2 riz * Copyright (c) 2010 Minoura Makoto. 5 1.2.6.2 riz * All rights reserved. 6 1.2.6.2 riz * 7 1.2.6.2 riz * Redistribution and use in source and binary forms, with or without 8 1.2.6.2 riz * modification, are permitted provided that the following conditions 9 1.2.6.2 riz * are met: 10 1.2.6.2 riz * 1. Redistributions of source code must retain the above copyright 11 1.2.6.2 riz * notice, this list of conditions and the following disclaimer. 12 1.2.6.2 riz * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.6.2 riz * notice, this list of conditions and the following disclaimer in the 14 1.2.6.2 riz * documentation and/or other materials provided with the distribution. 15 1.2.6.2 riz * 16 1.2.6.2 riz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.6.2 riz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.6.2 riz * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.6.2 riz * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.6.2 riz * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.2.6.2 riz * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.2.6.2 riz * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.2.6.2 riz * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.2.6.2 riz * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.2.6.2 riz * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.2.6.2 riz */ 27 1.2.6.2 riz 28 1.2.6.2 riz #include <sys/cdefs.h> 29 1.2.6.3 msaitoh __KERNEL_RCSID(0, "$NetBSD: if_vioif.c,v 1.2.6.3 2013/06/09 11:51:40 msaitoh Exp $"); 30 1.2.6.2 riz 31 1.2.6.2 riz #include "bpfilter.h" 32 1.2.6.2 riz 33 1.2.6.2 riz #include <sys/param.h> 34 1.2.6.2 riz #include <sys/systm.h> 35 1.2.6.2 riz #include <sys/kernel.h> 36 1.2.6.2 riz #include <sys/bus.h> 37 1.2.6.2 riz #include <sys/condvar.h> 38 1.2.6.2 riz #include <sys/device.h> 39 1.2.6.2 riz #include <sys/intr.h> 40 1.2.6.2 riz #include <sys/kmem.h> 41 1.2.6.2 riz #include <sys/mbuf.h> 42 1.2.6.2 riz #include <sys/mutex.h> 43 1.2.6.2 riz #include <sys/sockio.h> 44 1.2.6.2 riz 45 1.2.6.2 riz #include <dev/pci/pcidevs.h> 46 1.2.6.2 riz #include <dev/pci/pcireg.h> 47 1.2.6.2 riz #include <dev/pci/pcivar.h> 48 1.2.6.2 riz #include <dev/pci/virtioreg.h> 49 1.2.6.2 riz #include <dev/pci/virtiovar.h> 50 1.2.6.2 riz 51 1.2.6.2 riz #include <net/if.h> 52 1.2.6.2 riz #include <net/if_media.h> 53 1.2.6.2 riz #include <net/if_ether.h> 54 1.2.6.2 riz 55 1.2.6.2 riz #if NBPFILTER > 0 56 1.2.6.2 riz #include <net/bpf.h> 57 1.2.6.2 riz #endif 58 1.2.6.2 riz 59 1.2.6.2 riz 60 1.2.6.2 riz /* 61 1.2.6.2 riz * if_vioifreg.h: 62 1.2.6.2 riz */ 63 1.2.6.2 riz /* Configuration registers */ 64 1.2.6.2 riz #define VIRTIO_NET_CONFIG_MAC 0 /* 8bit x 6byte */ 65 1.2.6.2 riz #define VIRTIO_NET_CONFIG_STATUS 6 /* 16bit */ 66 1.2.6.2 riz 67 1.2.6.2 riz /* Feature bits */ 68 1.2.6.2 riz #define VIRTIO_NET_F_CSUM (1<<0) 69 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_CSUM (1<<1) 70 1.2.6.2 riz #define VIRTIO_NET_F_MAC (1<<5) 71 1.2.6.2 riz #define VIRTIO_NET_F_GSO (1<<6) 72 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_TSO4 (1<<7) 73 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_TSO6 (1<<8) 74 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_ECN (1<<9) 75 1.2.6.2 riz #define VIRTIO_NET_F_GUEST_UFO (1<<10) 76 1.2.6.2 riz #define VIRTIO_NET_F_HOST_TSO4 (1<<11) 77 1.2.6.2 riz #define VIRTIO_NET_F_HOST_TSO6 (1<<12) 78 1.2.6.2 riz #define VIRTIO_NET_F_HOST_ECN (1<<13) 79 1.2.6.2 riz #define VIRTIO_NET_F_HOST_UFO (1<<14) 80 1.2.6.2 riz #define VIRTIO_NET_F_MRG_RXBUF (1<<15) 81 1.2.6.2 riz #define VIRTIO_NET_F_STATUS (1<<16) 82 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_VQ (1<<17) 83 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_RX (1<<18) 84 1.2.6.2 riz #define VIRTIO_NET_F_CTRL_VLAN (1<<19) 85 1.2.6.2 riz 86 1.2.6.2 riz /* Status */ 87 1.2.6.2 riz #define VIRTIO_NET_S_LINK_UP 1 88 1.2.6.2 riz 89 1.2.6.2 riz /* Packet header structure */ 90 1.2.6.2 riz struct virtio_net_hdr { 91 1.2.6.2 riz uint8_t flags; 92 1.2.6.2 riz uint8_t gso_type; 93 1.2.6.2 riz uint16_t hdr_len; 94 1.2.6.2 riz uint16_t gso_size; 95 1.2.6.2 riz uint16_t csum_start; 96 1.2.6.2 riz uint16_t csum_offset; 97 1.2.6.2 riz #if 0 98 1.2.6.2 riz uint16_t num_buffers; /* if VIRTIO_NET_F_MRG_RXBUF enabled */ 99 1.2.6.2 riz #endif 100 1.2.6.2 riz } __packed; 101 1.2.6.2 riz 102 1.2.6.2 riz #define VIRTIO_NET_HDR_F_NEEDS_CSUM 1 /* flags */ 103 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_NONE 0 /* gso_type */ 104 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_TCPV4 1 /* gso_type */ 105 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_UDP 3 /* gso_type */ 106 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_TCPV6 4 /* gso_type */ 107 1.2.6.2 riz #define VIRTIO_NET_HDR_GSO_ECN 0x80 /* gso_type, |'ed */ 108 1.2.6.2 riz 109 1.2.6.2 riz #define VIRTIO_NET_MAX_GSO_LEN (65536+ETHER_HDR_LEN) 110 1.2.6.2 riz 111 1.2.6.2 riz /* Control virtqueue */ 112 1.2.6.2 riz struct virtio_net_ctrl_cmd { 113 1.2.6.2 riz uint8_t class; 114 1.2.6.2 riz uint8_t command; 115 1.2.6.2 riz } __packed; 116 1.2.6.2 riz #define VIRTIO_NET_CTRL_RX 0 117 1.2.6.2 riz # define VIRTIO_NET_CTRL_RX_PROMISC 0 118 1.2.6.2 riz # define VIRTIO_NET_CTRL_RX_ALLMULTI 1 119 1.2.6.2 riz 120 1.2.6.2 riz #define VIRTIO_NET_CTRL_MAC 1 121 1.2.6.2 riz # define VIRTIO_NET_CTRL_MAC_TABLE_SET 0 122 1.2.6.2 riz 123 1.2.6.2 riz #define VIRTIO_NET_CTRL_VLAN 2 124 1.2.6.2 riz # define VIRTIO_NET_CTRL_VLAN_ADD 0 125 1.2.6.2 riz # define VIRTIO_NET_CTRL_VLAN_DEL 1 126 1.2.6.2 riz 127 1.2.6.2 riz struct virtio_net_ctrl_status { 128 1.2.6.2 riz uint8_t ack; 129 1.2.6.2 riz } __packed; 130 1.2.6.2 riz #define VIRTIO_NET_OK 0 131 1.2.6.2 riz #define VIRTIO_NET_ERR 1 132 1.2.6.2 riz 133 1.2.6.2 riz struct virtio_net_ctrl_rx { 134 1.2.6.2 riz uint8_t onoff; 135 1.2.6.2 riz } __packed; 136 1.2.6.2 riz 137 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl { 138 1.2.6.2 riz uint32_t nentries; 139 1.2.6.2 riz uint8_t macs[][ETHER_ADDR_LEN]; 140 1.2.6.2 riz } __packed; 141 1.2.6.2 riz 142 1.2.6.2 riz struct virtio_net_ctrl_vlan { 143 1.2.6.2 riz uint16_t id; 144 1.2.6.2 riz } __packed; 145 1.2.6.2 riz 146 1.2.6.2 riz 147 1.2.6.2 riz /* 148 1.2.6.2 riz * if_vioifvar.h: 149 1.2.6.2 riz */ 150 1.2.6.2 riz struct vioif_softc { 151 1.2.6.2 riz device_t sc_dev; 152 1.2.6.2 riz 153 1.2.6.2 riz struct virtio_softc *sc_virtio; 154 1.2.6.2 riz struct virtqueue sc_vq[3]; 155 1.2.6.2 riz 156 1.2.6.2 riz uint8_t sc_mac[ETHER_ADDR_LEN]; 157 1.2.6.2 riz struct ethercom sc_ethercom; 158 1.2.6.2 riz short sc_ifflags; 159 1.2.6.2 riz 160 1.2.6.2 riz /* bus_dmamem */ 161 1.2.6.2 riz bus_dma_segment_t sc_hdr_segs[1]; 162 1.2.6.2 riz struct virtio_net_hdr *sc_hdrs; 163 1.2.6.2 riz #define sc_rx_hdrs sc_hdrs 164 1.2.6.2 riz struct virtio_net_hdr *sc_tx_hdrs; 165 1.2.6.2 riz struct virtio_net_ctrl_cmd *sc_ctrl_cmd; 166 1.2.6.2 riz struct virtio_net_ctrl_status *sc_ctrl_status; 167 1.2.6.2 riz struct virtio_net_ctrl_rx *sc_ctrl_rx; 168 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl *sc_ctrl_mac_tbl_uc; 169 1.2.6.2 riz struct virtio_net_ctrl_mac_tbl *sc_ctrl_mac_tbl_mc; 170 1.2.6.2 riz 171 1.2.6.2 riz /* kmem */ 172 1.2.6.2 riz bus_dmamap_t *sc_arrays; 173 1.2.6.2 riz #define sc_rxhdr_dmamaps sc_arrays 174 1.2.6.2 riz bus_dmamap_t *sc_txhdr_dmamaps; 175 1.2.6.2 riz bus_dmamap_t *sc_rx_dmamaps; 176 1.2.6.2 riz bus_dmamap_t *sc_tx_dmamaps; 177 1.2.6.2 riz struct mbuf **sc_rx_mbufs; 178 1.2.6.2 riz struct mbuf **sc_tx_mbufs; 179 1.2.6.2 riz 180 1.2.6.2 riz bus_dmamap_t sc_ctrl_cmd_dmamap; 181 1.2.6.2 riz bus_dmamap_t sc_ctrl_status_dmamap; 182 1.2.6.2 riz bus_dmamap_t sc_ctrl_rx_dmamap; 183 1.2.6.2 riz bus_dmamap_t sc_ctrl_tbl_uc_dmamap; 184 1.2.6.2 riz bus_dmamap_t sc_ctrl_tbl_mc_dmamap; 185 1.2.6.2 riz 186 1.2.6.2 riz void *sc_rx_softint; 187 1.2.6.2 riz 188 1.2.6.2 riz enum { 189 1.2.6.2 riz FREE, INUSE, DONE 190 1.2.6.2 riz } sc_ctrl_inuse; 191 1.2.6.2 riz kcondvar_t sc_ctrl_wait; 192 1.2.6.2 riz kmutex_t sc_ctrl_wait_lock; 193 1.2.6.2 riz }; 194 1.2.6.2 riz #define VIRTIO_NET_TX_MAXNSEGS (16) /* XXX */ 195 1.2.6.2 riz #define VIRTIO_NET_CTRL_MAC_MAXENTRIES (64) /* XXX */ 196 1.2.6.2 riz 197 1.2.6.2 riz /* cfattach interface functions */ 198 1.2.6.2 riz static int vioif_match(device_t, cfdata_t, void *); 199 1.2.6.2 riz static void vioif_attach(device_t, device_t, void *); 200 1.2.6.2 riz static void vioif_deferred_init(device_t); 201 1.2.6.2 riz 202 1.2.6.2 riz /* ifnet interface functions */ 203 1.2.6.2 riz static int vioif_init(struct ifnet *); 204 1.2.6.2 riz static void vioif_stop(struct ifnet *, int); 205 1.2.6.2 riz static void vioif_start(struct ifnet *); 206 1.2.6.2 riz static int vioif_ioctl(struct ifnet *, u_long, void *); 207 1.2.6.2 riz static void vioif_watchdog(struct ifnet *); 208 1.2.6.2 riz 209 1.2.6.2 riz /* rx */ 210 1.2.6.2 riz static int vioif_add_rx_mbuf(struct vioif_softc *, int); 211 1.2.6.2 riz static void vioif_free_rx_mbuf(struct vioif_softc *, int); 212 1.2.6.2 riz static void vioif_populate_rx_mbufs(struct vioif_softc *); 213 1.2.6.2 riz static int vioif_rx_deq(struct vioif_softc *); 214 1.2.6.2 riz static int vioif_rx_vq_done(struct virtqueue *); 215 1.2.6.2 riz static void vioif_rx_softint(void *); 216 1.2.6.2 riz static void vioif_rx_drain(struct vioif_softc *); 217 1.2.6.2 riz 218 1.2.6.2 riz /* tx */ 219 1.2.6.2 riz static int vioif_tx_vq_done(struct virtqueue *); 220 1.2.6.2 riz static void vioif_tx_drain(struct vioif_softc *); 221 1.2.6.2 riz 222 1.2.6.2 riz /* other control */ 223 1.2.6.2 riz static int vioif_updown(struct vioif_softc *, bool); 224 1.2.6.2 riz static int vioif_ctrl_rx(struct vioif_softc *, int, bool); 225 1.2.6.2 riz static int vioif_set_promisc(struct vioif_softc *, bool); 226 1.2.6.2 riz static int vioif_set_allmulti(struct vioif_softc *, bool); 227 1.2.6.2 riz static int vioif_set_rx_filter(struct vioif_softc *); 228 1.2.6.2 riz static int vioif_rx_filter(struct vioif_softc *); 229 1.2.6.2 riz static int vioif_ctrl_vq_done(struct virtqueue *); 230 1.2.6.2 riz 231 1.2.6.2 riz CFATTACH_DECL_NEW(vioif, sizeof(struct vioif_softc), 232 1.2.6.2 riz vioif_match, vioif_attach, NULL, NULL); 233 1.2.6.2 riz 234 1.2.6.2 riz static int 235 1.2.6.2 riz vioif_match(device_t parent, cfdata_t match, void *aux) 236 1.2.6.2 riz { 237 1.2.6.2 riz struct virtio_softc *va = aux; 238 1.2.6.2 riz 239 1.2.6.2 riz if (va->sc_childdevid == PCI_PRODUCT_VIRTIO_NETWORK) 240 1.2.6.2 riz return 1; 241 1.2.6.2 riz 242 1.2.6.2 riz return 0; 243 1.2.6.2 riz } 244 1.2.6.2 riz 245 1.2.6.2 riz /* allocate memory */ 246 1.2.6.2 riz /* 247 1.2.6.2 riz * dma memory is used for: 248 1.2.6.2 riz * sc_rx_hdrs[slot]: metadata array for recieved frames (READ) 249 1.2.6.2 riz * sc_tx_hdrs[slot]: metadata array for frames to be sent (WRITE) 250 1.2.6.2 riz * sc_ctrl_cmd: command to be sent via ctrl vq (WRITE) 251 1.2.6.2 riz * sc_ctrl_status: return value for a command via ctrl vq (READ) 252 1.2.6.2 riz * sc_ctrl_rx: parameter for a VIRTIO_NET_CTRL_RX class command 253 1.2.6.2 riz * (WRITE) 254 1.2.6.2 riz * sc_ctrl_mac_tbl_uc: unicast MAC address filter for a VIRTIO_NET_CTRL_MAC 255 1.2.6.2 riz * class command (WRITE) 256 1.2.6.2 riz * sc_ctrl_mac_tbl_mc: multicast MAC address filter for a VIRTIO_NET_CTRL_MAC 257 1.2.6.2 riz * class command (WRITE) 258 1.2.6.2 riz * sc_ctrl_* structures are allocated only one each; they are protected by 259 1.2.6.2 riz * sc_ctrl_inuse variable and sc_ctrl_wait condvar. 260 1.2.6.2 riz */ 261 1.2.6.2 riz /* 262 1.2.6.2 riz * dynamically allocated memory is used for: 263 1.2.6.2 riz * sc_rxhdr_dmamaps[slot]: bus_dmamap_t array for sc_rx_hdrs[slot] 264 1.2.6.2 riz * sc_txhdr_dmamaps[slot]: bus_dmamap_t array for sc_tx_hdrs[slot] 265 1.2.6.2 riz * sc_rx_dmamaps[slot]: bus_dmamap_t array for recieved payload 266 1.2.6.2 riz * sc_tx_dmamaps[slot]: bus_dmamap_t array for sent payload 267 1.2.6.2 riz * sc_rx_mbufs[slot]: mbuf pointer array for recieved frames 268 1.2.6.2 riz * sc_tx_mbufs[slot]: mbuf pointer array for sent frames 269 1.2.6.2 riz */ 270 1.2.6.2 riz static int 271 1.2.6.2 riz vioif_alloc_mems(struct vioif_softc *sc) 272 1.2.6.2 riz { 273 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 274 1.2.6.2 riz int allocsize, allocsize2, r, rsegs, i; 275 1.2.6.2 riz void *vaddr; 276 1.2.6.2 riz intptr_t p; 277 1.2.6.2 riz int rxqsize, txqsize; 278 1.2.6.2 riz 279 1.2.6.2 riz rxqsize = vsc->sc_vqs[0].vq_num; 280 1.2.6.2 riz txqsize = vsc->sc_vqs[1].vq_num; 281 1.2.6.2 riz 282 1.2.6.2 riz allocsize = sizeof(struct virtio_net_hdr) * rxqsize; 283 1.2.6.2 riz allocsize += sizeof(struct virtio_net_hdr) * txqsize; 284 1.2.6.2 riz if (vsc->sc_nvqs == 3) { 285 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_cmd) * 1; 286 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_status) * 1; 287 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_rx) * 1; 288 1.2.6.2 riz allocsize += sizeof(struct virtio_net_ctrl_mac_tbl) 289 1.2.6.2 riz + sizeof(struct virtio_net_ctrl_mac_tbl) 290 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES; 291 1.2.6.2 riz } 292 1.2.6.2 riz r = bus_dmamem_alloc(vsc->sc_dmat, allocsize, 0, 0, 293 1.2.6.2 riz &sc->sc_hdr_segs[0], 1, &rsegs, BUS_DMA_NOWAIT); 294 1.2.6.2 riz if (r != 0) { 295 1.2.6.2 riz aprint_error_dev(sc->sc_dev, 296 1.2.6.2 riz "DMA memory allocation failed, size %d, " 297 1.2.6.2 riz "error code %d\n", allocsize, r); 298 1.2.6.2 riz goto err_none; 299 1.2.6.2 riz } 300 1.2.6.2 riz r = bus_dmamem_map(vsc->sc_dmat, 301 1.2.6.2 riz &sc->sc_hdr_segs[0], 1, allocsize, 302 1.2.6.2 riz &vaddr, BUS_DMA_NOWAIT); 303 1.2.6.2 riz if (r != 0) { 304 1.2.6.2 riz aprint_error_dev(sc->sc_dev, 305 1.2.6.2 riz "DMA memory map failed, " 306 1.2.6.2 riz "error code %d\n", r); 307 1.2.6.2 riz goto err_dmamem_alloc; 308 1.2.6.2 riz } 309 1.2.6.2 riz sc->sc_hdrs = vaddr; 310 1.2.6.2 riz memset(vaddr, 0, allocsize); 311 1.2.6.2 riz p = (intptr_t) vaddr; 312 1.2.6.2 riz p += sizeof(struct virtio_net_hdr) * rxqsize; 313 1.2.6.2 riz #define P(name,size) do { sc->sc_ ##name = (void*) p; \ 314 1.2.6.2 riz p += size; } while (0) 315 1.2.6.2 riz P(tx_hdrs, sizeof(struct virtio_net_hdr) * txqsize); 316 1.2.6.2 riz if (vsc->sc_nvqs == 3) { 317 1.2.6.2 riz P(ctrl_cmd, sizeof(struct virtio_net_ctrl_cmd)); 318 1.2.6.2 riz P(ctrl_status, sizeof(struct virtio_net_ctrl_status)); 319 1.2.6.2 riz P(ctrl_rx, sizeof(struct virtio_net_ctrl_rx)); 320 1.2.6.2 riz P(ctrl_mac_tbl_uc, sizeof(struct virtio_net_ctrl_mac_tbl)); 321 1.2.6.2 riz P(ctrl_mac_tbl_mc, 322 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 323 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES)); 324 1.2.6.2 riz } 325 1.2.6.2 riz #undef P 326 1.2.6.2 riz 327 1.2.6.2 riz allocsize2 = sizeof(bus_dmamap_t) * (rxqsize + txqsize); 328 1.2.6.2 riz allocsize2 += sizeof(bus_dmamap_t) * (rxqsize + txqsize); 329 1.2.6.2 riz allocsize2 += sizeof(struct mbuf*) * (rxqsize + txqsize); 330 1.2.6.2 riz sc->sc_arrays = kmem_zalloc(allocsize2, KM_SLEEP); 331 1.2.6.2 riz if (sc->sc_arrays == NULL) 332 1.2.6.2 riz goto err_dmamem_map; 333 1.2.6.2 riz sc->sc_txhdr_dmamaps = sc->sc_arrays + rxqsize; 334 1.2.6.2 riz sc->sc_rx_dmamaps = sc->sc_txhdr_dmamaps + txqsize; 335 1.2.6.2 riz sc->sc_tx_dmamaps = sc->sc_rx_dmamaps + rxqsize; 336 1.2.6.2 riz sc->sc_rx_mbufs = (void*) (sc->sc_tx_dmamaps + txqsize); 337 1.2.6.2 riz sc->sc_tx_mbufs = sc->sc_rx_mbufs + rxqsize; 338 1.2.6.2 riz 339 1.2.6.2 riz #define C(map, buf, size, nsegs, rw, usage) \ 340 1.2.6.2 riz do { \ 341 1.2.6.2 riz r = bus_dmamap_create(vsc->sc_dmat, size, nsegs, size, 0, \ 342 1.2.6.2 riz BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, \ 343 1.2.6.2 riz &sc->sc_ ##map); \ 344 1.2.6.2 riz if (r != 0) { \ 345 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \ 346 1.2.6.2 riz usage " dmamap creation failed, " \ 347 1.2.6.2 riz "error code %d\n", r); \ 348 1.2.6.2 riz goto err_reqs; \ 349 1.2.6.2 riz } \ 350 1.2.6.2 riz } while (0) 351 1.2.6.2 riz #define C_L1(map, buf, size, nsegs, rw, usage) \ 352 1.2.6.2 riz C(map, buf, size, nsegs, rw, usage); \ 353 1.2.6.2 riz do { \ 354 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ ##map, \ 355 1.2.6.2 riz &sc->sc_ ##buf, size, NULL, \ 356 1.2.6.2 riz BUS_DMA_ ##rw | BUS_DMA_NOWAIT); \ 357 1.2.6.2 riz if (r != 0) { \ 358 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \ 359 1.2.6.2 riz usage " dmamap load failed, " \ 360 1.2.6.2 riz "error code %d\n", r); \ 361 1.2.6.2 riz goto err_reqs; \ 362 1.2.6.2 riz } \ 363 1.2.6.2 riz } while (0) 364 1.2.6.2 riz #define C_L2(map, buf, size, nsegs, rw, usage) \ 365 1.2.6.2 riz C(map, buf, size, nsegs, rw, usage); \ 366 1.2.6.2 riz do { \ 367 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ ##map, \ 368 1.2.6.2 riz sc->sc_ ##buf, size, NULL, \ 369 1.2.6.2 riz BUS_DMA_ ##rw | BUS_DMA_NOWAIT); \ 370 1.2.6.2 riz if (r != 0) { \ 371 1.2.6.2 riz aprint_error_dev(sc->sc_dev, \ 372 1.2.6.2 riz usage " dmamap load failed, " \ 373 1.2.6.2 riz "error code %d\n", r); \ 374 1.2.6.2 riz goto err_reqs; \ 375 1.2.6.2 riz } \ 376 1.2.6.2 riz } while (0) 377 1.2.6.2 riz for (i = 0; i < rxqsize; i++) { 378 1.2.6.2 riz C_L1(rxhdr_dmamaps[i], rx_hdrs[i], 379 1.2.6.2 riz sizeof(struct virtio_net_hdr), 1, 380 1.2.6.2 riz READ, "rx header"); 381 1.2.6.2 riz C(rx_dmamaps[i], NULL, MCLBYTES, 1, 0, "rx payload"); 382 1.2.6.2 riz } 383 1.2.6.2 riz 384 1.2.6.2 riz for (i = 0; i < txqsize; i++) { 385 1.2.6.2 riz C_L1(txhdr_dmamaps[i], rx_hdrs[i], 386 1.2.6.2 riz sizeof(struct virtio_net_hdr), 1, 387 1.2.6.2 riz WRITE, "tx header"); 388 1.2.6.2 riz C(tx_dmamaps[i], NULL, ETHER_MAX_LEN, 256 /* XXX */, 0, 389 1.2.6.2 riz "tx payload"); 390 1.2.6.2 riz } 391 1.2.6.2 riz 392 1.2.6.2 riz if (vsc->sc_nvqs == 3) { 393 1.2.6.2 riz /* control vq class & command */ 394 1.2.6.2 riz C_L2(ctrl_cmd_dmamap, ctrl_cmd, 395 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd), 1, WRITE, 396 1.2.6.2 riz "control command"); 397 1.2.6.2 riz 398 1.2.6.2 riz /* control vq status */ 399 1.2.6.2 riz C_L2(ctrl_status_dmamap, ctrl_status, 400 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status), 1, READ, 401 1.2.6.2 riz "control status"); 402 1.2.6.2 riz 403 1.2.6.2 riz /* control vq rx mode command parameter */ 404 1.2.6.2 riz C_L2(ctrl_rx_dmamap, ctrl_rx, 405 1.2.6.2 riz sizeof(struct virtio_net_ctrl_rx), 1, WRITE, 406 1.2.6.2 riz "rx mode control command"); 407 1.2.6.2 riz 408 1.2.6.2 riz /* control vq MAC filter table for unicast */ 409 1.2.6.2 riz /* do not load now since its length is variable */ 410 1.2.6.2 riz C(ctrl_tbl_uc_dmamap, NULL, 411 1.2.6.2 riz sizeof(struct virtio_net_ctrl_mac_tbl) + 0, 1, WRITE, 412 1.2.6.2 riz "unicast MAC address filter command"); 413 1.2.6.2 riz 414 1.2.6.2 riz /* control vq MAC filter table for multicast */ 415 1.2.6.2 riz C(ctrl_tbl_mc_dmamap, NULL, 416 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 417 1.2.6.2 riz + ETHER_ADDR_LEN * VIRTIO_NET_CTRL_MAC_MAXENTRIES), 418 1.2.6.2 riz 1, WRITE, "multicast MAC address filter command"); 419 1.2.6.2 riz } 420 1.2.6.2 riz #undef C_L2 421 1.2.6.2 riz #undef C_L1 422 1.2.6.2 riz #undef C 423 1.2.6.2 riz 424 1.2.6.2 riz return 0; 425 1.2.6.2 riz 426 1.2.6.2 riz err_reqs: 427 1.2.6.2 riz #define D(map) \ 428 1.2.6.2 riz do { \ 429 1.2.6.2 riz if (sc->sc_ ##map) { \ 430 1.2.6.2 riz bus_dmamap_destroy(vsc->sc_dmat, sc->sc_ ##map); \ 431 1.2.6.2 riz sc->sc_ ##map = NULL; \ 432 1.2.6.2 riz } \ 433 1.2.6.2 riz } while (0) 434 1.2.6.2 riz D(ctrl_tbl_mc_dmamap); 435 1.2.6.2 riz D(ctrl_tbl_uc_dmamap); 436 1.2.6.2 riz D(ctrl_rx_dmamap); 437 1.2.6.2 riz D(ctrl_status_dmamap); 438 1.2.6.2 riz D(ctrl_cmd_dmamap); 439 1.2.6.2 riz for (i = 0; i < txqsize; i++) { 440 1.2.6.2 riz D(tx_dmamaps[i]); 441 1.2.6.2 riz D(txhdr_dmamaps[i]); 442 1.2.6.2 riz } 443 1.2.6.2 riz for (i = 0; i < rxqsize; i++) { 444 1.2.6.2 riz D(rx_dmamaps[i]); 445 1.2.6.2 riz D(rxhdr_dmamaps[i]); 446 1.2.6.2 riz } 447 1.2.6.2 riz #undef D 448 1.2.6.2 riz if (sc->sc_arrays) { 449 1.2.6.2 riz kmem_free(sc->sc_arrays, allocsize2); 450 1.2.6.2 riz sc->sc_arrays = 0; 451 1.2.6.2 riz } 452 1.2.6.2 riz err_dmamem_map: 453 1.2.6.2 riz bus_dmamem_unmap(vsc->sc_dmat, sc->sc_hdrs, allocsize); 454 1.2.6.2 riz err_dmamem_alloc: 455 1.2.6.2 riz bus_dmamem_free(vsc->sc_dmat, &sc->sc_hdr_segs[0], 1); 456 1.2.6.2 riz err_none: 457 1.2.6.2 riz return -1; 458 1.2.6.2 riz } 459 1.2.6.2 riz 460 1.2.6.2 riz static void 461 1.2.6.2 riz vioif_attach(device_t parent, device_t self, void *aux) 462 1.2.6.2 riz { 463 1.2.6.2 riz struct vioif_softc *sc = device_private(self); 464 1.2.6.2 riz struct virtio_softc *vsc = device_private(parent); 465 1.2.6.2 riz uint32_t features; 466 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if; 467 1.2.6.2 riz 468 1.2.6.2 riz if (vsc->sc_child != NULL) { 469 1.2.6.2 riz aprint_normal(": child already attached for %s; " 470 1.2.6.2 riz "something wrong...\n", 471 1.2.6.2 riz device_xname(parent)); 472 1.2.6.2 riz return; 473 1.2.6.2 riz } 474 1.2.6.2 riz 475 1.2.6.2 riz sc->sc_dev = self; 476 1.2.6.2 riz sc->sc_virtio = vsc; 477 1.2.6.2 riz 478 1.2.6.2 riz vsc->sc_child = self; 479 1.2.6.2 riz vsc->sc_ipl = IPL_NET; 480 1.2.6.2 riz vsc->sc_vqs = &sc->sc_vq[0]; 481 1.2.6.2 riz vsc->sc_config_change = 0; 482 1.2.6.2 riz vsc->sc_intrhand = virtio_vq_intr; 483 1.2.6.2 riz 484 1.2.6.2 riz features = virtio_negotiate_features(vsc, 485 1.2.6.2 riz (VIRTIO_NET_F_MAC | 486 1.2.6.2 riz VIRTIO_NET_F_STATUS | 487 1.2.6.2 riz VIRTIO_NET_F_CTRL_VQ | 488 1.2.6.2 riz VIRTIO_NET_F_CTRL_RX | 489 1.2.6.2 riz VIRTIO_F_NOTIFY_ON_EMPTY)); 490 1.2.6.2 riz if (features & VIRTIO_NET_F_MAC) { 491 1.2.6.2 riz sc->sc_mac[0] = virtio_read_device_config_1(vsc, 492 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+0); 493 1.2.6.2 riz sc->sc_mac[1] = virtio_read_device_config_1(vsc, 494 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+1); 495 1.2.6.2 riz sc->sc_mac[2] = virtio_read_device_config_1(vsc, 496 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+2); 497 1.2.6.2 riz sc->sc_mac[3] = virtio_read_device_config_1(vsc, 498 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+3); 499 1.2.6.2 riz sc->sc_mac[4] = virtio_read_device_config_1(vsc, 500 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+4); 501 1.2.6.2 riz sc->sc_mac[5] = virtio_read_device_config_1(vsc, 502 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+5); 503 1.2.6.2 riz } else { 504 1.2.6.2 riz /* code stolen from sys/net/if_tap.c */ 505 1.2.6.2 riz struct timeval tv; 506 1.2.6.2 riz uint32_t ui; 507 1.2.6.2 riz getmicrouptime(&tv); 508 1.2.6.2 riz ui = (tv.tv_sec ^ tv.tv_usec) & 0xffffff; 509 1.2.6.2 riz memcpy(sc->sc_mac+3, (uint8_t *)&ui, 3); 510 1.2.6.2 riz virtio_write_device_config_1(vsc, 511 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+0, 512 1.2.6.2 riz sc->sc_mac[0]); 513 1.2.6.2 riz virtio_write_device_config_1(vsc, 514 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+1, 515 1.2.6.2 riz sc->sc_mac[1]); 516 1.2.6.2 riz virtio_write_device_config_1(vsc, 517 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+2, 518 1.2.6.2 riz sc->sc_mac[2]); 519 1.2.6.2 riz virtio_write_device_config_1(vsc, 520 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+3, 521 1.2.6.2 riz sc->sc_mac[3]); 522 1.2.6.2 riz virtio_write_device_config_1(vsc, 523 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+4, 524 1.2.6.2 riz sc->sc_mac[4]); 525 1.2.6.2 riz virtio_write_device_config_1(vsc, 526 1.2.6.2 riz VIRTIO_NET_CONFIG_MAC+5, 527 1.2.6.2 riz sc->sc_mac[5]); 528 1.2.6.2 riz } 529 1.2.6.2 riz aprint_normal(": Ethernet address %s\n", ether_sprintf(sc->sc_mac)); 530 1.2.6.2 riz aprint_naive("\n"); 531 1.2.6.2 riz 532 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[0], 0, 533 1.2.6.2 riz MCLBYTES+sizeof(struct virtio_net_hdr), 2, 534 1.2.6.2 riz "rx") != 0) { 535 1.2.6.2 riz goto err; 536 1.2.6.2 riz } 537 1.2.6.2 riz vsc->sc_nvqs = 1; 538 1.2.6.2 riz sc->sc_vq[0].vq_done = vioif_rx_vq_done; 539 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[1], 1, 540 1.2.6.2 riz (sizeof(struct virtio_net_hdr) 541 1.2.6.2 riz + (ETHER_MAX_LEN - ETHER_HDR_LEN)), 542 1.2.6.2 riz VIRTIO_NET_TX_MAXNSEGS + 1, 543 1.2.6.2 riz "tx") != 0) { 544 1.2.6.2 riz goto err; 545 1.2.6.2 riz } 546 1.2.6.2 riz vsc->sc_nvqs = 2; 547 1.2.6.2 riz sc->sc_vq[1].vq_done = vioif_tx_vq_done; 548 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[0]); 549 1.2.6.2 riz virtio_stop_vq_intr(vsc, &sc->sc_vq[1]); /* not urgent; do it later */ 550 1.2.6.2 riz if ((features & VIRTIO_NET_F_CTRL_VQ) 551 1.2.6.2 riz && (features & VIRTIO_NET_F_CTRL_RX)) { 552 1.2.6.2 riz if (virtio_alloc_vq(vsc, &sc->sc_vq[2], 2, 553 1.2.6.2 riz NBPG, 1, "control") == 0) { 554 1.2.6.2 riz sc->sc_vq[2].vq_done = vioif_ctrl_vq_done; 555 1.2.6.2 riz cv_init(&sc->sc_ctrl_wait, "ctrl_vq"); 556 1.2.6.2 riz mutex_init(&sc->sc_ctrl_wait_lock, 557 1.2.6.2 riz MUTEX_DEFAULT, IPL_NET); 558 1.2.6.2 riz sc->sc_ctrl_inuse = FREE; 559 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[2]); 560 1.2.6.2 riz vsc->sc_nvqs = 3; 561 1.2.6.2 riz } 562 1.2.6.2 riz } 563 1.2.6.2 riz 564 1.2.6.2 riz sc->sc_rx_softint = softint_establish(SOFTINT_NET|SOFTINT_MPSAFE, 565 1.2.6.2 riz vioif_rx_softint, sc); 566 1.2.6.2 riz if (sc->sc_rx_softint == NULL) { 567 1.2.6.2 riz aprint_error_dev(self, "cannot establish softint\n"); 568 1.2.6.2 riz goto err; 569 1.2.6.2 riz } 570 1.2.6.2 riz 571 1.2.6.2 riz if (vioif_alloc_mems(sc) < 0) 572 1.2.6.2 riz goto err; 573 1.2.6.2 riz if (vsc->sc_nvqs == 3) 574 1.2.6.2 riz config_interrupts(self, vioif_deferred_init); 575 1.2.6.2 riz 576 1.2.6.2 riz strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); 577 1.2.6.2 riz ifp->if_softc = sc; 578 1.2.6.2 riz ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 579 1.2.6.2 riz ifp->if_start = vioif_start; 580 1.2.6.2 riz ifp->if_ioctl = vioif_ioctl; 581 1.2.6.2 riz ifp->if_init = vioif_init; 582 1.2.6.2 riz ifp->if_stop = vioif_stop; 583 1.2.6.2 riz ifp->if_capabilities = 0; 584 1.2.6.2 riz ifp->if_watchdog = vioif_watchdog; 585 1.2.6.2 riz 586 1.2.6.2 riz if_attach(ifp); 587 1.2.6.2 riz ether_ifattach(ifp, sc->sc_mac); 588 1.2.6.2 riz 589 1.2.6.2 riz return; 590 1.2.6.2 riz 591 1.2.6.2 riz err: 592 1.2.6.2 riz if (vsc->sc_nvqs == 3) { 593 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[2]); 594 1.2.6.2 riz cv_destroy(&sc->sc_ctrl_wait); 595 1.2.6.2 riz mutex_destroy(&sc->sc_ctrl_wait_lock); 596 1.2.6.2 riz vsc->sc_nvqs = 2; 597 1.2.6.2 riz } 598 1.2.6.2 riz if (vsc->sc_nvqs == 2) { 599 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[1]); 600 1.2.6.2 riz vsc->sc_nvqs = 1; 601 1.2.6.2 riz } 602 1.2.6.2 riz if (vsc->sc_nvqs == 1) { 603 1.2.6.2 riz virtio_free_vq(vsc, &sc->sc_vq[0]); 604 1.2.6.2 riz vsc->sc_nvqs = 0; 605 1.2.6.2 riz } 606 1.2.6.2 riz vsc->sc_child = (void*)1; 607 1.2.6.2 riz return; 608 1.2.6.2 riz } 609 1.2.6.2 riz 610 1.2.6.2 riz /* we need interrupts to make promiscuous mode off */ 611 1.2.6.2 riz static void 612 1.2.6.2 riz vioif_deferred_init(device_t self) 613 1.2.6.2 riz { 614 1.2.6.2 riz struct vioif_softc *sc = device_private(self); 615 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if; 616 1.2.6.2 riz int r; 617 1.2.6.2 riz 618 1.2.6.2 riz r = vioif_set_promisc(sc, false); 619 1.2.6.2 riz if (r != 0) 620 1.2.6.2 riz aprint_error_dev(self, "resetting promisc mode failed, " 621 1.2.6.2 riz "errror code %d\n", r); 622 1.2.6.2 riz else 623 1.2.6.2 riz ifp->if_flags &= ~IFF_PROMISC; 624 1.2.6.2 riz } 625 1.2.6.2 riz 626 1.2.6.2 riz /* 627 1.2.6.2 riz * Interface functions for ifnet 628 1.2.6.2 riz */ 629 1.2.6.2 riz static int 630 1.2.6.2 riz vioif_init(struct ifnet *ifp) 631 1.2.6.2 riz { 632 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc; 633 1.2.6.2 riz 634 1.2.6.2 riz vioif_stop(ifp, 0); 635 1.2.6.2 riz vioif_populate_rx_mbufs(sc); 636 1.2.6.2 riz vioif_updown(sc, true); 637 1.2.6.2 riz ifp->if_flags |= IFF_RUNNING; 638 1.2.6.2 riz ifp->if_flags &= ~IFF_OACTIVE; 639 1.2.6.2 riz vioif_rx_filter(sc); 640 1.2.6.2 riz 641 1.2.6.2 riz return 0; 642 1.2.6.2 riz } 643 1.2.6.2 riz 644 1.2.6.2 riz static void 645 1.2.6.2 riz vioif_stop(struct ifnet *ifp, int disable) 646 1.2.6.2 riz { 647 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc; 648 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 649 1.2.6.2 riz 650 1.2.6.2 riz /* only way to stop I/O and DMA is resetting... */ 651 1.2.6.2 riz virtio_reset(vsc); 652 1.2.6.2 riz vioif_rx_deq(sc); 653 1.2.6.2 riz vioif_tx_drain(sc); 654 1.2.6.2 riz ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 655 1.2.6.2 riz 656 1.2.6.2 riz if (disable) 657 1.2.6.2 riz vioif_rx_drain(sc); 658 1.2.6.2 riz 659 1.2.6.2 riz virtio_reinit_start(vsc); 660 1.2.6.3 msaitoh virtio_negotiate_features(vsc, vsc->sc_features); 661 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[0]); 662 1.2.6.2 riz virtio_stop_vq_intr(vsc, &sc->sc_vq[1]); 663 1.2.6.2 riz if (vsc->sc_nvqs >= 3) 664 1.2.6.2 riz virtio_start_vq_intr(vsc, &sc->sc_vq[2]); 665 1.2.6.2 riz virtio_reinit_end(vsc); 666 1.2.6.2 riz vioif_updown(sc, false); 667 1.2.6.2 riz } 668 1.2.6.2 riz 669 1.2.6.2 riz static void 670 1.2.6.2 riz vioif_start(struct ifnet *ifp) 671 1.2.6.2 riz { 672 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc; 673 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 674 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[1]; /* tx vq */ 675 1.2.6.2 riz struct mbuf *m; 676 1.2.6.2 riz int queued = 0, retry = 0; 677 1.2.6.2 riz 678 1.2.6.2 riz if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 679 1.2.6.2 riz return; 680 1.2.6.2 riz 681 1.2.6.2 riz for (;;) { 682 1.2.6.2 riz int slot, r; 683 1.2.6.2 riz 684 1.2.6.2 riz IFQ_POLL(&ifp->if_snd, m); 685 1.2.6.2 riz if (m == NULL) 686 1.2.6.2 riz break; 687 1.2.6.2 riz 688 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot); 689 1.2.6.2 riz if (r == EAGAIN) { 690 1.2.6.2 riz ifp->if_flags |= IFF_OACTIVE; 691 1.2.6.2 riz vioif_tx_vq_done(vq); 692 1.2.6.2 riz if (retry++ == 0) 693 1.2.6.2 riz continue; 694 1.2.6.2 riz else 695 1.2.6.2 riz break; 696 1.2.6.2 riz } 697 1.2.6.2 riz if (r != 0) 698 1.2.6.2 riz panic("enqueue_prep for a tx buffer"); 699 1.2.6.2 riz r = bus_dmamap_load_mbuf(vsc->sc_dmat, 700 1.2.6.2 riz sc->sc_tx_dmamaps[slot], 701 1.2.6.2 riz m, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 702 1.2.6.2 riz if (r != 0) { 703 1.2.6.2 riz virtio_enqueue_abort(vsc, vq, slot); 704 1.2.6.2 riz printf("%s: tx dmamap load failed, error code %d\n", 705 1.2.6.2 riz device_xname(sc->sc_dev), r); 706 1.2.6.2 riz break; 707 1.2.6.2 riz } 708 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 709 1.2.6.2 riz sc->sc_tx_dmamaps[slot]->dm_nsegs + 1); 710 1.2.6.2 riz if (r != 0) { 711 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, 712 1.2.6.2 riz sc->sc_tx_dmamaps[slot]); 713 1.2.6.2 riz ifp->if_flags |= IFF_OACTIVE; 714 1.2.6.2 riz vioif_tx_vq_done(vq); 715 1.2.6.2 riz if (retry++ == 0) 716 1.2.6.2 riz continue; 717 1.2.6.2 riz else 718 1.2.6.2 riz break; 719 1.2.6.2 riz } 720 1.2.6.2 riz IFQ_DEQUEUE(&ifp->if_snd, m); 721 1.2.6.2 riz sc->sc_tx_mbufs[slot] = m; 722 1.2.6.2 riz 723 1.2.6.2 riz memset(&sc->sc_tx_hdrs[slot], 0, sizeof(struct virtio_net_hdr)); 724 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_tx_dmamaps[slot], 725 1.2.6.2 riz 0, sc->sc_tx_dmamaps[slot]->dm_mapsize, 726 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 727 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_txhdr_dmamaps[slot], 728 1.2.6.2 riz 0, sc->sc_txhdr_dmamaps[slot]->dm_mapsize, 729 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 730 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_txhdr_dmamaps[slot], true); 731 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_tx_dmamaps[slot], true); 732 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, false); 733 1.2.6.2 riz queued++; 734 1.2.6.2 riz #if NBPFILTER > 0 735 1.2.6.2 riz if (ifp->if_bpf) 736 1.2.6.2 riz bpf_mtap(ifp->if_bpf, m); 737 1.2.6.2 riz #endif 738 1.2.6.2 riz } 739 1.2.6.2 riz 740 1.2.6.2 riz if (queued > 0) { 741 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, -1, true); 742 1.2.6.2 riz ifp->if_timer = 5; 743 1.2.6.2 riz } 744 1.2.6.2 riz } 745 1.2.6.2 riz 746 1.2.6.2 riz static int 747 1.2.6.2 riz vioif_ioctl(struct ifnet *ifp, u_long cmd, void *data) 748 1.2.6.2 riz { 749 1.2.6.2 riz int s, r; 750 1.2.6.2 riz 751 1.2.6.2 riz s = splnet(); 752 1.2.6.2 riz 753 1.2.6.2 riz r = ether_ioctl(ifp, cmd, data); 754 1.2.6.2 riz if ((r == 0 && cmd == SIOCSIFFLAGS) || 755 1.2.6.2 riz (r == ENETRESET && (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI))) { 756 1.2.6.2 riz if (ifp->if_flags & IFF_RUNNING) 757 1.2.6.2 riz r = vioif_rx_filter(ifp->if_softc); 758 1.2.6.2 riz else 759 1.2.6.2 riz r = 0; 760 1.2.6.2 riz } 761 1.2.6.2 riz 762 1.2.6.2 riz splx(s); 763 1.2.6.2 riz 764 1.2.6.2 riz return r; 765 1.2.6.2 riz } 766 1.2.6.2 riz 767 1.2.6.2 riz void 768 1.2.6.2 riz vioif_watchdog(struct ifnet *ifp) 769 1.2.6.2 riz { 770 1.2.6.2 riz struct vioif_softc *sc = ifp->if_softc; 771 1.2.6.2 riz 772 1.2.6.2 riz if (ifp->if_flags & IFF_RUNNING) 773 1.2.6.2 riz vioif_tx_vq_done(&sc->sc_vq[1]); 774 1.2.6.2 riz } 775 1.2.6.2 riz 776 1.2.6.2 riz 777 1.2.6.2 riz /* 778 1.2.6.2 riz * Recieve implementation 779 1.2.6.2 riz */ 780 1.2.6.2 riz /* allocate and initialize a mbuf for recieve */ 781 1.2.6.2 riz static int 782 1.2.6.2 riz vioif_add_rx_mbuf(struct vioif_softc *sc, int i) 783 1.2.6.2 riz { 784 1.2.6.2 riz struct mbuf *m; 785 1.2.6.2 riz int r; 786 1.2.6.2 riz 787 1.2.6.2 riz MGETHDR(m, M_DONTWAIT, MT_DATA); 788 1.2.6.2 riz if (m == NULL) 789 1.2.6.2 riz return ENOBUFS; 790 1.2.6.2 riz MCLGET(m, M_DONTWAIT); 791 1.2.6.2 riz if ((m->m_flags & M_EXT) == 0) { 792 1.2.6.2 riz m_freem(m); 793 1.2.6.2 riz return ENOBUFS; 794 1.2.6.2 riz } 795 1.2.6.2 riz sc->sc_rx_mbufs[i] = m; 796 1.2.6.2 riz m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 797 1.2.6.2 riz r = bus_dmamap_load_mbuf(sc->sc_virtio->sc_dmat, 798 1.2.6.2 riz sc->sc_rx_dmamaps[i], 799 1.2.6.2 riz m, BUS_DMA_READ|BUS_DMA_NOWAIT); 800 1.2.6.2 riz if (r) { 801 1.2.6.2 riz m_freem(m); 802 1.2.6.2 riz sc->sc_rx_mbufs[i] = 0; 803 1.2.6.2 riz return r; 804 1.2.6.2 riz } 805 1.2.6.2 riz 806 1.2.6.2 riz return 0; 807 1.2.6.2 riz } 808 1.2.6.2 riz 809 1.2.6.2 riz /* free a mbuf for recieve */ 810 1.2.6.2 riz static void 811 1.2.6.2 riz vioif_free_rx_mbuf(struct vioif_softc *sc, int i) 812 1.2.6.2 riz { 813 1.2.6.2 riz bus_dmamap_unload(sc->sc_virtio->sc_dmat, sc->sc_rx_dmamaps[i]); 814 1.2.6.2 riz m_freem(sc->sc_rx_mbufs[i]); 815 1.2.6.2 riz sc->sc_rx_mbufs[i] = NULL; 816 1.2.6.2 riz } 817 1.2.6.2 riz 818 1.2.6.2 riz /* add mbufs for all the empty recieve slots */ 819 1.2.6.2 riz static void 820 1.2.6.2 riz vioif_populate_rx_mbufs(struct vioif_softc *sc) 821 1.2.6.2 riz { 822 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 823 1.2.6.2 riz int i, r, ndone = 0; 824 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0]; /* rx vq */ 825 1.2.6.2 riz 826 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) { 827 1.2.6.2 riz int slot; 828 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot); 829 1.2.6.2 riz if (r == EAGAIN) 830 1.2.6.2 riz break; 831 1.2.6.2 riz if (r != 0) 832 1.2.6.2 riz panic("enqueue_prep for rx buffers"); 833 1.2.6.2 riz if (sc->sc_rx_mbufs[slot] == NULL) { 834 1.2.6.2 riz r = vioif_add_rx_mbuf(sc, slot); 835 1.2.6.2 riz if (r != 0) { 836 1.2.6.2 riz printf("%s: rx mbuf allocation failed, " 837 1.2.6.2 riz "error code %d\n", 838 1.2.6.2 riz device_xname(sc->sc_dev), r); 839 1.2.6.2 riz break; 840 1.2.6.2 riz } 841 1.2.6.2 riz } 842 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 843 1.2.6.2 riz sc->sc_rx_dmamaps[slot]->dm_nsegs + 1); 844 1.2.6.2 riz if (r != 0) { 845 1.2.6.2 riz vioif_free_rx_mbuf(sc, slot); 846 1.2.6.2 riz break; 847 1.2.6.2 riz } 848 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rxhdr_dmamaps[slot], 849 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr), BUS_DMASYNC_PREREAD); 850 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rx_dmamaps[slot], 851 1.2.6.2 riz 0, MCLBYTES, BUS_DMASYNC_PREREAD); 852 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_rxhdr_dmamaps[slot], false); 853 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_rx_dmamaps[slot], false); 854 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, false); 855 1.2.6.2 riz ndone++; 856 1.2.6.2 riz } 857 1.2.6.2 riz if (ndone > 0) 858 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, -1, true); 859 1.2.6.2 riz } 860 1.2.6.2 riz 861 1.2.6.2 riz /* dequeue recieved packets */ 862 1.2.6.2 riz static int 863 1.2.6.2 riz vioif_rx_deq(struct vioif_softc *sc) 864 1.2.6.2 riz { 865 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 866 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0]; 867 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if; 868 1.2.6.2 riz struct mbuf *m; 869 1.2.6.2 riz int r = 0; 870 1.2.6.2 riz int slot, len; 871 1.2.6.2 riz 872 1.2.6.2 riz while (virtio_dequeue(vsc, vq, &slot, &len) == 0) { 873 1.2.6.2 riz len -= sizeof(struct virtio_net_hdr); 874 1.2.6.2 riz r = 1; 875 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rxhdr_dmamaps[slot], 876 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr), 877 1.2.6.2 riz BUS_DMASYNC_POSTREAD); 878 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_rx_dmamaps[slot], 879 1.2.6.2 riz 0, MCLBYTES, 880 1.2.6.2 riz BUS_DMASYNC_POSTREAD); 881 1.2.6.2 riz m = sc->sc_rx_mbufs[slot]; 882 1.2.6.2 riz KASSERT(m != NULL); 883 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_rx_dmamaps[slot]); 884 1.2.6.2 riz sc->sc_rx_mbufs[slot] = 0; 885 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot); 886 1.2.6.2 riz m->m_pkthdr.rcvif = ifp; 887 1.2.6.2 riz m->m_len = m->m_pkthdr.len = len; 888 1.2.6.2 riz ifp->if_ipackets++; 889 1.2.6.2 riz #if NBPFILTER > 0 890 1.2.6.2 riz if (ifp->if_bpf) 891 1.2.6.2 riz bpf_mtap(ifp->if_bpf, m); 892 1.2.6.2 riz #endif 893 1.2.6.2 riz (*ifp->if_input)(ifp, m); 894 1.2.6.2 riz } 895 1.2.6.2 riz 896 1.2.6.2 riz return r; 897 1.2.6.2 riz } 898 1.2.6.2 riz 899 1.2.6.2 riz /* rx interrupt; call _dequeue above and schedule a softint */ 900 1.2.6.2 riz static int 901 1.2.6.2 riz vioif_rx_vq_done(struct virtqueue *vq) 902 1.2.6.2 riz { 903 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner; 904 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child); 905 1.2.6.2 riz int r; 906 1.2.6.2 riz 907 1.2.6.2 riz r = vioif_rx_deq(sc); 908 1.2.6.2 riz if (r) 909 1.2.6.2 riz softint_schedule(sc->sc_rx_softint); 910 1.2.6.2 riz 911 1.2.6.2 riz return r; 912 1.2.6.2 riz } 913 1.2.6.2 riz 914 1.2.6.2 riz /* softint: enqueue recieve requests for new incoming packets */ 915 1.2.6.2 riz static void 916 1.2.6.2 riz vioif_rx_softint(void *arg) 917 1.2.6.2 riz { 918 1.2.6.2 riz struct vioif_softc *sc = arg; 919 1.2.6.2 riz 920 1.2.6.2 riz vioif_populate_rx_mbufs(sc); 921 1.2.6.2 riz } 922 1.2.6.2 riz 923 1.2.6.2 riz /* free all the mbufs; called from if_stop(disable) */ 924 1.2.6.2 riz static void 925 1.2.6.2 riz vioif_rx_drain(struct vioif_softc *sc) 926 1.2.6.2 riz { 927 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[0]; 928 1.2.6.2 riz int i; 929 1.2.6.2 riz 930 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) { 931 1.2.6.2 riz if (sc->sc_rx_mbufs[i] == NULL) 932 1.2.6.2 riz continue; 933 1.2.6.2 riz vioif_free_rx_mbuf(sc, i); 934 1.2.6.2 riz } 935 1.2.6.2 riz } 936 1.2.6.2 riz 937 1.2.6.2 riz 938 1.2.6.2 riz /* 939 1.2.6.2 riz * Transmition implementation 940 1.2.6.2 riz */ 941 1.2.6.2 riz /* actual transmission is done in if_start */ 942 1.2.6.2 riz /* tx interrupt; dequeue and free mbufs */ 943 1.2.6.2 riz /* 944 1.2.6.2 riz * tx interrupt is actually disabled; this should be called upon 945 1.2.6.2 riz * tx vq full and watchdog 946 1.2.6.2 riz */ 947 1.2.6.2 riz static int 948 1.2.6.2 riz vioif_tx_vq_done(struct virtqueue *vq) 949 1.2.6.2 riz { 950 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner; 951 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child); 952 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if; 953 1.2.6.2 riz struct mbuf *m; 954 1.2.6.2 riz int r = 0; 955 1.2.6.2 riz int slot, len; 956 1.2.6.2 riz 957 1.2.6.2 riz while (virtio_dequeue(vsc, vq, &slot, &len) == 0) { 958 1.2.6.2 riz r++; 959 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_txhdr_dmamaps[slot], 960 1.2.6.2 riz 0, sizeof(struct virtio_net_hdr), 961 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 962 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_tx_dmamaps[slot], 963 1.2.6.2 riz 0, sc->sc_tx_dmamaps[slot]->dm_mapsize, 964 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 965 1.2.6.2 riz m = sc->sc_tx_mbufs[slot]; 966 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_tx_dmamaps[slot]); 967 1.2.6.2 riz sc->sc_tx_mbufs[slot] = 0; 968 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot); 969 1.2.6.2 riz ifp->if_opackets++; 970 1.2.6.2 riz m_freem(m); 971 1.2.6.2 riz } 972 1.2.6.2 riz 973 1.2.6.2 riz if (r) 974 1.2.6.2 riz ifp->if_flags &= ~IFF_OACTIVE; 975 1.2.6.2 riz return r; 976 1.2.6.2 riz } 977 1.2.6.2 riz 978 1.2.6.2 riz /* free all the mbufs already put on vq; called from if_stop(disable) */ 979 1.2.6.2 riz static void 980 1.2.6.2 riz vioif_tx_drain(struct vioif_softc *sc) 981 1.2.6.2 riz { 982 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 983 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[1]; 984 1.2.6.2 riz int i; 985 1.2.6.2 riz 986 1.2.6.2 riz for (i = 0; i < vq->vq_num; i++) { 987 1.2.6.2 riz if (sc->sc_tx_mbufs[i] == NULL) 988 1.2.6.2 riz continue; 989 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_tx_dmamaps[i]); 990 1.2.6.2 riz m_freem(sc->sc_tx_mbufs[i]); 991 1.2.6.2 riz sc->sc_tx_mbufs[i] = NULL; 992 1.2.6.2 riz } 993 1.2.6.2 riz } 994 1.2.6.2 riz 995 1.2.6.2 riz /* 996 1.2.6.2 riz * Control vq 997 1.2.6.2 riz */ 998 1.2.6.2 riz /* issue a VIRTIO_NET_CTRL_RX class command and wait for completion */ 999 1.2.6.2 riz static int 1000 1.2.6.2 riz vioif_ctrl_rx(struct vioif_softc *sc, int cmd, bool onoff) 1001 1.2.6.2 riz { 1002 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 1003 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[2]; 1004 1.2.6.2 riz int r, slot; 1005 1.2.6.2 riz 1006 1.2.6.2 riz if (vsc->sc_nvqs < 3) 1007 1.2.6.2 riz return ENOTSUP; 1008 1.2.6.2 riz 1009 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1010 1.2.6.2 riz while (sc->sc_ctrl_inuse != FREE) 1011 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock); 1012 1.2.6.2 riz sc->sc_ctrl_inuse = INUSE; 1013 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1014 1.2.6.2 riz 1015 1.2.6.2 riz sc->sc_ctrl_cmd->class = VIRTIO_NET_CTRL_RX; 1016 1.2.6.2 riz sc->sc_ctrl_cmd->command = cmd; 1017 1.2.6.2 riz sc->sc_ctrl_rx->onoff = onoff; 1018 1.2.6.2 riz 1019 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 1020 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_cmd), 1021 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 1022 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_rx_dmamap, 1023 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_rx), 1024 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 1025 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 1026 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_status), 1027 1.2.6.2 riz BUS_DMASYNC_PREREAD); 1028 1.2.6.2 riz 1029 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot); 1030 1.2.6.2 riz if (r != 0) 1031 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev)); 1032 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 3); 1033 1.2.6.2 riz if (r != 0) 1034 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev)); 1035 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_cmd_dmamap, true); 1036 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_rx_dmamap, true); 1037 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_status_dmamap, false); 1038 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, true); 1039 1.2.6.2 riz 1040 1.2.6.2 riz /* wait for done */ 1041 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1042 1.2.6.2 riz while (sc->sc_ctrl_inuse != DONE) 1043 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock); 1044 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1045 1.2.6.2 riz /* already dequeueued */ 1046 1.2.6.2 riz 1047 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 0, 1048 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd), 1049 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 1050 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_rx_dmamap, 0, 1051 1.2.6.2 riz sizeof(struct virtio_net_ctrl_rx), 1052 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 1053 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 0, 1054 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status), 1055 1.2.6.2 riz BUS_DMASYNC_POSTREAD); 1056 1.2.6.2 riz 1057 1.2.6.2 riz if (sc->sc_ctrl_status->ack == VIRTIO_NET_OK) 1058 1.2.6.2 riz r = 0; 1059 1.2.6.2 riz else { 1060 1.2.6.2 riz printf("%s: failed setting rx mode\n", 1061 1.2.6.2 riz device_xname(sc->sc_dev)); 1062 1.2.6.2 riz r = EIO; 1063 1.2.6.2 riz } 1064 1.2.6.2 riz 1065 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1066 1.2.6.2 riz sc->sc_ctrl_inuse = FREE; 1067 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait); 1068 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1069 1.2.6.2 riz 1070 1.2.6.2 riz return r; 1071 1.2.6.2 riz } 1072 1.2.6.2 riz 1073 1.2.6.2 riz static int 1074 1.2.6.2 riz vioif_set_promisc(struct vioif_softc *sc, bool onoff) 1075 1.2.6.2 riz { 1076 1.2.6.2 riz int r; 1077 1.2.6.2 riz 1078 1.2.6.2 riz r = vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_PROMISC, onoff); 1079 1.2.6.2 riz 1080 1.2.6.2 riz return r; 1081 1.2.6.2 riz } 1082 1.2.6.2 riz 1083 1.2.6.2 riz static int 1084 1.2.6.2 riz vioif_set_allmulti(struct vioif_softc *sc, bool onoff) 1085 1.2.6.2 riz { 1086 1.2.6.2 riz int r; 1087 1.2.6.2 riz 1088 1.2.6.2 riz r = vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_ALLMULTI, onoff); 1089 1.2.6.2 riz 1090 1.2.6.2 riz return r; 1091 1.2.6.2 riz } 1092 1.2.6.2 riz 1093 1.2.6.2 riz /* issue VIRTIO_NET_CTRL_MAC_TABLE_SET command and wait for completion */ 1094 1.2.6.2 riz static int 1095 1.2.6.2 riz vioif_set_rx_filter(struct vioif_softc *sc) 1096 1.2.6.2 riz { 1097 1.2.6.2 riz /* filter already set in sc_ctrl_mac_tbl */ 1098 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 1099 1.2.6.2 riz struct virtqueue *vq = &sc->sc_vq[2]; 1100 1.2.6.2 riz int r, slot; 1101 1.2.6.2 riz 1102 1.2.6.2 riz if (vsc->sc_nvqs < 3) 1103 1.2.6.2 riz return ENOTSUP; 1104 1.2.6.2 riz 1105 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1106 1.2.6.2 riz while (sc->sc_ctrl_inuse != FREE) 1107 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock); 1108 1.2.6.2 riz sc->sc_ctrl_inuse = INUSE; 1109 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1110 1.2.6.2 riz 1111 1.2.6.2 riz sc->sc_ctrl_cmd->class = VIRTIO_NET_CTRL_MAC; 1112 1.2.6.2 riz sc->sc_ctrl_cmd->command = VIRTIO_NET_CTRL_MAC_TABLE_SET; 1113 1.2.6.2 riz 1114 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap, 1115 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc, 1116 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1117 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries), 1118 1.2.6.2 riz NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 1119 1.2.6.2 riz if (r) { 1120 1.2.6.2 riz printf("%s: control command dmamap load failed, " 1121 1.2.6.2 riz "error code %d\n", device_xname(sc->sc_dev), r); 1122 1.2.6.2 riz goto out; 1123 1.2.6.2 riz } 1124 1.2.6.2 riz r = bus_dmamap_load(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap, 1125 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc, 1126 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1127 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries), 1128 1.2.6.2 riz NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 1129 1.2.6.2 riz if (r) { 1130 1.2.6.2 riz printf("%s: control command dmamap load failed, " 1131 1.2.6.2 riz "error code %d\n", device_xname(sc->sc_dev), r); 1132 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap); 1133 1.2.6.2 riz goto out; 1134 1.2.6.2 riz } 1135 1.2.6.2 riz 1136 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 1137 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_cmd), 1138 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 1139 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap, 0, 1140 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1141 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries), 1142 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 1143 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap, 0, 1144 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1145 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries), 1146 1.2.6.2 riz BUS_DMASYNC_PREWRITE); 1147 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 1148 1.2.6.2 riz 0, sizeof(struct virtio_net_ctrl_status), 1149 1.2.6.2 riz BUS_DMASYNC_PREREAD); 1150 1.2.6.2 riz 1151 1.2.6.2 riz r = virtio_enqueue_prep(vsc, vq, &slot); 1152 1.2.6.2 riz if (r != 0) 1153 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev)); 1154 1.2.6.2 riz r = virtio_enqueue_reserve(vsc, vq, slot, 4); 1155 1.2.6.2 riz if (r != 0) 1156 1.2.6.2 riz panic("%s: control vq busy!?", device_xname(sc->sc_dev)); 1157 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_cmd_dmamap, true); 1158 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_tbl_uc_dmamap, true); 1159 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_tbl_mc_dmamap, true); 1160 1.2.6.2 riz virtio_enqueue(vsc, vq, slot, sc->sc_ctrl_status_dmamap, false); 1161 1.2.6.2 riz virtio_enqueue_commit(vsc, vq, slot, true); 1162 1.2.6.2 riz 1163 1.2.6.2 riz /* wait for done */ 1164 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1165 1.2.6.2 riz while (sc->sc_ctrl_inuse != DONE) 1166 1.2.6.2 riz cv_wait(&sc->sc_ctrl_wait, &sc->sc_ctrl_wait_lock); 1167 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1168 1.2.6.2 riz /* already dequeueued */ 1169 1.2.6.2 riz 1170 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_cmd_dmamap, 0, 1171 1.2.6.2 riz sizeof(struct virtio_net_ctrl_cmd), 1172 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 1173 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap, 0, 1174 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1175 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_uc->nentries), 1176 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 1177 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap, 0, 1178 1.2.6.2 riz (sizeof(struct virtio_net_ctrl_mac_tbl) 1179 1.2.6.2 riz + ETHER_ADDR_LEN * sc->sc_ctrl_mac_tbl_mc->nentries), 1180 1.2.6.2 riz BUS_DMASYNC_POSTWRITE); 1181 1.2.6.2 riz bus_dmamap_sync(vsc->sc_dmat, sc->sc_ctrl_status_dmamap, 0, 1182 1.2.6.2 riz sizeof(struct virtio_net_ctrl_status), 1183 1.2.6.2 riz BUS_DMASYNC_POSTREAD); 1184 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_uc_dmamap); 1185 1.2.6.2 riz bus_dmamap_unload(vsc->sc_dmat, sc->sc_ctrl_tbl_mc_dmamap); 1186 1.2.6.2 riz 1187 1.2.6.2 riz if (sc->sc_ctrl_status->ack == VIRTIO_NET_OK) 1188 1.2.6.2 riz r = 0; 1189 1.2.6.2 riz else { 1190 1.2.6.2 riz printf("%s: failed setting rx filter\n", 1191 1.2.6.2 riz device_xname(sc->sc_dev)); 1192 1.2.6.2 riz r = EIO; 1193 1.2.6.2 riz } 1194 1.2.6.2 riz 1195 1.2.6.2 riz out: 1196 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1197 1.2.6.2 riz sc->sc_ctrl_inuse = FREE; 1198 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait); 1199 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1200 1.2.6.2 riz 1201 1.2.6.2 riz return r; 1202 1.2.6.2 riz } 1203 1.2.6.2 riz 1204 1.2.6.2 riz /* ctrl vq interrupt; wake up the command issuer */ 1205 1.2.6.2 riz static int 1206 1.2.6.2 riz vioif_ctrl_vq_done(struct virtqueue *vq) 1207 1.2.6.2 riz { 1208 1.2.6.2 riz struct virtio_softc *vsc = vq->vq_owner; 1209 1.2.6.2 riz struct vioif_softc *sc = device_private(vsc->sc_child); 1210 1.2.6.2 riz int r, slot; 1211 1.2.6.2 riz 1212 1.2.6.2 riz r = virtio_dequeue(vsc, vq, &slot, NULL); 1213 1.2.6.2 riz if (r == ENOENT) 1214 1.2.6.2 riz return 0; 1215 1.2.6.2 riz virtio_dequeue_commit(vsc, vq, slot); 1216 1.2.6.2 riz 1217 1.2.6.2 riz mutex_enter(&sc->sc_ctrl_wait_lock); 1218 1.2.6.2 riz sc->sc_ctrl_inuse = DONE; 1219 1.2.6.2 riz cv_signal(&sc->sc_ctrl_wait); 1220 1.2.6.2 riz mutex_exit(&sc->sc_ctrl_wait_lock); 1221 1.2.6.2 riz 1222 1.2.6.2 riz return 1; 1223 1.2.6.2 riz } 1224 1.2.6.2 riz 1225 1.2.6.2 riz /* 1226 1.2.6.2 riz * If IFF_PROMISC requested, set promiscuous 1227 1.2.6.2 riz * If multicast filter small enough (<=MAXENTRIES) set rx filter 1228 1.2.6.2 riz * If large multicast filter exist use ALLMULTI 1229 1.2.6.2 riz */ 1230 1.2.6.2 riz /* 1231 1.2.6.2 riz * If setting rx filter fails fall back to ALLMULTI 1232 1.2.6.2 riz * If ALLMULTI fails fall back to PROMISC 1233 1.2.6.2 riz */ 1234 1.2.6.2 riz static int 1235 1.2.6.2 riz vioif_rx_filter(struct vioif_softc *sc) 1236 1.2.6.2 riz { 1237 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 1238 1.2.6.2 riz struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1239 1.2.6.2 riz struct ether_multi *enm; 1240 1.2.6.2 riz struct ether_multistep step; 1241 1.2.6.2 riz int nentries; 1242 1.2.6.2 riz int promisc = 0, allmulti = 0, rxfilter = 0; 1243 1.2.6.2 riz int r; 1244 1.2.6.2 riz 1245 1.2.6.2 riz if (vsc->sc_nvqs < 3) { /* no ctrl vq; always promisc */ 1246 1.2.6.2 riz ifp->if_flags |= IFF_PROMISC; 1247 1.2.6.2 riz return 0; 1248 1.2.6.2 riz } 1249 1.2.6.2 riz 1250 1.2.6.2 riz if (ifp->if_flags & IFF_PROMISC) { 1251 1.2.6.2 riz promisc = 1; 1252 1.2.6.2 riz goto set; 1253 1.2.6.2 riz } 1254 1.2.6.2 riz 1255 1.2.6.2 riz nentries = -1; 1256 1.2.6.2 riz ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1257 1.2.6.2 riz while (nentries++, enm != NULL) { 1258 1.2.6.2 riz if (nentries >= VIRTIO_NET_CTRL_MAC_MAXENTRIES) { 1259 1.2.6.2 riz allmulti = 1; 1260 1.2.6.2 riz goto set; 1261 1.2.6.2 riz } 1262 1.2.6.2 riz if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 1263 1.2.6.2 riz ETHER_ADDR_LEN)) { 1264 1.2.6.2 riz allmulti = 1; 1265 1.2.6.2 riz goto set; 1266 1.2.6.2 riz } 1267 1.2.6.2 riz memcpy(sc->sc_ctrl_mac_tbl_mc->macs[nentries], 1268 1.2.6.2 riz enm->enm_addrlo, ETHER_ADDR_LEN); 1269 1.2.6.2 riz ETHER_NEXT_MULTI(step, enm); 1270 1.2.6.2 riz } 1271 1.2.6.2 riz rxfilter = 1; 1272 1.2.6.2 riz 1273 1.2.6.2 riz set: 1274 1.2.6.2 riz if (rxfilter) { 1275 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc->nentries = 0; 1276 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc->nentries = nentries; 1277 1.2.6.2 riz r = vioif_set_rx_filter(sc); 1278 1.2.6.2 riz if (r != 0) { 1279 1.2.6.2 riz rxfilter = 0; 1280 1.2.6.2 riz allmulti = 1; /* fallback */ 1281 1.2.6.2 riz } 1282 1.2.6.2 riz } else { 1283 1.2.6.2 riz /* remove rx filter */ 1284 1.2.6.2 riz sc->sc_ctrl_mac_tbl_uc->nentries = 0; 1285 1.2.6.2 riz sc->sc_ctrl_mac_tbl_mc->nentries = 0; 1286 1.2.6.2 riz r = vioif_set_rx_filter(sc); 1287 1.2.6.2 riz /* what to do on failure? */ 1288 1.2.6.2 riz } 1289 1.2.6.2 riz if (allmulti) { 1290 1.2.6.2 riz r = vioif_set_allmulti(sc, true); 1291 1.2.6.2 riz if (r != 0) { 1292 1.2.6.2 riz allmulti = 0; 1293 1.2.6.2 riz promisc = 1; /* fallback */ 1294 1.2.6.2 riz } 1295 1.2.6.2 riz } else { 1296 1.2.6.2 riz r = vioif_set_allmulti(sc, false); 1297 1.2.6.2 riz /* what to do on failure? */ 1298 1.2.6.2 riz } 1299 1.2.6.2 riz if (promisc) { 1300 1.2.6.2 riz r = vioif_set_promisc(sc, true); 1301 1.2.6.2 riz } else { 1302 1.2.6.2 riz r = vioif_set_promisc(sc, false); 1303 1.2.6.2 riz } 1304 1.2.6.2 riz 1305 1.2.6.2 riz return r; 1306 1.2.6.2 riz } 1307 1.2.6.2 riz 1308 1.2.6.2 riz /* change link status */ 1309 1.2.6.2 riz static int 1310 1.2.6.2 riz vioif_updown(struct vioif_softc *sc, bool isup) 1311 1.2.6.2 riz { 1312 1.2.6.2 riz struct virtio_softc *vsc = sc->sc_virtio; 1313 1.2.6.2 riz 1314 1.2.6.2 riz if (!(vsc->sc_features & VIRTIO_NET_F_STATUS)) 1315 1.2.6.2 riz return ENODEV; 1316 1.2.6.2 riz virtio_write_device_config_1(vsc, 1317 1.2.6.2 riz VIRTIO_NET_CONFIG_STATUS, 1318 1.2.6.2 riz isup?VIRTIO_NET_S_LINK_UP:0); 1319 1.2.6.2 riz return 0; 1320 1.2.6.2 riz } 1321
Indexes created Wed Oct 15 07:09:58 GMT 2025