Home | History | Annotate | Line # | Download | only in pci
if_vr.c revision 1.92
      1  1.92    cegger /*	$NetBSD: if_vr.c,v 1.92 2008/04/10 19:13:37 cegger Exp $	*/
      2  1.18   thorpej 
      3  1.18   thorpej /*-
      4  1.18   thorpej  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
      5  1.18   thorpej  * All rights reserved.
      6  1.18   thorpej  *
      7  1.18   thorpej  * This code is derived from software contributed to The NetBSD Foundation
      8  1.18   thorpej  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.18   thorpej  * NASA Ames Research Center.
     10  1.18   thorpej  *
     11  1.18   thorpej  * Redistribution and use in source and binary forms, with or without
     12  1.18   thorpej  * modification, are permitted provided that the following conditions
     13  1.18   thorpej  * are met:
     14  1.18   thorpej  * 1. Redistributions of source code must retain the above copyright
     15  1.18   thorpej  *    notice, this list of conditions and the following disclaimer.
     16  1.18   thorpej  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.18   thorpej  *    notice, this list of conditions and the following disclaimer in the
     18  1.18   thorpej  *    documentation and/or other materials provided with the distribution.
     19  1.18   thorpej  * 3. All advertising materials mentioning features or use of this software
     20  1.18   thorpej  *    must display the following acknowledgement:
     21  1.18   thorpej  *	This product includes software developed by the NetBSD
     22  1.18   thorpej  *	Foundation, Inc. and its contributors.
     23  1.18   thorpej  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  1.18   thorpej  *    contributors may be used to endorse or promote products derived
     25  1.18   thorpej  *    from this software without specific prior written permission.
     26  1.18   thorpej  *
     27  1.18   thorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  1.18   thorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  1.18   thorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  1.18   thorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  1.18   thorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  1.18   thorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  1.18   thorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  1.18   thorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  1.18   thorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  1.18   thorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  1.18   thorpej  * POSSIBILITY OF SUCH DAMAGE.
     38  1.18   thorpej  */
     39   1.2  sakamoto 
     40   1.1  sakamoto /*
     41   1.1  sakamoto  * Copyright (c) 1997, 1998
     42   1.1  sakamoto  *	Bill Paul <wpaul (at) ctr.columbia.edu>.  All rights reserved.
     43   1.1  sakamoto  *
     44   1.1  sakamoto  * Redistribution and use in source and binary forms, with or without
     45   1.1  sakamoto  * modification, are permitted provided that the following conditions
     46   1.1  sakamoto  * are met:
     47   1.1  sakamoto  * 1. Redistributions of source code must retain the above copyright
     48   1.1  sakamoto  *    notice, this list of conditions and the following disclaimer.
     49   1.1  sakamoto  * 2. Redistributions in binary form must reproduce the above copyright
     50   1.1  sakamoto  *    notice, this list of conditions and the following disclaimer in the
     51   1.1  sakamoto  *    documentation and/or other materials provided with the distribution.
     52   1.1  sakamoto  * 3. All advertising materials mentioning features or use of this software
     53   1.1  sakamoto  *    must display the following acknowledgement:
     54   1.1  sakamoto  *	This product includes software developed by Bill Paul.
     55   1.1  sakamoto  * 4. Neither the name of the author nor the names of any co-contributors
     56   1.1  sakamoto  *    may be used to endorse or promote products derived from this software
     57   1.1  sakamoto  *    without specific prior written permission.
     58   1.1  sakamoto  *
     59   1.1  sakamoto  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     60   1.1  sakamoto  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     61   1.1  sakamoto  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     62   1.1  sakamoto  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     63   1.1  sakamoto  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     64   1.1  sakamoto  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     65   1.1  sakamoto  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     66   1.1  sakamoto  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     67   1.1  sakamoto  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     68   1.1  sakamoto  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     69   1.1  sakamoto  * THE POSSIBILITY OF SUCH DAMAGE.
     70   1.1  sakamoto  *
     71   1.2  sakamoto  *	$FreeBSD: if_vr.c,v 1.7 1999/01/10 18:51:49 wpaul Exp $
     72   1.1  sakamoto  */
     73   1.1  sakamoto 
     74   1.1  sakamoto /*
     75   1.1  sakamoto  * VIA Rhine fast ethernet PCI NIC driver
     76   1.1  sakamoto  *
     77   1.1  sakamoto  * Supports various network adapters based on the VIA Rhine
     78   1.1  sakamoto  * and Rhine II PCI controllers, including the D-Link DFE530TX.
     79   1.1  sakamoto  * Datasheets are available at http://www.via.com.tw.
     80   1.1  sakamoto  *
     81   1.1  sakamoto  * Written by Bill Paul <wpaul (at) ctr.columbia.edu>
     82   1.1  sakamoto  * Electrical Engineering Department
     83   1.1  sakamoto  * Columbia University, New York City
     84   1.1  sakamoto  */
     85   1.1  sakamoto 
     86   1.1  sakamoto /*
     87   1.1  sakamoto  * The VIA Rhine controllers are similar in some respects to the
     88   1.1  sakamoto  * the DEC tulip chips, except less complicated. The controller
     89   1.1  sakamoto  * uses an MII bus and an external physical layer interface. The
     90   1.1  sakamoto  * receiver has a one entry perfect filter and a 64-bit hash table
     91   1.1  sakamoto  * multicast filter. Transmit and receive descriptors are similar
     92   1.1  sakamoto  * to the tulip.
     93   1.1  sakamoto  *
     94   1.1  sakamoto  * The Rhine has a serious flaw in its transmit DMA mechanism:
     95   1.1  sakamoto  * transmit buffers must be longword aligned. Unfortunately,
     96  1.17   thorpej  * the kernel doesn't guarantee that mbufs will be filled in starting
     97   1.1  sakamoto  * at longword boundaries, so we have to do a buffer copy before
     98   1.1  sakamoto  * transmission.
     99  1.17   thorpej  *
    100  1.17   thorpej  * Apparently, the receive DMA mechanism also has the same flaw.  This
    101  1.17   thorpej  * means that on systems with struct alignment requirements, incoming
    102  1.17   thorpej  * frames must be copied to a new buffer which shifts the data forward
    103  1.17   thorpej  * 2 bytes so that the payload is aligned on a 4-byte boundary.
    104   1.1  sakamoto  */
    105  1.53     lukem 
    106  1.53     lukem #include <sys/cdefs.h>
    107  1.92    cegger __KERNEL_RCSID(0, "$NetBSD: if_vr.c,v 1.92 2008/04/10 19:13:37 cegger Exp $");
    108  1.68  jdolecek 
    109  1.68  jdolecek #include "rnd.h"
    110   1.1  sakamoto 
    111   1.1  sakamoto #include <sys/param.h>
    112   1.1  sakamoto #include <sys/systm.h>
    113  1.34   thorpej #include <sys/callout.h>
    114   1.1  sakamoto #include <sys/sockio.h>
    115   1.1  sakamoto #include <sys/mbuf.h>
    116   1.1  sakamoto #include <sys/malloc.h>
    117   1.1  sakamoto #include <sys/kernel.h>
    118   1.1  sakamoto #include <sys/socket.h>
    119   1.6   thorpej #include <sys/device.h>
    120   1.1  sakamoto 
    121  1.68  jdolecek #if NRND > 0
    122  1.68  jdolecek #include <sys/rnd.h>
    123  1.68  jdolecek #endif
    124  1.68  jdolecek 
    125  1.35       mrg #include <uvm/uvm_extern.h>		/* for PAGE_SIZE */
    126  1.18   thorpej 
    127   1.1  sakamoto #include <net/if.h>
    128   1.1  sakamoto #include <net/if_arp.h>
    129   1.1  sakamoto #include <net/if_dl.h>
    130   1.1  sakamoto #include <net/if_media.h>
    131   1.2  sakamoto #include <net/if_ether.h>
    132   1.1  sakamoto 
    133   1.2  sakamoto #include "bpfilter.h"
    134   1.1  sakamoto #if NBPFILTER > 0
    135   1.1  sakamoto #include <net/bpf.h>
    136   1.1  sakamoto #endif
    137   1.1  sakamoto 
    138  1.88        ad #include <sys/bus.h>
    139  1.88        ad #include <sys/intr.h>
    140  1.30   thorpej #include <machine/endian.h>
    141   1.1  sakamoto 
    142  1.10   thorpej #include <dev/mii/mii.h>
    143  1.11   thorpej #include <dev/mii/miivar.h>
    144  1.29   thorpej #include <dev/mii/mii_bitbang.h>
    145  1.10   thorpej 
    146   1.2  sakamoto #include <dev/pci/pcireg.h>
    147   1.2  sakamoto #include <dev/pci/pcivar.h>
    148   1.8   thorpej #include <dev/pci/pcidevs.h>
    149   1.8   thorpej 
    150   1.2  sakamoto #include <dev/pci/if_vrreg.h>
    151   1.1  sakamoto 
    152   1.2  sakamoto #define	VR_USEIOSPACE
    153   1.1  sakamoto 
    154   1.1  sakamoto /*
    155   1.1  sakamoto  * Various supported device vendors/types and their names.
    156   1.1  sakamoto  */
    157   1.7   thorpej static struct vr_type {
    158   1.7   thorpej 	pci_vendor_id_t		vr_vid;
    159   1.7   thorpej 	pci_product_id_t	vr_did;
    160   1.7   thorpej 	const char		*vr_name;
    161   1.7   thorpej } vr_devs[] = {
    162   1.8   thorpej 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3043,
    163  1.24       hwr 		"VIA VT3043 (Rhine) 10/100" },
    164  1.37      tron 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6102,
    165  1.36      tron 		"VIA VT6102 (Rhine II) 10/100" },
    166  1.62    dogcow 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105,
    167  1.62    dogcow 		"VIA VT6105 (Rhine III) 10/100" },
    168  1.86  jmcneill 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105M,
    169  1.86  jmcneill 		"VIA VT6105M (Rhine III) 10/100" },
    170   1.8   thorpej 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT86C100A,
    171  1.24       hwr 		"VIA VT86C100A (Rhine-II) 10/100" },
    172   1.1  sakamoto 	{ 0, 0, NULL }
    173   1.1  sakamoto };
    174   1.1  sakamoto 
    175  1.18   thorpej /*
    176  1.18   thorpej  * Transmit descriptor list size.
    177  1.18   thorpej  */
    178  1.18   thorpej #define	VR_NTXDESC		64
    179  1.18   thorpej #define	VR_NTXDESC_MASK		(VR_NTXDESC - 1)
    180  1.18   thorpej #define	VR_NEXTTX(x)		(((x) + 1) & VR_NTXDESC_MASK)
    181  1.18   thorpej 
    182  1.18   thorpej /*
    183  1.18   thorpej  * Receive descriptor list size.
    184  1.18   thorpej  */
    185  1.18   thorpej #define	VR_NRXDESC		64
    186  1.18   thorpej #define	VR_NRXDESC_MASK		(VR_NRXDESC - 1)
    187  1.18   thorpej #define	VR_NEXTRX(x)		(((x) + 1) & VR_NRXDESC_MASK)
    188   1.7   thorpej 
    189  1.18   thorpej /*
    190  1.18   thorpej  * Control data structres that are DMA'd to the Rhine chip.  We allocate
    191  1.18   thorpej  * them in a single clump that maps to a single DMA segment to make several
    192  1.18   thorpej  * things easier.
    193  1.18   thorpej  *
    194  1.18   thorpej  * Note that since we always copy outgoing packets to aligned transmit
    195  1.18   thorpej  * buffers, we can reduce the transmit descriptors to one per packet.
    196  1.18   thorpej  */
    197  1.18   thorpej struct vr_control_data {
    198  1.18   thorpej 	struct vr_desc		vr_txdescs[VR_NTXDESC];
    199  1.18   thorpej 	struct vr_desc		vr_rxdescs[VR_NRXDESC];
    200   1.7   thorpej };
    201   1.7   thorpej 
    202  1.18   thorpej #define	VR_CDOFF(x)		offsetof(struct vr_control_data, x)
    203  1.18   thorpej #define	VR_CDTXOFF(x)		VR_CDOFF(vr_txdescs[(x)])
    204  1.18   thorpej #define	VR_CDRXOFF(x)		VR_CDOFF(vr_rxdescs[(x)])
    205   1.7   thorpej 
    206  1.18   thorpej /*
    207  1.18   thorpej  * Software state of transmit and receive descriptors.
    208  1.18   thorpej  */
    209  1.18   thorpej struct vr_descsoft {
    210  1.18   thorpej 	struct mbuf		*ds_mbuf;	/* head of mbuf chain */
    211  1.18   thorpej 	bus_dmamap_t		ds_dmamap;	/* our DMA map */
    212   1.7   thorpej };
    213   1.7   thorpej 
    214   1.7   thorpej struct vr_softc {
    215  1.14   thorpej 	struct device		vr_dev;		/* generic device glue */
    216  1.14   thorpej 	void			*vr_ih;		/* interrupt cookie */
    217  1.14   thorpej 	void			*vr_ats;	/* shutdown hook */
    218  1.14   thorpej 	bus_space_tag_t		vr_bst;		/* bus space tag */
    219  1.14   thorpej 	bus_space_handle_t	vr_bsh;		/* bus space handle */
    220  1.18   thorpej 	bus_dma_tag_t		vr_dmat;	/* bus DMA tag */
    221  1.14   thorpej 	pci_chipset_tag_t	vr_pc;		/* PCI chipset info */
    222  1.76  christos 	pcitag_t		vr_tag;		/* PCI tag */
    223  1.14   thorpej 	struct ethercom		vr_ec;		/* Ethernet common info */
    224  1.83   tsutsui 	uint8_t 		vr_enaddr[ETHER_ADDR_LEN];
    225  1.11   thorpej 	struct mii_data		vr_mii;		/* MII/media info */
    226  1.18   thorpej 
    227  1.83   tsutsui 	uint8_t			vr_revid;	/* Rhine chip revision */
    228  1.59       lha 
    229  1.87        ad 	callout_t		vr_tick_ch;	/* tick callout */
    230  1.34   thorpej 
    231  1.18   thorpej 	bus_dmamap_t		vr_cddmamap;	/* control data DMA map */
    232  1.18   thorpej #define	vr_cddma	vr_cddmamap->dm_segs[0].ds_addr
    233  1.18   thorpej 
    234  1.18   thorpej 	/*
    235  1.18   thorpej 	 * Software state for transmit and receive descriptors.
    236  1.18   thorpej 	 */
    237  1.18   thorpej 	struct vr_descsoft	vr_txsoft[VR_NTXDESC];
    238  1.18   thorpej 	struct vr_descsoft	vr_rxsoft[VR_NRXDESC];
    239  1.18   thorpej 
    240  1.18   thorpej 	/*
    241  1.18   thorpej 	 * Control data structures.
    242  1.18   thorpej 	 */
    243  1.18   thorpej 	struct vr_control_data	*vr_control_data;
    244  1.18   thorpej 
    245  1.18   thorpej 	int	vr_txpending;		/* number of TX requests pending */
    246  1.18   thorpej 	int	vr_txdirty;		/* first dirty TX descriptor */
    247  1.18   thorpej 	int	vr_txlast;		/* last used TX descriptor */
    248  1.18   thorpej 
    249  1.18   thorpej 	int	vr_rxptr;		/* next ready RX descriptor */
    250  1.68  jdolecek 
    251  1.83   tsutsui 	uint32_t	vr_save_iobase;
    252  1.83   tsutsui 	uint32_t	vr_save_membase;
    253  1.83   tsutsui 	uint32_t	vr_save_irq;
    254  1.76  christos 
    255  1.68  jdolecek #if NRND > 0
    256  1.68  jdolecek 	rndsource_element_t rnd_source;	/* random source */
    257  1.68  jdolecek #endif
    258   1.7   thorpej };
    259   1.7   thorpej 
    260  1.18   thorpej #define	VR_CDTXADDR(sc, x)	((sc)->vr_cddma + VR_CDTXOFF((x)))
    261  1.18   thorpej #define	VR_CDRXADDR(sc, x)	((sc)->vr_cddma + VR_CDRXOFF((x)))
    262  1.18   thorpej 
    263  1.18   thorpej #define	VR_CDTX(sc, x)		(&(sc)->vr_control_data->vr_txdescs[(x)])
    264  1.18   thorpej #define	VR_CDRX(sc, x)		(&(sc)->vr_control_data->vr_rxdescs[(x)])
    265  1.18   thorpej 
    266  1.18   thorpej #define	VR_DSTX(sc, x)		(&(sc)->vr_txsoft[(x)])
    267  1.18   thorpej #define	VR_DSRX(sc, x)		(&(sc)->vr_rxsoft[(x)])
    268  1.18   thorpej 
    269  1.18   thorpej #define	VR_CDTXSYNC(sc, x, ops)						\
    270  1.18   thorpej 	bus_dmamap_sync((sc)->vr_dmat, (sc)->vr_cddmamap,		\
    271  1.18   thorpej 	    VR_CDTXOFF((x)), sizeof(struct vr_desc), (ops))
    272  1.18   thorpej 
    273  1.18   thorpej #define	VR_CDRXSYNC(sc, x, ops)						\
    274  1.18   thorpej 	bus_dmamap_sync((sc)->vr_dmat, (sc)->vr_cddmamap,		\
    275  1.18   thorpej 	    VR_CDRXOFF((x)), sizeof(struct vr_desc), (ops))
    276  1.18   thorpej 
    277  1.18   thorpej /*
    278  1.18   thorpej  * Note we rely on MCLBYTES being a power of two below.
    279  1.18   thorpej  */
    280  1.18   thorpej #define	VR_INIT_RXDESC(sc, i)						\
    281  1.18   thorpej do {									\
    282  1.18   thorpej 	struct vr_desc *__d = VR_CDRX((sc), (i));			\
    283  1.18   thorpej 	struct vr_descsoft *__ds = VR_DSRX((sc), (i));			\
    284  1.18   thorpej 									\
    285  1.30   thorpej 	__d->vr_next = htole32(VR_CDRXADDR((sc), VR_NEXTRX((i))));	\
    286  1.30   thorpej 	__d->vr_data = htole32(__ds->ds_dmamap->dm_segs[0].ds_addr);	\
    287  1.30   thorpej 	__d->vr_ctl = htole32(VR_RXCTL_CHAIN | VR_RXCTL_RX_INTR |	\
    288  1.21   thorpej 	    ((MCLBYTES - 1) & VR_RXCTL_BUFLEN));			\
    289  1.79   tsutsui 	__d->vr_status = htole32(VR_RXSTAT_FIRSTFRAG |			\
    290  1.79   tsutsui 	    VR_RXSTAT_LASTFRAG | VR_RXSTAT_OWN);			\
    291  1.18   thorpej 	VR_CDRXSYNC((sc), (i), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
    292  1.64   tsutsui } while (/* CONSTCOND */ 0)
    293  1.18   thorpej 
    294   1.7   thorpej /*
    295   1.7   thorpej  * register space access macros
    296   1.7   thorpej  */
    297  1.18   thorpej #define	CSR_WRITE_4(sc, reg, val)					\
    298  1.14   thorpej 	bus_space_write_4(sc->vr_bst, sc->vr_bsh, reg, val)
    299  1.18   thorpej #define	CSR_WRITE_2(sc, reg, val)					\
    300  1.14   thorpej 	bus_space_write_2(sc->vr_bst, sc->vr_bsh, reg, val)
    301  1.18   thorpej #define	CSR_WRITE_1(sc, reg, val)					\
    302  1.14   thorpej 	bus_space_write_1(sc->vr_bst, sc->vr_bsh, reg, val)
    303   1.7   thorpej 
    304  1.18   thorpej #define	CSR_READ_4(sc, reg)						\
    305  1.14   thorpej 	bus_space_read_4(sc->vr_bst, sc->vr_bsh, reg)
    306  1.18   thorpej #define	CSR_READ_2(sc, reg)						\
    307  1.14   thorpej 	bus_space_read_2(sc->vr_bst, sc->vr_bsh, reg)
    308  1.18   thorpej #define	CSR_READ_1(sc, reg)						\
    309  1.14   thorpej 	bus_space_read_1(sc->vr_bst, sc->vr_bsh, reg)
    310   1.7   thorpej 
    311   1.7   thorpej #define	VR_TIMEOUT		1000
    312   1.1  sakamoto 
    313  1.69   thorpej static int	vr_add_rxbuf(struct vr_softc *, int);
    314   1.1  sakamoto 
    315  1.69   thorpej static void	vr_rxeof(struct vr_softc *);
    316  1.69   thorpej static void	vr_rxeoc(struct vr_softc *);
    317  1.69   thorpej static void	vr_txeof(struct vr_softc *);
    318  1.69   thorpej static int	vr_intr(void *);
    319  1.69   thorpej static void	vr_start(struct ifnet *);
    320  1.85  christos static int	vr_ioctl(struct ifnet *, u_long, void *);
    321  1.69   thorpej static int	vr_init(struct ifnet *);
    322  1.69   thorpej static void	vr_stop(struct ifnet *, int);
    323  1.69   thorpej static void	vr_rxdrain(struct vr_softc *);
    324  1.69   thorpej static void	vr_watchdog(struct ifnet *);
    325  1.69   thorpej static void	vr_tick(void *);
    326  1.69   thorpej 
    327  1.91    dyoung static int	vr_mii_readreg(device_t, int, int);
    328  1.91    dyoung static void	vr_mii_writereg(device_t, int, int, int);
    329  1.91    dyoung static void	vr_mii_statchg(device_t);
    330  1.11   thorpej 
    331  1.69   thorpej static void	vr_setmulti(struct vr_softc *);
    332  1.69   thorpej static void	vr_reset(struct vr_softc *);
    333  1.91    dyoung static int	vr_restore_state(pci_chipset_tag_t, pcitag_t, device_t,
    334  1.91    dyoung     pcireg_t);
    335   1.1  sakamoto 
    336  1.23   thorpej int	vr_copy_small = 0;
    337  1.23   thorpej 
    338   1.2  sakamoto #define	VR_SETBIT(sc, reg, x)				\
    339   1.1  sakamoto 	CSR_WRITE_1(sc, reg,				\
    340  1.64   tsutsui 	    CSR_READ_1(sc, reg) | (x))
    341   1.1  sakamoto 
    342   1.2  sakamoto #define	VR_CLRBIT(sc, reg, x)				\
    343   1.1  sakamoto 	CSR_WRITE_1(sc, reg,				\
    344  1.64   tsutsui 	    CSR_READ_1(sc, reg) & ~(x))
    345   1.1  sakamoto 
    346   1.2  sakamoto #define	VR_SETBIT16(sc, reg, x)				\
    347   1.1  sakamoto 	CSR_WRITE_2(sc, reg,				\
    348  1.64   tsutsui 	    CSR_READ_2(sc, reg) | (x))
    349   1.1  sakamoto 
    350   1.2  sakamoto #define	VR_CLRBIT16(sc, reg, x)				\
    351   1.1  sakamoto 	CSR_WRITE_2(sc, reg,				\
    352  1.64   tsutsui 	    CSR_READ_2(sc, reg) & ~(x))
    353   1.1  sakamoto 
    354   1.2  sakamoto #define	VR_SETBIT32(sc, reg, x)				\
    355   1.1  sakamoto 	CSR_WRITE_4(sc, reg,				\
    356  1.64   tsutsui 	    CSR_READ_4(sc, reg) | (x))
    357   1.1  sakamoto 
    358   1.2  sakamoto #define	VR_CLRBIT32(sc, reg, x)				\
    359   1.1  sakamoto 	CSR_WRITE_4(sc, reg,				\
    360  1.64   tsutsui 	    CSR_READ_4(sc, reg) & ~(x))
    361   1.1  sakamoto 
    362  1.29   thorpej /*
    363  1.29   thorpej  * MII bit-bang glue.
    364  1.29   thorpej  */
    365  1.91    dyoung static uint32_t vr_mii_bitbang_read(device_t);
    366  1.91    dyoung static void	vr_mii_bitbang_write(device_t, uint32_t);
    367   1.1  sakamoto 
    368  1.69   thorpej static const struct mii_bitbang_ops vr_mii_bitbang_ops = {
    369  1.29   thorpej 	vr_mii_bitbang_read,
    370  1.29   thorpej 	vr_mii_bitbang_write,
    371  1.29   thorpej 	{
    372  1.29   thorpej 		VR_MIICMD_DATAOUT,	/* MII_BIT_MDO */
    373  1.29   thorpej 		VR_MIICMD_DATAIN,	/* MII_BIT_MDI */
    374  1.29   thorpej 		VR_MIICMD_CLK,		/* MII_BIT_MDC */
    375  1.29   thorpej 		VR_MIICMD_DIR,		/* MII_BIT_DIR_HOST_PHY */
    376  1.29   thorpej 		0,			/* MII_BIT_DIR_PHY_HOST */
    377  1.29   thorpej 	}
    378  1.29   thorpej };
    379   1.1  sakamoto 
    380  1.83   tsutsui static uint32_t
    381  1.91    dyoung vr_mii_bitbang_read(device_t self)
    382   1.1  sakamoto {
    383  1.91    dyoung 	struct vr_softc *sc = device_private(self);
    384   1.1  sakamoto 
    385  1.29   thorpej 	return (CSR_READ_1(sc, VR_MIICMD));
    386   1.1  sakamoto }
    387   1.1  sakamoto 
    388  1.69   thorpej static void
    389  1.91    dyoung vr_mii_bitbang_write(device_t self, uint32_t val)
    390   1.1  sakamoto {
    391  1.91    dyoung 	struct vr_softc *sc = device_private(self);
    392   1.1  sakamoto 
    393  1.29   thorpej 	CSR_WRITE_1(sc, VR_MIICMD, (val & 0xff) | VR_MIICMD_DIRECTPGM);
    394   1.1  sakamoto }
    395   1.1  sakamoto 
    396   1.1  sakamoto /*
    397   1.1  sakamoto  * Read an PHY register through the MII.
    398   1.1  sakamoto  */
    399  1.15   thorpej static int
    400  1.91    dyoung vr_mii_readreg(device_t self, int phy, int reg)
    401   1.1  sakamoto {
    402  1.91    dyoung 	struct vr_softc *sc = device_private(self);
    403   1.1  sakamoto 
    404  1.29   thorpej 	CSR_WRITE_1(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
    405  1.29   thorpej 	return (mii_bitbang_readreg(self, &vr_mii_bitbang_ops, phy, reg));
    406   1.1  sakamoto }
    407   1.1  sakamoto 
    408   1.1  sakamoto /*
    409   1.1  sakamoto  * Write to a PHY register through the MII.
    410   1.1  sakamoto  */
    411  1.15   thorpej static void
    412  1.91    dyoung vr_mii_writereg(device_t self, int phy, int reg, int val)
    413   1.1  sakamoto {
    414  1.91    dyoung 	struct vr_softc *sc = device_private(self);
    415   1.1  sakamoto 
    416  1.29   thorpej 	CSR_WRITE_1(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
    417  1.29   thorpej 	mii_bitbang_writereg(self, &vr_mii_bitbang_ops, phy, reg, val);
    418   1.1  sakamoto }
    419   1.1  sakamoto 
    420  1.15   thorpej static void
    421  1.91    dyoung vr_mii_statchg(device_t self)
    422   1.1  sakamoto {
    423  1.91    dyoung 	struct vr_softc *sc = device_private(self);
    424   1.1  sakamoto 
    425  1.11   thorpej 	/*
    426  1.11   thorpej 	 * In order to fiddle with the 'full-duplex' bit in the netconfig
    427  1.11   thorpej 	 * register, we first have to put the transmit and/or receive logic
    428  1.11   thorpej 	 * in the idle state.
    429  1.11   thorpej 	 */
    430  1.18   thorpej 	VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
    431   1.1  sakamoto 
    432  1.11   thorpej 	if (sc->vr_mii.mii_media_active & IFM_FDX)
    433  1.11   thorpej 		VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
    434  1.11   thorpej 	else
    435  1.11   thorpej 		VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
    436   1.1  sakamoto 
    437  1.18   thorpej 	if (sc->vr_ec.ec_if.if_flags & IFF_RUNNING)
    438  1.11   thorpej 		VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
    439   1.1  sakamoto }
    440   1.1  sakamoto 
    441  1.46   tsutsui #define	vr_calchash(addr) \
    442  1.46   tsutsui 	(ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    443   1.1  sakamoto 
    444   1.1  sakamoto /*
    445   1.1  sakamoto  * Program the 64-bit multicast hash filter.
    446   1.1  sakamoto  */
    447  1.15   thorpej static void
    448  1.69   thorpej vr_setmulti(struct vr_softc *sc)
    449   1.1  sakamoto {
    450  1.15   thorpej 	struct ifnet *ifp;
    451  1.15   thorpej 	int h = 0;
    452  1.83   tsutsui 	uint32_t hashes[2] = { 0, 0 };
    453  1.15   thorpej 	struct ether_multistep step;
    454  1.15   thorpej 	struct ether_multi *enm;
    455  1.15   thorpej 	int mcnt = 0;
    456  1.83   tsutsui 	uint8_t rxfilt;
    457   1.1  sakamoto 
    458   1.6   thorpej 	ifp = &sc->vr_ec.ec_if;
    459   1.1  sakamoto 
    460   1.1  sakamoto 	rxfilt = CSR_READ_1(sc, VR_RXCFG);
    461   1.1  sakamoto 
    462  1.45     enami 	if (ifp->if_flags & IFF_PROMISC) {
    463  1.45     enami allmulti:
    464  1.45     enami 		ifp->if_flags |= IFF_ALLMULTI;
    465   1.1  sakamoto 		rxfilt |= VR_RXCFG_RX_MULTI;
    466   1.1  sakamoto 		CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
    467   1.1  sakamoto 		CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
    468   1.1  sakamoto 		CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
    469   1.1  sakamoto 		return;
    470   1.1  sakamoto 	}
    471   1.1  sakamoto 
    472   1.1  sakamoto 	/* first, zot all the existing hash bits */
    473   1.1  sakamoto 	CSR_WRITE_4(sc, VR_MAR0, 0);
    474   1.1  sakamoto 	CSR_WRITE_4(sc, VR_MAR1, 0);
    475   1.1  sakamoto 
    476   1.1  sakamoto 	/* now program new ones */
    477   1.2  sakamoto 	ETHER_FIRST_MULTI(step, &sc->vr_ec, enm);
    478   1.2  sakamoto 	while (enm != NULL) {
    479  1.45     enami 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    480  1.45     enami 		    ETHER_ADDR_LEN) != 0)
    481  1.45     enami 			goto allmulti;
    482   1.2  sakamoto 
    483   1.2  sakamoto 		h = vr_calchash(enm->enm_addrlo);
    484   1.2  sakamoto 
    485   1.1  sakamoto 		if (h < 32)
    486   1.1  sakamoto 			hashes[0] |= (1 << h);
    487   1.1  sakamoto 		else
    488   1.1  sakamoto 			hashes[1] |= (1 << (h - 32));
    489   1.2  sakamoto 		ETHER_NEXT_MULTI(step, enm);
    490   1.1  sakamoto 		mcnt++;
    491   1.1  sakamoto 	}
    492  1.45     enami 
    493  1.45     enami 	ifp->if_flags &= ~IFF_ALLMULTI;
    494   1.1  sakamoto 
    495   1.1  sakamoto 	if (mcnt)
    496   1.1  sakamoto 		rxfilt |= VR_RXCFG_RX_MULTI;
    497   1.1  sakamoto 	else
    498   1.1  sakamoto 		rxfilt &= ~VR_RXCFG_RX_MULTI;
    499   1.1  sakamoto 
    500   1.1  sakamoto 	CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
    501   1.1  sakamoto 	CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
    502   1.1  sakamoto 	CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
    503   1.1  sakamoto }
    504   1.1  sakamoto 
    505  1.15   thorpej static void
    506  1.69   thorpej vr_reset(struct vr_softc *sc)
    507   1.1  sakamoto {
    508  1.15   thorpej 	int i;
    509   1.1  sakamoto 
    510   1.1  sakamoto 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
    511   1.1  sakamoto 
    512   1.1  sakamoto 	for (i = 0; i < VR_TIMEOUT; i++) {
    513   1.1  sakamoto 		DELAY(10);
    514   1.1  sakamoto 		if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
    515   1.1  sakamoto 			break;
    516   1.1  sakamoto 	}
    517  1.59       lha 	if (i == VR_TIMEOUT) {
    518  1.59       lha 		if (sc->vr_revid < REV_ID_VT3065_A) {
    519  1.59       lha 			printf("%s: reset never completed!\n",
    520  1.92    cegger 			    device_xname(&sc->vr_dev));
    521  1.59       lha 		} else {
    522  1.59       lha 			/* Use newer force reset command */
    523  1.59       lha 			printf("%s: using force reset command.\n",
    524  1.92    cegger 			    device_xname(&sc->vr_dev));
    525  1.59       lha 			VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
    526  1.59       lha 		}
    527  1.64   tsutsui 	}
    528   1.1  sakamoto 
    529   1.1  sakamoto 	/* Wait a little while for the chip to get its brains in order. */
    530   1.1  sakamoto 	DELAY(1000);
    531   1.1  sakamoto }
    532   1.1  sakamoto 
    533   1.1  sakamoto /*
    534   1.1  sakamoto  * Initialize an RX descriptor and attach an MBUF cluster.
    535   1.1  sakamoto  * Note: the length fields are only 11 bits wide, which means the
    536   1.1  sakamoto  * largest size we can specify is 2047. This is important because
    537   1.1  sakamoto  * MCLBYTES is 2048, so we have to subtract one otherwise we'll
    538   1.1  sakamoto  * overflow the field and make a mess.
    539   1.1  sakamoto  */
    540  1.15   thorpej static int
    541  1.69   thorpej vr_add_rxbuf(struct vr_softc *sc, int i)
    542   1.1  sakamoto {
    543  1.18   thorpej 	struct vr_descsoft *ds = VR_DSRX(sc, i);
    544  1.18   thorpej 	struct mbuf *m_new;
    545  1.18   thorpej 	int error;
    546   1.1  sakamoto 
    547   1.1  sakamoto 	MGETHDR(m_new, M_DONTWAIT, MT_DATA);
    548  1.18   thorpej 	if (m_new == NULL)
    549   1.2  sakamoto 		return (ENOBUFS);
    550   1.1  sakamoto 
    551   1.1  sakamoto 	MCLGET(m_new, M_DONTWAIT);
    552  1.18   thorpej 	if ((m_new->m_flags & M_EXT) == 0) {
    553   1.1  sakamoto 		m_freem(m_new);
    554   1.2  sakamoto 		return (ENOBUFS);
    555   1.1  sakamoto 	}
    556   1.1  sakamoto 
    557  1.18   thorpej 	if (ds->ds_mbuf != NULL)
    558  1.18   thorpej 		bus_dmamap_unload(sc->vr_dmat, ds->ds_dmamap);
    559  1.18   thorpej 
    560  1.18   thorpej 	ds->ds_mbuf = m_new;
    561  1.18   thorpej 
    562  1.18   thorpej 	error = bus_dmamap_load(sc->vr_dmat, ds->ds_dmamap,
    563  1.50   thorpej 	    m_new->m_ext.ext_buf, m_new->m_ext.ext_size, NULL,
    564  1.50   thorpej 	    BUS_DMA_READ|BUS_DMA_NOWAIT);
    565  1.18   thorpej 	if (error) {
    566  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "unable to load rx DMA map %d, error = %d\n",
    567  1.92    cegger 		    i, error);
    568  1.18   thorpej 		panic("vr_add_rxbuf");		/* XXX */
    569  1.18   thorpej 	}
    570  1.18   thorpej 
    571  1.18   thorpej 	bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
    572  1.18   thorpej 	    ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
    573  1.18   thorpej 
    574  1.18   thorpej 	VR_INIT_RXDESC(sc, i);
    575   1.1  sakamoto 
    576   1.2  sakamoto 	return (0);
    577   1.1  sakamoto }
    578   1.1  sakamoto 
    579   1.1  sakamoto /*
    580   1.1  sakamoto  * A frame has been uploaded: pass the resulting mbuf chain up to
    581   1.1  sakamoto  * the higher level protocols.
    582   1.1  sakamoto  */
    583  1.15   thorpej static void
    584  1.69   thorpej vr_rxeof(struct vr_softc *sc)
    585   1.1  sakamoto {
    586  1.15   thorpej 	struct mbuf *m;
    587  1.15   thorpej 	struct ifnet *ifp;
    588  1.18   thorpej 	struct vr_desc *d;
    589  1.18   thorpej 	struct vr_descsoft *ds;
    590  1.18   thorpej 	int i, total_len;
    591  1.83   tsutsui 	uint32_t rxstat;
    592   1.1  sakamoto 
    593   1.6   thorpej 	ifp = &sc->vr_ec.ec_if;
    594   1.1  sakamoto 
    595  1.18   thorpej 	for (i = sc->vr_rxptr;; i = VR_NEXTRX(i)) {
    596  1.18   thorpej 		d = VR_CDRX(sc, i);
    597  1.18   thorpej 		ds = VR_DSRX(sc, i);
    598  1.18   thorpej 
    599  1.18   thorpej 		VR_CDRXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    600  1.18   thorpej 
    601  1.30   thorpej 		rxstat = le32toh(d->vr_status);
    602  1.18   thorpej 
    603  1.18   thorpej 		if (rxstat & VR_RXSTAT_OWN) {
    604  1.18   thorpej 			/*
    605  1.18   thorpej 			 * We have processed all of the receive buffers.
    606  1.18   thorpej 			 */
    607  1.18   thorpej 			break;
    608  1.18   thorpej 		}
    609   1.1  sakamoto 
    610   1.1  sakamoto 		/*
    611   1.1  sakamoto 		 * If an error occurs, update stats, clear the
    612   1.1  sakamoto 		 * status word and leave the mbuf cluster in place:
    613   1.1  sakamoto 		 * it should simply get re-used next time this descriptor
    614   1.2  sakamoto 		 * comes up in the ring.
    615   1.1  sakamoto 		 */
    616   1.1  sakamoto 		if (rxstat & VR_RXSTAT_RXERR) {
    617  1.18   thorpej 			const char *errstr;
    618  1.18   thorpej 
    619   1.1  sakamoto 			ifp->if_ierrors++;
    620   1.2  sakamoto 			switch (rxstat & 0x000000FF) {
    621   1.1  sakamoto 			case VR_RXSTAT_CRCERR:
    622  1.18   thorpej 				errstr = "crc error";
    623   1.1  sakamoto 				break;
    624   1.1  sakamoto 			case VR_RXSTAT_FRAMEALIGNERR:
    625  1.18   thorpej 				errstr = "frame alignment error";
    626   1.1  sakamoto 				break;
    627   1.1  sakamoto 			case VR_RXSTAT_FIFOOFLOW:
    628  1.18   thorpej 				errstr = "FIFO overflow";
    629   1.1  sakamoto 				break;
    630   1.1  sakamoto 			case VR_RXSTAT_GIANT:
    631  1.18   thorpej 				errstr = "received giant packet";
    632   1.1  sakamoto 				break;
    633   1.1  sakamoto 			case VR_RXSTAT_RUNT:
    634  1.18   thorpej 				errstr = "received runt packet";
    635   1.1  sakamoto 				break;
    636   1.1  sakamoto 			case VR_RXSTAT_BUSERR:
    637  1.18   thorpej 				errstr = "system bus error";
    638   1.1  sakamoto 				break;
    639   1.1  sakamoto 			case VR_RXSTAT_BUFFERR:
    640  1.18   thorpej 				errstr = "rx buffer error";
    641   1.1  sakamoto 				break;
    642   1.1  sakamoto 			default:
    643  1.18   thorpej 				errstr = "unknown rx error";
    644   1.1  sakamoto 				break;
    645   1.1  sakamoto 			}
    646  1.92    cegger 			printf("%s: receive error: %s\n", device_xname(&sc->vr_dev),
    647  1.18   thorpej 			    errstr);
    648  1.18   thorpej 
    649  1.18   thorpej 			VR_INIT_RXDESC(sc, i);
    650  1.18   thorpej 
    651   1.1  sakamoto 			continue;
    652  1.72      jmmv 		} else if (!(rxstat & VR_RXSTAT_FIRSTFRAG) ||
    653  1.72      jmmv 		           !(rxstat & VR_RXSTAT_LASTFRAG)) {
    654  1.72      jmmv 			/*
    655  1.72      jmmv 			 * This driver expects to receive whole packets every
    656  1.72      jmmv 			 * time.  In case we receive a fragment that is not
    657  1.72      jmmv 			 * a complete packet, we discard it.
    658  1.72      jmmv 			 */
    659  1.72      jmmv 			ifp->if_ierrors++;
    660  1.72      jmmv 
    661  1.72      jmmv 			printf("%s: receive error: incomplete frame; "
    662  1.72      jmmv 			       "size = %d, status = 0x%x\n",
    663  1.92    cegger 			       device_xname(&sc->vr_dev),
    664  1.72      jmmv 			       VR_RXBYTES(le32toh(d->vr_status)), rxstat);
    665  1.72      jmmv 
    666  1.72      jmmv 			VR_INIT_RXDESC(sc, i);
    667  1.72      jmmv 
    668  1.72      jmmv 			continue;
    669   1.1  sakamoto 		}
    670   1.1  sakamoto 
    671  1.18   thorpej 		bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
    672  1.18   thorpej 		    ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
    673  1.18   thorpej 
    674   1.2  sakamoto 		/* No errors; receive the packet. */
    675  1.30   thorpej 		total_len = VR_RXBYTES(le32toh(d->vr_status));
    676  1.72      jmmv #ifdef DIAGNOSTIC
    677  1.72      jmmv 		if (total_len == 0) {
    678  1.72      jmmv 			/*
    679  1.72      jmmv 			 * If we receive a zero-length packet, we probably
    680  1.72      jmmv 			 * missed to handle an error condition above.
    681  1.72      jmmv 			 * Discard it to avoid a later crash.
    682  1.72      jmmv 			 */
    683  1.72      jmmv 			ifp->if_ierrors++;
    684  1.72      jmmv 
    685  1.72      jmmv 			printf("%s: receive error: zero-length packet; "
    686  1.72      jmmv 			       "status = 0x%x\n",
    687  1.92    cegger 			       device_xname(&sc->vr_dev), rxstat);
    688  1.72      jmmv 
    689  1.72      jmmv 			VR_INIT_RXDESC(sc, i);
    690  1.72      jmmv 
    691  1.72      jmmv 			continue;
    692  1.72      jmmv 		}
    693  1.72      jmmv #endif
    694   1.1  sakamoto 
    695  1.74   thorpej 		/*
    696  1.74   thorpej 		 * The Rhine chip includes the CRC with every packet.
    697  1.74   thorpej 		 * Trim it off here.
    698  1.74   thorpej 		 */
    699  1.74   thorpej 		total_len -= ETHER_CRC_LEN;
    700  1.74   thorpej 
    701  1.17   thorpej #ifdef __NO_STRICT_ALIGNMENT
    702   1.1  sakamoto 		/*
    703  1.23   thorpej 		 * If the packet is small enough to fit in a
    704  1.23   thorpej 		 * single header mbuf, allocate one and copy
    705  1.23   thorpej 		 * the data into it.  This greatly reduces
    706  1.23   thorpej 		 * memory consumption when we receive lots
    707  1.23   thorpej 		 * of small packets.
    708  1.23   thorpej 		 *
    709  1.23   thorpej 		 * Otherwise, we add a new buffer to the receive
    710  1.23   thorpej 		 * chain.  If this fails, we drop the packet and
    711  1.23   thorpej 		 * recycle the old buffer.
    712   1.1  sakamoto 		 */
    713  1.23   thorpej 		if (vr_copy_small != 0 && total_len <= MHLEN) {
    714  1.23   thorpej 			MGETHDR(m, M_DONTWAIT, MT_DATA);
    715  1.23   thorpej 			if (m == NULL)
    716  1.23   thorpej 				goto dropit;
    717  1.85  christos 			memcpy(mtod(m, void *),
    718  1.85  christos 			    mtod(ds->ds_mbuf, void *), total_len);
    719  1.18   thorpej 			VR_INIT_RXDESC(sc, i);
    720  1.18   thorpej 			bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
    721  1.23   thorpej 			    ds->ds_dmamap->dm_mapsize,
    722  1.23   thorpej 			    BUS_DMASYNC_PREREAD);
    723  1.23   thorpej 		} else {
    724  1.23   thorpej 			m = ds->ds_mbuf;
    725  1.23   thorpej 			if (vr_add_rxbuf(sc, i) == ENOBUFS) {
    726  1.23   thorpej  dropit:
    727  1.23   thorpej 				ifp->if_ierrors++;
    728  1.23   thorpej 				VR_INIT_RXDESC(sc, i);
    729  1.23   thorpej 				bus_dmamap_sync(sc->vr_dmat,
    730  1.23   thorpej 				    ds->ds_dmamap, 0,
    731  1.23   thorpej 				    ds->ds_dmamap->dm_mapsize,
    732  1.23   thorpej 				    BUS_DMASYNC_PREREAD);
    733  1.23   thorpej 				continue;
    734  1.23   thorpej 			}
    735   1.1  sakamoto 		}
    736  1.17   thorpej #else
    737  1.17   thorpej 		/*
    738  1.17   thorpej 		 * The Rhine's packet buffers must be 4-byte aligned.
    739  1.17   thorpej 		 * But this means that the data after the Ethernet header
    740  1.17   thorpej 		 * is misaligned.  We must allocate a new buffer and
    741  1.17   thorpej 		 * copy the data, shifted forward 2 bytes.
    742  1.17   thorpej 		 */
    743  1.17   thorpej 		MGETHDR(m, M_DONTWAIT, MT_DATA);
    744  1.17   thorpej 		if (m == NULL) {
    745  1.17   thorpej  dropit:
    746  1.17   thorpej 			ifp->if_ierrors++;
    747  1.18   thorpej 			VR_INIT_RXDESC(sc, i);
    748  1.18   thorpej 			bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
    749  1.18   thorpej 			    ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
    750  1.17   thorpej 			continue;
    751  1.17   thorpej 		}
    752  1.17   thorpej 		if (total_len > (MHLEN - 2)) {
    753  1.17   thorpej 			MCLGET(m, M_DONTWAIT);
    754  1.20   thorpej 			if ((m->m_flags & M_EXT) == 0) {
    755  1.20   thorpej 				m_freem(m);
    756  1.17   thorpej 				goto dropit;
    757  1.20   thorpej 			}
    758  1.17   thorpej 		}
    759  1.17   thorpej 		m->m_data += 2;
    760  1.17   thorpej 
    761  1.17   thorpej 		/*
    762  1.17   thorpej 		 * Note that we use clusters for incoming frames, so the
    763  1.17   thorpej 		 * buffer is virtually contiguous.
    764  1.17   thorpej 		 */
    765  1.85  christos 		memcpy(mtod(m, void *), mtod(ds->ds_mbuf, void *),
    766  1.17   thorpej 		    total_len);
    767  1.17   thorpej 
    768  1.47       wiz 		/* Allow the receive descriptor to continue using its mbuf. */
    769  1.18   thorpej 		VR_INIT_RXDESC(sc, i);
    770  1.18   thorpej 		bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
    771  1.18   thorpej 		    ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
    772  1.17   thorpej #endif /* __NO_STRICT_ALIGNMENT */
    773  1.40   thorpej 
    774   1.1  sakamoto 		ifp->if_ipackets++;
    775   1.1  sakamoto 		m->m_pkthdr.rcvif = ifp;
    776   1.1  sakamoto 		m->m_pkthdr.len = m->m_len = total_len;
    777   1.1  sakamoto #if NBPFILTER > 0
    778   1.1  sakamoto 		/*
    779   1.1  sakamoto 		 * Handle BPF listeners. Let the BPF user see the packet, but
    780   1.1  sakamoto 		 * don't pass it up to the ether_input() layer unless it's
    781   1.1  sakamoto 		 * a broadcast packet, multicast packet, matches our ethernet
    782   1.1  sakamoto 		 * address or the interface is in promiscuous mode.
    783   1.1  sakamoto 		 */
    784  1.38   thorpej 		if (ifp->if_bpf)
    785   1.2  sakamoto 			bpf_mtap(ifp->if_bpf, m);
    786   1.1  sakamoto #endif
    787  1.22   thorpej 		/* Pass it on. */
    788  1.22   thorpej 		(*ifp->if_input)(ifp, m);
    789   1.1  sakamoto 	}
    790  1.18   thorpej 
    791  1.18   thorpej 	/* Update the receive pointer. */
    792  1.18   thorpej 	sc->vr_rxptr = i;
    793   1.1  sakamoto }
    794   1.1  sakamoto 
    795  1.15   thorpej void
    796  1.69   thorpej vr_rxeoc(struct vr_softc *sc)
    797   1.1  sakamoto {
    798  1.80   tsutsui 	struct ifnet *ifp;
    799  1.80   tsutsui 	int i;
    800  1.80   tsutsui 
    801  1.80   tsutsui 	ifp = &sc->vr_ec.ec_if;
    802  1.80   tsutsui 
    803  1.80   tsutsui 	ifp->if_ierrors++;
    804  1.80   tsutsui 
    805  1.80   tsutsui 	VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
    806  1.80   tsutsui 	for (i = 0; i < VR_TIMEOUT; i++) {
    807  1.80   tsutsui 		DELAY(10);
    808  1.80   tsutsui 		if ((CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON) == 0)
    809  1.80   tsutsui 			break;
    810  1.80   tsutsui 	}
    811  1.80   tsutsui 	if (i == VR_TIMEOUT) {
    812  1.80   tsutsui 		/* XXX need reset? */
    813  1.80   tsutsui 		printf("%s: RX shutdown never complete\n",
    814  1.92    cegger 		    device_xname(&sc->vr_dev));
    815  1.80   tsutsui 	}
    816   1.1  sakamoto 
    817   1.1  sakamoto 	vr_rxeof(sc);
    818  1.80   tsutsui 
    819  1.18   thorpej 	CSR_WRITE_4(sc, VR_RXADDR, VR_CDRXADDR(sc, sc->vr_rxptr));
    820   1.1  sakamoto 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
    821   1.1  sakamoto 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
    822   1.1  sakamoto }
    823   1.1  sakamoto 
    824   1.1  sakamoto /*
    825   1.1  sakamoto  * A frame was downloaded to the chip. It's safe for us to clean up
    826   1.1  sakamoto  * the list buffers.
    827   1.1  sakamoto  */
    828  1.15   thorpej static void
    829  1.69   thorpej vr_txeof(struct vr_softc *sc)
    830   1.1  sakamoto {
    831  1.18   thorpej 	struct ifnet *ifp = &sc->vr_ec.ec_if;
    832  1.18   thorpej 	struct vr_desc *d;
    833  1.18   thorpej 	struct vr_descsoft *ds;
    834  1.83   tsutsui 	uint32_t txstat;
    835  1.82   tsutsui 	int i, j;
    836   1.1  sakamoto 
    837  1.18   thorpej 	ifp->if_flags &= ~IFF_OACTIVE;
    838   1.1  sakamoto 
    839   1.1  sakamoto 	/*
    840   1.1  sakamoto 	 * Go through our tx list and free mbufs for those
    841   1.1  sakamoto 	 * frames that have been transmitted.
    842   1.1  sakamoto 	 */
    843  1.18   thorpej 	for (i = sc->vr_txdirty; sc->vr_txpending != 0;
    844  1.18   thorpej 	     i = VR_NEXTTX(i), sc->vr_txpending--) {
    845  1.18   thorpej 		d = VR_CDTX(sc, i);
    846  1.18   thorpej 		ds = VR_DSTX(sc, i);
    847   1.1  sakamoto 
    848  1.18   thorpej 		VR_CDTXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    849   1.1  sakamoto 
    850  1.30   thorpej 		txstat = le32toh(d->vr_status);
    851  1.82   tsutsui 
    852  1.82   tsutsui 		if (txstat & (VR_TXSTAT_ABRT | VR_TXSTAT_UDF)) {
    853  1.82   tsutsui 			VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_TX_ON);
    854  1.82   tsutsui 			for (j = 0; j < VR_TIMEOUT; j++) {
    855  1.82   tsutsui 				DELAY(10);
    856  1.82   tsutsui 				if ((CSR_READ_2(sc, VR_COMMAND) &
    857  1.82   tsutsui 				    VR_CMD_TX_ON) == 0)
    858  1.82   tsutsui 					break;
    859  1.82   tsutsui 			}
    860  1.82   tsutsui 			if (j == VR_TIMEOUT) {
    861  1.82   tsutsui 				/* XXX need reset? */
    862  1.82   tsutsui 				printf("%s: TX shutdown never complete\n",
    863  1.92    cegger 				    device_xname(&sc->vr_dev));
    864  1.82   tsutsui 			}
    865  1.82   tsutsui 			d->vr_status = htole32(VR_TXSTAT_OWN);
    866  1.82   tsutsui 			CSR_WRITE_4(sc, VR_TXADDR, VR_CDTXADDR(sc, i));
    867  1.82   tsutsui 			break;
    868  1.82   tsutsui 		}
    869  1.82   tsutsui 
    870   1.1  sakamoto 		if (txstat & VR_TXSTAT_OWN)
    871   1.1  sakamoto 			break;
    872   1.1  sakamoto 
    873  1.18   thorpej 		bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap,
    874  1.18   thorpej 		    0, ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
    875  1.18   thorpej 		bus_dmamap_unload(sc->vr_dmat, ds->ds_dmamap);
    876  1.18   thorpej 		m_freem(ds->ds_mbuf);
    877  1.18   thorpej 		ds->ds_mbuf = NULL;
    878  1.18   thorpej 
    879   1.1  sakamoto 		if (txstat & VR_TXSTAT_ERRSUM) {
    880   1.1  sakamoto 			ifp->if_oerrors++;
    881   1.1  sakamoto 			if (txstat & VR_TXSTAT_DEFER)
    882   1.1  sakamoto 				ifp->if_collisions++;
    883   1.1  sakamoto 			if (txstat & VR_TXSTAT_LATECOLL)
    884   1.1  sakamoto 				ifp->if_collisions++;
    885   1.1  sakamoto 		}
    886   1.1  sakamoto 
    887  1.18   thorpej 		ifp->if_collisions += (txstat & VR_TXSTAT_COLLCNT) >> 3;
    888   1.1  sakamoto 		ifp->if_opackets++;
    889   1.1  sakamoto 	}
    890   1.1  sakamoto 
    891  1.18   thorpej 	/* Update the dirty transmit buffer pointer. */
    892  1.18   thorpej 	sc->vr_txdirty = i;
    893   1.1  sakamoto 
    894  1.18   thorpej 	/*
    895  1.18   thorpej 	 * Cancel the watchdog timer if there are no pending
    896  1.18   thorpej 	 * transmissions.
    897  1.18   thorpej 	 */
    898  1.18   thorpej 	if (sc->vr_txpending == 0)
    899  1.18   thorpej 		ifp->if_timer = 0;
    900   1.1  sakamoto }
    901   1.1  sakamoto 
    902  1.16   thorpej static int
    903  1.69   thorpej vr_intr(void *arg)
    904   1.1  sakamoto {
    905  1.15   thorpej 	struct vr_softc *sc;
    906  1.15   thorpej 	struct ifnet *ifp;
    907  1.83   tsutsui 	uint16_t status;
    908  1.18   thorpej 	int handled = 0, dotx = 0;
    909   1.1  sakamoto 
    910   1.1  sakamoto 	sc = arg;
    911   1.6   thorpej 	ifp = &sc->vr_ec.ec_if;
    912   1.1  sakamoto 
    913  1.18   thorpej 	/* Suppress unwanted interrupts. */
    914  1.16   thorpej 	if ((ifp->if_flags & IFF_UP) == 0) {
    915  1.39   thorpej 		vr_stop(ifp, 1);
    916  1.16   thorpej 		return (0);
    917   1.1  sakamoto 	}
    918   1.1  sakamoto 
    919   1.1  sakamoto 	/* Disable interrupts. */
    920   1.1  sakamoto 	CSR_WRITE_2(sc, VR_IMR, 0x0000);
    921   1.1  sakamoto 
    922   1.1  sakamoto 	for (;;) {
    923   1.1  sakamoto 		status = CSR_READ_2(sc, VR_ISR);
    924   1.1  sakamoto 		if (status)
    925   1.1  sakamoto 			CSR_WRITE_2(sc, VR_ISR, status);
    926   1.1  sakamoto 
    927   1.1  sakamoto 		if ((status & VR_INTRS) == 0)
    928   1.1  sakamoto 			break;
    929   1.1  sakamoto 
    930  1.16   thorpej 		handled = 1;
    931  1.16   thorpej 
    932  1.68  jdolecek #if NRND > 0
    933  1.68  jdolecek 		if (RND_ENABLED(&sc->rnd_source))
    934  1.68  jdolecek 			rnd_add_uint32(&sc->rnd_source, status);
    935  1.68  jdolecek #endif
    936  1.68  jdolecek 
    937   1.1  sakamoto 		if (status & VR_ISR_RX_OK)
    938   1.1  sakamoto 			vr_rxeof(sc);
    939   1.1  sakamoto 
    940  1.80   tsutsui 		if (status & VR_ISR_RX_DROPPED) {
    941  1.92    cegger 			printf("%s: rx packet lost\n", device_xname(&sc->vr_dev));
    942  1.80   tsutsui 			ifp->if_ierrors++;
    943  1.80   tsutsui 		}
    944  1.80   tsutsui 
    945  1.18   thorpej 		if (status &
    946  1.80   tsutsui 		    (VR_ISR_RX_ERR | VR_ISR_RX_NOBUF | VR_ISR_RX_OFLOW))
    947   1.1  sakamoto 			vr_rxeoc(sc);
    948   1.1  sakamoto 
    949  1.82   tsutsui 
    950  1.82   tsutsui 		if (status & (VR_ISR_BUSERR | VR_ISR_TX_UNDERRUN)) {
    951  1.82   tsutsui 			if (status & VR_ISR_BUSERR)
    952  1.82   tsutsui 				printf("%s: PCI bus error\n",
    953  1.92    cegger 				    device_xname(&sc->vr_dev));
    954  1.82   tsutsui 			if (status & VR_ISR_TX_UNDERRUN)
    955  1.82   tsutsui 				printf("%s: transmit underrun\n",
    956  1.92    cegger 				    device_xname(&sc->vr_dev));
    957  1.82   tsutsui 			/* vr_init() calls vr_start() */
    958  1.82   tsutsui 			dotx = 0;
    959  1.82   tsutsui 			(void)vr_init(ifp);
    960  1.82   tsutsui 
    961  1.82   tsutsui 		}
    962  1.82   tsutsui 
    963   1.1  sakamoto 		if (status & VR_ISR_TX_OK) {
    964  1.18   thorpej 			dotx = 1;
    965   1.1  sakamoto 			vr_txeof(sc);
    966   1.1  sakamoto 		}
    967   1.1  sakamoto 
    968  1.82   tsutsui 		if (status &
    969  1.82   tsutsui 		    (VR_ISR_TX_ABRT | VR_ISR_TX_ABRT2 | VR_ISR_TX_UDFI)) {
    970  1.82   tsutsui 			if (status & (VR_ISR_TX_ABRT | VR_ISR_TX_ABRT2))
    971  1.82   tsutsui 				printf("%s: transmit aborted\n",
    972  1.92    cegger 				    device_xname(&sc->vr_dev));
    973  1.82   tsutsui 			if (status & VR_ISR_TX_UDFI)
    974  1.82   tsutsui 				printf("%s: transmit underflow\n",
    975  1.92    cegger 				    device_xname(&sc->vr_dev));
    976   1.1  sakamoto 			ifp->if_oerrors++;
    977  1.18   thorpej 			dotx = 1;
    978   1.1  sakamoto 			vr_txeof(sc);
    979  1.18   thorpej 			if (sc->vr_txpending) {
    980   1.1  sakamoto 				VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON);
    981   1.1  sakamoto 				VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO);
    982  1.54  christos 			}
    983   1.1  sakamoto 		}
    984   1.1  sakamoto 	}
    985   1.1  sakamoto 
    986   1.1  sakamoto 	/* Re-enable interrupts. */
    987   1.1  sakamoto 	CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
    988   1.1  sakamoto 
    989  1.18   thorpej 	if (dotx)
    990   1.1  sakamoto 		vr_start(ifp);
    991  1.16   thorpej 
    992  1.16   thorpej 	return (handled);
    993   1.1  sakamoto }
    994   1.1  sakamoto 
    995   1.1  sakamoto /*
    996   1.1  sakamoto  * Main transmit routine. To avoid having to do mbuf copies, we put pointers
    997   1.1  sakamoto  * to the mbuf data regions directly in the transmit lists. We also save a
    998   1.1  sakamoto  * copy of the pointers since the transmit list fragment pointers are
    999   1.1  sakamoto  * physical addresses.
   1000   1.1  sakamoto  */
   1001  1.15   thorpej static void
   1002  1.69   thorpej vr_start(struct ifnet *ifp)
   1003   1.1  sakamoto {
   1004  1.18   thorpej 	struct vr_softc *sc = ifp->if_softc;
   1005  1.18   thorpej 	struct mbuf *m0, *m;
   1006  1.18   thorpej 	struct vr_desc *d;
   1007  1.18   thorpej 	struct vr_descsoft *ds;
   1008  1.18   thorpej 	int error, firsttx, nexttx, opending;
   1009   1.1  sakamoto 
   1010  1.18   thorpej 	/*
   1011  1.18   thorpej 	 * Remember the previous txpending and the first transmit
   1012  1.18   thorpej 	 * descriptor we use.
   1013  1.18   thorpej 	 */
   1014  1.18   thorpej 	opending = sc->vr_txpending;
   1015  1.18   thorpej 	firsttx = VR_NEXTTX(sc->vr_txlast);
   1016   1.1  sakamoto 
   1017   1.1  sakamoto 	/*
   1018  1.18   thorpej 	 * Loop through the send queue, setting up transmit descriptors
   1019  1.18   thorpej 	 * until we drain the queue, or use up all available transmit
   1020  1.18   thorpej 	 * descriptors.
   1021   1.1  sakamoto 	 */
   1022  1.18   thorpej 	while (sc->vr_txpending < VR_NTXDESC) {
   1023  1.18   thorpej 		/*
   1024  1.18   thorpej 		 * Grab a packet off the queue.
   1025  1.18   thorpej 		 */
   1026  1.42   thorpej 		IFQ_POLL(&ifp->if_snd, m0);
   1027  1.18   thorpej 		if (m0 == NULL)
   1028  1.18   thorpej 			break;
   1029  1.43   thorpej 		m = NULL;
   1030   1.1  sakamoto 
   1031  1.18   thorpej 		/*
   1032  1.18   thorpej 		 * Get the next available transmit descriptor.
   1033  1.18   thorpej 		 */
   1034  1.18   thorpej 		nexttx = VR_NEXTTX(sc->vr_txlast);
   1035  1.18   thorpej 		d = VR_CDTX(sc, nexttx);
   1036  1.18   thorpej 		ds = VR_DSTX(sc, nexttx);
   1037   1.1  sakamoto 
   1038  1.18   thorpej 		/*
   1039  1.18   thorpej 		 * Load the DMA map.  If this fails, the packet didn't
   1040  1.18   thorpej 		 * fit in one DMA segment, and we need to copy.  Note,
   1041  1.18   thorpej 		 * the packet must also be aligned.
   1042  1.60    bouyer 		 * if the packet is too small, copy it too, so we're sure
   1043  1.71      jmmv 		 * we have enough room for the pad buffer.
   1044  1.18   thorpej 		 */
   1045  1.52       mrg 		if ((mtod(m0, uintptr_t) & 3) != 0 ||
   1046  1.60    bouyer 		    m0->m_pkthdr.len < VR_MIN_FRAMELEN ||
   1047  1.18   thorpej 		    bus_dmamap_load_mbuf(sc->vr_dmat, ds->ds_dmamap, m0,
   1048  1.50   thorpej 		     BUS_DMA_WRITE|BUS_DMA_NOWAIT) != 0) {
   1049  1.18   thorpej 			MGETHDR(m, M_DONTWAIT, MT_DATA);
   1050  1.18   thorpej 			if (m == NULL) {
   1051  1.18   thorpej 				printf("%s: unable to allocate Tx mbuf\n",
   1052  1.92    cegger 				    device_xname(&sc->vr_dev));
   1053  1.18   thorpej 				break;
   1054  1.18   thorpej 			}
   1055  1.18   thorpej 			if (m0->m_pkthdr.len > MHLEN) {
   1056  1.18   thorpej 				MCLGET(m, M_DONTWAIT);
   1057  1.18   thorpej 				if ((m->m_flags & M_EXT) == 0) {
   1058  1.18   thorpej 					printf("%s: unable to allocate Tx "
   1059  1.92    cegger 					    "cluster\n", device_xname(&sc->vr_dev));
   1060  1.18   thorpej 					m_freem(m);
   1061  1.18   thorpej 					break;
   1062  1.18   thorpej 				}
   1063  1.18   thorpej 			}
   1064  1.85  christos 			m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *));
   1065  1.18   thorpej 			m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
   1066  1.60    bouyer 			/*
   1067  1.60    bouyer 			 * The Rhine doesn't auto-pad, so we have to do this
   1068  1.60    bouyer 			 * ourselves.
   1069  1.60    bouyer 			 */
   1070  1.60    bouyer 			if (m0->m_pkthdr.len < VR_MIN_FRAMELEN) {
   1071  1.85  christos 				memset(mtod(m, char *) + m0->m_pkthdr.len,
   1072  1.60    bouyer 				    0, VR_MIN_FRAMELEN - m0->m_pkthdr.len);
   1073  1.60    bouyer 				m->m_pkthdr.len = m->m_len = VR_MIN_FRAMELEN;
   1074  1.60    bouyer 			}
   1075  1.18   thorpej 			error = bus_dmamap_load_mbuf(sc->vr_dmat,
   1076  1.50   thorpej 			    ds->ds_dmamap, m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
   1077  1.18   thorpej 			if (error) {
   1078  1.73       scw 				m_freem(m);
   1079  1.18   thorpej 				printf("%s: unable to load Tx buffer, "
   1080  1.92    cegger 				    "error = %d\n", device_xname(&sc->vr_dev), error);
   1081  1.18   thorpej 				break;
   1082  1.18   thorpej 			}
   1083  1.18   thorpej 		}
   1084   1.1  sakamoto 
   1085  1.42   thorpej 		IFQ_DEQUEUE(&ifp->if_snd, m0);
   1086  1.43   thorpej 		if (m != NULL) {
   1087  1.43   thorpej 			m_freem(m0);
   1088  1.43   thorpej 			m0 = m;
   1089  1.43   thorpej 		}
   1090  1.42   thorpej 
   1091  1.18   thorpej 		/* Sync the DMA map. */
   1092  1.18   thorpej 		bus_dmamap_sync(sc->vr_dmat, ds->ds_dmamap, 0,
   1093  1.18   thorpej 		    ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
   1094   1.1  sakamoto 
   1095  1.18   thorpej 		/*
   1096  1.18   thorpej 		 * Store a pointer to the packet so we can free it later.
   1097  1.18   thorpej 		 */
   1098  1.18   thorpej 		ds->ds_mbuf = m0;
   1099   1.1  sakamoto 
   1100   1.1  sakamoto #if NBPFILTER > 0
   1101   1.1  sakamoto 		/*
   1102   1.1  sakamoto 		 * If there's a BPF listener, bounce a copy of this frame
   1103   1.1  sakamoto 		 * to him.
   1104   1.1  sakamoto 		 */
   1105   1.1  sakamoto 		if (ifp->if_bpf)
   1106  1.18   thorpej 			bpf_mtap(ifp->if_bpf, m0);
   1107   1.2  sakamoto #endif
   1108  1.18   thorpej 
   1109  1.18   thorpej 		/*
   1110  1.60    bouyer 		 * Fill in the transmit descriptor.
   1111  1.18   thorpej 		 */
   1112  1.30   thorpej 		d->vr_data = htole32(ds->ds_dmamap->dm_segs[0].ds_addr);
   1113  1.60    bouyer 		d->vr_ctl = htole32(m0->m_pkthdr.len);
   1114  1.65   tsutsui 		d->vr_ctl |= htole32(VR_TXCTL_FIRSTFRAG | VR_TXCTL_LASTFRAG);
   1115  1.64   tsutsui 
   1116  1.18   thorpej 		/*
   1117  1.18   thorpej 		 * If this is the first descriptor we're enqueuing,
   1118  1.18   thorpej 		 * don't give it to the Rhine yet.  That could cause
   1119  1.18   thorpej 		 * a race condition.  We'll do it below.
   1120  1.18   thorpej 		 */
   1121  1.18   thorpej 		if (nexttx == firsttx)
   1122  1.18   thorpej 			d->vr_status = 0;
   1123  1.18   thorpej 		else
   1124  1.30   thorpej 			d->vr_status = htole32(VR_TXSTAT_OWN);
   1125  1.18   thorpej 
   1126  1.18   thorpej 		VR_CDTXSYNC(sc, nexttx,
   1127  1.18   thorpej 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1128  1.18   thorpej 
   1129  1.18   thorpej 		/* Advance the tx pointer. */
   1130  1.18   thorpej 		sc->vr_txpending++;
   1131  1.18   thorpej 		sc->vr_txlast = nexttx;
   1132  1.18   thorpej 	}
   1133  1.18   thorpej 
   1134  1.18   thorpej 	if (sc->vr_txpending == VR_NTXDESC) {
   1135  1.18   thorpej 		/* No more slots left; notify upper layer. */
   1136  1.18   thorpej 		ifp->if_flags |= IFF_OACTIVE;
   1137   1.1  sakamoto 	}
   1138   1.1  sakamoto 
   1139  1.18   thorpej 	if (sc->vr_txpending != opending) {
   1140  1.18   thorpej 		/*
   1141  1.18   thorpej 		 * We enqueued packets.  If the transmitter was idle,
   1142  1.18   thorpej 		 * reset the txdirty pointer.
   1143  1.18   thorpej 		 */
   1144  1.18   thorpej 		if (opending == 0)
   1145  1.18   thorpej 			sc->vr_txdirty = firsttx;
   1146  1.18   thorpej 
   1147  1.18   thorpej 		/*
   1148  1.18   thorpej 		 * Cause a transmit interrupt to happen on the
   1149  1.18   thorpej 		 * last packet we enqueued.
   1150  1.18   thorpej 		 */
   1151  1.30   thorpej 		VR_CDTX(sc, sc->vr_txlast)->vr_ctl |= htole32(VR_TXCTL_FINT);
   1152  1.18   thorpej 		VR_CDTXSYNC(sc, sc->vr_txlast,
   1153  1.18   thorpej 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1154   1.1  sakamoto 
   1155  1.18   thorpej 		/*
   1156  1.18   thorpej 		 * The entire packet chain is set up.  Give the
   1157  1.18   thorpej 		 * first descriptor to the Rhine now.
   1158  1.18   thorpej 		 */
   1159  1.30   thorpej 		VR_CDTX(sc, firsttx)->vr_status = htole32(VR_TXSTAT_OWN);
   1160  1.18   thorpej 		VR_CDTXSYNC(sc, firsttx,
   1161  1.18   thorpej 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1162   1.1  sakamoto 
   1163  1.18   thorpej 		/* Start the transmitter. */
   1164  1.65   tsutsui 		VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO);
   1165   1.1  sakamoto 
   1166  1.18   thorpej 		/* Set the watchdog timer in case the chip flakes out. */
   1167  1.18   thorpej 		ifp->if_timer = 5;
   1168  1.18   thorpej 	}
   1169   1.1  sakamoto }
   1170   1.1  sakamoto 
   1171  1.13   thorpej /*
   1172  1.13   thorpej  * Initialize the interface.  Must be called at splnet.
   1173  1.13   thorpej  */
   1174  1.23   thorpej static int
   1175  1.69   thorpej vr_init(struct ifnet *ifp)
   1176   1.1  sakamoto {
   1177  1.39   thorpej 	struct vr_softc *sc = ifp->if_softc;
   1178  1.18   thorpej 	struct vr_desc *d;
   1179  1.23   thorpej 	struct vr_descsoft *ds;
   1180  1.25       hwr 	int i, error = 0;
   1181   1.1  sakamoto 
   1182  1.18   thorpej 	/* Cancel pending I/O. */
   1183  1.39   thorpej 	vr_stop(ifp, 0);
   1184  1.18   thorpej 
   1185  1.18   thorpej 	/* Reset the Rhine to a known state. */
   1186   1.1  sakamoto 	vr_reset(sc);
   1187   1.1  sakamoto 
   1188  1.65   tsutsui 	/* set DMA length in BCR0 and BCR1 */
   1189  1.65   tsutsui 	VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
   1190  1.65   tsutsui 	VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
   1191  1.65   tsutsui 
   1192  1.65   tsutsui 	VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
   1193  1.65   tsutsui 	VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTH_128BYTES);
   1194  1.65   tsutsui 
   1195  1.65   tsutsui 	VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
   1196  1.65   tsutsui 	VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTH_STORENFWD);
   1197  1.65   tsutsui 
   1198  1.65   tsutsui 	/* set DMA threshold length in RXCFG and TXCFG */
   1199   1.1  sakamoto 	VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
   1200  1.65   tsutsui 	VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
   1201   1.1  sakamoto 
   1202   1.1  sakamoto 	VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
   1203   1.1  sakamoto 	VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD);
   1204   1.1  sakamoto 
   1205   1.1  sakamoto 	/*
   1206  1.72      jmmv 	 * Initialize the transmit descriptor ring.  txlast is initialized
   1207  1.18   thorpej 	 * to the end of the list so that it will wrap around to the first
   1208  1.18   thorpej 	 * descriptor when the first packet is transmitted.
   1209  1.18   thorpej 	 */
   1210  1.18   thorpej 	for (i = 0; i < VR_NTXDESC; i++) {
   1211  1.18   thorpej 		d = VR_CDTX(sc, i);
   1212  1.18   thorpej 		memset(d, 0, sizeof(struct vr_desc));
   1213  1.30   thorpej 		d->vr_next = htole32(VR_CDTXADDR(sc, VR_NEXTTX(i)));
   1214  1.18   thorpej 		VR_CDTXSYNC(sc, i, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1215  1.18   thorpej 	}
   1216  1.18   thorpej 	sc->vr_txpending = 0;
   1217  1.18   thorpej 	sc->vr_txdirty = 0;
   1218  1.18   thorpej 	sc->vr_txlast = VR_NTXDESC - 1;
   1219  1.18   thorpej 
   1220  1.18   thorpej 	/*
   1221  1.23   thorpej 	 * Initialize the receive descriptor ring.
   1222  1.18   thorpej 	 */
   1223  1.23   thorpej 	for (i = 0; i < VR_NRXDESC; i++) {
   1224  1.23   thorpej 		ds = VR_DSRX(sc, i);
   1225  1.23   thorpej 		if (ds->ds_mbuf == NULL) {
   1226  1.23   thorpej 			if ((error = vr_add_rxbuf(sc, i)) != 0) {
   1227  1.23   thorpej 				printf("%s: unable to allocate or map rx "
   1228  1.23   thorpej 				    "buffer %d, error = %d\n",
   1229  1.92    cegger 				    device_xname(&sc->vr_dev), i, error);
   1230  1.23   thorpej 				/*
   1231  1.23   thorpej 				 * XXX Should attempt to run with fewer receive
   1232  1.23   thorpej 				 * XXX buffers instead of just failing.
   1233  1.23   thorpej 				 */
   1234  1.23   thorpej 				vr_rxdrain(sc);
   1235  1.23   thorpej 				goto out;
   1236  1.23   thorpej 			}
   1237  1.51   thorpej 		} else
   1238  1.51   thorpej 			VR_INIT_RXDESC(sc, i);
   1239  1.23   thorpej 	}
   1240  1.18   thorpej 	sc->vr_rxptr = 0;
   1241   1.1  sakamoto 
   1242   1.1  sakamoto 	/* If we want promiscuous mode, set the allframes bit. */
   1243   1.1  sakamoto 	if (ifp->if_flags & IFF_PROMISC)
   1244   1.1  sakamoto 		VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
   1245   1.1  sakamoto 	else
   1246   1.1  sakamoto 		VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
   1247   1.1  sakamoto 
   1248   1.1  sakamoto 	/* Set capture broadcast bit to capture broadcast frames. */
   1249   1.1  sakamoto 	if (ifp->if_flags & IFF_BROADCAST)
   1250   1.1  sakamoto 		VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
   1251   1.1  sakamoto 	else
   1252   1.1  sakamoto 		VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
   1253   1.1  sakamoto 
   1254  1.18   thorpej 	/* Program the multicast filter, if necessary. */
   1255   1.1  sakamoto 	vr_setmulti(sc);
   1256   1.1  sakamoto 
   1257  1.47       wiz 	/* Give the transmit and receive rings to the Rhine. */
   1258  1.18   thorpej 	CSR_WRITE_4(sc, VR_RXADDR, VR_CDRXADDR(sc, sc->vr_rxptr));
   1259  1.18   thorpej 	CSR_WRITE_4(sc, VR_TXADDR, VR_CDTXADDR(sc, VR_NEXTTX(sc->vr_txlast)));
   1260  1.18   thorpej 
   1261  1.18   thorpej 	/* Set current media. */
   1262  1.89    dyoung 	if ((error = ether_mediachange(ifp)) != 0)
   1263  1.89    dyoung 		goto out;
   1264   1.1  sakamoto 
   1265   1.1  sakamoto 	/* Enable receiver and transmitter. */
   1266   1.1  sakamoto 	CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
   1267   1.1  sakamoto 				    VR_CMD_TX_ON|VR_CMD_RX_ON|
   1268   1.1  sakamoto 				    VR_CMD_RX_GO);
   1269   1.1  sakamoto 
   1270  1.18   thorpej 	/* Enable interrupts. */
   1271   1.1  sakamoto 	CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
   1272   1.1  sakamoto 	CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
   1273   1.1  sakamoto 
   1274   1.1  sakamoto 	ifp->if_flags |= IFF_RUNNING;
   1275   1.1  sakamoto 	ifp->if_flags &= ~IFF_OACTIVE;
   1276   1.1  sakamoto 
   1277  1.11   thorpej 	/* Start one second timer. */
   1278  1.34   thorpej 	callout_reset(&sc->vr_tick_ch, hz, vr_tick, sc);
   1279  1.18   thorpej 
   1280  1.18   thorpej 	/* Attempt to start output on the interface. */
   1281  1.18   thorpej 	vr_start(ifp);
   1282  1.23   thorpej 
   1283  1.23   thorpej  out:
   1284  1.23   thorpej 	if (error)
   1285  1.92    cegger 		printf("%s: interface not running\n", device_xname(&sc->vr_dev));
   1286  1.23   thorpej 	return (error);
   1287   1.1  sakamoto }
   1288   1.1  sakamoto 
   1289  1.15   thorpej static int
   1290  1.85  christos vr_ioctl(struct ifnet *ifp, u_long command, void *data)
   1291  1.15   thorpej {
   1292  1.15   thorpej 	struct vr_softc *sc = ifp->if_softc;
   1293  1.15   thorpej 	int s, error = 0;
   1294   1.1  sakamoto 
   1295  1.12   thorpej 	s = splnet();
   1296   1.1  sakamoto 
   1297  1.89    dyoung 	error = ether_ioctl(ifp, command, data);
   1298  1.89    dyoung 	if (error == ENETRESET) {
   1299  1.89    dyoung 		/*
   1300  1.89    dyoung 		 * Multicast list has changed; set the hardware filter
   1301  1.89    dyoung 		 * accordingly.
   1302  1.89    dyoung 		 */
   1303  1.89    dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1304  1.89    dyoung 			vr_setmulti(sc);
   1305  1.89    dyoung 		error = 0;
   1306   1.1  sakamoto 	}
   1307   1.1  sakamoto 
   1308  1.13   thorpej 	splx(s);
   1309   1.2  sakamoto 	return (error);
   1310   1.1  sakamoto }
   1311   1.1  sakamoto 
   1312  1.15   thorpej static void
   1313  1.69   thorpej vr_watchdog(struct ifnet *ifp)
   1314   1.1  sakamoto {
   1315  1.18   thorpej 	struct vr_softc *sc = ifp->if_softc;
   1316   1.1  sakamoto 
   1317  1.92    cegger 	printf("%s: device timeout\n", device_xname(&sc->vr_dev));
   1318   1.1  sakamoto 	ifp->if_oerrors++;
   1319   1.1  sakamoto 
   1320  1.39   thorpej 	(void) vr_init(ifp);
   1321   1.1  sakamoto }
   1322   1.1  sakamoto 
   1323   1.1  sakamoto /*
   1324  1.11   thorpej  * One second timer, used to tick MII.
   1325  1.11   thorpej  */
   1326  1.11   thorpej static void
   1327  1.69   thorpej vr_tick(void *arg)
   1328  1.11   thorpej {
   1329  1.11   thorpej 	struct vr_softc *sc = arg;
   1330  1.11   thorpej 	int s;
   1331  1.11   thorpej 
   1332  1.12   thorpej 	s = splnet();
   1333  1.11   thorpej 	mii_tick(&sc->vr_mii);
   1334  1.11   thorpej 	splx(s);
   1335  1.11   thorpej 
   1336  1.34   thorpej 	callout_reset(&sc->vr_tick_ch, hz, vr_tick, sc);
   1337  1.11   thorpej }
   1338  1.11   thorpej 
   1339  1.11   thorpej /*
   1340  1.23   thorpej  * Drain the receive queue.
   1341  1.23   thorpej  */
   1342  1.23   thorpej static void
   1343  1.69   thorpej vr_rxdrain(struct vr_softc *sc)
   1344  1.23   thorpej {
   1345  1.23   thorpej 	struct vr_descsoft *ds;
   1346  1.23   thorpej 	int i;
   1347  1.23   thorpej 
   1348  1.23   thorpej 	for (i = 0; i < VR_NRXDESC; i++) {
   1349  1.23   thorpej 		ds = VR_DSRX(sc, i);
   1350  1.23   thorpej 		if (ds->ds_mbuf != NULL) {
   1351  1.23   thorpej 			bus_dmamap_unload(sc->vr_dmat, ds->ds_dmamap);
   1352  1.23   thorpej 			m_freem(ds->ds_mbuf);
   1353  1.23   thorpej 			ds->ds_mbuf = NULL;
   1354  1.23   thorpej 		}
   1355  1.23   thorpej 	}
   1356  1.23   thorpej }
   1357  1.23   thorpej 
   1358  1.23   thorpej /*
   1359   1.1  sakamoto  * Stop the adapter and free any mbufs allocated to the
   1360  1.18   thorpej  * transmit lists.
   1361   1.1  sakamoto  */
   1362  1.15   thorpej static void
   1363  1.69   thorpej vr_stop(struct ifnet *ifp, int disable)
   1364   1.1  sakamoto {
   1365  1.39   thorpej 	struct vr_softc *sc = ifp->if_softc;
   1366  1.18   thorpej 	struct vr_descsoft *ds;
   1367  1.15   thorpej 	int i;
   1368   1.1  sakamoto 
   1369  1.11   thorpej 	/* Cancel one second timer. */
   1370  1.34   thorpej 	callout_stop(&sc->vr_tick_ch);
   1371  1.28   thorpej 
   1372  1.28   thorpej 	/* Down the MII. */
   1373  1.28   thorpej 	mii_down(&sc->vr_mii);
   1374  1.11   thorpej 
   1375   1.6   thorpej 	ifp = &sc->vr_ec.ec_if;
   1376   1.1  sakamoto 	ifp->if_timer = 0;
   1377   1.1  sakamoto 
   1378   1.1  sakamoto 	VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
   1379   1.1  sakamoto 	VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));
   1380   1.1  sakamoto 	CSR_WRITE_2(sc, VR_IMR, 0x0000);
   1381   1.1  sakamoto 	CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
   1382   1.1  sakamoto 	CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
   1383   1.1  sakamoto 
   1384   1.1  sakamoto 	/*
   1385  1.18   thorpej 	 * Release any queued transmit buffers.
   1386   1.1  sakamoto 	 */
   1387  1.18   thorpej 	for (i = 0; i < VR_NTXDESC; i++) {
   1388  1.18   thorpej 		ds = VR_DSTX(sc, i);
   1389  1.18   thorpej 		if (ds->ds_mbuf != NULL) {
   1390  1.18   thorpej 			bus_dmamap_unload(sc->vr_dmat, ds->ds_dmamap);
   1391  1.18   thorpej 			m_freem(ds->ds_mbuf);
   1392  1.18   thorpej 			ds->ds_mbuf = NULL;
   1393   1.1  sakamoto 		}
   1394   1.1  sakamoto 	}
   1395   1.1  sakamoto 
   1396   1.1  sakamoto 	/*
   1397  1.18   thorpej 	 * Mark the interface down and cancel the watchdog timer.
   1398   1.1  sakamoto 	 */
   1399   1.1  sakamoto 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1400  1.18   thorpej 	ifp->if_timer = 0;
   1401  1.90    dyoung 
   1402  1.90    dyoung 	if (disable)
   1403  1.90    dyoung 		vr_rxdrain(sc);
   1404   1.1  sakamoto }
   1405   1.1  sakamoto 
   1406  1.91    dyoung static int	vr_probe(device_t, struct cfdata *, void *);
   1407  1.91    dyoung static void	vr_attach(device_t, device_t, void *);
   1408  1.69   thorpej static void	vr_shutdown(void *);
   1409   1.2  sakamoto 
   1410  1.56   thorpej CFATTACH_DECL(vr, sizeof (struct vr_softc),
   1411  1.57   thorpej     vr_probe, vr_attach, NULL, NULL);
   1412   1.2  sakamoto 
   1413   1.3  sakamoto static struct vr_type *
   1414  1.69   thorpej vr_lookup(struct pci_attach_args *pa)
   1415   1.3  sakamoto {
   1416   1.3  sakamoto 	struct vr_type *vrt;
   1417   1.3  sakamoto 
   1418   1.3  sakamoto 	for (vrt = vr_devs; vrt->vr_name != NULL; vrt++) {
   1419   1.3  sakamoto 		if (PCI_VENDOR(pa->pa_id) == vrt->vr_vid &&
   1420   1.3  sakamoto 		    PCI_PRODUCT(pa->pa_id) == vrt->vr_did)
   1421   1.3  sakamoto 			return (vrt);
   1422   1.3  sakamoto 	}
   1423   1.3  sakamoto 	return (NULL);
   1424   1.3  sakamoto }
   1425   1.3  sakamoto 
   1426   1.2  sakamoto static int
   1427  1.91    dyoung vr_probe(device_t parent, struct cfdata *match, void *aux)
   1428   1.2  sakamoto {
   1429   1.2  sakamoto 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
   1430   1.2  sakamoto 
   1431   1.3  sakamoto 	if (vr_lookup(pa) != NULL)
   1432   1.3  sakamoto 		return (1);
   1433   1.2  sakamoto 
   1434   1.2  sakamoto 	return (0);
   1435   1.2  sakamoto }
   1436   1.2  sakamoto 
   1437   1.2  sakamoto /*
   1438   1.2  sakamoto  * Stop all chip I/O so that the kernel's probe routines don't
   1439   1.2  sakamoto  * get confused by errant DMAs when rebooting.
   1440   1.2  sakamoto  */
   1441  1.15   thorpej static void
   1442  1.69   thorpej vr_shutdown(void *arg)
   1443   1.2  sakamoto {
   1444  1.15   thorpej 	struct vr_softc *sc = (struct vr_softc *)arg;
   1445   1.2  sakamoto 
   1446  1.39   thorpej 	vr_stop(&sc->vr_ec.ec_if, 1);
   1447   1.2  sakamoto }
   1448   1.2  sakamoto 
   1449   1.2  sakamoto /*
   1450   1.2  sakamoto  * Attach the interface. Allocate softc structures, do ifmedia
   1451   1.2  sakamoto  * setup and ethernet/BPF attach.
   1452   1.2  sakamoto  */
   1453   1.2  sakamoto static void
   1454  1.91    dyoung vr_attach(device_t parent, device_t self, void *aux)
   1455   1.2  sakamoto {
   1456  1.91    dyoung 	struct vr_softc *sc = device_private(self);
   1457  1.15   thorpej 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
   1458  1.18   thorpej 	bus_dma_segment_t seg;
   1459  1.15   thorpej 	struct vr_type *vrt;
   1460  1.83   tsutsui 	uint32_t reg;
   1461  1.15   thorpej 	struct ifnet *ifp;
   1462  1.83   tsutsui 	uint8_t eaddr[ETHER_ADDR_LEN], mac;
   1463  1.18   thorpej 	int i, rseg, error;
   1464  1.15   thorpej 
   1465  1.76  christos #define	PCI_CONF_WRITE(r, v)	pci_conf_write(sc->vr_pc, sc->vr_tag, (r), (v))
   1466  1.76  christos #define	PCI_CONF_READ(r)	pci_conf_read(sc->vr_pc, sc->vr_tag, (r))
   1467  1.34   thorpej 
   1468  1.76  christos 	sc->vr_pc = pa->pa_pc;
   1469  1.76  christos 	sc->vr_tag = pa->pa_tag;
   1470  1.87        ad 	callout_init(&sc->vr_tick_ch, 0);
   1471   1.2  sakamoto 
   1472   1.3  sakamoto 	vrt = vr_lookup(pa);
   1473   1.3  sakamoto 	if (vrt == NULL) {
   1474   1.3  sakamoto 		printf("\n");
   1475   1.3  sakamoto 		panic("vr_attach: impossible");
   1476   1.3  sakamoto 	}
   1477   1.3  sakamoto 
   1478   1.3  sakamoto 	printf(": %s Ethernet\n", vrt->vr_name);
   1479   1.2  sakamoto 
   1480   1.2  sakamoto 	/*
   1481   1.2  sakamoto 	 * Handle power management nonsense.
   1482   1.2  sakamoto 	 */
   1483   1.2  sakamoto 
   1484  1.76  christos 	sc->vr_save_iobase = PCI_CONF_READ(VR_PCI_LOIO);
   1485  1.76  christos 	sc->vr_save_membase = PCI_CONF_READ(VR_PCI_LOMEM);
   1486  1.76  christos 	sc->vr_save_irq = PCI_CONF_READ(PCI_INTERRUPT_REG);
   1487  1.76  christos 
   1488  1.76  christos 	/* power up chip */
   1489  1.91    dyoung 	if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
   1490  1.76  christos 	    vr_restore_state)) && error != EOPNOTSUPP) {
   1491  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "cannot activate %d\n",
   1492  1.76  christos 		    error);
   1493  1.76  christos 		return;
   1494   1.2  sakamoto 	}
   1495   1.2  sakamoto 
   1496  1.19   thorpej 	/* Make sure bus mastering is enabled. */
   1497  1.63   tsutsui 	reg = PCI_CONF_READ(PCI_COMMAND_STATUS_REG);
   1498  1.63   tsutsui 	reg |= PCI_COMMAND_MASTER_ENABLE;
   1499  1.63   tsutsui 	PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, reg);
   1500  1.19   thorpej 
   1501  1.59       lha 	/* Get revision */
   1502  1.63   tsutsui 	sc->vr_revid = PCI_REVISION(pa->pa_class);
   1503  1.64   tsutsui 
   1504   1.2  sakamoto 	/*
   1505   1.2  sakamoto 	 * Map control/status registers.
   1506   1.2  sakamoto 	 */
   1507   1.2  sakamoto 	{
   1508   1.2  sakamoto 		bus_space_tag_t iot, memt;
   1509   1.2  sakamoto 		bus_space_handle_t ioh, memh;
   1510   1.2  sakamoto 		int ioh_valid, memh_valid;
   1511   1.2  sakamoto 		pci_intr_handle_t intrhandle;
   1512   1.2  sakamoto 		const char *intrstr;
   1513   1.2  sakamoto 
   1514   1.2  sakamoto 		ioh_valid = (pci_mapreg_map(pa, VR_PCI_LOIO,
   1515   1.2  sakamoto 			PCI_MAPREG_TYPE_IO, 0,
   1516   1.2  sakamoto 			&iot, &ioh, NULL, NULL) == 0);
   1517   1.2  sakamoto 		memh_valid = (pci_mapreg_map(pa, VR_PCI_LOMEM,
   1518   1.2  sakamoto 			PCI_MAPREG_TYPE_MEM |
   1519   1.2  sakamoto 			PCI_MAPREG_MEM_TYPE_32BIT,
   1520   1.2  sakamoto 			0, &memt, &memh, NULL, NULL) == 0);
   1521   1.2  sakamoto #if defined(VR_USEIOSPACE)
   1522   1.2  sakamoto 		if (ioh_valid) {
   1523  1.14   thorpej 			sc->vr_bst = iot;
   1524  1.14   thorpej 			sc->vr_bsh = ioh;
   1525   1.2  sakamoto 		} else if (memh_valid) {
   1526  1.14   thorpej 			sc->vr_bst = memt;
   1527  1.14   thorpej 			sc->vr_bsh = memh;
   1528   1.2  sakamoto 		}
   1529   1.2  sakamoto #else
   1530   1.2  sakamoto 		if (memh_valid) {
   1531  1.14   thorpej 			sc->vr_bst = memt;
   1532  1.14   thorpej 			sc->vr_bsh = memh;
   1533   1.2  sakamoto 		} else if (ioh_valid) {
   1534  1.14   thorpej 			sc->vr_bst = iot;
   1535  1.14   thorpej 			sc->vr_bsh = ioh;
   1536   1.2  sakamoto 		}
   1537   1.2  sakamoto #endif
   1538   1.2  sakamoto 		else {
   1539   1.2  sakamoto 			printf(": unable to map device registers\n");
   1540   1.2  sakamoto 			return;
   1541   1.2  sakamoto 		}
   1542   1.2  sakamoto 
   1543   1.2  sakamoto 		/* Allocate interrupt */
   1544  1.44  sommerfe 		if (pci_intr_map(pa, &intrhandle)) {
   1545  1.92    cegger 			aprint_error_dev(&sc->vr_dev, "couldn't map interrupt\n");
   1546  1.15   thorpej 			return;
   1547   1.2  sakamoto 		}
   1548   1.2  sakamoto 		intrstr = pci_intr_string(pa->pa_pc, intrhandle);
   1549   1.2  sakamoto 		sc->vr_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
   1550  1.16   thorpej 						vr_intr, sc);
   1551   1.2  sakamoto 		if (sc->vr_ih == NULL) {
   1552  1.92    cegger 			aprint_error_dev(&sc->vr_dev, "couldn't establish interrupt");
   1553   1.2  sakamoto 			if (intrstr != NULL)
   1554   1.2  sakamoto 				printf(" at %s", intrstr);
   1555   1.2  sakamoto 			printf("\n");
   1556   1.2  sakamoto 		}
   1557   1.6   thorpej 		printf("%s: interrupting at %s\n",
   1558  1.92    cegger 			device_xname(&sc->vr_dev), intrstr);
   1559   1.2  sakamoto 	}
   1560  1.59       lha 
   1561  1.59       lha 	/*
   1562  1.59       lha 	 * Windows may put the chip in suspend mode when it
   1563  1.59       lha 	 * shuts down. Be sure to kick it in the head to wake it
   1564  1.59       lha 	 * up again.
   1565  1.81   tsutsui 	 *
   1566  1.81   tsutsui 	 * Don't touch this register on VT3043 since it causes
   1567  1.81   tsutsui 	 * kernel MCHK trap on macppc.
   1568  1.81   tsutsui 	 * (Note some VT86C100A chip returns a product ID of VT3043)
   1569  1.59       lha 	 */
   1570  1.81   tsutsui 	if (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_VIATECH_VT3043)
   1571  1.81   tsutsui 		VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
   1572   1.2  sakamoto 
   1573   1.2  sakamoto 	/* Reset the adapter. */
   1574   1.2  sakamoto 	vr_reset(sc);
   1575   1.2  sakamoto 
   1576   1.2  sakamoto 	/*
   1577   1.2  sakamoto 	 * Get station address. The way the Rhine chips work,
   1578   1.2  sakamoto 	 * you're not allowed to directly access the EEPROM once
   1579   1.2  sakamoto 	 * they've been programmed a special way. Consequently,
   1580   1.2  sakamoto 	 * we need to read the node address from the PAR0 and PAR1
   1581   1.2  sakamoto 	 * registers.
   1582  1.66       scw 	 *
   1583  1.66       scw 	 * XXXSCW: On the Rhine III, setting VR_EECSR_LOAD forces a reload
   1584  1.66       scw 	 *         of the *whole* EEPROM, not just the MAC address. This is
   1585  1.66       scw 	 *         pretty pointless since the chip does this automatically
   1586  1.66       scw 	 *         at powerup/reset.
   1587  1.66       scw 	 *         I suspect the same thing applies to the other Rhine
   1588  1.66       scw 	 *         variants, but in the absence of a data sheet for those
   1589  1.66       scw 	 *         (and the lack of anyone else noticing the problems this
   1590  1.66       scw 	 *         causes) I'm going to retain the old behaviour for the
   1591  1.66       scw 	 *         other parts.
   1592  1.78       scw 	 *         In some cases, the chip really does startup without having
   1593  1.78       scw 	 *         read the EEPROM (kern/34812). To handle this case, we force
   1594  1.78       scw 	 *         a reload if we see an all-zeroes MAC address.
   1595   1.2  sakamoto 	 */
   1596  1.78       scw 	for (mac = 0, i = 0; i < ETHER_ADDR_LEN; i++)
   1597  1.78       scw 		mac |= (eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i));
   1598  1.78       scw 
   1599  1.78       scw 	if (mac == 0 || (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_VIATECH_VT6105 &&
   1600  1.78       scw 	    PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_VIATECH_VT6102)) {
   1601  1.66       scw 		VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
   1602  1.66       scw 		DELAY(200);
   1603  1.78       scw 		for (i = 0; i < ETHER_ADDR_LEN; i++)
   1604  1.78       scw 			eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
   1605  1.66       scw 	}
   1606   1.2  sakamoto 
   1607   1.2  sakamoto 	/*
   1608   1.2  sakamoto 	 * A Rhine chip was detected. Inform the world.
   1609   1.2  sakamoto 	 */
   1610   1.6   thorpej 	printf("%s: Ethernet address: %s\n",
   1611  1.92    cegger 		device_xname(&sc->vr_dev), ether_sprintf(eaddr));
   1612   1.2  sakamoto 
   1613  1.49   thorpej 	memcpy(sc->vr_enaddr, eaddr, ETHER_ADDR_LEN);
   1614   1.2  sakamoto 
   1615  1.18   thorpej 	sc->vr_dmat = pa->pa_dmat;
   1616  1.18   thorpej 
   1617  1.18   thorpej 	/*
   1618  1.18   thorpej 	 * Allocate the control data structures, and create and load
   1619  1.18   thorpej 	 * the DMA map for it.
   1620  1.18   thorpej 	 */
   1621  1.18   thorpej 	if ((error = bus_dmamem_alloc(sc->vr_dmat,
   1622  1.18   thorpej 	    sizeof(struct vr_control_data), PAGE_SIZE, 0, &seg, 1, &rseg,
   1623  1.18   thorpej 	    0)) != 0) {
   1624  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "unable to allocate control data, error = %d\n", error);
   1625  1.18   thorpej 		goto fail_0;
   1626  1.18   thorpej 	}
   1627  1.18   thorpej 
   1628  1.18   thorpej 	if ((error = bus_dmamem_map(sc->vr_dmat, &seg, rseg,
   1629  1.85  christos 	    sizeof(struct vr_control_data), (void **)&sc->vr_control_data,
   1630  1.18   thorpej 	    BUS_DMA_COHERENT)) != 0) {
   1631  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "unable to map control data, error = %d\n", error);
   1632  1.18   thorpej 		goto fail_1;
   1633  1.18   thorpej 	}
   1634  1.18   thorpej 
   1635  1.18   thorpej 	if ((error = bus_dmamap_create(sc->vr_dmat,
   1636  1.18   thorpej 	    sizeof(struct vr_control_data), 1,
   1637  1.18   thorpej 	    sizeof(struct vr_control_data), 0, 0,
   1638  1.18   thorpej 	    &sc->vr_cddmamap)) != 0) {
   1639  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "unable to create control data DMA map, "
   1640  1.92    cegger 		    "error = %d\n", error);
   1641  1.18   thorpej 		goto fail_2;
   1642  1.18   thorpej 	}
   1643  1.18   thorpej 
   1644  1.18   thorpej 	if ((error = bus_dmamap_load(sc->vr_dmat, sc->vr_cddmamap,
   1645  1.18   thorpej 	    sc->vr_control_data, sizeof(struct vr_control_data), NULL,
   1646  1.18   thorpej 	    0)) != 0) {
   1647  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "unable to load control data DMA map, error = %d\n",
   1648  1.92    cegger 		    error);
   1649  1.18   thorpej 		goto fail_3;
   1650  1.18   thorpej 	}
   1651  1.18   thorpej 
   1652  1.18   thorpej 	/*
   1653  1.18   thorpej 	 * Create the transmit buffer DMA maps.
   1654  1.18   thorpej 	 */
   1655  1.18   thorpej 	for (i = 0; i < VR_NTXDESC; i++) {
   1656  1.18   thorpej 		if ((error = bus_dmamap_create(sc->vr_dmat, MCLBYTES,
   1657  1.18   thorpej 		    1, MCLBYTES, 0, 0,
   1658  1.18   thorpej 		    &VR_DSTX(sc, i)->ds_dmamap)) != 0) {
   1659  1.92    cegger 			aprint_error_dev(&sc->vr_dev, "unable to create tx DMA map %d, "
   1660  1.92    cegger 			    "error = %d\n", i, error);
   1661  1.18   thorpej 			goto fail_4;
   1662  1.18   thorpej 		}
   1663  1.18   thorpej 	}
   1664  1.18   thorpej 
   1665  1.18   thorpej 	/*
   1666  1.18   thorpej 	 * Create the receive buffer DMA maps.
   1667  1.18   thorpej 	 */
   1668  1.18   thorpej 	for (i = 0; i < VR_NRXDESC; i++) {
   1669  1.18   thorpej 		if ((error = bus_dmamap_create(sc->vr_dmat, MCLBYTES, 1,
   1670  1.18   thorpej 		    MCLBYTES, 0, 0,
   1671  1.18   thorpej 		    &VR_DSRX(sc, i)->ds_dmamap)) != 0) {
   1672  1.92    cegger 			aprint_error_dev(&sc->vr_dev, "unable to create rx DMA map %d, "
   1673  1.92    cegger 			    "error = %d\n", i, error);
   1674  1.18   thorpej 			goto fail_5;
   1675  1.18   thorpej 		}
   1676  1.23   thorpej 		VR_DSRX(sc, i)->ds_mbuf = NULL;
   1677   1.2  sakamoto 	}
   1678   1.2  sakamoto 
   1679   1.6   thorpej 	ifp = &sc->vr_ec.ec_if;
   1680   1.2  sakamoto 	ifp->if_softc = sc;
   1681   1.2  sakamoto 	ifp->if_mtu = ETHERMTU;
   1682   1.2  sakamoto 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
   1683   1.2  sakamoto 	ifp->if_ioctl = vr_ioctl;
   1684   1.2  sakamoto 	ifp->if_start = vr_start;
   1685   1.2  sakamoto 	ifp->if_watchdog = vr_watchdog;
   1686  1.39   thorpej 	ifp->if_init = vr_init;
   1687  1.39   thorpej 	ifp->if_stop = vr_stop;
   1688  1.42   thorpej 	IFQ_SET_READY(&ifp->if_snd);
   1689  1.42   thorpej 
   1690  1.92    cegger 	strlcpy(ifp->if_xname, device_xname(&sc->vr_dev), IFNAMSIZ);
   1691   1.2  sakamoto 
   1692   1.2  sakamoto 	/*
   1693  1.11   thorpej 	 * Initialize MII/media info.
   1694   1.2  sakamoto 	 */
   1695  1.11   thorpej 	sc->vr_mii.mii_ifp = ifp;
   1696  1.11   thorpej 	sc->vr_mii.mii_readreg = vr_mii_readreg;
   1697  1.11   thorpej 	sc->vr_mii.mii_writereg = vr_mii_writereg;
   1698  1.11   thorpej 	sc->vr_mii.mii_statchg = vr_mii_statchg;
   1699  1.89    dyoung 
   1700  1.89    dyoung 	sc->vr_ec.ec_mii = &sc->vr_mii;
   1701  1.89    dyoung 	ifmedia_init(&sc->vr_mii.mii_media, IFM_IMASK, ether_mediachange,
   1702  1.89    dyoung 		ether_mediastatus);
   1703  1.31   thorpej 	mii_attach(&sc->vr_dev, &sc->vr_mii, 0xffffffff, MII_PHY_ANY,
   1704  1.61  christos 	    MII_OFFSET_ANY, MIIF_FORCEANEG);
   1705  1.11   thorpej 	if (LIST_FIRST(&sc->vr_mii.mii_phys) == NULL) {
   1706  1.11   thorpej 		ifmedia_add(&sc->vr_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
   1707  1.11   thorpej 		ifmedia_set(&sc->vr_mii.mii_media, IFM_ETHER|IFM_NONE);
   1708  1.11   thorpej 	} else
   1709  1.11   thorpej 		ifmedia_set(&sc->vr_mii.mii_media, IFM_ETHER|IFM_AUTO);
   1710   1.2  sakamoto 
   1711   1.2  sakamoto 	/*
   1712   1.2  sakamoto 	 * Call MI attach routines.
   1713   1.2  sakamoto 	 */
   1714   1.2  sakamoto 	if_attach(ifp);
   1715   1.2  sakamoto 	ether_ifattach(ifp, sc->vr_enaddr);
   1716  1.68  jdolecek #if NRND > 0
   1717  1.92    cegger 	rnd_attach_source(&sc->rnd_source, device_xname(&sc->vr_dev),
   1718  1.68  jdolecek 	    RND_TYPE_NET, 0);
   1719  1.68  jdolecek #endif
   1720   1.2  sakamoto 
   1721   1.2  sakamoto 	sc->vr_ats = shutdownhook_establish(vr_shutdown, sc);
   1722   1.2  sakamoto 	if (sc->vr_ats == NULL)
   1723  1.92    cegger 		aprint_error_dev(&sc->vr_dev, "warning: couldn't establish shutdown hook\n");
   1724  1.18   thorpej 	return;
   1725  1.18   thorpej 
   1726  1.18   thorpej  fail_5:
   1727  1.18   thorpej 	for (i = 0; i < VR_NRXDESC; i++) {
   1728  1.18   thorpej 		if (sc->vr_rxsoft[i].ds_dmamap != NULL)
   1729  1.18   thorpej 			bus_dmamap_destroy(sc->vr_dmat,
   1730  1.18   thorpej 			    sc->vr_rxsoft[i].ds_dmamap);
   1731  1.18   thorpej 	}
   1732  1.18   thorpej  fail_4:
   1733  1.18   thorpej 	for (i = 0; i < VR_NTXDESC; i++) {
   1734  1.18   thorpej 		if (sc->vr_txsoft[i].ds_dmamap != NULL)
   1735  1.18   thorpej 			bus_dmamap_destroy(sc->vr_dmat,
   1736  1.18   thorpej 			    sc->vr_txsoft[i].ds_dmamap);
   1737  1.18   thorpej 	}
   1738  1.18   thorpej 	bus_dmamap_unload(sc->vr_dmat, sc->vr_cddmamap);
   1739  1.18   thorpej  fail_3:
   1740  1.18   thorpej 	bus_dmamap_destroy(sc->vr_dmat, sc->vr_cddmamap);
   1741  1.18   thorpej  fail_2:
   1742  1.85  christos 	bus_dmamem_unmap(sc->vr_dmat, (void *)sc->vr_control_data,
   1743  1.18   thorpej 	    sizeof(struct vr_control_data));
   1744  1.18   thorpej  fail_1:
   1745  1.18   thorpej 	bus_dmamem_free(sc->vr_dmat, &seg, rseg);
   1746  1.18   thorpej  fail_0:
   1747  1.18   thorpej 	return;
   1748   1.2  sakamoto }
   1749  1.76  christos 
   1750  1.76  christos static int
   1751  1.91    dyoung vr_restore_state(pci_chipset_tag_t pc, pcitag_t tag, device_t self,
   1752  1.91    dyoung     pcireg_t state)
   1753  1.76  christos {
   1754  1.91    dyoung 	struct vr_softc *sc = device_private(self);
   1755  1.76  christos 	int error;
   1756  1.76  christos 
   1757  1.76  christos 	if (state == PCI_PMCSR_STATE_D0)
   1758  1.76  christos 		return 0;
   1759  1.76  christos 	if ((error = pci_set_powerstate(pc, tag, PCI_PMCSR_STATE_D0)))
   1760  1.76  christos 		return error;
   1761  1.76  christos 
   1762  1.76  christos 	/* Restore PCI config data. */
   1763  1.76  christos 	PCI_CONF_WRITE(VR_PCI_LOIO, sc->vr_save_iobase);
   1764  1.76  christos 	PCI_CONF_WRITE(VR_PCI_LOMEM, sc->vr_save_membase);
   1765  1.76  christos 	PCI_CONF_WRITE(PCI_INTERRUPT_REG, sc->vr_save_irq);
   1766  1.76  christos 	return 0;
   1767  1.76  christos }
   1768