if_wi_pci.c revision 1.1.2.6 1 1.1.2.6 thorpej /* $NetBSD: if_wi_pci.c,v 1.1.2.6 2002/09/23 15:42:20 thorpej Exp $ */
2 1.1.2.2 nathanw
3 1.1.2.2 nathanw /*-
4 1.1.2.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1.2.2 nathanw * All rights reserved.
6 1.1.2.2 nathanw *
7 1.1.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.1.2.2 nathanw * by Hideaki Imaizumi <hiddy (at) sfc.wide.ad.jp>
9 1.1.2.2 nathanw * and Ichiro FUKUHARA (ichiro (at) ichiro.org).
10 1.1.2.2 nathanw *
11 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.1.2.2 nathanw * modification, are permitted provided that the following conditions
13 1.1.2.2 nathanw * are met:
14 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.1.2.2 nathanw * must display the following acknowledgement:
21 1.1.2.2 nathanw * This product includes software developed by the NetBSD
22 1.1.2.2 nathanw * Foundation, Inc. and its contributors.
23 1.1.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1.2.2 nathanw * contributors may be used to endorse or promote products derived
25 1.1.2.2 nathanw * from this software without specific prior written permission.
26 1.1.2.2 nathanw *
27 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.1.2.2 nathanw */
39 1.1.2.2 nathanw
40 1.1.2.2 nathanw /*
41 1.1.2.2 nathanw * PCI bus front-end for the Intersil PCI WaveLan.
42 1.1.2.2 nathanw * Works with Prism2.5 Mini-PCI wavelan.
43 1.1.2.2 nathanw */
44 1.1.2.2 nathanw
45 1.1.2.3 nathanw #include <sys/cdefs.h>
46 1.1.2.6 thorpej <<<<<<< if_wi_pci.c
47 1.1.2.6 thorpej __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.1.2.6 2002/09/23 15:42:20 thorpej Exp $");
48 1.1.2.6 thorpej =======
49 1.1.2.6 thorpej __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.1.2.6 2002/09/23 15:42:20 thorpej Exp $");
50 1.1.2.6 thorpej >>>>>>> 1.8
51 1.1.2.3 nathanw
52 1.1.2.2 nathanw #include <sys/param.h>
53 1.1.2.2 nathanw #include <sys/systm.h>
54 1.1.2.2 nathanw #include <sys/mbuf.h>
55 1.1.2.2 nathanw #include <sys/syslog.h>
56 1.1.2.2 nathanw #include <sys/socket.h>
57 1.1.2.2 nathanw #include <sys/device.h>
58 1.1.2.2 nathanw #include <sys/callout.h>
59 1.1.2.2 nathanw
60 1.1.2.2 nathanw #include <net/if.h>
61 1.1.2.2 nathanw #include <net/if_ether.h>
62 1.1.2.2 nathanw #include <net/if_media.h>
63 1.1.2.2 nathanw #include <net/if_ieee80211.h>
64 1.1.2.2 nathanw
65 1.1.2.2 nathanw #include <machine/bus.h>
66 1.1.2.2 nathanw #include <machine/intr.h>
67 1.1.2.2 nathanw
68 1.1.2.2 nathanw #include <dev/pci/pcireg.h>
69 1.1.2.2 nathanw #include <dev/pci/pcivar.h>
70 1.1.2.2 nathanw #include <dev/pci/pcidevs.h>
71 1.1.2.2 nathanw
72 1.1.2.2 nathanw #include <dev/ic/wi_ieee.h>
73 1.1.2.2 nathanw #include <dev/ic/wireg.h>
74 1.1.2.2 nathanw #include <dev/ic/wivar.h>
75 1.1.2.2 nathanw
76 1.1.2.4 nathanw #define WI_PCI_PLX_LOMEM 0x10 /* PLX chip membase */
77 1.1.2.4 nathanw #define WI_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
78 1.1.2.4 nathanw #define WI_PCI_LOMEM 0x18 /* ISA membase */
79 1.1.2.4 nathanw #define WI_PCI_LOIO 0x1C /* ISA iobase */
80 1.1.2.4 nathanw
81 1.1.2.4 nathanw #define WI_PLX_COR_OFFSET 0x3E0
82 1.1.2.4 nathanw #define WI_PLX_COR_VALUE 0x41
83 1.1.2.4 nathanw
84 1.1.2.2 nathanw struct wi_pci_softc {
85 1.1.2.2 nathanw struct wi_softc psc_wi; /* real "wi" softc */
86 1.1.2.2 nathanw
87 1.1.2.2 nathanw /* PCI-specific goo */
88 1.1.2.2 nathanw pci_intr_handle_t psc_ih;
89 1.1.2.2 nathanw struct pci_attach_args *psc_pa;
90 1.1.2.2 nathanw
91 1.1.2.2 nathanw void *sc_powerhook; /* power hook descriptor */
92 1.1.2.2 nathanw };
93 1.1.2.2 nathanw
94 1.1.2.2 nathanw static int wi_pci_match __P((struct device *, struct cfdata *, void *));
95 1.1.2.2 nathanw static void wi_pci_attach __P((struct device *, struct device *, void *));
96 1.1.2.2 nathanw static int wi_pci_enable __P((struct wi_softc *));
97 1.1.2.2 nathanw static void wi_pci_disable __P((struct wi_softc *));
98 1.1.2.5 nathanw static void wi_pci_reset __P((struct wi_softc *));
99 1.1.2.2 nathanw static void wi_pci_powerhook __P((int, void *));
100 1.1.2.2 nathanw
101 1.1.2.2 nathanw static const struct wi_pci_product
102 1.1.2.2 nathanw *wi_pci_lookup __P((struct pci_attach_args *));
103 1.1.2.2 nathanw
104 1.1.2.2 nathanw struct cfattach wi_pci_ca = {
105 1.1.2.2 nathanw sizeof(struct wi_pci_softc), wi_pci_match, wi_pci_attach
106 1.1.2.2 nathanw };
107 1.1.2.2 nathanw
108 1.1.2.2 nathanw const struct wi_pci_product {
109 1.1.2.2 nathanw pci_vendor_id_t wpp_vendor; /* vendor ID */
110 1.1.2.2 nathanw pci_product_id_t wpp_product; /* product ID */
111 1.1.2.2 nathanw const char *wpp_name; /* product name */
112 1.1.2.4 nathanw int wpp_plx; /* uses PLX chip */
113 1.1.2.2 nathanw } wi_pci_products[] = {
114 1.1.2.4 nathanw { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P,
115 1.1.2.4 nathanw NULL, 1 },
116 1.1.2.4 nathanw { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02,
117 1.1.2.4 nathanw NULL, 1 },
118 1.1.2.4 nathanw { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P,
119 1.1.2.4 nathanw NULL, 1 },
120 1.1.2.4 nathanw { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A,
121 1.1.2.4 nathanw NULL, 1 },
122 1.1.2.4 nathanw { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301,
123 1.1.2.4 nathanw NULL, 1 },
124 1.1.2.2 nathanw { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN,
125 1.1.2.4 nathanw "Intersil Prism2.5", 0 },
126 1.1.2.2 nathanw { 0, 0,
127 1.1.2.4 nathanw NULL, 0},
128 1.1.2.2 nathanw };
129 1.1.2.2 nathanw
130 1.1.2.2 nathanw static int
131 1.1.2.2 nathanw wi_pci_enable(sc)
132 1.1.2.2 nathanw struct wi_softc *sc;
133 1.1.2.2 nathanw {
134 1.1.2.2 nathanw struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
135 1.1.2.2 nathanw
136 1.1.2.2 nathanw /* establish the interrupt. */
137 1.1.2.2 nathanw sc->sc_ih = pci_intr_establish(psc->psc_pa->pa_pc,
138 1.1.2.2 nathanw psc->psc_ih, IPL_NET, wi_intr, sc);
139 1.1.2.2 nathanw if (sc->sc_ih == NULL) {
140 1.1.2.2 nathanw printf("%s: couldn't establish interrupt\n",
141 1.1.2.2 nathanw sc->sc_dev.dv_xname);
142 1.1.2.2 nathanw return (EIO);
143 1.1.2.2 nathanw }
144 1.1.2.2 nathanw
145 1.1.2.2 nathanw /* reset HFA3842 MAC core */
146 1.1.2.2 nathanw wi_pci_reset(sc);
147 1.1.2.2 nathanw
148 1.1.2.2 nathanw return (0);
149 1.1.2.2 nathanw }
150 1.1.2.2 nathanw
151 1.1.2.2 nathanw static void
152 1.1.2.2 nathanw wi_pci_disable(sc)
153 1.1.2.2 nathanw struct wi_softc *sc;
154 1.1.2.2 nathanw {
155 1.1.2.2 nathanw struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
156 1.1.2.2 nathanw
157 1.1.2.2 nathanw pci_intr_disestablish(psc->psc_pa->pa_pc, sc->sc_ih);
158 1.1.2.2 nathanw }
159 1.1.2.2 nathanw
160 1.1.2.5 nathanw static void
161 1.1.2.5 nathanw wi_pci_reset(sc)
162 1.1.2.5 nathanw struct wi_softc *sc;
163 1.1.2.5 nathanw {
164 1.1.2.6 thorpej int i, secs, usecs;
165 1.1.2.5 nathanw
166 1.1.2.6 thorpej CSR_WRITE_2(sc, WI_PCI_COR_OFFSET, WI_COR_SOFT_RESET);
167 1.1.2.6 thorpej DELAY(250*1000); /* 1/4 second */
168 1.1.2.6 thorpej
169 1.1.2.6 thorpej CSR_WRITE_2(sc, WI_PCI_COR_OFFSET, WI_COR_CLEAR);
170 1.1.2.6 thorpej DELAY(500*1000); /* 1/2 second */
171 1.1.2.6 thorpej
172 1.1.2.6 thorpej /* wait 2 seconds for firmware to complete initialization. */
173 1.1.2.6 thorpej
174 1.1.2.6 thorpej for (i = 200000; i--; DELAY(10))
175 1.1.2.6 thorpej if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
176 1.1.2.6 thorpej break;
177 1.1.2.6 thorpej
178 1.1.2.6 thorpej if (i < 0) {
179 1.1.2.6 thorpej printf("%s: PCI reset timed out\n", sc->sc_dev.dv_xname);
180 1.1.2.6 thorpej } else if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) {
181 1.1.2.6 thorpej usecs = (200000 - i) * 10;
182 1.1.2.6 thorpej secs = usecs / 1000000;
183 1.1.2.6 thorpej usecs %= 1000000;
184 1.1.2.6 thorpej
185 1.1.2.6 thorpej printf("%s: PCI reset in %d.%06d seconds\n",
186 1.1.2.6 thorpej sc->sc_dev.dv_xname, secs, usecs);
187 1.1.2.6 thorpej }
188 1.1.2.5 nathanw
189 1.1.2.5 nathanw return;
190 1.1.2.5 nathanw }
191 1.1.2.5 nathanw
192 1.1.2.2 nathanw static const struct wi_pci_product *
193 1.1.2.2 nathanw wi_pci_lookup(pa)
194 1.1.2.2 nathanw struct pci_attach_args *pa;
195 1.1.2.2 nathanw {
196 1.1.2.2 nathanw const struct wi_pci_product *wpp;
197 1.1.2.2 nathanw
198 1.1.2.4 nathanw for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) {
199 1.1.2.2 nathanw if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor &&
200 1.1.2.2 nathanw PCI_PRODUCT(pa->pa_id) == wpp->wpp_product)
201 1.1.2.2 nathanw return (wpp);
202 1.1.2.2 nathanw }
203 1.1.2.2 nathanw return (NULL);
204 1.1.2.2 nathanw }
205 1.1.2.2 nathanw
206 1.1.2.2 nathanw static int
207 1.1.2.2 nathanw wi_pci_match(parent, match, aux)
208 1.1.2.2 nathanw struct device *parent;
209 1.1.2.2 nathanw struct cfdata *match;
210 1.1.2.2 nathanw void *aux;
211 1.1.2.2 nathanw {
212 1.1.2.2 nathanw struct pci_attach_args *pa = aux;
213 1.1.2.2 nathanw
214 1.1.2.2 nathanw if (wi_pci_lookup(pa) != NULL)
215 1.1.2.2 nathanw return (1);
216 1.1.2.2 nathanw return (0);
217 1.1.2.2 nathanw }
218 1.1.2.2 nathanw
219 1.1.2.2 nathanw static void
220 1.1.2.2 nathanw wi_pci_attach(parent, self, aux)
221 1.1.2.2 nathanw struct device *parent, *self;
222 1.1.2.2 nathanw void *aux;
223 1.1.2.2 nathanw {
224 1.1.2.2 nathanw struct wi_pci_softc *psc = (struct wi_pci_softc *)self;
225 1.1.2.2 nathanw struct wi_softc *sc = &psc->psc_wi;
226 1.1.2.2 nathanw struct pci_attach_args *pa = aux;
227 1.1.2.2 nathanw pci_chipset_tag_t pc = pa->pa_pc;
228 1.1.2.2 nathanw const char *intrstr;
229 1.1.2.2 nathanw const struct wi_pci_product *wpp;
230 1.1.2.2 nathanw pci_intr_handle_t ih;
231 1.1.2.4 nathanw bus_space_tag_t memt, iot;
232 1.1.2.4 nathanw bus_space_handle_t memh, ioh;
233 1.1.2.2 nathanw
234 1.1.2.2 nathanw psc->psc_pa = pa;
235 1.1.2.2 nathanw
236 1.1.2.2 nathanw wpp = wi_pci_lookup(pa);
237 1.1.2.4 nathanw #ifdef DIAGNOSTIC
238 1.1.2.2 nathanw if (wpp == NULL) {
239 1.1.2.2 nathanw printf("\n");
240 1.1.2.2 nathanw panic("wi_pci_attach: impossible");
241 1.1.2.2 nathanw }
242 1.1.2.4 nathanw #endif
243 1.1.2.2 nathanw
244 1.1.2.4 nathanw if (wpp->wpp_plx) {
245 1.1.2.4 nathanw /* Map memory and I/O registers. */
246 1.1.2.4 nathanw if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
247 1.1.2.4 nathanw &memt, &memh, NULL, NULL) != 0) {
248 1.1.2.4 nathanw printf(": can't map mem space\n");
249 1.1.2.4 nathanw return;
250 1.1.2.4 nathanw }
251 1.1.2.4 nathanw if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
252 1.1.2.4 nathanw &iot, &ioh, NULL, NULL) != 0) {
253 1.1.2.4 nathanw printf(": can't map I/O space\n");
254 1.1.2.4 nathanw return;
255 1.1.2.4 nathanw }
256 1.1.2.4 nathanw } else {
257 1.1.2.4 nathanw if (pci_mapreg_map(pa, WI_PCI_CBMA,
258 1.1.2.4 nathanw PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
259 1.1.2.4 nathanw 0, &iot, &ioh, NULL, NULL) != 0) {
260 1.1.2.4 nathanw printf(": can't map mem space\n");
261 1.1.2.4 nathanw return;
262 1.1.2.4 nathanw }
263 1.1.2.4 nathanw
264 1.1.2.4 nathanw memt = iot;
265 1.1.2.4 nathanw memh = ioh;
266 1.1.2.4 nathanw sc->sc_pci = 1;
267 1.1.2.4 nathanw }
268 1.1.2.4 nathanw
269 1.1.2.4 nathanw if (wpp->wpp_name != NULL) {
270 1.1.2.4 nathanw printf(": %s Wireless Lan\n", wpp->wpp_name);
271 1.1.2.4 nathanw } else {
272 1.1.2.4 nathanw char devinfo[256];
273 1.1.2.4 nathanw
274 1.1.2.4 nathanw pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
275 1.1.2.4 nathanw printf(": %s (rev. 0x%02x)\n", devinfo,
276 1.1.2.4 nathanw PCI_REVISION(pa->pa_class));
277 1.1.2.4 nathanw }
278 1.1.2.2 nathanw
279 1.1.2.2 nathanw sc->sc_enabled = 1;
280 1.1.2.2 nathanw sc->sc_enable = wi_pci_enable;
281 1.1.2.2 nathanw sc->sc_disable = wi_pci_disable;
282 1.1.2.2 nathanw
283 1.1.2.2 nathanw /* Enable the card. */
284 1.1.2.2 nathanw pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
285 1.1.2.2 nathanw pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
286 1.1.2.2 nathanw PCI_COMMAND_MASTER_ENABLE);
287 1.1.2.2 nathanw
288 1.1.2.4 nathanw sc->sc_iot = iot;
289 1.1.2.4 nathanw sc->sc_ioh = ioh;
290 1.1.2.4 nathanw /* Make sure interrupts are disabled. */
291 1.1.2.4 nathanw CSR_WRITE_2(sc, WI_INT_EN, 0);
292 1.1.2.4 nathanw CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
293 1.1.2.2 nathanw
294 1.1.2.2 nathanw /* Map and establish the interrupt. */
295 1.1.2.2 nathanw if (pci_intr_map(pa, &ih)) {
296 1.1.2.2 nathanw printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
297 1.1.2.2 nathanw return;
298 1.1.2.2 nathanw }
299 1.1.2.2 nathanw intrstr = pci_intr_string(pc, ih);
300 1.1.2.2 nathanw
301 1.1.2.2 nathanw psc->psc_ih = ih;
302 1.1.2.2 nathanw sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc);
303 1.1.2.2 nathanw if (sc->sc_ih == NULL) {
304 1.1.2.2 nathanw printf("%s: couldn't establish interrupt",
305 1.1.2.2 nathanw sc->sc_dev.dv_xname);
306 1.1.2.2 nathanw if (intrstr != NULL)
307 1.1.2.2 nathanw printf(" at %s", intrstr);
308 1.1.2.2 nathanw printf("\n");
309 1.1.2.2 nathanw return;
310 1.1.2.2 nathanw }
311 1.1.2.2 nathanw
312 1.1.2.2 nathanw printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
313 1.1.2.2 nathanw
314 1.1.2.4 nathanw if (wpp->wpp_plx) {
315 1.1.2.4 nathanw /*
316 1.1.2.4 nathanw * Setup the PLX chip for level interrupts and config index 1
317 1.1.2.4 nathanw * XXX - should really reset the PLX chip too.
318 1.1.2.4 nathanw */
319 1.1.2.4 nathanw bus_space_write_1(memt, memh,
320 1.1.2.4 nathanw WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE);
321 1.1.2.4 nathanw } else {
322 1.1.2.4 nathanw /* reset HFA3842 MAC core */
323 1.1.2.4 nathanw wi_pci_reset(sc);
324 1.1.2.4 nathanw }
325 1.1.2.2 nathanw
326 1.1.2.4 nathanw printf("%s:", sc->sc_dev.dv_xname);
327 1.1.2.2 nathanw sc->sc_ifp = &sc->sc_ethercom.ec_if;
328 1.1.2.2 nathanw if (wi_attach(sc) != 0) {
329 1.1.2.5 nathanw printf("%s: failed to attach controller\n",
330 1.1.2.5 nathanw sc->sc_dev.dv_xname);
331 1.1.2.2 nathanw pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
332 1.1.2.2 nathanw return;
333 1.1.2.2 nathanw }
334 1.1.2.2 nathanw
335 1.1.2.2 nathanw /* Add a suspend hook to restore PCI config state */
336 1.1.2.2 nathanw psc->sc_powerhook = powerhook_establish(wi_pci_powerhook, psc);
337 1.1.2.2 nathanw if (psc->sc_powerhook == NULL)
338 1.1.2.2 nathanw printf ("%s: WARNING: unable to establish pci power hook\n",
339 1.1.2.2 nathanw sc->sc_dev.dv_xname);
340 1.1.2.2 nathanw }
341 1.1.2.2 nathanw
342 1.1.2.2 nathanw static void
343 1.1.2.2 nathanw wi_pci_powerhook(why, arg)
344 1.1.2.2 nathanw int why;
345 1.1.2.2 nathanw void *arg;
346 1.1.2.2 nathanw {
347 1.1.2.2 nathanw struct wi_pci_softc *psc = arg;
348 1.1.2.2 nathanw struct wi_softc *sc = &psc->psc_wi;
349 1.1.2.2 nathanw
350 1.1.2.2 nathanw wi_power(sc, why);
351 1.1.2.2 nathanw }
352