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if_wi_pci.c revision 1.44.4.1
      1  1.44.4.1      yamt /*      $NetBSD: if_wi_pci.c,v 1.44.4.1 2008/05/16 02:24:44 yamt Exp $  */
      2       1.1    ichiro 
      3       1.1    ichiro /*-
      4       1.1    ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5       1.1    ichiro  * All rights reserved.
      6       1.1    ichiro  *
      7       1.1    ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1    ichiro  * by Hideaki Imaizumi <hiddy (at) sfc.wide.ad.jp>
      9       1.1    ichiro  * and Ichiro FUKUHARA (ichiro (at) ichiro.org).
     10       1.1    ichiro  *
     11       1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     12       1.1    ichiro  * modification, are permitted provided that the following conditions
     13       1.1    ichiro  * are met:
     14       1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     15       1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     16       1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     17       1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     18       1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     19       1.1    ichiro  *
     20       1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21       1.1    ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22       1.1    ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23       1.1    ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24       1.1    ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25       1.1    ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26       1.1    ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27       1.1    ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28       1.1    ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29       1.1    ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30       1.1    ichiro  * POSSIBILITY OF SUCH DAMAGE.
     31       1.1    ichiro  */
     32       1.1    ichiro 
     33       1.1    ichiro /*
     34       1.1    ichiro  * PCI bus front-end for the Intersil PCI WaveLan.
     35       1.1    ichiro  * Works with Prism2.5 Mini-PCI wavelan.
     36       1.1    ichiro  */
     37       1.2     lukem 
     38       1.2     lukem #include <sys/cdefs.h>
     39  1.44.4.1      yamt __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.44.4.1 2008/05/16 02:24:44 yamt Exp $");
     40       1.1    ichiro 
     41       1.1    ichiro #include <sys/param.h>
     42       1.1    ichiro #include <sys/systm.h>
     43       1.1    ichiro #include <sys/mbuf.h>
     44       1.1    ichiro #include <sys/syslog.h>
     45       1.1    ichiro #include <sys/socket.h>
     46       1.1    ichiro #include <sys/device.h>
     47       1.1    ichiro #include <sys/callout.h>
     48       1.1    ichiro 
     49       1.1    ichiro #include <net/if.h>
     50       1.1    ichiro #include <net/if_ether.h>
     51       1.1    ichiro #include <net/if_media.h>
     52      1.27    dyoung 
     53      1.37    dyoung #include <net80211/ieee80211_netbsd.h>
     54      1.27    dyoung #include <net80211/ieee80211_var.h>
     55      1.28    dyoung #include <net80211/ieee80211_radiotap.h>
     56      1.29    dyoung #include <net80211/ieee80211_rssadapt.h>
     57       1.1    ichiro 
     58      1.42        ad #include <sys/bus.h>
     59      1.42        ad #include <sys/intr.h>
     60       1.1    ichiro 
     61       1.1    ichiro #include <dev/pci/pcireg.h>
     62       1.1    ichiro #include <dev/pci/pcivar.h>
     63       1.1    ichiro #include <dev/pci/pcidevs.h>
     64       1.1    ichiro 
     65       1.1    ichiro #include <dev/ic/wi_ieee.h>
     66       1.1    ichiro #include <dev/ic/wireg.h>
     67       1.1    ichiro #include <dev/ic/wivar.h>
     68       1.1    ichiro 
     69      1.13     soren #define WI_PCI_CBMA		0x10	/* Configuration Base Memory Address */
     70       1.3  augustss #define WI_PCI_PLX_LOMEM	0x10	/* PLX chip membase */
     71       1.3  augustss #define WI_PCI_PLX_LOIO		0x14	/* PLX chip iobase */
     72       1.3  augustss #define WI_PCI_LOMEM		0x18	/* ISA membase */
     73       1.3  augustss #define WI_PCI_LOIO		0x1C	/* ISA iobase */
     74       1.3  augustss 
     75      1.23  christos #define CHIP_PLX_OTHER		0x01
     76      1.23  christos #define CHIP_PLX_9052		0x02
     77      1.30    dyoung #define CHIP_TMD_7160		0x03
     78      1.23  christos 
     79       1.3  augustss #define WI_PLX_COR_OFFSET       0x3E0
     80       1.3  augustss #define WI_PLX_COR_VALUE        0x41
     81       1.3  augustss 
     82       1.1    ichiro struct wi_pci_softc {
     83       1.1    ichiro 	struct wi_softc psc_wi;		/* real "wi" softc */
     84       1.1    ichiro 
     85       1.1    ichiro 	/* PCI-specific goo */
     86      1.36     perry 	pci_intr_handle_t psc_ih;
     87      1.26       scw 	pci_chipset_tag_t psc_pc;
     88      1.43  jmcneill 	pcitag_t psc_pcitag;
     89       1.1    ichiro };
     90       1.1    ichiro 
     91      1.35   thorpej static int	wi_pci_match(struct device *, struct cfdata *, void *);
     92      1.35   thorpej static void	wi_pci_attach(struct device *, struct device *, void *);
     93      1.35   thorpej static int	wi_pci_enable(struct wi_softc *);
     94      1.35   thorpej static void	wi_pci_disable(struct wi_softc *);
     95      1.35   thorpej static void	wi_pci_reset(struct wi_softc *);
     96       1.1    ichiro 
     97       1.1    ichiro static const struct wi_pci_product
     98      1.35   thorpej 	*wi_pci_lookup(struct pci_attach_args *);
     99       1.1    ichiro 
    100      1.11   thorpej CFATTACH_DECL(wi_pci, sizeof(struct wi_pci_softc),
    101      1.12   thorpej     wi_pci_match, wi_pci_attach, NULL, NULL);
    102       1.1    ichiro 
    103      1.35   thorpej static const struct wi_pci_product {
    104       1.1    ichiro 	pci_vendor_id_t		wpp_vendor;	/* vendor ID */
    105       1.1    ichiro 	pci_product_id_t	wpp_product;	/* product ID */
    106      1.30    dyoung 	int			wpp_chip;	/* uses other chip */
    107       1.1    ichiro } wi_pci_products[] = {
    108       1.3  augustss 	{ PCI_VENDOR_GLOBALSUN,		PCI_PRODUCT_GLOBALSUN_GL24110P,
    109      1.33   mycroft 	  CHIP_PLX_OTHER },
    110       1.3  augustss 	{ PCI_VENDOR_GLOBALSUN,		PCI_PRODUCT_GLOBALSUN_GL24110P02,
    111      1.33   mycroft 	  CHIP_PLX_OTHER },
    112       1.3  augustss 	{ PCI_VENDOR_EUMITCOM,		PCI_PRODUCT_EUMITCOM_WL11000P,
    113      1.33   mycroft 	  CHIP_PLX_OTHER },
    114       1.3  augustss 	{ PCI_VENDOR_3COM,		PCI_PRODUCT_3COM_3CRWE777A,
    115      1.33   mycroft 	  CHIP_PLX_OTHER },
    116       1.3  augustss 	{ PCI_VENDOR_NETGEAR,		PCI_PRODUCT_NETGEAR_MA301,
    117      1.33   mycroft 	  CHIP_PLX_OTHER },
    118       1.1    ichiro 	{ PCI_VENDOR_INTERSIL,		PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN,
    119      1.33   mycroft 	  0 },
    120      1.20     perry 	{ PCI_VENDOR_NDC,		PCI_PRODUCT_NDC_NCP130,
    121      1.33   mycroft 	  CHIP_PLX_9052 },
    122      1.22       jdc 	{ PCI_VENDOR_USR2,		PCI_PRODUCT_USR2_2415,
    123      1.33   mycroft 	  CHIP_PLX_OTHER },
    124      1.30    dyoung 	{ PCI_VENDOR_NDC,		PCI_PRODUCT_NDC_NCP130A2,
    125      1.33   mycroft 	  CHIP_TMD_7160 },
    126       1.1    ichiro 	{ 0,				0,
    127      1.33   mycroft 	  0},
    128       1.1    ichiro };
    129       1.1    ichiro 
    130       1.1    ichiro static int
    131      1.35   thorpej wi_pci_enable(struct wi_softc *sc)
    132       1.1    ichiro {
    133       1.1    ichiro 	struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
    134       1.1    ichiro 
    135       1.1    ichiro 	/* establish the interrupt. */
    136      1.36     perry 	sc->sc_ih = pci_intr_establish(psc->psc_pc,
    137       1.1    ichiro 					psc->psc_ih, IPL_NET, wi_intr, sc);
    138       1.1    ichiro 	if (sc->sc_ih == NULL) {
    139      1.44    cegger 		aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt\n");
    140       1.1    ichiro 		return (EIO);
    141       1.1    ichiro 	}
    142       1.1    ichiro 
    143       1.1    ichiro 	/* reset HFA3842 MAC core */
    144      1.31  nakayama 	if (sc->sc_reset != NULL)
    145      1.31  nakayama 		wi_pci_reset(sc);
    146       1.1    ichiro 
    147       1.1    ichiro 	return (0);
    148       1.1    ichiro }
    149       1.1    ichiro 
    150       1.1    ichiro static void
    151      1.35   thorpej wi_pci_disable(struct wi_softc *sc)
    152       1.1    ichiro {
    153       1.1    ichiro 	struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
    154       1.1    ichiro 
    155      1.26       scw 	pci_intr_disestablish(psc->psc_pc, sc->sc_ih);
    156       1.7  jdolecek }
    157       1.7  jdolecek 
    158       1.7  jdolecek static void
    159      1.35   thorpej wi_pci_reset(struct wi_softc *sc)
    160       1.7  jdolecek {
    161       1.8   thorpej 	int i, secs, usecs;
    162       1.7  jdolecek 
    163      1.25      fvdl 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,
    164      1.25      fvdl 	    WI_PCI_COR, WI_COR_SOFT_RESET);
    165       1.8   thorpej 	DELAY(250*1000); /* 1/4 second */
    166       1.8   thorpej 
    167      1.25      fvdl 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,
    168      1.25      fvdl 	    WI_PCI_COR, WI_COR_CLEAR);
    169       1.8   thorpej 	DELAY(500*1000); /* 1/2 second */
    170       1.8   thorpej 
    171       1.8   thorpej 	/* wait 2 seconds for firmware to complete initialization. */
    172       1.8   thorpej 
    173       1.8   thorpej 	for (i = 200000; i--; DELAY(10))
    174       1.8   thorpej 		if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
    175       1.8   thorpej 			break;
    176      1.36     perry 
    177       1.8   thorpej 	if (i < 0) {
    178      1.44    cegger 		printf("%s: PCI reset timed out\n", device_xname(&sc->sc_dev));
    179      1.10      onoe 	} else if (sc->sc_if.if_flags & IFF_DEBUG) {
    180       1.8   thorpej 		usecs = (200000 - i) * 10;
    181       1.8   thorpej 		secs = usecs / 1000000;
    182       1.8   thorpej 		usecs %= 1000000;
    183       1.8   thorpej 
    184       1.8   thorpej 		printf("%s: PCI reset in %d.%06d seconds\n",
    185      1.44    cegger                        device_xname(&sc->sc_dev), secs, usecs);
    186       1.8   thorpej 	}
    187       1.7  jdolecek 
    188       1.7  jdolecek 	return;
    189       1.1    ichiro }
    190       1.1    ichiro 
    191       1.1    ichiro static const struct wi_pci_product *
    192      1.35   thorpej wi_pci_lookup(struct pci_attach_args *pa)
    193       1.1    ichiro {
    194       1.1    ichiro 	const struct wi_pci_product *wpp;
    195       1.1    ichiro 
    196       1.3  augustss 	for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) {
    197       1.1    ichiro 		if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor &&
    198       1.1    ichiro 		    PCI_PRODUCT(pa->pa_id) == wpp->wpp_product)
    199       1.1    ichiro 			return (wpp);
    200       1.1    ichiro 	}
    201       1.1    ichiro 	return (NULL);
    202       1.1    ichiro }
    203       1.1    ichiro 
    204       1.1    ichiro static int
    205      1.41  christos wi_pci_match(struct device *parent, struct cfdata *match,
    206      1.40  christos     void *aux)
    207       1.1    ichiro {
    208       1.1    ichiro 	struct pci_attach_args *pa = aux;
    209       1.1    ichiro 
    210       1.1    ichiro 	if (wi_pci_lookup(pa) != NULL)
    211       1.1    ichiro 		return (1);
    212       1.1    ichiro 	return (0);
    213       1.1    ichiro }
    214       1.1    ichiro 
    215       1.1    ichiro static void
    216      1.41  christos wi_pci_attach(struct device *parent, struct device *self, void *aux)
    217       1.1    ichiro {
    218       1.1    ichiro 	struct wi_pci_softc *psc = (struct wi_pci_softc *)self;
    219       1.1    ichiro 	struct wi_softc *sc = &psc->psc_wi;
    220       1.1    ichiro 	struct pci_attach_args *pa = aux;
    221       1.1    ichiro 	pci_chipset_tag_t pc = pa->pa_pc;
    222       1.1    ichiro 	const char *intrstr;
    223       1.1    ichiro 	const struct wi_pci_product *wpp;
    224       1.1    ichiro 	pci_intr_handle_t ih;
    225      1.30    dyoung 	bus_space_tag_t memt, iot, plxt, tmdt;
    226      1.30    dyoung 	bus_space_handle_t memh, ioh, plxh, tmdh;
    227       1.1    ichiro 
    228      1.26       scw 	psc->psc_pc = pc;
    229      1.43  jmcneill 	psc->psc_pcitag = pa->pa_tag;
    230       1.1    ichiro 
    231       1.5  augustss 	wpp = wi_pci_lookup(pa);
    232       1.5  augustss #ifdef DIAGNOSTIC
    233       1.5  augustss 	if (wpp == NULL) {
    234       1.5  augustss 		printf("\n");
    235       1.5  augustss 		panic("wi_pci_attach: impossible");
    236       1.5  augustss 	}
    237       1.5  augustss #endif
    238       1.5  augustss 
    239      1.30    dyoung 	switch (wpp->wpp_chip) {
    240      1.30    dyoung 	case CHIP_PLX_OTHER:
    241      1.30    dyoung 	case CHIP_PLX_9052:
    242       1.3  augustss 		/* Map memory and I/O registers. */
    243       1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
    244       1.3  augustss 		    &memt, &memh, NULL, NULL) != 0) {
    245       1.3  augustss 			printf(": can't map mem space\n");
    246       1.3  augustss 			return;
    247       1.3  augustss 		}
    248       1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
    249       1.3  augustss 		    &iot, &ioh, NULL, NULL) != 0) {
    250       1.3  augustss 			printf(": can't map I/O space\n");
    251       1.3  augustss 			return;
    252       1.3  augustss 		}
    253      1.23  christos 
    254      1.30    dyoung 		if (wpp->wpp_chip == CHIP_PLX_OTHER) {
    255      1.23  christos 			/* The PLX 9052 doesn't have IO at 0x14.  Perhaps
    256      1.23  christos 			   other chips have, so we'll make this conditional. */
    257      1.23  christos 			if (pci_mapreg_map(pa, WI_PCI_PLX_LOIO,
    258      1.23  christos 				PCI_MAPREG_TYPE_IO, 0, &plxt,
    259      1.23  christos 				&plxh, NULL, NULL) != 0) {
    260      1.23  christos 					printf(": can't map PLX\n");
    261      1.23  christos 					return;
    262      1.23  christos 				}
    263      1.21    dyoung 		}
    264      1.30    dyoung 		break;
    265      1.30    dyoung 	case CHIP_TMD_7160:
    266      1.30    dyoung 		/* Used instead of PLX on at least one revision of
    267      1.30    dyoung 		 * the National Datacomm Corporation NCP130. Values
    268      1.30    dyoung 		 * for registers acquired from OpenBSD, which in
    269      1.30    dyoung 		 * turn got them from a Linux driver.
    270      1.36     perry 		 */
    271      1.30    dyoung 		/* Map COR and I/O registers. */
    272      1.30    dyoung 		if (pci_mapreg_map(pa, WI_TMD_COR, PCI_MAPREG_TYPE_IO, 0,
    273      1.30    dyoung 		    &tmdt, &tmdh, NULL, NULL) != 0) {
    274      1.30    dyoung 			printf(": can't map TMD\n");
    275      1.30    dyoung 			return;
    276      1.30    dyoung 		}
    277      1.30    dyoung 		if (pci_mapreg_map(pa, WI_TMD_IO, PCI_MAPREG_TYPE_IO, 0,
    278      1.30    dyoung 		    &iot, &ioh, NULL, NULL) != 0) {
    279      1.30    dyoung 			printf(": can't map I/O space\n");
    280      1.30    dyoung 			return;
    281      1.30    dyoung 		}
    282      1.30    dyoung 		break;
    283      1.30    dyoung 	default:
    284       1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_CBMA,
    285       1.3  augustss 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
    286       1.3  augustss 		    0, &iot, &ioh, NULL, NULL) != 0) {
    287       1.3  augustss 			printf(": can't map mem space\n");
    288       1.3  augustss 			return;
    289       1.3  augustss 		}
    290       1.3  augustss 
    291       1.3  augustss 		memt = iot;
    292       1.3  augustss 		memh = ioh;
    293       1.3  augustss 		sc->sc_pci = 1;
    294      1.30    dyoung 		break;
    295       1.1    ichiro 	}
    296       1.1    ichiro 
    297      1.33   mycroft 	{
    298       1.3  augustss 		char devinfo[256];
    299       1.3  augustss 
    300      1.32    itojun 		pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    301       1.3  augustss 		printf(": %s (rev. 0x%02x)\n", devinfo,
    302       1.3  augustss 		       PCI_REVISION(pa->pa_class));
    303       1.3  augustss 	}
    304       1.1    ichiro 
    305       1.1    ichiro 	sc->sc_enabled = 1;
    306       1.1    ichiro 	sc->sc_enable = wi_pci_enable;
    307       1.1    ichiro 	sc->sc_disable = wi_pci_disable;
    308       1.1    ichiro 
    309       1.3  augustss 	sc->sc_iot = iot;
    310       1.3  augustss 	sc->sc_ioh = ioh;
    311       1.3  augustss 	/* Make sure interrupts are disabled. */
    312       1.3  augustss 	CSR_WRITE_2(sc, WI_INT_EN, 0);
    313       1.3  augustss 	CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
    314      1.21    dyoung 
    315      1.30    dyoung 	if (wpp->wpp_chip == CHIP_PLX_OTHER) {
    316      1.21    dyoung 		uint32_t command;
    317      1.21    dyoung #define	WI_LOCAL_INTCSR		0x4c
    318      1.21    dyoung #define	WI_LOCAL_INTEN		0x40	/* poke this into INTCSR */
    319      1.21    dyoung 
    320      1.21    dyoung 		command = bus_space_read_4(plxt, plxh, WI_LOCAL_INTCSR);
    321      1.21    dyoung 		command |= WI_LOCAL_INTEN;
    322      1.21    dyoung 		bus_space_write_4(plxt, plxh, WI_LOCAL_INTCSR, command);
    323      1.21    dyoung 	}
    324       1.1    ichiro 
    325       1.1    ichiro 	/* Map and establish the interrupt. */
    326       1.1    ichiro 	if (pci_intr_map(pa, &ih)) {
    327      1.44    cegger 		aprint_error_dev(self, "couldn't map interrupt\n");
    328       1.1    ichiro 		return;
    329       1.1    ichiro 	}
    330       1.1    ichiro 	intrstr = pci_intr_string(pc, ih);
    331       1.1    ichiro 
    332       1.1    ichiro 	psc->psc_ih = ih;
    333       1.1    ichiro 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc);
    334       1.1    ichiro 	if (sc->sc_ih == NULL) {
    335      1.44    cegger 		aprint_error_dev(self, "couldn't establish interrupt");
    336       1.1    ichiro 		if (intrstr != NULL)
    337       1.1    ichiro 			printf(" at %s", intrstr);
    338       1.1    ichiro 		printf("\n");
    339       1.1    ichiro 		return;
    340       1.1    ichiro 	}
    341       1.1    ichiro 
    342      1.44    cegger 	printf("%s: interrupting at %s\n", device_xname(self), intrstr);
    343       1.1    ichiro 
    344      1.30    dyoung 	switch (wpp->wpp_chip) {
    345      1.30    dyoung 	case CHIP_PLX_OTHER:
    346      1.30    dyoung 	case CHIP_PLX_9052:
    347       1.3  augustss 		/*
    348       1.3  augustss 		 * Setup the PLX chip for level interrupts and config index 1
    349       1.3  augustss 		 * XXX - should really reset the PLX chip too.
    350       1.3  augustss 		 */
    351       1.3  augustss 		bus_space_write_1(memt, memh,
    352       1.3  augustss 		    WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE);
    353      1.30    dyoung 		break;
    354      1.30    dyoung 	case CHIP_TMD_7160:
    355      1.30    dyoung 		/* Enable I/O mode and level interrupts on the embedded
    356      1.30    dyoung 		 * card. The card's COR is the first byte of BAR 0.
    357      1.30    dyoung 		 */
    358      1.30    dyoung 		bus_space_write_1(tmdt, tmdh, 0, WI_COR_IOMODE);
    359      1.30    dyoung 		break;
    360      1.30    dyoung 	default:
    361       1.3  augustss 		/* reset HFA3842 MAC core */
    362       1.3  augustss 		wi_pci_reset(sc);
    363      1.30    dyoung 		break;
    364       1.3  augustss 	}
    365       1.1    ichiro 
    366      1.44    cegger 	printf("%s:", device_xname(self));
    367      1.34   mycroft 
    368      1.34   mycroft 	if (wi_attach(sc, 0) != 0) {
    369      1.44    cegger 		aprint_error_dev(self, "failed to attach controller\n");
    370       1.1    ichiro 		pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
    371       1.1    ichiro 		return;
    372       1.1    ichiro 	}
    373      1.17    dyoung 
    374      1.31  nakayama 	if (!wpp->wpp_chip)
    375      1.31  nakayama 		sc->sc_reset = wi_pci_reset;
    376       1.1    ichiro 
    377      1.43  jmcneill 	if (!pmf_device_register(self, NULL, NULL))
    378      1.43  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    379      1.43  jmcneill 	else
    380      1.43  jmcneill 		pmf_class_network_register(self, &sc->sc_if);
    381       1.1    ichiro }
    382