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if_wi_pci.c revision 1.54.10.1
      1  1.54.10.1     rmind /*      $NetBSD: if_wi_pci.c,v 1.54.10.1 2014/05/18 17:45:40 rmind Exp $  */
      2        1.1    ichiro 
      3        1.1    ichiro /*-
      4        1.1    ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5        1.1    ichiro  * All rights reserved.
      6        1.1    ichiro  *
      7        1.1    ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8        1.1    ichiro  * by Hideaki Imaizumi <hiddy (at) sfc.wide.ad.jp>
      9        1.1    ichiro  * and Ichiro FUKUHARA (ichiro (at) ichiro.org).
     10        1.1    ichiro  *
     11        1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     12        1.1    ichiro  * modification, are permitted provided that the following conditions
     13        1.1    ichiro  * are met:
     14        1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     15        1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     16        1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     17        1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     18        1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     19        1.1    ichiro  *
     20        1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21        1.1    ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22        1.1    ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23        1.1    ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24        1.1    ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25        1.1    ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26        1.1    ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27        1.1    ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28        1.1    ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29        1.1    ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30        1.1    ichiro  * POSSIBILITY OF SUCH DAMAGE.
     31        1.1    ichiro  */
     32        1.1    ichiro 
     33        1.1    ichiro /*
     34        1.1    ichiro  * PCI bus front-end for the Intersil PCI WaveLan.
     35        1.1    ichiro  * Works with Prism2.5 Mini-PCI wavelan.
     36        1.1    ichiro  */
     37        1.2     lukem 
     38        1.2     lukem #include <sys/cdefs.h>
     39  1.54.10.1     rmind __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.54.10.1 2014/05/18 17:45:40 rmind Exp $");
     40        1.1    ichiro 
     41        1.1    ichiro #include <sys/param.h>
     42        1.1    ichiro #include <sys/systm.h>
     43        1.1    ichiro #include <sys/mbuf.h>
     44        1.1    ichiro #include <sys/syslog.h>
     45        1.1    ichiro #include <sys/socket.h>
     46        1.1    ichiro #include <sys/device.h>
     47        1.1    ichiro #include <sys/callout.h>
     48        1.1    ichiro 
     49        1.1    ichiro #include <net/if.h>
     50        1.1    ichiro #include <net/if_ether.h>
     51        1.1    ichiro #include <net/if_media.h>
     52       1.27    dyoung 
     53       1.37    dyoung #include <net80211/ieee80211_netbsd.h>
     54       1.27    dyoung #include <net80211/ieee80211_var.h>
     55       1.28    dyoung #include <net80211/ieee80211_radiotap.h>
     56       1.29    dyoung #include <net80211/ieee80211_rssadapt.h>
     57        1.1    ichiro 
     58       1.42        ad #include <sys/bus.h>
     59       1.42        ad #include <sys/intr.h>
     60        1.1    ichiro 
     61        1.1    ichiro #include <dev/pci/pcireg.h>
     62        1.1    ichiro #include <dev/pci/pcivar.h>
     63        1.1    ichiro #include <dev/pci/pcidevs.h>
     64        1.1    ichiro 
     65        1.1    ichiro #include <dev/ic/wi_ieee.h>
     66        1.1    ichiro #include <dev/ic/wireg.h>
     67        1.1    ichiro #include <dev/ic/wivar.h>
     68        1.1    ichiro 
     69       1.53    dyoung #define WI_PCI_CBMA PCI_BAR(0)	/* Configuration Base Memory Address */
     70        1.3  augustss #define WI_PCI_PLX_LOMEM	0x10	/* PLX chip membase */
     71       1.53    dyoung #define WI_PCI_PLX_LOIO PCI_BAR(1)	/* PLX chip iobase */
     72       1.53    dyoung #define WI_PCI_LOMEM PCI_BAR(2)	/* ISA membase */
     73       1.53    dyoung #define WI_PCI_LOIO PCI_BAR(3)	/* ISA iobase */
     74        1.3  augustss 
     75       1.23  christos #define CHIP_PLX_OTHER		0x01
     76       1.23  christos #define CHIP_PLX_9052		0x02
     77       1.30    dyoung #define CHIP_TMD_7160		0x03
     78       1.23  christos 
     79        1.3  augustss #define WI_PLX_COR_OFFSET       0x3E0
     80        1.3  augustss #define WI_PLX_COR_VALUE        0x41
     81        1.3  augustss 
     82        1.1    ichiro struct wi_pci_softc {
     83        1.1    ichiro 	struct wi_softc psc_wi;		/* real "wi" softc */
     84        1.1    ichiro 
     85        1.1    ichiro 	/* PCI-specific goo */
     86       1.36     perry 	pci_intr_handle_t psc_ih;
     87       1.26       scw 	pci_chipset_tag_t psc_pc;
     88       1.43  jmcneill 	pcitag_t psc_pcitag;
     89        1.1    ichiro };
     90        1.1    ichiro 
     91       1.47    cegger static int	wi_pci_match(device_t, cfdata_t, void *);
     92       1.47    cegger static void	wi_pci_attach(device_t, device_t, void *);
     93       1.51  christos static int	wi_pci_enable(device_t, int);
     94       1.35   thorpej static void	wi_pci_reset(struct wi_softc *);
     95        1.1    ichiro 
     96        1.1    ichiro static const struct wi_pci_product
     97       1.35   thorpej 	*wi_pci_lookup(struct pci_attach_args *);
     98        1.1    ichiro 
     99       1.51  christos CFATTACH_DECL_NEW(wi_pci, sizeof(struct wi_pci_softc),
    100       1.12   thorpej     wi_pci_match, wi_pci_attach, NULL, NULL);
    101        1.1    ichiro 
    102       1.35   thorpej static const struct wi_pci_product {
    103        1.1    ichiro 	pci_vendor_id_t		wpp_vendor;	/* vendor ID */
    104        1.1    ichiro 	pci_product_id_t	wpp_product;	/* product ID */
    105       1.30    dyoung 	int			wpp_chip;	/* uses other chip */
    106        1.1    ichiro } wi_pci_products[] = {
    107        1.3  augustss 	{ PCI_VENDOR_GLOBALSUN,		PCI_PRODUCT_GLOBALSUN_GL24110P,
    108       1.33   mycroft 	  CHIP_PLX_OTHER },
    109        1.3  augustss 	{ PCI_VENDOR_GLOBALSUN,		PCI_PRODUCT_GLOBALSUN_GL24110P02,
    110       1.33   mycroft 	  CHIP_PLX_OTHER },
    111        1.3  augustss 	{ PCI_VENDOR_EUMITCOM,		PCI_PRODUCT_EUMITCOM_WL11000P,
    112       1.33   mycroft 	  CHIP_PLX_OTHER },
    113        1.3  augustss 	{ PCI_VENDOR_3COM,		PCI_PRODUCT_3COM_3CRWE777A,
    114       1.33   mycroft 	  CHIP_PLX_OTHER },
    115        1.3  augustss 	{ PCI_VENDOR_NETGEAR,		PCI_PRODUCT_NETGEAR_MA301,
    116       1.33   mycroft 	  CHIP_PLX_OTHER },
    117        1.1    ichiro 	{ PCI_VENDOR_INTERSIL,		PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN,
    118       1.33   mycroft 	  0 },
    119       1.20     perry 	{ PCI_VENDOR_NDC,		PCI_PRODUCT_NDC_NCP130,
    120       1.33   mycroft 	  CHIP_PLX_9052 },
    121       1.22       jdc 	{ PCI_VENDOR_USR2,		PCI_PRODUCT_USR2_2415,
    122       1.33   mycroft 	  CHIP_PLX_OTHER },
    123       1.30    dyoung 	{ PCI_VENDOR_NDC,		PCI_PRODUCT_NDC_NCP130A2,
    124       1.33   mycroft 	  CHIP_TMD_7160 },
    125        1.1    ichiro 	{ 0,				0,
    126       1.33   mycroft 	  0},
    127        1.1    ichiro };
    128        1.1    ichiro 
    129        1.1    ichiro static int
    130       1.51  christos wi_pci_enable(device_t self, int onoff)
    131        1.1    ichiro {
    132       1.52  christos 	struct wi_pci_softc *psc = device_private(self);
    133       1.52  christos 	struct wi_softc *sc = &psc->psc_wi;
    134        1.1    ichiro 
    135       1.51  christos 	if (onoff) {
    136       1.51  christos 		/* establish the interrupt. */
    137       1.51  christos 		sc->sc_ih = pci_intr_establish(psc->psc_pc,
    138       1.51  christos 		    psc->psc_ih, IPL_NET, wi_intr, sc);
    139       1.51  christos 		if (sc->sc_ih == NULL) {
    140       1.51  christos 			aprint_error_dev(sc->sc_dev,
    141       1.51  christos 			    "couldn't establish interrupt\n");
    142       1.51  christos 			return EIO;
    143       1.51  christos 		}
    144        1.1    ichiro 
    145       1.51  christos 		/* reset HFA3842 MAC core */
    146       1.51  christos 		if (sc->sc_reset != NULL)
    147       1.51  christos 			wi_pci_reset(sc);
    148        1.1    ichiro 
    149       1.51  christos 	} else
    150       1.51  christos 		pci_intr_disestablish(psc->psc_pc, sc->sc_ih);
    151       1.51  christos 	return 0;
    152        1.7  jdolecek }
    153        1.7  jdolecek 
    154        1.7  jdolecek static void
    155       1.35   thorpej wi_pci_reset(struct wi_softc *sc)
    156        1.7  jdolecek {
    157        1.8   thorpej 	int i, secs, usecs;
    158        1.7  jdolecek 
    159       1.25      fvdl 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,
    160       1.25      fvdl 	    WI_PCI_COR, WI_COR_SOFT_RESET);
    161        1.8   thorpej 	DELAY(250*1000); /* 1/4 second */
    162        1.8   thorpej 
    163       1.25      fvdl 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,
    164       1.25      fvdl 	    WI_PCI_COR, WI_COR_CLEAR);
    165        1.8   thorpej 	DELAY(500*1000); /* 1/2 second */
    166        1.8   thorpej 
    167        1.8   thorpej 	/* wait 2 seconds for firmware to complete initialization. */
    168        1.8   thorpej 
    169        1.8   thorpej 	for (i = 200000; i--; DELAY(10))
    170        1.8   thorpej 		if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
    171        1.8   thorpej 			break;
    172       1.36     perry 
    173        1.8   thorpej 	if (i < 0) {
    174       1.51  christos 		printf("%s: PCI reset timed out\n", device_xname(sc->sc_dev));
    175       1.10      onoe 	} else if (sc->sc_if.if_flags & IFF_DEBUG) {
    176        1.8   thorpej 		usecs = (200000 - i) * 10;
    177        1.8   thorpej 		secs = usecs / 1000000;
    178        1.8   thorpej 		usecs %= 1000000;
    179        1.8   thorpej 
    180        1.8   thorpej 		printf("%s: PCI reset in %d.%06d seconds\n",
    181       1.51  christos                        device_xname(sc->sc_dev), secs, usecs);
    182        1.8   thorpej 	}
    183        1.7  jdolecek 
    184        1.7  jdolecek 	return;
    185        1.1    ichiro }
    186        1.1    ichiro 
    187        1.1    ichiro static const struct wi_pci_product *
    188       1.35   thorpej wi_pci_lookup(struct pci_attach_args *pa)
    189        1.1    ichiro {
    190        1.1    ichiro 	const struct wi_pci_product *wpp;
    191        1.1    ichiro 
    192        1.3  augustss 	for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) {
    193        1.1    ichiro 		if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor &&
    194        1.1    ichiro 		    PCI_PRODUCT(pa->pa_id) == wpp->wpp_product)
    195        1.1    ichiro 			return (wpp);
    196        1.1    ichiro 	}
    197        1.1    ichiro 	return (NULL);
    198        1.1    ichiro }
    199        1.1    ichiro 
    200        1.1    ichiro static int
    201       1.47    cegger wi_pci_match(device_t parent, cfdata_t match, void *aux)
    202        1.1    ichiro {
    203        1.1    ichiro 	struct pci_attach_args *pa = aux;
    204        1.1    ichiro 
    205        1.1    ichiro 	if (wi_pci_lookup(pa) != NULL)
    206        1.1    ichiro 		return (1);
    207        1.1    ichiro 	return (0);
    208        1.1    ichiro }
    209        1.1    ichiro 
    210        1.1    ichiro static void
    211       1.47    cegger wi_pci_attach(device_t parent, device_t self, void *aux)
    212        1.1    ichiro {
    213       1.48    cegger 	struct wi_pci_softc *psc = device_private(self);
    214        1.1    ichiro 	struct wi_softc *sc = &psc->psc_wi;
    215        1.1    ichiro 	struct pci_attach_args *pa = aux;
    216        1.1    ichiro 	pci_chipset_tag_t pc = pa->pa_pc;
    217        1.1    ichiro 	const char *intrstr;
    218        1.1    ichiro 	const struct wi_pci_product *wpp;
    219        1.1    ichiro 	pci_intr_handle_t ih;
    220       1.30    dyoung 	bus_space_tag_t memt, iot, plxt, tmdt;
    221       1.30    dyoung 	bus_space_handle_t memh, ioh, plxh, tmdh;
    222  1.54.10.1     rmind 	char intrbuf[PCI_INTRSTR_LEN];
    223        1.1    ichiro 
    224       1.51  christos 	sc->sc_dev = self;
    225       1.26       scw 	psc->psc_pc = pc;
    226       1.43  jmcneill 	psc->psc_pcitag = pa->pa_tag;
    227        1.1    ichiro 
    228        1.5  augustss 	wpp = wi_pci_lookup(pa);
    229        1.5  augustss #ifdef DIAGNOSTIC
    230        1.5  augustss 	if (wpp == NULL) {
    231        1.5  augustss 		printf("\n");
    232        1.5  augustss 		panic("wi_pci_attach: impossible");
    233        1.5  augustss 	}
    234        1.5  augustss #endif
    235        1.5  augustss 
    236       1.30    dyoung 	switch (wpp->wpp_chip) {
    237       1.30    dyoung 	case CHIP_PLX_OTHER:
    238       1.30    dyoung 	case CHIP_PLX_9052:
    239        1.3  augustss 		/* Map memory and I/O registers. */
    240        1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
    241        1.3  augustss 		    &memt, &memh, NULL, NULL) != 0) {
    242        1.3  augustss 			printf(": can't map mem space\n");
    243        1.3  augustss 			return;
    244        1.3  augustss 		}
    245        1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
    246        1.3  augustss 		    &iot, &ioh, NULL, NULL) != 0) {
    247        1.3  augustss 			printf(": can't map I/O space\n");
    248        1.3  augustss 			return;
    249        1.3  augustss 		}
    250       1.23  christos 
    251       1.30    dyoung 		if (wpp->wpp_chip == CHIP_PLX_OTHER) {
    252       1.23  christos 			/* The PLX 9052 doesn't have IO at 0x14.  Perhaps
    253       1.23  christos 			   other chips have, so we'll make this conditional. */
    254       1.23  christos 			if (pci_mapreg_map(pa, WI_PCI_PLX_LOIO,
    255       1.23  christos 				PCI_MAPREG_TYPE_IO, 0, &plxt,
    256       1.23  christos 				&plxh, NULL, NULL) != 0) {
    257       1.23  christos 					printf(": can't map PLX\n");
    258       1.23  christos 					return;
    259       1.23  christos 				}
    260       1.21    dyoung 		}
    261       1.30    dyoung 		break;
    262       1.30    dyoung 	case CHIP_TMD_7160:
    263       1.30    dyoung 		/* Used instead of PLX on at least one revision of
    264       1.30    dyoung 		 * the National Datacomm Corporation NCP130. Values
    265       1.30    dyoung 		 * for registers acquired from OpenBSD, which in
    266       1.30    dyoung 		 * turn got them from a Linux driver.
    267       1.36     perry 		 */
    268       1.30    dyoung 		/* Map COR and I/O registers. */
    269       1.30    dyoung 		if (pci_mapreg_map(pa, WI_TMD_COR, PCI_MAPREG_TYPE_IO, 0,
    270       1.30    dyoung 		    &tmdt, &tmdh, NULL, NULL) != 0) {
    271       1.30    dyoung 			printf(": can't map TMD\n");
    272       1.30    dyoung 			return;
    273       1.30    dyoung 		}
    274       1.30    dyoung 		if (pci_mapreg_map(pa, WI_TMD_IO, PCI_MAPREG_TYPE_IO, 0,
    275       1.30    dyoung 		    &iot, &ioh, NULL, NULL) != 0) {
    276       1.30    dyoung 			printf(": can't map I/O space\n");
    277       1.30    dyoung 			return;
    278       1.30    dyoung 		}
    279       1.30    dyoung 		break;
    280       1.30    dyoung 	default:
    281        1.3  augustss 		if (pci_mapreg_map(pa, WI_PCI_CBMA,
    282        1.3  augustss 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
    283        1.3  augustss 		    0, &iot, &ioh, NULL, NULL) != 0) {
    284        1.3  augustss 			printf(": can't map mem space\n");
    285        1.3  augustss 			return;
    286        1.3  augustss 		}
    287        1.3  augustss 
    288        1.3  augustss 		memt = iot;
    289        1.3  augustss 		memh = ioh;
    290        1.3  augustss 		sc->sc_pci = 1;
    291       1.30    dyoung 		break;
    292        1.1    ichiro 	}
    293        1.1    ichiro 
    294       1.54  drochner 	pci_aprint_devinfo(pa, NULL);
    295        1.1    ichiro 
    296        1.1    ichiro 	sc->sc_enabled = 1;
    297        1.1    ichiro 	sc->sc_enable = wi_pci_enable;
    298        1.1    ichiro 
    299        1.3  augustss 	sc->sc_iot = iot;
    300        1.3  augustss 	sc->sc_ioh = ioh;
    301        1.3  augustss 	/* Make sure interrupts are disabled. */
    302        1.3  augustss 	CSR_WRITE_2(sc, WI_INT_EN, 0);
    303        1.3  augustss 	CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
    304       1.21    dyoung 
    305       1.30    dyoung 	if (wpp->wpp_chip == CHIP_PLX_OTHER) {
    306       1.21    dyoung 		uint32_t command;
    307       1.21    dyoung #define	WI_LOCAL_INTCSR		0x4c
    308       1.21    dyoung #define	WI_LOCAL_INTEN		0x40	/* poke this into INTCSR */
    309       1.21    dyoung 
    310       1.21    dyoung 		command = bus_space_read_4(plxt, plxh, WI_LOCAL_INTCSR);
    311       1.21    dyoung 		command |= WI_LOCAL_INTEN;
    312       1.21    dyoung 		bus_space_write_4(plxt, plxh, WI_LOCAL_INTCSR, command);
    313       1.21    dyoung 	}
    314        1.1    ichiro 
    315        1.1    ichiro 	/* Map and establish the interrupt. */
    316        1.1    ichiro 	if (pci_intr_map(pa, &ih)) {
    317       1.44    cegger 		aprint_error_dev(self, "couldn't map interrupt\n");
    318        1.1    ichiro 		return;
    319        1.1    ichiro 	}
    320  1.54.10.1     rmind 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
    321        1.1    ichiro 
    322        1.1    ichiro 	psc->psc_ih = ih;
    323        1.1    ichiro 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc);
    324        1.1    ichiro 	if (sc->sc_ih == NULL) {
    325       1.44    cegger 		aprint_error_dev(self, "couldn't establish interrupt");
    326        1.1    ichiro 		if (intrstr != NULL)
    327       1.50     njoly 			aprint_error(" at %s", intrstr);
    328       1.50     njoly 		aprint_error("\n");
    329        1.1    ichiro 		return;
    330        1.1    ichiro 	}
    331        1.1    ichiro 
    332       1.50     njoly 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    333        1.1    ichiro 
    334       1.30    dyoung 	switch (wpp->wpp_chip) {
    335       1.30    dyoung 	case CHIP_PLX_OTHER:
    336       1.30    dyoung 	case CHIP_PLX_9052:
    337        1.3  augustss 		/*
    338        1.3  augustss 		 * Setup the PLX chip for level interrupts and config index 1
    339        1.3  augustss 		 * XXX - should really reset the PLX chip too.
    340        1.3  augustss 		 */
    341        1.3  augustss 		bus_space_write_1(memt, memh,
    342        1.3  augustss 		    WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE);
    343       1.30    dyoung 		break;
    344       1.30    dyoung 	case CHIP_TMD_7160:
    345       1.30    dyoung 		/* Enable I/O mode and level interrupts on the embedded
    346       1.30    dyoung 		 * card. The card's COR is the first byte of BAR 0.
    347       1.30    dyoung 		 */
    348       1.30    dyoung 		bus_space_write_1(tmdt, tmdh, 0, WI_COR_IOMODE);
    349       1.30    dyoung 		break;
    350       1.30    dyoung 	default:
    351        1.3  augustss 		/* reset HFA3842 MAC core */
    352        1.3  augustss 		wi_pci_reset(sc);
    353       1.30    dyoung 		break;
    354        1.3  augustss 	}
    355        1.1    ichiro 
    356       1.44    cegger 	printf("%s:", device_xname(self));
    357       1.34   mycroft 
    358       1.34   mycroft 	if (wi_attach(sc, 0) != 0) {
    359       1.44    cegger 		aprint_error_dev(self, "failed to attach controller\n");
    360        1.1    ichiro 		pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
    361        1.1    ichiro 		return;
    362        1.1    ichiro 	}
    363       1.17    dyoung 
    364       1.31  nakayama 	if (!wpp->wpp_chip)
    365       1.31  nakayama 		sc->sc_reset = wi_pci_reset;
    366        1.1    ichiro 
    367       1.49   tsutsui 	if (pmf_device_register(self, NULL, NULL))
    368       1.49   tsutsui 		pmf_class_network_register(self, &sc->sc_if);
    369       1.49   tsutsui 	else
    370       1.43  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    371        1.1    ichiro }
    372