if_wi_pci.c revision 1.25.2.2 1 /* $NetBSD: if_wi_pci.c,v 1.25.2.2 2004/08/03 10:49:09 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Hideaki Imaizumi <hiddy (at) sfc.wide.ad.jp>
9 * and Ichiro FUKUHARA (ichiro (at) ichiro.org).
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Intersil PCI WaveLan.
42 * Works with Prism2.5 Mini-PCI wavelan.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.25.2.2 2004/08/03 10:49:09 skrll Exp $");
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/mbuf.h>
51 #include <sys/syslog.h>
52 #include <sys/socket.h>
53 #include <sys/device.h>
54 #include <sys/callout.h>
55
56 #include <net/if.h>
57 #include <net/if_ether.h>
58 #include <net/if_media.h>
59
60 #include <net80211/ieee80211_var.h>
61 #include <net80211/ieee80211_compat.h>
62 #include <net80211/ieee80211_radiotap.h>
63 #include <net80211/ieee80211_rssadapt.h>
64
65 #include <machine/bus.h>
66 #include <machine/intr.h>
67
68 #include <dev/pci/pcireg.h>
69 #include <dev/pci/pcivar.h>
70 #include <dev/pci/pcidevs.h>
71
72 #include <dev/ic/wi_ieee.h>
73 #include <dev/ic/wireg.h>
74 #include <dev/ic/wivar.h>
75
76 #define WI_PCI_CBMA 0x10 /* Configuration Base Memory Address */
77 #define WI_PCI_PLX_LOMEM 0x10 /* PLX chip membase */
78 #define WI_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
79 #define WI_PCI_LOMEM 0x18 /* ISA membase */
80 #define WI_PCI_LOIO 0x1C /* ISA iobase */
81
82 #define CHIP_PLX_OTHER 0x01
83 #define CHIP_PLX_9052 0x02
84 #define CHIP_TMD_7160 0x03
85
86 #define WI_PLX_COR_OFFSET 0x3E0
87 #define WI_PLX_COR_VALUE 0x41
88
89 struct wi_pci_softc {
90 struct wi_softc psc_wi; /* real "wi" softc */
91
92 /* PCI-specific goo */
93 pci_intr_handle_t psc_ih;
94 pci_chipset_tag_t psc_pc;
95
96 void *sc_powerhook; /* power hook descriptor */
97 };
98
99 static int wi_pci_match __P((struct device *, struct cfdata *, void *));
100 static void wi_pci_attach __P((struct device *, struct device *, void *));
101 static int wi_pci_enable __P((struct wi_softc *));
102 static void wi_pci_disable __P((struct wi_softc *));
103 static void wi_pci_reset __P((struct wi_softc *));
104 static void wi_pci_powerhook __P((int, void *));
105
106 static const struct wi_pci_product
107 *wi_pci_lookup __P((struct pci_attach_args *));
108
109 CFATTACH_DECL(wi_pci, sizeof(struct wi_pci_softc),
110 wi_pci_match, wi_pci_attach, NULL, NULL);
111
112 const struct wi_pci_product {
113 pci_vendor_id_t wpp_vendor; /* vendor ID */
114 pci_product_id_t wpp_product; /* product ID */
115 int wpp_chip; /* uses other chip */
116 } wi_pci_products[] = {
117 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P,
118 CHIP_PLX_OTHER },
119 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02,
120 CHIP_PLX_OTHER },
121 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P,
122 CHIP_PLX_OTHER },
123 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A,
124 CHIP_PLX_OTHER },
125 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301,
126 CHIP_PLX_OTHER },
127 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN,
128 0 },
129 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130,
130 CHIP_PLX_9052 },
131 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_2415,
132 CHIP_PLX_OTHER },
133 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2,
134 CHIP_TMD_7160 },
135 { 0, 0,
136 0},
137 };
138
139 static int
140 wi_pci_enable(sc)
141 struct wi_softc *sc;
142 {
143 struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
144
145 /* establish the interrupt. */
146 sc->sc_ih = pci_intr_establish(psc->psc_pc,
147 psc->psc_ih, IPL_NET, wi_intr, sc);
148 if (sc->sc_ih == NULL) {
149 printf("%s: couldn't establish interrupt\n",
150 sc->sc_dev.dv_xname);
151 return (EIO);
152 }
153
154 /* reset HFA3842 MAC core */
155 if (sc->sc_reset != NULL)
156 wi_pci_reset(sc);
157
158 return (0);
159 }
160
161 static void
162 wi_pci_disable(sc)
163 struct wi_softc *sc;
164 {
165 struct wi_pci_softc *psc = (struct wi_pci_softc *)sc;
166
167 pci_intr_disestablish(psc->psc_pc, sc->sc_ih);
168 }
169
170 static void
171 wi_pci_reset(sc)
172 struct wi_softc *sc;
173 {
174 int i, secs, usecs;
175
176 CSR_WRITE_2(sc, WI_PCI_COR, WI_COR_SOFT_RESET);
177 DELAY(250*1000); /* 1/4 second */
178
179 CSR_WRITE_2(sc, WI_PCI_COR, WI_COR_CLEAR);
180 DELAY(500*1000); /* 1/2 second */
181
182 /* wait 2 seconds for firmware to complete initialization. */
183
184 for (i = 200000; i--; DELAY(10))
185 if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
186 break;
187
188 if (i < 0) {
189 printf("%s: PCI reset timed out\n", sc->sc_dev.dv_xname);
190 } else if (sc->sc_if.if_flags & IFF_DEBUG) {
191 usecs = (200000 - i) * 10;
192 secs = usecs / 1000000;
193 usecs %= 1000000;
194
195 printf("%s: PCI reset in %d.%06d seconds\n",
196 sc->sc_dev.dv_xname, secs, usecs);
197 }
198
199 return;
200 }
201
202 static const struct wi_pci_product *
203 wi_pci_lookup(pa)
204 struct pci_attach_args *pa;
205 {
206 const struct wi_pci_product *wpp;
207
208 for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) {
209 if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor &&
210 PCI_PRODUCT(pa->pa_id) == wpp->wpp_product)
211 return (wpp);
212 }
213 return (NULL);
214 }
215
216 static int
217 wi_pci_match(parent, match, aux)
218 struct device *parent;
219 struct cfdata *match;
220 void *aux;
221 {
222 struct pci_attach_args *pa = aux;
223
224 if (wi_pci_lookup(pa) != NULL)
225 return (1);
226 return (0);
227 }
228
229 static void
230 wi_pci_attach(parent, self, aux)
231 struct device *parent, *self;
232 void *aux;
233 {
234 struct wi_pci_softc *psc = (struct wi_pci_softc *)self;
235 struct wi_softc *sc = &psc->psc_wi;
236 struct pci_attach_args *pa = aux;
237 pci_chipset_tag_t pc = pa->pa_pc;
238 const char *intrstr;
239 const struct wi_pci_product *wpp;
240 pci_intr_handle_t ih;
241 bus_space_tag_t memt, iot, plxt, tmdt;
242 bus_space_handle_t memh, ioh, plxh, tmdh;
243
244 psc->psc_pc = pc;
245
246 wpp = wi_pci_lookup(pa);
247 #ifdef DIAGNOSTIC
248 if (wpp == NULL) {
249 printf("\n");
250 panic("wi_pci_attach: impossible");
251 }
252 #endif
253
254 switch (wpp->wpp_chip) {
255 case CHIP_PLX_OTHER:
256 case CHIP_PLX_9052:
257 /* Map memory and I/O registers. */
258 if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
259 &memt, &memh, NULL, NULL) != 0) {
260 printf(": can't map mem space\n");
261 return;
262 }
263 if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
264 &iot, &ioh, NULL, NULL) != 0) {
265 printf(": can't map I/O space\n");
266 return;
267 }
268
269 if (wpp->wpp_chip == CHIP_PLX_OTHER) {
270 /* The PLX 9052 doesn't have IO at 0x14. Perhaps
271 other chips have, so we'll make this conditional. */
272 if (pci_mapreg_map(pa, WI_PCI_PLX_LOIO,
273 PCI_MAPREG_TYPE_IO, 0, &plxt,
274 &plxh, NULL, NULL) != 0) {
275 printf(": can't map PLX\n");
276 return;
277 }
278 }
279 break;
280 case CHIP_TMD_7160:
281 /* Used instead of PLX on at least one revision of
282 * the National Datacomm Corporation NCP130. Values
283 * for registers acquired from OpenBSD, which in
284 * turn got them from a Linux driver.
285 */
286 /* Map COR and I/O registers. */
287 if (pci_mapreg_map(pa, WI_TMD_COR, PCI_MAPREG_TYPE_IO, 0,
288 &tmdt, &tmdh, NULL, NULL) != 0) {
289 printf(": can't map TMD\n");
290 return;
291 }
292 if (pci_mapreg_map(pa, WI_TMD_IO, PCI_MAPREG_TYPE_IO, 0,
293 &iot, &ioh, NULL, NULL) != 0) {
294 printf(": can't map I/O space\n");
295 return;
296 }
297 break;
298 default:
299 if (pci_mapreg_map(pa, WI_PCI_CBMA,
300 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
301 0, &iot, &ioh, NULL, NULL) != 0) {
302 printf(": can't map mem space\n");
303 return;
304 }
305
306 memt = iot;
307 memh = ioh;
308 sc->sc_pci = 1;
309 break;
310 }
311
312 {
313 char devinfo[256];
314
315 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
316 printf(": %s (rev. 0x%02x)\n", devinfo,
317 PCI_REVISION(pa->pa_class));
318 }
319
320 sc->sc_enabled = 1;
321 sc->sc_enable = wi_pci_enable;
322 sc->sc_disable = wi_pci_disable;
323
324 /* Enable the card. */
325 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
326 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
327 PCI_COMMAND_MASTER_ENABLE);
328
329 sc->sc_iot = iot;
330 sc->sc_ioh = ioh;
331 /* Make sure interrupts are disabled. */
332 CSR_WRITE_2(sc, WI_INT_EN, 0);
333 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
334
335 if (wpp->wpp_chip == CHIP_PLX_OTHER) {
336 uint32_t command;
337 #define WI_LOCAL_INTCSR 0x4c
338 #define WI_LOCAL_INTEN 0x40 /* poke this into INTCSR */
339
340 command = bus_space_read_4(plxt, plxh, WI_LOCAL_INTCSR);
341 command |= WI_LOCAL_INTEN;
342 bus_space_write_4(plxt, plxh, WI_LOCAL_INTCSR, command);
343 }
344
345 /* Map and establish the interrupt. */
346 if (pci_intr_map(pa, &ih)) {
347 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
348 return;
349 }
350 intrstr = pci_intr_string(pc, ih);
351
352 psc->psc_ih = ih;
353 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc);
354 if (sc->sc_ih == NULL) {
355 printf("%s: couldn't establish interrupt",
356 sc->sc_dev.dv_xname);
357 if (intrstr != NULL)
358 printf(" at %s", intrstr);
359 printf("\n");
360 return;
361 }
362
363 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
364
365 switch (wpp->wpp_chip) {
366 case CHIP_PLX_OTHER:
367 case CHIP_PLX_9052:
368 /*
369 * Setup the PLX chip for level interrupts and config index 1
370 * XXX - should really reset the PLX chip too.
371 */
372 bus_space_write_1(memt, memh,
373 WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE);
374 break;
375 case CHIP_TMD_7160:
376 /* Enable I/O mode and level interrupts on the embedded
377 * card. The card's COR is the first byte of BAR 0.
378 */
379 bus_space_write_1(tmdt, tmdh, 0, WI_COR_IOMODE);
380 break;
381 default:
382 /* reset HFA3842 MAC core */
383 wi_pci_reset(sc);
384 break;
385 }
386
387 printf("%s:", sc->sc_dev.dv_xname);
388 if (wi_attach(sc) != 0) {
389 printf("%s: failed to attach controller\n",
390 sc->sc_dev.dv_xname);
391 pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
392 return;
393 }
394
395 if (!wpp->wpp_chip)
396 sc->sc_reset = wi_pci_reset;
397
398 /* Add a suspend hook to restore PCI config state */
399 psc->sc_powerhook = powerhook_establish(wi_pci_powerhook, psc);
400 if (psc->sc_powerhook == NULL)
401 printf ("%s: WARNING: unable to establish pci power hook\n",
402 sc->sc_dev.dv_xname);
403 }
404
405 static void
406 wi_pci_powerhook(why, arg)
407 int why;
408 void *arg;
409 {
410 struct wi_pci_softc *psc = arg;
411 struct wi_softc *sc = &psc->psc_wi;
412
413 wi_power(sc, why);
414 }
415