if_wmvar.h revision 1.8 1 1.8 msaitoh /* $NetBSD: if_wmvar.h,v 1.8 2010/01/14 18:56:02 msaitoh Exp $ */
2 1.3 msaitoh
3 1.3 msaitoh /*
4 1.3 msaitoh * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
5 1.3 msaitoh * All rights reserved.
6 1.3 msaitoh *
7 1.3 msaitoh * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.3 msaitoh *
9 1.3 msaitoh * Redistribution and use in source and binary forms, with or without
10 1.3 msaitoh * modification, are permitted provided that the following conditions
11 1.3 msaitoh * are met:
12 1.3 msaitoh * 1. Redistributions of source code must retain the above copyright
13 1.3 msaitoh * notice, this list of conditions and the following disclaimer.
14 1.3 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
15 1.3 msaitoh * notice, this list of conditions and the following disclaimer in the
16 1.3 msaitoh * documentation and/or other materials provided with the distribution.
17 1.3 msaitoh * 3. All advertising materials mentioning features or use of this software
18 1.3 msaitoh * must display the following acknowledgement:
19 1.3 msaitoh * This product includes software developed for the NetBSD Project by
20 1.3 msaitoh * Wasabi Systems, Inc.
21 1.3 msaitoh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.3 msaitoh * or promote products derived from this software without specific prior
23 1.3 msaitoh * written permission.
24 1.3 msaitoh *
25 1.3 msaitoh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.3 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.3 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.3 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.3 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.3 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.3 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.3 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.3 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.3 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.3 msaitoh * POSSIBILITY OF SUCH DAMAGE.
36 1.3 msaitoh */
37 1.3 msaitoh
38 1.3 msaitoh /*******************************************************************************
39 1.3 msaitoh
40 1.3 msaitoh Copyright (c) 2001-2005, Intel Corporation
41 1.3 msaitoh All rights reserved.
42 1.3 msaitoh
43 1.3 msaitoh Redistribution and use in source and binary forms, with or without
44 1.3 msaitoh modification, are permitted provided that the following conditions are met:
45 1.3 msaitoh
46 1.3 msaitoh 1. Redistributions of source code must retain the above copyright notice,
47 1.3 msaitoh this list of conditions and the following disclaimer.
48 1.3 msaitoh
49 1.3 msaitoh 2. Redistributions in binary form must reproduce the above copyright
50 1.3 msaitoh notice, this list of conditions and the following disclaimer in the
51 1.3 msaitoh documentation and/or other materials provided with the distribution.
52 1.3 msaitoh
53 1.3 msaitoh 3. Neither the name of the Intel Corporation nor the names of its
54 1.3 msaitoh contributors may be used to endorse or promote products derived from
55 1.3 msaitoh this software without specific prior written permission.
56 1.3 msaitoh
57 1.3 msaitoh THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
58 1.3 msaitoh AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
59 1.3 msaitoh IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
60 1.3 msaitoh ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
61 1.3 msaitoh LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 1.3 msaitoh CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 1.3 msaitoh SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 1.3 msaitoh INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 1.3 msaitoh CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 1.3 msaitoh ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 1.3 msaitoh POSSIBILITY OF SUCH DAMAGE.
68 1.3 msaitoh
69 1.3 msaitoh *******************************************************************************/
70 1.1 gavan
71 1.1 gavan #ifndef _DEV_PCI_IF_WMVAR_H_
72 1.1 gavan #define _DEV_PCI_IF_WMVAR_H_
73 1.1 gavan
74 1.4 msaitoh /* sc_flags */
75 1.4 msaitoh #define WM_F_HAS_MII 0x0001 /* has MII */
76 1.4 msaitoh #define WM_F_EEPROM_HANDSHAKE 0x0002 /* requires EEPROM handshake */
77 1.4 msaitoh #define WM_F_EEPROM_SEMAPHORE 0x0004 /* EEPROM with semaphore */
78 1.4 msaitoh #define WM_F_EEPROM_EERDEEWR 0x0008 /* EEPROM access via EERD/EEWR */
79 1.4 msaitoh #define WM_F_EEPROM_SPI 0x0010 /* EEPROM is SPI */
80 1.4 msaitoh #define WM_F_EEPROM_FLASH 0x0020 /* EEPROM is FLASH */
81 1.4 msaitoh #define WM_F_EEPROM_INVALID 0x0040 /* EEPROM not present (bad checksum) */
82 1.4 msaitoh #define WM_F_IOH_VALID 0x0080 /* I/O handle is valid */
83 1.4 msaitoh #define WM_F_BUS64 0x0100 /* bus is 64-bit */
84 1.4 msaitoh #define WM_F_PCIX 0x0200 /* bus is PCI-X */
85 1.4 msaitoh #define WM_F_CSA 0x0400 /* bus is CSA */
86 1.4 msaitoh #define WM_F_PCIE 0x0800 /* bus is PCI-Express */
87 1.4 msaitoh #define WM_F_SWFW_SYNC 0x1000 /* Software-Firmware synchronisation */
88 1.4 msaitoh #define WM_F_SWFWHW_SYNC 0x2000 /* Software-Firmware synchronisation */
89 1.4 msaitoh
90 1.3 msaitoh typedef enum {
91 1.3 msaitoh WM_T_unknown = 0,
92 1.3 msaitoh WM_T_82542_2_0, /* i82542 2.0 (really old) */
93 1.3 msaitoh WM_T_82542_2_1, /* i82542 2.1+ (old) */
94 1.3 msaitoh WM_T_82543, /* i82543 */
95 1.3 msaitoh WM_T_82544, /* i82544 */
96 1.3 msaitoh WM_T_82540, /* i82540 */
97 1.3 msaitoh WM_T_82545, /* i82545 */
98 1.3 msaitoh WM_T_82545_3, /* i82545 3.0+ */
99 1.3 msaitoh WM_T_82546, /* i82546 */
100 1.3 msaitoh WM_T_82546_3, /* i82546 3.0+ */
101 1.3 msaitoh WM_T_82541, /* i82541 */
102 1.3 msaitoh WM_T_82541_2, /* i82541 2.0+ */
103 1.3 msaitoh WM_T_82547, /* i82547 */
104 1.3 msaitoh WM_T_82547_2, /* i82547 2.0+ */
105 1.3 msaitoh WM_T_82571, /* i82571 */
106 1.3 msaitoh WM_T_82572, /* i82572 */
107 1.3 msaitoh WM_T_82573, /* i82573 */
108 1.3 msaitoh WM_T_82574, /* i82574 */
109 1.5 msaitoh WM_T_82583, /* i82583 */
110 1.3 msaitoh WM_T_80003, /* i80003 */
111 1.3 msaitoh WM_T_ICH8, /* ICH8 LAN */
112 1.3 msaitoh WM_T_ICH9, /* ICH9 LAN */
113 1.3 msaitoh WM_T_ICH10, /* ICH10 LAN */
114 1.7 msaitoh WM_T_PCH, /* PCH LAN */
115 1.3 msaitoh } wm_chip_type;
116 1.1 gavan
117 1.8 msaitoh typedef enum {
118 1.8 msaitoh WMPHY_UNKNOWN = 0,
119 1.8 msaitoh WMPHY_NONE,
120 1.8 msaitoh WMPHY_M88,
121 1.8 msaitoh WMPHY_IGP,
122 1.8 msaitoh WMPHY_IGP_2,
123 1.8 msaitoh WMPHY_GG82563,
124 1.8 msaitoh WMPHY_IGP_3,
125 1.8 msaitoh WMPHY_IFE,
126 1.8 msaitoh WMPHY_BM,
127 1.8 msaitoh WMPHY_82578,
128 1.8 msaitoh WMPHY_82577
129 1.8 msaitoh } wm_phy_type;
130 1.8 msaitoh
131 1.8 msaitoh
132 1.6 msaitoh #define WM_PHY_CFG_TIMEOUT 100
133 1.6 msaitoh #define WM_ICH8_LAN_INIT_TIMEOUT 1500
134 1.6 msaitoh #define WM_MDIO_OWNERSHIP_TIMEOUT 10
135 1.6 msaitoh
136 1.1 gavan #endif /* _DEV_PCI_IF_WMVAR_H_ */
137