if_wmvar.h revision 1.18
1 /* $NetBSD: if_wmvar.h,v 1.18 2014/07/11 08:34:27 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /******************************************************************************* 39 40 Copyright (c) 2001-2005, Intel Corporation 41 All rights reserved. 42 43 Redistribution and use in source and binary forms, with or without 44 modification, are permitted provided that the following conditions are met: 45 46 1. Redistributions of source code must retain the above copyright notice, 47 this list of conditions and the following disclaimer. 48 49 2. Redistributions in binary form must reproduce the above copyright 50 notice, this list of conditions and the following disclaimer in the 51 documentation and/or other materials provided with the distribution. 52 53 3. Neither the name of the Intel Corporation nor the names of its 54 contributors may be used to endorse or promote products derived from 55 this software without specific prior written permission. 56 57 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 58 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 61 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 POSSIBILITY OF SUCH DAMAGE. 68 69 *******************************************************************************/ 70 71 #ifndef _DEV_PCI_IF_WMVAR_H_ 72 #define _DEV_PCI_IF_WMVAR_H_ 73 74 /* sc_flags */ 75 #define WM_F_HAS_MII 0x00000001 /* has MII */ 76 #define WM_F_LOCK_EECD 0x00000002 /* Lock using with EECD register */ 77 #define WM_F_LOCK_SWSM 0x00000004 /* Lock using with SWSM register */ 78 #define WM_F_LOCK_SWFW 0x00000008 /* Lock using with SWFW register */ 79 #define WM_F_LOCK_EXTCNF 0x00000010 /* Lock using with EXTCNF register */ 80 #define WM_F_EEPROM_EERDEEWR 0x00000020 /* EEPROM access via EERD/EEWR */ 81 #define WM_F_EEPROM_SPI 0x00000040 /* EEPROM is SPI */ 82 #define WM_F_EEPROM_FLASH 0x00000080 /* EEPROM is FLASH */ 83 #define WM_F_EEPROM_FLASH_HW 0x00000100 /* EEPROM is FLASH */ 84 #define WM_F_EEPROM_INVALID 0x00000200 /* EEPROM not present (bad checksum) */ 85 #define WM_F_IOH_VALID 0x00000400 /* I/O handle is valid */ 86 #define WM_F_BUS64 0x00000800 /* bus is 64-bit */ 87 #define WM_F_PCIX 0x00001000 /* bus is PCI-X */ 88 #define WM_F_CSA 0x00002000 /* bus is CSA */ 89 #define WM_F_PCIE 0x00004000 /* bus is PCI-Express */ 90 #define WM_F_SGMII 0x00008000 /* use SGMII */ 91 #define WM_F_NEWQUEUE 0x00010000 /* chips which has the new queue system */ 92 #define WM_F_ASF_FIRMWARE_PRES 0x00020000 93 #define WM_F_ARC_SUBSYS_VALID 0x00040000 94 #define WM_F_HAS_AMT 0x00080000 95 #define WM_F_HAS_MANAGE 0x00100000 96 #define WM_F_WOL 0x00200000 97 #define WM_F_EEE 0x00400000 /* Energy Efficiency Ethernet */ 98 99 typedef enum { 100 WM_T_unknown = 0, 101 WM_T_82542_2_0, /* i82542 2.0 (really old) */ 102 WM_T_82542_2_1, /* i82542 2.1+ (old) */ 103 WM_T_82543, /* i82543 */ 104 WM_T_82544, /* i82544 */ 105 WM_T_82540, /* i82540 */ 106 WM_T_82545, /* i82545 */ 107 WM_T_82545_3, /* i82545 3.0+ */ 108 WM_T_82546, /* i82546 */ 109 WM_T_82546_3, /* i82546 3.0+ */ 110 WM_T_82541, /* i82541 */ 111 WM_T_82541_2, /* i82541 2.0+ */ 112 WM_T_82547, /* i82547 */ 113 WM_T_82547_2, /* i82547 2.0+ */ 114 WM_T_82571, /* i82571 */ 115 WM_T_82572, /* i82572 */ 116 WM_T_82573, /* i82573 */ 117 WM_T_82574, /* i82574 */ 118 WM_T_82583, /* i82583 */ 119 WM_T_82575, /* i82575 */ 120 WM_T_82576, /* i82576 */ 121 WM_T_82580, /* i82580 */ 122 WM_T_82580ER, /* i82580ER */ 123 WM_T_I350, /* I350 */ 124 WM_T_I354, /* I354 */ 125 WM_T_I210, /* I210 */ 126 WM_T_I211, /* I211 */ 127 WM_T_80003, /* i80003 */ 128 WM_T_ICH8, /* ICH8 LAN */ 129 WM_T_ICH9, /* ICH9 LAN */ 130 WM_T_ICH10, /* ICH10 LAN */ 131 WM_T_PCH, /* PCH LAN */ 132 WM_T_PCH2, /* PCH2 LAN */ 133 WM_T_PCH_LPT, /* PCH LPT LAN (I21[78]) */ 134 } wm_chip_type; 135 136 typedef enum { 137 WMPHY_UNKNOWN = 0, 138 WMPHY_NONE, 139 WMPHY_M88, 140 WMPHY_IGP, 141 WMPHY_IGP_2, 142 WMPHY_GG82563, 143 WMPHY_IGP_3, 144 WMPHY_IFE, 145 WMPHY_BM, 146 WMPHY_82577, 147 WMPHY_82578, 148 WMPHY_82579, 149 WMPHY_82580 150 } wm_phy_type; 151 152 153 #define WM_GEN_POLL_TIMEOUT 640 154 #define WM_PHY_CFG_TIMEOUT 100 155 #define WM_ICH8_LAN_INIT_TIMEOUT 1500 156 #define WM_MDIO_OWNERSHIP_TIMEOUT 10 157 158 #endif /* _DEV_PCI_IF_WMVAR_H_ */ 159
Indexes created Thu Sep 25 16:09:42 GMT 2025