if_wpireg.h revision 1.2
1 /* $NetBSD: if_wpireg.h,v 1.2 2006/10/31 21:53:41 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define WPI_TX_RING_COUNT 256 21 #define WPI_SVC_RING_COUNT 256 22 #define WPI_CMD_RING_COUNT 256 23 #define WPI_RX_RING_COUNT 64 24 25 /* 26 * Rings must be aligned on a four 4K-pages boundary. 27 * I had a hard time figuring this out. 28 */ 29 #define WPI_RING_DMA_ALIGN 0x4000 30 31 /* maximum scatter/gather */ 32 #define WPI_MAX_SCATTER 4 33 34 /* 35 * Control and status registers. 36 */ 37 #define WPI_HWCONFIG 0x000 38 #define WPI_INTR 0x008 39 #define WPI_MASK 0x00c 40 #define WPI_INTR_STATUS 0x010 41 #define WPI_GPIO_STATUS 0x018 42 #define WPI_RESET 0x020 43 #define WPI_GPIO_CTL 0x024 44 #define WPI_EEPROM_CTL 0x02c 45 #define WPI_EEPROM_STATUS 0x030 46 #define WPI_UCODE_CLR 0x05c 47 #define WPI_TEMPERATURE 0x060 48 #define WPI_CHICKEN 0x100 49 #define WPI_PLL_CTL 0x20c 50 #define WPI_FW_TARGET 0x410 51 #define WPI_WRITE_MEM_ADDR 0x444 52 #define WPI_READ_MEM_ADDR 0x448 53 #define WPI_WRITE_MEM_DATA 0x44c 54 #define WPI_READ_MEM_DATA 0x450 55 #define WPI_TX_WIDX 0x460 56 #define WPI_TX_CTL(qid) (0x940 + (qid) * 8) 57 #define WPI_TX_BASE(qid) (0x944 + (qid) * 8) 58 #define WPI_TX_DESC(qid) (0x980 + (qid) * 80) 59 #define WPI_RX_CONFIG 0xc00 60 #define WPI_RX_BASE 0xc04 61 #define WPI_RX_WIDX 0xc20 62 #define WPI_RX_RIDX_PTR 0xc24 63 #define WPI_RX_CTL 0xcc0 64 #define WPI_RX_STATUS 0xcc4 65 #define WPI_TX_CONFIG(qid) (0xd00 + (qid) * 32) 66 #define WPI_TX_CREDIT(qid) (0xd04 + (qid) * 32) 67 #define WPI_TX_STATE(qid) (0xd08 + (qid) * 32) 68 #define WPI_TX_BASE_PTR 0xe80 69 #define WPI_MSG_CONFIG 0xe88 70 #define WPI_TX_STATUS 0xe90 71 72 73 /* 74 * NIC internal memory offsets. 75 */ 76 #define WPI_MEM_MODE 0x2e00 77 #define WPI_MEM_RA 0x2e04 78 #define WPI_MEM_TXCFG 0x2e10 79 #define WPI_MEM_MAGIC4 0x2e14 80 #define WPI_MEM_MAGIC5 0x2e20 81 #define WPI_MEM_BYPASS1 0x2e2c 82 #define WPI_MEM_BYPASS2 0x2e30 83 #define WPI_MEM_CLOCK1 0x3004 84 #define WPI_MEM_CLOCK2 0x3008 85 #define WPI_MEM_POWER 0x300c 86 #define WPI_MEM_PCIDEV 0x3010 87 #define WPI_MEM_UCODE_CTL 0x3400 88 #define WPI_MEM_UCODE_SRC 0x3404 89 #define WPI_MEM_UCODE_DST 0x3408 90 #define WPI_MEM_UCODE_SIZE 0x340c 91 #define WPI_MEM_UCODE_BASE 0x3800 92 93 94 /* possible flags for register WPI_HWCONFIG */ 95 #define WPI_HW_ALM_MB (1 << 8) 96 #define WPI_HW_ALM_MM (1 << 9) 97 #define WPI_HW_SKU_MRC (1 << 10) 98 #define WPI_HW_REV_D (1 << 11) 99 #define WPI_HW_TYPE_B (1 << 12) 100 101 /* possible flags for registers WPI_READ_MEM_ADDR/WPI_WRITE_MEM_ADDR */ 102 #define WPI_MEM_4 ((sizeof (uint32_t) - 1) << 24) 103 104 /* possible values for WPI_FW_TARGET */ 105 #define WPI_FW_TEXT 0x00000000 106 #define WPI_FW_DATA 0x00800000 107 108 /* possible flags for WPI_GPIO_STATUS */ 109 #define WPI_POWERED (1 << 9) 110 111 /* possible flags for register WPI_RESET */ 112 #define WPI_NEVO_RESET (1 << 0) 113 #define WPI_SW_RESET (1 << 7) 114 #define WPI_MASTER_DISABLED (1 << 8) 115 #define WPI_STOP_MASTER (1 << 9) 116 117 /* possible flags for register WPI_GPIO_CTL */ 118 #define WPI_GPIO_CLOCK (1 << 0) 119 #define WPI_GPIO_INIT (1 << 2) 120 #define WPI_GPIO_MAC (1 << 3) 121 #define WPI_GPIO_SLEEP (1 << 4) 122 #define WPI_GPIO_PWR_STATUS 0x07000000 123 #define WPI_GPIO_PWR_SLEEP (4 << 24) 124 125 /* possible flags for register WPI_CHICKEN */ 126 #define WPI_CHICKEN_RXNOLOS (1 << 23) 127 128 /* possible flags for register WPI_PLL_CTL */ 129 #define WPI_PLL_INIT (1 << 24) 130 131 /* possible flags for register WPI_UCODE_CLR */ 132 #define WPI_RADIO_OFF (1 << 1) 133 #define WPI_DISABLE_CMD (1 << 2) 134 135 /* possible flags for WPI_RX_STATUS */ 136 #define WPI_RX_IDLE (1 << 24) 137 138 /* possible flags for register WPI_UC_CTL */ 139 #define WPI_UC_RUN (1 << 30) 140 141 /* possible flags for register WPI_INTR_CSR */ 142 #define WPI_ALIVE_INTR (1 << 0) 143 #define WPI_WAKEUP_INTR (1 << 1) 144 #define WPI_SW_ERROR (1 << 25) 145 #define WPI_TX_INTR (1 << 27) 146 #define WPI_HW_ERROR (1 << 29) 147 #define WPI_RX_INTR (1 << 31) 148 149 #define WPI_INTR_MASK \ 150 (WPI_SW_ERROR | WPI_HW_ERROR | WPI_TX_INTR | WPI_RX_INTR | \ 151 WPI_ALIVE_INTR | WPI_WAKEUP_INTR) 152 153 /* possible flags for register WPI_TX_STATUS */ 154 #define WPI_TX_IDLE(qid) (1 << ((qid) + 24) | 1 << ((qid) + 16)) 155 156 /* possible flags for register WPI_EEPROM_CTL */ 157 #define WPI_EEPROM_READY (1 << 0) 158 159 /* possible flags for register WPI_EEPROM_STATUS */ 160 #define WPI_EEPROM_VERSION 0x00000007 161 #define WPI_EEPROM_LOCKED 0x00000180 162 163 164 struct wpi_shared { 165 uint32_t txbase[8]; 166 uint32_t next; 167 uint32_t reserved[2]; 168 } __attribute__((__packed__)); 169 170 #define WPI_MAX_SEG_LEN 65520 171 struct wpi_tx_desc { 172 uint32_t flags; 173 #define WPI_PAD32(x) ((((x) + 3) & ~3) - (x)) 174 175 struct { 176 uint32_t addr; 177 uint32_t len; 178 } __attribute__((__packed__)) segs[WPI_MAX_SCATTER]; 179 uint8_t reserved[28]; 180 } __attribute__((__packed__)); 181 182 struct wpi_tx_stat { 183 uint8_t nrts; 184 uint8_t ntries; 185 uint8_t nkill; 186 uint8_t rate; 187 uint32_t duration; 188 uint32_t status; 189 } __attribute__((__packed__)); 190 191 struct wpi_rx_desc { 192 uint32_t len; 193 uint8_t type; 194 #define WPI_UC_READY 1 195 #define WPI_RX_DONE 27 196 #define WPI_TX_DONE 28 197 #define WPI_START_SCAN 130 198 #define WPI_STOP_SCAN 132 199 #define WPI_STATE_CHANGED 161 200 201 uint8_t flags; 202 uint8_t idx; 203 uint8_t qid; 204 } __attribute__((__packed__)); 205 206 struct wpi_rx_stat { 207 uint8_t len; 208 #define WPI_STAT_MAXLEN 20 209 210 uint8_t id; 211 uint8_t rssi; /* received signal strength */ 212 #define WPI_RSSI_OFFSET 95 213 214 uint8_t agc; /* access gain control */ 215 uint16_t signal; 216 uint16_t noise; 217 } __attribute__((__packed__)); 218 219 struct wpi_rx_head { 220 uint16_t chan; 221 uint16_t flags; 222 uint8_t reserved; 223 uint8_t rate; 224 uint16_t len; 225 } __attribute__((__packed__)); 226 227 struct wpi_rx_tail { 228 uint32_t flags; 229 #define WPI_RX_NO_CRC_ERR (1 << 0) 230 #define WPI_RX_NO_OVFL_ERR (1 << 1) 231 /* shortcut for the above */ 232 #define WPI_RX_NOERROR (WPI_RX_NO_CRC_ERR | WPI_RX_NO_OVFL_ERR) 233 234 uint64_t tstamp; 235 uint32_t tbeacon; 236 } __attribute__((__packed__)); 237 238 struct wpi_tx_cmd { 239 uint8_t code; 240 #define WPI_CMD_CONFIGURE 16 241 #define WPI_CMD_ASSOCIATE 17 242 #define WPI_CMD_SET_WME 19 243 #define WPI_CMD_TSF 20 244 #define WPI_CMD_ADD_NODE 24 245 #define WPI_CMD_TX_DATA 28 246 #define WPI_CMD_MRR_SETUP 71 247 #define WPI_CMD_SET_LED 72 248 #define WPI_CMD_SET_POWER_MODE 119 249 #define WPI_CMD_SCAN 128 250 #define WPI_CMD_SET_BEACON 145 251 #define WPI_CMD_BLUETOOTH 155 252 #define WPI_CMD_TXPOWER 176 253 254 uint8_t flags; 255 uint8_t idx; 256 uint8_t qid; 257 uint8_t data[124]; 258 } __attribute__((__packed__)); 259 260 /* structure for WPI_CMD_CONFIGURE */ 261 struct wpi_config { 262 uint8_t myaddr[IEEE80211_ADDR_LEN]; 263 uint16_t reserved1; 264 uint8_t bssid[IEEE80211_ADDR_LEN]; 265 uint16_t reserved2; 266 uint32_t reserved3[2]; 267 uint8_t mode; 268 #define WPI_MODE_HOSTAP 1 269 #define WPI_MODE_STA 3 270 #define WPI_MODE_IBSS 4 271 #define WPI_MODE_MONITOR 6 272 273 uint8_t reserved4[3]; 274 uint8_t ofdm_mask; 275 uint8_t cck_mask; 276 uint16_t state; 277 #define WPI_STATE_ASSOCIATED 4 278 279 uint32_t flags; 280 #define WPI_CONFIG_24GHZ (1 << 0) 281 #define WPI_CONFIG_CCK (1 << 1) 282 #define WPI_CONFIG_AUTO (1 << 2) 283 #define WPI_CONFIG_SHSLOT (1 << 4) 284 #define WPI_CONFIG_SHPREAMBLE (1 << 5) 285 #define WPI_CONFIG_NODIVERSITY (1 << 7) 286 #define WPI_CONFIG_ANTENNA_A (1 << 8) 287 #define WPI_CONFIG_ANTENNA_B (1 << 9) 288 #define WPI_CONFIG_TSF (1 << 15) 289 290 uint32_t filter; 291 #define WPI_FILTER_PROMISC (1 << 0) 292 #define WPI_FILTER_CTL (1 << 1) 293 #define WPI_FILTER_MULTICAST (1 << 2) 294 #define WPI_FILTER_NODECRYPT (1 << 3) 295 #define WPI_FILTER_BSS (1 << 5) 296 #define WPI_FILTER_BEACON (1 << 6) 297 298 uint8_t chan; 299 uint8_t reserved6[3]; 300 } __attribute__((__packed__)); 301 302 /* structure for command WPI_CMD_ASSOCIATE */ 303 struct wpi_assoc { 304 uint32_t flags; 305 uint32_t filter; 306 uint8_t ofdm_mask; 307 uint8_t cck_mask; 308 uint16_t reserved; 309 } __attribute__((__packed__)); 310 311 /* structure for command WPI_CMD_SET_WME */ 312 struct wpi_wme_setup { 313 uint32_t flags; 314 struct { 315 uint16_t cwmin; 316 uint16_t cwmax; 317 uint8_t aifsn; 318 uint8_t reserved; 319 uint16_t txop; 320 } __packed ac[WME_NUM_AC]; 321 } __packed; 322 323 /* structure for command WPI_CMD_TSF */ 324 struct wpi_cmd_tsf { 325 uint64_t tstamp; 326 uint16_t bintval; 327 uint16_t atim; 328 uint32_t binitval; 329 uint16_t lintval; 330 uint16_t reserved; 331 } __attribute__((__packed__)); 332 333 /* structure for WPI_CMD_ADD_NODE */ 334 struct wpi_node_info { 335 uint8_t control; 336 #define WPI_NODE_UPDATE (1 << 0) 337 338 uint8_t reserved1[3]; 339 uint8_t bssid[IEEE80211_ADDR_LEN]; 340 uint16_t reserved2; 341 uint8_t id; 342 #define WPI_ID_BSS 0 343 #define WPI_ID_BROADCAST 24 344 345 uint8_t sta_mask; 346 uint16_t reserved3; 347 uint16_t key_flags; 348 uint8_t tkip; 349 uint8_t reserved4; 350 uint16_t ttak[5]; 351 uint16_t reserved5; 352 uint8_t key[IEEE80211_KEYBUF_SIZE]; 353 uint32_t flags; 354 uint32_t mask; 355 uint16_t tid; 356 uint8_t rate; 357 uint8_t reserved6; 358 uint8_t add_imm; 359 uint8_t del_imm; 360 uint16_t add_imm_start; 361 } __attribute__((__packed__)); 362 363 /* structure for command WPI_CMD_TX_DATA */ 364 struct wpi_cmd_data { 365 uint16_t len; 366 uint16_t lnext; 367 uint32_t flags; 368 #define WPI_TX_NEED_RTS (1 << 1) 369 #define WPI_TX_NEED_ACK (1 << 3) 370 #define WPI_TX_FULL_TXOP (1 << 7) 371 #define WPI_TX_AUTO_SEQ (1 << 13) 372 #define WPI_TX_INSERT_TSTAMP (1 << 16) 373 374 uint8_t rate; 375 uint8_t id; 376 uint8_t tid; 377 uint8_t security; 378 uint8_t key[IEEE80211_KEYBUF_SIZE]; 379 uint8_t tkip[IEEE80211_WEP_MICLEN]; 380 uint32_t fnext; 381 uint32_t lifetime; 382 uint8_t ofdm_mask; 383 uint8_t cck_mask; 384 uint8_t rts_ntries; 385 uint8_t data_ntries; 386 uint16_t timeout; 387 uint16_t txop; 388 struct ieee80211_frame wh; 389 } __attribute__((__packed__)); 390 391 /* structure for command WPI_CMD_SET_BEACON */ 392 struct wpi_cmd_beacon { 393 uint16_t len; 394 uint16_t reserved1; 395 uint32_t flags; /* same as wpi_cmd_data */ 396 uint8_t rate; 397 uint8_t id; 398 uint8_t reserved2[30]; 399 uint32_t lifetime; 400 uint8_t ofdm_mask; 401 uint8_t cck_mask; 402 uint16_t reserved3[3]; 403 uint16_t tim; 404 uint8_t timsz; 405 uint8_t reserved4; 406 struct ieee80211_frame wh; 407 } __attribute__((__packed__)); 408 409 /* structure for WPI_CMD_MRR_SETUP */ 410 struct wpi_mrr_setup { 411 uint32_t which; 412 #define WPI_MRR_CTL 0 413 #define WPI_MRR_DATA 1 414 415 struct { 416 uint8_t plcp; 417 uint8_t flags; 418 uint8_t ntries; 419 uint8_t next; 420 #define WPI_OFDM6 0 421 #define WPI_OFDM54 7 422 #define WPI_CCK1 8 423 #define WPI_CCK2 9 424 #define WPI_CCK11 11 425 426 } __attribute__((__packed__)) rates[WPI_CCK11 + 1]; 427 } __attribute__((__packed__)); 428 429 /* structure for WPI_CMD_SET_LED */ 430 struct wpi_cmd_led { 431 uint32_t unit; /* multiplier (in usecs) */ 432 uint8_t which; 433 #define WPI_LED_ACTIVITY 1 434 #define WPI_LED_LINK 2 435 436 uint8_t off; 437 uint8_t on; 438 uint8_t reserved; 439 } __attribute__((__packed__)); 440 441 /* structure for WPI_CMD_SET_POWER_MODE */ 442 struct wpi_power { 443 uint32_t flags; 444 uint32_t rx_timeout; 445 uint32_t tx_timeout; 446 uint32_t sleep[5]; 447 } __attribute__((__packed__)); 448 449 /* structure for command WPI_CMD_SCAN */ 450 struct wpi_scan_hdr { 451 uint8_t len; 452 uint8_t first; 453 uint8_t reserved1; 454 uint8_t nchan; 455 uint16_t quiet; 456 uint16_t threshold; 457 uint16_t band; 458 #define WPI_SCAN_5GHZ 1 459 uint16_t reserved2[5]; 460 uint32_t flags; 461 uint32_t filter; 462 uint16_t pbrlen; 463 uint16_t reserved4; 464 uint32_t magic1; 465 uint8_t rate; 466 uint8_t id; 467 uint16_t reserved5; 468 uint32_t reserved6[7]; 469 uint32_t mask; 470 uint32_t reserved7[2]; 471 uint8_t reserved8; 472 uint8_t esslen; 473 uint8_t essid[134]; 474 475 /* followed by probe request body */ 476 /* followed by nchan x wpi_scan_chan */ 477 } __attribute__((__packed__)); 478 479 struct wpi_scan_chan { 480 uint8_t flags; 481 uint8_t chan; 482 #define WPI_CHAN_ACTIVE 3 483 uint16_t magic; /* XXX */ 484 uint16_t active; /* msecs */ 485 uint16_t passive; /* msecs */ 486 } __attribute__((__packed__)); 487 488 /* structure for WPI_CMD_BLUETOOTH */ 489 struct wpi_bluetooth { 490 uint8_t flags; 491 uint8_t lead; 492 uint8_t kill; 493 uint8_t reserved; 494 uint32_t ack; 495 uint32_t cts; 496 } __attribute__((__packed__)); 497 498 /* structure for command WPI_CMD_TXPOWER */ 499 struct wpi_txpower { 500 uint32_t reserved1; 501 uint16_t pwr1[14]; 502 uint32_t reserved2[2]; 503 uint16_t pwr2[14]; 504 uint32_t reserved3[2]; 505 } __attribute__((__packed__)); 506 507 508 /* firmware image header */ 509 struct wpi_firmware_hdr { 510 uint32_t version; 511 uint32_t textsz; 512 uint32_t datasz; 513 uint32_t bootsz; 514 } __attribute__((__packed__)); 515 516 /* structure for WPI_UC_READY notification */ 517 struct wpi_ucode_info { 518 uint32_t version; 519 uint8_t revision[8]; 520 uint8_t type; 521 uint8_t subtype; 522 uint16_t reserved; 523 uint32_t logptr; 524 uint32_t errorptr; 525 uint32_t timestamp; 526 uint32_t valid; 527 } __attribute__((__packed__)); 528 529 /* structure for WPI_START_SCAN notification */ 530 struct wpi_start_scan { 531 uint64_t tstamp; 532 uint32_t tbeacon; 533 uint8_t chan; 534 uint8_t band; 535 uint16_t reserved; 536 uint32_t status; 537 } __attribute__((__packed__)); 538 539 /* structure for WPI_STOP_SCAN notification */ 540 struct wpi_stop_scan { 541 uint8_t nchan; 542 uint8_t status; 543 uint8_t reserved; 544 uint8_t chan; 545 uint64_t tsf; 546 } __packed; 547 548 #define WPI_EEPROM_MAC 0x015 549 #define WPI_EEPROM_REVISION 0x035 550 #define WPI_EEPROM_CAPABILITIES 0x045 551 #define WPI_EEPROM_TYPE 0x04a 552 #define WPI_EEPROM_PWR1 0x1ae 553 #define WPI_EEPROM_PWR2 0x1bc 554 555 #define WPI_READ(sc, reg) \ 556 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 557 558 #define WPI_WRITE(sc, reg, val) \ 559 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 560 561 #define WPI_WRITE_REGION_4(sc, offset, datap, count) \ 562 bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 563 (datap), (count)) 564
Indexes created Thu Sep 25 16:09:42 GMT 2025