if_wpireg.h revision 1.3
1 /* $NetBSD: if_wpireg.h,v 1.3 2007/01/13 09:39:06 degroote Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define WPI_TX_RING_COUNT 256 21 #define WPI_SVC_RING_COUNT 256 22 #define WPI_CMD_RING_COUNT 256 23 #define WPI_RX_RING_COUNT 64 24 25 #define WPI_BUF_ALIGN 4096 26 27 /* 28 * Rings must be aligned on a four 4K-pages boundary. 29 * I had a hard time figuring this out. 30 */ 31 #define WPI_RING_DMA_ALIGN 0x4000 32 33 /* maximum scatter/gather */ 34 #define WPI_MAX_SCATTER 4 35 36 /* maximum Rx buffer size */ 37 #define WPI_RBUF_SIZE (3 * 1024) /* XXX 3000 but must be aligned! */ 38 39 /* 40 * Control and status registers. 41 */ 42 #define WPI_HWCONFIG 0x000 43 #define WPI_INTR 0x008 44 #define WPI_MASK 0x00c 45 #define WPI_INTR_STATUS 0x010 46 #define WPI_GPIO_STATUS 0x018 47 #define WPI_RESET 0x020 48 #define WPI_GPIO_CTL 0x024 49 #define WPI_EEPROM_CTL 0x02c 50 #define WPI_EEPROM_STATUS 0x030 51 #define WPI_UCODE_CLR 0x05c 52 #define WPI_TEMPERATURE 0x060 53 #define WPI_CHICKEN 0x100 54 #define WPI_PLL_CTL 0x20c 55 #define WPI_FW_TARGET 0x410 56 #define WPI_WRITE_MEM_ADDR 0x444 57 #define WPI_READ_MEM_ADDR 0x448 58 #define WPI_WRITE_MEM_DATA 0x44c 59 #define WPI_READ_MEM_DATA 0x450 60 #define WPI_TX_WIDX 0x460 61 #define WPI_TX_CTL(qid) (0x940 + (qid) * 8) 62 #define WPI_TX_BASE(qid) (0x944 + (qid) * 8) 63 #define WPI_TX_DESC(qid) (0x980 + (qid) * 80) 64 #define WPI_RX_CONFIG 0xc00 65 #define WPI_RX_BASE 0xc04 66 #define WPI_RX_WIDX 0xc20 67 #define WPI_RX_RIDX_PTR 0xc24 68 #define WPI_RX_CTL 0xcc0 69 #define WPI_RX_STATUS 0xcc4 70 #define WPI_TX_CONFIG(qid) (0xd00 + (qid) * 32) 71 #define WPI_TX_CREDIT(qid) (0xd04 + (qid) * 32) 72 #define WPI_TX_STATE(qid) (0xd08 + (qid) * 32) 73 #define WPI_TX_BASE_PTR 0xe80 74 #define WPI_MSG_CONFIG 0xe88 75 #define WPI_TX_STATUS 0xe90 76 77 78 /* 79 * NIC internal memory offsets. 80 */ 81 #define WPI_MEM_MODE 0x2e00 82 #define WPI_MEM_RA 0x2e04 83 #define WPI_MEM_TXCFG 0x2e10 84 #define WPI_MEM_MAGIC4 0x2e14 85 #define WPI_MEM_MAGIC5 0x2e20 86 #define WPI_MEM_BYPASS1 0x2e2c 87 #define WPI_MEM_BYPASS2 0x2e30 88 #define WPI_MEM_CLOCK1 0x3004 89 #define WPI_MEM_CLOCK2 0x3008 90 #define WPI_MEM_POWER 0x300c 91 #define WPI_MEM_PCIDEV 0x3010 92 #define WPI_MEM_UCODE_CTL 0x3400 93 #define WPI_MEM_UCODE_SRC 0x3404 94 #define WPI_MEM_UCODE_DST 0x3408 95 #define WPI_MEM_UCODE_SIZE 0x340c 96 #define WPI_MEM_UCODE_BASE 0x3800 97 98 99 /* possible flags for register WPI_HWCONFIG */ 100 #define WPI_HW_ALM_MB (1 << 8) 101 #define WPI_HW_ALM_MM (1 << 9) 102 #define WPI_HW_SKU_MRC (1 << 10) 103 #define WPI_HW_REV_D (1 << 11) 104 #define WPI_HW_TYPE_B (1 << 12) 105 106 /* possible flags for registers WPI_READ_MEM_ADDR/WPI_WRITE_MEM_ADDR */ 107 #define WPI_MEM_4 ((sizeof (uint32_t) - 1) << 24) 108 109 /* possible values for WPI_FW_TARGET */ 110 #define WPI_FW_TEXT 0x00000000 111 #define WPI_FW_DATA 0x00800000 112 113 /* possible flags for WPI_GPIO_STATUS */ 114 #define WPI_POWERED (1 << 9) 115 116 /* possible flags for register WPI_RESET */ 117 #define WPI_NEVO_RESET (1 << 0) 118 #define WPI_SW_RESET (1 << 7) 119 #define WPI_MASTER_DISABLED (1 << 8) 120 #define WPI_STOP_MASTER (1 << 9) 121 122 /* possible flags for register WPI_GPIO_CTL */ 123 #define WPI_GPIO_CLOCK (1 << 0) 124 #define WPI_GPIO_INIT (1 << 2) 125 #define WPI_GPIO_MAC (1 << 3) 126 #define WPI_GPIO_SLEEP (1 << 4) 127 #define WPI_GPIO_PWR_STATUS 0x07000000 128 #define WPI_GPIO_PWR_SLEEP (4 << 24) 129 130 /* possible flags for register WPI_CHICKEN */ 131 #define WPI_CHICKEN_RXNOLOS (1 << 23) 132 133 /* possible flags for register WPI_PLL_CTL */ 134 #define WPI_PLL_INIT (1 << 24) 135 136 /* possible flags for register WPI_UCODE_CLR */ 137 #define WPI_RADIO_OFF (1 << 1) 138 #define WPI_DISABLE_CMD (1 << 2) 139 140 /* possible flags for WPI_RX_STATUS */ 141 #define WPI_RX_IDLE (1 << 24) 142 143 /* possible flags for register WPI_UC_CTL */ 144 #define WPI_UC_RUN (1 << 30) 145 146 /* possible flags for register WPI_INTR_CSR */ 147 #define WPI_ALIVE_INTR (1 << 0) 148 #define WPI_WAKEUP_INTR (1 << 1) 149 #define WPI_SW_ERROR (1 << 25) 150 #define WPI_TX_INTR (1 << 27) 151 #define WPI_HW_ERROR (1 << 29) 152 #define WPI_RX_INTR (1 << 31) 153 154 #define WPI_INTR_MASK \ 155 (WPI_SW_ERROR | WPI_HW_ERROR | WPI_TX_INTR | WPI_RX_INTR | \ 156 WPI_ALIVE_INTR | WPI_WAKEUP_INTR) 157 158 /* possible flags for register WPI_TX_STATUS */ 159 #define WPI_TX_IDLE(qid) (1 << ((qid) + 24) | 1 << ((qid) + 16)) 160 161 /* possible flags for register WPI_EEPROM_CTL */ 162 #define WPI_EEPROM_READY (1 << 0) 163 164 /* possible flags for register WPI_EEPROM_STATUS */ 165 #define WPI_EEPROM_VERSION 0x00000007 166 #define WPI_EEPROM_LOCKED 0x00000180 167 168 169 struct wpi_shared { 170 uint32_t txbase[8]; 171 uint32_t next; 172 uint32_t reserved[2]; 173 } __attribute__((__packed__)); 174 175 #define WPI_MAX_SEG_LEN 65520 176 struct wpi_tx_desc { 177 uint32_t flags; 178 #define WPI_PAD32(x) ((((x) + 3) & ~3) - (x)) 179 180 struct { 181 uint32_t addr; 182 uint32_t len; 183 } __attribute__((__packed__)) segs[WPI_MAX_SCATTER]; 184 uint8_t reserved[28]; 185 } __attribute__((__packed__)); 186 187 struct wpi_tx_stat { 188 uint8_t nrts; 189 uint8_t ntries; 190 uint8_t nkill; 191 uint8_t rate; 192 uint32_t duration; 193 uint32_t status; 194 } __attribute__((__packed__)); 195 196 struct wpi_rx_desc { 197 uint32_t len; 198 uint8_t type; 199 #define WPI_UC_READY 1 200 #define WPI_RX_DONE 27 201 #define WPI_TX_DONE 28 202 #define WPI_START_SCAN 130 203 #define WPI_STOP_SCAN 132 204 #define WPI_STATE_CHANGED 161 205 206 uint8_t flags; 207 uint8_t idx; 208 uint8_t qid; 209 } __attribute__((__packed__)); 210 211 struct wpi_rx_stat { 212 uint8_t len; 213 #define WPI_STAT_MAXLEN 20 214 215 uint8_t id; 216 uint8_t rssi; /* received signal strength */ 217 #define WPI_RSSI_OFFSET 95 218 219 uint8_t agc; /* access gain control */ 220 uint16_t signal; 221 uint16_t noise; 222 } __attribute__((__packed__)); 223 224 struct wpi_rx_head { 225 uint16_t chan; 226 uint16_t flags; 227 uint8_t reserved; 228 uint8_t rate; 229 uint16_t len; 230 } __attribute__((__packed__)); 231 232 struct wpi_rx_tail { 233 uint32_t flags; 234 #define WPI_RX_NO_CRC_ERR (1 << 0) 235 #define WPI_RX_NO_OVFL_ERR (1 << 1) 236 /* shortcut for the above */ 237 #define WPI_RX_NOERROR (WPI_RX_NO_CRC_ERR | WPI_RX_NO_OVFL_ERR) 238 239 uint64_t tstamp; 240 uint32_t tbeacon; 241 } __attribute__((__packed__)); 242 243 struct wpi_tx_cmd { 244 uint8_t code; 245 #define WPI_CMD_CONFIGURE 16 246 #define WPI_CMD_ASSOCIATE 17 247 #define WPI_CMD_SET_WME 19 248 #define WPI_CMD_TSF 20 249 #define WPI_CMD_ADD_NODE 24 250 #define WPI_CMD_TX_DATA 28 251 #define WPI_CMD_MRR_SETUP 71 252 #define WPI_CMD_SET_LED 72 253 #define WPI_CMD_SET_POWER_MODE 119 254 #define WPI_CMD_SCAN 128 255 #define WPI_CMD_SET_BEACON 145 256 #define WPI_CMD_BLUETOOTH 155 257 #define WPI_CMD_TXPOWER 176 258 259 uint8_t flags; 260 uint8_t idx; 261 uint8_t qid; 262 uint8_t data[124]; 263 } __attribute__((__packed__)); 264 265 /* structure for WPI_CMD_CONFIGURE */ 266 struct wpi_config { 267 uint8_t myaddr[IEEE80211_ADDR_LEN]; 268 uint16_t reserved1; 269 uint8_t bssid[IEEE80211_ADDR_LEN]; 270 uint16_t reserved2; 271 uint32_t reserved3[2]; 272 uint8_t mode; 273 #define WPI_MODE_HOSTAP 1 274 #define WPI_MODE_STA 3 275 #define WPI_MODE_IBSS 4 276 #define WPI_MODE_MONITOR 6 277 278 uint8_t reserved4[3]; 279 uint8_t ofdm_mask; 280 uint8_t cck_mask; 281 uint16_t state; 282 #define WPI_STATE_ASSOCIATED 4 283 284 uint32_t flags; 285 #define WPI_CONFIG_24GHZ (1 << 0) 286 #define WPI_CONFIG_CCK (1 << 1) 287 #define WPI_CONFIG_AUTO (1 << 2) 288 #define WPI_CONFIG_SHSLOT (1 << 4) 289 #define WPI_CONFIG_SHPREAMBLE (1 << 5) 290 #define WPI_CONFIG_NODIVERSITY (1 << 7) 291 #define WPI_CONFIG_ANTENNA_A (1 << 8) 292 #define WPI_CONFIG_ANTENNA_B (1 << 9) 293 #define WPI_CONFIG_TSF (1 << 15) 294 295 uint32_t filter; 296 #define WPI_FILTER_PROMISC (1 << 0) 297 #define WPI_FILTER_CTL (1 << 1) 298 #define WPI_FILTER_MULTICAST (1 << 2) 299 #define WPI_FILTER_NODECRYPT (1 << 3) 300 #define WPI_FILTER_BSS (1 << 5) 301 #define WPI_FILTER_BEACON (1 << 6) 302 303 uint8_t chan; 304 uint8_t reserved6[3]; 305 } __attribute__((__packed__)); 306 307 /* structure for command WPI_CMD_ASSOCIATE */ 308 struct wpi_assoc { 309 uint32_t flags; 310 uint32_t filter; 311 uint8_t ofdm_mask; 312 uint8_t cck_mask; 313 uint16_t reserved; 314 } __attribute__((__packed__)); 315 316 /* structure for command WPI_CMD_SET_WME */ 317 struct wpi_wme_setup { 318 uint32_t flags; 319 struct { 320 uint16_t cwmin; 321 uint16_t cwmax; 322 uint8_t aifsn; 323 uint8_t reserved; 324 uint16_t txop; 325 } __packed ac[WME_NUM_AC]; 326 } __packed; 327 328 /* structure for command WPI_CMD_TSF */ 329 struct wpi_cmd_tsf { 330 uint64_t tstamp; 331 uint16_t bintval; 332 uint16_t atim; 333 uint32_t binitval; 334 uint16_t lintval; 335 uint16_t reserved; 336 } __attribute__((__packed__)); 337 338 /* structure for WPI_CMD_ADD_NODE */ 339 struct wpi_node_info { 340 uint8_t control; 341 #define WPI_NODE_UPDATE (1 << 0) 342 343 uint8_t reserved1[3]; 344 uint8_t bssid[IEEE80211_ADDR_LEN]; 345 uint16_t reserved2; 346 uint8_t id; 347 #define WPI_ID_BSS 0 348 #define WPI_ID_BROADCAST 24 349 350 uint8_t sta_mask; 351 uint16_t reserved3; 352 uint16_t key_flags; 353 uint8_t tkip; 354 uint8_t reserved4; 355 uint16_t ttak[5]; 356 uint16_t reserved5; 357 uint8_t key[IEEE80211_KEYBUF_SIZE]; 358 uint32_t flags; 359 uint32_t mask; 360 uint16_t tid; 361 uint8_t rate; 362 uint8_t reserved6; 363 uint8_t add_imm; 364 uint8_t del_imm; 365 uint16_t add_imm_start; 366 } __attribute__((__packed__)); 367 368 /* structure for command WPI_CMD_TX_DATA */ 369 struct wpi_cmd_data { 370 uint16_t len; 371 uint16_t lnext; 372 uint32_t flags; 373 #define WPI_TX_NEED_RTS (1 << 1) 374 #define WPI_TX_NEED_ACK (1 << 3) 375 #define WPI_TX_FULL_TXOP (1 << 7) 376 #define WPI_TX_AUTO_SEQ (1 << 13) 377 #define WPI_TX_INSERT_TSTAMP (1 << 16) 378 379 uint8_t rate; 380 uint8_t id; 381 uint8_t tid; 382 uint8_t security; 383 uint8_t key[IEEE80211_KEYBUF_SIZE]; 384 uint8_t tkip[IEEE80211_WEP_MICLEN]; 385 uint32_t fnext; 386 uint32_t lifetime; 387 uint8_t ofdm_mask; 388 uint8_t cck_mask; 389 uint8_t rts_ntries; 390 uint8_t data_ntries; 391 uint16_t timeout; 392 uint16_t txop; 393 struct ieee80211_frame wh; 394 } __attribute__((__packed__)); 395 396 /* structure for command WPI_CMD_SET_BEACON */ 397 struct wpi_cmd_beacon { 398 uint16_t len; 399 uint16_t reserved1; 400 uint32_t flags; /* same as wpi_cmd_data */ 401 uint8_t rate; 402 uint8_t id; 403 uint8_t reserved2[30]; 404 uint32_t lifetime; 405 uint8_t ofdm_mask; 406 uint8_t cck_mask; 407 uint16_t reserved3[3]; 408 uint16_t tim; 409 uint8_t timsz; 410 uint8_t reserved4; 411 struct ieee80211_frame wh; 412 } __attribute__((__packed__)); 413 414 /* structure for WPI_CMD_MRR_SETUP */ 415 struct wpi_mrr_setup { 416 uint32_t which; 417 #define WPI_MRR_CTL 0 418 #define WPI_MRR_DATA 1 419 420 struct { 421 uint8_t plcp; 422 uint8_t flags; 423 uint8_t ntries; 424 uint8_t next; 425 #define WPI_OFDM6 0 426 #define WPI_OFDM54 7 427 #define WPI_CCK1 8 428 #define WPI_CCK2 9 429 #define WPI_CCK11 11 430 431 } __attribute__((__packed__)) rates[WPI_CCK11 + 1]; 432 } __attribute__((__packed__)); 433 434 /* structure for WPI_CMD_SET_LED */ 435 struct wpi_cmd_led { 436 uint32_t unit; /* multiplier (in usecs) */ 437 uint8_t which; 438 #define WPI_LED_ACTIVITY 1 439 #define WPI_LED_LINK 2 440 441 uint8_t off; 442 uint8_t on; 443 uint8_t reserved; 444 } __attribute__((__packed__)); 445 446 /* structure for WPI_CMD_SET_POWER_MODE */ 447 struct wpi_power { 448 uint32_t flags; 449 uint32_t rx_timeout; 450 uint32_t tx_timeout; 451 uint32_t sleep[5]; 452 } __attribute__((__packed__)); 453 454 /* structure for command WPI_CMD_SCAN */ 455 struct wpi_scan_hdr { 456 uint8_t len; 457 uint8_t first; 458 uint8_t reserved1; 459 uint8_t nchan; 460 uint16_t quiet; 461 uint16_t threshold; 462 uint16_t band; 463 #define WPI_SCAN_5GHZ 1 464 uint16_t reserved2[5]; 465 uint32_t flags; 466 uint32_t filter; 467 uint16_t pbrlen; 468 uint16_t reserved4; 469 uint32_t magic1; 470 uint8_t rate; 471 uint8_t id; 472 uint16_t reserved5; 473 uint32_t reserved6[7]; 474 uint32_t mask; 475 uint32_t reserved7[2]; 476 uint8_t reserved8; 477 uint8_t esslen; 478 uint8_t essid[134]; 479 480 /* followed by probe request body */ 481 /* followed by nchan x wpi_scan_chan */ 482 } __attribute__((__packed__)); 483 484 struct wpi_scan_chan { 485 uint8_t flags; 486 uint8_t chan; 487 #define WPI_CHAN_ACTIVE 3 488 uint16_t magic; /* XXX */ 489 uint16_t active; /* msecs */ 490 uint16_t passive; /* msecs */ 491 } __attribute__((__packed__)); 492 493 /* structure for WPI_CMD_BLUETOOTH */ 494 struct wpi_bluetooth { 495 uint8_t flags; 496 uint8_t lead; 497 uint8_t kill; 498 uint8_t reserved; 499 uint32_t ack; 500 uint32_t cts; 501 } __attribute__((__packed__)); 502 503 /* structure for command WPI_CMD_TXPOWER */ 504 struct wpi_txpower { 505 uint32_t reserved1; 506 uint16_t pwr1[14]; 507 uint32_t reserved2[2]; 508 uint16_t pwr2[14]; 509 uint32_t reserved3[2]; 510 } __attribute__((__packed__)); 511 512 513 /* firmware image header */ 514 struct wpi_firmware_hdr { 515 uint32_t version; 516 uint32_t textsz; 517 uint32_t datasz; 518 uint32_t bootsz; 519 } __attribute__((__packed__)); 520 521 /* structure for WPI_UC_READY notification */ 522 struct wpi_ucode_info { 523 uint32_t version; 524 uint8_t revision[8]; 525 uint8_t type; 526 uint8_t subtype; 527 uint16_t reserved; 528 uint32_t logptr; 529 uint32_t errorptr; 530 uint32_t timestamp; 531 uint32_t valid; 532 } __attribute__((__packed__)); 533 534 /* structure for WPI_START_SCAN notification */ 535 struct wpi_start_scan { 536 uint64_t tstamp; 537 uint32_t tbeacon; 538 uint8_t chan; 539 uint8_t band; 540 uint16_t reserved; 541 uint32_t status; 542 } __attribute__((__packed__)); 543 544 /* structure for WPI_STOP_SCAN notification */ 545 struct wpi_stop_scan { 546 uint8_t nchan; 547 uint8_t status; 548 uint8_t reserved; 549 uint8_t chan; 550 uint64_t tsf; 551 } __packed; 552 553 #define WPI_EEPROM_MAC 0x015 554 #define WPI_EEPROM_REVISION 0x035 555 #define WPI_EEPROM_CAPABILITIES 0x045 556 #define WPI_EEPROM_TYPE 0x04a 557 #define WPI_EEPROM_PWR1 0x1ae 558 #define WPI_EEPROM_PWR2 0x1bc 559 560 #define WPI_READ(sc, reg) \ 561 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 562 563 #define WPI_WRITE(sc, reg, val) \ 564 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 565 566 #define WPI_WRITE_REGION_4(sc, offset, datap, count) \ 567 bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 568 (datap), (count)) 569
Indexes created Fri Sep 26 08:10:20 GMT 2025