igc_evcnt.h revision 1.1.2.2
1 1.1.2.2 martin /* $NetBSD: igc_evcnt.h,v 1.1.2.2 2023/10/08 13:19:34 martin Exp $ */ 2 1.1.2.2 martin 3 1.1.2.2 martin /*- 4 1.1.2.2 martin * Copyright (c) 2023 The NetBSD Foundation, Inc. 5 1.1.2.2 martin * All rights reserved. 6 1.1.2.2 martin * 7 1.1.2.2 martin * This code is derived from software contributed to The NetBSD Foundation 8 1.1.2.2 martin * by Rin Okuyama <rin (at) iij.ad.jp>. 9 1.1.2.2 martin * 10 1.1.2.2 martin * Redistribution and use in source and binary forms, with or without 11 1.1.2.2 martin * modification, are permitted provided that the following conditions 12 1.1.2.2 martin * are met: 13 1.1.2.2 martin * 1. Redistributions of source code must retain the above copyright 14 1.1.2.2 martin * notice, this list of conditions and the following disclaimer. 15 1.1.2.2 martin * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.2.2 martin * notice, this list of conditions and the following disclaimer in the 17 1.1.2.2 martin * documentation and/or other materials provided with the distribution. 18 1.1.2.2 martin * 19 1.1.2.2 martin * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1.2.2 martin * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1.2.2 martin * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1.2.2 martin * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1.2.2 martin * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1.2.2 martin * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1.2.2 martin * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1.2.2 martin * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1.2.2 martin * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1.2.2 martin * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1.2.2 martin * POSSIBILITY OF SUCH DAMAGE. 30 1.1.2.2 martin */ 31 1.1.2.2 martin 32 1.1.2.2 martin #ifndef _IGC_EVCNT_H_ 33 1.1.2.2 martin 34 1.1.2.2 martin #include <sys/param.h> 35 1.1.2.2 martin #include <sys/types.h> 36 1.1.2.2 martin #include <sys/atomic.h> 37 1.1.2.2 martin #include <sys/evcnt.h> 38 1.1.2.2 martin 39 1.1.2.2 martin #include <dev/pci/igc/if_igc.h> 40 1.1.2.2 martin 41 1.1.2.2 martin #ifndef IGC_EVENT_COUNTERS 42 1.1.2.2 martin 43 1.1.2.2 martin #define IGC_GLOBAL_EVENT(sc, event, delta) ((void)(sc)) 44 1.1.2.2 martin #define IGC_DRIVER_EVENT(q, event, delta) ((void)(q)) 45 1.1.2.2 martin #define IGC_QUEUE_EVENT(q, event, delta) ((void)(q)) 46 1.1.2.2 martin 47 1.1.2.2 martin #else 48 1.1.2.2 martin 49 1.1.2.2 martin struct igc_counter { 50 1.1.2.2 martin int type; 51 1.1.2.2 martin const char *name; 52 1.1.2.2 martin }; 53 1.1.2.2 martin 54 1.1.2.2 martin /* 55 1.1.2.2 martin * Global counters: 56 1.1.2.2 martin * 57 1.1.2.2 martin * Events outside queue context. 58 1.1.2.2 martin */ 59 1.1.2.2 martin 60 1.1.2.2 martin enum igc_global_event { 61 1.1.2.2 martin igcge_watchdog, 62 1.1.2.2 martin igcge_link, 63 1.1.2.2 martin igcge_count, 64 1.1.2.2 martin }; 65 1.1.2.2 martin 66 1.1.2.2 martin static const struct igc_counter igc_global_counters[] = { 67 1.1.2.2 martin [igcge_watchdog] = { EVCNT_TYPE_MISC, "Watchdog Timeout" }, 68 1.1.2.2 martin [igcge_link] = { EVCNT_TYPE_INTR, "Link Event" }, 69 1.1.2.2 martin }; 70 1.1.2.2 martin 71 1.1.2.2 martin #define IGC_GLOBAL_COUNTERS __arraycount(igc_global_counters) 72 1.1.2.2 martin CTASSERT(IGC_GLOBAL_COUNTERS == igcge_count); 73 1.1.2.2 martin 74 1.1.2.2 martin /* 75 1.1.2.2 martin * Driver counters: 76 1.1.2.2 martin * 77 1.1.2.2 martin * Events in queue context, but summed up over queues. 78 1.1.2.2 martin */ 79 1.1.2.2 martin 80 1.1.2.2 martin enum igc_driver_event { 81 1.1.2.2 martin igcde_txdma_efbig, 82 1.1.2.2 martin igcde_txdma_defrag, 83 1.1.2.2 martin igcde_txdma_enomem, 84 1.1.2.2 martin igcde_txdma_einval, 85 1.1.2.2 martin igcde_txdma_eagain, 86 1.1.2.2 martin igcde_txdma_other, 87 1.1.2.2 martin igcde_rx_ipcs, 88 1.1.2.2 martin igcde_rx_tcpcs, 89 1.1.2.2 martin igcde_rx_udpcs, 90 1.1.2.2 martin igcde_rx_ipcs_bad, 91 1.1.2.2 martin igcde_rx_l4cs_bad, 92 1.1.2.2 martin igcde_count, 93 1.1.2.2 martin }; 94 1.1.2.2 martin 95 1.1.2.2 martin static const struct igc_counter igc_driver_counters[] = { 96 1.1.2.2 martin [igcde_txdma_efbig] = { EVCNT_TYPE_MISC, "Tx DMA Soft Fail EFBIG" }, 97 1.1.2.2 martin #ifdef notyet 98 1.1.2.2 martin [igcde_txdma_efbig2] = { EVCNT_TYPE_MISC, "Tx DMA Hard Fail EFBIG" }, 99 1.1.2.2 martin #endif 100 1.1.2.2 martin [igcde_txdma_defrag] = { EVCNT_TYPE_MISC, "Tx DMA Fail Defrag" }, 101 1.1.2.2 martin [igcde_txdma_enomem] = { EVCNT_TYPE_MISC, "Tx DMA Fail ENOMEM" }, 102 1.1.2.2 martin [igcde_txdma_einval] = { EVCNT_TYPE_MISC, "Tx DMA Fail EINVAL" }, 103 1.1.2.2 martin [igcde_txdma_eagain] = { EVCNT_TYPE_MISC, "Tx DMA Fail EAGAIN" }, 104 1.1.2.2 martin [igcde_txdma_other] = { EVCNT_TYPE_MISC, "Tx DMA Fail Other" }, 105 1.1.2.2 martin [igcde_rx_ipcs] = { EVCNT_TYPE_MISC, "Rx Csum Offload IPv4" }, 106 1.1.2.2 martin [igcde_rx_tcpcs] = { EVCNT_TYPE_MISC, "Rx Csum Offload TCP" }, 107 1.1.2.2 martin [igcde_rx_udpcs] = { EVCNT_TYPE_MISC, "Rx Csum Offload UDP" }, 108 1.1.2.2 martin [igcde_rx_ipcs_bad] = { EVCNT_TYPE_MISC, "Rx Csum Offload IPv4 Bad" }, 109 1.1.2.2 martin [igcde_rx_l4cs_bad] = { EVCNT_TYPE_MISC, "Rx Csum Offload L4 Bad" }, 110 1.1.2.2 martin }; 111 1.1.2.2 martin 112 1.1.2.2 martin #define IGC_DRIVER_COUNTERS __arraycount(igc_driver_counters) 113 1.1.2.2 martin CTASSERT(IGC_DRIVER_COUNTERS == igcde_count); 114 1.1.2.2 martin 115 1.1.2.2 martin /* 116 1.1.2.2 martin * Queue counters: 117 1.1.2.2 martin * 118 1.1.2.2 martin * Per queue events. 119 1.1.2.2 martin */ 120 1.1.2.2 martin 121 1.1.2.2 martin enum igc_queue_event { 122 1.1.2.2 martin igcqe_irqs, 123 1.1.2.2 martin igcqe_handleq, 124 1.1.2.2 martin igcqe_req, 125 1.1.2.2 martin igcqe_tx_bytes, 126 1.1.2.2 martin igcqe_tx_packets, 127 1.1.2.2 martin igcqe_tx_pcq_drop, 128 1.1.2.2 martin igcqe_tx_no_desc, 129 1.1.2.2 martin igcqe_tx_ctx, 130 1.1.2.2 martin igcqe_rx_bytes, 131 1.1.2.2 martin igcqe_rx_packets, 132 1.1.2.2 martin igcqe_rx_no_mbuf, 133 1.1.2.2 martin igcqe_rx_discard, 134 1.1.2.2 martin igcqe_count, 135 1.1.2.2 martin }; 136 1.1.2.2 martin 137 1.1.2.2 martin static const struct igc_counter igc_queue_counters[] = { 138 1.1.2.2 martin [igcqe_irqs] = { EVCNT_TYPE_INTR, "Interrupts" }, 139 1.1.2.2 martin [igcqe_handleq] = { EVCNT_TYPE_MISC, "Handled in softint" }, 140 1.1.2.2 martin [igcqe_req] = { EVCNT_TYPE_MISC, "Requeued in softint" }, 141 1.1.2.2 martin [igcqe_tx_bytes] = { EVCNT_TYPE_MISC, "Tx Bytes" }, 142 1.1.2.2 martin [igcqe_tx_packets] = { EVCNT_TYPE_MISC, "Tx Packets" }, 143 1.1.2.2 martin [igcqe_tx_pcq_drop] = { EVCNT_TYPE_MISC, "Tx pcq Dropped" }, 144 1.1.2.2 martin [igcqe_tx_no_desc] = { EVCNT_TYPE_MISC, "Tx No Descriptor Available" }, 145 1.1.2.2 martin [igcqe_tx_ctx] = { EVCNT_TYPE_MISC, "Tx Advanced CTX Used" }, 146 1.1.2.2 martin [igcqe_rx_bytes] = { EVCNT_TYPE_MISC, "Rx Bytes" }, 147 1.1.2.2 martin [igcqe_rx_packets] = { EVCNT_TYPE_MISC, "Rx Packets" }, 148 1.1.2.2 martin [igcqe_rx_no_mbuf] = { EVCNT_TYPE_MISC, "Rx No mbuf Available" }, 149 1.1.2.2 martin [igcqe_rx_discard] = { EVCNT_TYPE_MISC, "Rx Discarded" }, 150 1.1.2.2 martin #ifdef notyet 151 1.1.2.2 martin [igcqe_rx_copy] = { EVCNT_TYPE_MISC, "Rx Copied Frames" }, 152 1.1.2.2 martin #endif 153 1.1.2.2 martin }; 154 1.1.2.2 martin 155 1.1.2.2 martin #define IGC_QUEUE_COUNTERS __arraycount(igc_queue_counters) 156 1.1.2.2 martin CTASSERT(IGC_QUEUE_COUNTERS == igcqe_count); 157 1.1.2.2 martin 158 1.1.2.2 martin /* 159 1.1.2.2 martin * MAC counters: 160 1.1.2.2 martin * 161 1.1.2.2 martin * Events obtained from MAC Statistics registers. 162 1.1.2.2 martin */ 163 1.1.2.2 martin 164 1.1.2.2 martin static const struct igc_mac_counter { 165 1.1.2.2 martin bus_size_t reg; 166 1.1.2.2 martin bool is64; 167 1.1.2.2 martin const char *name; 168 1.1.2.2 martin } igc_mac_counters[] = { 169 1.1.2.2 martin /* Interrupts */ 170 1.1.2.2 martin { IGC_IAC, false, "Interrupt Assertion" }, 171 1.1.2.2 martin 172 1.1.2.2 martin /* TX errors */ 173 1.1.2.2 martin { IGC_COLC, false, "Collision" }, 174 1.1.2.2 martin { IGC_SCC, false, "Single Collision" }, 175 1.1.2.2 martin { IGC_MCC, false, "Multiple Collision" }, 176 1.1.2.2 martin { IGC_ECOL, false, "Excessive Collision" }, 177 1.1.2.2 martin { IGC_LATECOL, false, "Late Collision" }, 178 1.1.2.2 martin { IGC_TNCRS, false, "Tx-No CRS" }, 179 1.1.2.2 martin 180 1.1.2.2 martin /* RX errors */ 181 1.1.2.2 martin { IGC_CRCERRS, false, "CRC Error" }, 182 1.1.2.2 martin { IGC_MPC, false, "Missed Packet" }, 183 1.1.2.2 martin { IGC_RLEC, false, "Receive Length Error" }, 184 1.1.2.2 martin { IGC_LENERRS, false, "Length Errors" }, 185 1.1.2.2 martin { IGC_ALGNERRC, false, "Alignment Error" }, 186 1.1.2.2 martin { IGC_RERC, false, "Receive Error" }, 187 1.1.2.2 martin 188 1.1.2.2 martin /* flow control events */ 189 1.1.2.2 martin { IGC_XOFFTXC, false, "XOFF Tx" }, 190 1.1.2.2 martin { IGC_XONTXC, false, "XON Tx" }, 191 1.1.2.2 martin { IGC_XOFFRXC, false, "XOFF Rx" }, 192 1.1.2.2 martin { IGC_XONRXC, false, "XON Rx" }, 193 1.1.2.2 martin { IGC_FCRUC, false, "Flow Control Rx Unsupported" }, 194 1.1.2.2 martin 195 1.1.2.2 martin /* TX statistics */ 196 1.1.2.2 martin { IGC_TOTL, true, "Total Octets Tx" }, 197 1.1.2.2 martin { IGC_GOTCL, true, "Good Octets Tx" }, 198 1.1.2.2 martin { IGC_HGOTCL, true, "Host Good Octets Transmit" }, 199 1.1.2.2 martin { IGC_TPT, false, "Total Packets Tx" }, 200 1.1.2.2 martin { IGC_GPTC, false, "Good Packets Tx" }, 201 1.1.2.2 martin { IGC_MPTC, false, "Multicast Packets Tx" }, 202 1.1.2.2 martin { IGC_BPTC, false, "Broadcast Packets Tx" }, 203 1.1.2.2 martin { IGC_MGTPTC, false, "Management Packets Tx" }, 204 1.1.2.2 martin { IGC_HTDPMC, false, "Host Transmit Discarded by MAC" }, 205 1.1.2.2 martin { IGC_DC, false, "Defer" }, 206 1.1.2.2 martin { IGC_TSCTC, false, "TCP Segmentation Context Tx" }, 207 1.1.2.2 martin { IGC_PTC64, false, "Packets Tx (64 bytes)" }, 208 1.1.2.2 martin { IGC_PTC127, false, "Packets Tx (65-127 bytes)" }, 209 1.1.2.2 martin { IGC_PTC255, false, "Packets Tx (128-255 bytes)" }, 210 1.1.2.2 martin { IGC_PTC511, false, "Packets Tx (256-511 bytes)" }, 211 1.1.2.2 martin { IGC_PTC1023, false, "Packets Tx (512-1023 bytes)" }, 212 1.1.2.2 martin { IGC_PTC1522, false, "Packets Tx (1024-1522 bytes)" }, 213 1.1.2.2 martin 214 1.1.2.2 martin /* RX statistics */ 215 1.1.2.2 martin { IGC_TORL, true, "Total Octets Rx" }, 216 1.1.2.2 martin { IGC_GORCL, true, "Good Octets Rx" }, 217 1.1.2.2 martin { IGC_HGORCL, true, "Host Good Octets Received" }, 218 1.1.2.2 martin { IGC_TPR, false, "Total Packets Rx" }, 219 1.1.2.2 martin { IGC_GPRC, false, "Good Packets Rx" }, 220 1.1.2.2 martin { IGC_BPRC, false, "Broadcast Packets Rx" }, 221 1.1.2.2 martin { IGC_MPRC, false, "Multicast Packets Rx" }, 222 1.1.2.2 martin { IGC_MGTPRC, false, "Management Packets Rx" }, 223 1.1.2.2 martin { IGC_MGTPDC, false, "Management Packets Dropped" }, 224 1.1.2.2 martin { IGC_RNBC, false, "Rx No Buffers" }, 225 1.1.2.2 martin { IGC_RUC, false, "Rx Undersize" }, 226 1.1.2.2 martin { IGC_RFC, false, "Rx Fragment" }, 227 1.1.2.2 martin { IGC_ROC, false, "Rx Oversize" }, 228 1.1.2.2 martin { IGC_RJC, false, "Rx Jabber" }, 229 1.1.2.2 martin { IGC_RXDMTC, false, "Rx Descriptor Minimum Threshold" }, 230 1.1.2.2 martin { IGC_PRC64, false, "Packets Rx (64 bytes)" }, 231 1.1.2.2 martin { IGC_PRC127, false, "Packets Rx (65-127 bytes)" }, 232 1.1.2.2 martin { IGC_PRC255, false, "Packets Rx (128-255 bytes)" }, 233 1.1.2.2 martin { IGC_PRC511, false, "Packets Rx (256-511 bytes)" }, 234 1.1.2.2 martin { IGC_PRC1023, false, "Packets Rx (512-1023 bytes)" }, 235 1.1.2.2 martin { IGC_PRC1522, false, "Packets Rx (1024-1522 bytes)" }, 236 1.1.2.2 martin 237 1.1.2.2 martin /* EEE */ 238 1.1.2.2 martin { IGC_TLPIC, false, "EEE Tx LPI" }, 239 1.1.2.2 martin { IGC_RLPIC, false, "EEE Rx LPI" }, 240 1.1.2.2 martin }; 241 1.1.2.2 martin 242 1.1.2.2 martin #define IGC_MAC_COUNTERS __arraycount(igc_mac_counters) 243 1.1.2.2 martin 244 1.1.2.2 martin #define IGC_ATOMIC_ADD(p, delta) \ 245 1.1.2.2 martin atomic_store_relaxed(p, atomic_load_relaxed(p) + (delta)) 246 1.1.2.2 martin #define IGC_ATOMIC_STORE(p, val) \ 247 1.1.2.2 martin atomic_store_relaxed(p, val) 248 1.1.2.2 martin #define IGC_ATOMIC_LOAD(p) \ 249 1.1.2.2 martin atomic_load_relaxed(p) 250 1.1.2.2 martin 251 1.1.2.2 martin #define IGC_GLOBAL_COUNTER(sc, cnt) \ 252 1.1.2.2 martin ((sc)->sc_global_evcnts[cnt].ev_count) 253 1.1.2.2 martin #define IGC_GLOBAL_COUNTER_ADD(sc, cnt, delta) \ 254 1.1.2.2 martin IGC_ATOMIC_ADD(&IGC_GLOBAL_COUNTER(sc, cnt), delta) 255 1.1.2.2 martin #define IGC_GLOBAL_COUNTER_STORE(sc, cnt, val) \ 256 1.1.2.2 martin IGC_ATOMIC_STORE(&IGC_GLOBAL_COUNTER(sc, cnt), val) 257 1.1.2.2 martin 258 1.1.2.2 martin #define IGC_DRIVER_COUNTER(sc, cnt) \ 259 1.1.2.2 martin ((sc)->sc_driver_evcnts[cnt].ev_count) 260 1.1.2.2 martin #define IGC_DRIVER_COUNTER_ADD(sc, cnt, delta) \ 261 1.1.2.2 martin IGC_ATOMIC_ADD(&IGC_DRIVER_COUNTER(sc, cnt), delta) 262 1.1.2.2 martin #define IGC_DRIVER_COUNTER_STORE(sc, cnt, val) \ 263 1.1.2.2 martin IGC_ATOMIC_STORE(&IGC_DRIVER_COUNTER(sc, cnt), val) 264 1.1.2.2 martin 265 1.1.2.2 martin #define IGC_QUEUE_DRIVER_COUNTER(q, cnt) \ 266 1.1.2.2 martin ((q)->igcq_driver_counters[cnt]) 267 1.1.2.2 martin #define IGC_QUEUE_DRIVER_COUNTER_VAL(q, cnt) \ 268 1.1.2.2 martin IGC_ATOMIC_LOAD(&IGC_QUEUE_DRIVER_COUNTER(q, cnt)) 269 1.1.2.2 martin #define IGC_QUEUE_DRIVER_COUNTER_ADD(q, cnt, delta) \ 270 1.1.2.2 martin IGC_ATOMIC_ADD(&IGC_QUEUE_DRIVER_COUNTER(q, cnt), delta) 271 1.1.2.2 martin #define IGC_QUEUE_DRIVER_COUNTER_STORE(q, cnt, val) \ 272 1.1.2.2 martin IGC_ATOMIC_STORE(&IGC_QUEUE_DRIVER_COUNTER(q, cnt), val) 273 1.1.2.2 martin 274 1.1.2.2 martin #define IGC_QUEUE_COUNTER(q, cnt) \ 275 1.1.2.2 martin ((q)->igcq_queue_evcnts[cnt].ev_count) 276 1.1.2.2 martin #define IGC_QUEUE_COUNTER_ADD(q, cnt, delta) \ 277 1.1.2.2 martin IGC_ATOMIC_ADD(&IGC_QUEUE_COUNTER(q, cnt), delta) 278 1.1.2.2 martin #define IGC_QUEUE_COUNTER_STORE(q, cnt, val) \ 279 1.1.2.2 martin IGC_ATOMIC_STORE(&IGC_QUEUE_COUNTER(q, cnt), val) 280 1.1.2.2 martin 281 1.1.2.2 martin #define IGC_MAC_COUNTER(sc, cnt) \ 282 1.1.2.2 martin ((sc)->sc_mac_evcnts[cnt].ev_count) 283 1.1.2.2 martin #define IGC_MAC_COUNTER_ADD(sc, cnt, delta) \ 284 1.1.2.2 martin IGC_ATOMIC_ADD(&IGC_MAC_COUNTER(sc, cnt), delta) 285 1.1.2.2 martin #define IGC_MAC_COUNTER_STORE(sc, cnt, val) \ 286 1.1.2.2 martin IGC_ATOMIC_STORE(&IGC_MAC_COUNTER(sc, cnt), val) 287 1.1.2.2 martin 288 1.1.2.2 martin #define IGC_GLOBAL_EVENT(sc, event, delta) \ 289 1.1.2.2 martin IGC_GLOBAL_COUNTER_ADD(sc, igcge_ ## event, delta) 290 1.1.2.2 martin #define IGC_DRIVER_EVENT(q, event, delta) \ 291 1.1.2.2 martin IGC_QUEUE_DRIVER_COUNTER_ADD(q, igcde_ ## event, delta) 292 1.1.2.2 martin #define IGC_QUEUE_EVENT(q, event, delta) \ 293 1.1.2.2 martin IGC_QUEUE_COUNTER_ADD(q, igcqe_ ## event, delta) 294 1.1.2.2 martin 295 1.1.2.2 martin #endif /* IGC_EVENT_COUNTERS */ 296 1.1.2.2 martin 297 1.1.2.2 martin #endif /* _IGC_EVCNT_ */ 298
Indexes created Tue Oct 14 00:09:49 GMT 2025