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iop_pci.c revision 1.3.2.2
      1  1.3.2.2   nathanw /*	$NetBSD: iop_pci.c,v 1.3.2.2 2001/09/26 19:54:56 nathanw Exp $	*/
      2      1.1        ad 
      3      1.1        ad /*-
      4      1.1        ad  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5      1.1        ad  * All rights reserved.
      6      1.1        ad  *
      7      1.1        ad  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1        ad  * by Andrew Doran.
      9      1.1        ad  *
     10      1.1        ad  * Redistribution and use in source and binary forms, with or without
     11      1.1        ad  * modification, are permitted provided that the following conditions
     12      1.1        ad  * are met:
     13      1.1        ad  * 1. Redistributions of source code must retain the above copyright
     14      1.1        ad  *    notice, this list of conditions and the following disclaimer.
     15      1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     17      1.1        ad  *    documentation and/or other materials provided with the distribution.
     18      1.1        ad  * 3. All advertising materials mentioning features or use of this software
     19      1.1        ad  *    must display the following acknowledgement:
     20      1.1        ad  *        This product includes software developed by the NetBSD
     21      1.1        ad  *        Foundation, Inc. and its contributors.
     22      1.1        ad  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1        ad  *    contributors may be used to endorse or promote products derived
     24      1.1        ad  *    from this software without specific prior written permission.
     25      1.1        ad  *
     26      1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1        ad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1        ad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1        ad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1        ad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1        ad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1        ad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1        ad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1        ad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1        ad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1        ad  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1        ad  */
     38      1.1        ad 
     39      1.1        ad /*
     40      1.1        ad  * PCI front-end for `iop' driver.
     41      1.1        ad  */
     42      1.1        ad 
     43      1.1        ad #include "opt_i2o.h"
     44      1.1        ad 
     45      1.1        ad #include <sys/param.h>
     46      1.1        ad #include <sys/systm.h>
     47      1.1        ad #include <sys/kernel.h>
     48      1.1        ad #include <sys/device.h>
     49      1.1        ad #include <sys/queue.h>
     50      1.1        ad #include <sys/proc.h>
     51      1.1        ad 
     52      1.1        ad #include <machine/endian.h>
     53      1.1        ad #include <machine/bus.h>
     54      1.1        ad 
     55      1.1        ad #include <dev/pci/pcidevs.h>
     56      1.1        ad #include <dev/pci/pcivar.h>
     57      1.1        ad 
     58      1.1        ad #include <dev/i2o/i2o.h>
     59      1.1        ad #include <dev/i2o/iopreg.h>
     60  1.3.2.1   nathanw #include <dev/i2o/iopio.h>
     61      1.1        ad #include <dev/i2o/iopvar.h>
     62      1.1        ad 
     63  1.3.2.1   nathanw #define	PCI_INTERFACE_I2O_POLLED	0x00
     64  1.3.2.1   nathanw #define	PCI_INTERFACE_I2O_INTRDRIVEN	0x01
     65      1.1        ad 
     66      1.1        ad static void	iop_pci_attach(struct device *, struct device *, void *);
     67      1.1        ad static int	iop_pci_match(struct device *, struct cfdata *, void *);
     68      1.1        ad 
     69      1.1        ad struct cfattach iop_pci_ca = {
     70      1.1        ad 	sizeof(struct iop_softc), iop_pci_match, iop_pci_attach
     71      1.1        ad };
     72      1.1        ad 
     73      1.1        ad static int
     74      1.1        ad iop_pci_match(struct device *parent, struct cfdata *match, void *aux)
     75      1.1        ad {
     76      1.1        ad 	struct pci_attach_args *pa;
     77      1.2        ad 
     78      1.2        ad 	pa = aux;
     79      1.1        ad 
     80      1.1        ad 	/*
     81      1.1        ad 	 * Look for an "intelligent I/O processor" that adheres to the I2O
     82      1.1        ad 	 * specification.  Ignore the device if it doesn't support interrupt
     83      1.1        ad 	 * driven operation.
     84      1.1        ad 	 */
     85      1.1        ad 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O &&
     86      1.1        ad 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD &&
     87      1.1        ad 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN)
     88      1.1        ad 		return (1);
     89      1.1        ad 
     90      1.1        ad 	return (0);
     91      1.1        ad }
     92      1.1        ad 
     93      1.1        ad static void
     94      1.1        ad iop_pci_attach(struct device *parent, struct device *self, void *aux)
     95      1.1        ad {
     96      1.1        ad 	struct pci_attach_args *pa;
     97      1.1        ad 	struct iop_softc *sc;
     98      1.1        ad 	pci_chipset_tag_t pc;
     99      1.1        ad 	pci_intr_handle_t ih;
    100      1.1        ad 	const char *intrstr;
    101      1.1        ad 	pcireg_t reg;
    102  1.3.2.1   nathanw 	int i;
    103      1.2        ad 
    104      1.1        ad 	sc = (struct iop_softc *)self;
    105      1.1        ad 	pa = (struct pci_attach_args *)aux;
    106      1.1        ad 	pc = pa->pa_pc;
    107      1.1        ad 	printf(": ");
    108      1.1        ad 
    109      1.2        ad 	/*
    110      1.2        ad 	 * The kernel always uses the first memory mapping to communicate
    111      1.1        ad 	 * with the IOP.
    112      1.1        ad 	 */
    113      1.1        ad 	for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
    114      1.1        ad 		reg = pci_conf_read(pc, pa->pa_tag, i);
    115  1.3.2.2   nathanw 		if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM) {
    116  1.3.2.2   nathanw 			sc->sc_memaddr = PCI_MAPREG_MEM_ADDR(reg);
    117      1.1        ad 			break;
    118  1.3.2.2   nathanw 		}
    119      1.1        ad 	}
    120      1.1        ad 	if (i == PCI_MAPREG_END) {
    121      1.1        ad 		printf("can't find mapping\n");
    122      1.1        ad 		return;
    123      1.1        ad 	}
    124      1.1        ad 
    125  1.3.2.1   nathanw 	/* Map the register window. */
    126  1.3.2.1   nathanw 	if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0, &sc->sc_iot,
    127  1.3.2.1   nathanw 	    &sc->sc_ioh, NULL, NULL)) {
    128  1.3.2.1   nathanw 		printf("%s: can't map register window\n", sc->sc_dv.dv_xname);
    129      1.1        ad 		return;
    130      1.1        ad 	}
    131      1.1        ad 
    132  1.3.2.2   nathanw 	sc->sc_pcibus = pa->pa_bus;
    133  1.3.2.2   nathanw 	sc->sc_pcidev = pa->pa_device;
    134      1.1        ad 	sc->sc_dmat = pa->pa_dmat;
    135  1.3.2.1   nathanw 	sc->sc_bus_memt = pa->pa_memt;
    136  1.3.2.1   nathanw 	sc->sc_bus_iot = pa->pa_iot;
    137      1.1        ad 
    138      1.1        ad 	/* Enable the device. */
    139      1.1        ad 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    140      1.1        ad 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    141      1.1        ad 		       reg | PCI_COMMAND_MASTER_ENABLE);
    142      1.1        ad 
    143      1.1        ad 	/* Map and establish the interrupt.  XXX IPL_BIO. */
    144      1.3  sommerfe 	if (pci_intr_map(pa, &ih)) {
    145      1.1        ad 		printf("can't map interrupt\n");
    146      1.1        ad 		return;
    147      1.1        ad 	}
    148      1.1        ad 	intrstr = pci_intr_string(pc, ih);
    149      1.1        ad 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc);
    150      1.1        ad 	if (sc->sc_ih == NULL) {
    151      1.1        ad 		printf("can't establish interrupt");
    152      1.1        ad 		if (intrstr != NULL)
    153      1.1        ad 			printf(" at %s", intrstr);
    154      1.1        ad 		printf("\n");
    155      1.1        ad 		return;
    156      1.1        ad 	}
    157      1.1        ad 
    158      1.1        ad 	/* Attach to the bus-independent code. */
    159      1.1        ad 	iop_init(sc, intrstr);
    160      1.1        ad }
    161