iop_pci.c revision 1.10
1 /* $NetBSD: iop_pci.c,v 1.10 2002/10/02 16:51:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCI front-end for `iop' driver. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: iop_pci.c,v 1.10 2002/10/02 16:51:39 thorpej Exp $"); 45 46 #include "opt_i2o.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/queue.h> 53 #include <sys/proc.h> 54 55 #include <machine/endian.h> 56 #include <machine/bus.h> 57 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pcivar.h> 60 61 #include <dev/i2o/i2o.h> 62 #include <dev/i2o/iopreg.h> 63 #include <dev/i2o/iopio.h> 64 #include <dev/i2o/iopvar.h> 65 66 #define PCI_INTERFACE_I2O_POLLED 0x00 67 #define PCI_INTERFACE_I2O_INTRDRIVEN 0x01 68 69 static void iop_pci_attach(struct device *, struct device *, void *); 70 static int iop_pci_match(struct device *, struct cfdata *, void *); 71 72 CFATTACH_DECL(iop_pci, sizeof(struct iop_softc), 73 iop_pci_match, iop_pci_attach, NULL, NULL); 74 75 static int 76 iop_pci_match(struct device *parent, struct cfdata *match, void *aux) 77 { 78 struct pci_attach_args *pa; 79 80 pa = aux; 81 82 /* 83 * Look for an "intelligent I/O processor" that adheres to the I2O 84 * specification. Ignore the device if it doesn't support interrupt 85 * driven operation. 86 */ 87 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O && 88 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD && 89 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN) 90 return (1); 91 92 return (0); 93 } 94 95 static void 96 iop_pci_attach(struct device *parent, struct device *self, void *aux) 97 { 98 struct pci_attach_args *pa; 99 struct iop_softc *sc; 100 pci_chipset_tag_t pc; 101 pci_intr_handle_t ih; 102 const char *intrstr; 103 pcireg_t reg; 104 int i; 105 106 sc = (struct iop_softc *)self; 107 pa = (struct pci_attach_args *)aux; 108 pc = pa->pa_pc; 109 printf(": "); 110 111 /* 112 * The kernel always uses the first memory mapping to communicate 113 * with the IOP. 114 */ 115 for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) { 116 reg = pci_conf_read(pc, pa->pa_tag, i); 117 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM) { 118 sc->sc_memaddr = PCI_MAPREG_MEM_ADDR(reg); 119 break; 120 } 121 } 122 if (i == PCI_MAPREG_END) { 123 printf("can't find mapping\n"); 124 return; 125 } 126 127 /* Map the register window. */ 128 if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0, &sc->sc_iot, 129 &sc->sc_ioh, NULL, NULL)) { 130 printf("%s: can't map register window\n", sc->sc_dv.dv_xname); 131 return; 132 } 133 134 sc->sc_pcibus = pa->pa_bus; 135 sc->sc_pcidev = pa->pa_device; 136 sc->sc_dmat = pa->pa_dmat; 137 sc->sc_bus_memt = pa->pa_memt; 138 sc->sc_bus_iot = pa->pa_iot; 139 140 /* Enable the device. */ 141 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 142 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 143 reg | PCI_COMMAND_MASTER_ENABLE); 144 145 /* Map and establish the interrupt. XXX IPL_BIO. */ 146 if (pci_intr_map(pa, &ih)) { 147 printf("can't map interrupt\n"); 148 return; 149 } 150 intrstr = pci_intr_string(pc, ih); 151 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc); 152 if (sc->sc_ih == NULL) { 153 printf("can't establish interrupt"); 154 if (intrstr != NULL) 155 printf(" at %s", intrstr); 156 printf("\n"); 157 return; 158 } 159 160 /* Attach to the bus-independent code. */ 161 iop_init(sc, intrstr); 162 } 163
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