iop_pci.c revision 1.3
1 /* $NetBSD: iop_pci.c,v 1.3 2000/12/28 22:59:14 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCI front-end for `iop' driver. 41 */ 42 43 #include "opt_i2o.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 #include <sys/queue.h> 50 #include <sys/proc.h> 51 52 #include <machine/endian.h> 53 #include <machine/bus.h> 54 55 #include <dev/pci/pcidevs.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <dev/i2o/i2o.h> 59 #include <dev/i2o/iopreg.h> 60 #include <dev/i2o/iopvar.h> 61 62 #define PCI_INTERFACE_I2O_POLLED 0x00 63 #define PCI_INTERFACE_I2O_INTRDRIVEN 0x01 64 65 static void iop_pci_attach(struct device *, struct device *, void *); 66 static int iop_pci_match(struct device *, struct cfdata *, void *); 67 68 struct cfattach iop_pci_ca = { 69 sizeof(struct iop_softc), iop_pci_match, iop_pci_attach 70 }; 71 72 static int 73 iop_pci_match(struct device *parent, struct cfdata *match, void *aux) 74 { 75 struct pci_attach_args *pa; 76 77 pa = aux; 78 79 /* 80 * Look for an "intelligent I/O processor" that adheres to the I2O 81 * specification. Ignore the device if it doesn't support interrupt 82 * driven operation. 83 */ 84 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O && 85 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD && 86 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN) 87 return (1); 88 89 return (0); 90 } 91 92 static void 93 iop_pci_attach(struct device *parent, struct device *self, void *aux) 94 { 95 struct pci_attach_args *pa; 96 struct iop_softc *sc; 97 pci_chipset_tag_t pc; 98 pci_intr_handle_t ih; 99 const char *intrstr; 100 pcireg_t reg; 101 int i, flags, rv; 102 103 sc = (struct iop_softc *)self; 104 pa = (struct pci_attach_args *)aux; 105 pc = pa->pa_pc; 106 printf(": "); 107 108 /* 109 * The kernel always uses the first memory mapping to communicate 110 * with the IOP. 111 */ 112 for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) { 113 reg = pci_conf_read(pc, pa->pa_tag, i); 114 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM) 115 break; 116 } 117 if (i == PCI_MAPREG_END) { 118 printf("can't find mapping\n"); 119 return; 120 } 121 122 /* 123 * Map the register window as uncacheable. 124 */ 125 rv = pci_mapreg_info(pa->pa_pc, pa->pa_tag, i, 126 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 127 &sc->sc_memaddr, &sc->sc_memsize, &flags); 128 if (rv == 0) { 129 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 130 rv = bus_space_map(pa->pa_memt, sc->sc_memaddr, sc->sc_memsize, 131 flags, &sc->sc_ioh); 132 sc->sc_iot = pa->pa_memt; 133 } 134 if (rv != 0) { 135 printf("can't map board\n"); 136 return; 137 } 138 139 sc->sc_dmat = pa->pa_dmat; 140 141 /* Enable the device. */ 142 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 143 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 144 reg | PCI_COMMAND_MASTER_ENABLE); 145 146 /* Map and establish the interrupt. XXX IPL_BIO. */ 147 if (pci_intr_map(pa, &ih)) { 148 printf("can't map interrupt\n"); 149 return; 150 } 151 intrstr = pci_intr_string(pc, ih); 152 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc); 153 if (sc->sc_ih == NULL) { 154 printf("can't establish interrupt"); 155 if (intrstr != NULL) 156 printf(" at %s", intrstr); 157 printf("\n"); 158 return; 159 } 160 161 /* Attach to the bus-independent code. */ 162 iop_init(sc, intrstr); 163 } 164
Indexes created Sat Sep 20 22:09:52 GMT 2025