iop_pci.c revision 1.4
1 /* $NetBSD: iop_pci.c,v 1.4 2001/03/20 13:21:00 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCI front-end for `iop' driver. 41 */ 42 43 #include "opt_i2o.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 #include <sys/queue.h> 50 #include <sys/proc.h> 51 52 #include <machine/endian.h> 53 #include <machine/bus.h> 54 55 #include <dev/pci/pcidevs.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <dev/i2o/i2o.h> 59 #include <dev/i2o/iopreg.h> 60 #include <dev/i2o/iopio.h> 61 #include <dev/i2o/iopvar.h> 62 63 #define PCI_INTERFACE_I2O_POLLED 0x00 64 #define PCI_INTERFACE_I2O_INTRDRIVEN 0x01 65 66 static void iop_pci_attach(struct device *, struct device *, void *); 67 static int iop_pci_match(struct device *, struct cfdata *, void *); 68 69 struct cfattach iop_pci_ca = { 70 sizeof(struct iop_softc), iop_pci_match, iop_pci_attach 71 }; 72 73 static int 74 iop_pci_match(struct device *parent, struct cfdata *match, void *aux) 75 { 76 struct pci_attach_args *pa; 77 78 pa = aux; 79 80 /* 81 * Look for an "intelligent I/O processor" that adheres to the I2O 82 * specification. Ignore the device if it doesn't support interrupt 83 * driven operation. 84 */ 85 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O && 86 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD && 87 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN) 88 return (1); 89 90 return (0); 91 } 92 93 static void 94 iop_pci_attach(struct device *parent, struct device *self, void *aux) 95 { 96 struct pci_attach_args *pa; 97 struct iop_softc *sc; 98 pci_chipset_tag_t pc; 99 pci_intr_handle_t ih; 100 const char *intrstr; 101 pcireg_t reg; 102 int i, flags, rv; 103 104 sc = (struct iop_softc *)self; 105 pa = (struct pci_attach_args *)aux; 106 pc = pa->pa_pc; 107 printf(": "); 108 109 /* 110 * The kernel always uses the first memory mapping to communicate 111 * with the IOP. 112 */ 113 for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) { 114 reg = pci_conf_read(pc, pa->pa_tag, i); 115 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM) 116 break; 117 } 118 if (i == PCI_MAPREG_END) { 119 printf("can't find mapping\n"); 120 return; 121 } 122 123 /* 124 * Map the register window as uncacheable. 125 */ 126 rv = pci_mapreg_info(pa->pa_pc, pa->pa_tag, i, 127 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 128 &sc->sc_memaddr, &sc->sc_memsize, &flags); 129 if (rv == 0) { 130 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 131 rv = bus_space_map(pa->pa_memt, sc->sc_memaddr, sc->sc_memsize, 132 flags, &sc->sc_ioh); 133 sc->sc_iot = pa->pa_memt; 134 } 135 if (rv != 0) { 136 printf("can't map board\n"); 137 return; 138 } 139 140 sc->sc_dmat = pa->pa_dmat; 141 142 /* Enable the device. */ 143 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 144 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 145 reg | PCI_COMMAND_MASTER_ENABLE); 146 147 /* Map and establish the interrupt. XXX IPL_BIO. */ 148 if (pci_intr_map(pa, &ih)) { 149 printf("can't map interrupt\n"); 150 return; 151 } 152 intrstr = pci_intr_string(pc, ih); 153 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc); 154 if (sc->sc_ih == NULL) { 155 printf("can't establish interrupt"); 156 if (intrstr != NULL) 157 printf(" at %s", intrstr); 158 printf("\n"); 159 return; 160 } 161 162 /* Attach to the bus-independent code. */ 163 iop_init(sc, intrstr); 164 } 165
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