isp_pci.c revision 1.2 1 1.2 cgd /* $NetBSD: isp_pci.c,v 1.2 1997/03/12 21:07:16 cgd Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.1 cgd * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
5 1.1 cgd *
6 1.1 cgd * Copyright (c) 1997 by Matthew Jacob
7 1.1 cgd * NASA AMES Research Center
8 1.1 cgd * All rights reserved.
9 1.1 cgd *
10 1.1 cgd * Redistribution and use in source and binary forms, with or without
11 1.1 cgd * modification, are permitted provided that the following conditions
12 1.1 cgd * are met:
13 1.1 cgd * 1. Redistributions of source code must retain the above copyright
14 1.1 cgd * notice immediately at the beginning of the file, without modification,
15 1.1 cgd * this list of conditions, and the following disclaimer.
16 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 cgd * notice, this list of conditions and the following disclaimer in the
18 1.1 cgd * documentation and/or other materials provided with the distribution.
19 1.1 cgd * 3. The name of the author may not be used to endorse or promote products
20 1.1 cgd * derived from this software without specific prior written permission.
21 1.1 cgd *
22 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 1.1 cgd * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 cgd * SUCH DAMAGE.
33 1.1 cgd */
34 1.1 cgd
35 1.1 cgd #include <sys/param.h>
36 1.1 cgd #include <sys/systm.h>
37 1.1 cgd #include <sys/malloc.h>
38 1.1 cgd #include <sys/kernel.h>
39 1.1 cgd #include <sys/queue.h>
40 1.1 cgd #include <sys/device.h>
41 1.1 cgd #include <machine/bus.h>
42 1.1 cgd #include <machine/intr.h>
43 1.1 cgd #include <scsi/scsi_all.h>
44 1.1 cgd #include <scsi/scsiconf.h>
45 1.1 cgd #include <dev/pci/pcireg.h>
46 1.1 cgd #include <dev/pci/pcivar.h>
47 1.1 cgd #include <dev/pci/pcidevs.h>
48 1.1 cgd
49 1.1 cgd #include <dev/ic/ispreg.h>
50 1.1 cgd #include <dev/ic/ispvar.h>
51 1.1 cgd #include <dev/ic/ispmbox.h>
52 1.1 cgd #include <dev/microcode/isp/asm_pci.h>
53 1.1 cgd #ifdef alpha /* XXX */
54 1.1 cgd /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
55 1.1 cgd extern vm_offset_t alpha_XXX_dmamap(vm_offset_t);
56 1.1 cgd #undef vtophys
57 1.1 cgd #define vtophys(va) alpha_XXX_dmamap((vm_offset_t) va)
58 1.1 cgd #endif
59 1.1 cgd #include <sys/kernel.h>
60 1.1 cgd #define KVTOPHYS(x) vtophys(x)
61 1.1 cgd
62 1.1 cgd
63 1.1 cgd static u_int16_t isp_pci_rd_reg __P((struct ispsoftc *, int));
64 1.1 cgd static void isp_pci_wr_reg __P((struct ispsoftc *, int, u_int16_t));
65 1.1 cgd static vm_offset_t
66 1.1 cgd isp_pci_mbxdma __P((struct ispsoftc *, vm_offset_t, u_int32_t));
67 1.1 cgd static int
68 1.1 cgd isp_pci_dmasetup __P((struct ispsoftc *, struct scsi_xfer *, ispreq_t *,
69 1.1 cgd u_int8_t *, u_int8_t));
70 1.1 cgd
71 1.1 cgd static void isp_pci_reset1 __P((struct ispsoftc *));
72 1.1 cgd
73 1.1 cgd static struct ispmdvec mdvec = {
74 1.1 cgd isp_pci_rd_reg,
75 1.1 cgd isp_pci_wr_reg,
76 1.1 cgd isp_pci_mbxdma,
77 1.1 cgd isp_pci_dmasetup,
78 1.1 cgd NULL,
79 1.1 cgd NULL,
80 1.1 cgd isp_pci_reset1,
81 1.1 cgd (u_int16_t *) ISP_RISC_CODE,
82 1.1 cgd ISP_CODE_LENGTH,
83 1.1 cgd ISP_CODE_ORG,
84 1.1 cgd /* BIU_PCI_CONF1_FIFO_16 | BIU_BURST_ENABLE */ 0
85 1.1 cgd };
86 1.1 cgd
87 1.1 cgd #define PCI_QLOGIC_ISP \
88 1.1 cgd ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
89 1.1 cgd
90 1.1 cgd #define BASEADDR PCI_MAPREG_START
91 1.1 cgd
92 1.1 cgd
93 1.1 cgd #ifdef __BROKEN_INDIRECT_CONFIG
94 1.1 cgd static int isp_pci_probe __P((struct device *, void *, void *));
95 1.1 cgd #else
96 1.1 cgd static int isp_pci_probe __P((struct device *, struct cfdata *, void *));
97 1.1 cgd #endif
98 1.1 cgd static void isp_pci_attach __P((struct device *, struct device *, void *));
99 1.1 cgd
100 1.1 cgd struct isp_pcisoftc {
101 1.1 cgd struct ispsoftc pci_isp;
102 1.1 cgd bus_space_tag_t pci_iot;
103 1.1 cgd bus_space_handle_t pci_ioh;
104 1.1 cgd void * pci_ih;
105 1.1 cgd };
106 1.1 cgd
107 1.1 cgd struct cfattach isp_pci_ca = {
108 1.1 cgd sizeof (struct isp_pcisoftc), isp_pci_probe, isp_pci_attach
109 1.1 cgd };
110 1.1 cgd
111 1.1 cgd static int
112 1.1 cgd isp_pci_probe(parent, match, aux)
113 1.1 cgd struct device *parent;
114 1.1 cgd #ifdef __BROKEN_INDIRECT_CONFIG
115 1.1 cgd void *match, *aux;
116 1.1 cgd #else
117 1.1 cgd struct cfdata *match;
118 1.1 cgd void *aux;
119 1.1 cgd #endif
120 1.1 cgd {
121 1.1 cgd struct pci_attach_args *pa = aux;
122 1.1 cgd
123 1.1 cgd if (pa->pa_id == PCI_QLOGIC_ISP) {
124 1.1 cgd return (1);
125 1.1 cgd } else {
126 1.1 cgd return (0);
127 1.1 cgd }
128 1.1 cgd }
129 1.1 cgd
130 1.1 cgd
131 1.1 cgd static void
132 1.1 cgd isp_pci_attach(parent, self, aux)
133 1.1 cgd struct device *parent, *self;
134 1.1 cgd void *aux;
135 1.1 cgd {
136 1.1 cgd struct pci_attach_args *pa = aux;
137 1.1 cgd struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) self;
138 1.1 cgd bus_addr_t iobase;
139 1.1 cgd bus_size_t iosize;
140 1.1 cgd bus_space_handle_t ioh;
141 1.1 cgd pci_intr_handle_t ih;
142 1.1 cgd const char *intrstr;
143 1.1 cgd
144 1.1 cgd if (pci_io_find(pa->pa_pc, pa->pa_tag, BASEADDR, &iobase, &iosize)) {
145 1.1 cgd printf(" unable to find PCI base\n");
146 1.1 cgd return;
147 1.1 cgd }
148 1.1 cgd if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &ioh)) {
149 1.1 cgd printf(": unable to map registers\n");
150 1.1 cgd return;
151 1.1 cgd }
152 1.1 cgd printf("\n");
153 1.1 cgd
154 1.1 cgd pcs->pci_iot = pa->pa_iot;
155 1.1 cgd pcs->pci_ioh = ioh;
156 1.1 cgd pcs->pci_isp.isp_mdvec = &mdvec;
157 1.1 cgd isp_reset(&pcs->pci_isp);
158 1.1 cgd if (pcs->pci_isp.isp_state != ISP_RESETSTATE) {
159 1.1 cgd return;
160 1.1 cgd }
161 1.1 cgd isp_init(&pcs->pci_isp);
162 1.1 cgd if (pcs->pci_isp.isp_state != ISP_INITSTATE) {
163 1.1 cgd isp_uninit(&pcs->pci_isp);
164 1.1 cgd return;
165 1.1 cgd }
166 1.1 cgd
167 1.1 cgd if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
168 1.1 cgd pa->pa_intrline, &ih)) {
169 1.1 cgd printf("%s: couldn't map interrupt\n", pcs->pci_isp.isp_name);
170 1.1 cgd isp_uninit(&pcs->pci_isp);
171 1.1 cgd return;
172 1.1 cgd }
173 1.1 cgd
174 1.1 cgd intrstr = pci_intr_string(pa->pa_pc, ih);
175 1.1 cgd if (intrstr == NULL)
176 1.1 cgd intrstr = "<I dunno>";
177 1.1 cgd pcs->pci_ih =
178 1.1 cgd pci_intr_establish(pa->pa_pc, ih, IPL_BIO, isp_intr, &pcs->pci_isp);
179 1.1 cgd if (pcs->pci_ih == NULL) {
180 1.1 cgd printf("%s: couldn't establish interrupt at %s\n",
181 1.1 cgd pcs->pci_isp.isp_name, intrstr);
182 1.1 cgd isp_uninit(&pcs->pci_isp);
183 1.1 cgd return;
184 1.1 cgd }
185 1.1 cgd printf("%s: interrupting at %s\n", pcs->pci_isp.isp_name, intrstr);
186 1.1 cgd
187 1.1 cgd /*
188 1.1 cgd * Do Generic attach now.
189 1.1 cgd */
190 1.1 cgd isp_attach(&pcs->pci_isp);
191 1.1 cgd if (pcs->pci_isp.isp_state != ISP_RUNSTATE) {
192 1.1 cgd isp_uninit(&pcs->pci_isp);
193 1.1 cgd }
194 1.1 cgd }
195 1.1 cgd
196 1.1 cgd #define PCI_BIU_REGS_OFF 0x00
197 1.1 cgd #define PCI_MBOX_REGS_OFF 0x70
198 1.1 cgd #define PCI_SXP_REGS_OFF 0x80
199 1.1 cgd #define PCI_RISC_REGS_OFF 0x80
200 1.1 cgd
201 1.1 cgd static u_int16_t
202 1.1 cgd isp_pci_rd_reg(isp, regoff)
203 1.1 cgd struct ispsoftc *isp;
204 1.1 cgd int regoff;
205 1.1 cgd {
206 1.1 cgd struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
207 1.1 cgd int offset;
208 1.1 cgd if ((regoff & BIU_BLOCK) != 0) {
209 1.1 cgd offset = PCI_BIU_REGS_OFF;
210 1.1 cgd } else if ((regoff & MBOX_BLOCK) != 0) {
211 1.1 cgd offset = PCI_MBOX_REGS_OFF;
212 1.1 cgd } else if ((regoff & SXP_BLOCK) != 0) {
213 1.1 cgd offset = PCI_SXP_REGS_OFF;
214 1.1 cgd /*
215 1.1 cgd * XXX
216 1.1 cgd */
217 1.1 cgd panic("SXP Registers not accessible yet!");
218 1.1 cgd } else {
219 1.1 cgd offset = PCI_RISC_REGS_OFF;
220 1.1 cgd }
221 1.1 cgd regoff &= 0xff;
222 1.1 cgd offset += regoff;
223 1.1 cgd return bus_space_read_2(pcs->pci_iot, pcs->pci_ioh, offset);
224 1.1 cgd }
225 1.1 cgd
226 1.1 cgd static void
227 1.1 cgd isp_pci_wr_reg(isp, regoff, val)
228 1.1 cgd struct ispsoftc *isp;
229 1.1 cgd int regoff;
230 1.1 cgd u_int16_t val;
231 1.1 cgd {
232 1.1 cgd struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
233 1.1 cgd int offset;
234 1.1 cgd if ((regoff & BIU_BLOCK) != 0) {
235 1.1 cgd offset = PCI_BIU_REGS_OFF;
236 1.1 cgd } else if ((regoff & MBOX_BLOCK) != 0) {
237 1.1 cgd offset = PCI_MBOX_REGS_OFF;
238 1.1 cgd } else if ((regoff & SXP_BLOCK) != 0) {
239 1.1 cgd offset = PCI_SXP_REGS_OFF;
240 1.1 cgd /*
241 1.1 cgd * XXX
242 1.1 cgd */
243 1.1 cgd panic("SXP Registers not accessible yet!");
244 1.1 cgd } else {
245 1.1 cgd offset = PCI_RISC_REGS_OFF;
246 1.1 cgd }
247 1.1 cgd regoff &= 0xff;
248 1.1 cgd offset += regoff;
249 1.1 cgd bus_space_write_2(pcs->pci_iot, pcs->pci_ioh, offset, val);
250 1.1 cgd }
251 1.1 cgd
252 1.1 cgd static vm_offset_t
253 1.1 cgd isp_pci_mbxdma(isp, kva, len)
254 1.1 cgd struct ispsoftc *isp;
255 1.1 cgd vm_offset_t kva;
256 1.1 cgd u_int32_t len;
257 1.1 cgd {
258 1.1 cgd vm_offset_t pg, start, s1;
259 1.1 cgd
260 1.1 cgd start = KVTOPHYS(kva);
261 1.1 cgd
262 1.1 cgd pg = kva + NBPG;
263 1.1 cgd s1 = (start >> PGSHIFT) + 1;
264 1.1 cgd len -= NBPG;
265 1.1 cgd
266 1.1 cgd while ((int32_t)len > 0) {
267 1.1 cgd if (s1 != (KVTOPHYS(pg) >> PGSHIFT)) {
268 1.1 cgd printf("%s: mailboxes across noncontiguous pages\n",
269 1.1 cgd isp->isp_name);
270 1.1 cgd return ((vm_offset_t) 0);
271 1.1 cgd }
272 1.1 cgd len -= NBPG;
273 1.1 cgd pg += NBPG;
274 1.1 cgd s1++;
275 1.1 cgd }
276 1.1 cgd return (start);
277 1.1 cgd }
278 1.1 cgd
279 1.1 cgd /*
280 1.1 cgd * TODO: reduce the number of segments by
281 1.1 cgd * cchecking for adjacent physical page.
282 1.1 cgd */
283 1.1 cgd
284 1.1 cgd static int
285 1.1 cgd isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
286 1.1 cgd struct ispsoftc *isp;
287 1.1 cgd struct scsi_xfer *xs;
288 1.1 cgd ispreq_t *rq;
289 1.1 cgd u_int8_t *iptrp;
290 1.1 cgd u_int8_t optr;
291 1.1 cgd {
292 1.1 cgd ispcontreq_t *crq;
293 1.1 cgd unsigned long thiskv, nextkv;
294 1.1 cgd int datalen, amt;
295 1.1 cgd
296 1.1 cgd if (xs->datalen == 0) {
297 1.1 cgd rq->req_seg_count = 1;
298 1.1 cgd rq->req_flags |= REQFLAG_DATA_IN;
299 1.1 cgd return (0);
300 1.1 cgd }
301 1.1 cgd
302 1.1 cgd if (xs->flags & SCSI_DATA_IN) {
303 1.1 cgd rq->req_flags |= REQFLAG_DATA_IN;
304 1.1 cgd } else {
305 1.1 cgd rq->req_flags |= REQFLAG_DATA_OUT;
306 1.1 cgd }
307 1.1 cgd datalen = xs->datalen;
308 1.1 cgd thiskv = (unsigned long) xs->data;
309 1.1 cgd
310 1.1 cgd while (datalen && rq->req_seg_count < ISP_RQDSEG) {
311 1.1 cgd nextkv = (thiskv + NBPG) & ~(NBPG-1);
312 1.1 cgd amt = nextkv - thiskv;
313 1.1 cgd if (amt > datalen)
314 1.1 cgd amt = datalen;
315 1.1 cgd rq->req_dataseg[rq->req_seg_count].ds_count = amt;
316 1.1 cgd rq->req_dataseg[rq->req_seg_count].ds_base = KVTOPHYS(thiskv);
317 1.1 cgd #if 0
318 1.1 cgd printf("%s: seg%d: 0x%lx..0x%lx\n", isp->isp_name,
319 1.1 cgd rq->req_seg_count, thiskv,
320 1.1 cgd thiskv + (unsigned long) amt);
321 1.1 cgd #endif
322 1.1 cgd datalen -= amt;
323 1.1 cgd thiskv = nextkv;
324 1.1 cgd rq->req_seg_count++;
325 1.1 cgd }
326 1.1 cgd
327 1.1 cgd if (datalen == 0) {
328 1.1 cgd return (0);
329 1.1 cgd }
330 1.1 cgd
331 1.1 cgd do {
332 1.1 cgd int seg;
333 1.1 cgd crq = (ispcontreq_t *) &isp->isp_rquest[*iptrp][0];
334 1.1 cgd *iptrp = (*iptrp + 1) & (RQUEST_QUEUE_LEN - 1);
335 1.1 cgd if (*iptrp == optr) {
336 1.1 cgd printf("%s: Request Queue Overflow++\n",
337 1.1 cgd isp->isp_name);
338 1.1 cgd return (1);
339 1.1 cgd }
340 1.1 cgd rq->req_header.rqs_entry_count++;
341 1.1 cgd bzero((void *)crq, sizeof (*crq));
342 1.1 cgd crq->req_header.rqs_entry_count = 1;
343 1.1 cgd crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
344 1.1 cgd seg = 0;
345 1.1 cgd while (datalen && seg < ISP_CDSEG) {
346 1.1 cgd nextkv = (thiskv + NBPG) & ~(NBPG-1);
347 1.1 cgd amt = nextkv - thiskv;
348 1.1 cgd if (amt > datalen)
349 1.1 cgd amt = datalen;
350 1.1 cgd crq->req_dataseg[seg].ds_count = amt;
351 1.1 cgd crq->req_dataseg[seg].ds_base = KVTOPHYS(thiskv);
352 1.1 cgd #if 0
353 1.1 cgd printf("%s: Cont%d seg%d: 0x%lx..0x%lx\n",
354 1.1 cgd isp->isp_name, rq->req_header.rqs_entry_count,
355 1.1 cgd seg, thiskv, thiskv + (unsigned long) amt);
356 1.1 cgd #endif
357 1.1 cgd datalen -= amt;
358 1.1 cgd thiskv = nextkv;
359 1.1 cgd rq->req_seg_count++;
360 1.1 cgd seg++;
361 1.1 cgd }
362 1.1 cgd } while (datalen > 0);
363 1.1 cgd return (0);
364 1.1 cgd }
365 1.1 cgd
366 1.1 cgd static void
367 1.1 cgd isp_pci_reset1(isp)
368 1.1 cgd struct ispsoftc *isp;
369 1.1 cgd {
370 1.1 cgd /* Make sure the BIOS is disabled */
371 1.1 cgd isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
372 1.1 cgd }
373