isp_pci.c revision 1.21
1 /* $NetBSD: isp_pci.c,v 1.21 1998/07/15 19:53:57 mjacob Exp $ */ 2 /* 3 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters. 4 * 5 *--------------------------------------- 6 * Copyright (c) 1997, 1998 by Matthew Jacob 7 * NASA/Ames Research Center 8 * All rights reserved. 9 *--------------------------------------- 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 #include <dev/ic/isp_netbsd.h> 38 #include <dev/microcode/isp/asm_pci.h> 39 40 #include <dev/pci/pcireg.h> 41 #include <dev/pci/pcivar.h> 42 #include <dev/pci/pcidevs.h> 43 44 static u_int16_t isp_pci_rd_reg __P((struct ispsoftc *, int)); 45 static void isp_pci_wr_reg __P((struct ispsoftc *, int, u_int16_t)); 46 static int isp_pci_mbxdma __P((struct ispsoftc *)); 47 static int isp_pci_dmasetup __P((struct ispsoftc *, struct scsipi_xfer *, 48 ispreq_t *, u_int8_t *, u_int8_t)); 49 static void isp_pci_dmateardown __P((struct ispsoftc *, struct scsipi_xfer *, 50 u_int32_t)); 51 52 static void isp_pci_reset1 __P((struct ispsoftc *)); 53 static void isp_pci_dumpregs __P((struct ispsoftc *)); 54 55 static struct ispmdvec mdvec = { 56 isp_pci_rd_reg, 57 isp_pci_wr_reg, 58 isp_pci_mbxdma, 59 isp_pci_dmasetup, 60 isp_pci_dmateardown, 61 NULL, 62 isp_pci_reset1, 63 isp_pci_dumpregs, 64 ISP_RISC_CODE, 65 ISP_CODE_LENGTH, 66 ISP_CODE_ORG, 67 ISP_CODE_VERSION, 68 BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE, 69 60 /* MAGIC- all known PCI card implementations are 60MHz */ 70 }; 71 72 static struct ispmdvec mdvec_2100 = { 73 isp_pci_rd_reg, 74 isp_pci_wr_reg, 75 isp_pci_mbxdma, 76 isp_pci_dmasetup, 77 isp_pci_dmateardown, 78 NULL, 79 isp_pci_reset1, 80 isp_pci_dumpregs, 81 ISP2100_RISC_CODE, 82 ISP2100_CODE_LENGTH, 83 ISP2100_CODE_ORG, 84 ISP2100_CODE_VERSION, 85 BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE, 86 60 /* MAGIC- all known PCI card implementations are 60MHz */ 87 }; 88 89 #define PCI_QLOGIC_ISP \ 90 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC) 91 92 #ifndef PCI_PRODUCT_QLOGIC_ISP2100 93 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100 94 #endif 95 #define PCI_QLOGIC_ISP2100 \ 96 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC) 97 98 #define IO_MAP_REG 0x10 99 #define MEM_MAP_REG 0x14 100 101 102 static int isp_pci_probe __P((struct device *, struct cfdata *, void *)); 103 static void isp_pci_attach __P((struct device *, struct device *, void *)); 104 105 struct isp_pcisoftc { 106 struct ispsoftc pci_isp; 107 pci_chipset_tag_t pci_pc; 108 pcitag_t pci_tag; 109 bus_space_tag_t pci_st; 110 bus_space_handle_t pci_sh; 111 bus_dma_tag_t pci_dmat; 112 bus_dmamap_t pci_scratch_dmap; /* for fcp only */ 113 bus_dmamap_t pci_rquest_dmap; 114 bus_dmamap_t pci_result_dmap; 115 bus_dmamap_t pci_xfer_dmap[MAXISPREQUEST]; 116 void * pci_ih; 117 }; 118 119 struct cfattach isp_pci_ca = { 120 sizeof (struct isp_pcisoftc), isp_pci_probe, isp_pci_attach 121 }; 122 123 static int 124 isp_pci_probe(parent, match, aux) 125 struct device *parent; 126 struct cfdata *match; 127 void *aux; 128 { 129 struct pci_attach_args *pa = aux; 130 131 if (pa->pa_id == PCI_QLOGIC_ISP || 132 pa->pa_id == PCI_QLOGIC_ISP2100) { 133 return (1); 134 } else { 135 return (0); 136 } 137 } 138 139 140 static void 141 isp_pci_attach(parent, self, aux) 142 struct device *parent, *self; 143 void *aux; 144 { 145 static char oneshot = 0; 146 struct pci_attach_args *pa = aux; 147 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) self; 148 struct ispsoftc *isp = &pcs->pci_isp; 149 bus_space_tag_t st, iot, memt; 150 bus_space_handle_t sh, ioh, memh; 151 pci_intr_handle_t ih; 152 const char *intrstr; 153 int ioh_valid, memh_valid, i; 154 155 ioh_valid = (pci_mapreg_map(pa, IO_MAP_REG, 156 PCI_MAPREG_TYPE_IO, 0, 157 &iot, &ioh, NULL, NULL) == 0); 158 memh_valid = (pci_mapreg_map(pa, MEM_MAP_REG, 159 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 160 &memt, &memh, NULL, NULL) == 0); 161 162 if (memh_valid) { 163 st = memt; 164 sh = memh; 165 } else if (ioh_valid) { 166 st = iot; 167 sh = ioh; 168 } else { 169 printf(": unable to map device registers\n"); 170 return; 171 } 172 printf("\n"); 173 174 pcs->pci_st = st; 175 pcs->pci_sh = sh; 176 pcs->pci_dmat = pa->pa_dmat; 177 pcs->pci_pc = pa->pa_pc; 178 pcs->pci_tag = pa->pa_tag; 179 if (pa->pa_id == PCI_QLOGIC_ISP) { 180 isp->isp_mdvec = &mdvec; 181 isp->isp_type = ISP_HA_SCSI_UNKNOWN; 182 isp->isp_param = malloc(sizeof (sdparam), M_DEVBUF, M_NOWAIT); 183 if (isp->isp_param == NULL) { 184 printf("%s: couldn't allocate sdparam table\n", 185 isp->isp_name); 186 return; 187 } 188 bzero(isp->isp_param, sizeof (sdparam)); 189 } else if (pa->pa_id == PCI_QLOGIC_ISP2100) { 190 u_int32_t data; 191 isp->isp_mdvec = &mdvec_2100; 192 if (ioh_valid == 0) { 193 printf("%s: warning, ISP2100 cannot use I/O Space" 194 " Mappings\n", isp->isp_name); 195 } else { 196 pcs->pci_st = iot; 197 pcs->pci_sh = ioh; 198 } 199 200 #if 0 201 printf("%s: PCIREGS cmd=%x bhlc=%x\n", isp->isp_name, 202 pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG), 203 pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG)); 204 #endif 205 isp->isp_type = ISP_HA_FC_2100; 206 isp->isp_param = malloc(sizeof (fcparam), M_DEVBUF, M_NOWAIT); 207 if (isp->isp_param == NULL) { 208 printf("%s: couldn't allocate fcparam table\n", 209 isp->isp_name); 210 return; 211 } 212 bzero(isp->isp_param, sizeof (fcparam)); 213 214 data = pci_conf_read(pa->pa_pc, pa->pa_tag, 215 PCI_COMMAND_STATUS_REG); 216 data |= PCI_COMMAND_MASTER_ENABLE | 217 PCI_COMMAND_INVALIDATE_ENABLE; 218 pci_conf_write(pa->pa_pc, pa->pa_tag, 219 PCI_COMMAND_STATUS_REG, data); 220 /* 221 * Wierd- we need to clear the lsb in offset 0x30 to take the 222 * chip out of reset state. 223 */ 224 data = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x30); 225 data &= ~1; 226 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x30, data); 227 #if 0 228 /* 229 * XXX: Need to get the actual revision number of the 2100 FB 230 */ 231 data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); 232 data &= ~0xffff; 233 data |= 0xf801; 234 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, data); 235 printf("%s: setting latency to %x and cache line size to %x\n", 236 isp->isp_name, (data >> 8) & 0xff, 237 data & 0xff); 238 #endif 239 } else { 240 return; 241 } 242 243 if (oneshot) { 244 oneshot = 0; 245 printf("***Qlogic ISP Driver, NetBSD (pci) Version\n***%s\n", 246 ISP_VERSION_STRING); 247 } 248 249 isp_reset(isp); 250 if (isp->isp_state != ISP_RESETSTATE) { 251 free(isp->isp_param, M_DEVBUF); 252 return; 253 } 254 isp_init(isp); 255 if (isp->isp_state != ISP_INITSTATE) { 256 isp_uninit(isp); 257 free(isp->isp_param, M_DEVBUF); 258 return; 259 } 260 261 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 262 pa->pa_intrline, &ih)) { 263 printf("%s: couldn't map interrupt\n", isp->isp_name); 264 isp_uninit(isp); 265 free(isp->isp_param, M_DEVBUF); 266 return; 267 } 268 269 intrstr = pci_intr_string(pa->pa_pc, ih); 270 if (intrstr == NULL) 271 intrstr = "<I dunno>"; 272 pcs->pci_ih = 273 pci_intr_establish(pa->pa_pc, ih, IPL_BIO, isp_intr, isp); 274 if (pcs->pci_ih == NULL) { 275 printf("%s: couldn't establish interrupt at %s\n", 276 isp->isp_name, intrstr); 277 isp_uninit(isp); 278 free(isp->isp_param, M_DEVBUF); 279 return; 280 } 281 printf("%s: interrupting at %s\n", isp->isp_name, intrstr); 282 283 /* 284 * Create the DMA maps for the data transfers. 285 */ 286 for (i = 0; i < RQUEST_QUEUE_LEN; i++) { 287 if (bus_dmamap_create(pcs->pci_dmat, MAXPHYS, 288 (MAXPHYS / NBPG) + 1, MAXPHYS, 0, BUS_DMA_NOWAIT, 289 &pcs->pci_xfer_dmap[i])) { 290 printf("%s: can't create dma maps\n", 291 isp->isp_name); 292 isp_uninit(isp); 293 return; 294 } 295 } 296 /* 297 * Do Generic attach now. 298 */ 299 isp_attach(isp); 300 if (isp->isp_state != ISP_RUNSTATE) { 301 isp_uninit(isp); 302 free(isp->isp_param, M_DEVBUF); 303 return; 304 } 305 } 306 307 #define PCI_BIU_REGS_OFF BIU_REGS_OFF 308 309 static u_int16_t 310 isp_pci_rd_reg(isp, regoff) 311 struct ispsoftc *isp; 312 int regoff; 313 { 314 u_int16_t rv; 315 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp; 316 int offset, oldsxp = 0; 317 318 if ((regoff & BIU_BLOCK) != 0) { 319 offset = PCI_BIU_REGS_OFF; 320 } else if ((regoff & MBOX_BLOCK) != 0) { 321 if (isp->isp_type & ISP_HA_SCSI) 322 offset = PCI_MBOX_REGS_OFF; 323 else 324 offset = PCI_MBOX_REGS2100_OFF; 325 } else if ((regoff & SXP_BLOCK) != 0) { 326 offset = PCI_SXP_REGS_OFF; 327 /* 328 * We will assume that someone has paused the RISC processor. 329 */ 330 oldsxp = isp_pci_rd_reg(isp, BIU_CONF1); 331 isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP); 332 } else { 333 offset = PCI_RISC_REGS_OFF; 334 } 335 regoff &= 0xff; 336 offset += regoff; 337 rv = bus_space_read_2(pcs->pci_st, pcs->pci_sh, offset); 338 if ((regoff & SXP_BLOCK) != 0) { 339 isp_pci_wr_reg(isp, BIU_CONF1, oldsxp); 340 } 341 return (rv); 342 } 343 344 static void 345 isp_pci_wr_reg(isp, regoff, val) 346 struct ispsoftc *isp; 347 int regoff; 348 u_int16_t val; 349 { 350 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp; 351 int offset, oldsxp = 0; 352 if ((regoff & BIU_BLOCK) != 0) { 353 offset = PCI_BIU_REGS_OFF; 354 } else if ((regoff & MBOX_BLOCK) != 0) { 355 if (isp->isp_type & ISP_HA_SCSI) 356 offset = PCI_MBOX_REGS_OFF; 357 else 358 offset = PCI_MBOX_REGS2100_OFF; 359 } else if ((regoff & SXP_BLOCK) != 0) { 360 offset = PCI_SXP_REGS_OFF; 361 /* 362 * We will assume that someone has paused the RISC processor. 363 */ 364 oldsxp = isp_pci_rd_reg(isp, BIU_CONF1); 365 isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP); 366 } else { 367 offset = PCI_RISC_REGS_OFF; 368 } 369 regoff &= 0xff; 370 offset += regoff; 371 bus_space_write_2(pcs->pci_st, pcs->pci_sh, offset, val); 372 if ((regoff & SXP_BLOCK) != 0) { 373 isp_pci_wr_reg(isp, BIU_CONF1, oldsxp); 374 } 375 } 376 377 static int 378 isp_pci_mbxdma(isp) 379 struct ispsoftc *isp; 380 { 381 struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp; 382 bus_dma_segment_t seg; 383 bus_size_t len; 384 fcparam *fcp; 385 int rseg; 386 387 /* 388 * Allocate and map the request queue. 389 */ 390 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN); 391 if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg, 392 BUS_DMA_NOWAIT) || 393 bus_dmamem_map(pci->pci_dmat, &seg, rseg, len, 394 (caddr_t *)&isp->isp_rquest, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) 395 return (1); 396 if (bus_dmamap_create(pci->pci_dmat, len, 1, len, 0, BUS_DMA_NOWAIT, 397 &pci->pci_rquest_dmap) || 398 bus_dmamap_load(pci->pci_dmat, pci->pci_rquest_dmap, 399 (caddr_t)isp->isp_rquest, len, NULL, BUS_DMA_NOWAIT)) 400 return (1); 401 402 isp->isp_rquest_dma = pci->pci_rquest_dmap->dm_segs[0].ds_addr; 403 404 /* 405 * Allocate and map the result queue. 406 */ 407 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN); 408 if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg, 409 BUS_DMA_NOWAIT) || 410 bus_dmamem_map(pci->pci_dmat, &seg, rseg, len, 411 (caddr_t *)&isp->isp_result, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) 412 return (1); 413 if (bus_dmamap_create(pci->pci_dmat, len, 1, len, 0, BUS_DMA_NOWAIT, 414 &pci->pci_result_dmap) || 415 bus_dmamap_load(pci->pci_dmat, pci->pci_result_dmap, 416 (caddr_t)isp->isp_result, len, NULL, BUS_DMA_NOWAIT)) 417 return (1); 418 isp->isp_result_dma = pci->pci_result_dmap->dm_segs[0].ds_addr; 419 420 if (isp->isp_type & ISP_HA_SCSI) { 421 return (0); 422 } 423 424 fcp = isp->isp_param; 425 len = ISP2100_SCRLEN; 426 if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg, 427 BUS_DMA_NOWAIT) || 428 bus_dmamem_map(pci->pci_dmat, &seg, rseg, len, 429 (caddr_t *)&fcp->isp_scratch, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) 430 return (1); 431 if (bus_dmamap_create(pci->pci_dmat, len, 1, len, 0, BUS_DMA_NOWAIT, 432 &pci->pci_scratch_dmap) || 433 bus_dmamap_load(pci->pci_dmat, pci->pci_scratch_dmap, 434 (caddr_t)fcp->isp_scratch, len, NULL, BUS_DMA_NOWAIT)) 435 return (1); 436 fcp->isp_scdma = pci->pci_scratch_dmap->dm_segs[0].ds_addr; 437 return (0); 438 } 439 440 static int 441 isp_pci_dmasetup(isp, xs, rq, iptrp, optr) 442 struct ispsoftc *isp; 443 struct scsipi_xfer *xs; 444 ispreq_t *rq; 445 u_int8_t *iptrp; 446 u_int8_t optr; 447 { 448 struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp; 449 bus_dmamap_t dmap = pci->pci_xfer_dmap[rq->req_handle - 1]; 450 ispcontreq_t *crq; 451 int segcnt, seg, error, ovseg, seglim, drq; 452 453 if (xs->datalen == 0) { 454 rq->req_seg_count = 1; 455 return (0); 456 } 457 458 if (rq->req_handle > RQUEST_QUEUE_LEN || rq->req_handle < 1) { 459 panic("%s: bad handle (%d) in isp_pci_dmasetup\n", 460 isp->isp_name, rq->req_handle); 461 /* NOTREACHED */ 462 } 463 464 if (xs->flags & SCSI_DATA_IN) { 465 drq = REQFLAG_DATA_IN; 466 } else { 467 drq = REQFLAG_DATA_OUT; 468 } 469 470 if (isp->isp_type & ISP_HA_FC) { 471 seglim = ISP_RQDSEG_T2; 472 ((ispreqt2_t *)rq)->req_totalcnt = xs->datalen; 473 ((ispreqt2_t *)rq)->req_flags |= drq; 474 } else { 475 seglim = ISP_RQDSEG; 476 rq->req_flags |= drq; 477 } 478 error = bus_dmamap_load(pci->pci_dmat, dmap, xs->data, xs->datalen, 479 NULL, xs->flags & SCSI_NOSLEEP ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 480 if (error) { 481 XS_SETERR(xs, HBA_BOTCH); 482 return (error); 483 } 484 485 segcnt = dmap->dm_nsegs; 486 487 for (seg = 0, rq->req_seg_count = 0; 488 seg < segcnt && rq->req_seg_count < seglim; 489 seg++, rq->req_seg_count++) { 490 if (isp->isp_type & ISP_HA_FC) { 491 ispreqt2_t *rq2 = (ispreqt2_t *)rq; 492 rq2->req_dataseg[rq2->req_seg_count].ds_count = 493 dmap->dm_segs[seg].ds_len; 494 rq2->req_dataseg[rq2->req_seg_count].ds_base = 495 dmap->dm_segs[seg].ds_addr; 496 } else { 497 rq->req_dataseg[rq->req_seg_count].ds_count = 498 dmap->dm_segs[seg].ds_len; 499 rq->req_dataseg[rq->req_seg_count].ds_base = 500 dmap->dm_segs[seg].ds_addr; 501 } 502 } 503 504 if (seg == segcnt) 505 goto mapsync; 506 507 do { 508 crq = (ispcontreq_t *) 509 ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp); 510 *iptrp = (*iptrp + 1) & (RQUEST_QUEUE_LEN - 1); 511 if (*iptrp == optr) { 512 printf("%s: Request Queue Overflow++\n", 513 isp->isp_name); 514 bus_dmamap_unload(pci->pci_dmat, dmap); 515 XS_SETERR(xs, HBA_BOTCH); 516 return (EFBIG); 517 } 518 rq->req_header.rqs_entry_count++; 519 bzero((void *)crq, sizeof (*crq)); 520 crq->req_header.rqs_entry_count = 1; 521 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG; 522 523 for (ovseg = 0; seg < segcnt && ovseg < ISP_CDSEG; 524 rq->req_seg_count++, seg++, ovseg++) { 525 crq->req_dataseg[ovseg].ds_count = 526 dmap->dm_segs[seg].ds_len; 527 crq->req_dataseg[ovseg].ds_base = 528 dmap->dm_segs[seg].ds_addr; 529 } 530 } while (seg < segcnt); 531 532 mapsync: 533 bus_dmamap_sync(pci->pci_dmat, dmap, 0, dmap->dm_mapsize, 534 xs->flags & SCSI_DATA_IN ? 535 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 536 return (0); 537 } 538 539 static void 540 isp_pci_dmateardown(isp, xs, handle) 541 struct ispsoftc *isp; 542 struct scsipi_xfer *xs; 543 u_int32_t handle; 544 { 545 struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp; 546 bus_dmamap_t dmap = pci->pci_xfer_dmap[handle]; 547 548 bus_dmamap_sync(pci->pci_dmat, dmap, 0, dmap->dm_mapsize, 549 xs->flags & SCSI_DATA_IN ? 550 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 551 bus_dmamap_unload(pci->pci_dmat, dmap); 552 } 553 554 static void 555 isp_pci_reset1(isp) 556 struct ispsoftc *isp; 557 { 558 /* Make sure the BIOS is disabled */ 559 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS); 560 } 561 562 static void 563 isp_pci_dumpregs(isp) 564 struct ispsoftc *isp; 565 { 566 struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp; 567 printf("%s: PCI Status Command/Status=%x\n", pci->pci_isp.isp_name, 568 pci_conf_read(pci->pci_pc, pci->pci_tag, PCI_COMMAND_STATUS_REG)); 569 } 570
Indexes created Sat Sep 27 14:09:57 GMT 2025