iteide.c revision 1.3
1 /* $NetBSD: iteide.c,v 1.3 2005/05/24 05:25:15 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Grant Beattie. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: iteide.c,v 1.3 2005/05/24 05:25:15 lukem Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 39 #include <dev/pci/pcivar.h> 40 #include <dev/pci/pcidevs.h> 41 #include <dev/pci/pciidereg.h> 42 #include <dev/pci/pciidevar.h> 43 #include <dev/pci/pciide_ite_reg.h> 44 45 static void ite_chip_map(struct pciide_softc*, struct pci_attach_args*); 46 static void ite_setup_channel(struct ata_channel*); 47 48 static int iteide_match(struct device *, struct cfdata *, void *); 49 static void iteide_attach(struct device *, struct device *, void *); 50 51 CFATTACH_DECL(iteide, sizeof(struct pciide_softc), 52 iteide_match, iteide_attach, NULL, NULL); 53 54 static const struct pciide_product_desc pciide_ite_products[] = { 55 { PCI_PRODUCT_ITE_IT8212, 56 0, 57 "Integrated Technology Express IDE controller", 58 ite_chip_map, 59 }, 60 { 0, 61 0, 62 NULL, 63 NULL 64 } 65 }; 66 67 static int 68 iteide_match(struct device *parent, struct cfdata *match, void *aux) 69 { 70 struct pci_attach_args *pa = aux; 71 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ITE && 72 PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE) { 73 if (pciide_lookup_product(pa->pa_id, pciide_ite_products)) 74 return (2); 75 } 76 return (0); 77 } 78 79 static void 80 iteide_attach(struct device *parent, struct device *self, void *aux) 81 { 82 struct pci_attach_args *pa = aux; 83 struct pciide_softc *sc = (struct pciide_softc *)self; 84 85 pciide_common_attach(sc, pa, 86 pciide_lookup_product(pa->pa_id, pciide_ite_products)); 87 } 88 89 static void 90 ite_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 91 { 92 struct pciide_channel *cp; 93 int channel; 94 pcireg_t interface; 95 bus_size_t cmdsize, ctlsize; 96 pcireg_t cfg, modectl; 97 98 /* fake interface since IT8212 claims to be a RAID device */ 99 interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | 100 PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 101 102 cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG); 103 modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE); 104 ATADEBUG_PRINT(("%s: cfg=0x%x, modectl=0x%x\n", 105 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cfg & IT_CFG_MASK, 106 modectl & IT_MODE_MASK), DEBUG_PROBE); 107 108 if (pciide_chipen(sc, pa) == 0) 109 return; 110 111 aprint_normal("%s: bus-master DMA support present", 112 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 113 pciide_mapreg_dma(sc, pa); 114 aprint_normal("\n"); 115 116 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 117 118 if (sc->sc_dma_ok) { 119 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 120 sc->sc_wdcdev.irqack = pciide_irqack; 121 } 122 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 123 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 124 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 125 126 sc->sc_wdcdev.sc_atac.atac_set_modes = ite_setup_channel; 127 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 128 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 129 130 wdc_allocate_regs(&sc->sc_wdcdev); 131 132 /* Disable RAID */ 133 modectl &= ~IT_MODE_RAID1; 134 /* Disable CPU firmware mode */ 135 modectl &= ~IT_MODE_CPU; 136 137 pci_conf_write(sc->sc_pc, sc->sc_tag, IT_MODE, modectl); 138 139 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; channel++) { 140 cp = &sc->pciide_channels[channel]; 141 142 if (pciide_chansetup(sc, channel, interface) == 0) 143 continue; 144 145 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 146 pciide_pci_intr); 147 } 148 /* Re-read configuration registers after channels setup */ 149 cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG); 150 modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE); 151 ATADEBUG_PRINT(("%s: cfg=0x%x, modectl=0x%x\n", 152 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cfg & IT_CFG_MASK, 153 modectl & IT_MODE_MASK), DEBUG_PROBE); 154 } 155 156 static void 157 ite_setup_channel(struct ata_channel *chp) 158 { 159 struct ata_drive_datas *drvp; 160 int drive, mode = 0; 161 u_int32_t idedma_ctl; 162 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 163 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 164 int channel = chp->ch_channel; 165 pcireg_t cfg, modectl; 166 pcireg_t tim; 167 168 cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG); 169 modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE); 170 tim = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_TIM(channel)); 171 ATADEBUG_PRINT(("%s:%d: tim=0x%x\n", 172 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, 173 channel, tim), DEBUG_PROBE); 174 175 /* Setup DMA if needed */ 176 pciide_channel_dma_setup(cp); 177 178 /* Clear all bits for this channel */ 179 idedma_ctl = 0; 180 181 /* Per channel settings */ 182 for (drive = 0; drive < 2; drive++) { 183 drvp = &chp->ch_drive[drive]; 184 185 /* If no drive, skip */ 186 if ((drvp->drive_flags & DRIVE) == 0) 187 continue; 188 189 if ((chp->ch_atac->atac_cap & ATAC_CAP_UDMA) != 0 && 190 (drvp->drive_flags & DRIVE_UDMA) != 0) { 191 /* Setup UltraDMA mode */ 192 drvp->drive_flags &= ~DRIVE_DMA; 193 modectl &= ~IT_MODE_DMA(channel, drive); 194 195 #if 0 196 /* Check cable, only works in CPU firmware mode */ 197 if (drvp->UDMA_mode > 2 && 198 (cfg & IT_CFG_CABLE(channel, drive)) == 0) { 199 ATADEBUG_PRINT(("(%s:%d:%d): " 200 "80-wire cable not detected\n", 201 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, 202 channel, drive), DEBUG_PROBE); 203 drvp->UDMA_mode = 2; 204 } 205 #endif 206 207 if (drvp->UDMA_mode >= 5) 208 tim |= IT_TIM_UDMA5(drive); 209 else 210 tim &= ~IT_TIM_UDMA5(drive); 211 212 mode = drvp->PIO_mode; 213 } else if ((chp->ch_atac->atac_cap & ATAC_CAP_DMA) != 0 && 214 (drvp->drive_flags & DRIVE_DMA) != 0) { 215 /* Setup multiword DMA mode */ 216 drvp->drive_flags &= ~DRIVE_UDMA; 217 modectl |= IT_MODE_DMA(channel, drive); 218 219 /* mode = min(pio, dma + 2) */ 220 if (drvp->PIO_mode <= (drvp->DMA_mode + 2)) 221 mode = drvp->PIO_mode; 222 else 223 mode = drvp->DMA_mode + 2; 224 } else { 225 goto pio; 226 } 227 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 228 229 pio: 230 /* Setup PIO mode */ 231 if (mode <= 2) { 232 drvp->DMA_mode = 0; 233 drvp->PIO_mode = 0; 234 mode = 0; 235 } else { 236 drvp->PIO_mode = mode; 237 drvp->DMA_mode = mode - 2; 238 } 239 240 /* Enable IORDY if PIO mode >= 3 */ 241 if (drvp->PIO_mode >= 3) 242 cfg |= IT_CFG_IORDY(channel); 243 } 244 245 ATADEBUG_PRINT(("%s: tim=0x%x\n", 246 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, tim), DEBUG_PROBE); 247 248 pci_conf_write(sc->sc_pc, sc->sc_tag, IT_CFG, cfg); 249 pci_conf_write(sc->sc_pc, sc->sc_tag, IT_MODE, modectl); 250 pci_conf_write(sc->sc_pc, sc->sc_tag, IT_TIM(channel), tim); 251 252 if (idedma_ctl != 0) { 253 /* Add software bits in status register */ 254 bus_space_write_1(sc->sc_dma_iot, 255 cp->dma_iohs[IDEDMA_CTL], 0, idedma_ctl); 256 } 257 } 258
Indexes created Mon Sep 22 13:09:51 GMT 2025