ixgbe.c revision 1.88.2.10 1 1.88.2.10 martin /* $NetBSD: ixgbe.c,v 1.88.2.10 2018/02/26 13:55:54 martin Exp $ */
2 1.88.2.6 snj
3 1.1 dyoung /******************************************************************************
4 1.1 dyoung
5 1.88.2.6 snj Copyright (c) 2001-2017, Intel Corporation
6 1.1 dyoung All rights reserved.
7 1.88.2.6 snj
8 1.88.2.6 snj Redistribution and use in source and binary forms, with or without
9 1.1 dyoung modification, are permitted provided that the following conditions are met:
10 1.88.2.6 snj
11 1.88.2.6 snj 1. Redistributions of source code must retain the above copyright notice,
12 1.1 dyoung this list of conditions and the following disclaimer.
13 1.88.2.6 snj
14 1.88.2.6 snj 2. Redistributions in binary form must reproduce the above copyright
15 1.88.2.6 snj notice, this list of conditions and the following disclaimer in the
16 1.1 dyoung documentation and/or other materials provided with the distribution.
17 1.88.2.6 snj
18 1.88.2.6 snj 3. Neither the name of the Intel Corporation nor the names of its
19 1.88.2.6 snj contributors may be used to endorse or promote products derived from
20 1.1 dyoung this software without specific prior written permission.
21 1.88.2.6 snj
22 1.1 dyoung THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 1.88.2.6 snj AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.88.2.6 snj IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.88.2.6 snj ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 1.88.2.6 snj LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.88.2.6 snj CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.88.2.6 snj SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.88.2.6 snj INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.88.2.6 snj CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 dyoung ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 1.1 dyoung POSSIBILITY OF SUCH DAMAGE.
33 1.1 dyoung
34 1.1 dyoung ******************************************************************************/
35 1.88.2.6 snj /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 320916 2017-07-12 17:35:32Z sbruno $*/
36 1.88.2.6 snj
37 1.1 dyoung /*
38 1.1 dyoung * Copyright (c) 2011 The NetBSD Foundation, Inc.
39 1.1 dyoung * All rights reserved.
40 1.1 dyoung *
41 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
42 1.1 dyoung * by Coyote Point Systems, Inc.
43 1.1 dyoung *
44 1.1 dyoung * Redistribution and use in source and binary forms, with or without
45 1.1 dyoung * modification, are permitted provided that the following conditions
46 1.1 dyoung * are met:
47 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
48 1.1 dyoung * notice, this list of conditions and the following disclaimer.
49 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
51 1.1 dyoung * documentation and/or other materials provided with the distribution.
52 1.1 dyoung *
53 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
54 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
64 1.1 dyoung */
65 1.1 dyoung
66 1.80 msaitoh #ifdef _KERNEL_OPT
67 1.1 dyoung #include "opt_inet.h"
68 1.22 msaitoh #include "opt_inet6.h"
69 1.80 msaitoh #include "opt_net_mpsafe.h"
70 1.80 msaitoh #endif
71 1.1 dyoung
72 1.1 dyoung #include "ixgbe.h"
73 1.29 msaitoh #include "vlan.h"
74 1.1 dyoung
75 1.33 msaitoh #include <sys/cprng.h>
76 1.88.2.2 snj #include <dev/mii/mii.h>
77 1.88.2.2 snj #include <dev/mii/miivar.h>
78 1.33 msaitoh
79 1.88.2.6 snj /************************************************************************
80 1.88.2.6 snj * Driver version
81 1.88.2.6 snj ************************************************************************/
82 1.88.2.6 snj char ixgbe_driver_version[] = "3.2.12-k";
83 1.1 dyoung
84 1.1 dyoung
85 1.88.2.6 snj /************************************************************************
86 1.88.2.6 snj * PCI Device ID Table
87 1.1 dyoung *
88 1.88.2.6 snj * Used by probe to select devices to load on
89 1.88.2.6 snj * Last field stores an index into ixgbe_strings
90 1.88.2.6 snj * Last entry must be all 0s
91 1.1 dyoung *
92 1.88.2.6 snj * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
93 1.88.2.6 snj ************************************************************************/
94 1.1 dyoung static ixgbe_vendor_info_t ixgbe_vendor_info_array[] =
95 1.1 dyoung {
96 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0},
97 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0},
98 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0},
99 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0},
100 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0},
101 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0},
102 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0},
103 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0},
104 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0},
105 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0},
106 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0},
107 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0},
108 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0},
109 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0},
110 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0},
111 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0},
112 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0},
113 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0},
114 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0},
115 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0},
116 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0},
117 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0},
118 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0},
119 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0},
120 1.24 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0},
121 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0},
122 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0},
123 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0},
124 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0},
125 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0},
126 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0},
127 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0},
128 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0},
129 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0},
130 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0},
131 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0},
132 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0},
133 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0},
134 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0},
135 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0},
136 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0},
137 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0},
138 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0},
139 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0},
140 1.1 dyoung /* required last entry */
141 1.1 dyoung {0, 0, 0, 0, 0}
142 1.1 dyoung };
143 1.1 dyoung
144 1.88.2.6 snj /************************************************************************
145 1.88.2.6 snj * Table of branding strings
146 1.88.2.6 snj ************************************************************************/
147 1.1 dyoung static const char *ixgbe_strings[] = {
148 1.1 dyoung "Intel(R) PRO/10GbE PCI-Express Network Driver"
149 1.1 dyoung };
150 1.1 dyoung
151 1.88.2.6 snj /************************************************************************
152 1.88.2.6 snj * Function prototypes
153 1.88.2.6 snj ************************************************************************/
154 1.1 dyoung static int ixgbe_probe(device_t, cfdata_t, void *);
155 1.1 dyoung static void ixgbe_attach(device_t, device_t, void *);
156 1.1 dyoung static int ixgbe_detach(device_t, int);
157 1.1 dyoung #if 0
158 1.1 dyoung static int ixgbe_shutdown(device_t);
159 1.1 dyoung #endif
160 1.44 msaitoh static bool ixgbe_suspend(device_t, const pmf_qual_t *);
161 1.44 msaitoh static bool ixgbe_resume(device_t, const pmf_qual_t *);
162 1.88.2.6 snj static int ixgbe_ifflags_cb(struct ethercom *);
163 1.1 dyoung static int ixgbe_ioctl(struct ifnet *, u_long, void *);
164 1.1 dyoung static void ixgbe_ifstop(struct ifnet *, int);
165 1.1 dyoung static int ixgbe_init(struct ifnet *);
166 1.1 dyoung static void ixgbe_init_locked(struct adapter *);
167 1.1 dyoung static void ixgbe_stop(void *);
168 1.88.2.6 snj static void ixgbe_init_device_features(struct adapter *);
169 1.88.2.6 snj static void ixgbe_check_fan_failure(struct adapter *, u32, bool);
170 1.43 msaitoh static void ixgbe_add_media_types(struct adapter *);
171 1.1 dyoung static void ixgbe_media_status(struct ifnet *, struct ifmediareq *);
172 1.1 dyoung static int ixgbe_media_change(struct ifnet *);
173 1.1 dyoung static int ixgbe_allocate_pci_resources(struct adapter *,
174 1.1 dyoung const struct pci_attach_args *);
175 1.88.2.8 snj static void ixgbe_free_softint(struct adapter *);
176 1.48 msaitoh static void ixgbe_get_slot_info(struct adapter *);
177 1.1 dyoung static int ixgbe_allocate_msix(struct adapter *,
178 1.1 dyoung const struct pci_attach_args *);
179 1.1 dyoung static int ixgbe_allocate_legacy(struct adapter *,
180 1.1 dyoung const struct pci_attach_args *);
181 1.88.2.6 snj static int ixgbe_configure_interrupts(struct adapter *);
182 1.88.2.8 snj static void ixgbe_free_pciintr_resources(struct adapter *);
183 1.1 dyoung static void ixgbe_free_pci_resources(struct adapter *);
184 1.1 dyoung static void ixgbe_local_timer(void *);
185 1.63 msaitoh static void ixgbe_local_timer1(void *);
186 1.1 dyoung static int ixgbe_setup_interface(device_t, struct adapter *);
187 1.45 msaitoh static void ixgbe_config_gpie(struct adapter *);
188 1.44 msaitoh static void ixgbe_config_dmac(struct adapter *);
189 1.44 msaitoh static void ixgbe_config_delay_values(struct adapter *);
190 1.1 dyoung static void ixgbe_config_link(struct adapter *);
191 1.44 msaitoh static void ixgbe_check_wol_support(struct adapter *);
192 1.44 msaitoh static int ixgbe_setup_low_power_mode(struct adapter *);
193 1.43 msaitoh static void ixgbe_rearm_queues(struct adapter *, u64);
194 1.1 dyoung
195 1.1 dyoung static void ixgbe_initialize_transmit_units(struct adapter *);
196 1.1 dyoung static void ixgbe_initialize_receive_units(struct adapter *);
197 1.43 msaitoh static void ixgbe_enable_rx_drop(struct adapter *);
198 1.43 msaitoh static void ixgbe_disable_rx_drop(struct adapter *);
199 1.48 msaitoh static void ixgbe_initialize_rss_mapping(struct adapter *);
200 1.1 dyoung
201 1.1 dyoung static void ixgbe_enable_intr(struct adapter *);
202 1.1 dyoung static void ixgbe_disable_intr(struct adapter *);
203 1.1 dyoung static void ixgbe_update_stats_counters(struct adapter *);
204 1.1 dyoung static void ixgbe_set_promisc(struct adapter *);
205 1.1 dyoung static void ixgbe_set_multi(struct adapter *);
206 1.1 dyoung static void ixgbe_update_link_status(struct adapter *);
207 1.1 dyoung static void ixgbe_set_ivar(struct adapter *, u8, u8, s8);
208 1.1 dyoung static void ixgbe_configure_ivars(struct adapter *);
209 1.1 dyoung static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
210 1.88.2.10 martin static void ixgbe_eitr_write(struct ix_queue *, uint32_t);
211 1.1 dyoung
212 1.1 dyoung static void ixgbe_setup_vlan_hw_support(struct adapter *);
213 1.1 dyoung #if 0
214 1.1 dyoung static void ixgbe_register_vlan(void *, struct ifnet *, u16);
215 1.1 dyoung static void ixgbe_unregister_vlan(void *, struct ifnet *, u16);
216 1.1 dyoung #endif
217 1.1 dyoung
218 1.44 msaitoh static void ixgbe_add_device_sysctls(struct adapter *);
219 1.44 msaitoh static void ixgbe_add_hw_stats(struct adapter *);
220 1.85 msaitoh static void ixgbe_clear_evcnt(struct adapter *);
221 1.52 msaitoh static int ixgbe_set_flowcntl(struct adapter *, int);
222 1.52 msaitoh static int ixgbe_set_advertise(struct adapter *, int);
223 1.88.2.6 snj static int ixgbe_get_advertise(struct adapter *);
224 1.44 msaitoh
225 1.44 msaitoh /* Sysctl handlers */
226 1.47 msaitoh static void ixgbe_set_sysctl_value(struct adapter *, const char *,
227 1.48 msaitoh const char *, int *, int);
228 1.52 msaitoh static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO);
229 1.52 msaitoh static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO);
230 1.88.2.6 snj static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO);
231 1.44 msaitoh static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO);
232 1.44 msaitoh static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO);
233 1.44 msaitoh static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO);
234 1.48 msaitoh #ifdef IXGBE_DEBUG
235 1.48 msaitoh static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO);
236 1.48 msaitoh static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO);
237 1.48 msaitoh #endif
238 1.88.2.6 snj static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO);
239 1.88.2.6 snj static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO);
240 1.88.2.6 snj static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO);
241 1.88.2.6 snj static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO);
242 1.88.2.6 snj static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO);
243 1.44 msaitoh static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO);
244 1.44 msaitoh static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO);
245 1.1 dyoung
246 1.1 dyoung /* Support for pluggable optic modules */
247 1.1 dyoung static bool ixgbe_sfp_probe(struct adapter *);
248 1.1 dyoung
249 1.88.2.6 snj /* Legacy (single vector) interrupt handler */
250 1.1 dyoung static int ixgbe_legacy_irq(void *);
251 1.1 dyoung
252 1.88.2.6 snj /* The MSI/MSI-X Interrupt handlers */
253 1.34 msaitoh static int ixgbe_msix_que(void *);
254 1.34 msaitoh static int ixgbe_msix_link(void *);
255 1.1 dyoung
256 1.1 dyoung /* Software interrupts for deferred work */
257 1.1 dyoung static void ixgbe_handle_que(void *);
258 1.1 dyoung static void ixgbe_handle_link(void *);
259 1.1 dyoung static void ixgbe_handle_msf(void *);
260 1.1 dyoung static void ixgbe_handle_mod(void *);
261 1.44 msaitoh static void ixgbe_handle_phy(void *);
262 1.1 dyoung
263 1.1 dyoung static ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *);
264 1.1 dyoung
265 1.88.2.6 snj /************************************************************************
266 1.88.2.6 snj * NetBSD Device Interface Entry Points
267 1.88.2.6 snj ************************************************************************/
268 1.1 dyoung CFATTACH_DECL3_NEW(ixg, sizeof(struct adapter),
269 1.1 dyoung ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL,
270 1.1 dyoung DVF_DETACH_SHUTDOWN);
271 1.1 dyoung
272 1.1 dyoung #if 0
273 1.44 msaitoh devclass_t ix_devclass;
274 1.44 msaitoh DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0);
275 1.1 dyoung
276 1.44 msaitoh MODULE_DEPEND(ix, pci, 1, 1, 1);
277 1.44 msaitoh MODULE_DEPEND(ix, ether, 1, 1, 1);
278 1.88.2.6 snj #ifdef DEV_NETMAP
279 1.88.2.6 snj MODULE_DEPEND(ix, netmap, 1, 1, 1);
280 1.88.2.6 snj #endif
281 1.1 dyoung #endif
282 1.1 dyoung
283 1.1 dyoung /*
284 1.88.2.6 snj * TUNEABLE PARAMETERS:
285 1.88.2.6 snj */
286 1.1 dyoung
287 1.1 dyoung /*
288 1.88.2.6 snj * AIM: Adaptive Interrupt Moderation
289 1.88.2.6 snj * which means that the interrupt rate
290 1.88.2.6 snj * is varied over time based on the
291 1.88.2.6 snj * traffic for that interrupt vector
292 1.88.2.6 snj */
293 1.73 msaitoh static bool ixgbe_enable_aim = true;
294 1.52 msaitoh #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7)
295 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0,
296 1.52 msaitoh "Enable adaptive interrupt moderation");
297 1.1 dyoung
298 1.22 msaitoh static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
299 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
300 1.52 msaitoh &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
301 1.1 dyoung
302 1.1 dyoung /* How many packets rxeof tries to clean at a time */
303 1.1 dyoung static int ixgbe_rx_process_limit = 256;
304 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
305 1.88.2.6 snj &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited");
306 1.1 dyoung
307 1.28 msaitoh /* How many packets txeof tries to clean at a time */
308 1.28 msaitoh static int ixgbe_tx_process_limit = 256;
309 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN,
310 1.52 msaitoh &ixgbe_tx_process_limit, 0,
311 1.88.2.6 snj "Maximum number of sent packets to process at a time, -1 means unlimited");
312 1.52 msaitoh
313 1.52 msaitoh /* Flow control setting, default to full */
314 1.52 msaitoh static int ixgbe_flow_control = ixgbe_fc_full;
315 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
316 1.52 msaitoh &ixgbe_flow_control, 0, "Default flow control used for all adapters");
317 1.52 msaitoh
318 1.1 dyoung /*
319 1.88.2.6 snj * Smart speed setting, default to on
320 1.88.2.6 snj * this only works as a compile option
321 1.88.2.6 snj * right now as its during attach, set
322 1.88.2.6 snj * this to 'ixgbe_smart_speed_off' to
323 1.88.2.6 snj * disable.
324 1.88.2.6 snj */
325 1.1 dyoung static int ixgbe_smart_speed = ixgbe_smart_speed_on;
326 1.1 dyoung
327 1.1 dyoung /*
328 1.88.2.6 snj * MSI-X should be the default for best performance,
329 1.1 dyoung * but this allows it to be forced off for testing.
330 1.1 dyoung */
331 1.1 dyoung static int ixgbe_enable_msix = 1;
332 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
333 1.52 msaitoh "Enable MSI-X interrupts");
334 1.1 dyoung
335 1.1 dyoung /*
336 1.1 dyoung * Number of Queues, can be set to 0,
337 1.1 dyoung * it then autoconfigures based on the
338 1.1 dyoung * number of cpus with a max of 8. This
339 1.1 dyoung * can be overriden manually here.
340 1.1 dyoung */
341 1.62 msaitoh static int ixgbe_num_queues = 0;
342 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
343 1.52 msaitoh "Number of queues to configure, 0 indicates autoconfigure");
344 1.1 dyoung
345 1.1 dyoung /*
346 1.88.2.6 snj * Number of TX descriptors per ring,
347 1.88.2.6 snj * setting higher than RX as this seems
348 1.88.2.6 snj * the better performing choice.
349 1.88.2.6 snj */
350 1.1 dyoung static int ixgbe_txd = PERFORM_TXD;
351 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0,
352 1.52 msaitoh "Number of transmit descriptors per queue");
353 1.1 dyoung
354 1.1 dyoung /* Number of RX descriptors per ring */
355 1.1 dyoung static int ixgbe_rxd = PERFORM_RXD;
356 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0,
357 1.52 msaitoh "Number of receive descriptors per queue");
358 1.33 msaitoh
359 1.33 msaitoh /*
360 1.88.2.6 snj * Defining this on will allow the use
361 1.88.2.6 snj * of unsupported SFP+ modules, note that
362 1.88.2.6 snj * doing so you are on your own :)
363 1.88.2.6 snj */
364 1.35 msaitoh static int allow_unsupported_sfp = false;
365 1.52 msaitoh #define TUNABLE_INT(__x, __y)
366 1.52 msaitoh TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp);
367 1.1 dyoung
368 1.88.2.6 snj /*
369 1.88.2.6 snj * Not sure if Flow Director is fully baked,
370 1.88.2.6 snj * so we'll default to turning it off.
371 1.88.2.6 snj */
372 1.88.2.6 snj static int ixgbe_enable_fdir = 0;
373 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0,
374 1.88.2.6 snj "Enable Flow Director");
375 1.88.2.6 snj
376 1.88.2.6 snj /* Legacy Transmit (single queue) */
377 1.88.2.6 snj static int ixgbe_enable_legacy_tx = 0;
378 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN,
379 1.88.2.6 snj &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow");
380 1.88.2.6 snj
381 1.88.2.6 snj /* Receive-Side Scaling */
382 1.88.2.6 snj static int ixgbe_enable_rss = 1;
383 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0,
384 1.88.2.6 snj "Enable Receive-Side Scaling (RSS)");
385 1.88.2.6 snj
386 1.1 dyoung /* Keep running tab on them for sanity check */
387 1.1 dyoung static int ixgbe_total_ports;
388 1.1 dyoung
389 1.88.2.6 snj #if 0
390 1.88.2.6 snj static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *);
391 1.88.2.6 snj static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *);
392 1.1 dyoung #endif
393 1.1 dyoung
394 1.80 msaitoh #ifdef NET_MPSAFE
395 1.80 msaitoh #define IXGBE_MPSAFE 1
396 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE
397 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS SOFTINT_MPSAFE
398 1.80 msaitoh #else
399 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS 0
400 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS 0
401 1.80 msaitoh #endif
402 1.80 msaitoh
403 1.88.2.6 snj /************************************************************************
404 1.88.2.6 snj * ixgbe_initialize_rss_mapping
405 1.88.2.6 snj ************************************************************************/
406 1.88.2.6 snj static void
407 1.88.2.6 snj ixgbe_initialize_rss_mapping(struct adapter *adapter)
408 1.1 dyoung {
409 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
410 1.88.2.6 snj u32 reta = 0, mrqc, rss_key[10];
411 1.88.2.6 snj int queue_id, table_size, index_mult;
412 1.88.2.6 snj int i, j;
413 1.88.2.6 snj u32 rss_hash_config;
414 1.88.2.6 snj
415 1.88.2.9 snj /* force use default RSS key. */
416 1.88.2.9 snj #ifdef __NetBSD__
417 1.88.2.9 snj rss_getkey((uint8_t *) &rss_key);
418 1.88.2.9 snj #else
419 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
420 1.88.2.6 snj /* Fetch the configured RSS key */
421 1.88.2.6 snj rss_getkey((uint8_t *) &rss_key);
422 1.88.2.6 snj } else {
423 1.88.2.6 snj /* set up random bits */
424 1.88.2.6 snj cprng_fast(&rss_key, sizeof(rss_key));
425 1.88.2.6 snj }
426 1.88.2.9 snj #endif
427 1.1 dyoung
428 1.88.2.6 snj /* Set multiplier for RETA setup and table size based on MAC */
429 1.88.2.6 snj index_mult = 0x1;
430 1.88.2.6 snj table_size = 128;
431 1.88.2.6 snj switch (adapter->hw.mac.type) {
432 1.88.2.6 snj case ixgbe_mac_82598EB:
433 1.88.2.6 snj index_mult = 0x11;
434 1.88.2.6 snj break;
435 1.88.2.6 snj case ixgbe_mac_X550:
436 1.88.2.6 snj case ixgbe_mac_X550EM_x:
437 1.88.2.6 snj case ixgbe_mac_X550EM_a:
438 1.88.2.6 snj table_size = 512;
439 1.88.2.6 snj break;
440 1.88.2.6 snj default:
441 1.88.2.6 snj break;
442 1.88.2.6 snj }
443 1.1 dyoung
444 1.88.2.6 snj /* Set up the redirection table */
445 1.88.2.6 snj for (i = 0, j = 0; i < table_size; i++, j++) {
446 1.88.2.6 snj if (j == adapter->num_queues)
447 1.88.2.6 snj j = 0;
448 1.1 dyoung
449 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
450 1.88.2.6 snj /*
451 1.88.2.6 snj * Fetch the RSS bucket id for the given indirection
452 1.88.2.6 snj * entry. Cap it at the number of configured buckets
453 1.88.2.6 snj * (which is num_queues.)
454 1.88.2.6 snj */
455 1.88.2.6 snj queue_id = rss_get_indirection_to_bucket(i);
456 1.88.2.6 snj queue_id = queue_id % adapter->num_queues;
457 1.88.2.6 snj } else
458 1.88.2.6 snj queue_id = (j * index_mult);
459 1.1 dyoung
460 1.88.2.6 snj /*
461 1.88.2.6 snj * The low 8 bits are for hash value (n+0);
462 1.88.2.6 snj * The next 8 bits are for hash value (n+1), etc.
463 1.88.2.6 snj */
464 1.88.2.6 snj reta = reta >> 8;
465 1.88.2.6 snj reta = reta | (((uint32_t) queue_id) << 24);
466 1.88.2.6 snj if ((i & 3) == 3) {
467 1.88.2.6 snj if (i < 128)
468 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
469 1.88.2.6 snj else
470 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
471 1.88.2.6 snj reta);
472 1.88.2.6 snj reta = 0;
473 1.88.2.6 snj }
474 1.88.2.6 snj }
475 1.1 dyoung
476 1.88.2.6 snj /* Now fill our hash function seeds */
477 1.88.2.6 snj for (i = 0; i < 10; i++)
478 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
479 1.1 dyoung
480 1.88.2.6 snj /* Perform hash on these packet types */
481 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
482 1.88.2.6 snj rss_hash_config = rss_gethashconfig();
483 1.88.2.6 snj else {
484 1.88.2.6 snj /*
485 1.88.2.6 snj * Disable UDP - IP fragments aren't currently being handled
486 1.88.2.6 snj * and so we end up with a mix of 2-tuple and 4-tuple
487 1.88.2.6 snj * traffic.
488 1.88.2.6 snj */
489 1.88.2.6 snj rss_hash_config = RSS_HASHTYPE_RSS_IPV4
490 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV4
491 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6
492 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6
493 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6_EX
494 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6_EX;
495 1.1 dyoung }
496 1.1 dyoung
497 1.88.2.6 snj mrqc = IXGBE_MRQC_RSSEN;
498 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
499 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4;
500 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
501 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
502 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
503 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6;
504 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
505 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
506 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
507 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX;
508 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
509 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP;
510 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
511 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
512 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
513 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
514 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
515 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
516 1.88.2.6 snj mrqc |= ixgbe_get_mrqc(adapter->iov_mode);
517 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
518 1.88.2.6 snj } /* ixgbe_initialize_rss_mapping */
519 1.1 dyoung
520 1.88.2.6 snj /************************************************************************
521 1.88.2.6 snj * ixgbe_initialize_receive_units - Setup receive registers and features.
522 1.88.2.6 snj ************************************************************************/
523 1.88.2.6 snj #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1)
524 1.88.2.6 snj
525 1.1 dyoung static void
526 1.88.2.6 snj ixgbe_initialize_receive_units(struct adapter *adapter)
527 1.1 dyoung {
528 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
529 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
530 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
531 1.88.2.6 snj int i, j;
532 1.88.2.6 snj u32 bufsz, fctrl, srrctl, rxcsum;
533 1.88.2.6 snj u32 hlreg;
534 1.1 dyoung
535 1.88.2.6 snj /*
536 1.88.2.6 snj * Make sure receives are disabled while
537 1.88.2.6 snj * setting up the descriptor ring
538 1.88.2.6 snj */
539 1.88.2.6 snj ixgbe_disable_rx(hw);
540 1.1 dyoung
541 1.88.2.6 snj /* Enable broadcasts */
542 1.88.2.6 snj fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
543 1.88.2.6 snj fctrl |= IXGBE_FCTRL_BAM;
544 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
545 1.88.2.6 snj fctrl |= IXGBE_FCTRL_DPF;
546 1.88.2.6 snj fctrl |= IXGBE_FCTRL_PMCF;
547 1.88.2.6 snj }
548 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
549 1.1 dyoung
550 1.88.2.6 snj /* Set for Jumbo Frames? */
551 1.88.2.6 snj hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);
552 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU)
553 1.88.2.6 snj hlreg |= IXGBE_HLREG0_JUMBOEN;
554 1.88.2.6 snj else
555 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_JUMBOEN;
556 1.1 dyoung
557 1.47 msaitoh #ifdef DEV_NETMAP
558 1.88.2.6 snj /* CRC stripping is conditional in Netmap */
559 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
560 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP) &&
561 1.88.2.6 snj !ix_crcstrip)
562 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_RXCRCSTRP;
563 1.88.2.6 snj else
564 1.88.2.6 snj #endif /* DEV_NETMAP */
565 1.88.2.6 snj hlreg |= IXGBE_HLREG0_RXCRCSTRP;
566 1.47 msaitoh
567 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
568 1.1 dyoung
569 1.88.2.6 snj bufsz = (adapter->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >>
570 1.88.2.6 snj IXGBE_SRRCTL_BSIZEPKT_SHIFT;
571 1.1 dyoung
572 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++, rxr++) {
573 1.88.2.6 snj u64 rdba = rxr->rxdma.dma_paddr;
574 1.88.2.6 snj u32 tqsmreg, reg;
575 1.88.2.6 snj int regnum = i / 4; /* 1 register per 4 queues */
576 1.88.2.6 snj int regshift = i % 4; /* 4 bits per 1 queue */
577 1.88.2.6 snj j = rxr->me;
578 1.1 dyoung
579 1.88.2.6 snj /* Setup the Base and Length of the Rx Descriptor Ring */
580 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
581 1.88.2.6 snj (rdba & 0x00000000ffffffffULL));
582 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
583 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
584 1.88.2.6 snj adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc));
585 1.79 msaitoh
586 1.88.2.6 snj /* Set up the SRRCTL register */
587 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));
588 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
589 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
590 1.88.2.6 snj srrctl |= bufsz;
591 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
592 1.1 dyoung
593 1.88.2.6 snj /* Set RQSMR (Receive Queue Statistic Mapping) register */
594 1.88.2.6 snj reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum));
595 1.88.2.6 snj reg &= ~(0x000000ff << (regshift * 8));
596 1.88.2.6 snj reg |= i << (regshift * 8);
597 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg);
598 1.47 msaitoh
599 1.88.2.6 snj /*
600 1.88.2.6 snj * Set RQSMR (Receive Queue Statistic Mapping) register.
601 1.88.2.6 snj * Register location for queue 0...7 are different between
602 1.88.2.6 snj * 82598 and newer.
603 1.88.2.6 snj */
604 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB)
605 1.88.2.6 snj tqsmreg = IXGBE_TQSMR(regnum);
606 1.88.2.6 snj else
607 1.88.2.6 snj tqsmreg = IXGBE_TQSM(regnum);
608 1.88.2.6 snj reg = IXGBE_READ_REG(hw, tqsmreg);
609 1.88.2.6 snj reg &= ~(0x000000ff << (regshift * 8));
610 1.88.2.6 snj reg |= i << (regshift * 8);
611 1.88.2.6 snj IXGBE_WRITE_REG(hw, tqsmreg, reg);
612 1.47 msaitoh
613 1.88.2.6 snj /*
614 1.88.2.6 snj * Set DROP_EN iff we have no flow control and >1 queue.
615 1.88.2.6 snj * Note that srrctl was cleared shortly before during reset,
616 1.88.2.6 snj * so we do not need to clear the bit, but do it just in case
617 1.88.2.6 snj * this code is moved elsewhere.
618 1.88.2.6 snj */
619 1.88.2.6 snj if (adapter->num_queues > 1 &&
620 1.88.2.6 snj adapter->hw.fc.requested_mode == ixgbe_fc_none) {
621 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
622 1.88.2.6 snj } else {
623 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
624 1.88.2.6 snj }
625 1.88.2.6 snj
626 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);
627 1.88.2.6 snj
628 1.88.2.6 snj /* Setup the HW Rx Head and Tail Descriptor Pointers */
629 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
630 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
631 1.88.2.6 snj
632 1.88.2.6 snj /* Set the driver rx tail address */
633 1.88.2.6 snj rxr->tail = IXGBE_RDT(rxr->me);
634 1.88.2.6 snj }
635 1.88.2.6 snj
636 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
637 1.88.2.6 snj u32 psrtype = IXGBE_PSRTYPE_TCPHDR
638 1.88.2.6 snj | IXGBE_PSRTYPE_UDPHDR
639 1.88.2.6 snj | IXGBE_PSRTYPE_IPV4HDR
640 1.88.2.6 snj | IXGBE_PSRTYPE_IPV6HDR;
641 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
642 1.88.2.6 snj }
643 1.88.2.6 snj
644 1.88.2.6 snj rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
645 1.88.2.6 snj
646 1.88.2.6 snj ixgbe_initialize_rss_mapping(adapter);
647 1.88.2.6 snj
648 1.88.2.6 snj if (adapter->num_queues > 1) {
649 1.88.2.6 snj /* RSS and RX IPP Checksum are mutually exclusive */
650 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
651 1.88.2.6 snj }
652 1.88.2.6 snj
653 1.88.2.6 snj if (ifp->if_capenable & IFCAP_RXCSUM)
654 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
655 1.88.2.6 snj
656 1.88.2.6 snj /* This is useful for calculating UDP/IP fragment checksums */
657 1.88.2.6 snj if (!(rxcsum & IXGBE_RXCSUM_PCSD))
658 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_IPPCSE;
659 1.88.2.6 snj
660 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
661 1.88.2.6 snj
662 1.88.2.6 snj return;
663 1.88.2.6 snj } /* ixgbe_initialize_receive_units */
664 1.88.2.6 snj
665 1.88.2.6 snj /************************************************************************
666 1.88.2.6 snj * ixgbe_initialize_transmit_units - Enable transmit units.
667 1.88.2.6 snj ************************************************************************/
668 1.88.2.6 snj static void
669 1.88.2.6 snj ixgbe_initialize_transmit_units(struct adapter *adapter)
670 1.88.2.6 snj {
671 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
672 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
673 1.88.2.6 snj
674 1.88.2.6 snj /* Setup the Base and Length of the Tx Descriptor Ring */
675 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, txr++) {
676 1.88.2.6 snj u64 tdba = txr->txdma.dma_paddr;
677 1.88.2.6 snj u32 txctrl = 0;
678 1.88.2.6 snj int j = txr->me;
679 1.88.2.6 snj
680 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
681 1.88.2.6 snj (tdba & 0x00000000ffffffffULL));
682 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
683 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),
684 1.88.2.6 snj adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc));
685 1.88.2.6 snj
686 1.88.2.6 snj /* Setup the HW Tx Head and Tail descriptor pointers */
687 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
688 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
689 1.88.2.6 snj
690 1.88.2.6 snj /* Cache the tail address */
691 1.88.2.6 snj txr->tail = IXGBE_TDT(j);
692 1.88.2.6 snj
693 1.88.2.6 snj /* Disable Head Writeback */
694 1.88.2.6 snj /*
695 1.88.2.6 snj * Note: for X550 series devices, these registers are actually
696 1.88.2.6 snj * prefixed with TPH_ isntead of DCA_, but the addresses and
697 1.88.2.6 snj * fields remain the same.
698 1.88.2.6 snj */
699 1.88.2.6 snj switch (hw->mac.type) {
700 1.88.2.6 snj case ixgbe_mac_82598EB:
701 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
702 1.88.2.6 snj break;
703 1.88.2.6 snj default:
704 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
705 1.88.2.6 snj break;
706 1.88.2.6 snj }
707 1.88.2.6 snj txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
708 1.88.2.6 snj switch (hw->mac.type) {
709 1.88.2.6 snj case ixgbe_mac_82598EB:
710 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
711 1.88.2.6 snj break;
712 1.88.2.6 snj default:
713 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
714 1.88.2.6 snj break;
715 1.88.2.6 snj }
716 1.88.2.6 snj
717 1.88.2.6 snj }
718 1.88.2.6 snj
719 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
720 1.88.2.6 snj u32 dmatxctl, rttdcs;
721 1.88.2.6 snj
722 1.88.2.6 snj dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
723 1.88.2.6 snj dmatxctl |= IXGBE_DMATXCTL_TE;
724 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
725 1.88.2.6 snj /* Disable arbiter to set MTQC */
726 1.88.2.6 snj rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
727 1.88.2.6 snj rttdcs |= IXGBE_RTTDCS_ARBDIS;
728 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
729 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MTQC,
730 1.88.2.6 snj ixgbe_get_mtqc(adapter->iov_mode));
731 1.88.2.6 snj rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
732 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
733 1.88.2.6 snj }
734 1.88.2.6 snj
735 1.88.2.6 snj return;
736 1.88.2.6 snj } /* ixgbe_initialize_transmit_units */
737 1.88.2.6 snj
738 1.88.2.6 snj /************************************************************************
739 1.88.2.6 snj * ixgbe_attach - Device initialization routine
740 1.88.2.6 snj *
741 1.88.2.6 snj * Called when the driver is being loaded.
742 1.88.2.6 snj * Identifies the type of hardware, allocates all resources
743 1.88.2.6 snj * and initializes the hardware.
744 1.88.2.6 snj *
745 1.88.2.6 snj * return 0 on success, positive on failure
746 1.88.2.6 snj ************************************************************************/
747 1.88.2.6 snj static void
748 1.88.2.6 snj ixgbe_attach(device_t parent, device_t dev, void *aux)
749 1.88.2.6 snj {
750 1.88.2.6 snj struct adapter *adapter;
751 1.88.2.6 snj struct ixgbe_hw *hw;
752 1.88.2.6 snj int error = -1;
753 1.88.2.6 snj u32 ctrl_ext;
754 1.88.2.6 snj u16 high, low, nvmreg;
755 1.88.2.6 snj pcireg_t id, subid;
756 1.88.2.6 snj ixgbe_vendor_info_t *ent;
757 1.88.2.6 snj struct pci_attach_args *pa = aux;
758 1.88.2.6 snj const char *str;
759 1.88.2.6 snj char buf[256];
760 1.88.2.6 snj
761 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_attach: begin");
762 1.88.2.6 snj
763 1.88.2.6 snj /* Allocate, clear, and link in our adapter structure */
764 1.88.2.6 snj adapter = device_private(dev);
765 1.88.2.6 snj adapter->hw.back = adapter;
766 1.88.2.6 snj adapter->dev = dev;
767 1.88.2.6 snj hw = &adapter->hw;
768 1.88.2.6 snj adapter->osdep.pc = pa->pa_pc;
769 1.88.2.6 snj adapter->osdep.tag = pa->pa_tag;
770 1.88.2.6 snj if (pci_dma64_available(pa))
771 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat64;
772 1.88.2.6 snj else
773 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat;
774 1.88.2.6 snj adapter->osdep.attached = false;
775 1.88.2.6 snj
776 1.88.2.6 snj ent = ixgbe_lookup(pa);
777 1.88.2.6 snj
778 1.88.2.6 snj KASSERT(ent != NULL);
779 1.88.2.6 snj
780 1.88.2.6 snj aprint_normal(": %s, Version - %s\n",
781 1.88.2.6 snj ixgbe_strings[ent->index], ixgbe_driver_version);
782 1.88.2.6 snj
783 1.88.2.6 snj /* Core Lock Init*/
784 1.88.2.6 snj IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
785 1.88.2.6 snj
786 1.88.2.6 snj /* Set up the timer callout */
787 1.88.2.6 snj callout_init(&adapter->timer, IXGBE_CALLOUT_FLAGS);
788 1.88.2.6 snj
789 1.88.2.6 snj /* Determine hardware revision */
790 1.88.2.6 snj id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
791 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
792 1.88.2.6 snj
793 1.88.2.6 snj hw->vendor_id = PCI_VENDOR(id);
794 1.88.2.6 snj hw->device_id = PCI_PRODUCT(id);
795 1.88.2.6 snj hw->revision_id =
796 1.88.2.6 snj PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
797 1.88.2.6 snj hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid);
798 1.88.2.6 snj hw->subsystem_device_id = PCI_SUBSYS_ID(subid);
799 1.88.2.6 snj
800 1.88.2.6 snj /*
801 1.88.2.6 snj * Make sure BUSMASTER is set
802 1.88.2.6 snj */
803 1.88.2.6 snj ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag);
804 1.88.2.6 snj
805 1.88.2.6 snj /* Do base PCI setup - map BAR0 */
806 1.88.2.6 snj if (ixgbe_allocate_pci_resources(adapter, pa)) {
807 1.88.2.6 snj aprint_error_dev(dev, "Allocation of PCI resources failed\n");
808 1.88.2.6 snj error = ENXIO;
809 1.88.2.6 snj goto err_out;
810 1.88.2.6 snj }
811 1.88.2.6 snj
812 1.88.2.6 snj /* let hardware know driver is loaded */
813 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
814 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD;
815 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
816 1.88.2.6 snj
817 1.88.2.6 snj /*
818 1.88.2.6 snj * Initialize the shared code
819 1.88.2.6 snj */
820 1.88.2.6 snj if (ixgbe_init_shared_code(hw)) {
821 1.88.2.6 snj aprint_error_dev(dev, "Unable to initialize the shared code\n");
822 1.88.2.6 snj error = ENXIO;
823 1.88.2.6 snj goto err_out;
824 1.88.2.6 snj }
825 1.88.2.6 snj
826 1.88.2.6 snj switch (hw->mac.type) {
827 1.88.2.6 snj case ixgbe_mac_82598EB:
828 1.88.2.6 snj str = "82598EB";
829 1.88.2.6 snj break;
830 1.88.2.6 snj case ixgbe_mac_82599EB:
831 1.88.2.6 snj str = "82599EB";
832 1.88.2.6 snj break;
833 1.88.2.6 snj case ixgbe_mac_X540:
834 1.88.2.6 snj str = "X540";
835 1.88.2.6 snj break;
836 1.88.2.6 snj case ixgbe_mac_X550:
837 1.88.2.6 snj str = "X550";
838 1.88.2.6 snj break;
839 1.88.2.6 snj case ixgbe_mac_X550EM_x:
840 1.88.2.6 snj str = "X550EM";
841 1.88.2.6 snj break;
842 1.88.2.6 snj case ixgbe_mac_X550EM_a:
843 1.88.2.6 snj str = "X550EM A";
844 1.88.2.6 snj break;
845 1.88.2.6 snj default:
846 1.88.2.6 snj str = "Unknown";
847 1.88.2.6 snj break;
848 1.88.2.6 snj }
849 1.88.2.6 snj aprint_normal_dev(dev, "device %s\n", str);
850 1.88.2.6 snj
851 1.88.2.6 snj if (hw->mbx.ops.init_params)
852 1.88.2.6 snj hw->mbx.ops.init_params(hw);
853 1.88.2.6 snj
854 1.88.2.6 snj hw->allow_unsupported_sfp = allow_unsupported_sfp;
855 1.88.2.6 snj
856 1.88.2.6 snj /* Pick up the 82599 settings */
857 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
858 1.88.2.6 snj hw->phy.smart_speed = ixgbe_smart_speed;
859 1.88.2.6 snj adapter->num_segs = IXGBE_82599_SCATTER;
860 1.88.2.6 snj } else
861 1.88.2.6 snj adapter->num_segs = IXGBE_82598_SCATTER;
862 1.88.2.6 snj
863 1.88.2.6 snj hw->mac.ops.set_lan_id(hw);
864 1.88.2.6 snj ixgbe_init_device_features(adapter);
865 1.88.2.6 snj
866 1.88.2.6 snj if (ixgbe_configure_interrupts(adapter)) {
867 1.88.2.6 snj error = ENXIO;
868 1.88.2.6 snj goto err_out;
869 1.88.2.6 snj }
870 1.88.2.6 snj
871 1.88.2.6 snj /* Allocate multicast array memory. */
872 1.88.2.6 snj adapter->mta = malloc(sizeof(*adapter->mta) *
873 1.88.2.6 snj MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT);
874 1.88.2.6 snj if (adapter->mta == NULL) {
875 1.88.2.6 snj aprint_error_dev(dev, "Cannot allocate multicast setup array\n");
876 1.88.2.6 snj error = ENOMEM;
877 1.88.2.6 snj goto err_out;
878 1.88.2.6 snj }
879 1.88.2.6 snj
880 1.88.2.6 snj /* Enable WoL (if supported) */
881 1.88.2.6 snj ixgbe_check_wol_support(adapter);
882 1.88.2.6 snj
883 1.88.2.6 snj /* Verify adapter fan is still functional (if applicable) */
884 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
885 1.88.2.6 snj u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
886 1.88.2.6 snj ixgbe_check_fan_failure(adapter, esdp, FALSE);
887 1.88.2.6 snj }
888 1.88.2.6 snj
889 1.88.2.6 snj /* Ensure SW/FW semaphore is free */
890 1.88.2.6 snj ixgbe_init_swfw_semaphore(hw);
891 1.88.2.6 snj
892 1.88.2.6 snj /* Enable EEE power saving */
893 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_EEE)
894 1.88.2.6 snj hw->mac.ops.setup_eee(hw, TRUE);
895 1.88.2.6 snj
896 1.88.2.6 snj /* Set an initial default flow control value */
897 1.88.2.6 snj hw->fc.requested_mode = ixgbe_flow_control;
898 1.88.2.6 snj
899 1.88.2.6 snj /* Sysctls for limiting the amount of work done in the taskqueues */
900 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "rx_processing_limit",
901 1.88.2.6 snj "max number of rx packets to process",
902 1.88.2.6 snj &adapter->rx_process_limit, ixgbe_rx_process_limit);
903 1.88.2.6 snj
904 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "tx_processing_limit",
905 1.88.2.6 snj "max number of tx packets to process",
906 1.88.2.6 snj &adapter->tx_process_limit, ixgbe_tx_process_limit);
907 1.88.2.6 snj
908 1.88.2.6 snj /* Do descriptor calc and sanity checks */
909 1.1 dyoung if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 ||
910 1.1 dyoung ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) {
911 1.1 dyoung aprint_error_dev(dev, "TXD config issue, using default!\n");
912 1.1 dyoung adapter->num_tx_desc = DEFAULT_TXD;
913 1.1 dyoung } else
914 1.1 dyoung adapter->num_tx_desc = ixgbe_txd;
915 1.1 dyoung
916 1.1 dyoung /*
917 1.88.2.6 snj * With many RX rings it is easy to exceed the
918 1.88.2.6 snj * system mbuf allocation. Tuning nmbclusters
919 1.88.2.6 snj * can alleviate this.
920 1.88.2.6 snj */
921 1.43 msaitoh if (nmbclusters > 0) {
922 1.1 dyoung int s;
923 1.1 dyoung s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports;
924 1.1 dyoung if (s > nmbclusters) {
925 1.1 dyoung aprint_error_dev(dev, "RX Descriptors exceed "
926 1.1 dyoung "system mbuf max, using default instead!\n");
927 1.1 dyoung ixgbe_rxd = DEFAULT_RXD;
928 1.1 dyoung }
929 1.1 dyoung }
930 1.1 dyoung
931 1.1 dyoung if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 ||
932 1.33 msaitoh ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) {
933 1.1 dyoung aprint_error_dev(dev, "RXD config issue, using default!\n");
934 1.1 dyoung adapter->num_rx_desc = DEFAULT_RXD;
935 1.1 dyoung } else
936 1.1 dyoung adapter->num_rx_desc = ixgbe_rxd;
937 1.1 dyoung
938 1.1 dyoung /* Allocate our TX/RX Queues */
939 1.1 dyoung if (ixgbe_allocate_queues(adapter)) {
940 1.1 dyoung error = ENOMEM;
941 1.1 dyoung goto err_out;
942 1.1 dyoung }
943 1.1 dyoung
944 1.88.2.6 snj hw->phy.reset_if_overtemp = TRUE;
945 1.88.2.6 snj error = ixgbe_reset_hw(hw);
946 1.88.2.6 snj hw->phy.reset_if_overtemp = FALSE;
947 1.1 dyoung if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
948 1.1 dyoung /*
949 1.88.2.6 snj * No optics in this port, set up
950 1.88.2.6 snj * so the timer routine will probe
951 1.88.2.6 snj * for later insertion.
952 1.88.2.6 snj */
953 1.1 dyoung adapter->sfp_probe = TRUE;
954 1.88.2.6 snj error = IXGBE_SUCCESS;
955 1.35 msaitoh } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
956 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ module detected!\n");
957 1.1 dyoung error = EIO;
958 1.1 dyoung goto err_late;
959 1.1 dyoung } else if (error) {
960 1.88.2.6 snj aprint_error_dev(dev, "Hardware initialization failed\n");
961 1.1 dyoung error = EIO;
962 1.1 dyoung goto err_late;
963 1.1 dyoung }
964 1.1 dyoung
965 1.1 dyoung /* Make sure we have a good EEPROM before we read from it */
966 1.88.2.6 snj if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL) < 0) {
967 1.48 msaitoh aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n");
968 1.1 dyoung error = EIO;
969 1.1 dyoung goto err_late;
970 1.1 dyoung }
971 1.1 dyoung
972 1.88 msaitoh aprint_normal("%s:", device_xname(dev));
973 1.88 msaitoh /* NVM Image Version */
974 1.88 msaitoh switch (hw->mac.type) {
975 1.88 msaitoh case ixgbe_mac_X540:
976 1.88.2.6 snj case ixgbe_mac_X550EM_a:
977 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
978 1.88 msaitoh if (nvmreg == 0xffff)
979 1.88 msaitoh break;
980 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
981 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
982 1.88 msaitoh id = nvmreg & 0x0f;
983 1.88.2.6 snj aprint_normal(" NVM Image Version %u.", high);
984 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
985 1.88.2.6 snj str = "%x";
986 1.88.2.6 snj else
987 1.88.2.6 snj str = "%02x";
988 1.88.2.6 snj aprint_normal(str, low);
989 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
990 1.88 msaitoh break;
991 1.88 msaitoh case ixgbe_mac_X550EM_x:
992 1.88 msaitoh case ixgbe_mac_X550:
993 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
994 1.88 msaitoh if (nvmreg == 0xffff)
995 1.88 msaitoh break;
996 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
997 1.88 msaitoh low = nvmreg & 0xff;
998 1.88.2.6 snj aprint_normal(" NVM Image Version %u.%02x,", high, low);
999 1.88 msaitoh break;
1000 1.88 msaitoh default:
1001 1.88 msaitoh break;
1002 1.88 msaitoh }
1003 1.88 msaitoh
1004 1.88 msaitoh /* PHY firmware revision */
1005 1.88 msaitoh switch (hw->mac.type) {
1006 1.88 msaitoh case ixgbe_mac_X540:
1007 1.88 msaitoh case ixgbe_mac_X550:
1008 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg);
1009 1.88 msaitoh if (nvmreg == 0xffff)
1010 1.88 msaitoh break;
1011 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1012 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
1013 1.88 msaitoh id = nvmreg & 0x000f;
1014 1.88.2.6 snj aprint_normal(" PHY FW Revision %u.", high);
1015 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
1016 1.88.2.6 snj str = "%x";
1017 1.88.2.6 snj else
1018 1.88.2.6 snj str = "%02x";
1019 1.88.2.6 snj aprint_normal(str, low);
1020 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
1021 1.88 msaitoh break;
1022 1.88 msaitoh default:
1023 1.88 msaitoh break;
1024 1.88 msaitoh }
1025 1.88 msaitoh
1026 1.88 msaitoh /* NVM Map version & OEM NVM Image version */
1027 1.88 msaitoh switch (hw->mac.type) {
1028 1.88 msaitoh case ixgbe_mac_X550:
1029 1.88 msaitoh case ixgbe_mac_X550EM_x:
1030 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1031 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg);
1032 1.88 msaitoh if (nvmreg != 0xffff) {
1033 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1034 1.88 msaitoh low = nvmreg & 0x00ff;
1035 1.88 msaitoh aprint_normal(" NVM Map version %u.%02x,", high, low);
1036 1.88 msaitoh }
1037 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg);
1038 1.88.2.6 snj if (nvmreg != 0xffff) {
1039 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1040 1.88 msaitoh low = nvmreg & 0x00ff;
1041 1.88 msaitoh aprint_verbose(" OEM NVM Image version %u.%02x,", high,
1042 1.88 msaitoh low);
1043 1.88 msaitoh }
1044 1.88 msaitoh break;
1045 1.88 msaitoh default:
1046 1.88 msaitoh break;
1047 1.88 msaitoh }
1048 1.88 msaitoh
1049 1.88 msaitoh /* Print the ETrackID */
1050 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high);
1051 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low);
1052 1.88 msaitoh aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low);
1053 1.79 msaitoh
1054 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
1055 1.88.2.6 snj error = ixgbe_allocate_msix(adapter, pa);
1056 1.88.2.8 snj if (error) {
1057 1.88.2.8 snj /* Free allocated queue structures first */
1058 1.88.2.8 snj ixgbe_free_transmit_structures(adapter);
1059 1.88.2.8 snj ixgbe_free_receive_structures(adapter);
1060 1.88.2.8 snj free(adapter->queues, M_DEVBUF);
1061 1.88.2.8 snj
1062 1.88.2.8 snj /* Fallback to legacy interrupt */
1063 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSIX;
1064 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_MSI)
1065 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
1066 1.88.2.8 snj adapter->num_queues = 1;
1067 1.88.2.8 snj
1068 1.88.2.8 snj /* Allocate our TX/RX Queues again */
1069 1.88.2.8 snj if (ixgbe_allocate_queues(adapter)) {
1070 1.88.2.8 snj error = ENOMEM;
1071 1.88.2.8 snj goto err_out;
1072 1.88.2.8 snj }
1073 1.88.2.8 snj }
1074 1.88.2.8 snj }
1075 1.88.2.8 snj if ((adapter->feat_en & IXGBE_FEATURE_MSIX) == 0)
1076 1.88.2.6 snj error = ixgbe_allocate_legacy(adapter, pa);
1077 1.88.2.6 snj if (error)
1078 1.88.2.6 snj goto err_late;
1079 1.88.2.6 snj
1080 1.88.2.8 snj /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */
1081 1.88.2.8 snj adapter->link_si = softint_establish(SOFTINT_NET |IXGBE_SOFTINFT_FLAGS,
1082 1.88.2.8 snj ixgbe_handle_link, adapter);
1083 1.88.2.8 snj adapter->mod_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1084 1.88.2.8 snj ixgbe_handle_mod, adapter);
1085 1.88.2.8 snj adapter->msf_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1086 1.88.2.8 snj ixgbe_handle_msf, adapter);
1087 1.88.2.8 snj adapter->phy_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1088 1.88.2.8 snj ixgbe_handle_phy, adapter);
1089 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
1090 1.88.2.8 snj adapter->fdir_si =
1091 1.88.2.8 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1092 1.88.2.8 snj ixgbe_reinit_fdir, adapter);
1093 1.88.2.8 snj if ((adapter->link_si == NULL) || (adapter->mod_si == NULL)
1094 1.88.2.8 snj || (adapter->msf_si == NULL) || (adapter->phy_si == NULL)
1095 1.88.2.8 snj || ((adapter->feat_en & IXGBE_FEATURE_FDIR)
1096 1.88.2.8 snj && (adapter->fdir_si == NULL))) {
1097 1.88.2.8 snj aprint_error_dev(dev,
1098 1.88.2.8 snj "could not establish software interrupts ()\n");
1099 1.88.2.8 snj goto err_out;
1100 1.88.2.8 snj }
1101 1.88.2.8 snj
1102 1.88.2.6 snj error = ixgbe_start_hw(hw);
1103 1.25 msaitoh switch (error) {
1104 1.25 msaitoh case IXGBE_ERR_EEPROM_VERSION:
1105 1.1 dyoung aprint_error_dev(dev, "This device is a pre-production adapter/"
1106 1.1 dyoung "LOM. Please be aware there may be issues associated "
1107 1.48 msaitoh "with your hardware.\nIf you are experiencing problems "
1108 1.1 dyoung "please contact your Intel or hardware representative "
1109 1.1 dyoung "who provided you with this hardware.\n");
1110 1.25 msaitoh break;
1111 1.25 msaitoh case IXGBE_ERR_SFP_NOT_SUPPORTED:
1112 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ Module\n");
1113 1.1 dyoung error = EIO;
1114 1.1 dyoung goto err_late;
1115 1.25 msaitoh case IXGBE_ERR_SFP_NOT_PRESENT:
1116 1.48 msaitoh aprint_error_dev(dev, "No SFP+ Module found\n");
1117 1.25 msaitoh /* falls thru */
1118 1.25 msaitoh default:
1119 1.25 msaitoh break;
1120 1.1 dyoung }
1121 1.1 dyoung
1122 1.88.2.8 snj /* Setup OS specific network interface */
1123 1.88.2.8 snj if (ixgbe_setup_interface(dev, adapter) != 0)
1124 1.88.2.8 snj goto err_late;
1125 1.88.2.8 snj
1126 1.88.2.6 snj /*
1127 1.88.2.6 snj * Print PHY ID only for copper PHY. On device which has SFP(+) cage
1128 1.88.2.6 snj * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID.
1129 1.88.2.6 snj */
1130 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_copper) {
1131 1.88.2.2 snj uint16_t id1, id2;
1132 1.88.2.2 snj int oui, model, rev;
1133 1.88.2.2 snj const char *descr;
1134 1.88.2.2 snj
1135 1.88.2.2 snj id1 = hw->phy.id >> 16;
1136 1.88.2.2 snj id2 = hw->phy.id & 0xffff;
1137 1.88.2.2 snj oui = MII_OUI(id1, id2);
1138 1.88.2.2 snj model = MII_MODEL(id2);
1139 1.88.2.2 snj rev = MII_REV(id2);
1140 1.88.2.2 snj if ((descr = mii_get_descr(oui, model)) != NULL)
1141 1.88.2.2 snj aprint_normal_dev(dev,
1142 1.88.2.2 snj "PHY: %s (OUI 0x%06x, model 0x%04x), rev. %d\n",
1143 1.88.2.2 snj descr, oui, model, rev);
1144 1.88.2.2 snj else
1145 1.88.2.2 snj aprint_normal_dev(dev,
1146 1.88.2.2 snj "PHY OUI 0x%06x, model 0x%04x, rev. %d\n",
1147 1.88.2.2 snj oui, model, rev);
1148 1.88.2.2 snj }
1149 1.88.2.2 snj
1150 1.52 msaitoh /* Enable the optics for 82599 SFP+ fiber */
1151 1.52 msaitoh ixgbe_enable_tx_laser(hw);
1152 1.52 msaitoh
1153 1.52 msaitoh /* Enable power to the phy. */
1154 1.52 msaitoh ixgbe_set_phy_power(hw, TRUE);
1155 1.52 msaitoh
1156 1.1 dyoung /* Initialize statistics */
1157 1.1 dyoung ixgbe_update_stats_counters(adapter);
1158 1.1 dyoung
1159 1.88.2.6 snj /* Check PCIE slot type/speed/width */
1160 1.48 msaitoh ixgbe_get_slot_info(adapter);
1161 1.1 dyoung
1162 1.88.2.6 snj /*
1163 1.88.2.6 snj * Do time init and sysctl init here, but
1164 1.88.2.6 snj * only on the first port of a bypass adapter.
1165 1.88.2.6 snj */
1166 1.88.2.6 snj ixgbe_bypass_init(adapter);
1167 1.45 msaitoh
1168 1.88.2.6 snj /* Set an initial dmac value */
1169 1.88.2.6 snj adapter->dmac = 0;
1170 1.88.2.6 snj /* Set initial advertised speeds (if applicable) */
1171 1.88.2.6 snj adapter->advertise = ixgbe_get_advertise(adapter);
1172 1.45 msaitoh
1173 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
1174 1.88.2.6 snj ixgbe_define_iov_schemas(dev, &error);
1175 1.44 msaitoh
1176 1.44 msaitoh /* Add sysctls */
1177 1.44 msaitoh ixgbe_add_device_sysctls(adapter);
1178 1.44 msaitoh ixgbe_add_hw_stats(adapter);
1179 1.44 msaitoh
1180 1.88.2.6 snj /* For Netmap */
1181 1.88.2.6 snj adapter->init_locked = ixgbe_init_locked;
1182 1.88.2.6 snj adapter->stop_locked = ixgbe_stop;
1183 1.1 dyoung
1184 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
1185 1.88.2.6 snj ixgbe_netmap_attach(adapter);
1186 1.88.2.6 snj
1187 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_cap);
1188 1.88.2.6 snj aprint_verbose_dev(dev, "feature cap %s\n", buf);
1189 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_en);
1190 1.88.2.6 snj aprint_verbose_dev(dev, "feature ena %s\n", buf);
1191 1.44 msaitoh
1192 1.44 msaitoh if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume))
1193 1.44 msaitoh pmf_class_network_register(dev, adapter->ifp);
1194 1.44 msaitoh else
1195 1.44 msaitoh aprint_error_dev(dev, "couldn't establish power handler\n");
1196 1.44 msaitoh
1197 1.1 dyoung INIT_DEBUGOUT("ixgbe_attach: end");
1198 1.32 msaitoh adapter->osdep.attached = true;
1199 1.88.2.6 snj
1200 1.1 dyoung return;
1201 1.43 msaitoh
1202 1.1 dyoung err_late:
1203 1.1 dyoung ixgbe_free_transmit_structures(adapter);
1204 1.1 dyoung ixgbe_free_receive_structures(adapter);
1205 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
1206 1.1 dyoung err_out:
1207 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1208 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
1209 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
1210 1.88.2.8 snj ixgbe_free_softint(adapter);
1211 1.1 dyoung ixgbe_free_pci_resources(adapter);
1212 1.1 dyoung if (adapter->mta != NULL)
1213 1.1 dyoung free(adapter->mta, M_DEVBUF);
1214 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
1215 1.88.2.6 snj
1216 1.1 dyoung return;
1217 1.88.2.6 snj } /* ixgbe_attach */
1218 1.1 dyoung
1219 1.88.2.6 snj /************************************************************************
1220 1.88.2.6 snj * ixgbe_check_wol_support
1221 1.1 dyoung *
1222 1.88.2.6 snj * Checks whether the adapter's ports are capable of
1223 1.88.2.6 snj * Wake On LAN by reading the adapter's NVM.
1224 1.1 dyoung *
1225 1.88.2.6 snj * Sets each port's hw->wol_enabled value depending
1226 1.88.2.6 snj * on the value read here.
1227 1.88.2.6 snj ************************************************************************/
1228 1.88.2.6 snj static void
1229 1.88.2.6 snj ixgbe_check_wol_support(struct adapter *adapter)
1230 1.1 dyoung {
1231 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1232 1.88.2.6 snj u16 dev_caps = 0;
1233 1.1 dyoung
1234 1.88.2.6 snj /* Find out WoL support for port */
1235 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 0;
1236 1.88.2.6 snj ixgbe_get_device_caps(hw, &dev_caps);
1237 1.88.2.6 snj if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1238 1.88.2.6 snj ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1239 1.88.2.6 snj hw->bus.func == 0))
1240 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 1;
1241 1.1 dyoung
1242 1.88.2.6 snj /* Save initial wake up filter configuration */
1243 1.88.2.6 snj adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);
1244 1.1 dyoung
1245 1.88.2.6 snj return;
1246 1.88.2.6 snj } /* ixgbe_check_wol_support */
1247 1.45 msaitoh
1248 1.88.2.6 snj /************************************************************************
1249 1.88.2.6 snj * ixgbe_setup_interface
1250 1.88.2.6 snj *
1251 1.88.2.6 snj * Setup networking device structure and register an interface.
1252 1.88.2.6 snj ************************************************************************/
1253 1.88.2.6 snj static int
1254 1.88.2.6 snj ixgbe_setup_interface(device_t dev, struct adapter *adapter)
1255 1.88.2.6 snj {
1256 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
1257 1.88.2.6 snj struct ifnet *ifp;
1258 1.88.2.6 snj int rv;
1259 1.49 msaitoh
1260 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_setup_interface: begin");
1261 1.1 dyoung
1262 1.88.2.6 snj ifp = adapter->ifp = &ec->ec_if;
1263 1.88.2.6 snj strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ);
1264 1.88.2.6 snj ifp->if_baudrate = IF_Gbps(10);
1265 1.88.2.6 snj ifp->if_init = ixgbe_init;
1266 1.88.2.6 snj ifp->if_stop = ixgbe_ifstop;
1267 1.88.2.6 snj ifp->if_softc = adapter;
1268 1.88.2.6 snj ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1269 1.88.2.6 snj #ifdef IXGBE_MPSAFE
1270 1.88.2.7 snj ifp->if_extflags = IFEF_MPSAFE;
1271 1.26 msaitoh #endif
1272 1.88.2.6 snj ifp->if_ioctl = ixgbe_ioctl;
1273 1.88.2.6 snj #if __FreeBSD_version >= 1100045
1274 1.88.2.6 snj /* TSO parameters */
1275 1.88.2.6 snj ifp->if_hw_tsomax = 65518;
1276 1.88.2.6 snj ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER;
1277 1.88.2.6 snj ifp->if_hw_tsomaxsegsize = 2048;
1278 1.45 msaitoh #endif
1279 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_LEGACY_TX) {
1280 1.88.2.6 snj #if 0
1281 1.88.2.6 snj ixgbe_start_locked = ixgbe_legacy_start_locked;
1282 1.88.2.6 snj #endif
1283 1.88.2.6 snj } else {
1284 1.88.2.6 snj ifp->if_transmit = ixgbe_mq_start;
1285 1.88.2.6 snj #if 0
1286 1.88.2.6 snj ixgbe_start_locked = ixgbe_mq_start_locked;
1287 1.1 dyoung #endif
1288 1.88.2.6 snj }
1289 1.88.2.6 snj ifp->if_start = ixgbe_legacy_start;
1290 1.88.2.6 snj IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2);
1291 1.88.2.6 snj IFQ_SET_READY(&ifp->if_snd);
1292 1.1 dyoung
1293 1.88.2.6 snj rv = if_initialize(ifp);
1294 1.88.2.6 snj if (rv != 0) {
1295 1.88.2.6 snj aprint_error_dev(dev, "if_initialize failed(%d)\n", rv);
1296 1.88.2.6 snj return rv;
1297 1.88.2.6 snj }
1298 1.88.2.6 snj adapter->ipq = if_percpuq_create(&adapter->osdep.ec.ec_if);
1299 1.88.2.6 snj ether_ifattach(ifp, adapter->hw.mac.addr);
1300 1.88.2.6 snj /*
1301 1.88.2.6 snj * We use per TX queue softint, so if_deferred_start_init() isn't
1302 1.88.2.6 snj * used.
1303 1.88.2.6 snj */
1304 1.88.2.6 snj if_register(ifp);
1305 1.88.2.6 snj ether_set_ifflags_cb(ec, ixgbe_ifflags_cb);
1306 1.1 dyoung
1307 1.88.2.6 snj adapter->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1308 1.1 dyoung
1309 1.88.2.6 snj /*
1310 1.88.2.6 snj * Tell the upper layer(s) we support long frames.
1311 1.88.2.6 snj */
1312 1.88.2.6 snj ifp->if_hdrlen = sizeof(struct ether_vlan_header);
1313 1.26 msaitoh
1314 1.88.2.6 snj /* Set capability flags */
1315 1.88.2.6 snj ifp->if_capabilities |= IFCAP_RXCSUM
1316 1.88.2.6 snj | IFCAP_TXCSUM
1317 1.88.2.6 snj | IFCAP_TSOv4
1318 1.88.2.6 snj | IFCAP_TSOv6
1319 1.88.2.6 snj | IFCAP_LRO;
1320 1.88.2.6 snj ifp->if_capenable = 0;
1321 1.1 dyoung
1322 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING
1323 1.88.2.6 snj | ETHERCAP_VLAN_HWCSUM
1324 1.88.2.6 snj | ETHERCAP_JUMBO_MTU
1325 1.88.2.6 snj | ETHERCAP_VLAN_MTU;
1326 1.1 dyoung
1327 1.88.2.6 snj /* Enable the above capabilities by default */
1328 1.88.2.6 snj ec->ec_capenable = ec->ec_capabilities;
1329 1.1 dyoung
1330 1.88.2.6 snj /*
1331 1.88.2.6 snj * Don't turn this on by default, if vlans are
1332 1.88.2.6 snj * created on another pseudo device (eg. lagg)
1333 1.88.2.6 snj * then vlan events are not passed thru, breaking
1334 1.88.2.6 snj * operation, but with HW FILTER off it works. If
1335 1.88.2.6 snj * using vlans directly on the ixgbe driver you can
1336 1.88.2.6 snj * enable this and get full hardware tag filtering.
1337 1.88.2.6 snj */
1338 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER;
1339 1.1 dyoung
1340 1.88.2.6 snj /*
1341 1.88.2.6 snj * Specify the media types supported by this adapter and register
1342 1.88.2.6 snj * callbacks to update media and link information
1343 1.88.2.6 snj */
1344 1.88.2.6 snj ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change,
1345 1.88.2.6 snj ixgbe_media_status);
1346 1.1 dyoung
1347 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw);
1348 1.88.2.6 snj ixgbe_add_media_types(adapter);
1349 1.1 dyoung
1350 1.88.2.6 snj /* Set autoselect media by default */
1351 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
1352 1.1 dyoung
1353 1.88.2.6 snj return (0);
1354 1.88.2.6 snj } /* ixgbe_setup_interface */
1355 1.1 dyoung
1356 1.88.2.6 snj /************************************************************************
1357 1.88.2.6 snj * ixgbe_add_media_types
1358 1.88.2.6 snj ************************************************************************/
1359 1.88.2.6 snj static void
1360 1.88.2.6 snj ixgbe_add_media_types(struct adapter *adapter)
1361 1.1 dyoung {
1362 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1363 1.88.2.6 snj device_t dev = adapter->dev;
1364 1.88.2.6 snj u64 layer;
1365 1.44 msaitoh
1366 1.88.2.6 snj layer = adapter->phy_layer;
1367 1.44 msaitoh
1368 1.88.2.6 snj #define ADD(mm, dd) \
1369 1.88.2.6 snj ifmedia_add(&adapter->media, IFM_ETHER | (mm), (dd), NULL);
1370 1.44 msaitoh
1371 1.88.2.6 snj /* Media types with matching NetBSD media defines */
1372 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) {
1373 1.88.2.6 snj ADD(IFM_10G_T | IFM_FDX, 0);
1374 1.88.2.6 snj }
1375 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) {
1376 1.88.2.6 snj ADD(IFM_1000_T | IFM_FDX, 0);
1377 1.88.2.6 snj }
1378 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) {
1379 1.88.2.6 snj ADD(IFM_100_TX | IFM_FDX, 0);
1380 1.88.2.6 snj }
1381 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) {
1382 1.88.2.6 snj ADD(IFM_10_T | IFM_FDX, 0);
1383 1.88.2.6 snj }
1384 1.44 msaitoh
1385 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
1386 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) {
1387 1.88.2.6 snj ADD(IFM_10G_TWINAX | IFM_FDX, 0);
1388 1.88.2.6 snj }
1389 1.44 msaitoh
1390 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) {
1391 1.88.2.6 snj ADD(IFM_10G_LR | IFM_FDX, 0);
1392 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1393 1.88.2.6 snj ADD(IFM_1000_LX | IFM_FDX, 0);
1394 1.88.2.6 snj }
1395 1.88.2.6 snj }
1396 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) {
1397 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1398 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1399 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1400 1.88.2.6 snj }
1401 1.88.2.6 snj } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) {
1402 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1403 1.88.2.6 snj }
1404 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) {
1405 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1406 1.88.2.6 snj }
1407 1.44 msaitoh
1408 1.88.2.6 snj #ifdef IFM_ETH_XTYPE
1409 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1410 1.88.2.6 snj ADD(IFM_10G_KR | IFM_FDX, 0);
1411 1.88.2.6 snj }
1412 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1413 1.88.2.6 snj ADD(AIFM_10G_KX4 | IFM_FDX, 0);
1414 1.88.2.6 snj }
1415 1.88.2.6 snj #else
1416 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1417 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKR\n");
1418 1.88.2.6 snj device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n");
1419 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1420 1.88.2.6 snj }
1421 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1422 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKX4\n");
1423 1.88.2.6 snj device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n");
1424 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1425 1.88.2.6 snj }
1426 1.88.2.6 snj #endif
1427 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) {
1428 1.88.2.6 snj ADD(IFM_1000_KX | IFM_FDX, 0);
1429 1.88.2.6 snj }
1430 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) {
1431 1.88.2.6 snj ADD(IFM_2500_KX | IFM_FDX, 0);
1432 1.88.2.6 snj }
1433 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) {
1434 1.88.2.6 snj ADD(IFM_2500_T | IFM_FDX, 0);
1435 1.88.2.6 snj }
1436 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) {
1437 1.88.2.6 snj ADD(IFM_5000_T | IFM_FDX, 0);
1438 1.88.2.6 snj }
1439 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX)
1440 1.88.2.6 snj device_printf(dev, "Media supported: 1000baseBX\n");
1441 1.88.2.6 snj /* XXX no ifmedia_set? */
1442 1.88.2.6 snj
1443 1.88.2.6 snj ADD(IFM_AUTO, 0);
1444 1.44 msaitoh
1445 1.88.2.6 snj #undef ADD
1446 1.88.2.6 snj } /* ixgbe_add_media_types */
1447 1.44 msaitoh
1448 1.88.2.6 snj /************************************************************************
1449 1.88.2.6 snj * ixgbe_is_sfp
1450 1.88.2.6 snj ************************************************************************/
1451 1.88.2.6 snj static inline bool
1452 1.88.2.6 snj ixgbe_is_sfp(struct ixgbe_hw *hw)
1453 1.88.2.6 snj {
1454 1.88.2.6 snj switch (hw->mac.type) {
1455 1.88.2.6 snj case ixgbe_mac_82598EB:
1456 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_nl)
1457 1.88.2.6 snj return TRUE;
1458 1.88.2.6 snj return FALSE;
1459 1.88.2.6 snj case ixgbe_mac_82599EB:
1460 1.88.2.6 snj switch (hw->mac.ops.get_media_type(hw)) {
1461 1.88.2.6 snj case ixgbe_media_type_fiber:
1462 1.88.2.6 snj case ixgbe_media_type_fiber_qsfp:
1463 1.88.2.6 snj return TRUE;
1464 1.88.2.6 snj default:
1465 1.88.2.6 snj return FALSE;
1466 1.88.2.6 snj }
1467 1.88.2.6 snj case ixgbe_mac_X550EM_x:
1468 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1469 1.88.2.6 snj if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)
1470 1.88.2.6 snj return TRUE;
1471 1.88.2.6 snj return FALSE;
1472 1.88.2.6 snj default:
1473 1.88.2.6 snj return FALSE;
1474 1.88.2.6 snj }
1475 1.88.2.6 snj } /* ixgbe_is_sfp */
1476 1.44 msaitoh
1477 1.88.2.6 snj /************************************************************************
1478 1.88.2.6 snj * ixgbe_config_link
1479 1.88.2.6 snj ************************************************************************/
1480 1.88.2.6 snj static void
1481 1.88.2.6 snj ixgbe_config_link(struct adapter *adapter)
1482 1.44 msaitoh {
1483 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1484 1.88.2.6 snj u32 autoneg, err = 0;
1485 1.88.2.6 snj bool sfp, negotiate = false;
1486 1.44 msaitoh
1487 1.88.2.6 snj sfp = ixgbe_is_sfp(hw);
1488 1.44 msaitoh
1489 1.88.2.6 snj if (sfp) {
1490 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1491 1.88.2.6 snj hw->mac.ops.setup_sfp(hw);
1492 1.88.2.6 snj ixgbe_enable_tx_laser(hw);
1493 1.88.2.6 snj kpreempt_disable();
1494 1.88.2.6 snj softint_schedule(adapter->msf_si);
1495 1.88.2.6 snj kpreempt_enable();
1496 1.88.2.6 snj } else {
1497 1.88.2.6 snj kpreempt_disable();
1498 1.88.2.6 snj softint_schedule(adapter->mod_si);
1499 1.88.2.6 snj kpreempt_enable();
1500 1.88.2.6 snj }
1501 1.88.2.6 snj } else {
1502 1.88.2.6 snj if (hw->mac.ops.check_link)
1503 1.88.2.6 snj err = ixgbe_check_link(hw, &adapter->link_speed,
1504 1.88.2.6 snj &adapter->link_up, FALSE);
1505 1.88.2.6 snj if (err)
1506 1.88.2.6 snj goto out;
1507 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
1508 1.88.2.6 snj if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
1509 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1510 1.88.2.6 snj &negotiate);
1511 1.88.2.6 snj if (err)
1512 1.88.2.6 snj goto out;
1513 1.88.2.6 snj if (hw->mac.ops.setup_link)
1514 1.88.2.6 snj err = hw->mac.ops.setup_link(hw, autoneg,
1515 1.88.2.6 snj adapter->link_up);
1516 1.88.2.6 snj }
1517 1.88.2.6 snj out:
1518 1.44 msaitoh
1519 1.88.2.6 snj return;
1520 1.88.2.6 snj } /* ixgbe_config_link */
1521 1.1 dyoung
1522 1.88.2.6 snj /************************************************************************
1523 1.88.2.6 snj * ixgbe_update_stats_counters - Update board statistics counters.
1524 1.88.2.6 snj ************************************************************************/
1525 1.88.2.6 snj static void
1526 1.88.2.6 snj ixgbe_update_stats_counters(struct adapter *adapter)
1527 1.1 dyoung {
1528 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
1529 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1530 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1531 1.88.2.6 snj u32 missed_rx = 0, bprc, lxon, lxoff, total;
1532 1.88.2.6 snj u64 total_missed_rx = 0;
1533 1.88.2.6 snj uint64_t crcerrs, rlec;
1534 1.1 dyoung
1535 1.88.2.6 snj crcerrs = IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1536 1.88.2.6 snj stats->crcerrs.ev_count += crcerrs;
1537 1.88.2.6 snj stats->illerrc.ev_count += IXGBE_READ_REG(hw, IXGBE_ILLERRC);
1538 1.88.2.6 snj stats->errbc.ev_count += IXGBE_READ_REG(hw, IXGBE_ERRBC);
1539 1.88.2.6 snj stats->mspdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MSPDC);
1540 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X550)
1541 1.88.2.6 snj stats->mbsdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MBSDC);
1542 1.1 dyoung
1543 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->qprc); i++) {
1544 1.88.2.6 snj int j = i % adapter->num_queues;
1545 1.88.2.6 snj stats->qprc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
1546 1.88.2.6 snj stats->qptc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
1547 1.88.2.6 snj stats->qprdc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
1548 1.88.2.6 snj }
1549 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->mpc); i++) {
1550 1.88.2.6 snj uint32_t mp;
1551 1.88.2.6 snj int j = i % adapter->num_queues;
1552 1.1 dyoung
1553 1.88.2.6 snj mp = IXGBE_READ_REG(hw, IXGBE_MPC(i));
1554 1.88.2.6 snj /* global total per queue */
1555 1.88.2.6 snj stats->mpc[j].ev_count += mp;
1556 1.88.2.6 snj /* running comprehensive total for stats display */
1557 1.88.2.6 snj total_missed_rx += mp;
1558 1.1 dyoung
1559 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1560 1.88.2.6 snj stats->rnbc[j].ev_count
1561 1.88.2.6 snj += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
1562 1.88.2.6 snj
1563 1.88.2.6 snj }
1564 1.88.2.6 snj stats->mpctotal.ev_count += total_missed_rx;
1565 1.23 msaitoh
1566 1.88.2.6 snj /* Document says M[LR]FC are valid when link is up and 10Gbps */
1567 1.88.2.6 snj if ((adapter->link_active == TRUE)
1568 1.88.2.6 snj && (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) {
1569 1.88.2.6 snj stats->mlfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MLFC);
1570 1.88.2.6 snj stats->mrfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MRFC);
1571 1.88.2.6 snj }
1572 1.88.2.6 snj rlec = IXGBE_READ_REG(hw, IXGBE_RLEC);
1573 1.88.2.6 snj stats->rlec.ev_count += rlec;
1574 1.1 dyoung
1575 1.88.2.6 snj /* Hardware workaround, gprc counts missed packets */
1576 1.88.2.6 snj stats->gprc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx;
1577 1.1 dyoung
1578 1.88.2.6 snj lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1579 1.88.2.6 snj stats->lxontxc.ev_count += lxon;
1580 1.88.2.6 snj lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1581 1.88.2.6 snj stats->lxofftxc.ev_count += lxoff;
1582 1.88.2.6 snj total = lxon + lxoff;
1583 1.1 dyoung
1584 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1585 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCL) +
1586 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
1587 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
1588 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) - total * ETHER_MIN_LEN;
1589 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORL) +
1590 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);
1591 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
1592 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
1593 1.88.2.6 snj } else {
1594 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1595 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1596 1.88.2.6 snj /* 82598 only has a counter in the high register */
1597 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCH);
1598 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCH) - total * ETHER_MIN_LEN;
1599 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORH);
1600 1.1 dyoung }
1601 1.1 dyoung
1602 1.88.2.6 snj /*
1603 1.88.2.6 snj * Workaround: mprc hardware is incorrectly counting
1604 1.88.2.6 snj * broadcasts, so for now we subtract those.
1605 1.88.2.6 snj */
1606 1.88.2.6 snj bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1607 1.88.2.6 snj stats->bprc.ev_count += bprc;
1608 1.88.2.6 snj stats->mprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPRC)
1609 1.88.2.6 snj - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0);
1610 1.33 msaitoh
1611 1.88.2.6 snj stats->prc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC64);
1612 1.88.2.6 snj stats->prc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC127);
1613 1.88.2.6 snj stats->prc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC255);
1614 1.88.2.6 snj stats->prc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC511);
1615 1.88.2.6 snj stats->prc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1616 1.88.2.6 snj stats->prc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1617 1.88.2.6 snj
1618 1.88.2.6 snj stats->gptc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPTC) - total;
1619 1.88.2.6 snj stats->mptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPTC) - total;
1620 1.88.2.6 snj stats->ptc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC64) - total;
1621 1.88.2.6 snj
1622 1.88.2.6 snj stats->ruc.ev_count += IXGBE_READ_REG(hw, IXGBE_RUC);
1623 1.88.2.6 snj stats->rfc.ev_count += IXGBE_READ_REG(hw, IXGBE_RFC);
1624 1.88.2.6 snj stats->roc.ev_count += IXGBE_READ_REG(hw, IXGBE_ROC);
1625 1.88.2.6 snj stats->rjc.ev_count += IXGBE_READ_REG(hw, IXGBE_RJC);
1626 1.88.2.6 snj stats->mngprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPRC);
1627 1.88.2.6 snj stats->mngpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPDC);
1628 1.88.2.6 snj stats->mngptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPTC);
1629 1.88.2.6 snj stats->tpr.ev_count += IXGBE_READ_REG(hw, IXGBE_TPR);
1630 1.88.2.6 snj stats->tpt.ev_count += IXGBE_READ_REG(hw, IXGBE_TPT);
1631 1.88.2.6 snj stats->ptc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC127);
1632 1.88.2.6 snj stats->ptc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC255);
1633 1.88.2.6 snj stats->ptc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC511);
1634 1.88.2.6 snj stats->ptc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1023);
1635 1.88.2.6 snj stats->ptc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1522);
1636 1.88.2.6 snj stats->bptc.ev_count += IXGBE_READ_REG(hw, IXGBE_BPTC);
1637 1.88.2.6 snj stats->xec.ev_count += IXGBE_READ_REG(hw, IXGBE_XEC);
1638 1.88.2.6 snj stats->fccrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCCRC);
1639 1.88.2.6 snj stats->fclast.ev_count += IXGBE_READ_REG(hw, IXGBE_FCLAST);
1640 1.88.2.6 snj /* Only read FCOE on 82599 */
1641 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1642 1.88.2.6 snj stats->fcoerpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
1643 1.88.2.6 snj stats->fcoeprc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
1644 1.88.2.6 snj stats->fcoeptc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
1645 1.88.2.6 snj stats->fcoedwrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
1646 1.88.2.6 snj stats->fcoedwtc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
1647 1.1 dyoung }
1648 1.28 msaitoh
1649 1.88.2.6 snj /* Fill out the OS statistics structure */
1650 1.88.2.6 snj /*
1651 1.88.2.6 snj * NetBSD: Don't override if_{i|o}{packets|bytes|mcasts} with
1652 1.88.2.6 snj * adapter->stats counters. It's required to make ifconfig -z
1653 1.88.2.6 snj * (SOICZIFDATA) work.
1654 1.88.2.6 snj */
1655 1.88.2.6 snj ifp->if_collisions = 0;
1656 1.1 dyoung
1657 1.88.2.6 snj /* Rx Errors */
1658 1.88.2.6 snj ifp->if_iqdrops += total_missed_rx;
1659 1.88.2.6 snj ifp->if_ierrors += crcerrs + rlec;
1660 1.88.2.6 snj } /* ixgbe_update_stats_counters */
1661 1.48 msaitoh
1662 1.88.2.6 snj /************************************************************************
1663 1.88.2.6 snj * ixgbe_add_hw_stats
1664 1.1 dyoung *
1665 1.88.2.6 snj * Add sysctl variables, one per statistic, to the system.
1666 1.88.2.6 snj ************************************************************************/
1667 1.1 dyoung static void
1668 1.88.2.6 snj ixgbe_add_hw_stats(struct adapter *adapter)
1669 1.1 dyoung {
1670 1.88.2.6 snj device_t dev = adapter->dev;
1671 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
1672 1.88.2.6 snj struct sysctllog **log = &adapter->sysctllog;
1673 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
1674 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
1675 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
1676 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1677 1.88.2.6 snj const char *xname = device_xname(dev);
1678 1.1 dyoung
1679 1.88.2.6 snj /* Driver Statistics */
1680 1.88.2.6 snj evcnt_attach_dynamic(&adapter->handleq, EVCNT_TYPE_MISC,
1681 1.88.2.6 snj NULL, xname, "Handled queue in softint");
1682 1.88.2.6 snj evcnt_attach_dynamic(&adapter->req, EVCNT_TYPE_MISC,
1683 1.88.2.6 snj NULL, xname, "Requeued in softint");
1684 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig_tx_dma_setup, EVCNT_TYPE_MISC,
1685 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EFBIG");
1686 1.88.2.6 snj evcnt_attach_dynamic(&adapter->mbuf_defrag_failed, EVCNT_TYPE_MISC,
1687 1.88.2.6 snj NULL, xname, "m_defrag() failed");
1688 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig2_tx_dma_setup, EVCNT_TYPE_MISC,
1689 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EFBIG");
1690 1.88.2.6 snj evcnt_attach_dynamic(&adapter->einval_tx_dma_setup, EVCNT_TYPE_MISC,
1691 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EINVAL");
1692 1.88.2.6 snj evcnt_attach_dynamic(&adapter->other_tx_dma_setup, EVCNT_TYPE_MISC,
1693 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail other");
1694 1.88.2.6 snj evcnt_attach_dynamic(&adapter->eagain_tx_dma_setup, EVCNT_TYPE_MISC,
1695 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EAGAIN");
1696 1.88.2.6 snj evcnt_attach_dynamic(&adapter->enomem_tx_dma_setup, EVCNT_TYPE_MISC,
1697 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail ENOMEM");
1698 1.88.2.6 snj evcnt_attach_dynamic(&adapter->watchdog_events, EVCNT_TYPE_MISC,
1699 1.88.2.6 snj NULL, xname, "Watchdog timeouts");
1700 1.88.2.6 snj evcnt_attach_dynamic(&adapter->tso_err, EVCNT_TYPE_MISC,
1701 1.88.2.6 snj NULL, xname, "TSO errors");
1702 1.88.2.6 snj evcnt_attach_dynamic(&adapter->link_irq, EVCNT_TYPE_INTR,
1703 1.88.2.6 snj NULL, xname, "Link MSI-X IRQ Handled");
1704 1.1 dyoung
1705 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
1706 1.88.2.6 snj snprintf(adapter->queues[i].evnamebuf,
1707 1.88.2.6 snj sizeof(adapter->queues[i].evnamebuf), "%s q%d",
1708 1.88.2.6 snj xname, i);
1709 1.88.2.6 snj snprintf(adapter->queues[i].namebuf,
1710 1.88.2.6 snj sizeof(adapter->queues[i].namebuf), "q%d", i);
1711 1.48 msaitoh
1712 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
1713 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
1714 1.88.2.6 snj break;
1715 1.88.2.6 snj }
1716 1.1 dyoung
1717 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &rnode,
1718 1.88.2.6 snj 0, CTLTYPE_NODE,
1719 1.88.2.6 snj adapter->queues[i].namebuf, SYSCTL_DESCR("Queue Name"),
1720 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0)
1721 1.88.2.6 snj break;
1722 1.88.2.6 snj
1723 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1724 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
1725 1.88.2.6 snj "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"),
1726 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler, 0,
1727 1.88.2.6 snj (void *)&adapter->queues[i], 0, CTL_CREATE, CTL_EOL) != 0)
1728 1.88.2.6 snj break;
1729 1.88.2.6 snj
1730 1.88.2.6 snj #if 0 /* XXX msaitoh */
1731 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1732 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_QUAD,
1733 1.88.2.6 snj "irqs", SYSCTL_DESCR("irqs on this queue"),
1734 1.88.2.6 snj NULL, 0, &(adapter->queues[i].irqs),
1735 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1736 1.88.2.6 snj break;
1737 1.45 msaitoh #endif
1738 1.1 dyoung
1739 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1740 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1741 1.88.2.6 snj "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"),
1742 1.88.2.6 snj ixgbe_sysctl_tdh_handler, 0, (void *)txr,
1743 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1744 1.88.2.6 snj break;
1745 1.1 dyoung
1746 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1747 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1748 1.88.2.6 snj "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"),
1749 1.88.2.6 snj ixgbe_sysctl_tdt_handler, 0, (void *)txr,
1750 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1751 1.88.2.6 snj break;
1752 1.1 dyoung
1753 1.88.2.6 snj evcnt_attach_dynamic(&adapter->queues[i].irqs, EVCNT_TYPE_INTR,
1754 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "IRQs on queue");
1755 1.88.2.6 snj evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
1756 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "TSO");
1757 1.88.2.6 snj evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
1758 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1759 1.88.2.6 snj "Queue No Descriptor Available");
1760 1.88.2.6 snj evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
1761 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1762 1.88.2.6 snj "Queue Packets Transmitted");
1763 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
1764 1.88.2.6 snj evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
1765 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1766 1.88.2.6 snj "Packets dropped in pcq");
1767 1.88.2.6 snj #endif
1768 1.1 dyoung
1769 1.88.2.6 snj #ifdef LRO
1770 1.88.2.6 snj struct lro_ctrl *lro = &rxr->lro;
1771 1.88.2.6 snj #endif /* LRO */
1772 1.1 dyoung
1773 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1774 1.88.2.6 snj CTLFLAG_READONLY,
1775 1.88.2.6 snj CTLTYPE_INT,
1776 1.88.2.6 snj "rxd_head", SYSCTL_DESCR("Receive Descriptor Head"),
1777 1.88.2.6 snj ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0,
1778 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1779 1.88.2.6 snj break;
1780 1.1 dyoung
1781 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1782 1.88.2.6 snj CTLFLAG_READONLY,
1783 1.88.2.6 snj CTLTYPE_INT,
1784 1.88.2.6 snj "rxd_tail", SYSCTL_DESCR("Receive Descriptor Tail"),
1785 1.88.2.6 snj ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0,
1786 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1787 1.88.2.6 snj break;
1788 1.1 dyoung
1789 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
1790 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpc[i],
1791 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1792 1.88.2.6 snj "RX Missed Packet Count");
1793 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1794 1.88.2.6 snj evcnt_attach_dynamic(&stats->rnbc[i],
1795 1.88.2.6 snj EVCNT_TYPE_MISC, NULL,
1796 1.88.2.6 snj adapter->queues[i].evnamebuf,
1797 1.88.2.6 snj "Receive No Buffers");
1798 1.1 dyoung }
1799 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
1800 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxontxc[i],
1801 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1802 1.88.2.6 snj "pxontxc");
1803 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxonrxc[i],
1804 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1805 1.88.2.6 snj "pxonrxc");
1806 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxofftxc[i],
1807 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1808 1.88.2.6 snj "pxofftxc");
1809 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxoffrxc[i],
1810 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1811 1.88.2.6 snj "pxoffrxc");
1812 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxon2offc[i],
1813 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1814 1.88.2.6 snj "pxon2offc");
1815 1.88.2.6 snj }
1816 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
1817 1.88.2.6 snj evcnt_attach_dynamic(&stats->qprc[i],
1818 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1819 1.88.2.6 snj "qprc");
1820 1.88.2.6 snj evcnt_attach_dynamic(&stats->qptc[i],
1821 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1822 1.88.2.6 snj "qptc");
1823 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbrc[i],
1824 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1825 1.88.2.6 snj "qbrc");
1826 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbtc[i],
1827 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1828 1.88.2.6 snj "qbtc");
1829 1.88.2.6 snj evcnt_attach_dynamic(&stats->qprdc[i],
1830 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1831 1.88.2.6 snj "qprdc");
1832 1.1 dyoung }
1833 1.22 msaitoh
1834 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC,
1835 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Packets Received");
1836 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC,
1837 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Bytes Received");
1838 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC,
1839 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Copied RX Frames");
1840 1.88.2.6 snj evcnt_attach_dynamic(&rxr->no_jmbuf, EVCNT_TYPE_MISC,
1841 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx no jumbo mbuf");
1842 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC,
1843 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx discarded");
1844 1.88.2.6 snj #ifdef LRO
1845 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued",
1846 1.88.2.6 snj CTLFLAG_RD, &lro->lro_queued, 0,
1847 1.88.2.6 snj "LRO Queued");
1848 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed",
1849 1.88.2.6 snj CTLFLAG_RD, &lro->lro_flushed, 0,
1850 1.88.2.6 snj "LRO Flushed");
1851 1.88.2.6 snj #endif /* LRO */
1852 1.1 dyoung }
1853 1.1 dyoung
1854 1.88.2.6 snj /* MAC stats get their own sub node */
1855 1.1 dyoung
1856 1.88.2.6 snj snprintf(stats->namebuf,
1857 1.88.2.6 snj sizeof(stats->namebuf), "%s MAC Statistics", xname);
1858 1.45 msaitoh
1859 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL,
1860 1.88.2.6 snj stats->namebuf, "rx csum offload - IP");
1861 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL,
1862 1.88.2.6 snj stats->namebuf, "rx csum offload - L4");
1863 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL,
1864 1.88.2.6 snj stats->namebuf, "rx csum offload - IP bad");
1865 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL,
1866 1.88.2.6 snj stats->namebuf, "rx csum offload - L4 bad");
1867 1.88.2.6 snj evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL,
1868 1.88.2.6 snj stats->namebuf, "Interrupt conditions zero");
1869 1.88.2.6 snj evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL,
1870 1.88.2.6 snj stats->namebuf, "Legacy interrupts");
1871 1.45 msaitoh
1872 1.88.2.6 snj evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL,
1873 1.88.2.6 snj stats->namebuf, "CRC Errors");
1874 1.88.2.6 snj evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL,
1875 1.88.2.6 snj stats->namebuf, "Illegal Byte Errors");
1876 1.88.2.6 snj evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL,
1877 1.88.2.6 snj stats->namebuf, "Byte Errors");
1878 1.88.2.6 snj evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL,
1879 1.88.2.6 snj stats->namebuf, "MAC Short Packets Discarded");
1880 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
1881 1.88.2.6 snj evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL,
1882 1.88.2.6 snj stats->namebuf, "Bad SFD");
1883 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL,
1884 1.88.2.6 snj stats->namebuf, "Total Packets Missed");
1885 1.88.2.6 snj evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL,
1886 1.88.2.6 snj stats->namebuf, "MAC Local Faults");
1887 1.88.2.6 snj evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL,
1888 1.88.2.6 snj stats->namebuf, "MAC Remote Faults");
1889 1.88.2.6 snj evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL,
1890 1.88.2.6 snj stats->namebuf, "Receive Length Errors");
1891 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL,
1892 1.88.2.6 snj stats->namebuf, "Link XON Transmitted");
1893 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL,
1894 1.88.2.6 snj stats->namebuf, "Link XON Received");
1895 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL,
1896 1.88.2.6 snj stats->namebuf, "Link XOFF Transmitted");
1897 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL,
1898 1.88.2.6 snj stats->namebuf, "Link XOFF Received");
1899 1.45 msaitoh
1900 1.88.2.6 snj /* Packet Reception Stats */
1901 1.88.2.6 snj evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL,
1902 1.88.2.6 snj stats->namebuf, "Total Octets Received");
1903 1.88.2.6 snj evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL,
1904 1.88.2.6 snj stats->namebuf, "Good Octets Received");
1905 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL,
1906 1.88.2.6 snj stats->namebuf, "Total Packets Received");
1907 1.88.2.6 snj evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL,
1908 1.88.2.6 snj stats->namebuf, "Good Packets Received");
1909 1.88.2.6 snj evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL,
1910 1.88.2.6 snj stats->namebuf, "Multicast Packets Received");
1911 1.88.2.6 snj evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL,
1912 1.88.2.6 snj stats->namebuf, "Broadcast Packets Received");
1913 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL,
1914 1.88.2.6 snj stats->namebuf, "64 byte frames received ");
1915 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL,
1916 1.88.2.6 snj stats->namebuf, "65-127 byte frames received");
1917 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL,
1918 1.88.2.6 snj stats->namebuf, "128-255 byte frames received");
1919 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL,
1920 1.88.2.6 snj stats->namebuf, "256-511 byte frames received");
1921 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL,
1922 1.88.2.6 snj stats->namebuf, "512-1023 byte frames received");
1923 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL,
1924 1.88.2.6 snj stats->namebuf, "1023-1522 byte frames received");
1925 1.88.2.6 snj evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL,
1926 1.88.2.6 snj stats->namebuf, "Receive Undersized");
1927 1.88.2.6 snj evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL,
1928 1.88.2.6 snj stats->namebuf, "Fragmented Packets Received ");
1929 1.88.2.6 snj evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL,
1930 1.88.2.6 snj stats->namebuf, "Oversized Packets Received");
1931 1.88.2.6 snj evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL,
1932 1.88.2.6 snj stats->namebuf, "Received Jabber");
1933 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL,
1934 1.88.2.6 snj stats->namebuf, "Management Packets Received");
1935 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL,
1936 1.88.2.6 snj stats->namebuf, "Management Packets Dropped");
1937 1.88.2.6 snj evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL,
1938 1.88.2.6 snj stats->namebuf, "Checksum Errors");
1939 1.45 msaitoh
1940 1.88.2.6 snj /* Packet Transmission Stats */
1941 1.88.2.6 snj evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL,
1942 1.88.2.6 snj stats->namebuf, "Good Octets Transmitted");
1943 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL,
1944 1.88.2.6 snj stats->namebuf, "Total Packets Transmitted");
1945 1.88.2.6 snj evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL,
1946 1.88.2.6 snj stats->namebuf, "Good Packets Transmitted");
1947 1.88.2.6 snj evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL,
1948 1.88.2.6 snj stats->namebuf, "Broadcast Packets Transmitted");
1949 1.88.2.6 snj evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL,
1950 1.88.2.6 snj stats->namebuf, "Multicast Packets Transmitted");
1951 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL,
1952 1.88.2.6 snj stats->namebuf, "Management Packets Transmitted");
1953 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL,
1954 1.88.2.6 snj stats->namebuf, "64 byte frames transmitted ");
1955 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL,
1956 1.88.2.6 snj stats->namebuf, "65-127 byte frames transmitted");
1957 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL,
1958 1.88.2.6 snj stats->namebuf, "128-255 byte frames transmitted");
1959 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL,
1960 1.88.2.6 snj stats->namebuf, "256-511 byte frames transmitted");
1961 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL,
1962 1.88.2.6 snj stats->namebuf, "512-1023 byte frames transmitted");
1963 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL,
1964 1.88.2.6 snj stats->namebuf, "1024-1522 byte frames transmitted");
1965 1.88.2.6 snj } /* ixgbe_add_hw_stats */
1966 1.45 msaitoh
1967 1.45 msaitoh static void
1968 1.88.2.6 snj ixgbe_clear_evcnt(struct adapter *adapter)
1969 1.44 msaitoh {
1970 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
1971 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
1972 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1973 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1974 1.44 msaitoh
1975 1.88.2.6 snj adapter->handleq.ev_count = 0;
1976 1.88.2.6 snj adapter->req.ev_count = 0;
1977 1.88.2.6 snj adapter->efbig_tx_dma_setup.ev_count = 0;
1978 1.88.2.6 snj adapter->mbuf_defrag_failed.ev_count = 0;
1979 1.88.2.6 snj adapter->efbig2_tx_dma_setup.ev_count = 0;
1980 1.88.2.6 snj adapter->einval_tx_dma_setup.ev_count = 0;
1981 1.88.2.6 snj adapter->other_tx_dma_setup.ev_count = 0;
1982 1.88.2.6 snj adapter->eagain_tx_dma_setup.ev_count = 0;
1983 1.88.2.6 snj adapter->enomem_tx_dma_setup.ev_count = 0;
1984 1.88.2.6 snj adapter->watchdog_events.ev_count = 0;
1985 1.88.2.6 snj adapter->tso_err.ev_count = 0;
1986 1.88.2.6 snj adapter->link_irq.ev_count = 0;
1987 1.1 dyoung
1988 1.88.2.6 snj txr = adapter->tx_rings;
1989 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
1990 1.88.2.6 snj adapter->queues[i].irqs.ev_count = 0;
1991 1.88.2.6 snj txr->no_desc_avail.ev_count = 0;
1992 1.88.2.6 snj txr->total_packets.ev_count = 0;
1993 1.88.2.6 snj txr->tso_tx.ev_count = 0;
1994 1.28 msaitoh #ifndef IXGBE_LEGACY_TX
1995 1.88.2.6 snj txr->pcq_drops.ev_count = 0;
1996 1.26 msaitoh #endif
1997 1.88.2.6 snj
1998 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
1999 1.88.2.6 snj stats->mpc[i].ev_count = 0;
2000 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2001 1.88.2.6 snj stats->rnbc[i].ev_count = 0;
2002 1.88.2.6 snj }
2003 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
2004 1.88.2.6 snj stats->pxontxc[i].ev_count = 0;
2005 1.88.2.6 snj stats->pxonrxc[i].ev_count = 0;
2006 1.88.2.6 snj stats->pxofftxc[i].ev_count = 0;
2007 1.88.2.6 snj stats->pxoffrxc[i].ev_count = 0;
2008 1.88.2.6 snj stats->pxon2offc[i].ev_count = 0;
2009 1.88.2.6 snj }
2010 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
2011 1.88.2.6 snj stats->qprc[i].ev_count = 0;
2012 1.88.2.6 snj stats->qptc[i].ev_count = 0;
2013 1.88.2.6 snj stats->qbrc[i].ev_count = 0;
2014 1.88.2.6 snj stats->qbtc[i].ev_count = 0;
2015 1.88.2.6 snj stats->qprdc[i].ev_count = 0;
2016 1.1 dyoung }
2017 1.1 dyoung
2018 1.88.2.6 snj rxr->rx_packets.ev_count = 0;
2019 1.88.2.6 snj rxr->rx_bytes.ev_count = 0;
2020 1.88.2.6 snj rxr->rx_copies.ev_count = 0;
2021 1.88.2.6 snj rxr->no_jmbuf.ev_count = 0;
2022 1.88.2.6 snj rxr->rx_discarded.ev_count = 0;
2023 1.1 dyoung }
2024 1.88.2.6 snj stats->ipcs.ev_count = 0;
2025 1.88.2.6 snj stats->l4cs.ev_count = 0;
2026 1.88.2.6 snj stats->ipcs_bad.ev_count = 0;
2027 1.88.2.6 snj stats->l4cs_bad.ev_count = 0;
2028 1.88.2.6 snj stats->intzero.ev_count = 0;
2029 1.88.2.6 snj stats->legint.ev_count = 0;
2030 1.88.2.6 snj stats->crcerrs.ev_count = 0;
2031 1.88.2.6 snj stats->illerrc.ev_count = 0;
2032 1.88.2.6 snj stats->errbc.ev_count = 0;
2033 1.88.2.6 snj stats->mspdc.ev_count = 0;
2034 1.88.2.6 snj stats->mbsdc.ev_count = 0;
2035 1.88.2.6 snj stats->mpctotal.ev_count = 0;
2036 1.88.2.6 snj stats->mlfc.ev_count = 0;
2037 1.88.2.6 snj stats->mrfc.ev_count = 0;
2038 1.88.2.6 snj stats->rlec.ev_count = 0;
2039 1.88.2.6 snj stats->lxontxc.ev_count = 0;
2040 1.88.2.6 snj stats->lxonrxc.ev_count = 0;
2041 1.88.2.6 snj stats->lxofftxc.ev_count = 0;
2042 1.88.2.6 snj stats->lxoffrxc.ev_count = 0;
2043 1.34 msaitoh
2044 1.88.2.6 snj /* Packet Reception Stats */
2045 1.88.2.6 snj stats->tor.ev_count = 0;
2046 1.88.2.6 snj stats->gorc.ev_count = 0;
2047 1.88.2.6 snj stats->tpr.ev_count = 0;
2048 1.88.2.6 snj stats->gprc.ev_count = 0;
2049 1.88.2.6 snj stats->mprc.ev_count = 0;
2050 1.88.2.6 snj stats->bprc.ev_count = 0;
2051 1.88.2.6 snj stats->prc64.ev_count = 0;
2052 1.88.2.6 snj stats->prc127.ev_count = 0;
2053 1.88.2.6 snj stats->prc255.ev_count = 0;
2054 1.88.2.6 snj stats->prc511.ev_count = 0;
2055 1.88.2.6 snj stats->prc1023.ev_count = 0;
2056 1.88.2.6 snj stats->prc1522.ev_count = 0;
2057 1.88.2.6 snj stats->ruc.ev_count = 0;
2058 1.88.2.6 snj stats->rfc.ev_count = 0;
2059 1.88.2.6 snj stats->roc.ev_count = 0;
2060 1.88.2.6 snj stats->rjc.ev_count = 0;
2061 1.88.2.6 snj stats->mngprc.ev_count = 0;
2062 1.88.2.6 snj stats->mngpdc.ev_count = 0;
2063 1.88.2.6 snj stats->xec.ev_count = 0;
2064 1.1 dyoung
2065 1.88.2.6 snj /* Packet Transmission Stats */
2066 1.88.2.6 snj stats->gotc.ev_count = 0;
2067 1.88.2.6 snj stats->tpt.ev_count = 0;
2068 1.88.2.6 snj stats->gptc.ev_count = 0;
2069 1.88.2.6 snj stats->bptc.ev_count = 0;
2070 1.88.2.6 snj stats->mptc.ev_count = 0;
2071 1.88.2.6 snj stats->mngptc.ev_count = 0;
2072 1.88.2.6 snj stats->ptc64.ev_count = 0;
2073 1.88.2.6 snj stats->ptc127.ev_count = 0;
2074 1.88.2.6 snj stats->ptc255.ev_count = 0;
2075 1.88.2.6 snj stats->ptc511.ev_count = 0;
2076 1.88.2.6 snj stats->ptc1023.ev_count = 0;
2077 1.88.2.6 snj stats->ptc1522.ev_count = 0;
2078 1.1 dyoung }
2079 1.1 dyoung
2080 1.88.2.6 snj /************************************************************************
2081 1.88.2.6 snj * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function
2082 1.88.2.6 snj *
2083 1.88.2.6 snj * Retrieves the TDH value from the hardware
2084 1.88.2.6 snj ************************************************************************/
2085 1.88.2.6 snj static int
2086 1.88.2.6 snj ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS)
2087 1.1 dyoung {
2088 1.88.2.6 snj struct sysctlnode node = *rnode;
2089 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2090 1.88.2.6 snj uint32_t val;
2091 1.34 msaitoh
2092 1.88.2.6 snj if (!txr)
2093 1.88.2.6 snj return (0);
2094 1.1 dyoung
2095 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me));
2096 1.88.2.6 snj node.sysctl_data = &val;
2097 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2098 1.88.2.6 snj } /* ixgbe_sysctl_tdh_handler */
2099 1.1 dyoung
2100 1.88.2.6 snj /************************************************************************
2101 1.88.2.6 snj * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
2102 1.88.2.6 snj *
2103 1.88.2.6 snj * Retrieves the TDT value from the hardware
2104 1.88.2.6 snj ************************************************************************/
2105 1.88.2.6 snj static int
2106 1.88.2.6 snj ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS)
2107 1.88.2.6 snj {
2108 1.88.2.6 snj struct sysctlnode node = *rnode;
2109 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2110 1.88.2.6 snj uint32_t val;
2111 1.33 msaitoh
2112 1.88.2.6 snj if (!txr)
2113 1.88.2.6 snj return (0);
2114 1.43 msaitoh
2115 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me));
2116 1.88.2.6 snj node.sysctl_data = &val;
2117 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2118 1.88.2.6 snj } /* ixgbe_sysctl_tdt_handler */
2119 1.1 dyoung
2120 1.88.2.6 snj /************************************************************************
2121 1.88.2.6 snj * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function
2122 1.88.2.6 snj *
2123 1.88.2.6 snj * Retrieves the RDH value from the hardware
2124 1.88.2.6 snj ************************************************************************/
2125 1.88.2.6 snj static int
2126 1.88.2.6 snj ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS)
2127 1.88.2.6 snj {
2128 1.88.2.6 snj struct sysctlnode node = *rnode;
2129 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2130 1.88.2.6 snj uint32_t val;
2131 1.34 msaitoh
2132 1.88.2.6 snj if (!rxr)
2133 1.88.2.6 snj return (0);
2134 1.1 dyoung
2135 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me));
2136 1.88.2.6 snj node.sysctl_data = &val;
2137 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2138 1.88.2.6 snj } /* ixgbe_sysctl_rdh_handler */
2139 1.1 dyoung
2140 1.88.2.6 snj /************************************************************************
2141 1.88.2.6 snj * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function
2142 1.88.2.6 snj *
2143 1.88.2.6 snj * Retrieves the RDT value from the hardware
2144 1.88.2.6 snj ************************************************************************/
2145 1.88.2.6 snj static int
2146 1.88.2.6 snj ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS)
2147 1.1 dyoung {
2148 1.88.2.6 snj struct sysctlnode node = *rnode;
2149 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2150 1.88.2.6 snj uint32_t val;
2151 1.1 dyoung
2152 1.88.2.6 snj if (!rxr)
2153 1.88.2.6 snj return (0);
2154 1.1 dyoung
2155 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me));
2156 1.88.2.6 snj node.sysctl_data = &val;
2157 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2158 1.88.2.6 snj } /* ixgbe_sysctl_rdt_handler */
2159 1.1 dyoung
2160 1.88.2.6 snj #if 0 /* XXX Badly need to overhaul vlan(4) on NetBSD. */
2161 1.88.2.6 snj /************************************************************************
2162 1.88.2.6 snj * ixgbe_register_vlan
2163 1.88.2.6 snj *
2164 1.88.2.6 snj * Run via vlan config EVENT, it enables us to use the
2165 1.88.2.6 snj * HW Filter table since we can get the vlan id. This
2166 1.88.2.6 snj * just creates the entry in the soft version of the
2167 1.88.2.6 snj * VFTA, init will repopulate the real table.
2168 1.88.2.6 snj ************************************************************************/
2169 1.1 dyoung static void
2170 1.88.2.6 snj ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2171 1.1 dyoung {
2172 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2173 1.88.2.6 snj u16 index, bit;
2174 1.1 dyoung
2175 1.88.2.6 snj if (ifp->if_softc != arg) /* Not our event */
2176 1.88.2.6 snj return;
2177 1.43 msaitoh
2178 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2179 1.88.2.6 snj return;
2180 1.1 dyoung
2181 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2182 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2183 1.88.2.6 snj bit = vtag & 0x1F;
2184 1.88.2.6 snj adapter->shadow_vfta[index] |= (1 << bit);
2185 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2186 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2187 1.88.2.6 snj } /* ixgbe_register_vlan */
2188 1.1 dyoung
2189 1.88.2.6 snj /************************************************************************
2190 1.88.2.6 snj * ixgbe_unregister_vlan
2191 1.88.2.6 snj *
2192 1.88.2.6 snj * Run via vlan unconfig EVENT, remove our entry in the soft vfta.
2193 1.88.2.6 snj ************************************************************************/
2194 1.88.2.6 snj static void
2195 1.88.2.6 snj ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2196 1.88.2.6 snj {
2197 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2198 1.88.2.6 snj u16 index, bit;
2199 1.1 dyoung
2200 1.88.2.6 snj if (ifp->if_softc != arg)
2201 1.88.2.6 snj return;
2202 1.1 dyoung
2203 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2204 1.88.2.6 snj return;
2205 1.1 dyoung
2206 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2207 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2208 1.88.2.6 snj bit = vtag & 0x1F;
2209 1.88.2.6 snj adapter->shadow_vfta[index] &= ~(1 << bit);
2210 1.88.2.6 snj /* Re-init to load the changes */
2211 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2212 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2213 1.88.2.6 snj } /* ixgbe_unregister_vlan */
2214 1.88.2.6 snj #endif
2215 1.88.2.6 snj
2216 1.88.2.6 snj static void
2217 1.88.2.6 snj ixgbe_setup_vlan_hw_support(struct adapter *adapter)
2218 1.1 dyoung {
2219 1.1 dyoung struct ethercom *ec = &adapter->osdep.ec;
2220 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2221 1.88.2.6 snj struct rx_ring *rxr;
2222 1.88.2.6 snj int i;
2223 1.88.2.6 snj u32 ctrl;
2224 1.1 dyoung
2225 1.1 dyoung
2226 1.74 msaitoh /*
2227 1.88.2.6 snj * We get here thru init_locked, meaning
2228 1.88.2.6 snj * a soft reset, this has already cleared
2229 1.88.2.6 snj * the VFTA and other state, so if there
2230 1.88.2.6 snj * have been no vlan's registered do nothing.
2231 1.74 msaitoh */
2232 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
2233 1.88.2.6 snj return;
2234 1.1 dyoung
2235 1.88.2.6 snj /* Setup the queues for vlans */
2236 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) {
2237 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++) {
2238 1.88.2.6 snj rxr = &adapter->rx_rings[i];
2239 1.88.2.6 snj /* On 82599 the VLAN enable is per/queue in RXDCTL */
2240 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
2241 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
2242 1.88.2.6 snj ctrl |= IXGBE_RXDCTL_VME;
2243 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
2244 1.88.2.6 snj }
2245 1.88.2.6 snj rxr->vtag_strip = TRUE;
2246 1.88.2.6 snj }
2247 1.88.2.6 snj }
2248 1.1 dyoung
2249 1.88.2.6 snj if ((ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) == 0)
2250 1.88.2.6 snj return;
2251 1.1 dyoung /*
2252 1.88.2.6 snj * A soft reset zero's out the VFTA, so
2253 1.88.2.6 snj * we need to repopulate it now.
2254 1.1 dyoung */
2255 1.88.2.6 snj for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2256 1.88.2.6 snj if (adapter->shadow_vfta[i] != 0)
2257 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VFTA(i),
2258 1.88.2.6 snj adapter->shadow_vfta[i]);
2259 1.1 dyoung
2260 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2261 1.88.2.6 snj /* Enable the Filter Table if enabled */
2262 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) {
2263 1.88.2.6 snj ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2264 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VFE;
2265 1.88.2.6 snj }
2266 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2267 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VME;
2268 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2269 1.88.2.6 snj } /* ixgbe_setup_vlan_hw_support */
2270 1.1 dyoung
2271 1.88.2.6 snj /************************************************************************
2272 1.88.2.6 snj * ixgbe_get_slot_info
2273 1.88.2.6 snj *
2274 1.88.2.6 snj * Get the width and transaction speed of
2275 1.88.2.6 snj * the slot this adapter is plugged into.
2276 1.88.2.6 snj ************************************************************************/
2277 1.88.2.6 snj static void
2278 1.88.2.6 snj ixgbe_get_slot_info(struct adapter *adapter)
2279 1.88.2.6 snj {
2280 1.88.2.6 snj device_t dev = adapter->dev;
2281 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2282 1.88.2.6 snj u32 offset;
2283 1.88.2.6 snj // struct ixgbe_mac_info *mac = &hw->mac;
2284 1.88.2.6 snj u16 link;
2285 1.88.2.6 snj int bus_info_valid = TRUE;
2286 1.48 msaitoh
2287 1.88.2.6 snj /* Some devices are behind an internal bridge */
2288 1.88.2.6 snj switch (hw->device_id) {
2289 1.88.2.6 snj case IXGBE_DEV_ID_82599_SFP_SF_QP:
2290 1.88.2.6 snj case IXGBE_DEV_ID_82599_QSFP_SF_QP:
2291 1.88.2.6 snj goto get_parent_info;
2292 1.88.2.6 snj default:
2293 1.88.2.6 snj break;
2294 1.88.2.6 snj }
2295 1.1 dyoung
2296 1.88.2.6 snj ixgbe_get_bus_info(hw);
2297 1.1 dyoung
2298 1.1 dyoung /*
2299 1.88.2.6 snj * Some devices don't use PCI-E, but there is no need
2300 1.88.2.6 snj * to display "Unknown" for bus speed and width.
2301 1.1 dyoung */
2302 1.88.2.6 snj switch (hw->mac.type) {
2303 1.88.2.6 snj case ixgbe_mac_X550EM_x:
2304 1.88.2.6 snj case ixgbe_mac_X550EM_a:
2305 1.88.2.6 snj return;
2306 1.88.2.6 snj default:
2307 1.88.2.6 snj goto display;
2308 1.88.2.6 snj }
2309 1.43 msaitoh
2310 1.88.2.6 snj get_parent_info:
2311 1.88.2.6 snj /*
2312 1.88.2.6 snj * For the Quad port adapter we need to parse back
2313 1.88.2.6 snj * up the PCI tree to find the speed of the expansion
2314 1.88.2.6 snj * slot into which this adapter is plugged. A bit more work.
2315 1.88.2.6 snj */
2316 1.88.2.6 snj dev = device_parent(device_parent(dev));
2317 1.88.2.6 snj #if 0
2318 1.88.2.6 snj #ifdef IXGBE_DEBUG
2319 1.88.2.6 snj device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev),
2320 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2321 1.88.2.6 snj #endif
2322 1.88.2.6 snj dev = device_parent(device_parent(dev));
2323 1.88.2.6 snj #ifdef IXGBE_DEBUG
2324 1.88.2.6 snj device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev),
2325 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2326 1.88.2.6 snj #endif
2327 1.88.2.6 snj #endif
2328 1.88.2.6 snj /* Now get the PCI Express Capabilities offset */
2329 1.88.2.6 snj if (pci_get_capability(adapter->osdep.pc, adapter->osdep.tag,
2330 1.88.2.6 snj PCI_CAP_PCIEXPRESS, &offset, NULL)) {
2331 1.88.2.6 snj /*
2332 1.88.2.6 snj * Hmm...can't get PCI-Express capabilities.
2333 1.88.2.6 snj * Falling back to default method.
2334 1.88.2.6 snj */
2335 1.88.2.6 snj bus_info_valid = FALSE;
2336 1.88.2.6 snj ixgbe_get_bus_info(hw);
2337 1.88.2.6 snj goto display;
2338 1.88.2.6 snj }
2339 1.88.2.6 snj /* ...and read the Link Status Register */
2340 1.88.2.6 snj link = pci_conf_read(adapter->osdep.pc, adapter->osdep.tag,
2341 1.88.2.10 martin offset + PCIE_LCSR) >> 16;
2342 1.88.2.10 martin ixgbe_set_pci_config_data_generic(hw, link);
2343 1.43 msaitoh
2344 1.88.2.6 snj display:
2345 1.88.2.6 snj device_printf(dev, "PCI Express Bus: Speed %s Width %s\n",
2346 1.88.2.6 snj ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" :
2347 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" :
2348 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" :
2349 1.88.2.6 snj "Unknown"),
2350 1.88.2.6 snj ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :
2351 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :
2352 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :
2353 1.88.2.6 snj "Unknown"));
2354 1.88.2.6 snj
2355 1.88.2.6 snj if (bus_info_valid) {
2356 1.88.2.6 snj if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2357 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&
2358 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500))) {
2359 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2360 1.88.2.6 snj " for this card\n is not sufficient for"
2361 1.88.2.6 snj " optimal performance.\n");
2362 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2363 1.88.2.6 snj "PCIE, or x4 PCIE Gen2 slot is required.\n");
2364 1.88.2.6 snj }
2365 1.88.2.6 snj if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2366 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&
2367 1.88.2.6 snj (hw->bus.speed < ixgbe_bus_speed_8000))) {
2368 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2369 1.88.2.6 snj " for this card\n is not sufficient for"
2370 1.88.2.6 snj " optimal performance.\n");
2371 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2372 1.88.2.6 snj "PCIE Gen3 slot is required.\n");
2373 1.88.2.6 snj }
2374 1.88.2.6 snj } else
2375 1.88.2.6 snj device_printf(dev, "Unable to determine slot speed/width. The speed/width reported are that of the internal switch.\n");
2376 1.43 msaitoh
2377 1.88.2.6 snj return;
2378 1.88.2.6 snj } /* ixgbe_get_slot_info */
2379 1.43 msaitoh
2380 1.88.2.6 snj /************************************************************************
2381 1.88.2.6 snj * ixgbe_enable_queue - MSI-X Interrupt Handlers and Tasklets
2382 1.88.2.6 snj ************************************************************************/
2383 1.88.2.6 snj static inline void
2384 1.88.2.6 snj ixgbe_enable_queue(struct adapter *adapter, u32 vector)
2385 1.43 msaitoh {
2386 1.43 msaitoh struct ixgbe_hw *hw = &adapter->hw;
2387 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2388 1.88.2.6 snj u32 mask;
2389 1.43 msaitoh
2390 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2391 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2392 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2393 1.88.2.6 snj } else {
2394 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2395 1.88.2.6 snj if (mask)
2396 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2397 1.88.2.6 snj mask = (queue >> 32);
2398 1.88.2.6 snj if (mask)
2399 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2400 1.88.2.6 snj }
2401 1.88.2.6 snj } /* ixgbe_enable_queue */
2402 1.88.2.6 snj
2403 1.88.2.6 snj /************************************************************************
2404 1.88.2.6 snj * ixgbe_disable_queue
2405 1.88.2.6 snj ************************************************************************/
2406 1.88.2.6 snj static inline void
2407 1.88.2.6 snj ixgbe_disable_queue(struct adapter *adapter, u32 vector)
2408 1.88.2.6 snj {
2409 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2410 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2411 1.88.2.6 snj u32 mask;
2412 1.55 msaitoh
2413 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2414 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2415 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2416 1.88.2.6 snj } else {
2417 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2418 1.88.2.6 snj if (mask)
2419 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2420 1.88.2.6 snj mask = (queue >> 32);
2421 1.88.2.6 snj if (mask)
2422 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2423 1.88.2.6 snj }
2424 1.88.2.6 snj } /* ixgbe_disable_queue */
2425 1.88.2.6 snj
2426 1.88.2.6 snj /************************************************************************
2427 1.88.2.6 snj * ixgbe_msix_que - MSI-X Queue Interrupt Service routine
2428 1.88.2.6 snj ************************************************************************/
2429 1.88.2.6 snj static int
2430 1.88.2.6 snj ixgbe_msix_que(void *arg)
2431 1.88.2.6 snj {
2432 1.88.2.6 snj struct ix_queue *que = arg;
2433 1.88.2.6 snj struct adapter *adapter = que->adapter;
2434 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2435 1.88.2.6 snj struct tx_ring *txr = que->txr;
2436 1.88.2.6 snj struct rx_ring *rxr = que->rxr;
2437 1.88.2.6 snj bool more;
2438 1.88.2.6 snj u32 newitr = 0;
2439 1.55 msaitoh
2440 1.88.2.6 snj /* Protect against spurious interrupts */
2441 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
2442 1.88.2.6 snj return 0;
2443 1.43 msaitoh
2444 1.88.2.6 snj ixgbe_disable_queue(adapter, que->msix);
2445 1.88.2.6 snj ++que->irqs.ev_count;
2446 1.43 msaitoh
2447 1.88.2.6 snj #ifdef __NetBSD__
2448 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
2449 1.88.2.6 snj more = true;
2450 1.88.2.6 snj #else
2451 1.88.2.6 snj more = ixgbe_rxeof(que);
2452 1.88.2.1 martin #endif
2453 1.43 msaitoh
2454 1.88.2.6 snj IXGBE_TX_LOCK(txr);
2455 1.88.2.6 snj ixgbe_txeof(txr);
2456 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
2457 1.55 msaitoh
2458 1.88.2.6 snj /* Do AIM now? */
2459 1.1 dyoung
2460 1.88.2.6 snj if (adapter->enable_aim == false)
2461 1.88.2.6 snj goto no_calc;
2462 1.88.2.6 snj /*
2463 1.88.2.6 snj * Do Adaptive Interrupt Moderation:
2464 1.88.2.6 snj * - Write out last calculated setting
2465 1.88.2.6 snj * - Calculate based on average size over
2466 1.88.2.6 snj * the last interval.
2467 1.88.2.6 snj */
2468 1.88.2.6 snj if (que->eitr_setting)
2469 1.88.2.10 martin ixgbe_eitr_write(que, que->eitr_setting);
2470 1.1 dyoung
2471 1.88.2.6 snj que->eitr_setting = 0;
2472 1.1 dyoung
2473 1.88.2.6 snj /* Idle, do nothing */
2474 1.88.2.6 snj if ((txr->bytes == 0) && (rxr->bytes == 0))
2475 1.88.2.6 snj goto no_calc;
2476 1.88.2.6 snj
2477 1.88.2.6 snj if ((txr->bytes) && (txr->packets))
2478 1.88.2.6 snj newitr = txr->bytes/txr->packets;
2479 1.88.2.6 snj if ((rxr->bytes) && (rxr->packets))
2480 1.88.2.6 snj newitr = max(newitr, (rxr->bytes / rxr->packets));
2481 1.88.2.6 snj newitr += 24; /* account for hardware frame, crc */
2482 1.1 dyoung
2483 1.88.2.6 snj /* set an upper boundary */
2484 1.88.2.6 snj newitr = min(newitr, 3000);
2485 1.43 msaitoh
2486 1.88.2.6 snj /* Be nice to the mid range */
2487 1.88.2.6 snj if ((newitr > 300) && (newitr < 1200))
2488 1.88.2.6 snj newitr = (newitr / 3);
2489 1.88.2.6 snj else
2490 1.88.2.6 snj newitr = (newitr / 2);
2491 1.88.2.6 snj
2492 1.88.2.10 martin /*
2493 1.88.2.10 martin * When RSC is used, ITR interval must be larger than RSC_DELAY.
2494 1.88.2.10 martin * Currently, we use 2us for RSC_DELAY. The minimum value is always
2495 1.88.2.10 martin * greater than 2us on 100M (and 10M?(not documented)), but it's not
2496 1.88.2.10 martin * on 1G and higher.
2497 1.88.2.10 martin */
2498 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
2499 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
2500 1.88.2.10 martin if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
2501 1.88.2.10 martin newitr = IXGBE_MIN_RSC_EITR_10G1G;
2502 1.88.2.10 martin }
2503 1.88.2.10 martin
2504 1.88.2.6 snj /* save for next interrupt */
2505 1.88.2.6 snj que->eitr_setting = newitr;
2506 1.88.2.6 snj
2507 1.88.2.6 snj /* Reset state */
2508 1.88.2.6 snj txr->bytes = 0;
2509 1.88.2.6 snj txr->packets = 0;
2510 1.88.2.6 snj rxr->bytes = 0;
2511 1.88.2.6 snj rxr->packets = 0;
2512 1.88.2.6 snj
2513 1.88.2.6 snj no_calc:
2514 1.88.2.6 snj if (more)
2515 1.88.2.6 snj softint_schedule(que->que_si);
2516 1.88.2.6 snj else
2517 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
2518 1.88.2.6 snj
2519 1.88.2.6 snj return 1;
2520 1.88.2.6 snj } /* ixgbe_msix_que */
2521 1.88.2.6 snj
2522 1.88.2.6 snj /************************************************************************
2523 1.88.2.6 snj * ixgbe_media_status - Media Ioctl callback
2524 1.1 dyoung *
2525 1.88.2.6 snj * Called whenever the user queries the status of
2526 1.88.2.6 snj * the interface using ifconfig.
2527 1.88.2.6 snj ************************************************************************/
2528 1.42 msaitoh static void
2529 1.88.2.6 snj ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
2530 1.1 dyoung {
2531 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2532 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2533 1.88.2.6 snj int layer;
2534 1.1 dyoung
2535 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_status: begin");
2536 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2537 1.88.2.6 snj ixgbe_update_link_status(adapter);
2538 1.1 dyoung
2539 1.88.2.6 snj ifmr->ifm_status = IFM_AVALID;
2540 1.88.2.6 snj ifmr->ifm_active = IFM_ETHER;
2541 1.1 dyoung
2542 1.88.2.6 snj if (!adapter->link_active) {
2543 1.88.2.6 snj ifmr->ifm_active |= IFM_NONE;
2544 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2545 1.88.2.6 snj return;
2546 1.88.2.6 snj }
2547 1.1 dyoung
2548 1.88.2.6 snj ifmr->ifm_status |= IFM_ACTIVE;
2549 1.88.2.6 snj layer = adapter->phy_layer;
2550 1.1 dyoung
2551 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T ||
2552 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_5GBASE_T ||
2553 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_T ||
2554 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_T ||
2555 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_100BASE_TX ||
2556 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_10BASE_T)
2557 1.88.2.6 snj switch (adapter->link_speed) {
2558 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2559 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2560 1.42 msaitoh break;
2561 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
2562 1.88.2.6 snj ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
2563 1.42 msaitoh break;
2564 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2565 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
2566 1.42 msaitoh break;
2567 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2568 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
2569 1.88.2.6 snj break;
2570 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
2571 1.88.2.6 snj ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
2572 1.88.2.6 snj break;
2573 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
2574 1.88.2.6 snj ifmr->ifm_active |= IFM_10_T | IFM_FDX;
2575 1.42 msaitoh break;
2576 1.1 dyoung }
2577 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
2578 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA)
2579 1.88.2.6 snj switch (adapter->link_speed) {
2580 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2581 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX;
2582 1.88.2.6 snj break;
2583 1.88.2.6 snj }
2584 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR)
2585 1.88.2.6 snj switch (adapter->link_speed) {
2586 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2587 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LR | IFM_FDX;
2588 1.88.2.6 snj break;
2589 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2590 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2591 1.88.2.6 snj break;
2592 1.88.2.6 snj }
2593 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM)
2594 1.88.2.6 snj switch (adapter->link_speed) {
2595 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2596 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX;
2597 1.88.2.6 snj break;
2598 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2599 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2600 1.88.2.6 snj break;
2601 1.88.2.6 snj }
2602 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR ||
2603 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
2604 1.88.2.6 snj switch (adapter->link_speed) {
2605 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2606 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2607 1.88.2.6 snj break;
2608 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2609 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
2610 1.88.2.6 snj break;
2611 1.88.2.6 snj }
2612 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
2613 1.88.2.6 snj switch (adapter->link_speed) {
2614 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2615 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2616 1.88.2.6 snj break;
2617 1.88.2.6 snj }
2618 1.88.2.6 snj /*
2619 1.88.2.6 snj * XXX: These need to use the proper media types once
2620 1.88.2.6 snj * they're added.
2621 1.88.2.6 snj */
2622 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
2623 1.88.2.6 snj switch (adapter->link_speed) {
2624 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2625 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2626 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2627 1.88.2.6 snj #else
2628 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KR | IFM_FDX;
2629 1.45 msaitoh #endif
2630 1.88.2.6 snj break;
2631 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2632 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2633 1.88.2.6 snj break;
2634 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2635 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2636 1.88.2.6 snj break;
2637 1.88.2.6 snj }
2638 1.88.2.6 snj else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
2639 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
2640 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
2641 1.88.2.6 snj switch (adapter->link_speed) {
2642 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2643 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2644 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2645 1.45 msaitoh #else
2646 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX;
2647 1.45 msaitoh #endif
2648 1.88.2.6 snj break;
2649 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2650 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2651 1.88.2.6 snj break;
2652 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2653 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2654 1.88.2.6 snj break;
2655 1.88.2.6 snj }
2656 1.88.2.6 snj
2657 1.88.2.6 snj /* If nothing is recognized... */
2658 1.88.2.6 snj #if 0
2659 1.88.2.6 snj if (IFM_SUBTYPE(ifmr->ifm_active) == 0)
2660 1.88.2.6 snj ifmr->ifm_active |= IFM_UNKNOWN;
2661 1.88.2.6 snj #endif
2662 1.88.2.6 snj
2663 1.88.2.6 snj ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
2664 1.88.2.6 snj
2665 1.88.2.6 snj /* Display current flow control setting used on link */
2666 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_rx_pause ||
2667 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2668 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_RXPAUSE;
2669 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_tx_pause ||
2670 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2671 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_TXPAUSE;
2672 1.88.2.6 snj
2673 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2674 1.1 dyoung
2675 1.42 msaitoh return;
2676 1.88.2.6 snj } /* ixgbe_media_status */
2677 1.1 dyoung
2678 1.88.2.6 snj /************************************************************************
2679 1.88.2.6 snj * ixgbe_media_change - Media Ioctl callback
2680 1.88.2.6 snj *
2681 1.88.2.6 snj * Called when the user changes speed/duplex using
2682 1.88.2.6 snj * media/mediopt option with ifconfig.
2683 1.88.2.6 snj ************************************************************************/
2684 1.88.2.6 snj static int
2685 1.88.2.6 snj ixgbe_media_change(struct ifnet *ifp)
2686 1.33 msaitoh {
2687 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2688 1.88.2.6 snj struct ifmedia *ifm = &adapter->media;
2689 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2690 1.88.2.6 snj ixgbe_link_speed speed = 0;
2691 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
2692 1.88.2.6 snj bool negotiate = false;
2693 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
2694 1.88.2.6 snj
2695 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_change: begin");
2696 1.88.2.6 snj
2697 1.88.2.6 snj if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2698 1.88.2.6 snj return (EINVAL);
2699 1.33 msaitoh
2700 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
2701 1.88.2.6 snj return (ENODEV);
2702 1.88.2.6 snj
2703 1.88.2.6 snj /*
2704 1.88.2.6 snj * We don't actually need to check against the supported
2705 1.88.2.6 snj * media types of the adapter; ifmedia will take care of
2706 1.88.2.6 snj * that for us.
2707 1.88.2.6 snj */
2708 1.88.2.6 snj switch (IFM_SUBTYPE(ifm->ifm_media)) {
2709 1.88.2.6 snj case IFM_AUTO:
2710 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
2711 1.88.2.6 snj &negotiate);
2712 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
2713 1.88.2.6 snj device_printf(adapter->dev, "Unable to determine "
2714 1.88.2.6 snj "supported advertise speeds\n");
2715 1.88.2.6 snj return (ENODEV);
2716 1.88.2.6 snj }
2717 1.88.2.6 snj speed |= link_caps;
2718 1.88.2.6 snj break;
2719 1.88.2.6 snj case IFM_10G_T:
2720 1.88.2.6 snj case IFM_10G_LRM:
2721 1.88.2.6 snj case IFM_10G_LR:
2722 1.88.2.6 snj case IFM_10G_TWINAX:
2723 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2724 1.88.2.6 snj case IFM_10G_SR: /* KR, too */
2725 1.88.2.6 snj case IFM_10G_CX4: /* KX4 */
2726 1.33 msaitoh #else
2727 1.88.2.6 snj case IFM_10G_KR:
2728 1.88.2.6 snj case IFM_10G_KX4:
2729 1.33 msaitoh #endif
2730 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
2731 1.44 msaitoh break;
2732 1.88.2.6 snj case IFM_5000_T:
2733 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
2734 1.44 msaitoh break;
2735 1.88.2.6 snj case IFM_2500_T:
2736 1.88.2.6 snj case IFM_2500_KX:
2737 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
2738 1.88.2.6 snj break;
2739 1.88.2.6 snj case IFM_1000_T:
2740 1.88.2.6 snj case IFM_1000_LX:
2741 1.88.2.6 snj case IFM_1000_SX:
2742 1.88.2.6 snj case IFM_1000_KX:
2743 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
2744 1.88.2.6 snj break;
2745 1.88.2.6 snj case IFM_100_TX:
2746 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
2747 1.88.2.6 snj break;
2748 1.88.2.6 snj case IFM_10_T:
2749 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
2750 1.44 msaitoh break;
2751 1.88.2.6 snj default:
2752 1.88.2.6 snj goto invalid;
2753 1.44 msaitoh }
2754 1.44 msaitoh
2755 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
2756 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
2757 1.88.2.6 snj adapter->advertise = 0;
2758 1.88.2.6 snj if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) {
2759 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0)
2760 1.88.2.6 snj adapter->advertise |= 1 << 2;
2761 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0)
2762 1.88.2.6 snj adapter->advertise |= 1 << 1;
2763 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0)
2764 1.88.2.6 snj adapter->advertise |= 1 << 0;
2765 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0)
2766 1.88.2.6 snj adapter->advertise |= 1 << 3;
2767 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0)
2768 1.88.2.6 snj adapter->advertise |= 1 << 4;
2769 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0)
2770 1.88.2.6 snj adapter->advertise |= 1 << 5;
2771 1.33 msaitoh }
2772 1.33 msaitoh
2773 1.88.2.6 snj return (0);
2774 1.33 msaitoh
2775 1.88.2.6 snj invalid:
2776 1.88.2.6 snj device_printf(adapter->dev, "Invalid media type!\n");
2777 1.33 msaitoh
2778 1.88.2.6 snj return (EINVAL);
2779 1.88.2.6 snj } /* ixgbe_media_change */
2780 1.1 dyoung
2781 1.88.2.6 snj /************************************************************************
2782 1.88.2.6 snj * ixgbe_set_promisc
2783 1.88.2.6 snj ************************************************************************/
2784 1.1 dyoung static void
2785 1.88.2.6 snj ixgbe_set_promisc(struct adapter *adapter)
2786 1.1 dyoung {
2787 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2788 1.88.2.6 snj int mcnt = 0;
2789 1.88.2.6 snj u32 rctl;
2790 1.88.2.6 snj struct ether_multi *enm;
2791 1.88.2.6 snj struct ether_multistep step;
2792 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
2793 1.1 dyoung
2794 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
2795 1.88.2.6 snj rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2796 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_UPE);
2797 1.88.2.6 snj if (ifp->if_flags & IFF_ALLMULTI)
2798 1.88.2.6 snj mcnt = MAX_NUM_MULTICAST_ADDRESSES;
2799 1.88.2.6 snj else {
2800 1.88.2.6 snj ETHER_LOCK(ec);
2801 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
2802 1.88.2.6 snj while (enm != NULL) {
2803 1.88.2.6 snj if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2804 1.88.2.6 snj break;
2805 1.88.2.6 snj mcnt++;
2806 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
2807 1.88.2.6 snj }
2808 1.88.2.6 snj ETHER_UNLOCK(ec);
2809 1.44 msaitoh }
2810 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES)
2811 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_MPE);
2812 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2813 1.1 dyoung
2814 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC) {
2815 1.88.2.6 snj rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2816 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2817 1.88.2.6 snj } else if (ifp->if_flags & IFF_ALLMULTI) {
2818 1.88.2.6 snj rctl |= IXGBE_FCTRL_MPE;
2819 1.88.2.6 snj rctl &= ~IXGBE_FCTRL_UPE;
2820 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2821 1.88.2.6 snj }
2822 1.88.2.6 snj } /* ixgbe_set_promisc */
2823 1.88.2.6 snj
2824 1.88.2.6 snj /************************************************************************
2825 1.88.2.6 snj * ixgbe_msix_link - Link status change ISR (MSI/MSI-X)
2826 1.88.2.6 snj ************************************************************************/
2827 1.88.2.6 snj static int
2828 1.88.2.6 snj ixgbe_msix_link(void *arg)
2829 1.88.2.6 snj {
2830 1.88.2.6 snj struct adapter *adapter = arg;
2831 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2832 1.88.2.6 snj u32 eicr, eicr_mask;
2833 1.88.2.6 snj s32 retval;
2834 1.1 dyoung
2835 1.88.2.6 snj ++adapter->link_irq.ev_count;
2836 1.1 dyoung
2837 1.88.2.6 snj /* Pause other interrupts */
2838 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);
2839 1.1 dyoung
2840 1.88.2.6 snj /* First get the cause */
2841 1.88.2.10 martin /*
2842 1.88.2.10 martin * The specifications of 82598, 82599, X540 and X550 say EICS register
2843 1.88.2.10 martin * is write only. However, Linux says it is a workaround for silicon
2844 1.88.2.10 martin * errata to read EICS instead of EICR to get interrupt cause. It seems
2845 1.88.2.10 martin * there is a problem about read clear mechanism for EICR register.
2846 1.88.2.10 martin */
2847 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2848 1.88.2.6 snj /* Be sure the queue bits are not cleared */
2849 1.88.2.6 snj eicr &= ~IXGBE_EICR_RTX_QUEUE;
2850 1.88.2.6 snj /* Clear interrupt with write */
2851 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2852 1.1 dyoung
2853 1.88.2.6 snj /* Link status change */
2854 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC) {
2855 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2856 1.88.2.6 snj softint_schedule(adapter->link_si);
2857 1.88.2.6 snj }
2858 1.33 msaitoh
2859 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
2860 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_FDIR) &&
2861 1.88.2.6 snj (eicr & IXGBE_EICR_FLOW_DIR)) {
2862 1.88.2.6 snj /* This is probably overkill :) */
2863 1.88.2.6 snj if (!atomic_cas_uint(&adapter->fdir_reinit, 0, 1))
2864 1.88.2.6 snj return 1;
2865 1.88.2.6 snj /* Disable the interrupt */
2866 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2867 1.88.2.6 snj softint_schedule(adapter->fdir_si);
2868 1.88.2.6 snj }
2869 1.82 msaitoh
2870 1.88.2.6 snj if (eicr & IXGBE_EICR_ECC) {
2871 1.88.2.6 snj device_printf(adapter->dev,
2872 1.88.2.6 snj "CRITICAL: ECC ERROR!! Please Reboot!!\n");
2873 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2874 1.88.2.6 snj }
2875 1.82 msaitoh
2876 1.88.2.6 snj /* Check for over temp condition */
2877 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR) {
2878 1.88.2.6 snj switch (adapter->hw.mac.type) {
2879 1.88.2.6 snj case ixgbe_mac_X550EM_a:
2880 1.88.2.6 snj if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a))
2881 1.88.2.6 snj break;
2882 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC,
2883 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
2884 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
2885 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
2886 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
2887 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
2888 1.88.2.6 snj break;
2889 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
2890 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
2891 1.88.2.6 snj break;
2892 1.88.2.6 snj default:
2893 1.88.2.6 snj if (!(eicr & IXGBE_EICR_TS))
2894 1.88.2.6 snj break;
2895 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
2896 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
2897 1.88.2.6 snj break;
2898 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
2899 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
2900 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS);
2901 1.88.2.6 snj break;
2902 1.88.2.6 snj }
2903 1.46 msaitoh }
2904 1.33 msaitoh
2905 1.88.2.6 snj /* Check for VF message */
2906 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_SRIOV) &&
2907 1.88.2.6 snj (eicr & IXGBE_EICR_MAILBOX))
2908 1.88.2.6 snj softint_schedule(adapter->mbx_si);
2909 1.88.2.6 snj }
2910 1.1 dyoung
2911 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
2912 1.88.2.6 snj /* Pluggable optics-related interrupt */
2913 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
2914 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2915 1.88.2.6 snj else
2916 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
2917 1.28 msaitoh
2918 1.88.2.6 snj if (eicr & eicr_mask) {
2919 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2920 1.88.2.6 snj softint_schedule(adapter->mod_si);
2921 1.88.2.6 snj }
2922 1.88.2.6 snj
2923 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
2924 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
2925 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
2926 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
2927 1.88.2.6 snj softint_schedule(adapter->msf_si);
2928 1.88.2.6 snj }
2929 1.1 dyoung }
2930 1.1 dyoung
2931 1.88.2.6 snj /* Check for fan failure */
2932 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
2933 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, TRUE);
2934 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
2935 1.88.2.6 snj }
2936 1.88.2.6 snj
2937 1.88.2.6 snj /* External PHY interrupt */
2938 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
2939 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2940 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);
2941 1.88.2.6 snj softint_schedule(adapter->phy_si);
2942 1.88.2.6 snj }
2943 1.88.2.6 snj
2944 1.88.2.6 snj /* Re-enable other interrupts */
2945 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
2946 1.88.2.6 snj return 1;
2947 1.88.2.6 snj } /* ixgbe_msix_link */
2948 1.88.2.6 snj
2949 1.88.2.10 martin static void
2950 1.88.2.10 martin ixgbe_eitr_write(struct ix_queue *que, uint32_t itr)
2951 1.88.2.10 martin {
2952 1.88.2.10 martin struct adapter *adapter = que->adapter;
2953 1.88.2.10 martin
2954 1.88.2.10 martin if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2955 1.88.2.10 martin itr |= itr << 16;
2956 1.88.2.10 martin else
2957 1.88.2.10 martin itr |= IXGBE_EITR_CNT_WDIS;
2958 1.88.2.10 martin
2959 1.88.2.10 martin IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(que->msix),
2960 1.88.2.10 martin itr);
2961 1.88.2.10 martin }
2962 1.88.2.10 martin
2963 1.88.2.10 martin
2964 1.88.2.6 snj /************************************************************************
2965 1.88.2.6 snj * ixgbe_sysctl_interrupt_rate_handler
2966 1.88.2.6 snj ************************************************************************/
2967 1.88.2.6 snj static int
2968 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS)
2969 1.88.2.6 snj {
2970 1.88.2.6 snj struct sysctlnode node = *rnode;
2971 1.88.2.6 snj struct ix_queue *que = (struct ix_queue *)node.sysctl_data;
2972 1.88.2.10 martin struct adapter *adapter = que->adapter;
2973 1.88.2.6 snj uint32_t reg, usec, rate;
2974 1.88.2.6 snj int error;
2975 1.88.2.6 snj
2976 1.88.2.6 snj if (que == NULL)
2977 1.88.2.6 snj return 0;
2978 1.88.2.6 snj reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix));
2979 1.88.2.6 snj usec = ((reg & 0x0FF8) >> 3);
2980 1.88.2.6 snj if (usec > 0)
2981 1.88.2.6 snj rate = 500000 / usec;
2982 1.88.2.6 snj else
2983 1.88.2.6 snj rate = 0;
2984 1.88.2.6 snj node.sysctl_data = &rate;
2985 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
2986 1.88.2.6 snj if (error || newp == NULL)
2987 1.88.2.6 snj return error;
2988 1.88.2.6 snj reg &= ~0xfff; /* default, no limitation */
2989 1.88.2.6 snj if (rate > 0 && rate < 500000) {
2990 1.88.2.6 snj if (rate < 1000)
2991 1.88.2.6 snj rate = 1000;
2992 1.88.2.6 snj reg |= ((4000000/rate) & 0xff8);
2993 1.88.2.10 martin /*
2994 1.88.2.10 martin * When RSC is used, ITR interval must be larger than
2995 1.88.2.10 martin * RSC_DELAY. Currently, we use 2us for RSC_DELAY.
2996 1.88.2.10 martin * The minimum value is always greater than 2us on 100M
2997 1.88.2.10 martin * (and 10M?(not documented)), but it's not on 1G and higher.
2998 1.88.2.10 martin */
2999 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
3000 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
3001 1.88.2.10 martin if ((adapter->num_queues > 1)
3002 1.88.2.10 martin && (reg < IXGBE_MIN_RSC_EITR_10G1G))
3003 1.88.2.10 martin return EINVAL;
3004 1.88.2.10 martin }
3005 1.88.2.10 martin ixgbe_max_interrupt_rate = rate;
3006 1.88.2.10 martin } else
3007 1.88.2.10 martin ixgbe_max_interrupt_rate = 0;
3008 1.88.2.10 martin ixgbe_eitr_write(que, reg);
3009 1.1 dyoung
3010 1.88.2.6 snj return (0);
3011 1.88.2.6 snj } /* ixgbe_sysctl_interrupt_rate_handler */
3012 1.33 msaitoh
3013 1.88.2.6 snj const struct sysctlnode *
3014 1.88.2.6 snj ixgbe_sysctl_instance(struct adapter *adapter)
3015 1.88.2.6 snj {
3016 1.88.2.6 snj const char *dvname;
3017 1.88.2.6 snj struct sysctllog **log;
3018 1.88.2.6 snj int rc;
3019 1.88.2.6 snj const struct sysctlnode *rnode;
3020 1.1 dyoung
3021 1.88.2.6 snj if (adapter->sysctltop != NULL)
3022 1.88.2.6 snj return adapter->sysctltop;
3023 1.1 dyoung
3024 1.88.2.6 snj log = &adapter->sysctllog;
3025 1.88.2.6 snj dvname = device_xname(adapter->dev);
3026 1.1 dyoung
3027 1.88.2.6 snj if ((rc = sysctl_createv(log, 0, NULL, &rnode,
3028 1.88.2.6 snj 0, CTLTYPE_NODE, dvname,
3029 1.88.2.6 snj SYSCTL_DESCR("ixgbe information and settings"),
3030 1.88.2.6 snj NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
3031 1.88.2.6 snj goto err;
3032 1.1 dyoung
3033 1.88.2.6 snj return rnode;
3034 1.88.2.6 snj err:
3035 1.88.2.6 snj printf("%s: sysctl_createv failed, rc = %d\n", __func__, rc);
3036 1.88.2.6 snj return NULL;
3037 1.1 dyoung }
3038 1.1 dyoung
3039 1.88.2.6 snj /************************************************************************
3040 1.88.2.6 snj * ixgbe_add_device_sysctls
3041 1.88.2.6 snj ************************************************************************/
3042 1.1 dyoung static void
3043 1.88.2.6 snj ixgbe_add_device_sysctls(struct adapter *adapter)
3044 1.1 dyoung {
3045 1.88.2.6 snj device_t dev = adapter->dev;
3046 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3047 1.88.2.6 snj struct sysctllog **log;
3048 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
3049 1.1 dyoung
3050 1.88.2.6 snj log = &adapter->sysctllog;
3051 1.1 dyoung
3052 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
3053 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
3054 1.1 dyoung return;
3055 1.88.2.6 snj }
3056 1.1 dyoung
3057 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3058 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3059 1.88.2.6 snj "num_rx_desc", SYSCTL_DESCR("Number of rx descriptors"),
3060 1.88.2.6 snj NULL, 0, &adapter->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0)
3061 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3062 1.1 dyoung
3063 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3064 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3065 1.88.2.6 snj "num_queues", SYSCTL_DESCR("Number of queues"),
3066 1.88.2.6 snj NULL, 0, &adapter->num_queues, 0, CTL_CREATE, CTL_EOL) != 0)
3067 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3068 1.1 dyoung
3069 1.88.2.6 snj /* Sysctls for all devices */
3070 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3071 1.88.2.6 snj CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC),
3072 1.88.2.6 snj ixgbe_sysctl_flowcntl, 0, (void *)adapter, 0, CTL_CREATE,
3073 1.88.2.6 snj CTL_EOL) != 0)
3074 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3075 1.1 dyoung
3076 1.88.2.6 snj adapter->enable_aim = ixgbe_enable_aim;
3077 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3078 1.88.2.6 snj CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"),
3079 1.88.2.6 snj NULL, 0, &adapter->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0)
3080 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3081 1.1 dyoung
3082 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3083 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
3084 1.88.2.6 snj "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED),
3085 1.88.2.6 snj ixgbe_sysctl_advertise, 0, (void *)adapter, 0, CTL_CREATE,
3086 1.88.2.6 snj CTL_EOL) != 0)
3087 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3088 1.88.2.6 snj
3089 1.88.2.6 snj #ifdef IXGBE_DEBUG
3090 1.88.2.6 snj /* testing sysctls (for all devices) */
3091 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3092 1.88.2.6 snj CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"),
3093 1.88.2.6 snj ixgbe_sysctl_power_state, 0, (void *)adapter, 0, CTL_CREATE,
3094 1.88.2.6 snj CTL_EOL) != 0)
3095 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3096 1.88.2.6 snj
3097 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY,
3098 1.88.2.6 snj CTLTYPE_STRING, "print_rss_config",
3099 1.88.2.6 snj SYSCTL_DESCR("Prints RSS Configuration"),
3100 1.88.2.6 snj ixgbe_sysctl_print_rss_config, 0, (void *)adapter, 0, CTL_CREATE,
3101 1.88.2.6 snj CTL_EOL) != 0)
3102 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3103 1.1 dyoung #endif
3104 1.88.2.6 snj /* for X550 series devices */
3105 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3106 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3107 1.88.2.6 snj CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"),
3108 1.88.2.6 snj ixgbe_sysctl_dmac, 0, (void *)adapter, 0, CTL_CREATE,
3109 1.88.2.6 snj CTL_EOL) != 0)
3110 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3111 1.1 dyoung
3112 1.88.2.6 snj /* for WoL-capable devices */
3113 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3114 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3115 1.88.2.6 snj CTLTYPE_BOOL, "wol_enable",
3116 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake on LAN"),
3117 1.88.2.6 snj ixgbe_sysctl_wol_enable, 0, (void *)adapter, 0, CTL_CREATE,
3118 1.88.2.6 snj CTL_EOL) != 0)
3119 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3120 1.1 dyoung
3121 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3122 1.88.2.6 snj CTLTYPE_INT, "wufc",
3123 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake Up Filters"),
3124 1.88.2.6 snj ixgbe_sysctl_wufc, 0, (void *)adapter, 0, CTL_CREATE,
3125 1.88.2.6 snj CTL_EOL) != 0)
3126 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3127 1.88.2.6 snj }
3128 1.35 msaitoh
3129 1.88.2.6 snj /* for X552/X557-AT devices */
3130 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3131 1.88.2.6 snj const struct sysctlnode *phy_node;
3132 1.1 dyoung
3133 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE,
3134 1.88.2.6 snj "phy", SYSCTL_DESCR("External PHY sysctls"),
3135 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) {
3136 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3137 1.88.2.6 snj return;
3138 1.33 msaitoh }
3139 1.88.2.6 snj
3140 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3141 1.88.2.6 snj CTLTYPE_INT, "temp",
3142 1.88.2.6 snj SYSCTL_DESCR("Current External PHY Temperature (Celsius)"),
3143 1.88.2.6 snj ixgbe_sysctl_phy_temp, 0, (void *)adapter, 0, CTL_CREATE,
3144 1.88.2.6 snj CTL_EOL) != 0)
3145 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3146 1.88.2.6 snj
3147 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3148 1.88.2.6 snj CTLTYPE_INT, "overtemp_occurred",
3149 1.88.2.6 snj SYSCTL_DESCR("External PHY High Temperature Event Occurred"),
3150 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)adapter, 0,
3151 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
3152 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3153 1.33 msaitoh }
3154 1.33 msaitoh
3155 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE) {
3156 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3157 1.88.2.6 snj CTLTYPE_INT, "eee_state",
3158 1.88.2.6 snj SYSCTL_DESCR("EEE Power Save State"),
3159 1.88.2.6 snj ixgbe_sysctl_eee_state, 0, (void *)adapter, 0, CTL_CREATE,
3160 1.88.2.6 snj CTL_EOL) != 0)
3161 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3162 1.88.2.6 snj }
3163 1.88.2.6 snj } /* ixgbe_add_device_sysctls */
3164 1.1 dyoung
3165 1.88.2.6 snj /************************************************************************
3166 1.88.2.6 snj * ixgbe_allocate_pci_resources
3167 1.88.2.6 snj ************************************************************************/
3168 1.88.2.6 snj static int
3169 1.88.2.6 snj ixgbe_allocate_pci_resources(struct adapter *adapter,
3170 1.88.2.6 snj const struct pci_attach_args *pa)
3171 1.88.2.6 snj {
3172 1.88.2.6 snj pcireg_t memtype;
3173 1.88.2.6 snj device_t dev = adapter->dev;
3174 1.88.2.6 snj bus_addr_t addr;
3175 1.88.2.6 snj int flags;
3176 1.88.2.6 snj
3177 1.88.2.6 snj memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
3178 1.88.2.6 snj switch (memtype) {
3179 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
3180 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
3181 1.88.2.6 snj adapter->osdep.mem_bus_space_tag = pa->pa_memt;
3182 1.88.2.6 snj if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0),
3183 1.88.2.6 snj memtype, &addr, &adapter->osdep.mem_size, &flags) != 0)
3184 1.88.2.6 snj goto map_err;
3185 1.88.2.6 snj if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) {
3186 1.88.2.6 snj aprint_normal_dev(dev, "clearing prefetchable bit\n");
3187 1.88.2.6 snj flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
3188 1.88.2.6 snj }
3189 1.88.2.6 snj if (bus_space_map(adapter->osdep.mem_bus_space_tag, addr,
3190 1.88.2.6 snj adapter->osdep.mem_size, flags,
3191 1.88.2.6 snj &adapter->osdep.mem_bus_space_handle) != 0) {
3192 1.88.2.6 snj map_err:
3193 1.88.2.6 snj adapter->osdep.mem_size = 0;
3194 1.88.2.6 snj aprint_error_dev(dev, "unable to map BAR0\n");
3195 1.88.2.6 snj return ENXIO;
3196 1.88.2.6 snj }
3197 1.88.2.6 snj break;
3198 1.88.2.6 snj default:
3199 1.88.2.6 snj aprint_error_dev(dev, "unexpected type on BAR0\n");
3200 1.88.2.6 snj return ENXIO;
3201 1.1 dyoung }
3202 1.1 dyoung
3203 1.88.2.6 snj return (0);
3204 1.88.2.6 snj } /* ixgbe_allocate_pci_resources */
3205 1.88.2.6 snj
3206 1.88.2.8 snj static void
3207 1.88.2.8 snj ixgbe_free_softint(struct adapter *adapter)
3208 1.88.2.8 snj {
3209 1.88.2.8 snj struct ix_queue *que = adapter->queues;
3210 1.88.2.8 snj struct tx_ring *txr = adapter->tx_rings;
3211 1.88.2.8 snj int i;
3212 1.88.2.8 snj
3213 1.88.2.8 snj for (i = 0; i < adapter->num_queues; i++, que++, txr++) {
3214 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
3215 1.88.2.8 snj if (txr->txr_si != NULL)
3216 1.88.2.8 snj softint_disestablish(txr->txr_si);
3217 1.88.2.8 snj }
3218 1.88.2.8 snj if (que->que_si != NULL)
3219 1.88.2.8 snj softint_disestablish(que->que_si);
3220 1.88.2.8 snj }
3221 1.88.2.8 snj
3222 1.88.2.8 snj /* Drain the Link queue */
3223 1.88.2.8 snj if (adapter->link_si != NULL) {
3224 1.88.2.8 snj softint_disestablish(adapter->link_si);
3225 1.88.2.8 snj adapter->link_si = NULL;
3226 1.88.2.8 snj }
3227 1.88.2.8 snj if (adapter->mod_si != NULL) {
3228 1.88.2.8 snj softint_disestablish(adapter->mod_si);
3229 1.88.2.8 snj adapter->mod_si = NULL;
3230 1.88.2.8 snj }
3231 1.88.2.8 snj if (adapter->msf_si != NULL) {
3232 1.88.2.8 snj softint_disestablish(adapter->msf_si);
3233 1.88.2.8 snj adapter->msf_si = NULL;
3234 1.88.2.8 snj }
3235 1.88.2.8 snj if (adapter->phy_si != NULL) {
3236 1.88.2.8 snj softint_disestablish(adapter->phy_si);
3237 1.88.2.8 snj adapter->phy_si = NULL;
3238 1.88.2.8 snj }
3239 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR) {
3240 1.88.2.8 snj if (adapter->fdir_si != NULL) {
3241 1.88.2.8 snj softint_disestablish(adapter->fdir_si);
3242 1.88.2.8 snj adapter->fdir_si = NULL;
3243 1.88.2.8 snj }
3244 1.88.2.8 snj }
3245 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
3246 1.88.2.8 snj if (adapter->mbx_si != NULL) {
3247 1.88.2.8 snj softint_disestablish(adapter->mbx_si);
3248 1.88.2.8 snj adapter->mbx_si = NULL;
3249 1.88.2.8 snj }
3250 1.88.2.8 snj }
3251 1.88.2.8 snj } /* ixgbe_free_softint */
3252 1.88.2.8 snj
3253 1.88.2.6 snj /************************************************************************
3254 1.88.2.6 snj * ixgbe_detach - Device removal routine
3255 1.88.2.6 snj *
3256 1.88.2.6 snj * Called when the driver is being removed.
3257 1.88.2.6 snj * Stops the adapter and deallocates all the resources
3258 1.88.2.6 snj * that were allocated for driver operation.
3259 1.88.2.6 snj *
3260 1.88.2.6 snj * return 0 on success, positive on failure
3261 1.88.2.6 snj ************************************************************************/
3262 1.88.2.6 snj static int
3263 1.88.2.6 snj ixgbe_detach(device_t dev, int flags)
3264 1.1 dyoung {
3265 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3266 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
3267 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
3268 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3269 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
3270 1.88.2.6 snj u32 ctrl_ext;
3271 1.1 dyoung
3272 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_detach: begin");
3273 1.88.2.6 snj if (adapter->osdep.attached == false)
3274 1.88.2.6 snj return 0;
3275 1.28 msaitoh
3276 1.88.2.6 snj if (ixgbe_pci_iov_detach(dev) != 0) {
3277 1.88.2.6 snj device_printf(dev, "SR-IOV in use; detach first.\n");
3278 1.88.2.6 snj return (EBUSY);
3279 1.1 dyoung }
3280 1.1 dyoung
3281 1.88.2.6 snj /* Stop the interface. Callouts are stopped in it. */
3282 1.88.2.6 snj ixgbe_ifstop(adapter->ifp, 1);
3283 1.88.2.6 snj #if NVLAN > 0
3284 1.88.2.6 snj /* Make sure VLANs are not using driver */
3285 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
3286 1.88.2.6 snj ; /* nothing to do: no VLANs */
3287 1.88.2.6 snj else if ((flags & (DETACH_SHUTDOWN|DETACH_FORCE)) != 0)
3288 1.88.2.6 snj vlan_ifdetach(adapter->ifp);
3289 1.88.2.6 snj else {
3290 1.88.2.6 snj aprint_error_dev(dev, "VLANs in use, detach first\n");
3291 1.88.2.6 snj return (EBUSY);
3292 1.88.2.6 snj }
3293 1.45 msaitoh #endif
3294 1.88.2.6 snj
3295 1.88.2.6 snj pmf_device_deregister(dev);
3296 1.88.2.6 snj
3297 1.88.2.6 snj ether_ifdetach(adapter->ifp);
3298 1.88.2.6 snj /* Stop the adapter */
3299 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3300 1.88.2.6 snj ixgbe_setup_low_power_mode(adapter);
3301 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3302 1.88.2.6 snj
3303 1.88.2.8 snj ixgbe_free_softint(adapter);
3304 1.88.2.8 snj
3305 1.88.2.6 snj /* let hardware know driver is unloading */
3306 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
3307 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
3308 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
3309 1.1 dyoung
3310 1.88.2.6 snj callout_halt(&adapter->timer, NULL);
3311 1.1 dyoung
3312 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
3313 1.88.2.6 snj netmap_detach(adapter->ifp);
3314 1.1 dyoung
3315 1.88.2.6 snj ixgbe_free_pci_resources(adapter);
3316 1.88.2.6 snj #if 0 /* XXX the NetBSD port is probably missing something here */
3317 1.88.2.6 snj bus_generic_detach(dev);
3318 1.88.2.6 snj #endif
3319 1.88.2.6 snj if_detach(adapter->ifp);
3320 1.88.2.6 snj if_percpuq_destroy(adapter->ipq);
3321 1.33 msaitoh
3322 1.88.2.6 snj sysctl_teardown(&adapter->sysctllog);
3323 1.88.2.6 snj evcnt_detach(&adapter->handleq);
3324 1.88.2.6 snj evcnt_detach(&adapter->req);
3325 1.88.2.6 snj evcnt_detach(&adapter->efbig_tx_dma_setup);
3326 1.88.2.6 snj evcnt_detach(&adapter->mbuf_defrag_failed);
3327 1.88.2.6 snj evcnt_detach(&adapter->efbig2_tx_dma_setup);
3328 1.88.2.6 snj evcnt_detach(&adapter->einval_tx_dma_setup);
3329 1.88.2.6 snj evcnt_detach(&adapter->other_tx_dma_setup);
3330 1.88.2.6 snj evcnt_detach(&adapter->eagain_tx_dma_setup);
3331 1.88.2.6 snj evcnt_detach(&adapter->enomem_tx_dma_setup);
3332 1.88.2.6 snj evcnt_detach(&adapter->watchdog_events);
3333 1.88.2.6 snj evcnt_detach(&adapter->tso_err);
3334 1.88.2.6 snj evcnt_detach(&adapter->link_irq);
3335 1.33 msaitoh
3336 1.88.2.6 snj txr = adapter->tx_rings;
3337 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
3338 1.88.2.6 snj evcnt_detach(&adapter->queues[i].irqs);
3339 1.88.2.6 snj evcnt_detach(&txr->no_desc_avail);
3340 1.88.2.6 snj evcnt_detach(&txr->total_packets);
3341 1.88.2.6 snj evcnt_detach(&txr->tso_tx);
3342 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
3343 1.88.2.6 snj evcnt_detach(&txr->pcq_drops);
3344 1.33 msaitoh #endif
3345 1.33 msaitoh
3346 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
3347 1.88.2.6 snj evcnt_detach(&stats->mpc[i]);
3348 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3349 1.88.2.6 snj evcnt_detach(&stats->rnbc[i]);
3350 1.88.2.6 snj }
3351 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
3352 1.88.2.6 snj evcnt_detach(&stats->pxontxc[i]);
3353 1.88.2.6 snj evcnt_detach(&stats->pxonrxc[i]);
3354 1.88.2.6 snj evcnt_detach(&stats->pxofftxc[i]);
3355 1.88.2.6 snj evcnt_detach(&stats->pxoffrxc[i]);
3356 1.88.2.6 snj evcnt_detach(&stats->pxon2offc[i]);
3357 1.88.2.6 snj }
3358 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
3359 1.88.2.6 snj evcnt_detach(&stats->qprc[i]);
3360 1.88.2.6 snj evcnt_detach(&stats->qptc[i]);
3361 1.88.2.6 snj evcnt_detach(&stats->qbrc[i]);
3362 1.88.2.6 snj evcnt_detach(&stats->qbtc[i]);
3363 1.88.2.6 snj evcnt_detach(&stats->qprdc[i]);
3364 1.88.2.6 snj }
3365 1.88.2.6 snj
3366 1.88.2.6 snj evcnt_detach(&rxr->rx_packets);
3367 1.88.2.6 snj evcnt_detach(&rxr->rx_bytes);
3368 1.88.2.6 snj evcnt_detach(&rxr->rx_copies);
3369 1.88.2.6 snj evcnt_detach(&rxr->no_jmbuf);
3370 1.88.2.6 snj evcnt_detach(&rxr->rx_discarded);
3371 1.33 msaitoh }
3372 1.88.2.6 snj evcnt_detach(&stats->ipcs);
3373 1.88.2.6 snj evcnt_detach(&stats->l4cs);
3374 1.88.2.6 snj evcnt_detach(&stats->ipcs_bad);
3375 1.88.2.6 snj evcnt_detach(&stats->l4cs_bad);
3376 1.88.2.6 snj evcnt_detach(&stats->intzero);
3377 1.88.2.6 snj evcnt_detach(&stats->legint);
3378 1.88.2.6 snj evcnt_detach(&stats->crcerrs);
3379 1.88.2.6 snj evcnt_detach(&stats->illerrc);
3380 1.88.2.6 snj evcnt_detach(&stats->errbc);
3381 1.88.2.6 snj evcnt_detach(&stats->mspdc);
3382 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3383 1.88.2.6 snj evcnt_detach(&stats->mbsdc);
3384 1.88.2.6 snj evcnt_detach(&stats->mpctotal);
3385 1.88.2.6 snj evcnt_detach(&stats->mlfc);
3386 1.88.2.6 snj evcnt_detach(&stats->mrfc);
3387 1.88.2.6 snj evcnt_detach(&stats->rlec);
3388 1.88.2.6 snj evcnt_detach(&stats->lxontxc);
3389 1.88.2.6 snj evcnt_detach(&stats->lxonrxc);
3390 1.88.2.6 snj evcnt_detach(&stats->lxofftxc);
3391 1.88.2.6 snj evcnt_detach(&stats->lxoffrxc);
3392 1.88.2.6 snj
3393 1.88.2.6 snj /* Packet Reception Stats */
3394 1.88.2.6 snj evcnt_detach(&stats->tor);
3395 1.88.2.6 snj evcnt_detach(&stats->gorc);
3396 1.88.2.6 snj evcnt_detach(&stats->tpr);
3397 1.88.2.6 snj evcnt_detach(&stats->gprc);
3398 1.88.2.6 snj evcnt_detach(&stats->mprc);
3399 1.88.2.6 snj evcnt_detach(&stats->bprc);
3400 1.88.2.6 snj evcnt_detach(&stats->prc64);
3401 1.88.2.6 snj evcnt_detach(&stats->prc127);
3402 1.88.2.6 snj evcnt_detach(&stats->prc255);
3403 1.88.2.6 snj evcnt_detach(&stats->prc511);
3404 1.88.2.6 snj evcnt_detach(&stats->prc1023);
3405 1.88.2.6 snj evcnt_detach(&stats->prc1522);
3406 1.88.2.6 snj evcnt_detach(&stats->ruc);
3407 1.88.2.6 snj evcnt_detach(&stats->rfc);
3408 1.88.2.6 snj evcnt_detach(&stats->roc);
3409 1.88.2.6 snj evcnt_detach(&stats->rjc);
3410 1.88.2.6 snj evcnt_detach(&stats->mngprc);
3411 1.88.2.6 snj evcnt_detach(&stats->mngpdc);
3412 1.88.2.6 snj evcnt_detach(&stats->xec);
3413 1.33 msaitoh
3414 1.88.2.6 snj /* Packet Transmission Stats */
3415 1.88.2.6 snj evcnt_detach(&stats->gotc);
3416 1.88.2.6 snj evcnt_detach(&stats->tpt);
3417 1.88.2.6 snj evcnt_detach(&stats->gptc);
3418 1.88.2.6 snj evcnt_detach(&stats->bptc);
3419 1.88.2.6 snj evcnt_detach(&stats->mptc);
3420 1.88.2.6 snj evcnt_detach(&stats->mngptc);
3421 1.88.2.6 snj evcnt_detach(&stats->ptc64);
3422 1.88.2.6 snj evcnt_detach(&stats->ptc127);
3423 1.88.2.6 snj evcnt_detach(&stats->ptc255);
3424 1.88.2.6 snj evcnt_detach(&stats->ptc511);
3425 1.88.2.6 snj evcnt_detach(&stats->ptc1023);
3426 1.88.2.6 snj evcnt_detach(&stats->ptc1522);
3427 1.33 msaitoh
3428 1.88.2.6 snj ixgbe_free_transmit_structures(adapter);
3429 1.88.2.6 snj ixgbe_free_receive_structures(adapter);
3430 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
3431 1.88.2.6 snj free(adapter->mta, M_DEVBUF);
3432 1.33 msaitoh
3433 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
3434 1.33 msaitoh
3435 1.88.2.6 snj return (0);
3436 1.88.2.6 snj } /* ixgbe_detach */
3437 1.33 msaitoh
3438 1.88.2.6 snj /************************************************************************
3439 1.88.2.6 snj * ixgbe_setup_low_power_mode - LPLU/WoL preparation
3440 1.88.2.6 snj *
3441 1.88.2.6 snj * Prepare the adapter/port for LPLU and/or WoL
3442 1.88.2.6 snj ************************************************************************/
3443 1.88.2.6 snj static int
3444 1.88.2.6 snj ixgbe_setup_low_power_mode(struct adapter *adapter)
3445 1.1 dyoung {
3446 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3447 1.88.2.6 snj device_t dev = adapter->dev;
3448 1.88.2.6 snj s32 error = 0;
3449 1.1 dyoung
3450 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3451 1.1 dyoung
3452 1.88.2.6 snj /* Limit power management flow to X550EM baseT */
3453 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
3454 1.88.2.6 snj hw->phy.ops.enter_lplu) {
3455 1.88.2.6 snj /* X550EM baseT adapters need a special LPLU flow */
3456 1.88.2.6 snj hw->phy.reset_disable = true;
3457 1.88.2.6 snj ixgbe_stop(adapter);
3458 1.88.2.6 snj error = hw->phy.ops.enter_lplu(hw);
3459 1.88.2.6 snj if (error)
3460 1.88.2.6 snj device_printf(dev,
3461 1.88.2.6 snj "Error entering LPLU: %d\n", error);
3462 1.88.2.6 snj hw->phy.reset_disable = false;
3463 1.88.2.6 snj } else {
3464 1.88.2.6 snj /* Just stop for other adapters */
3465 1.88.2.6 snj ixgbe_stop(adapter);
3466 1.88.2.6 snj }
3467 1.1 dyoung
3468 1.88.2.6 snj if (!hw->wol_enabled) {
3469 1.88.2.6 snj ixgbe_set_phy_power(hw, FALSE);
3470 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3471 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
3472 1.88.2.6 snj } else {
3473 1.88.2.6 snj /* Turn off support for APM wakeup. (Using ACPI instead) */
3474 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_GRC,
3475 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2);
3476 1.1 dyoung
3477 1.88.2.6 snj /*
3478 1.88.2.6 snj * Clear Wake Up Status register to prevent any previous wakeup
3479 1.88.2.6 snj * events from waking us up immediately after we suspend.
3480 1.88.2.6 snj */
3481 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3482 1.88.2.6 snj
3483 1.88.2.6 snj /*
3484 1.88.2.6 snj * Program the Wakeup Filter Control register with user filter
3485 1.88.2.6 snj * settings
3486 1.88.2.6 snj */
3487 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc);
3488 1.88.2.6 snj
3489 1.88.2.6 snj /* Enable wakeups and power management in Wakeup Control */
3490 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC,
3491 1.88.2.6 snj IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
3492 1.1 dyoung
3493 1.1 dyoung }
3494 1.1 dyoung
3495 1.88.2.6 snj return error;
3496 1.88.2.6 snj } /* ixgbe_setup_low_power_mode */
3497 1.88.2.6 snj
3498 1.88.2.6 snj /************************************************************************
3499 1.88.2.6 snj * ixgbe_shutdown - Shutdown entry point
3500 1.88.2.6 snj ************************************************************************/
3501 1.88.2.6 snj #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */
3502 1.88.2.6 snj static int
3503 1.88.2.6 snj ixgbe_shutdown(device_t dev)
3504 1.1 dyoung {
3505 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3506 1.88.2.6 snj int error = 0;
3507 1.1 dyoung
3508 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_shutdown: begin");
3509 1.1 dyoung
3510 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3511 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3512 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3513 1.1 dyoung
3514 1.88.2.6 snj return (error);
3515 1.88.2.6 snj } /* ixgbe_shutdown */
3516 1.88.2.6 snj #endif
3517 1.1 dyoung
3518 1.88.2.6 snj /************************************************************************
3519 1.88.2.6 snj * ixgbe_suspend
3520 1.88.2.6 snj *
3521 1.88.2.6 snj * From D0 to D3
3522 1.88.2.6 snj ************************************************************************/
3523 1.45 msaitoh static bool
3524 1.88.2.6 snj ixgbe_suspend(device_t dev, const pmf_qual_t *qual)
3525 1.1 dyoung {
3526 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3527 1.88.2.6 snj int error = 0;
3528 1.1 dyoung
3529 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_suspend: begin");
3530 1.1 dyoung
3531 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3532 1.88.2.6 snj
3533 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3534 1.88.2.6 snj
3535 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3536 1.88.2.6 snj
3537 1.88.2.6 snj return (error);
3538 1.88.2.6 snj } /* ixgbe_suspend */
3539 1.88.2.6 snj
3540 1.88.2.6 snj /************************************************************************
3541 1.88.2.6 snj * ixgbe_resume
3542 1.88.2.6 snj *
3543 1.88.2.6 snj * From D3 to D0
3544 1.88.2.6 snj ************************************************************************/
3545 1.88.2.6 snj static bool
3546 1.88.2.6 snj ixgbe_resume(device_t dev, const pmf_qual_t *qual)
3547 1.1 dyoung {
3548 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3549 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3550 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
3551 1.88.2.6 snj u32 wus;
3552 1.1 dyoung
3553 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_resume: begin");
3554 1.48 msaitoh
3555 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3556 1.88.2.6 snj
3557 1.88.2.6 snj /* Read & clear WUS register */
3558 1.88.2.6 snj wus = IXGBE_READ_REG(hw, IXGBE_WUS);
3559 1.88.2.6 snj if (wus)
3560 1.88.2.6 snj device_printf(dev, "Woken up by (WUS): %#010x\n",
3561 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_WUS));
3562 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3563 1.88.2.6 snj /* And clear WUFC until next low-power transition */
3564 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3565 1.88.2.6 snj
3566 1.88.2.6 snj /*
3567 1.88.2.6 snj * Required after D3->D0 transition;
3568 1.88.2.6 snj * will re-advertise all previous advertised speeds
3569 1.88.2.6 snj */
3570 1.88.2.6 snj if (ifp->if_flags & IFF_UP)
3571 1.88.2.6 snj ixgbe_init_locked(adapter);
3572 1.88.2.6 snj
3573 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3574 1.88.2.6 snj
3575 1.88.2.6 snj return true;
3576 1.88.2.6 snj } /* ixgbe_resume */
3577 1.1 dyoung
3578 1.1 dyoung /*
3579 1.88.2.6 snj * Set the various hardware offload abilities.
3580 1.88.2.6 snj *
3581 1.88.2.6 snj * This takes the ifnet's if_capenable flags (e.g. set by the user using
3582 1.88.2.6 snj * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what
3583 1.88.2.6 snj * mbuf offload flags the driver will understand.
3584 1.88.2.6 snj */
3585 1.1 dyoung static void
3586 1.88.2.6 snj ixgbe_set_if_hwassist(struct adapter *adapter)
3587 1.1 dyoung {
3588 1.88.2.6 snj /* XXX */
3589 1.88.2.6 snj }
3590 1.88.2.6 snj
3591 1.88.2.6 snj /************************************************************************
3592 1.88.2.6 snj * ixgbe_init_locked - Init entry point
3593 1.88.2.6 snj *
3594 1.88.2.6 snj * Used in two ways: It is used by the stack as an init
3595 1.88.2.6 snj * entry point in network interface structure. It is also
3596 1.88.2.6 snj * used by the driver as a hw/sw initialization routine to
3597 1.88.2.6 snj * get to a consistent state.
3598 1.88.2.6 snj *
3599 1.88.2.6 snj * return 0 on success, positive on failure
3600 1.88.2.6 snj ************************************************************************/
3601 1.88.2.6 snj static void
3602 1.88.2.6 snj ixgbe_init_locked(struct adapter *adapter)
3603 1.88.2.6 snj {
3604 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3605 1.88.2.6 snj device_t dev = adapter->dev;
3606 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3607 1.88.2.6 snj struct tx_ring *txr;
3608 1.88.2.6 snj struct rx_ring *rxr;
3609 1.88.2.6 snj u32 txdctl, mhadd;
3610 1.88.2.6 snj u32 rxdctl, rxctrl;
3611 1.88.2.6 snj u32 ctrl_ext;
3612 1.88.2.6 snj int err = 0;
3613 1.1 dyoung
3614 1.88.2.6 snj /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */
3615 1.65 msaitoh
3616 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3617 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_init_locked: begin");
3618 1.51 msaitoh
3619 1.88.2.6 snj hw->adapter_stopped = FALSE;
3620 1.88.2.6 snj ixgbe_stop_adapter(hw);
3621 1.88.2.6 snj callout_stop(&adapter->timer);
3622 1.51 msaitoh
3623 1.88.2.6 snj /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */
3624 1.88.2.6 snj adapter->max_frame_size =
3625 1.88.2.6 snj ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
3626 1.51 msaitoh
3627 1.88.2.6 snj /* Queue indices may change with IOV mode */
3628 1.88.2.6 snj ixgbe_align_all_queue_indices(adapter);
3629 1.51 msaitoh
3630 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
3631 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV);
3632 1.88.2.6 snj
3633 1.88.2.6 snj /* Get the latest mac address, User can use a LAA */
3634 1.88.2.6 snj memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl),
3635 1.88.2.6 snj IXGBE_ETH_LENGTH_OF_ADDRESS);
3636 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1);
3637 1.88.2.6 snj hw->addr_ctrl.rar_used_count = 1;
3638 1.88.2.6 snj
3639 1.88.2.6 snj /* Set hardware offload abilities from ifnet flags */
3640 1.88.2.6 snj ixgbe_set_if_hwassist(adapter);
3641 1.88.2.6 snj
3642 1.88.2.6 snj /* Prepare transmit descriptors and buffers */
3643 1.88.2.6 snj if (ixgbe_setup_transmit_structures(adapter)) {
3644 1.88.2.6 snj device_printf(dev, "Could not setup transmit structures\n");
3645 1.88.2.6 snj ixgbe_stop(adapter);
3646 1.88.2.6 snj return;
3647 1.1 dyoung }
3648 1.45 msaitoh
3649 1.88.2.6 snj ixgbe_init_hw(hw);
3650 1.88.2.6 snj ixgbe_initialize_iov(adapter);
3651 1.88.2.6 snj ixgbe_initialize_transmit_units(adapter);
3652 1.88.2.6 snj
3653 1.88.2.6 snj /* Setup Multicast table */
3654 1.88.2.6 snj ixgbe_set_multi(adapter);
3655 1.88.2.6 snj
3656 1.88.2.6 snj /* Determine the correct mbuf pool, based on frame size */
3657 1.88.2.6 snj if (adapter->max_frame_size <= MCLBYTES)
3658 1.88.2.6 snj adapter->rx_mbuf_sz = MCLBYTES;
3659 1.88.2.6 snj else
3660 1.88.2.6 snj adapter->rx_mbuf_sz = MJUMPAGESIZE;
3661 1.88.2.6 snj
3662 1.88.2.6 snj /* Prepare receive descriptors and buffers */
3663 1.88.2.6 snj if (ixgbe_setup_receive_structures(adapter)) {
3664 1.88.2.6 snj device_printf(dev, "Could not setup receive structures\n");
3665 1.88.2.6 snj ixgbe_stop(adapter);
3666 1.88.2.6 snj return;
3667 1.51 msaitoh }
3668 1.88.2.6 snj
3669 1.88.2.6 snj /* Configure RX settings */
3670 1.88.2.6 snj ixgbe_initialize_receive_units(adapter);
3671 1.88.2.6 snj
3672 1.88.2.6 snj /* Enable SDP & MSI-X interrupts based on adapter */
3673 1.88.2.6 snj ixgbe_config_gpie(adapter);
3674 1.88.2.6 snj
3675 1.88.2.6 snj /* Set MTU size */
3676 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU) {
3677 1.88.2.6 snj /* aka IXGBE_MAXFRS on 82599 and newer */
3678 1.88.2.6 snj mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3679 1.88.2.6 snj mhadd &= ~IXGBE_MHADD_MFS_MASK;
3680 1.88.2.6 snj mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT;
3681 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3682 1.1 dyoung }
3683 1.51 msaitoh
3684 1.88.2.6 snj /* Now enable all the queues */
3685 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
3686 1.88.2.6 snj txr = &adapter->tx_rings[i];
3687 1.88.2.6 snj txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
3688 1.88.2.6 snj txdctl |= IXGBE_TXDCTL_ENABLE;
3689 1.88.2.6 snj /* Set WTHRESH to 8, burst writeback */
3690 1.88.2.6 snj txdctl |= (8 << 16);
3691 1.88.2.6 snj /*
3692 1.88.2.6 snj * When the internal queue falls below PTHRESH (32),
3693 1.88.2.6 snj * start prefetching as long as there are at least
3694 1.88.2.6 snj * HTHRESH (1) buffers ready. The values are taken
3695 1.88.2.6 snj * from the Intel linux driver 3.8.21.
3696 1.88.2.6 snj * Prefetching enables tx line rate even with 1 queue.
3697 1.88.2.6 snj */
3698 1.88.2.6 snj txdctl |= (32 << 0) | (1 << 8);
3699 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
3700 1.88.2.6 snj }
3701 1.64 msaitoh
3702 1.88.2.6 snj for (int i = 0, j = 0; i < adapter->num_queues; i++) {
3703 1.88.2.6 snj rxr = &adapter->rx_rings[i];
3704 1.88.2.6 snj rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
3705 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
3706 1.88.2.6 snj /*
3707 1.88.2.6 snj * PTHRESH = 21
3708 1.88.2.6 snj * HTHRESH = 4
3709 1.88.2.6 snj * WTHRESH = 8
3710 1.88.2.6 snj */
3711 1.88.2.6 snj rxdctl &= ~0x3FFFFF;
3712 1.88.2.6 snj rxdctl |= 0x080420;
3713 1.88.2.6 snj }
3714 1.88.2.6 snj rxdctl |= IXGBE_RXDCTL_ENABLE;
3715 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
3716 1.88.2.6 snj for (; j < 10; j++) {
3717 1.88.2.6 snj if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &
3718 1.88.2.6 snj IXGBE_RXDCTL_ENABLE)
3719 1.88.2.6 snj break;
3720 1.88.2.6 snj else
3721 1.88.2.6 snj msec_delay(1);
3722 1.88.2.6 snj }
3723 1.88.2.6 snj wmb();
3724 1.1 dyoung
3725 1.88.2.6 snj /*
3726 1.88.2.6 snj * In netmap mode, we must preserve the buffers made
3727 1.88.2.6 snj * available to userspace before the if_init()
3728 1.88.2.6 snj * (this is true by default on the TX side, because
3729 1.88.2.6 snj * init makes all buffers available to userspace).
3730 1.88.2.6 snj *
3731 1.88.2.6 snj * netmap_reset() and the device specific routines
3732 1.88.2.6 snj * (e.g. ixgbe_setup_receive_rings()) map these
3733 1.88.2.6 snj * buffers at the end of the NIC ring, so here we
3734 1.88.2.6 snj * must set the RDT (tail) register to make sure
3735 1.88.2.6 snj * they are not overwritten.
3736 1.88.2.6 snj *
3737 1.88.2.6 snj * In this driver the NIC ring starts at RDH = 0,
3738 1.88.2.6 snj * RDT points to the last slot available for reception (?),
3739 1.88.2.6 snj * so RDT = num_rx_desc - 1 means the whole ring is available.
3740 1.88.2.6 snj */
3741 1.88.2.6 snj #ifdef DEV_NETMAP
3742 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
3743 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP)) {
3744 1.88.2.6 snj struct netmap_adapter *na = NA(adapter->ifp);
3745 1.88.2.6 snj struct netmap_kring *kring = &na->rx_rings[i];
3746 1.88.2.6 snj int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring);
3747 1.1 dyoung
3748 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t);
3749 1.88.2.6 snj } else
3750 1.88.2.6 snj #endif /* DEV_NETMAP */
3751 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me),
3752 1.88.2.6 snj adapter->num_rx_desc - 1);
3753 1.88.2.6 snj }
3754 1.43 msaitoh
3755 1.88.2.6 snj /* Enable Receive engine */
3756 1.88.2.6 snj rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3757 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3758 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_DMBYPS;
3759 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_RXEN;
3760 1.88.2.6 snj ixgbe_enable_rx_dma(hw, rxctrl);
3761 1.1 dyoung
3762 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
3763 1.43 msaitoh
3764 1.88.2.6 snj /* Set up MSI-X routing */
3765 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
3766 1.88.2.6 snj ixgbe_configure_ivars(adapter);
3767 1.88.2.6 snj /* Set up auto-mask */
3768 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3769 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3770 1.88.2.6 snj else {
3771 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3772 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3773 1.88.2.6 snj }
3774 1.88.2.6 snj } else { /* Simple settings for Legacy/MSI */
3775 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 0);
3776 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 1);
3777 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3778 1.88.2.6 snj }
3779 1.1 dyoung
3780 1.88.2.6 snj ixgbe_init_fdir(adapter);
3781 1.44 msaitoh
3782 1.88.2.6 snj /*
3783 1.88.2.6 snj * Check on any SFP devices that
3784 1.88.2.6 snj * need to be kick-started
3785 1.88.2.6 snj */
3786 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_none) {
3787 1.88.2.6 snj err = hw->phy.ops.identify(hw);
3788 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3789 1.88.2.6 snj device_printf(dev,
3790 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
3791 1.88.2.6 snj return;
3792 1.88.2.6 snj }
3793 1.88.2.6 snj }
3794 1.44 msaitoh
3795 1.88.2.6 snj /* Set moderation on the Link interrupt */
3796 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR);
3797 1.1 dyoung
3798 1.88.2.6 snj /* Config/Enable Link */
3799 1.88.2.6 snj ixgbe_config_link(adapter);
3800 1.1 dyoung
3801 1.88.2.6 snj /* Hardware Packet Buffer & Flow Control setup */
3802 1.88.2.6 snj ixgbe_config_delay_values(adapter);
3803 1.44 msaitoh
3804 1.88.2.6 snj /* Initialize the FC settings */
3805 1.88.2.6 snj ixgbe_start_hw(hw);
3806 1.44 msaitoh
3807 1.88.2.6 snj /* Set up VLAN support and filter */
3808 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
3809 1.44 msaitoh
3810 1.88.2.6 snj /* Setup DMA Coalescing */
3811 1.88.2.6 snj ixgbe_config_dmac(adapter);
3812 1.44 msaitoh
3813 1.88.2.6 snj /* And now turn on interrupts */
3814 1.88.2.6 snj ixgbe_enable_intr(adapter);
3815 1.44 msaitoh
3816 1.88.2.6 snj /* Enable the use of the MBX by the VF's */
3817 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV) {
3818 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3819 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
3820 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3821 1.88.2.6 snj }
3822 1.44 msaitoh
3823 1.88.2.10 martin /* Update saved flags. See ixgbe_ifflags_cb() */
3824 1.88.2.10 martin adapter->if_flags = ifp->if_flags;
3825 1.88.2.10 martin
3826 1.88.2.6 snj /* Now inform the stack we're ready */
3827 1.88.2.6 snj ifp->if_flags |= IFF_RUNNING;
3828 1.44 msaitoh
3829 1.44 msaitoh return;
3830 1.88.2.6 snj } /* ixgbe_init_locked */
3831 1.44 msaitoh
3832 1.88.2.6 snj /************************************************************************
3833 1.88.2.6 snj * ixgbe_init
3834 1.88.2.6 snj ************************************************************************/
3835 1.44 msaitoh static int
3836 1.88.2.6 snj ixgbe_init(struct ifnet *ifp)
3837 1.44 msaitoh {
3838 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
3839 1.44 msaitoh
3840 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3841 1.88.2.6 snj ixgbe_init_locked(adapter);
3842 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3843 1.44 msaitoh
3844 1.88.2.6 snj return 0; /* XXX ixgbe_init_locked cannot fail? really? */
3845 1.88.2.6 snj } /* ixgbe_init */
3846 1.44 msaitoh
3847 1.88.2.6 snj /************************************************************************
3848 1.88.2.6 snj * ixgbe_set_ivar
3849 1.44 msaitoh *
3850 1.88.2.6 snj * Setup the correct IVAR register for a particular MSI-X interrupt
3851 1.88.2.6 snj * (yes this is all very magic and confusing :)
3852 1.88.2.6 snj * - entry is the register array entry
3853 1.88.2.6 snj * - vector is the MSI-X vector for this queue
3854 1.88.2.6 snj * - type is RX/TX/MISC
3855 1.88.2.6 snj ************************************************************************/
3856 1.44 msaitoh static void
3857 1.88.2.6 snj ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type)
3858 1.44 msaitoh {
3859 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
3860 1.88.2.6 snj u32 ivar, index;
3861 1.1 dyoung
3862 1.88.2.6 snj vector |= IXGBE_IVAR_ALLOC_VAL;
3863 1.1 dyoung
3864 1.88.2.6 snj switch (hw->mac.type) {
3865 1.88.2.6 snj
3866 1.88.2.6 snj case ixgbe_mac_82598EB:
3867 1.88.2.6 snj if (type == -1)
3868 1.88.2.6 snj entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
3869 1.88.2.6 snj else
3870 1.88.2.6 snj entry += (type * 64);
3871 1.88.2.6 snj index = (entry >> 2) & 0x1F;
3872 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
3873 1.88.2.6 snj ivar &= ~(0xFF << (8 * (entry & 0x3)));
3874 1.88.2.6 snj ivar |= (vector << (8 * (entry & 0x3)));
3875 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
3876 1.88.2.6 snj break;
3877 1.88.2.6 snj
3878 1.88.2.6 snj case ixgbe_mac_82599EB:
3879 1.88.2.6 snj case ixgbe_mac_X540:
3880 1.88.2.6 snj case ixgbe_mac_X550:
3881 1.88.2.6 snj case ixgbe_mac_X550EM_x:
3882 1.88.2.6 snj case ixgbe_mac_X550EM_a:
3883 1.88.2.6 snj if (type == -1) { /* MISC IVAR */
3884 1.88.2.6 snj index = (entry & 1) * 8;
3885 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
3886 1.88.2.6 snj ivar &= ~(0xFF << index);
3887 1.88.2.6 snj ivar |= (vector << index);
3888 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
3889 1.88.2.6 snj } else { /* RX/TX IVARS */
3890 1.88.2.6 snj index = (16 * (entry & 1)) + (8 * type);
3891 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
3892 1.88.2.6 snj ivar &= ~(0xFF << index);
3893 1.88.2.6 snj ivar |= (vector << index);
3894 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
3895 1.88.2.6 snj }
3896 1.88.2.6 snj
3897 1.88.2.6 snj default:
3898 1.88.2.6 snj break;
3899 1.1 dyoung }
3900 1.88.2.6 snj } /* ixgbe_set_ivar */
3901 1.82 msaitoh
3902 1.88.2.6 snj /************************************************************************
3903 1.88.2.6 snj * ixgbe_configure_ivars
3904 1.88.2.6 snj ************************************************************************/
3905 1.88.2.6 snj static void
3906 1.88.2.6 snj ixgbe_configure_ivars(struct adapter *adapter)
3907 1.88.2.6 snj {
3908 1.88.2.6 snj struct ix_queue *que = adapter->queues;
3909 1.88.2.6 snj u32 newitr;
3910 1.82 msaitoh
3911 1.88.2.6 snj if (ixgbe_max_interrupt_rate > 0)
3912 1.88.2.6 snj newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8;
3913 1.88.2.6 snj else {
3914 1.88.2.6 snj /*
3915 1.88.2.6 snj * Disable DMA coalescing if interrupt moderation is
3916 1.88.2.6 snj * disabled.
3917 1.88.2.6 snj */
3918 1.88.2.6 snj adapter->dmac = 0;
3919 1.88.2.6 snj newitr = 0;
3920 1.82 msaitoh }
3921 1.83 msaitoh
3922 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
3923 1.88.2.6 snj struct rx_ring *rxr = &adapter->rx_rings[i];
3924 1.88.2.6 snj struct tx_ring *txr = &adapter->tx_rings[i];
3925 1.88.2.6 snj /* First the RX queue entry */
3926 1.88.2.6 snj ixgbe_set_ivar(adapter, rxr->me, que->msix, 0);
3927 1.88.2.6 snj /* ... and the TX */
3928 1.88.2.6 snj ixgbe_set_ivar(adapter, txr->me, que->msix, 1);
3929 1.88.2.6 snj /* Set an Initial EITR value */
3930 1.88.2.10 martin ixgbe_eitr_write(que, newitr);
3931 1.83 msaitoh }
3932 1.1 dyoung
3933 1.88.2.6 snj /* For the Link interrupt */
3934 1.88.2.6 snj ixgbe_set_ivar(adapter, 1, adapter->vector, -1);
3935 1.88.2.6 snj } /* ixgbe_configure_ivars */
3936 1.1 dyoung
3937 1.88.2.6 snj /************************************************************************
3938 1.88.2.6 snj * ixgbe_config_gpie
3939 1.88.2.6 snj ************************************************************************/
3940 1.88.2.6 snj static void
3941 1.88.2.6 snj ixgbe_config_gpie(struct adapter *adapter)
3942 1.88.2.6 snj {
3943 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3944 1.88.2.6 snj u32 gpie;
3945 1.1 dyoung
3946 1.88.2.6 snj gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3947 1.1 dyoung
3948 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
3949 1.88.2.6 snj /* Enable Enhanced MSI-X mode */
3950 1.88.2.6 snj gpie |= IXGBE_GPIE_MSIX_MODE
3951 1.88.2.6 snj | IXGBE_GPIE_EIAME
3952 1.88.2.6 snj | IXGBE_GPIE_PBA_SUPPORT
3953 1.88.2.6 snj | IXGBE_GPIE_OCD;
3954 1.88.2.6 snj }
3955 1.1 dyoung
3956 1.88.2.6 snj /* Fan Failure Interrupt */
3957 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
3958 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN;
3959 1.43 msaitoh
3960 1.88.2.6 snj /* Thermal Sensor Interrupt */
3961 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR)
3962 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
3963 1.43 msaitoh
3964 1.88.2.6 snj /* Link detection */
3965 1.88.2.6 snj switch (hw->mac.type) {
3966 1.88.2.6 snj case ixgbe_mac_82599EB:
3967 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN;
3968 1.88.2.6 snj break;
3969 1.88.2.6 snj case ixgbe_mac_X550EM_x:
3970 1.88.2.6 snj case ixgbe_mac_X550EM_a:
3971 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
3972 1.88.2.6 snj break;
3973 1.88.2.6 snj default:
3974 1.88.2.6 snj break;
3975 1.1 dyoung }
3976 1.1 dyoung
3977 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3978 1.28 msaitoh
3979 1.88.2.6 snj return;
3980 1.88.2.6 snj } /* ixgbe_config_gpie */
3981 1.1 dyoung
3982 1.88.2.6 snj /************************************************************************
3983 1.88.2.6 snj * ixgbe_config_delay_values
3984 1.88.2.6 snj *
3985 1.88.2.6 snj * Requires adapter->max_frame_size to be set.
3986 1.88.2.6 snj ************************************************************************/
3987 1.88.2.6 snj static void
3988 1.88.2.6 snj ixgbe_config_delay_values(struct adapter *adapter)
3989 1.1 dyoung {
3990 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3991 1.88.2.6 snj u32 rxpb, frame, size, tmp;
3992 1.1 dyoung
3993 1.88.2.6 snj frame = adapter->max_frame_size;
3994 1.1 dyoung
3995 1.88.2.6 snj /* Calculate High Water */
3996 1.88.2.6 snj switch (hw->mac.type) {
3997 1.88.2.6 snj case ixgbe_mac_X540:
3998 1.88.2.6 snj case ixgbe_mac_X550:
3999 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4000 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4001 1.88.2.6 snj tmp = IXGBE_DV_X540(frame, frame);
4002 1.88.2.6 snj break;
4003 1.88.2.6 snj default:
4004 1.88.2.6 snj tmp = IXGBE_DV(frame, frame);
4005 1.88.2.6 snj break;
4006 1.88.2.6 snj }
4007 1.88.2.6 snj size = IXGBE_BT2KB(tmp);
4008 1.88.2.6 snj rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10;
4009 1.88.2.6 snj hw->fc.high_water[0] = rxpb - size;
4010 1.1 dyoung
4011 1.88.2.6 snj /* Now calculate Low Water */
4012 1.88.2.6 snj switch (hw->mac.type) {
4013 1.88.2.6 snj case ixgbe_mac_X540:
4014 1.88.2.6 snj case ixgbe_mac_X550:
4015 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4016 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4017 1.88.2.6 snj tmp = IXGBE_LOW_DV_X540(frame);
4018 1.88.2.6 snj break;
4019 1.88.2.6 snj default:
4020 1.88.2.6 snj tmp = IXGBE_LOW_DV(frame);
4021 1.88.2.6 snj break;
4022 1.88.2.6 snj }
4023 1.88.2.6 snj hw->fc.low_water[0] = IXGBE_BT2KB(tmp);
4024 1.1 dyoung
4025 1.88.2.6 snj hw->fc.pause_time = IXGBE_FC_PAUSE;
4026 1.88.2.6 snj hw->fc.send_xon = TRUE;
4027 1.88.2.6 snj } /* ixgbe_config_delay_values */
4028 1.88.2.6 snj
4029 1.88.2.6 snj /************************************************************************
4030 1.88.2.6 snj * ixgbe_set_multi - Multicast Update
4031 1.88.2.6 snj *
4032 1.88.2.6 snj * Called whenever multicast address list is updated.
4033 1.88.2.6 snj ************************************************************************/
4034 1.88.2.6 snj static void
4035 1.88.2.6 snj ixgbe_set_multi(struct adapter *adapter)
4036 1.1 dyoung {
4037 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4038 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4039 1.88.2.6 snj u8 *update_ptr;
4040 1.88.2.6 snj int mcnt = 0;
4041 1.88.2.6 snj u32 fctrl;
4042 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
4043 1.88.2.6 snj struct ether_multi *enm;
4044 1.88.2.6 snj struct ether_multistep step;
4045 1.1 dyoung
4046 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4047 1.88.2.6 snj IOCTL_DEBUGOUT("ixgbe_set_multi: begin");
4048 1.1 dyoung
4049 1.88.2.6 snj mta = adapter->mta;
4050 1.88.2.6 snj bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES);
4051 1.1 dyoung
4052 1.88.2.6 snj ifp->if_flags &= ~IFF_ALLMULTI;
4053 1.88.2.6 snj ETHER_LOCK(ec);
4054 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
4055 1.88.2.6 snj while (enm != NULL) {
4056 1.88.2.6 snj if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) ||
4057 1.88.2.6 snj (memcmp(enm->enm_addrlo, enm->enm_addrhi,
4058 1.88.2.6 snj ETHER_ADDR_LEN) != 0)) {
4059 1.88.2.6 snj ifp->if_flags |= IFF_ALLMULTI;
4060 1.88.2.6 snj break;
4061 1.88.2.6 snj }
4062 1.88.2.6 snj bcopy(enm->enm_addrlo,
4063 1.88.2.6 snj mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
4064 1.88.2.6 snj mta[mcnt].vmdq = adapter->pool;
4065 1.88.2.6 snj mcnt++;
4066 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
4067 1.88.2.6 snj }
4068 1.88.2.6 snj ETHER_UNLOCK(ec);
4069 1.1 dyoung
4070 1.88.2.6 snj fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
4071 1.88.2.6 snj fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4072 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC)
4073 1.88.2.6 snj fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4074 1.88.2.6 snj else if (ifp->if_flags & IFF_ALLMULTI) {
4075 1.88.2.6 snj fctrl |= IXGBE_FCTRL_MPE;
4076 1.88.2.6 snj }
4077 1.1 dyoung
4078 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
4079 1.88.2.6 snj
4080 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) {
4081 1.88.2.6 snj update_ptr = (u8 *)mta;
4082 1.88.2.6 snj ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
4083 1.88.2.6 snj ixgbe_mc_array_itr, TRUE);
4084 1.22 msaitoh }
4085 1.1 dyoung
4086 1.88.2.6 snj return;
4087 1.88.2.6 snj } /* ixgbe_set_multi */
4088 1.88.2.6 snj
4089 1.88.2.6 snj /************************************************************************
4090 1.88.2.6 snj * ixgbe_mc_array_itr
4091 1.88.2.6 snj *
4092 1.88.2.6 snj * An iterator function needed by the multicast shared code.
4093 1.88.2.6 snj * It feeds the shared code routine the addresses in the
4094 1.88.2.6 snj * array of ixgbe_set_multi() one by one.
4095 1.88.2.6 snj ************************************************************************/
4096 1.88.2.6 snj static u8 *
4097 1.88.2.6 snj ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
4098 1.1 dyoung {
4099 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4100 1.1 dyoung
4101 1.88.2.6 snj mta = (struct ixgbe_mc_addr *)*update_ptr;
4102 1.88.2.6 snj *vmdq = mta->vmdq;
4103 1.61 msaitoh
4104 1.88.2.6 snj *update_ptr = (u8*)(mta + 1);
4105 1.1 dyoung
4106 1.88.2.6 snj return (mta->addr);
4107 1.88.2.6 snj } /* ixgbe_mc_array_itr */
4108 1.1 dyoung
4109 1.88.2.6 snj /************************************************************************
4110 1.88.2.6 snj * ixgbe_local_timer - Timer routine
4111 1.88.2.6 snj *
4112 1.88.2.6 snj * Checks for link status, updates statistics,
4113 1.88.2.6 snj * and runs the watchdog check.
4114 1.88.2.6 snj ************************************************************************/
4115 1.88.2.6 snj static void
4116 1.88.2.6 snj ixgbe_local_timer(void *arg)
4117 1.88.2.6 snj {
4118 1.88.2.6 snj struct adapter *adapter = arg;
4119 1.88.2.6 snj
4120 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4121 1.88.2.6 snj ixgbe_local_timer1(adapter);
4122 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4123 1.1 dyoung }
4124 1.1 dyoung
4125 1.44 msaitoh static void
4126 1.88.2.6 snj ixgbe_local_timer1(void *arg)
4127 1.44 msaitoh {
4128 1.88.2.6 snj struct adapter *adapter = arg;
4129 1.88.2.6 snj device_t dev = adapter->dev;
4130 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4131 1.88.2.6 snj u64 queues = 0;
4132 1.88.2.6 snj int hung = 0;
4133 1.44 msaitoh
4134 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4135 1.44 msaitoh
4136 1.88.2.6 snj /* Check for pluggable optics */
4137 1.88.2.6 snj if (adapter->sfp_probe)
4138 1.88.2.6 snj if (!ixgbe_sfp_probe(adapter))
4139 1.88.2.6 snj goto out; /* Nothing to do */
4140 1.44 msaitoh
4141 1.88.2.6 snj ixgbe_update_link_status(adapter);
4142 1.88.2.6 snj ixgbe_update_stats_counters(adapter);
4143 1.44 msaitoh
4144 1.88.2.6 snj /*
4145 1.88.2.6 snj * Check the TX queues status
4146 1.88.2.6 snj * - mark hung queues so we don't schedule on them
4147 1.88.2.6 snj * - watchdog only if all queues show hung
4148 1.88.2.6 snj */
4149 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
4150 1.88.2.6 snj /* Keep track of queues with work for soft irq */
4151 1.88.2.6 snj if (que->txr->busy)
4152 1.88.2.6 snj queues |= ((u64)1 << que->me);
4153 1.88.2.6 snj /*
4154 1.88.2.6 snj * Each time txeof runs without cleaning, but there
4155 1.88.2.6 snj * are uncleaned descriptors it increments busy. If
4156 1.88.2.6 snj * we get to the MAX we declare it hung.
4157 1.88.2.6 snj */
4158 1.88.2.6 snj if (que->busy == IXGBE_QUEUE_HUNG) {
4159 1.88.2.6 snj ++hung;
4160 1.88.2.6 snj /* Mark the queue as inactive */
4161 1.88.2.6 snj adapter->active_queues &= ~((u64)1 << que->me);
4162 1.88.2.6 snj continue;
4163 1.88.2.6 snj } else {
4164 1.88.2.6 snj /* Check if we've come back from hung */
4165 1.88.2.6 snj if ((adapter->active_queues & ((u64)1 << que->me)) == 0)
4166 1.88.2.6 snj adapter->active_queues |= ((u64)1 << que->me);
4167 1.88.2.6 snj }
4168 1.88.2.6 snj if (que->busy >= IXGBE_MAX_TX_BUSY) {
4169 1.88.2.6 snj device_printf(dev,
4170 1.88.2.6 snj "Warning queue %d appears to be hung!\n", i);
4171 1.88.2.6 snj que->txr->busy = IXGBE_QUEUE_HUNG;
4172 1.88.2.6 snj ++hung;
4173 1.88.2.6 snj }
4174 1.88.2.6 snj }
4175 1.44 msaitoh
4176 1.88.2.6 snj /* Only truely watchdog if all queues show hung */
4177 1.88.2.6 snj if (hung == adapter->num_queues)
4178 1.88.2.6 snj goto watchdog;
4179 1.88.2.6 snj else if (queues != 0) { /* Force an IRQ on queues with work */
4180 1.88.2.6 snj ixgbe_rearm_queues(adapter, queues);
4181 1.88.2.6 snj }
4182 1.44 msaitoh
4183 1.88.2.6 snj out:
4184 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
4185 1.88.2.6 snj return;
4186 1.44 msaitoh
4187 1.88.2.6 snj watchdog:
4188 1.88.2.6 snj device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
4189 1.88.2.6 snj adapter->ifp->if_flags &= ~IFF_RUNNING;
4190 1.88.2.6 snj adapter->watchdog_events.ev_count++;
4191 1.88.2.6 snj ixgbe_init_locked(adapter);
4192 1.88.2.6 snj } /* ixgbe_local_timer */
4193 1.44 msaitoh
4194 1.88.2.6 snj /************************************************************************
4195 1.88.2.6 snj * ixgbe_sfp_probe
4196 1.88.2.6 snj *
4197 1.88.2.6 snj * Determine if a port had optics inserted.
4198 1.88.2.6 snj ************************************************************************/
4199 1.88.2.6 snj static bool
4200 1.88.2.6 snj ixgbe_sfp_probe(struct adapter *adapter)
4201 1.88.2.6 snj {
4202 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4203 1.88.2.6 snj device_t dev = adapter->dev;
4204 1.88.2.6 snj bool result = FALSE;
4205 1.44 msaitoh
4206 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_nl) &&
4207 1.88.2.6 snj (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4208 1.88.2.6 snj s32 ret = hw->phy.ops.identify_sfp(hw);
4209 1.88.2.6 snj if (ret)
4210 1.88.2.6 snj goto out;
4211 1.88.2.6 snj ret = hw->phy.ops.reset(hw);
4212 1.88.2.6 snj adapter->sfp_probe = FALSE;
4213 1.88.2.6 snj if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4214 1.88.2.6 snj device_printf(dev,"Unsupported SFP+ module detected!");
4215 1.88.2.6 snj device_printf(dev,
4216 1.88.2.6 snj "Reload driver with supported module.\n");
4217 1.88.2.6 snj goto out;
4218 1.88.2.6 snj } else
4219 1.88.2.6 snj device_printf(dev, "SFP+ module detected!\n");
4220 1.88.2.6 snj /* We now have supported optics */
4221 1.88.2.6 snj result = TRUE;
4222 1.88.2.6 snj }
4223 1.88.2.6 snj out:
4224 1.48 msaitoh
4225 1.88.2.6 snj return (result);
4226 1.88.2.6 snj } /* ixgbe_sfp_probe */
4227 1.88.2.6 snj
4228 1.88.2.6 snj /************************************************************************
4229 1.88.2.6 snj * ixgbe_handle_mod - Tasklet for SFP module interrupts
4230 1.88.2.6 snj ************************************************************************/
4231 1.88.2.6 snj static void
4232 1.88.2.6 snj ixgbe_handle_mod(void *context)
4233 1.88.2.6 snj {
4234 1.88.2.6 snj struct adapter *adapter = context;
4235 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4236 1.88.2.6 snj device_t dev = adapter->dev;
4237 1.88.2.6 snj u32 err, cage_full = 0;
4238 1.44 msaitoh
4239 1.88.2.6 snj if (adapter->hw.need_crosstalk_fix) {
4240 1.88.2.6 snj switch (hw->mac.type) {
4241 1.88.2.6 snj case ixgbe_mac_82599EB:
4242 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4243 1.88.2.6 snj IXGBE_ESDP_SDP2;
4244 1.88.2.6 snj break;
4245 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4246 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4247 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4248 1.88.2.6 snj IXGBE_ESDP_SDP0;
4249 1.88.2.6 snj break;
4250 1.88.2.6 snj default:
4251 1.88.2.6 snj break;
4252 1.88.2.6 snj }
4253 1.44 msaitoh
4254 1.88.2.6 snj if (!cage_full)
4255 1.44 msaitoh return;
4256 1.88.2.6 snj }
4257 1.44 msaitoh
4258 1.88.2.6 snj err = hw->phy.ops.identify_sfp(hw);
4259 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4260 1.88.2.6 snj device_printf(dev,
4261 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
4262 1.88.2.6 snj return;
4263 1.88.2.6 snj }
4264 1.44 msaitoh
4265 1.88.2.6 snj err = hw->mac.ops.setup_sfp(hw);
4266 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4267 1.88.2.6 snj device_printf(dev,
4268 1.88.2.6 snj "Setup failure - unsupported SFP+ module type.\n");
4269 1.88.2.6 snj return;
4270 1.88.2.6 snj }
4271 1.88.2.6 snj softint_schedule(adapter->msf_si);
4272 1.88.2.6 snj } /* ixgbe_handle_mod */
4273 1.44 msaitoh
4274 1.44 msaitoh
4275 1.88.2.6 snj /************************************************************************
4276 1.88.2.6 snj * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts
4277 1.88.2.6 snj ************************************************************************/
4278 1.88.2.6 snj static void
4279 1.88.2.6 snj ixgbe_handle_msf(void *context)
4280 1.88.2.6 snj {
4281 1.88.2.6 snj struct adapter *adapter = context;
4282 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4283 1.88.2.6 snj u32 autoneg;
4284 1.88.2.6 snj bool negotiate;
4285 1.44 msaitoh
4286 1.88.2.6 snj /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
4287 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(hw);
4288 1.44 msaitoh
4289 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
4290 1.88.2.6 snj if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4291 1.88.2.6 snj hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
4292 1.88.2.6 snj else
4293 1.88.2.6 snj negotiate = 0;
4294 1.88.2.6 snj if (hw->mac.ops.setup_link)
4295 1.88.2.6 snj hw->mac.ops.setup_link(hw, autoneg, TRUE);
4296 1.44 msaitoh
4297 1.88.2.6 snj /* Adjust media types shown in ifconfig */
4298 1.88.2.6 snj ifmedia_removeall(&adapter->media);
4299 1.88.2.6 snj ixgbe_add_media_types(adapter);
4300 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
4301 1.88.2.6 snj } /* ixgbe_handle_msf */
4302 1.44 msaitoh
4303 1.88.2.6 snj /************************************************************************
4304 1.88.2.6 snj * ixgbe_handle_phy - Tasklet for external PHY interrupts
4305 1.88.2.6 snj ************************************************************************/
4306 1.88.2.6 snj static void
4307 1.88.2.6 snj ixgbe_handle_phy(void *context)
4308 1.88.2.6 snj {
4309 1.88.2.6 snj struct adapter *adapter = context;
4310 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4311 1.88.2.6 snj int error;
4312 1.44 msaitoh
4313 1.88.2.6 snj error = hw->phy.ops.handle_lasi(hw);
4314 1.88.2.6 snj if (error == IXGBE_ERR_OVERTEMP)
4315 1.88.2.6 snj device_printf(adapter->dev,
4316 1.88.2.6 snj "CRITICAL: EXTERNAL PHY OVER TEMP!! "
4317 1.88.2.6 snj " PHY will downshift to lower power state!\n");
4318 1.88.2.6 snj else if (error)
4319 1.88.2.6 snj device_printf(adapter->dev,
4320 1.88.2.6 snj "Error handling LASI interrupt: %d\n", error);
4321 1.88.2.6 snj } /* ixgbe_handle_phy */
4322 1.44 msaitoh
4323 1.88.2.6 snj static void
4324 1.88.2.6 snj ixgbe_ifstop(struct ifnet *ifp, int disable)
4325 1.88.2.6 snj {
4326 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
4327 1.44 msaitoh
4328 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4329 1.88.2.6 snj ixgbe_stop(adapter);
4330 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4331 1.44 msaitoh }
4332 1.44 msaitoh
4333 1.88.2.6 snj /************************************************************************
4334 1.88.2.6 snj * ixgbe_stop - Stop the hardware
4335 1.88.2.6 snj *
4336 1.88.2.6 snj * Disables all traffic on the adapter by issuing a
4337 1.88.2.6 snj * global reset on the MAC and deallocates TX/RX buffers.
4338 1.88.2.6 snj ************************************************************************/
4339 1.1 dyoung static void
4340 1.88.2.6 snj ixgbe_stop(void *arg)
4341 1.1 dyoung {
4342 1.88.2.6 snj struct ifnet *ifp;
4343 1.88.2.6 snj struct adapter *adapter = arg;
4344 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4345 1.1 dyoung
4346 1.88.2.6 snj ifp = adapter->ifp;
4347 1.1 dyoung
4348 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4349 1.1 dyoung
4350 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_stop: begin\n");
4351 1.88.2.6 snj ixgbe_disable_intr(adapter);
4352 1.88.2.6 snj callout_stop(&adapter->timer);
4353 1.1 dyoung
4354 1.88.2.6 snj /* Let the stack know...*/
4355 1.88.2.6 snj ifp->if_flags &= ~IFF_RUNNING;
4356 1.1 dyoung
4357 1.88.2.6 snj ixgbe_reset_hw(hw);
4358 1.88.2.6 snj hw->adapter_stopped = FALSE;
4359 1.88.2.6 snj ixgbe_stop_adapter(hw);
4360 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82599EB)
4361 1.88.2.6 snj ixgbe_stop_mac_link_on_d3_82599(hw);
4362 1.88.2.6 snj /* Turn off the laser - noop with no optics */
4363 1.88.2.6 snj ixgbe_disable_tx_laser(hw);
4364 1.22 msaitoh
4365 1.88.2.6 snj /* Update the stack */
4366 1.88.2.6 snj adapter->link_up = FALSE;
4367 1.88.2.6 snj ixgbe_update_link_status(adapter);
4368 1.1 dyoung
4369 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
4370 1.88.2.6 snj ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
4371 1.1 dyoung
4372 1.88.2.6 snj return;
4373 1.88.2.6 snj } /* ixgbe_stop */
4374 1.1 dyoung
4375 1.88.2.6 snj /************************************************************************
4376 1.88.2.6 snj * ixgbe_update_link_status - Update OS on link state
4377 1.88.2.6 snj *
4378 1.88.2.6 snj * Note: Only updates the OS on the cached link state.
4379 1.88.2.6 snj * The real check of the hardware only happens with
4380 1.88.2.6 snj * a link interrupt.
4381 1.88.2.6 snj ************************************************************************/
4382 1.88.2.6 snj static void
4383 1.88.2.6 snj ixgbe_update_link_status(struct adapter *adapter)
4384 1.88.2.6 snj {
4385 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4386 1.88.2.6 snj device_t dev = adapter->dev;
4387 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4388 1.1 dyoung
4389 1.88.2.6 snj if (adapter->link_up) {
4390 1.88.2.6 snj if (adapter->link_active == FALSE) {
4391 1.88.2.6 snj if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL){
4392 1.88.2.6 snj /*
4393 1.88.2.6 snj * Discard count for both MAC Local Fault and
4394 1.88.2.6 snj * Remote Fault because those registers are
4395 1.88.2.6 snj * valid only when the link speed is up and
4396 1.88.2.6 snj * 10Gbps.
4397 1.88.2.6 snj */
4398 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MLFC);
4399 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MRFC);
4400 1.88.2.6 snj }
4401 1.1 dyoung
4402 1.88.2.6 snj if (bootverbose) {
4403 1.88.2.6 snj const char *bpsmsg;
4404 1.1 dyoung
4405 1.88.2.6 snj switch (adapter->link_speed) {
4406 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
4407 1.88.2.6 snj bpsmsg = "10 Gbps";
4408 1.88.2.6 snj break;
4409 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
4410 1.88.2.6 snj bpsmsg = "5 Gbps";
4411 1.88.2.6 snj break;
4412 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
4413 1.88.2.6 snj bpsmsg = "2.5 Gbps";
4414 1.88.2.6 snj break;
4415 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
4416 1.88.2.6 snj bpsmsg = "1 Gbps";
4417 1.88.2.6 snj break;
4418 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
4419 1.88.2.6 snj bpsmsg = "100 Mbps";
4420 1.88.2.6 snj break;
4421 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
4422 1.88.2.6 snj bpsmsg = "10 Mbps";
4423 1.88.2.6 snj break;
4424 1.88.2.6 snj default:
4425 1.88.2.6 snj bpsmsg = "unknown speed";
4426 1.88.2.6 snj break;
4427 1.88.2.6 snj }
4428 1.88.2.6 snj device_printf(dev, "Link is up %s %s \n",
4429 1.88.2.6 snj bpsmsg, "Full Duplex");
4430 1.88.2.6 snj }
4431 1.88.2.6 snj adapter->link_active = TRUE;
4432 1.88.2.6 snj /* Update any Flow Control changes */
4433 1.88.2.6 snj ixgbe_fc_enable(&adapter->hw);
4434 1.88.2.6 snj /* Update DMA coalescing config */
4435 1.88.2.6 snj ixgbe_config_dmac(adapter);
4436 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_UP);
4437 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4438 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4439 1.1 dyoung }
4440 1.88.2.6 snj } else { /* Link down */
4441 1.88.2.6 snj if (adapter->link_active == TRUE) {
4442 1.88.2.6 snj if (bootverbose)
4443 1.88.2.6 snj device_printf(dev, "Link is Down\n");
4444 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_DOWN);
4445 1.88.2.6 snj adapter->link_active = FALSE;
4446 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4447 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4448 1.1 dyoung }
4449 1.88.2.6 snj }
4450 1.1 dyoung
4451 1.88.2.6 snj return;
4452 1.88.2.6 snj } /* ixgbe_update_link_status */
4453 1.88.2.6 snj
4454 1.88.2.6 snj /************************************************************************
4455 1.88.2.6 snj * ixgbe_config_dmac - Configure DMA Coalescing
4456 1.88.2.6 snj ************************************************************************/
4457 1.88.2.6 snj static void
4458 1.88.2.6 snj ixgbe_config_dmac(struct adapter *adapter)
4459 1.88.2.6 snj {
4460 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4461 1.88.2.6 snj struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;
4462 1.88.2.6 snj
4463 1.88.2.6 snj if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)
4464 1.88.2.6 snj return;
4465 1.88.2.6 snj
4466 1.88.2.6 snj if (dcfg->watchdog_timer ^ adapter->dmac ||
4467 1.88.2.6 snj dcfg->link_speed ^ adapter->link_speed) {
4468 1.88.2.6 snj dcfg->watchdog_timer = adapter->dmac;
4469 1.88.2.6 snj dcfg->fcoe_en = false;
4470 1.88.2.6 snj dcfg->link_speed = adapter->link_speed;
4471 1.88.2.6 snj dcfg->num_tcs = 1;
4472 1.88.2.6 snj
4473 1.88.2.6 snj INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n",
4474 1.88.2.6 snj dcfg->watchdog_timer, dcfg->link_speed);
4475 1.88.2.6 snj
4476 1.88.2.6 snj hw->mac.ops.dmac_config(hw);
4477 1.1 dyoung }
4478 1.88.2.6 snj } /* ixgbe_config_dmac */
4479 1.1 dyoung
4480 1.88.2.6 snj /************************************************************************
4481 1.88.2.6 snj * ixgbe_enable_intr
4482 1.88.2.6 snj ************************************************************************/
4483 1.88.2.6 snj static void
4484 1.88.2.6 snj ixgbe_enable_intr(struct adapter *adapter)
4485 1.88.2.6 snj {
4486 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4487 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4488 1.88.2.6 snj u32 mask, fwsm;
4489 1.1 dyoung
4490 1.88.2.6 snj mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
4491 1.1 dyoung
4492 1.88.2.6 snj switch (adapter->hw.mac.type) {
4493 1.88.2.6 snj case ixgbe_mac_82599EB:
4494 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4495 1.88.2.6 snj /* Temperature sensor on some adapters */
4496 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0;
4497 1.88.2.6 snj /* SFP+ (RX_LOS_N & MOD_ABS_N) */
4498 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4499 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP2;
4500 1.88.2.6 snj break;
4501 1.88.2.6 snj case ixgbe_mac_X540:
4502 1.88.2.6 snj /* Detect if Thermal Sensor is enabled */
4503 1.88.2.6 snj fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
4504 1.88.2.6 snj if (fwsm & IXGBE_FWSM_TS_ENABLED)
4505 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4506 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4507 1.88.2.6 snj break;
4508 1.88.2.6 snj case ixgbe_mac_X550:
4509 1.88.2.6 snj /* MAC thermal sensor is automatically enabled */
4510 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4511 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4512 1.88.2.6 snj break;
4513 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4514 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4515 1.88.2.6 snj /* Some devices use SDP0 for important information */
4516 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
4517 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
4518 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||
4519 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)
4520 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);
4521 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_x550em_ext_t)
4522 1.88.2.6 snj mask |= IXGBE_EICR_GPI_SDP0_X540;
4523 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4524 1.88.2.6 snj break;
4525 1.88.2.6 snj default:
4526 1.88.2.6 snj break;
4527 1.88.2.6 snj }
4528 1.1 dyoung
4529 1.88.2.6 snj /* Enable Fan Failure detection */
4530 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
4531 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4532 1.88.2.6 snj /* Enable SR-IOV */
4533 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4534 1.88.2.6 snj mask |= IXGBE_EIMS_MAILBOX;
4535 1.88.2.6 snj /* Enable Flow Director */
4536 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
4537 1.88.2.6 snj mask |= IXGBE_EIMS_FLOW_DIR;
4538 1.1 dyoung
4539 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
4540 1.88.2.6 snj
4541 1.88.2.6 snj /* With MSI-X we use auto clear */
4542 1.88.2.6 snj if (adapter->msix_mem) {
4543 1.88.2.6 snj mask = IXGBE_EIMS_ENABLE_MASK;
4544 1.88.2.6 snj /* Don't autoclear Link */
4545 1.88.2.6 snj mask &= ~IXGBE_EIMS_OTHER;
4546 1.88.2.6 snj mask &= ~IXGBE_EIMS_LSC;
4547 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
4548 1.88.2.6 snj mask &= ~IXGBE_EIMS_MAILBOX;
4549 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
4550 1.88.2.6 snj }
4551 1.88.2.6 snj
4552 1.88.2.6 snj /*
4553 1.88.2.6 snj * Now enable all queues, this is done separately to
4554 1.88.2.6 snj * allow for handling the extended (beyond 32) MSI-X
4555 1.88.2.6 snj * vectors that can be used by 82599
4556 1.88.2.6 snj */
4557 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++)
4558 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
4559 1.88.2.6 snj
4560 1.88.2.6 snj IXGBE_WRITE_FLUSH(hw);
4561 1.1 dyoung
4562 1.88.2.6 snj return;
4563 1.88.2.6 snj } /* ixgbe_enable_intr */
4564 1.88.2.6 snj
4565 1.88.2.6 snj /************************************************************************
4566 1.88.2.6 snj * ixgbe_disable_intr
4567 1.88.2.6 snj ************************************************************************/
4568 1.47 msaitoh static void
4569 1.88.2.6 snj ixgbe_disable_intr(struct adapter *adapter)
4570 1.85 msaitoh {
4571 1.88.2.6 snj if (adapter->msix_mem)
4572 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0);
4573 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
4574 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
4575 1.88.2.6 snj } else {
4576 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
4577 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
4578 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
4579 1.88.2.6 snj }
4580 1.88.2.6 snj IXGBE_WRITE_FLUSH(&adapter->hw);
4581 1.85 msaitoh
4582 1.88.2.6 snj return;
4583 1.88.2.6 snj } /* ixgbe_disable_intr */
4584 1.85 msaitoh
4585 1.88.2.6 snj /************************************************************************
4586 1.88.2.6 snj * ixgbe_legacy_irq - Legacy Interrupt Service routine
4587 1.88.2.6 snj ************************************************************************/
4588 1.88.2.6 snj static int
4589 1.88.2.6 snj ixgbe_legacy_irq(void *arg)
4590 1.88.2.6 snj {
4591 1.88.2.6 snj struct ix_queue *que = arg;
4592 1.88.2.6 snj struct adapter *adapter = que->adapter;
4593 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4594 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4595 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
4596 1.88.2.6 snj bool more = false;
4597 1.88.2.6 snj u32 eicr, eicr_mask;
4598 1.88.2.6 snj
4599 1.88.2.6 snj /* Silicon errata #26 on 82598 */
4600 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
4601 1.88.2.6 snj
4602 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
4603 1.88.2.6 snj
4604 1.88.2.6 snj adapter->stats.pf.legint.ev_count++;
4605 1.88.2.6 snj ++que->irqs.ev_count;
4606 1.88.2.6 snj if (eicr == 0) {
4607 1.88.2.6 snj adapter->stats.pf.intzero.ev_count++;
4608 1.88.2.6 snj if ((ifp->if_flags & IFF_UP) != 0)
4609 1.88.2.6 snj ixgbe_enable_intr(adapter);
4610 1.88.2.6 snj return 0;
4611 1.88.2.6 snj }
4612 1.88.2.6 snj
4613 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) != 0) {
4614 1.88.2.6 snj #ifdef __NetBSD__
4615 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
4616 1.88.2.6 snj more = true;
4617 1.88.2.6 snj #else
4618 1.88.2.6 snj more = ixgbe_rxeof(que);
4619 1.88.2.6 snj #endif
4620 1.88.2.6 snj
4621 1.88.2.6 snj IXGBE_TX_LOCK(txr);
4622 1.88.2.6 snj ixgbe_txeof(txr);
4623 1.88.2.6 snj #ifdef notyet
4624 1.88.2.6 snj if (!ixgbe_ring_empty(ifp, txr->br))
4625 1.88.2.6 snj ixgbe_start_locked(ifp, txr);
4626 1.85 msaitoh #endif
4627 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
4628 1.88.2.6 snj }
4629 1.88.2.6 snj
4630 1.88.2.6 snj /* Check for fan failure */
4631 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
4632 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, true);
4633 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4634 1.88.2.6 snj }
4635 1.85 msaitoh
4636 1.88.2.6 snj /* Link status change */
4637 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC)
4638 1.88.2.6 snj softint_schedule(adapter->link_si);
4639 1.88.2.6 snj
4640 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
4641 1.88.2.6 snj /* Pluggable optics-related interrupt */
4642 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
4643 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
4644 1.88.2.6 snj else
4645 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
4646 1.88.2.6 snj
4647 1.88.2.6 snj if (eicr & eicr_mask) {
4648 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
4649 1.88.2.6 snj softint_schedule(adapter->mod_si);
4650 1.85 msaitoh }
4651 1.88.2.6 snj
4652 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
4653 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
4654 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
4655 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4656 1.88.2.6 snj softint_schedule(adapter->msf_si);
4657 1.85 msaitoh }
4658 1.88.2.6 snj }
4659 1.85 msaitoh
4660 1.88.2.6 snj /* External PHY interrupt */
4661 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
4662 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540))
4663 1.88.2.6 snj softint_schedule(adapter->phy_si);
4664 1.88.2.6 snj
4665 1.88.2.6 snj if (more)
4666 1.88.2.6 snj softint_schedule(que->que_si);
4667 1.88.2.6 snj else
4668 1.88.2.6 snj ixgbe_enable_intr(adapter);
4669 1.88.2.6 snj
4670 1.88.2.6 snj return 1;
4671 1.88.2.6 snj } /* ixgbe_legacy_irq */
4672 1.88.2.6 snj
4673 1.88.2.6 snj /************************************************************************
4674 1.88.2.8 snj * ixgbe_free_pciintr_resources
4675 1.88.2.6 snj ************************************************************************/
4676 1.88.2.6 snj static void
4677 1.88.2.8 snj ixgbe_free_pciintr_resources(struct adapter *adapter)
4678 1.88.2.6 snj {
4679 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4680 1.88.2.6 snj int rid;
4681 1.88.2.6 snj
4682 1.88.2.6 snj /*
4683 1.88.2.6 snj * Release all msix queue resources:
4684 1.88.2.6 snj */
4685 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
4686 1.88.2.8 snj if (que->res != NULL) {
4687 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4688 1.88.2.6 snj adapter->osdep.ihs[i]);
4689 1.88.2.8 snj adapter->osdep.ihs[i] = NULL;
4690 1.88.2.8 snj }
4691 1.85 msaitoh }
4692 1.85 msaitoh
4693 1.88.2.6 snj /* Clean the Legacy or Link interrupt last */
4694 1.88.2.6 snj if (adapter->vector) /* we are doing MSIX */
4695 1.88.2.6 snj rid = adapter->vector;
4696 1.88.2.6 snj else
4697 1.88.2.6 snj rid = 0;
4698 1.85 msaitoh
4699 1.88.2.6 snj if (adapter->osdep.ihs[rid] != NULL) {
4700 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4701 1.88.2.6 snj adapter->osdep.ihs[rid]);
4702 1.88.2.6 snj adapter->osdep.ihs[rid] = NULL;
4703 1.88.2.6 snj }
4704 1.88.2.6 snj
4705 1.88.2.8 snj if (adapter->osdep.intrs != NULL) {
4706 1.88.2.8 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs,
4707 1.88.2.8 snj adapter->osdep.nintrs);
4708 1.88.2.8 snj adapter->osdep.intrs = NULL;
4709 1.88.2.8 snj }
4710 1.88.2.8 snj
4711 1.88.2.8 snj return;
4712 1.88.2.8 snj } /* ixgbe_free_pciintr_resources */
4713 1.88.2.8 snj
4714 1.88.2.8 snj /************************************************************************
4715 1.88.2.8 snj * ixgbe_free_pci_resources
4716 1.88.2.8 snj ************************************************************************/
4717 1.88.2.8 snj static void
4718 1.88.2.8 snj ixgbe_free_pci_resources(struct adapter *adapter)
4719 1.88.2.8 snj {
4720 1.88.2.8 snj
4721 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
4722 1.88.2.6 snj
4723 1.88.2.6 snj if (adapter->osdep.mem_size != 0) {
4724 1.88.2.6 snj bus_space_unmap(adapter->osdep.mem_bus_space_tag,
4725 1.88.2.6 snj adapter->osdep.mem_bus_space_handle,
4726 1.88.2.6 snj adapter->osdep.mem_size);
4727 1.88.2.6 snj }
4728 1.85 msaitoh
4729 1.88.2.6 snj return;
4730 1.88.2.6 snj } /* ixgbe_free_pci_resources */
4731 1.88.2.6 snj
4732 1.88.2.6 snj /************************************************************************
4733 1.88.2.6 snj * ixgbe_set_sysctl_value
4734 1.88.2.6 snj ************************************************************************/
4735 1.85 msaitoh static void
4736 1.47 msaitoh ixgbe_set_sysctl_value(struct adapter *adapter, const char *name,
4737 1.47 msaitoh const char *description, int *limit, int value)
4738 1.47 msaitoh {
4739 1.47 msaitoh device_t dev = adapter->dev;
4740 1.47 msaitoh struct sysctllog **log;
4741 1.47 msaitoh const struct sysctlnode *rnode, *cnode;
4742 1.47 msaitoh
4743 1.47 msaitoh log = &adapter->sysctllog;
4744 1.47 msaitoh if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
4745 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl root\n");
4746 1.47 msaitoh return;
4747 1.47 msaitoh }
4748 1.47 msaitoh if (sysctl_createv(log, 0, &rnode, &cnode,
4749 1.50 msaitoh CTLFLAG_READWRITE, CTLTYPE_INT,
4750 1.47 msaitoh name, SYSCTL_DESCR(description),
4751 1.50 msaitoh NULL, 0, limit, 0, CTL_CREATE, CTL_EOL) != 0)
4752 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl\n");
4753 1.47 msaitoh *limit = value;
4754 1.88.2.6 snj } /* ixgbe_set_sysctl_value */
4755 1.47 msaitoh
4756 1.88.2.6 snj /************************************************************************
4757 1.88.2.6 snj * ixgbe_sysctl_flowcntl
4758 1.88.2.6 snj *
4759 1.88.2.6 snj * SYSCTL wrapper around setting Flow Control
4760 1.88.2.6 snj ************************************************************************/
4761 1.1 dyoung static int
4762 1.52 msaitoh ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS)
4763 1.1 dyoung {
4764 1.44 msaitoh struct sysctlnode node = *rnode;
4765 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
4766 1.88.2.6 snj int error, fc;
4767 1.1 dyoung
4768 1.88.2.6 snj fc = adapter->hw.fc.current_mode;
4769 1.53 msaitoh node.sysctl_data = &fc;
4770 1.1 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
4771 1.1 dyoung if (error != 0 || newp == NULL)
4772 1.1 dyoung return error;
4773 1.1 dyoung
4774 1.1 dyoung /* Don't bother if it's not changed */
4775 1.88.2.6 snj if (fc == adapter->hw.fc.current_mode)
4776 1.1 dyoung return (0);
4777 1.1 dyoung
4778 1.52 msaitoh return ixgbe_set_flowcntl(adapter, fc);
4779 1.88.2.6 snj } /* ixgbe_sysctl_flowcntl */
4780 1.52 msaitoh
4781 1.88.2.6 snj /************************************************************************
4782 1.88.2.6 snj * ixgbe_set_flowcntl - Set flow control
4783 1.88.2.6 snj *
4784 1.88.2.6 snj * Flow control values:
4785 1.88.2.6 snj * 0 - off
4786 1.88.2.6 snj * 1 - rx pause
4787 1.88.2.6 snj * 2 - tx pause
4788 1.88.2.6 snj * 3 - full
4789 1.88.2.6 snj ************************************************************************/
4790 1.52 msaitoh static int
4791 1.52 msaitoh ixgbe_set_flowcntl(struct adapter *adapter, int fc)
4792 1.52 msaitoh {
4793 1.52 msaitoh switch (fc) {
4794 1.1 dyoung case ixgbe_fc_rx_pause:
4795 1.1 dyoung case ixgbe_fc_tx_pause:
4796 1.1 dyoung case ixgbe_fc_full:
4797 1.88.2.6 snj adapter->hw.fc.requested_mode = fc;
4798 1.26 msaitoh if (adapter->num_queues > 1)
4799 1.26 msaitoh ixgbe_disable_rx_drop(adapter);
4800 1.1 dyoung break;
4801 1.1 dyoung case ixgbe_fc_none:
4802 1.1 dyoung adapter->hw.fc.requested_mode = ixgbe_fc_none;
4803 1.26 msaitoh if (adapter->num_queues > 1)
4804 1.26 msaitoh ixgbe_enable_rx_drop(adapter);
4805 1.28 msaitoh break;
4806 1.28 msaitoh default:
4807 1.28 msaitoh return (EINVAL);
4808 1.1 dyoung }
4809 1.88.2.6 snj
4810 1.56 msaitoh #if 0 /* XXX NetBSD */
4811 1.25 msaitoh /* Don't autoneg if forcing a value */
4812 1.25 msaitoh adapter->hw.fc.disable_fc_autoneg = TRUE;
4813 1.56 msaitoh #endif
4814 1.25 msaitoh ixgbe_fc_enable(&adapter->hw);
4815 1.52 msaitoh
4816 1.88.2.6 snj return (0);
4817 1.88.2.6 snj } /* ixgbe_set_flowcntl */
4818 1.52 msaitoh
4819 1.88.2.6 snj /************************************************************************
4820 1.88.2.6 snj * ixgbe_enable_rx_drop
4821 1.88.2.6 snj *
4822 1.88.2.6 snj * Enable the hardware to drop packets when the buffer is
4823 1.88.2.6 snj * full. This is useful with multiqueue, so that no single
4824 1.88.2.6 snj * queue being full stalls the entire RX engine. We only
4825 1.88.2.6 snj * enable this when Multiqueue is enabled AND Flow Control
4826 1.88.2.6 snj * is disabled.
4827 1.88.2.6 snj ************************************************************************/
4828 1.88.2.6 snj static void
4829 1.88.2.6 snj ixgbe_enable_rx_drop(struct adapter *adapter)
4830 1.52 msaitoh {
4831 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4832 1.88.2.6 snj struct rx_ring *rxr;
4833 1.88.2.6 snj u32 srrctl;
4834 1.48 msaitoh
4835 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
4836 1.88.2.6 snj rxr = &adapter->rx_rings[i];
4837 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
4838 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
4839 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
4840 1.43 msaitoh }
4841 1.1 dyoung
4842 1.88.2.6 snj /* enable drop for each vf */
4843 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
4844 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
4845 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) |
4846 1.88.2.6 snj IXGBE_QDE_ENABLE));
4847 1.28 msaitoh }
4848 1.88.2.6 snj } /* ixgbe_enable_rx_drop */
4849 1.1 dyoung
4850 1.88.2.6 snj /************************************************************************
4851 1.88.2.6 snj * ixgbe_disable_rx_drop
4852 1.88.2.6 snj ************************************************************************/
4853 1.88.2.6 snj static void
4854 1.88.2.6 snj ixgbe_disable_rx_drop(struct adapter *adapter)
4855 1.44 msaitoh {
4856 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4857 1.88.2.6 snj struct rx_ring *rxr;
4858 1.88.2.6 snj u32 srrctl;
4859 1.44 msaitoh
4860 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
4861 1.88.2.6 snj rxr = &adapter->rx_rings[i];
4862 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
4863 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
4864 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
4865 1.44 msaitoh }
4866 1.44 msaitoh
4867 1.88.2.6 snj /* disable drop for each vf */
4868 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
4869 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
4870 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT)));
4871 1.44 msaitoh }
4872 1.88.2.6 snj } /* ixgbe_disable_rx_drop */
4873 1.44 msaitoh
4874 1.88.2.6 snj /************************************************************************
4875 1.88.2.6 snj * ixgbe_sysctl_advertise
4876 1.88.2.6 snj *
4877 1.88.2.6 snj * SYSCTL wrapper around setting advertised speed
4878 1.88.2.6 snj ************************************************************************/
4879 1.88.2.6 snj static int
4880 1.88.2.6 snj ixgbe_sysctl_advertise(SYSCTLFN_ARGS)
4881 1.88.2.6 snj {
4882 1.88.2.6 snj struct sysctlnode node = *rnode;
4883 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
4884 1.88.2.6 snj int error = 0, advertise;
4885 1.44 msaitoh
4886 1.88.2.6 snj advertise = adapter->advertise;
4887 1.88.2.6 snj node.sysctl_data = &advertise;
4888 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
4889 1.88.2.6 snj if (error != 0 || newp == NULL)
4890 1.88.2.6 snj return error;
4891 1.44 msaitoh
4892 1.88.2.6 snj return ixgbe_set_advertise(adapter, advertise);
4893 1.88.2.6 snj } /* ixgbe_sysctl_advertise */
4894 1.44 msaitoh
4895 1.88.2.6 snj /************************************************************************
4896 1.88.2.6 snj * ixgbe_set_advertise - Control advertised link speed
4897 1.88.2.6 snj *
4898 1.88.2.6 snj * Flags:
4899 1.88.2.6 snj * 0x00 - Default (all capable link speed)
4900 1.88.2.6 snj * 0x01 - advertise 100 Mb
4901 1.88.2.6 snj * 0x02 - advertise 1G
4902 1.88.2.6 snj * 0x04 - advertise 10G
4903 1.88.2.6 snj * 0x08 - advertise 10 Mb
4904 1.88.2.6 snj * 0x10 - advertise 2.5G
4905 1.88.2.6 snj * 0x20 - advertise 5G
4906 1.88.2.6 snj ************************************************************************/
4907 1.44 msaitoh static int
4908 1.88.2.6 snj ixgbe_set_advertise(struct adapter *adapter, int advertise)
4909 1.44 msaitoh {
4910 1.88.2.6 snj device_t dev;
4911 1.88.2.6 snj struct ixgbe_hw *hw;
4912 1.88.2.6 snj ixgbe_link_speed speed = 0;
4913 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
4914 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
4915 1.88.2.6 snj bool negotiate = FALSE;
4916 1.44 msaitoh
4917 1.88.2.6 snj /* Checks to validate new value */
4918 1.88.2.6 snj if (adapter->advertise == advertise) /* no change */
4919 1.88.2.6 snj return (0);
4920 1.88.2.6 snj
4921 1.88.2.6 snj dev = adapter->dev;
4922 1.88.2.6 snj hw = &adapter->hw;
4923 1.88.2.6 snj
4924 1.88.2.6 snj /* No speed changes for backplane media */
4925 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
4926 1.44 msaitoh return (ENODEV);
4927 1.88.2.6 snj
4928 1.88.2.6 snj if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
4929 1.88.2.6 snj (hw->phy.multispeed_fiber))) {
4930 1.88.2.6 snj device_printf(dev,
4931 1.88.2.6 snj "Advertised speed can only be set on copper or "
4932 1.88.2.6 snj "multispeed fiber media types.\n");
4933 1.88.2.6 snj return (EINVAL);
4934 1.44 msaitoh }
4935 1.44 msaitoh
4936 1.88.2.6 snj if (advertise < 0x0 || advertise > 0x2f) {
4937 1.88.2.6 snj device_printf(dev,
4938 1.88.2.6 snj "Invalid advertised speed; valid modes are 0x0 through 0x7\n");
4939 1.88.2.6 snj return (EINVAL);
4940 1.44 msaitoh }
4941 1.44 msaitoh
4942 1.88.2.6 snj if (hw->mac.ops.get_link_capabilities) {
4943 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
4944 1.88.2.6 snj &negotiate);
4945 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
4946 1.88.2.6 snj device_printf(dev, "Unable to determine supported advertise speeds\n");
4947 1.88.2.6 snj return (ENODEV);
4948 1.88.2.6 snj }
4949 1.88.2.6 snj }
4950 1.44 msaitoh
4951 1.88.2.6 snj /* Set new value and report new advertised mode */
4952 1.88.2.6 snj if (advertise & 0x1) {
4953 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) {
4954 1.88.2.6 snj device_printf(dev, "Interface does not support 100Mb advertised speed\n");
4955 1.88.2.6 snj return (EINVAL);
4956 1.88.2.6 snj }
4957 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
4958 1.88.2.6 snj }
4959 1.88.2.6 snj if (advertise & 0x2) {
4960 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) {
4961 1.88.2.6 snj device_printf(dev, "Interface does not support 1Gb advertised speed\n");
4962 1.88.2.6 snj return (EINVAL);
4963 1.88.2.6 snj }
4964 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
4965 1.88.2.6 snj }
4966 1.88.2.6 snj if (advertise & 0x4) {
4967 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) {
4968 1.88.2.6 snj device_printf(dev, "Interface does not support 10Gb advertised speed\n");
4969 1.88.2.6 snj return (EINVAL);
4970 1.88.2.6 snj }
4971 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
4972 1.88.2.6 snj }
4973 1.88.2.6 snj if (advertise & 0x8) {
4974 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) {
4975 1.88.2.6 snj device_printf(dev, "Interface does not support 10Mb advertised speed\n");
4976 1.88.2.6 snj return (EINVAL);
4977 1.88.2.6 snj }
4978 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
4979 1.88.2.6 snj }
4980 1.88.2.6 snj if (advertise & 0x10) {
4981 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) {
4982 1.88.2.6 snj device_printf(dev, "Interface does not support 2.5Gb advertised speed\n");
4983 1.88.2.6 snj return (EINVAL);
4984 1.88.2.6 snj }
4985 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
4986 1.88.2.6 snj }
4987 1.88.2.6 snj if (advertise & 0x20) {
4988 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) {
4989 1.88.2.6 snj device_printf(dev, "Interface does not support 5Gb advertised speed\n");
4990 1.88.2.6 snj return (EINVAL);
4991 1.88.2.6 snj }
4992 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
4993 1.88.2.6 snj }
4994 1.88.2.6 snj if (advertise == 0)
4995 1.88.2.6 snj speed = link_caps; /* All capable link speed */
4996 1.44 msaitoh
4997 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
4998 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
4999 1.88.2.6 snj adapter->advertise = advertise;
5000 1.44 msaitoh
5001 1.44 msaitoh return (0);
5002 1.88.2.6 snj } /* ixgbe_set_advertise */
5003 1.44 msaitoh
5004 1.88.2.6 snj /************************************************************************
5005 1.88.2.6 snj * ixgbe_get_advertise - Get current advertised speed settings
5006 1.88.2.6 snj *
5007 1.88.2.6 snj * Formatted for sysctl usage.
5008 1.88.2.6 snj * Flags:
5009 1.88.2.6 snj * 0x01 - advertise 100 Mb
5010 1.88.2.6 snj * 0x02 - advertise 1G
5011 1.88.2.6 snj * 0x04 - advertise 10G
5012 1.88.2.6 snj * 0x08 - advertise 10 Mb (yes, Mb)
5013 1.88.2.6 snj * 0x10 - advertise 2.5G
5014 1.88.2.6 snj * 0x20 - advertise 5G
5015 1.88.2.6 snj ************************************************************************/
5016 1.24 msaitoh static int
5017 1.88.2.6 snj ixgbe_get_advertise(struct adapter *adapter)
5018 1.24 msaitoh {
5019 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5020 1.88.2.6 snj int speed;
5021 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
5022 1.88.2.6 snj s32 err;
5023 1.88.2.6 snj bool negotiate = FALSE;
5024 1.24 msaitoh
5025 1.88.2.6 snj /*
5026 1.88.2.6 snj * Advertised speed means nothing unless it's copper or
5027 1.88.2.6 snj * multi-speed fiber
5028 1.88.2.6 snj */
5029 1.88.2.6 snj if (!(hw->phy.media_type == ixgbe_media_type_copper) &&
5030 1.88.2.6 snj !(hw->phy.multispeed_fiber))
5031 1.88.2.6 snj return (0);
5032 1.24 msaitoh
5033 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);
5034 1.88.2.6 snj if (err != IXGBE_SUCCESS)
5035 1.88.2.6 snj return (0);
5036 1.26 msaitoh
5037 1.88.2.6 snj speed =
5038 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x04 : 0) |
5039 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x02 : 0) |
5040 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x01 : 0) |
5041 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x08 : 0) |
5042 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
5043 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0);
5044 1.88.2.6 snj
5045 1.88.2.6 snj return speed;
5046 1.88.2.6 snj } /* ixgbe_get_advertise */
5047 1.88.2.6 snj
5048 1.88.2.6 snj /************************************************************************
5049 1.88.2.6 snj * ixgbe_sysctl_dmac - Manage DMA Coalescing
5050 1.88.2.6 snj *
5051 1.88.2.6 snj * Control values:
5052 1.88.2.6 snj * 0/1 - off / on (use default value of 1000)
5053 1.88.2.6 snj *
5054 1.88.2.6 snj * Legal timer values are:
5055 1.88.2.6 snj * 50,100,250,500,1000,2000,5000,10000
5056 1.88.2.6 snj *
5057 1.88.2.6 snj * Turning off interrupt moderation will also turn this off.
5058 1.88.2.6 snj ************************************************************************/
5059 1.44 msaitoh static int
5060 1.44 msaitoh ixgbe_sysctl_dmac(SYSCTLFN_ARGS)
5061 1.44 msaitoh {
5062 1.44 msaitoh struct sysctlnode node = *rnode;
5063 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5064 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5065 1.88.2.6 snj int error;
5066 1.88.2.6 snj int newval;
5067 1.44 msaitoh
5068 1.88.2.6 snj newval = adapter->dmac;
5069 1.48 msaitoh node.sysctl_data = &newval;
5070 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5071 1.44 msaitoh if ((error) || (newp == NULL))
5072 1.44 msaitoh return (error);
5073 1.44 msaitoh
5074 1.48 msaitoh switch (newval) {
5075 1.44 msaitoh case 0:
5076 1.44 msaitoh /* Disabled */
5077 1.48 msaitoh adapter->dmac = 0;
5078 1.44 msaitoh break;
5079 1.48 msaitoh case 1:
5080 1.48 msaitoh /* Enable and use default */
5081 1.44 msaitoh adapter->dmac = 1000;
5082 1.44 msaitoh break;
5083 1.44 msaitoh case 50:
5084 1.44 msaitoh case 100:
5085 1.44 msaitoh case 250:
5086 1.44 msaitoh case 500:
5087 1.44 msaitoh case 1000:
5088 1.44 msaitoh case 2000:
5089 1.44 msaitoh case 5000:
5090 1.44 msaitoh case 10000:
5091 1.44 msaitoh /* Legal values - allow */
5092 1.48 msaitoh adapter->dmac = newval;
5093 1.44 msaitoh break;
5094 1.44 msaitoh default:
5095 1.44 msaitoh /* Do nothing, illegal value */
5096 1.44 msaitoh return (EINVAL);
5097 1.44 msaitoh }
5098 1.44 msaitoh
5099 1.44 msaitoh /* Re-initialize hardware if it's already running */
5100 1.44 msaitoh if (ifp->if_flags & IFF_RUNNING)
5101 1.44 msaitoh ixgbe_init(ifp);
5102 1.44 msaitoh
5103 1.44 msaitoh return (0);
5104 1.44 msaitoh }
5105 1.44 msaitoh
5106 1.48 msaitoh #ifdef IXGBE_DEBUG
5107 1.88.2.6 snj /************************************************************************
5108 1.88.2.6 snj * ixgbe_sysctl_power_state
5109 1.88.2.6 snj *
5110 1.88.2.6 snj * Sysctl to test power states
5111 1.88.2.6 snj * Values:
5112 1.88.2.6 snj * 0 - set device to D0
5113 1.88.2.6 snj * 3 - set device to D3
5114 1.88.2.6 snj * (none) - get current device power state
5115 1.88.2.6 snj ************************************************************************/
5116 1.48 msaitoh static int
5117 1.48 msaitoh ixgbe_sysctl_power_state(SYSCTLFN_ARGS)
5118 1.48 msaitoh {
5119 1.88.2.6 snj #ifdef notyet
5120 1.48 msaitoh struct sysctlnode node = *rnode;
5121 1.48 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5122 1.88.2.6 snj device_t dev = adapter->dev;
5123 1.88.2.6 snj int curr_ps, new_ps, error = 0;
5124 1.48 msaitoh
5125 1.48 msaitoh curr_ps = new_ps = pci_get_powerstate(dev);
5126 1.48 msaitoh
5127 1.48 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5128 1.48 msaitoh if ((error) || (req->newp == NULL))
5129 1.48 msaitoh return (error);
5130 1.48 msaitoh
5131 1.48 msaitoh if (new_ps == curr_ps)
5132 1.48 msaitoh return (0);
5133 1.48 msaitoh
5134 1.48 msaitoh if (new_ps == 3 && curr_ps == 0)
5135 1.48 msaitoh error = DEVICE_SUSPEND(dev);
5136 1.48 msaitoh else if (new_ps == 0 && curr_ps == 3)
5137 1.48 msaitoh error = DEVICE_RESUME(dev);
5138 1.48 msaitoh else
5139 1.48 msaitoh return (EINVAL);
5140 1.48 msaitoh
5141 1.48 msaitoh device_printf(dev, "New state: %d\n", pci_get_powerstate(dev));
5142 1.48 msaitoh
5143 1.48 msaitoh return (error);
5144 1.48 msaitoh #else
5145 1.48 msaitoh return 0;
5146 1.48 msaitoh #endif
5147 1.88.2.6 snj } /* ixgbe_sysctl_power_state */
5148 1.48 msaitoh #endif
5149 1.88.2.6 snj
5150 1.88.2.6 snj /************************************************************************
5151 1.88.2.6 snj * ixgbe_sysctl_wol_enable
5152 1.88.2.6 snj *
5153 1.88.2.6 snj * Sysctl to enable/disable the WoL capability,
5154 1.88.2.6 snj * if supported by the adapter.
5155 1.88.2.6 snj *
5156 1.88.2.6 snj * Values:
5157 1.88.2.6 snj * 0 - disabled
5158 1.88.2.6 snj * 1 - enabled
5159 1.88.2.6 snj ************************************************************************/
5160 1.44 msaitoh static int
5161 1.44 msaitoh ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS)
5162 1.44 msaitoh {
5163 1.44 msaitoh struct sysctlnode node = *rnode;
5164 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5165 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5166 1.88.2.6 snj bool new_wol_enabled;
5167 1.88.2.6 snj int error = 0;
5168 1.44 msaitoh
5169 1.44 msaitoh new_wol_enabled = hw->wol_enabled;
5170 1.53 msaitoh node.sysctl_data = &new_wol_enabled;
5171 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5172 1.44 msaitoh if ((error) || (newp == NULL))
5173 1.44 msaitoh return (error);
5174 1.44 msaitoh if (new_wol_enabled == hw->wol_enabled)
5175 1.44 msaitoh return (0);
5176 1.44 msaitoh
5177 1.53 msaitoh if (new_wol_enabled && !adapter->wol_support)
5178 1.44 msaitoh return (ENODEV);
5179 1.44 msaitoh else
5180 1.48 msaitoh hw->wol_enabled = new_wol_enabled;
5181 1.44 msaitoh
5182 1.44 msaitoh return (0);
5183 1.88.2.6 snj } /* ixgbe_sysctl_wol_enable */
5184 1.48 msaitoh
5185 1.88.2.6 snj /************************************************************************
5186 1.88.2.6 snj * ixgbe_sysctl_wufc - Wake Up Filter Control
5187 1.44 msaitoh *
5188 1.88.2.6 snj * Sysctl to enable/disable the types of packets that the
5189 1.88.2.6 snj * adapter will wake up on upon receipt.
5190 1.88.2.6 snj * Flags:
5191 1.88.2.6 snj * 0x1 - Link Status Change
5192 1.88.2.6 snj * 0x2 - Magic Packet
5193 1.88.2.6 snj * 0x4 - Direct Exact
5194 1.88.2.6 snj * 0x8 - Directed Multicast
5195 1.88.2.6 snj * 0x10 - Broadcast
5196 1.88.2.6 snj * 0x20 - ARP/IPv4 Request Packet
5197 1.88.2.6 snj * 0x40 - Direct IPv4 Packet
5198 1.88.2.6 snj * 0x80 - Direct IPv6 Packet
5199 1.88.2.6 snj *
5200 1.88.2.6 snj * Settings not listed above will cause the sysctl to return an error.
5201 1.88.2.6 snj ************************************************************************/
5202 1.44 msaitoh static int
5203 1.44 msaitoh ixgbe_sysctl_wufc(SYSCTLFN_ARGS)
5204 1.44 msaitoh {
5205 1.44 msaitoh struct sysctlnode node = *rnode;
5206 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5207 1.44 msaitoh int error = 0;
5208 1.44 msaitoh u32 new_wufc;
5209 1.44 msaitoh
5210 1.44 msaitoh new_wufc = adapter->wufc;
5211 1.53 msaitoh node.sysctl_data = &new_wufc;
5212 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5213 1.44 msaitoh if ((error) || (newp == NULL))
5214 1.44 msaitoh return (error);
5215 1.44 msaitoh if (new_wufc == adapter->wufc)
5216 1.44 msaitoh return (0);
5217 1.44 msaitoh
5218 1.44 msaitoh if (new_wufc & 0xffffff00)
5219 1.44 msaitoh return (EINVAL);
5220 1.88.2.6 snj
5221 1.88.2.6 snj new_wufc &= 0xff;
5222 1.88.2.6 snj new_wufc |= (0xffffff & adapter->wufc);
5223 1.88.2.6 snj adapter->wufc = new_wufc;
5224 1.44 msaitoh
5225 1.44 msaitoh return (0);
5226 1.88.2.6 snj } /* ixgbe_sysctl_wufc */
5227 1.44 msaitoh
5228 1.48 msaitoh #ifdef IXGBE_DEBUG
5229 1.88.2.6 snj /************************************************************************
5230 1.88.2.6 snj * ixgbe_sysctl_print_rss_config
5231 1.88.2.6 snj ************************************************************************/
5232 1.48 msaitoh static int
5233 1.48 msaitoh ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS)
5234 1.48 msaitoh {
5235 1.88.2.6 snj #ifdef notyet
5236 1.88.2.6 snj struct sysctlnode node = *rnode;
5237 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5238 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5239 1.88.2.6 snj device_t dev = adapter->dev;
5240 1.88.2.6 snj struct sbuf *buf;
5241 1.88.2.6 snj int error = 0, reta_size;
5242 1.88.2.6 snj u32 reg;
5243 1.48 msaitoh
5244 1.48 msaitoh buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
5245 1.48 msaitoh if (!buf) {
5246 1.48 msaitoh device_printf(dev, "Could not allocate sbuf for output.\n");
5247 1.48 msaitoh return (ENOMEM);
5248 1.48 msaitoh }
5249 1.48 msaitoh
5250 1.48 msaitoh // TODO: use sbufs to make a string to print out
5251 1.48 msaitoh /* Set multiplier for RETA setup and table size based on MAC */
5252 1.48 msaitoh switch (adapter->hw.mac.type) {
5253 1.48 msaitoh case ixgbe_mac_X550:
5254 1.48 msaitoh case ixgbe_mac_X550EM_x:
5255 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5256 1.48 msaitoh reta_size = 128;
5257 1.48 msaitoh break;
5258 1.48 msaitoh default:
5259 1.48 msaitoh reta_size = 32;
5260 1.48 msaitoh break;
5261 1.48 msaitoh }
5262 1.48 msaitoh
5263 1.48 msaitoh /* Print out the redirection table */
5264 1.48 msaitoh sbuf_cat(buf, "\n");
5265 1.48 msaitoh for (int i = 0; i < reta_size; i++) {
5266 1.48 msaitoh if (i < 32) {
5267 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));
5268 1.48 msaitoh sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg);
5269 1.48 msaitoh } else {
5270 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));
5271 1.48 msaitoh sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg);
5272 1.48 msaitoh }
5273 1.48 msaitoh }
5274 1.48 msaitoh
5275 1.48 msaitoh // TODO: print more config
5276 1.48 msaitoh
5277 1.88.2.6 snj error = sbuf_finish(buf);
5278 1.88.2.6 snj if (error)
5279 1.88.2.6 snj device_printf(dev, "Error finishing sbuf: %d\n", error);
5280 1.88.2.6 snj
5281 1.88.2.6 snj sbuf_delete(buf);
5282 1.88.2.6 snj #endif
5283 1.88.2.6 snj return (0);
5284 1.88.2.6 snj } /* ixgbe_sysctl_print_rss_config */
5285 1.88.2.6 snj #endif /* IXGBE_DEBUG */
5286 1.88.2.6 snj
5287 1.88.2.6 snj /************************************************************************
5288 1.88.2.6 snj * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY
5289 1.88.2.6 snj *
5290 1.88.2.6 snj * For X552/X557-AT devices using an external PHY
5291 1.88.2.6 snj ************************************************************************/
5292 1.88.2.6 snj static int
5293 1.88.2.6 snj ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS)
5294 1.88.2.6 snj {
5295 1.88.2.6 snj struct sysctlnode node = *rnode;
5296 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5297 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5298 1.88.2.6 snj int val;
5299 1.88.2.6 snj u16 reg;
5300 1.88.2.6 snj int error;
5301 1.88.2.6 snj
5302 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5303 1.88.2.6 snj device_printf(adapter->dev,
5304 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5305 1.88.2.6 snj return (ENODEV);
5306 1.88.2.6 snj }
5307 1.88.2.6 snj
5308 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,
5309 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5310 1.88.2.6 snj device_printf(adapter->dev,
5311 1.88.2.6 snj "Error reading from PHY's current temperature register\n");
5312 1.88.2.6 snj return (EAGAIN);
5313 1.88.2.6 snj }
5314 1.88.2.6 snj
5315 1.88.2.6 snj node.sysctl_data = &val;
5316 1.88.2.6 snj
5317 1.88.2.6 snj /* Shift temp for output */
5318 1.88.2.6 snj val = reg >> 8;
5319 1.88.2.6 snj
5320 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5321 1.88.2.6 snj if ((error) || (newp == NULL))
5322 1.88.2.6 snj return (error);
5323 1.88.2.6 snj
5324 1.88.2.6 snj return (0);
5325 1.88.2.6 snj } /* ixgbe_sysctl_phy_temp */
5326 1.88.2.6 snj
5327 1.88.2.6 snj /************************************************************************
5328 1.88.2.6 snj * ixgbe_sysctl_phy_overtemp_occurred
5329 1.88.2.6 snj *
5330 1.88.2.6 snj * Reports (directly from the PHY) whether the current PHY
5331 1.88.2.6 snj * temperature is over the overtemp threshold.
5332 1.88.2.6 snj ************************************************************************/
5333 1.88.2.6 snj static int
5334 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS)
5335 1.88.2.6 snj {
5336 1.88.2.6 snj struct sysctlnode node = *rnode;
5337 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5338 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5339 1.88.2.6 snj int val, error;
5340 1.88.2.6 snj u16 reg;
5341 1.88.2.6 snj
5342 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5343 1.88.2.6 snj device_printf(adapter->dev,
5344 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5345 1.88.2.6 snj return (ENODEV);
5346 1.88.2.6 snj }
5347 1.88.2.6 snj
5348 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,
5349 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5350 1.88.2.6 snj device_printf(adapter->dev,
5351 1.88.2.6 snj "Error reading from PHY's temperature status register\n");
5352 1.88.2.6 snj return (EAGAIN);
5353 1.88.2.6 snj }
5354 1.88.2.6 snj
5355 1.88.2.6 snj node.sysctl_data = &val;
5356 1.88.2.6 snj
5357 1.88.2.6 snj /* Get occurrence bit */
5358 1.88.2.6 snj val = !!(reg & 0x4000);
5359 1.88.2.6 snj
5360 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5361 1.88.2.6 snj if ((error) || (newp == NULL))
5362 1.88.2.6 snj return (error);
5363 1.48 msaitoh
5364 1.48 msaitoh return (0);
5365 1.88.2.6 snj } /* ixgbe_sysctl_phy_overtemp_occurred */
5366 1.48 msaitoh
5367 1.88.2.6 snj /************************************************************************
5368 1.88.2.6 snj * ixgbe_sysctl_eee_state
5369 1.88.2.6 snj *
5370 1.88.2.6 snj * Sysctl to set EEE power saving feature
5371 1.88.2.6 snj * Values:
5372 1.88.2.6 snj * 0 - disable EEE
5373 1.88.2.6 snj * 1 - enable EEE
5374 1.88.2.6 snj * (none) - get current device EEE state
5375 1.88.2.6 snj ************************************************************************/
5376 1.88.2.6 snj static int
5377 1.88.2.6 snj ixgbe_sysctl_eee_state(SYSCTLFN_ARGS)
5378 1.26 msaitoh {
5379 1.88.2.6 snj struct sysctlnode node = *rnode;
5380 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5381 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5382 1.88.2.6 snj device_t dev = adapter->dev;
5383 1.88.2.6 snj int curr_eee, new_eee, error = 0;
5384 1.88.2.6 snj s32 retval;
5385 1.26 msaitoh
5386 1.88.2.6 snj curr_eee = new_eee = !!(adapter->feat_en & IXGBE_FEATURE_EEE);
5387 1.88.2.6 snj node.sysctl_data = &new_eee;
5388 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5389 1.88.2.6 snj if ((error) || (newp == NULL))
5390 1.88.2.6 snj return (error);
5391 1.26 msaitoh
5392 1.88.2.6 snj /* Nothing to do */
5393 1.88.2.6 snj if (new_eee == curr_eee)
5394 1.88.2.6 snj return (0);
5395 1.26 msaitoh
5396 1.88.2.6 snj /* Not supported */
5397 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_EEE))
5398 1.88.2.6 snj return (EINVAL);
5399 1.88.2.6 snj
5400 1.88.2.6 snj /* Bounds checking */
5401 1.88.2.6 snj if ((new_eee < 0) || (new_eee > 1))
5402 1.88.2.6 snj return (EINVAL);
5403 1.88.2.6 snj
5404 1.88.2.6 snj retval = adapter->hw.mac.ops.setup_eee(&adapter->hw, new_eee);
5405 1.88.2.6 snj if (retval) {
5406 1.88.2.6 snj device_printf(dev, "Error in EEE setup: 0x%08X\n", retval);
5407 1.88.2.6 snj return (EINVAL);
5408 1.45 msaitoh }
5409 1.45 msaitoh
5410 1.88.2.6 snj /* Restart auto-neg */
5411 1.88.2.6 snj ixgbe_init(ifp);
5412 1.63 msaitoh
5413 1.88.2.6 snj device_printf(dev, "New EEE state: %d\n", new_eee);
5414 1.88.2.6 snj
5415 1.88.2.6 snj /* Cache new value */
5416 1.88.2.6 snj if (new_eee)
5417 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5418 1.88.2.6 snj else
5419 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_EEE;
5420 1.88.2.6 snj
5421 1.88.2.6 snj return (error);
5422 1.88.2.6 snj } /* ixgbe_sysctl_eee_state */
5423 1.88.2.6 snj
5424 1.88.2.6 snj /************************************************************************
5425 1.88.2.6 snj * ixgbe_init_device_features
5426 1.88.2.6 snj ************************************************************************/
5427 1.88.2.6 snj static void
5428 1.88.2.6 snj ixgbe_init_device_features(struct adapter *adapter)
5429 1.88.2.6 snj {
5430 1.88.2.6 snj adapter->feat_cap = IXGBE_FEATURE_NETMAP
5431 1.88.2.6 snj | IXGBE_FEATURE_RSS
5432 1.88.2.6 snj | IXGBE_FEATURE_MSI
5433 1.88.2.6 snj | IXGBE_FEATURE_MSIX
5434 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_IRQ
5435 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_TX;
5436 1.88.2.6 snj
5437 1.88.2.6 snj /* Set capabilities first... */
5438 1.63 msaitoh switch (adapter->hw.mac.type) {
5439 1.63 msaitoh case ixgbe_mac_82598EB:
5440 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82598AT)
5441 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FAN_FAIL;
5442 1.63 msaitoh break;
5443 1.63 msaitoh case ixgbe_mac_X540:
5444 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5445 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5446 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&
5447 1.88.2.6 snj (adapter->hw.bus.func == 0))
5448 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5449 1.88.2.6 snj break;
5450 1.63 msaitoh case ixgbe_mac_X550:
5451 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5452 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5453 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5454 1.88.2.6 snj break;
5455 1.63 msaitoh case ixgbe_mac_X550EM_x:
5456 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5457 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5458 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)
5459 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5460 1.88.2.6 snj break;
5461 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5462 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5463 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5464 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5465 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||
5466 1.88.2.6 snj (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {
5467 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5468 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5469 1.88.2.6 snj }
5470 1.88.2.6 snj break;
5471 1.88.2.6 snj case ixgbe_mac_82599EB:
5472 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5473 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5474 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&
5475 1.88.2.6 snj (adapter->hw.bus.func == 0))
5476 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5477 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)
5478 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5479 1.63 msaitoh break;
5480 1.63 msaitoh default:
5481 1.63 msaitoh break;
5482 1.63 msaitoh }
5483 1.45 msaitoh
5484 1.88.2.6 snj /* Enabled by default... */
5485 1.88.2.6 snj /* Fan failure detection */
5486 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FAN_FAIL)
5487 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FAN_FAIL;
5488 1.88.2.6 snj /* Netmap */
5489 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_NETMAP)
5490 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_NETMAP;
5491 1.88.2.6 snj /* EEE */
5492 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE)
5493 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5494 1.88.2.6 snj /* Thermal Sensor */
5495 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
5496 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
5497 1.88.2.6 snj
5498 1.88.2.6 snj /* Enabled via global sysctl... */
5499 1.88.2.6 snj /* Flow Director */
5500 1.88.2.6 snj if (ixgbe_enable_fdir) {
5501 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FDIR)
5502 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FDIR;
5503 1.88.2.6 snj else
5504 1.88.2.6 snj device_printf(adapter->dev, "Device does not support Flow Director. Leaving disabled.");
5505 1.88.2.6 snj }
5506 1.88.2.6 snj /* Legacy (single queue) transmit */
5507 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_LEGACY_TX) &&
5508 1.88.2.6 snj ixgbe_enable_legacy_tx)
5509 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_TX;
5510 1.88.2.6 snj /*
5511 1.88.2.6 snj * Message Signal Interrupts - Extended (MSI-X)
5512 1.88.2.6 snj * Normal MSI is only enabled if MSI-X calls fail.
5513 1.88.2.6 snj */
5514 1.88.2.6 snj if (!ixgbe_enable_msix)
5515 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_MSIX;
5516 1.88.2.6 snj /* Receive-Side Scaling (RSS) */
5517 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss)
5518 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_RSS;
5519 1.88.2.6 snj
5520 1.88.2.6 snj /* Disable features with unmet dependencies... */
5521 1.88.2.6 snj /* No MSI-X */
5522 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX)) {
5523 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
5524 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
5525 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
5526 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
5527 1.88.2.6 snj }
5528 1.88.2.6 snj } /* ixgbe_init_device_features */
5529 1.45 msaitoh
5530 1.88.2.6 snj /************************************************************************
5531 1.88.2.6 snj * ixgbe_probe - Device identification routine
5532 1.88.2.6 snj *
5533 1.88.2.6 snj * Determines if the driver should be loaded on
5534 1.88.2.6 snj * adapter based on its PCI vendor/device ID.
5535 1.88.2.6 snj *
5536 1.88.2.6 snj * return BUS_PROBE_DEFAULT on success, positive on failure
5537 1.88.2.6 snj ************************************************************************/
5538 1.88.2.6 snj static int
5539 1.88.2.6 snj ixgbe_probe(device_t dev, cfdata_t cf, void *aux)
5540 1.45 msaitoh {
5541 1.88.2.6 snj const struct pci_attach_args *pa = aux;
5542 1.45 msaitoh
5543 1.88.2.6 snj return (ixgbe_lookup(pa) != NULL) ? 1 : 0;
5544 1.45 msaitoh }
5545 1.45 msaitoh
5546 1.88.2.6 snj static ixgbe_vendor_info_t *
5547 1.88.2.6 snj ixgbe_lookup(const struct pci_attach_args *pa)
5548 1.45 msaitoh {
5549 1.88.2.6 snj ixgbe_vendor_info_t *ent;
5550 1.88.2.6 snj pcireg_t subid;
5551 1.45 msaitoh
5552 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_lookup: begin");
5553 1.45 msaitoh
5554 1.88.2.6 snj if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID)
5555 1.88.2.6 snj return NULL;
5556 1.45 msaitoh
5557 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
5558 1.45 msaitoh
5559 1.88.2.6 snj for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) {
5560 1.88.2.6 snj if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) &&
5561 1.88.2.6 snj (PCI_PRODUCT(pa->pa_id) == ent->device_id) &&
5562 1.88.2.6 snj ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) ||
5563 1.88.2.6 snj (ent->subvendor_id == 0)) &&
5564 1.88.2.6 snj ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) ||
5565 1.88.2.6 snj (ent->subdevice_id == 0))) {
5566 1.88.2.6 snj ++ixgbe_total_ports;
5567 1.88.2.6 snj return ent;
5568 1.88.2.6 snj }
5569 1.88.2.6 snj }
5570 1.88.2.6 snj return NULL;
5571 1.88.2.6 snj }
5572 1.45 msaitoh
5573 1.88.2.6 snj static int
5574 1.88.2.6 snj ixgbe_ifflags_cb(struct ethercom *ec)
5575 1.88.2.6 snj {
5576 1.88.2.6 snj struct ifnet *ifp = &ec->ec_if;
5577 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
5578 1.88.2.6 snj int change = ifp->if_flags ^ adapter->if_flags, rc = 0;
5579 1.45 msaitoh
5580 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5581 1.45 msaitoh
5582 1.88.2.6 snj if (change != 0)
5583 1.88.2.6 snj adapter->if_flags = ifp->if_flags;
5584 1.45 msaitoh
5585 1.88.2.6 snj if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0)
5586 1.88.2.6 snj rc = ENETRESET;
5587 1.88.2.6 snj else if ((change & (IFF_PROMISC | IFF_ALLMULTI)) != 0)
5588 1.88.2.6 snj ixgbe_set_promisc(adapter);
5589 1.45 msaitoh
5590 1.88.2.6 snj /* Set up VLAN support and filter */
5591 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
5592 1.45 msaitoh
5593 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5594 1.45 msaitoh
5595 1.88.2.6 snj return rc;
5596 1.88.2.6 snj }
5597 1.45 msaitoh
5598 1.88.2.6 snj /************************************************************************
5599 1.88.2.6 snj * ixgbe_ioctl - Ioctl entry point
5600 1.88.2.6 snj *
5601 1.88.2.6 snj * Called when the user wants to configure the interface.
5602 1.88.2.6 snj *
5603 1.88.2.6 snj * return 0 on success, positive on failure
5604 1.88.2.6 snj ************************************************************************/
5605 1.88.2.6 snj static int
5606 1.88.2.6 snj ixgbe_ioctl(struct ifnet * ifp, u_long command, void *data)
5607 1.88.2.6 snj {
5608 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
5609 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5610 1.88.2.6 snj struct ifcapreq *ifcr = data;
5611 1.88.2.6 snj struct ifreq *ifr = data;
5612 1.88.2.6 snj int error = 0;
5613 1.88.2.6 snj int l4csum_en;
5614 1.88.2.6 snj const int l4csum = IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx|
5615 1.88.2.6 snj IFCAP_CSUM_TCPv6_Rx|IFCAP_CSUM_UDPv6_Rx;
5616 1.45 msaitoh
5617 1.88.2.6 snj switch (command) {
5618 1.88.2.6 snj case SIOCSIFFLAGS:
5619 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)");
5620 1.88.2.6 snj break;
5621 1.88.2.6 snj case SIOCADDMULTI:
5622 1.88.2.6 snj case SIOCDELMULTI:
5623 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI");
5624 1.88.2.6 snj break;
5625 1.88.2.6 snj case SIOCSIFMEDIA:
5626 1.88.2.6 snj case SIOCGIFMEDIA:
5627 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)");
5628 1.88.2.6 snj break;
5629 1.88.2.6 snj case SIOCSIFCAP:
5630 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)");
5631 1.88.2.6 snj break;
5632 1.88.2.6 snj case SIOCSIFMTU:
5633 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
5634 1.88.2.6 snj break;
5635 1.88.2.6 snj #ifdef __NetBSD__
5636 1.88.2.6 snj case SIOCINITIFADDR:
5637 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR");
5638 1.88.2.6 snj break;
5639 1.88.2.6 snj case SIOCGIFFLAGS:
5640 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS");
5641 1.88.2.6 snj break;
5642 1.88.2.6 snj case SIOCGIFAFLAG_IN:
5643 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN");
5644 1.88.2.6 snj break;
5645 1.88.2.6 snj case SIOCGIFADDR:
5646 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR");
5647 1.88.2.6 snj break;
5648 1.88.2.6 snj case SIOCGIFMTU:
5649 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)");
5650 1.88.2.6 snj break;
5651 1.88.2.6 snj case SIOCGIFCAP:
5652 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)");
5653 1.88.2.6 snj break;
5654 1.88.2.6 snj case SIOCGETHERCAP:
5655 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)");
5656 1.88.2.6 snj break;
5657 1.88.2.6 snj case SIOCGLIFADDR:
5658 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)");
5659 1.88.2.6 snj break;
5660 1.88.2.6 snj case SIOCZIFDATA:
5661 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)");
5662 1.88.2.6 snj hw->mac.ops.clear_hw_cntrs(hw);
5663 1.88.2.6 snj ixgbe_clear_evcnt(adapter);
5664 1.45 msaitoh break;
5665 1.88.2.6 snj case SIOCAIFADDR:
5666 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)");
5667 1.88.2.6 snj break;
5668 1.88.2.6 snj #endif
5669 1.45 msaitoh default:
5670 1.88.2.6 snj IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command);
5671 1.88.2.6 snj break;
5672 1.88.2.6 snj }
5673 1.45 msaitoh
5674 1.88.2.6 snj switch (command) {
5675 1.88.2.6 snj case SIOCSIFMEDIA:
5676 1.88.2.6 snj case SIOCGIFMEDIA:
5677 1.88.2.6 snj return ifmedia_ioctl(ifp, ifr, &adapter->media, command);
5678 1.88.2.6 snj case SIOCGI2C:
5679 1.88.2.6 snj {
5680 1.88.2.6 snj struct ixgbe_i2c_req i2c;
5681 1.45 msaitoh
5682 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)");
5683 1.88.2.6 snj error = copyin(ifr->ifr_data, &i2c, sizeof(i2c));
5684 1.88.2.6 snj if (error != 0)
5685 1.88.2.6 snj break;
5686 1.88.2.6 snj if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) {
5687 1.88.2.6 snj error = EINVAL;
5688 1.88.2.6 snj break;
5689 1.88.2.6 snj }
5690 1.88.2.6 snj if (i2c.len > sizeof(i2c.data)) {
5691 1.88.2.6 snj error = EINVAL;
5692 1.88.2.6 snj break;
5693 1.88.2.6 snj }
5694 1.88.2.6 snj
5695 1.88.2.6 snj hw->phy.ops.read_i2c_byte(hw, i2c.offset,
5696 1.88.2.6 snj i2c.dev_addr, i2c.data);
5697 1.88.2.6 snj error = copyout(&i2c, ifr->ifr_data, sizeof(i2c));
5698 1.88.2.6 snj break;
5699 1.88.2.6 snj }
5700 1.88.2.6 snj case SIOCSIFCAP:
5701 1.88.2.6 snj /* Layer-4 Rx checksum offload has to be turned on and
5702 1.88.2.6 snj * off as a unit.
5703 1.88.2.6 snj */
5704 1.88.2.6 snj l4csum_en = ifcr->ifcr_capenable & l4csum;
5705 1.88.2.6 snj if (l4csum_en != l4csum && l4csum_en != 0)
5706 1.88.2.6 snj return EINVAL;
5707 1.88.2.6 snj /*FALLTHROUGH*/
5708 1.88.2.6 snj case SIOCADDMULTI:
5709 1.88.2.6 snj case SIOCDELMULTI:
5710 1.88.2.6 snj case SIOCSIFFLAGS:
5711 1.88.2.6 snj case SIOCSIFMTU:
5712 1.88.2.6 snj default:
5713 1.88.2.6 snj if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
5714 1.88.2.6 snj return error;
5715 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
5716 1.88.2.6 snj ;
5717 1.88.2.6 snj else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
5718 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5719 1.88.2.6 snj ixgbe_init_locked(adapter);
5720 1.88.2.6 snj ixgbe_recalculate_max_frame(adapter);
5721 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5722 1.88.2.6 snj } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
5723 1.88.2.6 snj /*
5724 1.88.2.6 snj * Multicast list has changed; set the hardware filter
5725 1.88.2.6 snj * accordingly.
5726 1.88.2.6 snj */
5727 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5728 1.88.2.6 snj ixgbe_disable_intr(adapter);
5729 1.88.2.6 snj ixgbe_set_multi(adapter);
5730 1.88.2.6 snj ixgbe_enable_intr(adapter);
5731 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5732 1.88.2.6 snj }
5733 1.88.2.6 snj return 0;
5734 1.45 msaitoh }
5735 1.45 msaitoh
5736 1.88.2.6 snj return error;
5737 1.88.2.6 snj } /* ixgbe_ioctl */
5738 1.45 msaitoh
5739 1.88.2.6 snj /************************************************************************
5740 1.88.2.6 snj * ixgbe_check_fan_failure
5741 1.88.2.6 snj ************************************************************************/
5742 1.45 msaitoh static void
5743 1.88.2.6 snj ixgbe_check_fan_failure(struct adapter *adapter, u32 reg, bool in_interrupt)
5744 1.45 msaitoh {
5745 1.88.2.6 snj u32 mask;
5746 1.45 msaitoh
5747 1.88.2.6 snj mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&adapter->hw) :
5748 1.88.2.6 snj IXGBE_ESDP_SDP1;
5749 1.45 msaitoh
5750 1.88.2.6 snj if (reg & mask)
5751 1.88.2.6 snj device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
5752 1.88.2.6 snj } /* ixgbe_check_fan_failure */
5753 1.88.2.6 snj
5754 1.88.2.6 snj /************************************************************************
5755 1.88.2.6 snj * ixgbe_handle_que
5756 1.88.2.6 snj ************************************************************************/
5757 1.45 msaitoh static void
5758 1.88.2.6 snj ixgbe_handle_que(void *context)
5759 1.45 msaitoh {
5760 1.88.2.6 snj struct ix_queue *que = context;
5761 1.88.2.6 snj struct adapter *adapter = que->adapter;
5762 1.88.2.6 snj struct tx_ring *txr = que->txr;
5763 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5764 1.88.2.10 martin bool more = false;
5765 1.45 msaitoh
5766 1.88.2.6 snj adapter->handleq.ev_count++;
5767 1.45 msaitoh
5768 1.88.2.6 snj if (ifp->if_flags & IFF_RUNNING) {
5769 1.88.2.10 martin more = ixgbe_rxeof(que);
5770 1.88.2.6 snj IXGBE_TX_LOCK(txr);
5771 1.88.2.10 martin more |= ixgbe_txeof(txr);
5772 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
5773 1.88.2.6 snj if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
5774 1.88.2.6 snj ixgbe_mq_start_locked(ifp, txr);
5775 1.88.2.6 snj /* Only for queue 0 */
5776 1.88.2.6 snj /* NetBSD still needs this for CBQ */
5777 1.88.2.6 snj if ((&adapter->queues[0] == que)
5778 1.88.2.6 snj && (!ixgbe_legacy_ring_empty(ifp, NULL)))
5779 1.88.2.6 snj ixgbe_legacy_start_locked(ifp, txr);
5780 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
5781 1.45 msaitoh }
5782 1.45 msaitoh
5783 1.88.2.10 martin if (more)
5784 1.88.2.10 martin softint_schedule(que->que_si);
5785 1.88.2.10 martin else if (que->res != NULL) {
5786 1.88.2.10 martin /* Re-enable this interrupt */
5787 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
5788 1.88.2.10 martin } else
5789 1.88.2.6 snj ixgbe_enable_intr(adapter);
5790 1.45 msaitoh
5791 1.45 msaitoh return;
5792 1.88.2.6 snj } /* ixgbe_handle_que */
5793 1.45 msaitoh
5794 1.88.2.6 snj /************************************************************************
5795 1.88.2.6 snj * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler
5796 1.88.2.6 snj ************************************************************************/
5797 1.88.2.6 snj static int
5798 1.88.2.6 snj ixgbe_allocate_legacy(struct adapter *adapter,
5799 1.88.2.6 snj const struct pci_attach_args *pa)
5800 1.45 msaitoh {
5801 1.88.2.6 snj device_t dev = adapter->dev;
5802 1.88.2.6 snj struct ix_queue *que = adapter->queues;
5803 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
5804 1.88.2.6 snj int counts[PCI_INTR_TYPE_SIZE];
5805 1.88.2.6 snj pci_intr_type_t intr_type, max_type;
5806 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
5807 1.88.2.6 snj const char *intrstr = NULL;
5808 1.88.2.6 snj
5809 1.88.2.6 snj /* We allocate a single interrupt resource */
5810 1.88.2.6 snj max_type = PCI_INTR_TYPE_MSI;
5811 1.88.2.6 snj counts[PCI_INTR_TYPE_MSIX] = 0;
5812 1.88.2.6 snj counts[PCI_INTR_TYPE_MSI] =
5813 1.88.2.6 snj (adapter->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0;
5814 1.88.2.8 snj /* Check not feat_en but feat_cap to fallback to INTx */
5815 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] =
5816 1.88.2.8 snj (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0;
5817 1.45 msaitoh
5818 1.88.2.6 snj alloc_retry:
5819 1.88.2.6 snj if (pci_intr_alloc(pa, &adapter->osdep.intrs, counts, max_type) != 0) {
5820 1.88.2.6 snj aprint_error_dev(dev, "couldn't alloc interrupt\n");
5821 1.88.2.6 snj return ENXIO;
5822 1.45 msaitoh }
5823 1.88.2.6 snj adapter->osdep.nintrs = 1;
5824 1.88.2.6 snj intrstr = pci_intr_string(adapter->osdep.pc, adapter->osdep.intrs[0],
5825 1.88.2.6 snj intrbuf, sizeof(intrbuf));
5826 1.88.2.6 snj adapter->osdep.ihs[0] = pci_intr_establish_xname(adapter->osdep.pc,
5827 1.88.2.6 snj adapter->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que,
5828 1.88.2.6 snj device_xname(dev));
5829 1.88.2.8 snj intr_type = pci_intr_type(adapter->osdep.pc, adapter->osdep.intrs[0]);
5830 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
5831 1.88.2.6 snj aprint_error_dev(dev,"unable to establish %s\n",
5832 1.88.2.6 snj (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx");
5833 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
5834 1.88.2.8 snj adapter->osdep.intrs = NULL;
5835 1.88.2.6 snj switch (intr_type) {
5836 1.88.2.6 snj case PCI_INTR_TYPE_MSI:
5837 1.88.2.6 snj /* The next try is for INTx: Disable MSI */
5838 1.88.2.6 snj max_type = PCI_INTR_TYPE_INTX;
5839 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] = 1;
5840 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
5841 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) {
5842 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
5843 1.88.2.8 snj goto alloc_retry;
5844 1.88.2.8 snj } else
5845 1.88.2.8 snj break;
5846 1.88.2.6 snj case PCI_INTR_TYPE_INTX:
5847 1.88.2.6 snj default:
5848 1.88.2.6 snj /* See below */
5849 1.88.2.6 snj break;
5850 1.88.2.6 snj }
5851 1.45 msaitoh }
5852 1.88.2.8 snj if (intr_type == PCI_INTR_TYPE_INTX) {
5853 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
5854 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
5855 1.88.2.8 snj }
5856 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
5857 1.88.2.6 snj aprint_error_dev(dev,
5858 1.88.2.6 snj "couldn't establish interrupt%s%s\n",
5859 1.88.2.6 snj intrstr ? " at " : "", intrstr ? intrstr : "");
5860 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
5861 1.88.2.8 snj adapter->osdep.intrs = NULL;
5862 1.88.2.6 snj return ENXIO;
5863 1.88.2.6 snj }
5864 1.88.2.6 snj aprint_normal_dev(dev, "interrupting at %s\n", intrstr);
5865 1.88.2.6 snj /*
5866 1.88.2.6 snj * Try allocating a fast interrupt and the associated deferred
5867 1.88.2.6 snj * processing contexts.
5868 1.88.2.6 snj */
5869 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
5870 1.88.2.6 snj txr->txr_si =
5871 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
5872 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
5873 1.88.2.6 snj que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
5874 1.88.2.6 snj ixgbe_handle_que, que);
5875 1.45 msaitoh
5876 1.88.2.8 snj if ((!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)
5877 1.88.2.8 snj & (txr->txr_si == NULL)) || (que->que_si == NULL)) {
5878 1.88.2.6 snj aprint_error_dev(dev,
5879 1.88.2.6 snj "could not establish software interrupts\n");
5880 1.45 msaitoh
5881 1.88.2.6 snj return ENXIO;
5882 1.45 msaitoh }
5883 1.88.2.6 snj /* For simplicity in the handlers */
5884 1.88.2.6 snj adapter->active_queues = IXGBE_EIMS_ENABLE_MASK;
5885 1.45 msaitoh
5886 1.88.2.6 snj return (0);
5887 1.88.2.6 snj } /* ixgbe_allocate_legacy */
5888 1.45 msaitoh
5889 1.45 msaitoh
5890 1.88.2.6 snj /************************************************************************
5891 1.88.2.6 snj * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers
5892 1.88.2.6 snj ************************************************************************/
5893 1.88.2.6 snj static int
5894 1.88.2.6 snj ixgbe_allocate_msix(struct adapter *adapter, const struct pci_attach_args *pa)
5895 1.88.2.6 snj {
5896 1.88.2.6 snj device_t dev = adapter->dev;
5897 1.88.2.6 snj struct ix_queue *que = adapter->queues;
5898 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
5899 1.88.2.6 snj pci_chipset_tag_t pc;
5900 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
5901 1.88.2.6 snj char intr_xname[32];
5902 1.88.2.6 snj const char *intrstr = NULL;
5903 1.88.2.6 snj int error, vector = 0;
5904 1.88.2.6 snj int cpu_id = 0;
5905 1.88.2.6 snj kcpuset_t *affinity;
5906 1.88.2.6 snj #ifdef RSS
5907 1.88.2.6 snj unsigned int rss_buckets = 0;
5908 1.88.2.6 snj kcpuset_t cpu_mask;
5909 1.88.2.6 snj #endif
5910 1.45 msaitoh
5911 1.88.2.6 snj pc = adapter->osdep.pc;
5912 1.88.2.6 snj #ifdef RSS
5913 1.45 msaitoh /*
5914 1.88.2.6 snj * If we're doing RSS, the number of queues needs to
5915 1.88.2.6 snj * match the number of RSS buckets that are configured.
5916 1.88.2.6 snj *
5917 1.88.2.6 snj * + If there's more queues than RSS buckets, we'll end
5918 1.88.2.6 snj * up with queues that get no traffic.
5919 1.88.2.6 snj *
5920 1.88.2.6 snj * + If there's more RSS buckets than queues, we'll end
5921 1.88.2.6 snj * up having multiple RSS buckets map to the same queue,
5922 1.88.2.6 snj * so there'll be some contention.
5923 1.45 msaitoh */
5924 1.88.2.6 snj rss_buckets = rss_getnumbuckets();
5925 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_RSS) &&
5926 1.88.2.6 snj (adapter->num_queues != rss_buckets)) {
5927 1.88.2.6 snj device_printf(dev,
5928 1.88.2.6 snj "%s: number of queues (%d) != number of RSS buckets (%d)"
5929 1.88.2.6 snj "; performance will be impacted.\n",
5930 1.88.2.6 snj __func__, adapter->num_queues, rss_buckets);
5931 1.45 msaitoh }
5932 1.88.2.6 snj #endif
5933 1.45 msaitoh
5934 1.88.2.6 snj adapter->osdep.nintrs = adapter->num_queues + 1;
5935 1.88.2.6 snj if (pci_msix_alloc_exact(pa, &adapter->osdep.intrs,
5936 1.88.2.6 snj adapter->osdep.nintrs) != 0) {
5937 1.88.2.6 snj aprint_error_dev(dev,
5938 1.88.2.6 snj "failed to allocate MSI-X interrupt\n");
5939 1.88.2.6 snj return (ENXIO);
5940 1.88.2.6 snj }
5941 1.45 msaitoh
5942 1.88.2.6 snj kcpuset_create(&affinity, false);
5943 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) {
5944 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d",
5945 1.88.2.6 snj device_xname(dev), i);
5946 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[i], intrbuf,
5947 1.88.2.6 snj sizeof(intrbuf));
5948 1.88.2.6 snj #ifdef IXGBE_MPSAFE
5949 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[i], PCI_INTR_MPSAFE,
5950 1.88.2.6 snj true);
5951 1.88.2.6 snj #endif
5952 1.88.2.6 snj /* Set the handler function */
5953 1.88.2.6 snj que->res = adapter->osdep.ihs[i] = pci_intr_establish_xname(pc,
5954 1.88.2.6 snj adapter->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que,
5955 1.88.2.6 snj intr_xname);
5956 1.88.2.6 snj if (que->res == NULL) {
5957 1.88.2.6 snj aprint_error_dev(dev,
5958 1.88.2.6 snj "Failed to register QUE handler\n");
5959 1.88.2.8 snj error = ENXIO;
5960 1.88.2.8 snj goto err_out;
5961 1.88.2.6 snj }
5962 1.88.2.6 snj que->msix = vector;
5963 1.88.2.6 snj adapter->active_queues |= (u64)(1 << que->msix);
5964 1.45 msaitoh
5965 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
5966 1.88.2.6 snj #ifdef RSS
5967 1.88.2.6 snj /*
5968 1.88.2.6 snj * The queue ID is used as the RSS layer bucket ID.
5969 1.88.2.6 snj * We look up the queue ID -> RSS CPU ID and select
5970 1.88.2.6 snj * that.
5971 1.88.2.6 snj */
5972 1.88.2.6 snj cpu_id = rss_getcpu(i % rss_getnumbuckets());
5973 1.88.2.6 snj CPU_SETOF(cpu_id, &cpu_mask);
5974 1.88.2.6 snj #endif
5975 1.88.2.6 snj } else {
5976 1.88.2.6 snj /*
5977 1.88.2.6 snj * Bind the MSI-X vector, and thus the
5978 1.88.2.6 snj * rings to the corresponding CPU.
5979 1.88.2.6 snj *
5980 1.88.2.6 snj * This just happens to match the default RSS
5981 1.88.2.6 snj * round-robin bucket -> queue -> CPU allocation.
5982 1.88.2.6 snj */
5983 1.88.2.6 snj if (adapter->num_queues > 1)
5984 1.88.2.6 snj cpu_id = i;
5985 1.88.2.6 snj }
5986 1.88.2.6 snj /* Round-robin affinity */
5987 1.88.2.6 snj kcpuset_zero(affinity);
5988 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
5989 1.88.2.6 snj error = interrupt_distribute(adapter->osdep.ihs[i], affinity,
5990 1.88.2.6 snj NULL);
5991 1.88.2.6 snj aprint_normal_dev(dev, "for TX/RX, interrupting at %s",
5992 1.88.2.6 snj intrstr);
5993 1.88.2.6 snj if (error == 0) {
5994 1.88.2.6 snj #if 1 /* def IXGBE_DEBUG */
5995 1.88.2.6 snj #ifdef RSS
5996 1.88.2.6 snj aprintf_normal(", bound RSS bucket %d to CPU %d", i,
5997 1.88.2.6 snj cpu_id % ncpu);
5998 1.88.2.6 snj #else
5999 1.88.2.6 snj aprint_normal(", bound queue %d to cpu %d", i,
6000 1.88.2.6 snj cpu_id % ncpu);
6001 1.88.2.6 snj #endif
6002 1.88.2.6 snj #endif /* IXGBE_DEBUG */
6003 1.88.2.6 snj }
6004 1.88.2.6 snj aprint_normal("\n");
6005 1.45 msaitoh
6006 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
6007 1.88.2.6 snj txr->txr_si = softint_establish(
6008 1.88.2.6 snj SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6009 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
6010 1.88.2.8 snj if (txr->txr_si == NULL) {
6011 1.88.2.8 snj aprint_error_dev(dev,
6012 1.88.2.8 snj "couldn't establish software interrupt\n");
6013 1.88.2.8 snj error = ENXIO;
6014 1.88.2.8 snj goto err_out;
6015 1.88.2.8 snj }
6016 1.88.2.8 snj }
6017 1.88.2.6 snj que->que_si
6018 1.88.2.6 snj = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6019 1.88.2.6 snj ixgbe_handle_que, que);
6020 1.88.2.6 snj if (que->que_si == NULL) {
6021 1.88.2.6 snj aprint_error_dev(dev,
6022 1.88.2.8 snj "couldn't establish software interrupt\n");
6023 1.88.2.8 snj error = ENXIO;
6024 1.88.2.8 snj goto err_out;
6025 1.88.2.6 snj }
6026 1.45 msaitoh }
6027 1.45 msaitoh
6028 1.88.2.6 snj /* and Link */
6029 1.88.2.6 snj cpu_id++;
6030 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev));
6031 1.88.2.8 snj adapter->vector = vector;
6032 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[vector], intrbuf,
6033 1.88.2.6 snj sizeof(intrbuf));
6034 1.88.2.6 snj #ifdef IXGBE_MPSAFE
6035 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[vector], PCI_INTR_MPSAFE,
6036 1.88.2.6 snj true);
6037 1.88.2.6 snj #endif
6038 1.88.2.6 snj /* Set the link handler function */
6039 1.88.2.6 snj adapter->osdep.ihs[vector] = pci_intr_establish_xname(pc,
6040 1.88.2.6 snj adapter->osdep.intrs[vector], IPL_NET, ixgbe_msix_link, adapter,
6041 1.88.2.6 snj intr_xname);
6042 1.88.2.6 snj if (adapter->osdep.ihs[vector] == NULL) {
6043 1.88.2.6 snj adapter->res = NULL;
6044 1.88.2.6 snj aprint_error_dev(dev, "Failed to register LINK handler\n");
6045 1.88.2.8 snj error = ENXIO;
6046 1.88.2.8 snj goto err_out;
6047 1.45 msaitoh }
6048 1.88.2.6 snj /* Round-robin affinity */
6049 1.88.2.6 snj kcpuset_zero(affinity);
6050 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
6051 1.88.2.8 snj error = interrupt_distribute(adapter->osdep.ihs[vector], affinity,
6052 1.88.2.8 snj NULL);
6053 1.45 msaitoh
6054 1.88.2.6 snj aprint_normal_dev(dev,
6055 1.88.2.6 snj "for link, interrupting at %s", intrstr);
6056 1.88.2.6 snj if (error == 0)
6057 1.88.2.6 snj aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu);
6058 1.88.2.6 snj else
6059 1.88.2.6 snj aprint_normal("\n");
6060 1.45 msaitoh
6061 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
6062 1.88.2.6 snj adapter->mbx_si =
6063 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6064 1.88.2.6 snj ixgbe_handle_mbx, adapter);
6065 1.88.2.8 snj if (adapter->mbx_si == NULL) {
6066 1.88.2.8 snj aprint_error_dev(dev,
6067 1.88.2.8 snj "could not establish software interrupts\n");
6068 1.88.2.8 snj
6069 1.88.2.8 snj error = ENXIO;
6070 1.88.2.8 snj goto err_out;
6071 1.88.2.8 snj }
6072 1.88.2.8 snj }
6073 1.45 msaitoh
6074 1.88.2.6 snj kcpuset_destroy(affinity);
6075 1.88.2.8 snj aprint_normal_dev(dev,
6076 1.88.2.8 snj "Using MSI-X interrupts with %d vectors\n", vector + 1);
6077 1.45 msaitoh
6078 1.88.2.6 snj return (0);
6079 1.88.2.8 snj
6080 1.88.2.8 snj err_out:
6081 1.88.2.8 snj kcpuset_destroy(affinity);
6082 1.88.2.8 snj ixgbe_free_softint(adapter);
6083 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
6084 1.88.2.8 snj return (error);
6085 1.88.2.6 snj } /* ixgbe_allocate_msix */
6086 1.45 msaitoh
6087 1.88.2.6 snj /************************************************************************
6088 1.88.2.6 snj * ixgbe_configure_interrupts
6089 1.88.2.6 snj *
6090 1.88.2.6 snj * Setup MSI-X, MSI, or legacy interrupts (in that order).
6091 1.88.2.6 snj * This will also depend on user settings.
6092 1.88.2.6 snj ************************************************************************/
6093 1.88.2.6 snj static int
6094 1.88.2.6 snj ixgbe_configure_interrupts(struct adapter *adapter)
6095 1.45 msaitoh {
6096 1.88.2.6 snj device_t dev = adapter->dev;
6097 1.88.2.6 snj struct ixgbe_mac_info *mac = &adapter->hw.mac;
6098 1.88.2.6 snj int want, queues, msgs;
6099 1.45 msaitoh
6100 1.88.2.6 snj /* Default to 1 queue if MSI-X setup fails */
6101 1.88.2.6 snj adapter->num_queues = 1;
6102 1.45 msaitoh
6103 1.88.2.6 snj /* Override by tuneable */
6104 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX))
6105 1.88.2.6 snj goto msi;
6106 1.45 msaitoh
6107 1.88.2.8 snj /*
6108 1.88.2.8 snj * NetBSD only: Use single vector MSI when number of CPU is 1 to save
6109 1.88.2.8 snj * interrupt slot.
6110 1.88.2.8 snj */
6111 1.88.2.8 snj if (ncpu == 1)
6112 1.88.2.8 snj goto msi;
6113 1.88.2.8 snj
6114 1.88.2.6 snj /* First try MSI-X */
6115 1.88.2.6 snj msgs = pci_msix_count(adapter->osdep.pc, adapter->osdep.tag);
6116 1.88.2.6 snj msgs = MIN(msgs, IXG_MAX_NINTR);
6117 1.88.2.6 snj if (msgs < 2)
6118 1.88.2.6 snj goto msi;
6119 1.45 msaitoh
6120 1.88.2.6 snj adapter->msix_mem = (void *)1; /* XXX */
6121 1.45 msaitoh
6122 1.88.2.6 snj /* Figure out a reasonable auto config value */
6123 1.88.2.6 snj queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu;
6124 1.45 msaitoh
6125 1.88.2.6 snj #ifdef RSS
6126 1.88.2.6 snj /* If we're doing RSS, clamp at the number of RSS buckets */
6127 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
6128 1.88.2.6 snj queues = min(queues, rss_getnumbuckets());
6129 1.88.2.6 snj #endif
6130 1.88.2.6 snj if (ixgbe_num_queues > queues) {
6131 1.88.2.6 snj aprint_error_dev(adapter->dev, "ixgbe_num_queues (%d) is too large, using reduced amount (%d).\n", ixgbe_num_queues, queues);
6132 1.88.2.6 snj ixgbe_num_queues = queues;
6133 1.45 msaitoh }
6134 1.45 msaitoh
6135 1.88.2.6 snj if (ixgbe_num_queues != 0)
6136 1.88.2.6 snj queues = ixgbe_num_queues;
6137 1.88.2.6 snj else
6138 1.88.2.6 snj queues = min(queues,
6139 1.88.2.6 snj min(mac->max_tx_queues, mac->max_rx_queues));
6140 1.45 msaitoh
6141 1.88.2.6 snj /* reflect correct sysctl value */
6142 1.88.2.6 snj ixgbe_num_queues = queues;
6143 1.45 msaitoh
6144 1.88.2.6 snj /*
6145 1.88.2.6 snj * Want one vector (RX/TX pair) per queue
6146 1.88.2.6 snj * plus an additional for Link.
6147 1.88.2.6 snj */
6148 1.88.2.6 snj want = queues + 1;
6149 1.88.2.6 snj if (msgs >= want)
6150 1.88.2.6 snj msgs = want;
6151 1.88.2.6 snj else {
6152 1.88.2.6 snj aprint_error_dev(dev, "MSI-X Configuration Problem, "
6153 1.88.2.6 snj "%d vectors but %d queues wanted!\n",
6154 1.88.2.6 snj msgs, want);
6155 1.88.2.6 snj goto msi;
6156 1.45 msaitoh }
6157 1.88.2.6 snj adapter->num_queues = queues;
6158 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSIX;
6159 1.88.2.6 snj return (0);
6160 1.45 msaitoh
6161 1.88.2.6 snj /*
6162 1.88.2.6 snj * MSI-X allocation failed or provided us with
6163 1.88.2.6 snj * less vectors than needed. Free MSI-X resources
6164 1.88.2.6 snj * and we'll try enabling MSI.
6165 1.88.2.6 snj */
6166 1.88.2.6 snj msi:
6167 1.88.2.6 snj /* Without MSI-X, some features are no longer supported */
6168 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
6169 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
6170 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
6171 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
6172 1.45 msaitoh
6173 1.88.2.6 snj msgs = pci_msi_count(adapter->osdep.pc, adapter->osdep.tag);
6174 1.88.2.6 snj adapter->msix_mem = NULL; /* XXX */
6175 1.88.2.6 snj if (msgs > 1)
6176 1.88.2.6 snj msgs = 1;
6177 1.88.2.6 snj if (msgs != 0) {
6178 1.88.2.6 snj msgs = 1;
6179 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
6180 1.88.2.6 snj return (0);
6181 1.45 msaitoh }
6182 1.45 msaitoh
6183 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) {
6184 1.88.2.6 snj aprint_error_dev(dev,
6185 1.88.2.6 snj "Device does not support legacy interrupts.\n");
6186 1.88.2.6 snj return 1;
6187 1.45 msaitoh }
6188 1.45 msaitoh
6189 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
6190 1.45 msaitoh
6191 1.45 msaitoh return (0);
6192 1.88.2.6 snj } /* ixgbe_configure_interrupts */
6193 1.45 msaitoh
6194 1.45 msaitoh
6195 1.88.2.6 snj /************************************************************************
6196 1.88.2.6 snj * ixgbe_handle_link - Tasklet for MSI-X Link interrupts
6197 1.88.2.6 snj *
6198 1.88.2.6 snj * Done outside of interrupt context since the driver might sleep
6199 1.88.2.6 snj ************************************************************************/
6200 1.45 msaitoh static void
6201 1.88.2.6 snj ixgbe_handle_link(void *context)
6202 1.45 msaitoh {
6203 1.88.2.6 snj struct adapter *adapter = context;
6204 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
6205 1.45 msaitoh
6206 1.88.2.6 snj ixgbe_check_link(hw, &adapter->link_speed, &adapter->link_up, 0);
6207 1.88.2.6 snj ixgbe_update_link_status(adapter);
6208 1.45 msaitoh
6209 1.88.2.6 snj /* Re-enable link interrupts */
6210 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC);
6211 1.88.2.6 snj } /* ixgbe_handle_link */
6212 1.45 msaitoh
6213 1.88.2.6 snj /************************************************************************
6214 1.88.2.6 snj * ixgbe_rearm_queues
6215 1.88.2.6 snj ************************************************************************/
6216 1.45 msaitoh static void
6217 1.88.2.6 snj ixgbe_rearm_queues(struct adapter *adapter, u64 queues)
6218 1.45 msaitoh {
6219 1.88.2.6 snj u32 mask;
6220 1.45 msaitoh
6221 1.88.2.6 snj switch (adapter->hw.mac.type) {
6222 1.88.2.6 snj case ixgbe_mac_82598EB:
6223 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queues);
6224 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
6225 1.45 msaitoh break;
6226 1.88.2.6 snj case ixgbe_mac_82599EB:
6227 1.88.2.6 snj case ixgbe_mac_X540:
6228 1.88.2.6 snj case ixgbe_mac_X550:
6229 1.88.2.6 snj case ixgbe_mac_X550EM_x:
6230 1.88.2.6 snj case ixgbe_mac_X550EM_a:
6231 1.88.2.6 snj mask = (queues & 0xFFFFFFFF);
6232 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
6233 1.88.2.6 snj mask = (queues >> 32);
6234 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
6235 1.45 msaitoh break;
6236 1.45 msaitoh default:
6237 1.45 msaitoh break;
6238 1.45 msaitoh }
6239 1.88.2.6 snj } /* ixgbe_rearm_queues */
6240