ixgbe.c revision 1.88.2.14 1 1.88.2.14 martin /* $NetBSD: ixgbe.c,v 1.88.2.14 2018/03/13 14:59:06 martin Exp $ */
2 1.88.2.6 snj
3 1.1 dyoung /******************************************************************************
4 1.1 dyoung
5 1.88.2.6 snj Copyright (c) 2001-2017, Intel Corporation
6 1.1 dyoung All rights reserved.
7 1.88.2.6 snj
8 1.88.2.6 snj Redistribution and use in source and binary forms, with or without
9 1.1 dyoung modification, are permitted provided that the following conditions are met:
10 1.88.2.6 snj
11 1.88.2.6 snj 1. Redistributions of source code must retain the above copyright notice,
12 1.1 dyoung this list of conditions and the following disclaimer.
13 1.88.2.6 snj
14 1.88.2.6 snj 2. Redistributions in binary form must reproduce the above copyright
15 1.88.2.6 snj notice, this list of conditions and the following disclaimer in the
16 1.1 dyoung documentation and/or other materials provided with the distribution.
17 1.88.2.6 snj
18 1.88.2.6 snj 3. Neither the name of the Intel Corporation nor the names of its
19 1.88.2.6 snj contributors may be used to endorse or promote products derived from
20 1.1 dyoung this software without specific prior written permission.
21 1.88.2.6 snj
22 1.1 dyoung THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 1.88.2.6 snj AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.88.2.6 snj IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.88.2.6 snj ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 1.88.2.6 snj LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.88.2.6 snj CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.88.2.6 snj SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.88.2.6 snj INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.88.2.6 snj CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 dyoung ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 1.1 dyoung POSSIBILITY OF SUCH DAMAGE.
33 1.1 dyoung
34 1.1 dyoung ******************************************************************************/
35 1.88.2.6 snj /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 320916 2017-07-12 17:35:32Z sbruno $*/
36 1.88.2.6 snj
37 1.1 dyoung /*
38 1.1 dyoung * Copyright (c) 2011 The NetBSD Foundation, Inc.
39 1.1 dyoung * All rights reserved.
40 1.1 dyoung *
41 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
42 1.1 dyoung * by Coyote Point Systems, Inc.
43 1.1 dyoung *
44 1.1 dyoung * Redistribution and use in source and binary forms, with or without
45 1.1 dyoung * modification, are permitted provided that the following conditions
46 1.1 dyoung * are met:
47 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
48 1.1 dyoung * notice, this list of conditions and the following disclaimer.
49 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
51 1.1 dyoung * documentation and/or other materials provided with the distribution.
52 1.1 dyoung *
53 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
54 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
64 1.1 dyoung */
65 1.1 dyoung
66 1.80 msaitoh #ifdef _KERNEL_OPT
67 1.1 dyoung #include "opt_inet.h"
68 1.22 msaitoh #include "opt_inet6.h"
69 1.80 msaitoh #include "opt_net_mpsafe.h"
70 1.80 msaitoh #endif
71 1.1 dyoung
72 1.1 dyoung #include "ixgbe.h"
73 1.29 msaitoh #include "vlan.h"
74 1.1 dyoung
75 1.33 msaitoh #include <sys/cprng.h>
76 1.88.2.2 snj #include <dev/mii/mii.h>
77 1.88.2.2 snj #include <dev/mii/miivar.h>
78 1.33 msaitoh
79 1.88.2.6 snj /************************************************************************
80 1.88.2.6 snj * Driver version
81 1.88.2.6 snj ************************************************************************/
82 1.88.2.6 snj char ixgbe_driver_version[] = "3.2.12-k";
83 1.1 dyoung
84 1.1 dyoung
85 1.88.2.6 snj /************************************************************************
86 1.88.2.6 snj * PCI Device ID Table
87 1.1 dyoung *
88 1.88.2.6 snj * Used by probe to select devices to load on
89 1.88.2.6 snj * Last field stores an index into ixgbe_strings
90 1.88.2.6 snj * Last entry must be all 0s
91 1.1 dyoung *
92 1.88.2.6 snj * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
93 1.88.2.6 snj ************************************************************************/
94 1.1 dyoung static ixgbe_vendor_info_t ixgbe_vendor_info_array[] =
95 1.1 dyoung {
96 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0},
97 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0},
98 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0},
99 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0},
100 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0},
101 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0},
102 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0},
103 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0},
104 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0},
105 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0},
106 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0},
107 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0},
108 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0},
109 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0},
110 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0},
111 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0},
112 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0},
113 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0},
114 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0},
115 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0},
116 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0},
117 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0},
118 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0},
119 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0},
120 1.24 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0},
121 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0},
122 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0},
123 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0},
124 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0},
125 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0},
126 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0},
127 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0},
128 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0},
129 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0},
130 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0},
131 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0},
132 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0},
133 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0},
134 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0},
135 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0},
136 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0},
137 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0},
138 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0},
139 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0},
140 1.1 dyoung /* required last entry */
141 1.1 dyoung {0, 0, 0, 0, 0}
142 1.1 dyoung };
143 1.1 dyoung
144 1.88.2.6 snj /************************************************************************
145 1.88.2.6 snj * Table of branding strings
146 1.88.2.6 snj ************************************************************************/
147 1.1 dyoung static const char *ixgbe_strings[] = {
148 1.1 dyoung "Intel(R) PRO/10GbE PCI-Express Network Driver"
149 1.1 dyoung };
150 1.1 dyoung
151 1.88.2.6 snj /************************************************************************
152 1.88.2.6 snj * Function prototypes
153 1.88.2.6 snj ************************************************************************/
154 1.1 dyoung static int ixgbe_probe(device_t, cfdata_t, void *);
155 1.1 dyoung static void ixgbe_attach(device_t, device_t, void *);
156 1.1 dyoung static int ixgbe_detach(device_t, int);
157 1.1 dyoung #if 0
158 1.1 dyoung static int ixgbe_shutdown(device_t);
159 1.1 dyoung #endif
160 1.44 msaitoh static bool ixgbe_suspend(device_t, const pmf_qual_t *);
161 1.44 msaitoh static bool ixgbe_resume(device_t, const pmf_qual_t *);
162 1.88.2.6 snj static int ixgbe_ifflags_cb(struct ethercom *);
163 1.1 dyoung static int ixgbe_ioctl(struct ifnet *, u_long, void *);
164 1.1 dyoung static void ixgbe_ifstop(struct ifnet *, int);
165 1.1 dyoung static int ixgbe_init(struct ifnet *);
166 1.1 dyoung static void ixgbe_init_locked(struct adapter *);
167 1.1 dyoung static void ixgbe_stop(void *);
168 1.88.2.6 snj static void ixgbe_init_device_features(struct adapter *);
169 1.88.2.6 snj static void ixgbe_check_fan_failure(struct adapter *, u32, bool);
170 1.43 msaitoh static void ixgbe_add_media_types(struct adapter *);
171 1.1 dyoung static void ixgbe_media_status(struct ifnet *, struct ifmediareq *);
172 1.1 dyoung static int ixgbe_media_change(struct ifnet *);
173 1.1 dyoung static int ixgbe_allocate_pci_resources(struct adapter *,
174 1.1 dyoung const struct pci_attach_args *);
175 1.88.2.8 snj static void ixgbe_free_softint(struct adapter *);
176 1.48 msaitoh static void ixgbe_get_slot_info(struct adapter *);
177 1.1 dyoung static int ixgbe_allocate_msix(struct adapter *,
178 1.1 dyoung const struct pci_attach_args *);
179 1.1 dyoung static int ixgbe_allocate_legacy(struct adapter *,
180 1.1 dyoung const struct pci_attach_args *);
181 1.88.2.6 snj static int ixgbe_configure_interrupts(struct adapter *);
182 1.88.2.8 snj static void ixgbe_free_pciintr_resources(struct adapter *);
183 1.1 dyoung static void ixgbe_free_pci_resources(struct adapter *);
184 1.1 dyoung static void ixgbe_local_timer(void *);
185 1.63 msaitoh static void ixgbe_local_timer1(void *);
186 1.1 dyoung static int ixgbe_setup_interface(device_t, struct adapter *);
187 1.45 msaitoh static void ixgbe_config_gpie(struct adapter *);
188 1.44 msaitoh static void ixgbe_config_dmac(struct adapter *);
189 1.44 msaitoh static void ixgbe_config_delay_values(struct adapter *);
190 1.1 dyoung static void ixgbe_config_link(struct adapter *);
191 1.44 msaitoh static void ixgbe_check_wol_support(struct adapter *);
192 1.44 msaitoh static int ixgbe_setup_low_power_mode(struct adapter *);
193 1.43 msaitoh static void ixgbe_rearm_queues(struct adapter *, u64);
194 1.1 dyoung
195 1.1 dyoung static void ixgbe_initialize_transmit_units(struct adapter *);
196 1.1 dyoung static void ixgbe_initialize_receive_units(struct adapter *);
197 1.43 msaitoh static void ixgbe_enable_rx_drop(struct adapter *);
198 1.43 msaitoh static void ixgbe_disable_rx_drop(struct adapter *);
199 1.48 msaitoh static void ixgbe_initialize_rss_mapping(struct adapter *);
200 1.1 dyoung
201 1.1 dyoung static void ixgbe_enable_intr(struct adapter *);
202 1.1 dyoung static void ixgbe_disable_intr(struct adapter *);
203 1.1 dyoung static void ixgbe_update_stats_counters(struct adapter *);
204 1.1 dyoung static void ixgbe_set_promisc(struct adapter *);
205 1.1 dyoung static void ixgbe_set_multi(struct adapter *);
206 1.1 dyoung static void ixgbe_update_link_status(struct adapter *);
207 1.1 dyoung static void ixgbe_set_ivar(struct adapter *, u8, u8, s8);
208 1.1 dyoung static void ixgbe_configure_ivars(struct adapter *);
209 1.1 dyoung static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
210 1.88.2.10 martin static void ixgbe_eitr_write(struct ix_queue *, uint32_t);
211 1.1 dyoung
212 1.1 dyoung static void ixgbe_setup_vlan_hw_support(struct adapter *);
213 1.1 dyoung #if 0
214 1.1 dyoung static void ixgbe_register_vlan(void *, struct ifnet *, u16);
215 1.1 dyoung static void ixgbe_unregister_vlan(void *, struct ifnet *, u16);
216 1.1 dyoung #endif
217 1.1 dyoung
218 1.44 msaitoh static void ixgbe_add_device_sysctls(struct adapter *);
219 1.44 msaitoh static void ixgbe_add_hw_stats(struct adapter *);
220 1.85 msaitoh static void ixgbe_clear_evcnt(struct adapter *);
221 1.52 msaitoh static int ixgbe_set_flowcntl(struct adapter *, int);
222 1.52 msaitoh static int ixgbe_set_advertise(struct adapter *, int);
223 1.88.2.6 snj static int ixgbe_get_advertise(struct adapter *);
224 1.44 msaitoh
225 1.44 msaitoh /* Sysctl handlers */
226 1.47 msaitoh static void ixgbe_set_sysctl_value(struct adapter *, const char *,
227 1.48 msaitoh const char *, int *, int);
228 1.52 msaitoh static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO);
229 1.52 msaitoh static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO);
230 1.88.2.6 snj static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO);
231 1.44 msaitoh static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO);
232 1.44 msaitoh static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO);
233 1.44 msaitoh static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO);
234 1.48 msaitoh #ifdef IXGBE_DEBUG
235 1.48 msaitoh static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO);
236 1.48 msaitoh static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO);
237 1.48 msaitoh #endif
238 1.88.2.6 snj static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO);
239 1.88.2.6 snj static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO);
240 1.88.2.6 snj static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO);
241 1.88.2.6 snj static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO);
242 1.88.2.6 snj static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO);
243 1.44 msaitoh static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO);
244 1.44 msaitoh static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO);
245 1.1 dyoung
246 1.1 dyoung /* Support for pluggable optic modules */
247 1.1 dyoung static bool ixgbe_sfp_probe(struct adapter *);
248 1.1 dyoung
249 1.88.2.6 snj /* Legacy (single vector) interrupt handler */
250 1.1 dyoung static int ixgbe_legacy_irq(void *);
251 1.1 dyoung
252 1.88.2.6 snj /* The MSI/MSI-X Interrupt handlers */
253 1.34 msaitoh static int ixgbe_msix_que(void *);
254 1.34 msaitoh static int ixgbe_msix_link(void *);
255 1.1 dyoung
256 1.1 dyoung /* Software interrupts for deferred work */
257 1.1 dyoung static void ixgbe_handle_que(void *);
258 1.1 dyoung static void ixgbe_handle_link(void *);
259 1.1 dyoung static void ixgbe_handle_msf(void *);
260 1.1 dyoung static void ixgbe_handle_mod(void *);
261 1.44 msaitoh static void ixgbe_handle_phy(void *);
262 1.1 dyoung
263 1.88.2.12 martin /* Workqueue handler for deferred work */
264 1.88.2.12 martin static void ixgbe_handle_que_work(struct work *, void *);
265 1.88.2.12 martin
266 1.1 dyoung static ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *);
267 1.1 dyoung
268 1.88.2.6 snj /************************************************************************
269 1.88.2.6 snj * NetBSD Device Interface Entry Points
270 1.88.2.6 snj ************************************************************************/
271 1.1 dyoung CFATTACH_DECL3_NEW(ixg, sizeof(struct adapter),
272 1.1 dyoung ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL,
273 1.1 dyoung DVF_DETACH_SHUTDOWN);
274 1.1 dyoung
275 1.1 dyoung #if 0
276 1.44 msaitoh devclass_t ix_devclass;
277 1.44 msaitoh DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0);
278 1.1 dyoung
279 1.44 msaitoh MODULE_DEPEND(ix, pci, 1, 1, 1);
280 1.44 msaitoh MODULE_DEPEND(ix, ether, 1, 1, 1);
281 1.88.2.6 snj #ifdef DEV_NETMAP
282 1.88.2.6 snj MODULE_DEPEND(ix, netmap, 1, 1, 1);
283 1.88.2.6 snj #endif
284 1.1 dyoung #endif
285 1.1 dyoung
286 1.1 dyoung /*
287 1.88.2.6 snj * TUNEABLE PARAMETERS:
288 1.88.2.6 snj */
289 1.1 dyoung
290 1.1 dyoung /*
291 1.88.2.6 snj * AIM: Adaptive Interrupt Moderation
292 1.88.2.6 snj * which means that the interrupt rate
293 1.88.2.6 snj * is varied over time based on the
294 1.88.2.6 snj * traffic for that interrupt vector
295 1.88.2.6 snj */
296 1.73 msaitoh static bool ixgbe_enable_aim = true;
297 1.52 msaitoh #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7)
298 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0,
299 1.52 msaitoh "Enable adaptive interrupt moderation");
300 1.1 dyoung
301 1.22 msaitoh static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
302 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
303 1.52 msaitoh &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
304 1.1 dyoung
305 1.1 dyoung /* How many packets rxeof tries to clean at a time */
306 1.1 dyoung static int ixgbe_rx_process_limit = 256;
307 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
308 1.88.2.6 snj &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited");
309 1.1 dyoung
310 1.28 msaitoh /* How many packets txeof tries to clean at a time */
311 1.28 msaitoh static int ixgbe_tx_process_limit = 256;
312 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN,
313 1.52 msaitoh &ixgbe_tx_process_limit, 0,
314 1.88.2.6 snj "Maximum number of sent packets to process at a time, -1 means unlimited");
315 1.52 msaitoh
316 1.52 msaitoh /* Flow control setting, default to full */
317 1.52 msaitoh static int ixgbe_flow_control = ixgbe_fc_full;
318 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
319 1.52 msaitoh &ixgbe_flow_control, 0, "Default flow control used for all adapters");
320 1.52 msaitoh
321 1.88.2.12 martin /* Which pakcet processing uses workqueue or softint */
322 1.88.2.12 martin static bool ixgbe_txrx_workqueue = false;
323 1.88.2.12 martin
324 1.1 dyoung /*
325 1.88.2.6 snj * Smart speed setting, default to on
326 1.88.2.6 snj * this only works as a compile option
327 1.88.2.6 snj * right now as its during attach, set
328 1.88.2.6 snj * this to 'ixgbe_smart_speed_off' to
329 1.88.2.6 snj * disable.
330 1.88.2.6 snj */
331 1.1 dyoung static int ixgbe_smart_speed = ixgbe_smart_speed_on;
332 1.1 dyoung
333 1.1 dyoung /*
334 1.88.2.6 snj * MSI-X should be the default for best performance,
335 1.1 dyoung * but this allows it to be forced off for testing.
336 1.1 dyoung */
337 1.1 dyoung static int ixgbe_enable_msix = 1;
338 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
339 1.52 msaitoh "Enable MSI-X interrupts");
340 1.1 dyoung
341 1.1 dyoung /*
342 1.1 dyoung * Number of Queues, can be set to 0,
343 1.1 dyoung * it then autoconfigures based on the
344 1.1 dyoung * number of cpus with a max of 8. This
345 1.1 dyoung * can be overriden manually here.
346 1.1 dyoung */
347 1.62 msaitoh static int ixgbe_num_queues = 0;
348 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
349 1.52 msaitoh "Number of queues to configure, 0 indicates autoconfigure");
350 1.1 dyoung
351 1.1 dyoung /*
352 1.88.2.6 snj * Number of TX descriptors per ring,
353 1.88.2.6 snj * setting higher than RX as this seems
354 1.88.2.6 snj * the better performing choice.
355 1.88.2.6 snj */
356 1.1 dyoung static int ixgbe_txd = PERFORM_TXD;
357 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0,
358 1.52 msaitoh "Number of transmit descriptors per queue");
359 1.1 dyoung
360 1.1 dyoung /* Number of RX descriptors per ring */
361 1.1 dyoung static int ixgbe_rxd = PERFORM_RXD;
362 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0,
363 1.52 msaitoh "Number of receive descriptors per queue");
364 1.33 msaitoh
365 1.33 msaitoh /*
366 1.88.2.6 snj * Defining this on will allow the use
367 1.88.2.6 snj * of unsupported SFP+ modules, note that
368 1.88.2.6 snj * doing so you are on your own :)
369 1.88.2.6 snj */
370 1.35 msaitoh static int allow_unsupported_sfp = false;
371 1.52 msaitoh #define TUNABLE_INT(__x, __y)
372 1.52 msaitoh TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp);
373 1.1 dyoung
374 1.88.2.6 snj /*
375 1.88.2.6 snj * Not sure if Flow Director is fully baked,
376 1.88.2.6 snj * so we'll default to turning it off.
377 1.88.2.6 snj */
378 1.88.2.6 snj static int ixgbe_enable_fdir = 0;
379 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0,
380 1.88.2.6 snj "Enable Flow Director");
381 1.88.2.6 snj
382 1.88.2.6 snj /* Legacy Transmit (single queue) */
383 1.88.2.6 snj static int ixgbe_enable_legacy_tx = 0;
384 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN,
385 1.88.2.6 snj &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow");
386 1.88.2.6 snj
387 1.88.2.6 snj /* Receive-Side Scaling */
388 1.88.2.6 snj static int ixgbe_enable_rss = 1;
389 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0,
390 1.88.2.6 snj "Enable Receive-Side Scaling (RSS)");
391 1.88.2.6 snj
392 1.1 dyoung /* Keep running tab on them for sanity check */
393 1.1 dyoung static int ixgbe_total_ports;
394 1.1 dyoung
395 1.88.2.6 snj #if 0
396 1.88.2.6 snj static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *);
397 1.88.2.6 snj static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *);
398 1.1 dyoung #endif
399 1.1 dyoung
400 1.80 msaitoh #ifdef NET_MPSAFE
401 1.80 msaitoh #define IXGBE_MPSAFE 1
402 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE
403 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS SOFTINT_MPSAFE
404 1.88.2.12 martin #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE
405 1.80 msaitoh #else
406 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS 0
407 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS 0
408 1.88.2.12 martin #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU
409 1.80 msaitoh #endif
410 1.88.2.12 martin #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET
411 1.80 msaitoh
412 1.88.2.6 snj /************************************************************************
413 1.88.2.6 snj * ixgbe_initialize_rss_mapping
414 1.88.2.6 snj ************************************************************************/
415 1.88.2.6 snj static void
416 1.88.2.6 snj ixgbe_initialize_rss_mapping(struct adapter *adapter)
417 1.1 dyoung {
418 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
419 1.88.2.6 snj u32 reta = 0, mrqc, rss_key[10];
420 1.88.2.6 snj int queue_id, table_size, index_mult;
421 1.88.2.6 snj int i, j;
422 1.88.2.6 snj u32 rss_hash_config;
423 1.88.2.6 snj
424 1.88.2.9 snj /* force use default RSS key. */
425 1.88.2.9 snj #ifdef __NetBSD__
426 1.88.2.9 snj rss_getkey((uint8_t *) &rss_key);
427 1.88.2.9 snj #else
428 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
429 1.88.2.6 snj /* Fetch the configured RSS key */
430 1.88.2.6 snj rss_getkey((uint8_t *) &rss_key);
431 1.88.2.6 snj } else {
432 1.88.2.6 snj /* set up random bits */
433 1.88.2.6 snj cprng_fast(&rss_key, sizeof(rss_key));
434 1.88.2.6 snj }
435 1.88.2.9 snj #endif
436 1.1 dyoung
437 1.88.2.6 snj /* Set multiplier for RETA setup and table size based on MAC */
438 1.88.2.6 snj index_mult = 0x1;
439 1.88.2.6 snj table_size = 128;
440 1.88.2.6 snj switch (adapter->hw.mac.type) {
441 1.88.2.6 snj case ixgbe_mac_82598EB:
442 1.88.2.6 snj index_mult = 0x11;
443 1.88.2.6 snj break;
444 1.88.2.6 snj case ixgbe_mac_X550:
445 1.88.2.6 snj case ixgbe_mac_X550EM_x:
446 1.88.2.6 snj case ixgbe_mac_X550EM_a:
447 1.88.2.6 snj table_size = 512;
448 1.88.2.6 snj break;
449 1.88.2.6 snj default:
450 1.88.2.6 snj break;
451 1.88.2.6 snj }
452 1.1 dyoung
453 1.88.2.6 snj /* Set up the redirection table */
454 1.88.2.6 snj for (i = 0, j = 0; i < table_size; i++, j++) {
455 1.88.2.6 snj if (j == adapter->num_queues)
456 1.88.2.6 snj j = 0;
457 1.1 dyoung
458 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
459 1.88.2.6 snj /*
460 1.88.2.6 snj * Fetch the RSS bucket id for the given indirection
461 1.88.2.6 snj * entry. Cap it at the number of configured buckets
462 1.88.2.6 snj * (which is num_queues.)
463 1.88.2.6 snj */
464 1.88.2.6 snj queue_id = rss_get_indirection_to_bucket(i);
465 1.88.2.6 snj queue_id = queue_id % adapter->num_queues;
466 1.88.2.6 snj } else
467 1.88.2.6 snj queue_id = (j * index_mult);
468 1.1 dyoung
469 1.88.2.6 snj /*
470 1.88.2.6 snj * The low 8 bits are for hash value (n+0);
471 1.88.2.6 snj * The next 8 bits are for hash value (n+1), etc.
472 1.88.2.6 snj */
473 1.88.2.6 snj reta = reta >> 8;
474 1.88.2.6 snj reta = reta | (((uint32_t) queue_id) << 24);
475 1.88.2.6 snj if ((i & 3) == 3) {
476 1.88.2.6 snj if (i < 128)
477 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
478 1.88.2.6 snj else
479 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
480 1.88.2.6 snj reta);
481 1.88.2.6 snj reta = 0;
482 1.88.2.6 snj }
483 1.88.2.6 snj }
484 1.1 dyoung
485 1.88.2.6 snj /* Now fill our hash function seeds */
486 1.88.2.6 snj for (i = 0; i < 10; i++)
487 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
488 1.1 dyoung
489 1.88.2.6 snj /* Perform hash on these packet types */
490 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
491 1.88.2.6 snj rss_hash_config = rss_gethashconfig();
492 1.88.2.6 snj else {
493 1.88.2.6 snj /*
494 1.88.2.6 snj * Disable UDP - IP fragments aren't currently being handled
495 1.88.2.6 snj * and so we end up with a mix of 2-tuple and 4-tuple
496 1.88.2.6 snj * traffic.
497 1.88.2.6 snj */
498 1.88.2.6 snj rss_hash_config = RSS_HASHTYPE_RSS_IPV4
499 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV4
500 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6
501 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6
502 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6_EX
503 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6_EX;
504 1.1 dyoung }
505 1.1 dyoung
506 1.88.2.6 snj mrqc = IXGBE_MRQC_RSSEN;
507 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
508 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4;
509 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
510 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
511 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
512 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6;
513 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
514 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
515 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
516 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX;
517 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
518 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP;
519 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
520 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
521 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
522 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
523 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
524 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
525 1.88.2.6 snj mrqc |= ixgbe_get_mrqc(adapter->iov_mode);
526 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
527 1.88.2.6 snj } /* ixgbe_initialize_rss_mapping */
528 1.1 dyoung
529 1.88.2.6 snj /************************************************************************
530 1.88.2.6 snj * ixgbe_initialize_receive_units - Setup receive registers and features.
531 1.88.2.6 snj ************************************************************************/
532 1.88.2.6 snj #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1)
533 1.88.2.6 snj
534 1.1 dyoung static void
535 1.88.2.6 snj ixgbe_initialize_receive_units(struct adapter *adapter)
536 1.1 dyoung {
537 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
538 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
539 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
540 1.88.2.6 snj int i, j;
541 1.88.2.6 snj u32 bufsz, fctrl, srrctl, rxcsum;
542 1.88.2.6 snj u32 hlreg;
543 1.1 dyoung
544 1.88.2.6 snj /*
545 1.88.2.6 snj * Make sure receives are disabled while
546 1.88.2.6 snj * setting up the descriptor ring
547 1.88.2.6 snj */
548 1.88.2.6 snj ixgbe_disable_rx(hw);
549 1.1 dyoung
550 1.88.2.6 snj /* Enable broadcasts */
551 1.88.2.6 snj fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
552 1.88.2.6 snj fctrl |= IXGBE_FCTRL_BAM;
553 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
554 1.88.2.6 snj fctrl |= IXGBE_FCTRL_DPF;
555 1.88.2.6 snj fctrl |= IXGBE_FCTRL_PMCF;
556 1.88.2.6 snj }
557 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
558 1.1 dyoung
559 1.88.2.6 snj /* Set for Jumbo Frames? */
560 1.88.2.6 snj hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);
561 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU)
562 1.88.2.6 snj hlreg |= IXGBE_HLREG0_JUMBOEN;
563 1.88.2.6 snj else
564 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_JUMBOEN;
565 1.1 dyoung
566 1.47 msaitoh #ifdef DEV_NETMAP
567 1.88.2.6 snj /* CRC stripping is conditional in Netmap */
568 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
569 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP) &&
570 1.88.2.6 snj !ix_crcstrip)
571 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_RXCRCSTRP;
572 1.88.2.6 snj else
573 1.88.2.6 snj #endif /* DEV_NETMAP */
574 1.88.2.6 snj hlreg |= IXGBE_HLREG0_RXCRCSTRP;
575 1.47 msaitoh
576 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
577 1.1 dyoung
578 1.88.2.6 snj bufsz = (adapter->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >>
579 1.88.2.6 snj IXGBE_SRRCTL_BSIZEPKT_SHIFT;
580 1.1 dyoung
581 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++, rxr++) {
582 1.88.2.6 snj u64 rdba = rxr->rxdma.dma_paddr;
583 1.88.2.6 snj u32 tqsmreg, reg;
584 1.88.2.6 snj int regnum = i / 4; /* 1 register per 4 queues */
585 1.88.2.6 snj int regshift = i % 4; /* 4 bits per 1 queue */
586 1.88.2.6 snj j = rxr->me;
587 1.1 dyoung
588 1.88.2.6 snj /* Setup the Base and Length of the Rx Descriptor Ring */
589 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
590 1.88.2.6 snj (rdba & 0x00000000ffffffffULL));
591 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
592 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
593 1.88.2.6 snj adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc));
594 1.79 msaitoh
595 1.88.2.6 snj /* Set up the SRRCTL register */
596 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));
597 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
598 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
599 1.88.2.6 snj srrctl |= bufsz;
600 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
601 1.1 dyoung
602 1.88.2.6 snj /* Set RQSMR (Receive Queue Statistic Mapping) register */
603 1.88.2.6 snj reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum));
604 1.88.2.6 snj reg &= ~(0x000000ff << (regshift * 8));
605 1.88.2.6 snj reg |= i << (regshift * 8);
606 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg);
607 1.47 msaitoh
608 1.88.2.6 snj /*
609 1.88.2.6 snj * Set RQSMR (Receive Queue Statistic Mapping) register.
610 1.88.2.6 snj * Register location for queue 0...7 are different between
611 1.88.2.6 snj * 82598 and newer.
612 1.88.2.6 snj */
613 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB)
614 1.88.2.6 snj tqsmreg = IXGBE_TQSMR(regnum);
615 1.88.2.6 snj else
616 1.88.2.6 snj tqsmreg = IXGBE_TQSM(regnum);
617 1.88.2.6 snj reg = IXGBE_READ_REG(hw, tqsmreg);
618 1.88.2.6 snj reg &= ~(0x000000ff << (regshift * 8));
619 1.88.2.6 snj reg |= i << (regshift * 8);
620 1.88.2.6 snj IXGBE_WRITE_REG(hw, tqsmreg, reg);
621 1.47 msaitoh
622 1.88.2.6 snj /*
623 1.88.2.6 snj * Set DROP_EN iff we have no flow control and >1 queue.
624 1.88.2.6 snj * Note that srrctl was cleared shortly before during reset,
625 1.88.2.6 snj * so we do not need to clear the bit, but do it just in case
626 1.88.2.6 snj * this code is moved elsewhere.
627 1.88.2.6 snj */
628 1.88.2.6 snj if (adapter->num_queues > 1 &&
629 1.88.2.6 snj adapter->hw.fc.requested_mode == ixgbe_fc_none) {
630 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
631 1.88.2.6 snj } else {
632 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
633 1.88.2.6 snj }
634 1.88.2.6 snj
635 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);
636 1.88.2.6 snj
637 1.88.2.6 snj /* Setup the HW Rx Head and Tail Descriptor Pointers */
638 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
639 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
640 1.88.2.6 snj
641 1.88.2.6 snj /* Set the driver rx tail address */
642 1.88.2.6 snj rxr->tail = IXGBE_RDT(rxr->me);
643 1.88.2.6 snj }
644 1.88.2.6 snj
645 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
646 1.88.2.6 snj u32 psrtype = IXGBE_PSRTYPE_TCPHDR
647 1.88.2.6 snj | IXGBE_PSRTYPE_UDPHDR
648 1.88.2.6 snj | IXGBE_PSRTYPE_IPV4HDR
649 1.88.2.6 snj | IXGBE_PSRTYPE_IPV6HDR;
650 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
651 1.88.2.6 snj }
652 1.88.2.6 snj
653 1.88.2.6 snj rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
654 1.88.2.6 snj
655 1.88.2.6 snj ixgbe_initialize_rss_mapping(adapter);
656 1.88.2.6 snj
657 1.88.2.6 snj if (adapter->num_queues > 1) {
658 1.88.2.6 snj /* RSS and RX IPP Checksum are mutually exclusive */
659 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
660 1.88.2.6 snj }
661 1.88.2.6 snj
662 1.88.2.6 snj if (ifp->if_capenable & IFCAP_RXCSUM)
663 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
664 1.88.2.6 snj
665 1.88.2.6 snj /* This is useful for calculating UDP/IP fragment checksums */
666 1.88.2.6 snj if (!(rxcsum & IXGBE_RXCSUM_PCSD))
667 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_IPPCSE;
668 1.88.2.6 snj
669 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
670 1.88.2.6 snj
671 1.88.2.6 snj return;
672 1.88.2.6 snj } /* ixgbe_initialize_receive_units */
673 1.88.2.6 snj
674 1.88.2.6 snj /************************************************************************
675 1.88.2.6 snj * ixgbe_initialize_transmit_units - Enable transmit units.
676 1.88.2.6 snj ************************************************************************/
677 1.88.2.6 snj static void
678 1.88.2.6 snj ixgbe_initialize_transmit_units(struct adapter *adapter)
679 1.88.2.6 snj {
680 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
681 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
682 1.88.2.6 snj
683 1.88.2.6 snj /* Setup the Base and Length of the Tx Descriptor Ring */
684 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, txr++) {
685 1.88.2.6 snj u64 tdba = txr->txdma.dma_paddr;
686 1.88.2.6 snj u32 txctrl = 0;
687 1.88.2.6 snj int j = txr->me;
688 1.88.2.6 snj
689 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
690 1.88.2.6 snj (tdba & 0x00000000ffffffffULL));
691 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
692 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),
693 1.88.2.6 snj adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc));
694 1.88.2.6 snj
695 1.88.2.6 snj /* Setup the HW Tx Head and Tail descriptor pointers */
696 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
697 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
698 1.88.2.6 snj
699 1.88.2.6 snj /* Cache the tail address */
700 1.88.2.6 snj txr->tail = IXGBE_TDT(j);
701 1.88.2.6 snj
702 1.88.2.6 snj /* Disable Head Writeback */
703 1.88.2.6 snj /*
704 1.88.2.6 snj * Note: for X550 series devices, these registers are actually
705 1.88.2.6 snj * prefixed with TPH_ isntead of DCA_, but the addresses and
706 1.88.2.6 snj * fields remain the same.
707 1.88.2.6 snj */
708 1.88.2.6 snj switch (hw->mac.type) {
709 1.88.2.6 snj case ixgbe_mac_82598EB:
710 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
711 1.88.2.6 snj break;
712 1.88.2.6 snj default:
713 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
714 1.88.2.6 snj break;
715 1.88.2.6 snj }
716 1.88.2.6 snj txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
717 1.88.2.6 snj switch (hw->mac.type) {
718 1.88.2.6 snj case ixgbe_mac_82598EB:
719 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
720 1.88.2.6 snj break;
721 1.88.2.6 snj default:
722 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
723 1.88.2.6 snj break;
724 1.88.2.6 snj }
725 1.88.2.6 snj
726 1.88.2.6 snj }
727 1.88.2.6 snj
728 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
729 1.88.2.6 snj u32 dmatxctl, rttdcs;
730 1.88.2.6 snj
731 1.88.2.6 snj dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
732 1.88.2.6 snj dmatxctl |= IXGBE_DMATXCTL_TE;
733 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
734 1.88.2.6 snj /* Disable arbiter to set MTQC */
735 1.88.2.6 snj rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
736 1.88.2.6 snj rttdcs |= IXGBE_RTTDCS_ARBDIS;
737 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
738 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MTQC,
739 1.88.2.6 snj ixgbe_get_mtqc(adapter->iov_mode));
740 1.88.2.6 snj rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
741 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
742 1.88.2.6 snj }
743 1.88.2.6 snj
744 1.88.2.6 snj return;
745 1.88.2.6 snj } /* ixgbe_initialize_transmit_units */
746 1.88.2.6 snj
747 1.88.2.6 snj /************************************************************************
748 1.88.2.6 snj * ixgbe_attach - Device initialization routine
749 1.88.2.6 snj *
750 1.88.2.6 snj * Called when the driver is being loaded.
751 1.88.2.6 snj * Identifies the type of hardware, allocates all resources
752 1.88.2.6 snj * and initializes the hardware.
753 1.88.2.6 snj *
754 1.88.2.6 snj * return 0 on success, positive on failure
755 1.88.2.6 snj ************************************************************************/
756 1.88.2.6 snj static void
757 1.88.2.6 snj ixgbe_attach(device_t parent, device_t dev, void *aux)
758 1.88.2.6 snj {
759 1.88.2.6 snj struct adapter *adapter;
760 1.88.2.6 snj struct ixgbe_hw *hw;
761 1.88.2.6 snj int error = -1;
762 1.88.2.6 snj u32 ctrl_ext;
763 1.88.2.6 snj u16 high, low, nvmreg;
764 1.88.2.6 snj pcireg_t id, subid;
765 1.88.2.6 snj ixgbe_vendor_info_t *ent;
766 1.88.2.6 snj struct pci_attach_args *pa = aux;
767 1.88.2.6 snj const char *str;
768 1.88.2.6 snj char buf[256];
769 1.88.2.6 snj
770 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_attach: begin");
771 1.88.2.6 snj
772 1.88.2.6 snj /* Allocate, clear, and link in our adapter structure */
773 1.88.2.6 snj adapter = device_private(dev);
774 1.88.2.6 snj adapter->hw.back = adapter;
775 1.88.2.6 snj adapter->dev = dev;
776 1.88.2.6 snj hw = &adapter->hw;
777 1.88.2.6 snj adapter->osdep.pc = pa->pa_pc;
778 1.88.2.6 snj adapter->osdep.tag = pa->pa_tag;
779 1.88.2.6 snj if (pci_dma64_available(pa))
780 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat64;
781 1.88.2.6 snj else
782 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat;
783 1.88.2.6 snj adapter->osdep.attached = false;
784 1.88.2.6 snj
785 1.88.2.6 snj ent = ixgbe_lookup(pa);
786 1.88.2.6 snj
787 1.88.2.6 snj KASSERT(ent != NULL);
788 1.88.2.6 snj
789 1.88.2.6 snj aprint_normal(": %s, Version - %s\n",
790 1.88.2.6 snj ixgbe_strings[ent->index], ixgbe_driver_version);
791 1.88.2.6 snj
792 1.88.2.6 snj /* Core Lock Init*/
793 1.88.2.6 snj IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
794 1.88.2.6 snj
795 1.88.2.6 snj /* Set up the timer callout */
796 1.88.2.6 snj callout_init(&adapter->timer, IXGBE_CALLOUT_FLAGS);
797 1.88.2.6 snj
798 1.88.2.6 snj /* Determine hardware revision */
799 1.88.2.6 snj id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
800 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
801 1.88.2.6 snj
802 1.88.2.6 snj hw->vendor_id = PCI_VENDOR(id);
803 1.88.2.6 snj hw->device_id = PCI_PRODUCT(id);
804 1.88.2.6 snj hw->revision_id =
805 1.88.2.6 snj PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
806 1.88.2.6 snj hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid);
807 1.88.2.6 snj hw->subsystem_device_id = PCI_SUBSYS_ID(subid);
808 1.88.2.6 snj
809 1.88.2.6 snj /*
810 1.88.2.6 snj * Make sure BUSMASTER is set
811 1.88.2.6 snj */
812 1.88.2.6 snj ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag);
813 1.88.2.6 snj
814 1.88.2.6 snj /* Do base PCI setup - map BAR0 */
815 1.88.2.6 snj if (ixgbe_allocate_pci_resources(adapter, pa)) {
816 1.88.2.6 snj aprint_error_dev(dev, "Allocation of PCI resources failed\n");
817 1.88.2.6 snj error = ENXIO;
818 1.88.2.6 snj goto err_out;
819 1.88.2.6 snj }
820 1.88.2.6 snj
821 1.88.2.6 snj /* let hardware know driver is loaded */
822 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
823 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD;
824 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
825 1.88.2.6 snj
826 1.88.2.6 snj /*
827 1.88.2.6 snj * Initialize the shared code
828 1.88.2.6 snj */
829 1.88.2.6 snj if (ixgbe_init_shared_code(hw)) {
830 1.88.2.6 snj aprint_error_dev(dev, "Unable to initialize the shared code\n");
831 1.88.2.6 snj error = ENXIO;
832 1.88.2.6 snj goto err_out;
833 1.88.2.6 snj }
834 1.88.2.6 snj
835 1.88.2.6 snj switch (hw->mac.type) {
836 1.88.2.6 snj case ixgbe_mac_82598EB:
837 1.88.2.6 snj str = "82598EB";
838 1.88.2.6 snj break;
839 1.88.2.6 snj case ixgbe_mac_82599EB:
840 1.88.2.6 snj str = "82599EB";
841 1.88.2.6 snj break;
842 1.88.2.6 snj case ixgbe_mac_X540:
843 1.88.2.6 snj str = "X540";
844 1.88.2.6 snj break;
845 1.88.2.6 snj case ixgbe_mac_X550:
846 1.88.2.6 snj str = "X550";
847 1.88.2.6 snj break;
848 1.88.2.6 snj case ixgbe_mac_X550EM_x:
849 1.88.2.6 snj str = "X550EM";
850 1.88.2.6 snj break;
851 1.88.2.6 snj case ixgbe_mac_X550EM_a:
852 1.88.2.6 snj str = "X550EM A";
853 1.88.2.6 snj break;
854 1.88.2.6 snj default:
855 1.88.2.6 snj str = "Unknown";
856 1.88.2.6 snj break;
857 1.88.2.6 snj }
858 1.88.2.6 snj aprint_normal_dev(dev, "device %s\n", str);
859 1.88.2.6 snj
860 1.88.2.6 snj if (hw->mbx.ops.init_params)
861 1.88.2.6 snj hw->mbx.ops.init_params(hw);
862 1.88.2.6 snj
863 1.88.2.6 snj hw->allow_unsupported_sfp = allow_unsupported_sfp;
864 1.88.2.6 snj
865 1.88.2.6 snj /* Pick up the 82599 settings */
866 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
867 1.88.2.6 snj hw->phy.smart_speed = ixgbe_smart_speed;
868 1.88.2.6 snj adapter->num_segs = IXGBE_82599_SCATTER;
869 1.88.2.6 snj } else
870 1.88.2.6 snj adapter->num_segs = IXGBE_82598_SCATTER;
871 1.88.2.6 snj
872 1.88.2.6 snj hw->mac.ops.set_lan_id(hw);
873 1.88.2.6 snj ixgbe_init_device_features(adapter);
874 1.88.2.6 snj
875 1.88.2.6 snj if (ixgbe_configure_interrupts(adapter)) {
876 1.88.2.6 snj error = ENXIO;
877 1.88.2.6 snj goto err_out;
878 1.88.2.6 snj }
879 1.88.2.6 snj
880 1.88.2.6 snj /* Allocate multicast array memory. */
881 1.88.2.6 snj adapter->mta = malloc(sizeof(*adapter->mta) *
882 1.88.2.6 snj MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT);
883 1.88.2.6 snj if (adapter->mta == NULL) {
884 1.88.2.6 snj aprint_error_dev(dev, "Cannot allocate multicast setup array\n");
885 1.88.2.6 snj error = ENOMEM;
886 1.88.2.6 snj goto err_out;
887 1.88.2.6 snj }
888 1.88.2.6 snj
889 1.88.2.6 snj /* Enable WoL (if supported) */
890 1.88.2.6 snj ixgbe_check_wol_support(adapter);
891 1.88.2.6 snj
892 1.88.2.6 snj /* Verify adapter fan is still functional (if applicable) */
893 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
894 1.88.2.6 snj u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
895 1.88.2.6 snj ixgbe_check_fan_failure(adapter, esdp, FALSE);
896 1.88.2.6 snj }
897 1.88.2.6 snj
898 1.88.2.6 snj /* Ensure SW/FW semaphore is free */
899 1.88.2.6 snj ixgbe_init_swfw_semaphore(hw);
900 1.88.2.6 snj
901 1.88.2.6 snj /* Enable EEE power saving */
902 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_EEE)
903 1.88.2.6 snj hw->mac.ops.setup_eee(hw, TRUE);
904 1.88.2.6 snj
905 1.88.2.6 snj /* Set an initial default flow control value */
906 1.88.2.6 snj hw->fc.requested_mode = ixgbe_flow_control;
907 1.88.2.6 snj
908 1.88.2.6 snj /* Sysctls for limiting the amount of work done in the taskqueues */
909 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "rx_processing_limit",
910 1.88.2.6 snj "max number of rx packets to process",
911 1.88.2.6 snj &adapter->rx_process_limit, ixgbe_rx_process_limit);
912 1.88.2.6 snj
913 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "tx_processing_limit",
914 1.88.2.6 snj "max number of tx packets to process",
915 1.88.2.6 snj &adapter->tx_process_limit, ixgbe_tx_process_limit);
916 1.88.2.6 snj
917 1.88.2.6 snj /* Do descriptor calc and sanity checks */
918 1.1 dyoung if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 ||
919 1.1 dyoung ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) {
920 1.1 dyoung aprint_error_dev(dev, "TXD config issue, using default!\n");
921 1.1 dyoung adapter->num_tx_desc = DEFAULT_TXD;
922 1.1 dyoung } else
923 1.1 dyoung adapter->num_tx_desc = ixgbe_txd;
924 1.1 dyoung
925 1.1 dyoung /*
926 1.88.2.6 snj * With many RX rings it is easy to exceed the
927 1.88.2.6 snj * system mbuf allocation. Tuning nmbclusters
928 1.88.2.6 snj * can alleviate this.
929 1.88.2.6 snj */
930 1.43 msaitoh if (nmbclusters > 0) {
931 1.1 dyoung int s;
932 1.1 dyoung s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports;
933 1.1 dyoung if (s > nmbclusters) {
934 1.1 dyoung aprint_error_dev(dev, "RX Descriptors exceed "
935 1.1 dyoung "system mbuf max, using default instead!\n");
936 1.1 dyoung ixgbe_rxd = DEFAULT_RXD;
937 1.1 dyoung }
938 1.1 dyoung }
939 1.1 dyoung
940 1.1 dyoung if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 ||
941 1.33 msaitoh ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) {
942 1.1 dyoung aprint_error_dev(dev, "RXD config issue, using default!\n");
943 1.1 dyoung adapter->num_rx_desc = DEFAULT_RXD;
944 1.1 dyoung } else
945 1.1 dyoung adapter->num_rx_desc = ixgbe_rxd;
946 1.1 dyoung
947 1.1 dyoung /* Allocate our TX/RX Queues */
948 1.1 dyoung if (ixgbe_allocate_queues(adapter)) {
949 1.1 dyoung error = ENOMEM;
950 1.1 dyoung goto err_out;
951 1.1 dyoung }
952 1.1 dyoung
953 1.88.2.6 snj hw->phy.reset_if_overtemp = TRUE;
954 1.88.2.6 snj error = ixgbe_reset_hw(hw);
955 1.88.2.6 snj hw->phy.reset_if_overtemp = FALSE;
956 1.1 dyoung if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
957 1.1 dyoung /*
958 1.88.2.6 snj * No optics in this port, set up
959 1.88.2.6 snj * so the timer routine will probe
960 1.88.2.6 snj * for later insertion.
961 1.88.2.6 snj */
962 1.1 dyoung adapter->sfp_probe = TRUE;
963 1.88.2.6 snj error = IXGBE_SUCCESS;
964 1.35 msaitoh } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
965 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ module detected!\n");
966 1.1 dyoung error = EIO;
967 1.1 dyoung goto err_late;
968 1.1 dyoung } else if (error) {
969 1.88.2.6 snj aprint_error_dev(dev, "Hardware initialization failed\n");
970 1.1 dyoung error = EIO;
971 1.1 dyoung goto err_late;
972 1.1 dyoung }
973 1.1 dyoung
974 1.1 dyoung /* Make sure we have a good EEPROM before we read from it */
975 1.88.2.6 snj if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL) < 0) {
976 1.48 msaitoh aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n");
977 1.1 dyoung error = EIO;
978 1.1 dyoung goto err_late;
979 1.1 dyoung }
980 1.1 dyoung
981 1.88 msaitoh aprint_normal("%s:", device_xname(dev));
982 1.88 msaitoh /* NVM Image Version */
983 1.88 msaitoh switch (hw->mac.type) {
984 1.88 msaitoh case ixgbe_mac_X540:
985 1.88.2.6 snj case ixgbe_mac_X550EM_a:
986 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
987 1.88 msaitoh if (nvmreg == 0xffff)
988 1.88 msaitoh break;
989 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
990 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
991 1.88 msaitoh id = nvmreg & 0x0f;
992 1.88.2.6 snj aprint_normal(" NVM Image Version %u.", high);
993 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
994 1.88.2.6 snj str = "%x";
995 1.88.2.6 snj else
996 1.88.2.6 snj str = "%02x";
997 1.88.2.6 snj aprint_normal(str, low);
998 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
999 1.88 msaitoh break;
1000 1.88 msaitoh case ixgbe_mac_X550EM_x:
1001 1.88 msaitoh case ixgbe_mac_X550:
1002 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
1003 1.88 msaitoh if (nvmreg == 0xffff)
1004 1.88 msaitoh break;
1005 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1006 1.88 msaitoh low = nvmreg & 0xff;
1007 1.88.2.6 snj aprint_normal(" NVM Image Version %u.%02x,", high, low);
1008 1.88 msaitoh break;
1009 1.88 msaitoh default:
1010 1.88 msaitoh break;
1011 1.88 msaitoh }
1012 1.88 msaitoh
1013 1.88 msaitoh /* PHY firmware revision */
1014 1.88 msaitoh switch (hw->mac.type) {
1015 1.88 msaitoh case ixgbe_mac_X540:
1016 1.88 msaitoh case ixgbe_mac_X550:
1017 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg);
1018 1.88 msaitoh if (nvmreg == 0xffff)
1019 1.88 msaitoh break;
1020 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1021 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
1022 1.88 msaitoh id = nvmreg & 0x000f;
1023 1.88.2.6 snj aprint_normal(" PHY FW Revision %u.", high);
1024 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
1025 1.88.2.6 snj str = "%x";
1026 1.88.2.6 snj else
1027 1.88.2.6 snj str = "%02x";
1028 1.88.2.6 snj aprint_normal(str, low);
1029 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
1030 1.88 msaitoh break;
1031 1.88 msaitoh default:
1032 1.88 msaitoh break;
1033 1.88 msaitoh }
1034 1.88 msaitoh
1035 1.88 msaitoh /* NVM Map version & OEM NVM Image version */
1036 1.88 msaitoh switch (hw->mac.type) {
1037 1.88 msaitoh case ixgbe_mac_X550:
1038 1.88 msaitoh case ixgbe_mac_X550EM_x:
1039 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1040 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg);
1041 1.88 msaitoh if (nvmreg != 0xffff) {
1042 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1043 1.88 msaitoh low = nvmreg & 0x00ff;
1044 1.88 msaitoh aprint_normal(" NVM Map version %u.%02x,", high, low);
1045 1.88 msaitoh }
1046 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg);
1047 1.88.2.6 snj if (nvmreg != 0xffff) {
1048 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1049 1.88 msaitoh low = nvmreg & 0x00ff;
1050 1.88 msaitoh aprint_verbose(" OEM NVM Image version %u.%02x,", high,
1051 1.88 msaitoh low);
1052 1.88 msaitoh }
1053 1.88 msaitoh break;
1054 1.88 msaitoh default:
1055 1.88 msaitoh break;
1056 1.88 msaitoh }
1057 1.88 msaitoh
1058 1.88 msaitoh /* Print the ETrackID */
1059 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high);
1060 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low);
1061 1.88 msaitoh aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low);
1062 1.79 msaitoh
1063 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
1064 1.88.2.6 snj error = ixgbe_allocate_msix(adapter, pa);
1065 1.88.2.8 snj if (error) {
1066 1.88.2.8 snj /* Free allocated queue structures first */
1067 1.88.2.8 snj ixgbe_free_transmit_structures(adapter);
1068 1.88.2.8 snj ixgbe_free_receive_structures(adapter);
1069 1.88.2.8 snj free(adapter->queues, M_DEVBUF);
1070 1.88.2.8 snj
1071 1.88.2.8 snj /* Fallback to legacy interrupt */
1072 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSIX;
1073 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_MSI)
1074 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
1075 1.88.2.8 snj adapter->num_queues = 1;
1076 1.88.2.8 snj
1077 1.88.2.8 snj /* Allocate our TX/RX Queues again */
1078 1.88.2.8 snj if (ixgbe_allocate_queues(adapter)) {
1079 1.88.2.8 snj error = ENOMEM;
1080 1.88.2.8 snj goto err_out;
1081 1.88.2.8 snj }
1082 1.88.2.8 snj }
1083 1.88.2.8 snj }
1084 1.88.2.8 snj if ((adapter->feat_en & IXGBE_FEATURE_MSIX) == 0)
1085 1.88.2.6 snj error = ixgbe_allocate_legacy(adapter, pa);
1086 1.88.2.6 snj if (error)
1087 1.88.2.6 snj goto err_late;
1088 1.88.2.6 snj
1089 1.88.2.8 snj /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */
1090 1.88.2.8 snj adapter->link_si = softint_establish(SOFTINT_NET |IXGBE_SOFTINFT_FLAGS,
1091 1.88.2.8 snj ixgbe_handle_link, adapter);
1092 1.88.2.8 snj adapter->mod_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1093 1.88.2.8 snj ixgbe_handle_mod, adapter);
1094 1.88.2.8 snj adapter->msf_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1095 1.88.2.8 snj ixgbe_handle_msf, adapter);
1096 1.88.2.8 snj adapter->phy_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1097 1.88.2.8 snj ixgbe_handle_phy, adapter);
1098 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
1099 1.88.2.8 snj adapter->fdir_si =
1100 1.88.2.8 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1101 1.88.2.8 snj ixgbe_reinit_fdir, adapter);
1102 1.88.2.8 snj if ((adapter->link_si == NULL) || (adapter->mod_si == NULL)
1103 1.88.2.8 snj || (adapter->msf_si == NULL) || (adapter->phy_si == NULL)
1104 1.88.2.8 snj || ((adapter->feat_en & IXGBE_FEATURE_FDIR)
1105 1.88.2.8 snj && (adapter->fdir_si == NULL))) {
1106 1.88.2.8 snj aprint_error_dev(dev,
1107 1.88.2.8 snj "could not establish software interrupts ()\n");
1108 1.88.2.8 snj goto err_out;
1109 1.88.2.8 snj }
1110 1.88.2.8 snj
1111 1.88.2.6 snj error = ixgbe_start_hw(hw);
1112 1.25 msaitoh switch (error) {
1113 1.25 msaitoh case IXGBE_ERR_EEPROM_VERSION:
1114 1.1 dyoung aprint_error_dev(dev, "This device is a pre-production adapter/"
1115 1.1 dyoung "LOM. Please be aware there may be issues associated "
1116 1.48 msaitoh "with your hardware.\nIf you are experiencing problems "
1117 1.1 dyoung "please contact your Intel or hardware representative "
1118 1.1 dyoung "who provided you with this hardware.\n");
1119 1.25 msaitoh break;
1120 1.25 msaitoh case IXGBE_ERR_SFP_NOT_SUPPORTED:
1121 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ Module\n");
1122 1.1 dyoung error = EIO;
1123 1.1 dyoung goto err_late;
1124 1.25 msaitoh case IXGBE_ERR_SFP_NOT_PRESENT:
1125 1.48 msaitoh aprint_error_dev(dev, "No SFP+ Module found\n");
1126 1.25 msaitoh /* falls thru */
1127 1.25 msaitoh default:
1128 1.25 msaitoh break;
1129 1.1 dyoung }
1130 1.1 dyoung
1131 1.88.2.8 snj /* Setup OS specific network interface */
1132 1.88.2.8 snj if (ixgbe_setup_interface(dev, adapter) != 0)
1133 1.88.2.8 snj goto err_late;
1134 1.88.2.8 snj
1135 1.88.2.6 snj /*
1136 1.88.2.6 snj * Print PHY ID only for copper PHY. On device which has SFP(+) cage
1137 1.88.2.6 snj * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID.
1138 1.88.2.6 snj */
1139 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_copper) {
1140 1.88.2.2 snj uint16_t id1, id2;
1141 1.88.2.2 snj int oui, model, rev;
1142 1.88.2.2 snj const char *descr;
1143 1.88.2.2 snj
1144 1.88.2.2 snj id1 = hw->phy.id >> 16;
1145 1.88.2.2 snj id2 = hw->phy.id & 0xffff;
1146 1.88.2.2 snj oui = MII_OUI(id1, id2);
1147 1.88.2.2 snj model = MII_MODEL(id2);
1148 1.88.2.2 snj rev = MII_REV(id2);
1149 1.88.2.2 snj if ((descr = mii_get_descr(oui, model)) != NULL)
1150 1.88.2.2 snj aprint_normal_dev(dev,
1151 1.88.2.2 snj "PHY: %s (OUI 0x%06x, model 0x%04x), rev. %d\n",
1152 1.88.2.2 snj descr, oui, model, rev);
1153 1.88.2.2 snj else
1154 1.88.2.2 snj aprint_normal_dev(dev,
1155 1.88.2.2 snj "PHY OUI 0x%06x, model 0x%04x, rev. %d\n",
1156 1.88.2.2 snj oui, model, rev);
1157 1.88.2.2 snj }
1158 1.88.2.2 snj
1159 1.52 msaitoh /* Enable the optics for 82599 SFP+ fiber */
1160 1.52 msaitoh ixgbe_enable_tx_laser(hw);
1161 1.52 msaitoh
1162 1.52 msaitoh /* Enable power to the phy. */
1163 1.52 msaitoh ixgbe_set_phy_power(hw, TRUE);
1164 1.52 msaitoh
1165 1.1 dyoung /* Initialize statistics */
1166 1.1 dyoung ixgbe_update_stats_counters(adapter);
1167 1.1 dyoung
1168 1.88.2.6 snj /* Check PCIE slot type/speed/width */
1169 1.48 msaitoh ixgbe_get_slot_info(adapter);
1170 1.1 dyoung
1171 1.88.2.6 snj /*
1172 1.88.2.6 snj * Do time init and sysctl init here, but
1173 1.88.2.6 snj * only on the first port of a bypass adapter.
1174 1.88.2.6 snj */
1175 1.88.2.6 snj ixgbe_bypass_init(adapter);
1176 1.45 msaitoh
1177 1.88.2.6 snj /* Set an initial dmac value */
1178 1.88.2.6 snj adapter->dmac = 0;
1179 1.88.2.6 snj /* Set initial advertised speeds (if applicable) */
1180 1.88.2.6 snj adapter->advertise = ixgbe_get_advertise(adapter);
1181 1.45 msaitoh
1182 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
1183 1.88.2.6 snj ixgbe_define_iov_schemas(dev, &error);
1184 1.44 msaitoh
1185 1.44 msaitoh /* Add sysctls */
1186 1.44 msaitoh ixgbe_add_device_sysctls(adapter);
1187 1.44 msaitoh ixgbe_add_hw_stats(adapter);
1188 1.44 msaitoh
1189 1.88.2.6 snj /* For Netmap */
1190 1.88.2.6 snj adapter->init_locked = ixgbe_init_locked;
1191 1.88.2.6 snj adapter->stop_locked = ixgbe_stop;
1192 1.1 dyoung
1193 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
1194 1.88.2.6 snj ixgbe_netmap_attach(adapter);
1195 1.88.2.6 snj
1196 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_cap);
1197 1.88.2.6 snj aprint_verbose_dev(dev, "feature cap %s\n", buf);
1198 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_en);
1199 1.88.2.6 snj aprint_verbose_dev(dev, "feature ena %s\n", buf);
1200 1.44 msaitoh
1201 1.44 msaitoh if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume))
1202 1.44 msaitoh pmf_class_network_register(dev, adapter->ifp);
1203 1.44 msaitoh else
1204 1.44 msaitoh aprint_error_dev(dev, "couldn't establish power handler\n");
1205 1.44 msaitoh
1206 1.1 dyoung INIT_DEBUGOUT("ixgbe_attach: end");
1207 1.32 msaitoh adapter->osdep.attached = true;
1208 1.88.2.6 snj
1209 1.1 dyoung return;
1210 1.43 msaitoh
1211 1.1 dyoung err_late:
1212 1.1 dyoung ixgbe_free_transmit_structures(adapter);
1213 1.1 dyoung ixgbe_free_receive_structures(adapter);
1214 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
1215 1.1 dyoung err_out:
1216 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1217 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
1218 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
1219 1.88.2.8 snj ixgbe_free_softint(adapter);
1220 1.1 dyoung ixgbe_free_pci_resources(adapter);
1221 1.1 dyoung if (adapter->mta != NULL)
1222 1.1 dyoung free(adapter->mta, M_DEVBUF);
1223 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
1224 1.88.2.6 snj
1225 1.1 dyoung return;
1226 1.88.2.6 snj } /* ixgbe_attach */
1227 1.1 dyoung
1228 1.88.2.6 snj /************************************************************************
1229 1.88.2.6 snj * ixgbe_check_wol_support
1230 1.1 dyoung *
1231 1.88.2.6 snj * Checks whether the adapter's ports are capable of
1232 1.88.2.6 snj * Wake On LAN by reading the adapter's NVM.
1233 1.1 dyoung *
1234 1.88.2.6 snj * Sets each port's hw->wol_enabled value depending
1235 1.88.2.6 snj * on the value read here.
1236 1.88.2.6 snj ************************************************************************/
1237 1.88.2.6 snj static void
1238 1.88.2.6 snj ixgbe_check_wol_support(struct adapter *adapter)
1239 1.1 dyoung {
1240 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1241 1.88.2.6 snj u16 dev_caps = 0;
1242 1.1 dyoung
1243 1.88.2.6 snj /* Find out WoL support for port */
1244 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 0;
1245 1.88.2.6 snj ixgbe_get_device_caps(hw, &dev_caps);
1246 1.88.2.6 snj if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1247 1.88.2.6 snj ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1248 1.88.2.6 snj hw->bus.func == 0))
1249 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 1;
1250 1.1 dyoung
1251 1.88.2.6 snj /* Save initial wake up filter configuration */
1252 1.88.2.6 snj adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);
1253 1.1 dyoung
1254 1.88.2.6 snj return;
1255 1.88.2.6 snj } /* ixgbe_check_wol_support */
1256 1.45 msaitoh
1257 1.88.2.6 snj /************************************************************************
1258 1.88.2.6 snj * ixgbe_setup_interface
1259 1.88.2.6 snj *
1260 1.88.2.6 snj * Setup networking device structure and register an interface.
1261 1.88.2.6 snj ************************************************************************/
1262 1.88.2.6 snj static int
1263 1.88.2.6 snj ixgbe_setup_interface(device_t dev, struct adapter *adapter)
1264 1.88.2.6 snj {
1265 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
1266 1.88.2.6 snj struct ifnet *ifp;
1267 1.88.2.6 snj int rv;
1268 1.49 msaitoh
1269 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_setup_interface: begin");
1270 1.1 dyoung
1271 1.88.2.6 snj ifp = adapter->ifp = &ec->ec_if;
1272 1.88.2.6 snj strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ);
1273 1.88.2.6 snj ifp->if_baudrate = IF_Gbps(10);
1274 1.88.2.6 snj ifp->if_init = ixgbe_init;
1275 1.88.2.6 snj ifp->if_stop = ixgbe_ifstop;
1276 1.88.2.6 snj ifp->if_softc = adapter;
1277 1.88.2.6 snj ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1278 1.88.2.6 snj #ifdef IXGBE_MPSAFE
1279 1.88.2.7 snj ifp->if_extflags = IFEF_MPSAFE;
1280 1.26 msaitoh #endif
1281 1.88.2.6 snj ifp->if_ioctl = ixgbe_ioctl;
1282 1.88.2.6 snj #if __FreeBSD_version >= 1100045
1283 1.88.2.6 snj /* TSO parameters */
1284 1.88.2.6 snj ifp->if_hw_tsomax = 65518;
1285 1.88.2.6 snj ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER;
1286 1.88.2.6 snj ifp->if_hw_tsomaxsegsize = 2048;
1287 1.45 msaitoh #endif
1288 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_LEGACY_TX) {
1289 1.88.2.6 snj #if 0
1290 1.88.2.6 snj ixgbe_start_locked = ixgbe_legacy_start_locked;
1291 1.88.2.6 snj #endif
1292 1.88.2.6 snj } else {
1293 1.88.2.6 snj ifp->if_transmit = ixgbe_mq_start;
1294 1.88.2.6 snj #if 0
1295 1.88.2.6 snj ixgbe_start_locked = ixgbe_mq_start_locked;
1296 1.1 dyoung #endif
1297 1.88.2.6 snj }
1298 1.88.2.6 snj ifp->if_start = ixgbe_legacy_start;
1299 1.88.2.6 snj IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2);
1300 1.88.2.6 snj IFQ_SET_READY(&ifp->if_snd);
1301 1.1 dyoung
1302 1.88.2.6 snj rv = if_initialize(ifp);
1303 1.88.2.6 snj if (rv != 0) {
1304 1.88.2.6 snj aprint_error_dev(dev, "if_initialize failed(%d)\n", rv);
1305 1.88.2.6 snj return rv;
1306 1.88.2.6 snj }
1307 1.88.2.6 snj adapter->ipq = if_percpuq_create(&adapter->osdep.ec.ec_if);
1308 1.88.2.6 snj ether_ifattach(ifp, adapter->hw.mac.addr);
1309 1.88.2.6 snj /*
1310 1.88.2.6 snj * We use per TX queue softint, so if_deferred_start_init() isn't
1311 1.88.2.6 snj * used.
1312 1.88.2.6 snj */
1313 1.88.2.6 snj if_register(ifp);
1314 1.88.2.6 snj ether_set_ifflags_cb(ec, ixgbe_ifflags_cb);
1315 1.1 dyoung
1316 1.88.2.6 snj adapter->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1317 1.1 dyoung
1318 1.88.2.6 snj /*
1319 1.88.2.6 snj * Tell the upper layer(s) we support long frames.
1320 1.88.2.6 snj */
1321 1.88.2.6 snj ifp->if_hdrlen = sizeof(struct ether_vlan_header);
1322 1.26 msaitoh
1323 1.88.2.6 snj /* Set capability flags */
1324 1.88.2.6 snj ifp->if_capabilities |= IFCAP_RXCSUM
1325 1.88.2.6 snj | IFCAP_TXCSUM
1326 1.88.2.6 snj | IFCAP_TSOv4
1327 1.88.2.6 snj | IFCAP_TSOv6
1328 1.88.2.6 snj | IFCAP_LRO;
1329 1.88.2.6 snj ifp->if_capenable = 0;
1330 1.1 dyoung
1331 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING
1332 1.88.2.6 snj | ETHERCAP_VLAN_HWCSUM
1333 1.88.2.6 snj | ETHERCAP_JUMBO_MTU
1334 1.88.2.6 snj | ETHERCAP_VLAN_MTU;
1335 1.1 dyoung
1336 1.88.2.6 snj /* Enable the above capabilities by default */
1337 1.88.2.6 snj ec->ec_capenable = ec->ec_capabilities;
1338 1.1 dyoung
1339 1.88.2.6 snj /*
1340 1.88.2.6 snj * Don't turn this on by default, if vlans are
1341 1.88.2.6 snj * created on another pseudo device (eg. lagg)
1342 1.88.2.6 snj * then vlan events are not passed thru, breaking
1343 1.88.2.6 snj * operation, but with HW FILTER off it works. If
1344 1.88.2.6 snj * using vlans directly on the ixgbe driver you can
1345 1.88.2.6 snj * enable this and get full hardware tag filtering.
1346 1.88.2.6 snj */
1347 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER;
1348 1.1 dyoung
1349 1.88.2.6 snj /*
1350 1.88.2.6 snj * Specify the media types supported by this adapter and register
1351 1.88.2.6 snj * callbacks to update media and link information
1352 1.88.2.6 snj */
1353 1.88.2.6 snj ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change,
1354 1.88.2.6 snj ixgbe_media_status);
1355 1.1 dyoung
1356 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw);
1357 1.88.2.6 snj ixgbe_add_media_types(adapter);
1358 1.1 dyoung
1359 1.88.2.6 snj /* Set autoselect media by default */
1360 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
1361 1.1 dyoung
1362 1.88.2.6 snj return (0);
1363 1.88.2.6 snj } /* ixgbe_setup_interface */
1364 1.1 dyoung
1365 1.88.2.6 snj /************************************************************************
1366 1.88.2.6 snj * ixgbe_add_media_types
1367 1.88.2.6 snj ************************************************************************/
1368 1.88.2.6 snj static void
1369 1.88.2.6 snj ixgbe_add_media_types(struct adapter *adapter)
1370 1.1 dyoung {
1371 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1372 1.88.2.6 snj device_t dev = adapter->dev;
1373 1.88.2.6 snj u64 layer;
1374 1.44 msaitoh
1375 1.88.2.6 snj layer = adapter->phy_layer;
1376 1.44 msaitoh
1377 1.88.2.6 snj #define ADD(mm, dd) \
1378 1.88.2.6 snj ifmedia_add(&adapter->media, IFM_ETHER | (mm), (dd), NULL);
1379 1.44 msaitoh
1380 1.88.2.6 snj /* Media types with matching NetBSD media defines */
1381 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) {
1382 1.88.2.6 snj ADD(IFM_10G_T | IFM_FDX, 0);
1383 1.88.2.6 snj }
1384 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) {
1385 1.88.2.6 snj ADD(IFM_1000_T | IFM_FDX, 0);
1386 1.88.2.6 snj }
1387 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) {
1388 1.88.2.6 snj ADD(IFM_100_TX | IFM_FDX, 0);
1389 1.88.2.6 snj }
1390 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) {
1391 1.88.2.6 snj ADD(IFM_10_T | IFM_FDX, 0);
1392 1.88.2.6 snj }
1393 1.44 msaitoh
1394 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
1395 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) {
1396 1.88.2.6 snj ADD(IFM_10G_TWINAX | IFM_FDX, 0);
1397 1.88.2.6 snj }
1398 1.44 msaitoh
1399 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) {
1400 1.88.2.6 snj ADD(IFM_10G_LR | IFM_FDX, 0);
1401 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1402 1.88.2.6 snj ADD(IFM_1000_LX | IFM_FDX, 0);
1403 1.88.2.6 snj }
1404 1.88.2.6 snj }
1405 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) {
1406 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1407 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1408 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1409 1.88.2.6 snj }
1410 1.88.2.6 snj } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) {
1411 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1412 1.88.2.6 snj }
1413 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) {
1414 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1415 1.88.2.6 snj }
1416 1.44 msaitoh
1417 1.88.2.6 snj #ifdef IFM_ETH_XTYPE
1418 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1419 1.88.2.6 snj ADD(IFM_10G_KR | IFM_FDX, 0);
1420 1.88.2.6 snj }
1421 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1422 1.88.2.6 snj ADD(AIFM_10G_KX4 | IFM_FDX, 0);
1423 1.88.2.6 snj }
1424 1.88.2.6 snj #else
1425 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1426 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKR\n");
1427 1.88.2.6 snj device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n");
1428 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1429 1.88.2.6 snj }
1430 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1431 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKX4\n");
1432 1.88.2.6 snj device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n");
1433 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1434 1.88.2.6 snj }
1435 1.88.2.6 snj #endif
1436 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) {
1437 1.88.2.6 snj ADD(IFM_1000_KX | IFM_FDX, 0);
1438 1.88.2.6 snj }
1439 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) {
1440 1.88.2.6 snj ADD(IFM_2500_KX | IFM_FDX, 0);
1441 1.88.2.6 snj }
1442 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) {
1443 1.88.2.6 snj ADD(IFM_2500_T | IFM_FDX, 0);
1444 1.88.2.6 snj }
1445 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) {
1446 1.88.2.6 snj ADD(IFM_5000_T | IFM_FDX, 0);
1447 1.88.2.6 snj }
1448 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX)
1449 1.88.2.6 snj device_printf(dev, "Media supported: 1000baseBX\n");
1450 1.88.2.6 snj /* XXX no ifmedia_set? */
1451 1.88.2.6 snj
1452 1.88.2.6 snj ADD(IFM_AUTO, 0);
1453 1.44 msaitoh
1454 1.88.2.6 snj #undef ADD
1455 1.88.2.6 snj } /* ixgbe_add_media_types */
1456 1.44 msaitoh
1457 1.88.2.6 snj /************************************************************************
1458 1.88.2.6 snj * ixgbe_is_sfp
1459 1.88.2.6 snj ************************************************************************/
1460 1.88.2.6 snj static inline bool
1461 1.88.2.6 snj ixgbe_is_sfp(struct ixgbe_hw *hw)
1462 1.88.2.6 snj {
1463 1.88.2.6 snj switch (hw->mac.type) {
1464 1.88.2.6 snj case ixgbe_mac_82598EB:
1465 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_nl)
1466 1.88.2.6 snj return TRUE;
1467 1.88.2.6 snj return FALSE;
1468 1.88.2.6 snj case ixgbe_mac_82599EB:
1469 1.88.2.6 snj switch (hw->mac.ops.get_media_type(hw)) {
1470 1.88.2.6 snj case ixgbe_media_type_fiber:
1471 1.88.2.6 snj case ixgbe_media_type_fiber_qsfp:
1472 1.88.2.6 snj return TRUE;
1473 1.88.2.6 snj default:
1474 1.88.2.6 snj return FALSE;
1475 1.88.2.6 snj }
1476 1.88.2.6 snj case ixgbe_mac_X550EM_x:
1477 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1478 1.88.2.6 snj if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)
1479 1.88.2.6 snj return TRUE;
1480 1.88.2.6 snj return FALSE;
1481 1.88.2.6 snj default:
1482 1.88.2.6 snj return FALSE;
1483 1.88.2.6 snj }
1484 1.88.2.6 snj } /* ixgbe_is_sfp */
1485 1.44 msaitoh
1486 1.88.2.6 snj /************************************************************************
1487 1.88.2.6 snj * ixgbe_config_link
1488 1.88.2.6 snj ************************************************************************/
1489 1.88.2.6 snj static void
1490 1.88.2.6 snj ixgbe_config_link(struct adapter *adapter)
1491 1.44 msaitoh {
1492 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1493 1.88.2.6 snj u32 autoneg, err = 0;
1494 1.88.2.6 snj bool sfp, negotiate = false;
1495 1.44 msaitoh
1496 1.88.2.6 snj sfp = ixgbe_is_sfp(hw);
1497 1.44 msaitoh
1498 1.88.2.6 snj if (sfp) {
1499 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1500 1.88.2.6 snj hw->mac.ops.setup_sfp(hw);
1501 1.88.2.6 snj ixgbe_enable_tx_laser(hw);
1502 1.88.2.6 snj kpreempt_disable();
1503 1.88.2.6 snj softint_schedule(adapter->msf_si);
1504 1.88.2.6 snj kpreempt_enable();
1505 1.88.2.6 snj } else {
1506 1.88.2.6 snj kpreempt_disable();
1507 1.88.2.6 snj softint_schedule(adapter->mod_si);
1508 1.88.2.6 snj kpreempt_enable();
1509 1.88.2.6 snj }
1510 1.88.2.6 snj } else {
1511 1.88.2.6 snj if (hw->mac.ops.check_link)
1512 1.88.2.6 snj err = ixgbe_check_link(hw, &adapter->link_speed,
1513 1.88.2.6 snj &adapter->link_up, FALSE);
1514 1.88.2.6 snj if (err)
1515 1.88.2.6 snj goto out;
1516 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
1517 1.88.2.6 snj if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
1518 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1519 1.88.2.6 snj &negotiate);
1520 1.88.2.6 snj if (err)
1521 1.88.2.6 snj goto out;
1522 1.88.2.6 snj if (hw->mac.ops.setup_link)
1523 1.88.2.6 snj err = hw->mac.ops.setup_link(hw, autoneg,
1524 1.88.2.6 snj adapter->link_up);
1525 1.88.2.6 snj }
1526 1.88.2.6 snj out:
1527 1.44 msaitoh
1528 1.88.2.6 snj return;
1529 1.88.2.6 snj } /* ixgbe_config_link */
1530 1.1 dyoung
1531 1.88.2.6 snj /************************************************************************
1532 1.88.2.6 snj * ixgbe_update_stats_counters - Update board statistics counters.
1533 1.88.2.6 snj ************************************************************************/
1534 1.88.2.6 snj static void
1535 1.88.2.6 snj ixgbe_update_stats_counters(struct adapter *adapter)
1536 1.1 dyoung {
1537 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
1538 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1539 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1540 1.88.2.6 snj u32 missed_rx = 0, bprc, lxon, lxoff, total;
1541 1.88.2.6 snj u64 total_missed_rx = 0;
1542 1.88.2.6 snj uint64_t crcerrs, rlec;
1543 1.1 dyoung
1544 1.88.2.6 snj crcerrs = IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1545 1.88.2.6 snj stats->crcerrs.ev_count += crcerrs;
1546 1.88.2.6 snj stats->illerrc.ev_count += IXGBE_READ_REG(hw, IXGBE_ILLERRC);
1547 1.88.2.6 snj stats->errbc.ev_count += IXGBE_READ_REG(hw, IXGBE_ERRBC);
1548 1.88.2.6 snj stats->mspdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MSPDC);
1549 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X550)
1550 1.88.2.6 snj stats->mbsdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MBSDC);
1551 1.1 dyoung
1552 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->qprc); i++) {
1553 1.88.2.6 snj int j = i % adapter->num_queues;
1554 1.88.2.6 snj stats->qprc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
1555 1.88.2.6 snj stats->qptc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
1556 1.88.2.6 snj stats->qprdc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
1557 1.88.2.6 snj }
1558 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->mpc); i++) {
1559 1.88.2.6 snj uint32_t mp;
1560 1.88.2.6 snj int j = i % adapter->num_queues;
1561 1.1 dyoung
1562 1.88.2.6 snj mp = IXGBE_READ_REG(hw, IXGBE_MPC(i));
1563 1.88.2.6 snj /* global total per queue */
1564 1.88.2.6 snj stats->mpc[j].ev_count += mp;
1565 1.88.2.6 snj /* running comprehensive total for stats display */
1566 1.88.2.6 snj total_missed_rx += mp;
1567 1.1 dyoung
1568 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1569 1.88.2.6 snj stats->rnbc[j].ev_count
1570 1.88.2.6 snj += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
1571 1.88.2.6 snj
1572 1.88.2.6 snj }
1573 1.88.2.6 snj stats->mpctotal.ev_count += total_missed_rx;
1574 1.23 msaitoh
1575 1.88.2.6 snj /* Document says M[LR]FC are valid when link is up and 10Gbps */
1576 1.88.2.6 snj if ((adapter->link_active == TRUE)
1577 1.88.2.6 snj && (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) {
1578 1.88.2.6 snj stats->mlfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MLFC);
1579 1.88.2.6 snj stats->mrfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MRFC);
1580 1.88.2.6 snj }
1581 1.88.2.6 snj rlec = IXGBE_READ_REG(hw, IXGBE_RLEC);
1582 1.88.2.6 snj stats->rlec.ev_count += rlec;
1583 1.1 dyoung
1584 1.88.2.6 snj /* Hardware workaround, gprc counts missed packets */
1585 1.88.2.6 snj stats->gprc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx;
1586 1.1 dyoung
1587 1.88.2.6 snj lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1588 1.88.2.6 snj stats->lxontxc.ev_count += lxon;
1589 1.88.2.6 snj lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1590 1.88.2.6 snj stats->lxofftxc.ev_count += lxoff;
1591 1.88.2.6 snj total = lxon + lxoff;
1592 1.1 dyoung
1593 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1594 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCL) +
1595 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
1596 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
1597 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) - total * ETHER_MIN_LEN;
1598 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORL) +
1599 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);
1600 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
1601 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
1602 1.88.2.6 snj } else {
1603 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1604 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1605 1.88.2.6 snj /* 82598 only has a counter in the high register */
1606 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCH);
1607 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCH) - total * ETHER_MIN_LEN;
1608 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORH);
1609 1.1 dyoung }
1610 1.1 dyoung
1611 1.88.2.6 snj /*
1612 1.88.2.6 snj * Workaround: mprc hardware is incorrectly counting
1613 1.88.2.6 snj * broadcasts, so for now we subtract those.
1614 1.88.2.6 snj */
1615 1.88.2.6 snj bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1616 1.88.2.6 snj stats->bprc.ev_count += bprc;
1617 1.88.2.6 snj stats->mprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPRC)
1618 1.88.2.6 snj - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0);
1619 1.33 msaitoh
1620 1.88.2.6 snj stats->prc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC64);
1621 1.88.2.6 snj stats->prc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC127);
1622 1.88.2.6 snj stats->prc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC255);
1623 1.88.2.6 snj stats->prc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC511);
1624 1.88.2.6 snj stats->prc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1625 1.88.2.6 snj stats->prc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1626 1.88.2.6 snj
1627 1.88.2.6 snj stats->gptc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPTC) - total;
1628 1.88.2.6 snj stats->mptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPTC) - total;
1629 1.88.2.6 snj stats->ptc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC64) - total;
1630 1.88.2.6 snj
1631 1.88.2.6 snj stats->ruc.ev_count += IXGBE_READ_REG(hw, IXGBE_RUC);
1632 1.88.2.6 snj stats->rfc.ev_count += IXGBE_READ_REG(hw, IXGBE_RFC);
1633 1.88.2.6 snj stats->roc.ev_count += IXGBE_READ_REG(hw, IXGBE_ROC);
1634 1.88.2.6 snj stats->rjc.ev_count += IXGBE_READ_REG(hw, IXGBE_RJC);
1635 1.88.2.6 snj stats->mngprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPRC);
1636 1.88.2.6 snj stats->mngpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPDC);
1637 1.88.2.6 snj stats->mngptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPTC);
1638 1.88.2.6 snj stats->tpr.ev_count += IXGBE_READ_REG(hw, IXGBE_TPR);
1639 1.88.2.6 snj stats->tpt.ev_count += IXGBE_READ_REG(hw, IXGBE_TPT);
1640 1.88.2.6 snj stats->ptc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC127);
1641 1.88.2.6 snj stats->ptc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC255);
1642 1.88.2.6 snj stats->ptc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC511);
1643 1.88.2.6 snj stats->ptc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1023);
1644 1.88.2.6 snj stats->ptc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1522);
1645 1.88.2.6 snj stats->bptc.ev_count += IXGBE_READ_REG(hw, IXGBE_BPTC);
1646 1.88.2.6 snj stats->xec.ev_count += IXGBE_READ_REG(hw, IXGBE_XEC);
1647 1.88.2.6 snj stats->fccrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCCRC);
1648 1.88.2.6 snj stats->fclast.ev_count += IXGBE_READ_REG(hw, IXGBE_FCLAST);
1649 1.88.2.6 snj /* Only read FCOE on 82599 */
1650 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1651 1.88.2.6 snj stats->fcoerpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
1652 1.88.2.6 snj stats->fcoeprc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
1653 1.88.2.6 snj stats->fcoeptc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
1654 1.88.2.6 snj stats->fcoedwrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
1655 1.88.2.6 snj stats->fcoedwtc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
1656 1.1 dyoung }
1657 1.28 msaitoh
1658 1.88.2.6 snj /* Fill out the OS statistics structure */
1659 1.88.2.6 snj /*
1660 1.88.2.6 snj * NetBSD: Don't override if_{i|o}{packets|bytes|mcasts} with
1661 1.88.2.6 snj * adapter->stats counters. It's required to make ifconfig -z
1662 1.88.2.6 snj * (SOICZIFDATA) work.
1663 1.88.2.6 snj */
1664 1.88.2.6 snj ifp->if_collisions = 0;
1665 1.1 dyoung
1666 1.88.2.6 snj /* Rx Errors */
1667 1.88.2.6 snj ifp->if_iqdrops += total_missed_rx;
1668 1.88.2.6 snj ifp->if_ierrors += crcerrs + rlec;
1669 1.88.2.6 snj } /* ixgbe_update_stats_counters */
1670 1.48 msaitoh
1671 1.88.2.6 snj /************************************************************************
1672 1.88.2.6 snj * ixgbe_add_hw_stats
1673 1.1 dyoung *
1674 1.88.2.6 snj * Add sysctl variables, one per statistic, to the system.
1675 1.88.2.6 snj ************************************************************************/
1676 1.1 dyoung static void
1677 1.88.2.6 snj ixgbe_add_hw_stats(struct adapter *adapter)
1678 1.1 dyoung {
1679 1.88.2.6 snj device_t dev = adapter->dev;
1680 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
1681 1.88.2.6 snj struct sysctllog **log = &adapter->sysctllog;
1682 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
1683 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
1684 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
1685 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1686 1.88.2.6 snj const char *xname = device_xname(dev);
1687 1.1 dyoung
1688 1.88.2.6 snj /* Driver Statistics */
1689 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig_tx_dma_setup, EVCNT_TYPE_MISC,
1690 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EFBIG");
1691 1.88.2.6 snj evcnt_attach_dynamic(&adapter->mbuf_defrag_failed, EVCNT_TYPE_MISC,
1692 1.88.2.6 snj NULL, xname, "m_defrag() failed");
1693 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig2_tx_dma_setup, EVCNT_TYPE_MISC,
1694 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EFBIG");
1695 1.88.2.6 snj evcnt_attach_dynamic(&adapter->einval_tx_dma_setup, EVCNT_TYPE_MISC,
1696 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EINVAL");
1697 1.88.2.6 snj evcnt_attach_dynamic(&adapter->other_tx_dma_setup, EVCNT_TYPE_MISC,
1698 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail other");
1699 1.88.2.6 snj evcnt_attach_dynamic(&adapter->eagain_tx_dma_setup, EVCNT_TYPE_MISC,
1700 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EAGAIN");
1701 1.88.2.6 snj evcnt_attach_dynamic(&adapter->enomem_tx_dma_setup, EVCNT_TYPE_MISC,
1702 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail ENOMEM");
1703 1.88.2.6 snj evcnt_attach_dynamic(&adapter->watchdog_events, EVCNT_TYPE_MISC,
1704 1.88.2.6 snj NULL, xname, "Watchdog timeouts");
1705 1.88.2.6 snj evcnt_attach_dynamic(&adapter->tso_err, EVCNT_TYPE_MISC,
1706 1.88.2.6 snj NULL, xname, "TSO errors");
1707 1.88.2.6 snj evcnt_attach_dynamic(&adapter->link_irq, EVCNT_TYPE_INTR,
1708 1.88.2.6 snj NULL, xname, "Link MSI-X IRQ Handled");
1709 1.1 dyoung
1710 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
1711 1.88.2.6 snj snprintf(adapter->queues[i].evnamebuf,
1712 1.88.2.6 snj sizeof(adapter->queues[i].evnamebuf), "%s q%d",
1713 1.88.2.6 snj xname, i);
1714 1.88.2.6 snj snprintf(adapter->queues[i].namebuf,
1715 1.88.2.6 snj sizeof(adapter->queues[i].namebuf), "q%d", i);
1716 1.48 msaitoh
1717 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
1718 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
1719 1.88.2.6 snj break;
1720 1.88.2.6 snj }
1721 1.1 dyoung
1722 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &rnode,
1723 1.88.2.6 snj 0, CTLTYPE_NODE,
1724 1.88.2.6 snj adapter->queues[i].namebuf, SYSCTL_DESCR("Queue Name"),
1725 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0)
1726 1.88.2.6 snj break;
1727 1.88.2.6 snj
1728 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1729 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
1730 1.88.2.6 snj "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"),
1731 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler, 0,
1732 1.88.2.6 snj (void *)&adapter->queues[i], 0, CTL_CREATE, CTL_EOL) != 0)
1733 1.88.2.6 snj break;
1734 1.88.2.6 snj
1735 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1736 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1737 1.88.2.6 snj "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"),
1738 1.88.2.6 snj ixgbe_sysctl_tdh_handler, 0, (void *)txr,
1739 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1740 1.88.2.6 snj break;
1741 1.1 dyoung
1742 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1743 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1744 1.88.2.6 snj "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"),
1745 1.88.2.6 snj ixgbe_sysctl_tdt_handler, 0, (void *)txr,
1746 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1747 1.88.2.6 snj break;
1748 1.1 dyoung
1749 1.88.2.6 snj evcnt_attach_dynamic(&adapter->queues[i].irqs, EVCNT_TYPE_INTR,
1750 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "IRQs on queue");
1751 1.88.2.13 martin evcnt_attach_dynamic(&adapter->queues[i].handleq,
1752 1.88.2.13 martin EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1753 1.88.2.13 martin "Handled queue in softint");
1754 1.88.2.13 martin evcnt_attach_dynamic(&adapter->queues[i].req, EVCNT_TYPE_MISC,
1755 1.88.2.13 martin NULL, adapter->queues[i].evnamebuf, "Requeued in softint");
1756 1.88.2.6 snj evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
1757 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "TSO");
1758 1.88.2.6 snj evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
1759 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1760 1.88.2.6 snj "Queue No Descriptor Available");
1761 1.88.2.6 snj evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
1762 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1763 1.88.2.6 snj "Queue Packets Transmitted");
1764 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
1765 1.88.2.6 snj evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
1766 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1767 1.88.2.6 snj "Packets dropped in pcq");
1768 1.88.2.6 snj #endif
1769 1.1 dyoung
1770 1.88.2.6 snj #ifdef LRO
1771 1.88.2.6 snj struct lro_ctrl *lro = &rxr->lro;
1772 1.88.2.6 snj #endif /* LRO */
1773 1.1 dyoung
1774 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1775 1.88.2.6 snj CTLFLAG_READONLY,
1776 1.88.2.6 snj CTLTYPE_INT,
1777 1.88.2.6 snj "rxd_head", SYSCTL_DESCR("Receive Descriptor Head"),
1778 1.88.2.6 snj ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0,
1779 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1780 1.88.2.6 snj break;
1781 1.1 dyoung
1782 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1783 1.88.2.6 snj CTLFLAG_READONLY,
1784 1.88.2.6 snj CTLTYPE_INT,
1785 1.88.2.6 snj "rxd_tail", SYSCTL_DESCR("Receive Descriptor Tail"),
1786 1.88.2.6 snj ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0,
1787 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1788 1.88.2.6 snj break;
1789 1.1 dyoung
1790 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
1791 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpc[i],
1792 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1793 1.88.2.6 snj "RX Missed Packet Count");
1794 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1795 1.88.2.6 snj evcnt_attach_dynamic(&stats->rnbc[i],
1796 1.88.2.6 snj EVCNT_TYPE_MISC, NULL,
1797 1.88.2.6 snj adapter->queues[i].evnamebuf,
1798 1.88.2.6 snj "Receive No Buffers");
1799 1.1 dyoung }
1800 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
1801 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxontxc[i],
1802 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1803 1.88.2.6 snj "pxontxc");
1804 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxonrxc[i],
1805 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1806 1.88.2.6 snj "pxonrxc");
1807 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxofftxc[i],
1808 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1809 1.88.2.6 snj "pxofftxc");
1810 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxoffrxc[i],
1811 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1812 1.88.2.6 snj "pxoffrxc");
1813 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxon2offc[i],
1814 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1815 1.88.2.6 snj "pxon2offc");
1816 1.88.2.6 snj }
1817 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
1818 1.88.2.6 snj evcnt_attach_dynamic(&stats->qprc[i],
1819 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1820 1.88.2.6 snj "qprc");
1821 1.88.2.6 snj evcnt_attach_dynamic(&stats->qptc[i],
1822 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1823 1.88.2.6 snj "qptc");
1824 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbrc[i],
1825 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1826 1.88.2.6 snj "qbrc");
1827 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbtc[i],
1828 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1829 1.88.2.6 snj "qbtc");
1830 1.88.2.6 snj evcnt_attach_dynamic(&stats->qprdc[i],
1831 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1832 1.88.2.6 snj "qprdc");
1833 1.1 dyoung }
1834 1.22 msaitoh
1835 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC,
1836 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Packets Received");
1837 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC,
1838 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Bytes Received");
1839 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC,
1840 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Copied RX Frames");
1841 1.88.2.6 snj evcnt_attach_dynamic(&rxr->no_jmbuf, EVCNT_TYPE_MISC,
1842 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx no jumbo mbuf");
1843 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC,
1844 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx discarded");
1845 1.88.2.6 snj #ifdef LRO
1846 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued",
1847 1.88.2.6 snj CTLFLAG_RD, &lro->lro_queued, 0,
1848 1.88.2.6 snj "LRO Queued");
1849 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed",
1850 1.88.2.6 snj CTLFLAG_RD, &lro->lro_flushed, 0,
1851 1.88.2.6 snj "LRO Flushed");
1852 1.88.2.6 snj #endif /* LRO */
1853 1.1 dyoung }
1854 1.1 dyoung
1855 1.88.2.6 snj /* MAC stats get their own sub node */
1856 1.1 dyoung
1857 1.88.2.6 snj snprintf(stats->namebuf,
1858 1.88.2.6 snj sizeof(stats->namebuf), "%s MAC Statistics", xname);
1859 1.45 msaitoh
1860 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL,
1861 1.88.2.6 snj stats->namebuf, "rx csum offload - IP");
1862 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL,
1863 1.88.2.6 snj stats->namebuf, "rx csum offload - L4");
1864 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL,
1865 1.88.2.6 snj stats->namebuf, "rx csum offload - IP bad");
1866 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL,
1867 1.88.2.6 snj stats->namebuf, "rx csum offload - L4 bad");
1868 1.88.2.6 snj evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL,
1869 1.88.2.6 snj stats->namebuf, "Interrupt conditions zero");
1870 1.88.2.6 snj evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL,
1871 1.88.2.6 snj stats->namebuf, "Legacy interrupts");
1872 1.45 msaitoh
1873 1.88.2.6 snj evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL,
1874 1.88.2.6 snj stats->namebuf, "CRC Errors");
1875 1.88.2.6 snj evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL,
1876 1.88.2.6 snj stats->namebuf, "Illegal Byte Errors");
1877 1.88.2.6 snj evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL,
1878 1.88.2.6 snj stats->namebuf, "Byte Errors");
1879 1.88.2.6 snj evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL,
1880 1.88.2.6 snj stats->namebuf, "MAC Short Packets Discarded");
1881 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
1882 1.88.2.6 snj evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL,
1883 1.88.2.6 snj stats->namebuf, "Bad SFD");
1884 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL,
1885 1.88.2.6 snj stats->namebuf, "Total Packets Missed");
1886 1.88.2.6 snj evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL,
1887 1.88.2.6 snj stats->namebuf, "MAC Local Faults");
1888 1.88.2.6 snj evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL,
1889 1.88.2.6 snj stats->namebuf, "MAC Remote Faults");
1890 1.88.2.6 snj evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL,
1891 1.88.2.6 snj stats->namebuf, "Receive Length Errors");
1892 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL,
1893 1.88.2.6 snj stats->namebuf, "Link XON Transmitted");
1894 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL,
1895 1.88.2.6 snj stats->namebuf, "Link XON Received");
1896 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL,
1897 1.88.2.6 snj stats->namebuf, "Link XOFF Transmitted");
1898 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL,
1899 1.88.2.6 snj stats->namebuf, "Link XOFF Received");
1900 1.45 msaitoh
1901 1.88.2.6 snj /* Packet Reception Stats */
1902 1.88.2.6 snj evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL,
1903 1.88.2.6 snj stats->namebuf, "Total Octets Received");
1904 1.88.2.6 snj evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL,
1905 1.88.2.6 snj stats->namebuf, "Good Octets Received");
1906 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL,
1907 1.88.2.6 snj stats->namebuf, "Total Packets Received");
1908 1.88.2.6 snj evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL,
1909 1.88.2.6 snj stats->namebuf, "Good Packets Received");
1910 1.88.2.6 snj evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL,
1911 1.88.2.6 snj stats->namebuf, "Multicast Packets Received");
1912 1.88.2.6 snj evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL,
1913 1.88.2.6 snj stats->namebuf, "Broadcast Packets Received");
1914 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL,
1915 1.88.2.6 snj stats->namebuf, "64 byte frames received ");
1916 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL,
1917 1.88.2.6 snj stats->namebuf, "65-127 byte frames received");
1918 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL,
1919 1.88.2.6 snj stats->namebuf, "128-255 byte frames received");
1920 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL,
1921 1.88.2.6 snj stats->namebuf, "256-511 byte frames received");
1922 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL,
1923 1.88.2.6 snj stats->namebuf, "512-1023 byte frames received");
1924 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL,
1925 1.88.2.6 snj stats->namebuf, "1023-1522 byte frames received");
1926 1.88.2.6 snj evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL,
1927 1.88.2.6 snj stats->namebuf, "Receive Undersized");
1928 1.88.2.6 snj evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL,
1929 1.88.2.6 snj stats->namebuf, "Fragmented Packets Received ");
1930 1.88.2.6 snj evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL,
1931 1.88.2.6 snj stats->namebuf, "Oversized Packets Received");
1932 1.88.2.6 snj evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL,
1933 1.88.2.6 snj stats->namebuf, "Received Jabber");
1934 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL,
1935 1.88.2.6 snj stats->namebuf, "Management Packets Received");
1936 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL,
1937 1.88.2.6 snj stats->namebuf, "Management Packets Dropped");
1938 1.88.2.6 snj evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL,
1939 1.88.2.6 snj stats->namebuf, "Checksum Errors");
1940 1.45 msaitoh
1941 1.88.2.6 snj /* Packet Transmission Stats */
1942 1.88.2.6 snj evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL,
1943 1.88.2.6 snj stats->namebuf, "Good Octets Transmitted");
1944 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL,
1945 1.88.2.6 snj stats->namebuf, "Total Packets Transmitted");
1946 1.88.2.6 snj evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL,
1947 1.88.2.6 snj stats->namebuf, "Good Packets Transmitted");
1948 1.88.2.6 snj evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL,
1949 1.88.2.6 snj stats->namebuf, "Broadcast Packets Transmitted");
1950 1.88.2.6 snj evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL,
1951 1.88.2.6 snj stats->namebuf, "Multicast Packets Transmitted");
1952 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL,
1953 1.88.2.6 snj stats->namebuf, "Management Packets Transmitted");
1954 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL,
1955 1.88.2.6 snj stats->namebuf, "64 byte frames transmitted ");
1956 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL,
1957 1.88.2.6 snj stats->namebuf, "65-127 byte frames transmitted");
1958 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL,
1959 1.88.2.6 snj stats->namebuf, "128-255 byte frames transmitted");
1960 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL,
1961 1.88.2.6 snj stats->namebuf, "256-511 byte frames transmitted");
1962 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL,
1963 1.88.2.6 snj stats->namebuf, "512-1023 byte frames transmitted");
1964 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL,
1965 1.88.2.6 snj stats->namebuf, "1024-1522 byte frames transmitted");
1966 1.88.2.6 snj } /* ixgbe_add_hw_stats */
1967 1.45 msaitoh
1968 1.45 msaitoh static void
1969 1.88.2.6 snj ixgbe_clear_evcnt(struct adapter *adapter)
1970 1.44 msaitoh {
1971 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
1972 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
1973 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1974 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1975 1.44 msaitoh
1976 1.88.2.6 snj adapter->efbig_tx_dma_setup.ev_count = 0;
1977 1.88.2.6 snj adapter->mbuf_defrag_failed.ev_count = 0;
1978 1.88.2.6 snj adapter->efbig2_tx_dma_setup.ev_count = 0;
1979 1.88.2.6 snj adapter->einval_tx_dma_setup.ev_count = 0;
1980 1.88.2.6 snj adapter->other_tx_dma_setup.ev_count = 0;
1981 1.88.2.6 snj adapter->eagain_tx_dma_setup.ev_count = 0;
1982 1.88.2.6 snj adapter->enomem_tx_dma_setup.ev_count = 0;
1983 1.88.2.6 snj adapter->tso_err.ev_count = 0;
1984 1.88.2.14 martin adapter->watchdog_events.ev_count = 0;
1985 1.88.2.6 snj adapter->link_irq.ev_count = 0;
1986 1.1 dyoung
1987 1.88.2.6 snj txr = adapter->tx_rings;
1988 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
1989 1.88.2.6 snj adapter->queues[i].irqs.ev_count = 0;
1990 1.88.2.13 martin adapter->queues[i].handleq.ev_count = 0;
1991 1.88.2.13 martin adapter->queues[i].req.ev_count = 0;
1992 1.88.2.6 snj txr->no_desc_avail.ev_count = 0;
1993 1.88.2.6 snj txr->total_packets.ev_count = 0;
1994 1.88.2.6 snj txr->tso_tx.ev_count = 0;
1995 1.28 msaitoh #ifndef IXGBE_LEGACY_TX
1996 1.88.2.6 snj txr->pcq_drops.ev_count = 0;
1997 1.26 msaitoh #endif
1998 1.88.2.14 martin txr->q_efbig_tx_dma_setup = 0;
1999 1.88.2.14 martin txr->q_mbuf_defrag_failed = 0;
2000 1.88.2.14 martin txr->q_efbig2_tx_dma_setup = 0;
2001 1.88.2.14 martin txr->q_einval_tx_dma_setup = 0;
2002 1.88.2.14 martin txr->q_other_tx_dma_setup = 0;
2003 1.88.2.14 martin txr->q_eagain_tx_dma_setup = 0;
2004 1.88.2.14 martin txr->q_enomem_tx_dma_setup = 0;
2005 1.88.2.14 martin txr->q_tso_err = 0;
2006 1.88.2.6 snj
2007 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
2008 1.88.2.6 snj stats->mpc[i].ev_count = 0;
2009 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2010 1.88.2.6 snj stats->rnbc[i].ev_count = 0;
2011 1.88.2.6 snj }
2012 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
2013 1.88.2.6 snj stats->pxontxc[i].ev_count = 0;
2014 1.88.2.6 snj stats->pxonrxc[i].ev_count = 0;
2015 1.88.2.6 snj stats->pxofftxc[i].ev_count = 0;
2016 1.88.2.6 snj stats->pxoffrxc[i].ev_count = 0;
2017 1.88.2.6 snj stats->pxon2offc[i].ev_count = 0;
2018 1.88.2.6 snj }
2019 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
2020 1.88.2.6 snj stats->qprc[i].ev_count = 0;
2021 1.88.2.6 snj stats->qptc[i].ev_count = 0;
2022 1.88.2.6 snj stats->qbrc[i].ev_count = 0;
2023 1.88.2.6 snj stats->qbtc[i].ev_count = 0;
2024 1.88.2.6 snj stats->qprdc[i].ev_count = 0;
2025 1.1 dyoung }
2026 1.1 dyoung
2027 1.88.2.6 snj rxr->rx_packets.ev_count = 0;
2028 1.88.2.6 snj rxr->rx_bytes.ev_count = 0;
2029 1.88.2.6 snj rxr->rx_copies.ev_count = 0;
2030 1.88.2.6 snj rxr->no_jmbuf.ev_count = 0;
2031 1.88.2.6 snj rxr->rx_discarded.ev_count = 0;
2032 1.1 dyoung }
2033 1.88.2.6 snj stats->ipcs.ev_count = 0;
2034 1.88.2.6 snj stats->l4cs.ev_count = 0;
2035 1.88.2.6 snj stats->ipcs_bad.ev_count = 0;
2036 1.88.2.6 snj stats->l4cs_bad.ev_count = 0;
2037 1.88.2.6 snj stats->intzero.ev_count = 0;
2038 1.88.2.6 snj stats->legint.ev_count = 0;
2039 1.88.2.6 snj stats->crcerrs.ev_count = 0;
2040 1.88.2.6 snj stats->illerrc.ev_count = 0;
2041 1.88.2.6 snj stats->errbc.ev_count = 0;
2042 1.88.2.6 snj stats->mspdc.ev_count = 0;
2043 1.88.2.6 snj stats->mbsdc.ev_count = 0;
2044 1.88.2.6 snj stats->mpctotal.ev_count = 0;
2045 1.88.2.6 snj stats->mlfc.ev_count = 0;
2046 1.88.2.6 snj stats->mrfc.ev_count = 0;
2047 1.88.2.6 snj stats->rlec.ev_count = 0;
2048 1.88.2.6 snj stats->lxontxc.ev_count = 0;
2049 1.88.2.6 snj stats->lxonrxc.ev_count = 0;
2050 1.88.2.6 snj stats->lxofftxc.ev_count = 0;
2051 1.88.2.6 snj stats->lxoffrxc.ev_count = 0;
2052 1.34 msaitoh
2053 1.88.2.6 snj /* Packet Reception Stats */
2054 1.88.2.6 snj stats->tor.ev_count = 0;
2055 1.88.2.6 snj stats->gorc.ev_count = 0;
2056 1.88.2.6 snj stats->tpr.ev_count = 0;
2057 1.88.2.6 snj stats->gprc.ev_count = 0;
2058 1.88.2.6 snj stats->mprc.ev_count = 0;
2059 1.88.2.6 snj stats->bprc.ev_count = 0;
2060 1.88.2.6 snj stats->prc64.ev_count = 0;
2061 1.88.2.6 snj stats->prc127.ev_count = 0;
2062 1.88.2.6 snj stats->prc255.ev_count = 0;
2063 1.88.2.6 snj stats->prc511.ev_count = 0;
2064 1.88.2.6 snj stats->prc1023.ev_count = 0;
2065 1.88.2.6 snj stats->prc1522.ev_count = 0;
2066 1.88.2.6 snj stats->ruc.ev_count = 0;
2067 1.88.2.6 snj stats->rfc.ev_count = 0;
2068 1.88.2.6 snj stats->roc.ev_count = 0;
2069 1.88.2.6 snj stats->rjc.ev_count = 0;
2070 1.88.2.6 snj stats->mngprc.ev_count = 0;
2071 1.88.2.6 snj stats->mngpdc.ev_count = 0;
2072 1.88.2.6 snj stats->xec.ev_count = 0;
2073 1.1 dyoung
2074 1.88.2.6 snj /* Packet Transmission Stats */
2075 1.88.2.6 snj stats->gotc.ev_count = 0;
2076 1.88.2.6 snj stats->tpt.ev_count = 0;
2077 1.88.2.6 snj stats->gptc.ev_count = 0;
2078 1.88.2.6 snj stats->bptc.ev_count = 0;
2079 1.88.2.6 snj stats->mptc.ev_count = 0;
2080 1.88.2.6 snj stats->mngptc.ev_count = 0;
2081 1.88.2.6 snj stats->ptc64.ev_count = 0;
2082 1.88.2.6 snj stats->ptc127.ev_count = 0;
2083 1.88.2.6 snj stats->ptc255.ev_count = 0;
2084 1.88.2.6 snj stats->ptc511.ev_count = 0;
2085 1.88.2.6 snj stats->ptc1023.ev_count = 0;
2086 1.88.2.6 snj stats->ptc1522.ev_count = 0;
2087 1.1 dyoung }
2088 1.1 dyoung
2089 1.88.2.6 snj /************************************************************************
2090 1.88.2.6 snj * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function
2091 1.88.2.6 snj *
2092 1.88.2.6 snj * Retrieves the TDH value from the hardware
2093 1.88.2.6 snj ************************************************************************/
2094 1.88.2.6 snj static int
2095 1.88.2.6 snj ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS)
2096 1.1 dyoung {
2097 1.88.2.6 snj struct sysctlnode node = *rnode;
2098 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2099 1.88.2.6 snj uint32_t val;
2100 1.34 msaitoh
2101 1.88.2.6 snj if (!txr)
2102 1.88.2.6 snj return (0);
2103 1.1 dyoung
2104 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me));
2105 1.88.2.6 snj node.sysctl_data = &val;
2106 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2107 1.88.2.6 snj } /* ixgbe_sysctl_tdh_handler */
2108 1.1 dyoung
2109 1.88.2.6 snj /************************************************************************
2110 1.88.2.6 snj * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
2111 1.88.2.6 snj *
2112 1.88.2.6 snj * Retrieves the TDT value from the hardware
2113 1.88.2.6 snj ************************************************************************/
2114 1.88.2.6 snj static int
2115 1.88.2.6 snj ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS)
2116 1.88.2.6 snj {
2117 1.88.2.6 snj struct sysctlnode node = *rnode;
2118 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2119 1.88.2.6 snj uint32_t val;
2120 1.33 msaitoh
2121 1.88.2.6 snj if (!txr)
2122 1.88.2.6 snj return (0);
2123 1.43 msaitoh
2124 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me));
2125 1.88.2.6 snj node.sysctl_data = &val;
2126 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2127 1.88.2.6 snj } /* ixgbe_sysctl_tdt_handler */
2128 1.1 dyoung
2129 1.88.2.6 snj /************************************************************************
2130 1.88.2.6 snj * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function
2131 1.88.2.6 snj *
2132 1.88.2.6 snj * Retrieves the RDH value from the hardware
2133 1.88.2.6 snj ************************************************************************/
2134 1.88.2.6 snj static int
2135 1.88.2.6 snj ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS)
2136 1.88.2.6 snj {
2137 1.88.2.6 snj struct sysctlnode node = *rnode;
2138 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2139 1.88.2.6 snj uint32_t val;
2140 1.34 msaitoh
2141 1.88.2.6 snj if (!rxr)
2142 1.88.2.6 snj return (0);
2143 1.1 dyoung
2144 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me));
2145 1.88.2.6 snj node.sysctl_data = &val;
2146 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2147 1.88.2.6 snj } /* ixgbe_sysctl_rdh_handler */
2148 1.1 dyoung
2149 1.88.2.6 snj /************************************************************************
2150 1.88.2.6 snj * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function
2151 1.88.2.6 snj *
2152 1.88.2.6 snj * Retrieves the RDT value from the hardware
2153 1.88.2.6 snj ************************************************************************/
2154 1.88.2.6 snj static int
2155 1.88.2.6 snj ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS)
2156 1.1 dyoung {
2157 1.88.2.6 snj struct sysctlnode node = *rnode;
2158 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2159 1.88.2.6 snj uint32_t val;
2160 1.1 dyoung
2161 1.88.2.6 snj if (!rxr)
2162 1.88.2.6 snj return (0);
2163 1.1 dyoung
2164 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me));
2165 1.88.2.6 snj node.sysctl_data = &val;
2166 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2167 1.88.2.6 snj } /* ixgbe_sysctl_rdt_handler */
2168 1.1 dyoung
2169 1.88.2.6 snj #if 0 /* XXX Badly need to overhaul vlan(4) on NetBSD. */
2170 1.88.2.6 snj /************************************************************************
2171 1.88.2.6 snj * ixgbe_register_vlan
2172 1.88.2.6 snj *
2173 1.88.2.6 snj * Run via vlan config EVENT, it enables us to use the
2174 1.88.2.6 snj * HW Filter table since we can get the vlan id. This
2175 1.88.2.6 snj * just creates the entry in the soft version of the
2176 1.88.2.6 snj * VFTA, init will repopulate the real table.
2177 1.88.2.6 snj ************************************************************************/
2178 1.1 dyoung static void
2179 1.88.2.6 snj ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2180 1.1 dyoung {
2181 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2182 1.88.2.6 snj u16 index, bit;
2183 1.1 dyoung
2184 1.88.2.6 snj if (ifp->if_softc != arg) /* Not our event */
2185 1.88.2.6 snj return;
2186 1.43 msaitoh
2187 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2188 1.88.2.6 snj return;
2189 1.1 dyoung
2190 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2191 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2192 1.88.2.6 snj bit = vtag & 0x1F;
2193 1.88.2.6 snj adapter->shadow_vfta[index] |= (1 << bit);
2194 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2195 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2196 1.88.2.6 snj } /* ixgbe_register_vlan */
2197 1.1 dyoung
2198 1.88.2.6 snj /************************************************************************
2199 1.88.2.6 snj * ixgbe_unregister_vlan
2200 1.88.2.6 snj *
2201 1.88.2.6 snj * Run via vlan unconfig EVENT, remove our entry in the soft vfta.
2202 1.88.2.6 snj ************************************************************************/
2203 1.88.2.6 snj static void
2204 1.88.2.6 snj ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2205 1.88.2.6 snj {
2206 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2207 1.88.2.6 snj u16 index, bit;
2208 1.1 dyoung
2209 1.88.2.6 snj if (ifp->if_softc != arg)
2210 1.88.2.6 snj return;
2211 1.1 dyoung
2212 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2213 1.88.2.6 snj return;
2214 1.1 dyoung
2215 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2216 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2217 1.88.2.6 snj bit = vtag & 0x1F;
2218 1.88.2.6 snj adapter->shadow_vfta[index] &= ~(1 << bit);
2219 1.88.2.6 snj /* Re-init to load the changes */
2220 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2221 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2222 1.88.2.6 snj } /* ixgbe_unregister_vlan */
2223 1.88.2.6 snj #endif
2224 1.88.2.6 snj
2225 1.88.2.6 snj static void
2226 1.88.2.6 snj ixgbe_setup_vlan_hw_support(struct adapter *adapter)
2227 1.1 dyoung {
2228 1.1 dyoung struct ethercom *ec = &adapter->osdep.ec;
2229 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2230 1.88.2.6 snj struct rx_ring *rxr;
2231 1.88.2.6 snj int i;
2232 1.88.2.6 snj u32 ctrl;
2233 1.1 dyoung
2234 1.1 dyoung
2235 1.74 msaitoh /*
2236 1.88.2.6 snj * We get here thru init_locked, meaning
2237 1.88.2.6 snj * a soft reset, this has already cleared
2238 1.88.2.6 snj * the VFTA and other state, so if there
2239 1.88.2.6 snj * have been no vlan's registered do nothing.
2240 1.74 msaitoh */
2241 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
2242 1.88.2.6 snj return;
2243 1.1 dyoung
2244 1.88.2.6 snj /* Setup the queues for vlans */
2245 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) {
2246 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++) {
2247 1.88.2.6 snj rxr = &adapter->rx_rings[i];
2248 1.88.2.6 snj /* On 82599 the VLAN enable is per/queue in RXDCTL */
2249 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
2250 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
2251 1.88.2.6 snj ctrl |= IXGBE_RXDCTL_VME;
2252 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
2253 1.88.2.6 snj }
2254 1.88.2.6 snj rxr->vtag_strip = TRUE;
2255 1.88.2.6 snj }
2256 1.88.2.6 snj }
2257 1.1 dyoung
2258 1.88.2.6 snj if ((ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) == 0)
2259 1.88.2.6 snj return;
2260 1.1 dyoung /*
2261 1.88.2.6 snj * A soft reset zero's out the VFTA, so
2262 1.88.2.6 snj * we need to repopulate it now.
2263 1.1 dyoung */
2264 1.88.2.6 snj for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2265 1.88.2.6 snj if (adapter->shadow_vfta[i] != 0)
2266 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VFTA(i),
2267 1.88.2.6 snj adapter->shadow_vfta[i]);
2268 1.1 dyoung
2269 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2270 1.88.2.6 snj /* Enable the Filter Table if enabled */
2271 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) {
2272 1.88.2.6 snj ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2273 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VFE;
2274 1.88.2.6 snj }
2275 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2276 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VME;
2277 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2278 1.88.2.6 snj } /* ixgbe_setup_vlan_hw_support */
2279 1.1 dyoung
2280 1.88.2.6 snj /************************************************************************
2281 1.88.2.6 snj * ixgbe_get_slot_info
2282 1.88.2.6 snj *
2283 1.88.2.6 snj * Get the width and transaction speed of
2284 1.88.2.6 snj * the slot this adapter is plugged into.
2285 1.88.2.6 snj ************************************************************************/
2286 1.88.2.6 snj static void
2287 1.88.2.6 snj ixgbe_get_slot_info(struct adapter *adapter)
2288 1.88.2.6 snj {
2289 1.88.2.6 snj device_t dev = adapter->dev;
2290 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2291 1.88.2.6 snj u32 offset;
2292 1.88.2.6 snj // struct ixgbe_mac_info *mac = &hw->mac;
2293 1.88.2.6 snj u16 link;
2294 1.88.2.6 snj int bus_info_valid = TRUE;
2295 1.48 msaitoh
2296 1.88.2.6 snj /* Some devices are behind an internal bridge */
2297 1.88.2.6 snj switch (hw->device_id) {
2298 1.88.2.6 snj case IXGBE_DEV_ID_82599_SFP_SF_QP:
2299 1.88.2.6 snj case IXGBE_DEV_ID_82599_QSFP_SF_QP:
2300 1.88.2.6 snj goto get_parent_info;
2301 1.88.2.6 snj default:
2302 1.88.2.6 snj break;
2303 1.88.2.6 snj }
2304 1.1 dyoung
2305 1.88.2.6 snj ixgbe_get_bus_info(hw);
2306 1.1 dyoung
2307 1.1 dyoung /*
2308 1.88.2.6 snj * Some devices don't use PCI-E, but there is no need
2309 1.88.2.6 snj * to display "Unknown" for bus speed and width.
2310 1.1 dyoung */
2311 1.88.2.6 snj switch (hw->mac.type) {
2312 1.88.2.6 snj case ixgbe_mac_X550EM_x:
2313 1.88.2.6 snj case ixgbe_mac_X550EM_a:
2314 1.88.2.6 snj return;
2315 1.88.2.6 snj default:
2316 1.88.2.6 snj goto display;
2317 1.88.2.6 snj }
2318 1.43 msaitoh
2319 1.88.2.6 snj get_parent_info:
2320 1.88.2.6 snj /*
2321 1.88.2.6 snj * For the Quad port adapter we need to parse back
2322 1.88.2.6 snj * up the PCI tree to find the speed of the expansion
2323 1.88.2.6 snj * slot into which this adapter is plugged. A bit more work.
2324 1.88.2.6 snj */
2325 1.88.2.6 snj dev = device_parent(device_parent(dev));
2326 1.88.2.6 snj #if 0
2327 1.88.2.6 snj #ifdef IXGBE_DEBUG
2328 1.88.2.6 snj device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev),
2329 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2330 1.88.2.6 snj #endif
2331 1.88.2.6 snj dev = device_parent(device_parent(dev));
2332 1.88.2.6 snj #ifdef IXGBE_DEBUG
2333 1.88.2.6 snj device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev),
2334 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2335 1.88.2.6 snj #endif
2336 1.88.2.6 snj #endif
2337 1.88.2.6 snj /* Now get the PCI Express Capabilities offset */
2338 1.88.2.6 snj if (pci_get_capability(adapter->osdep.pc, adapter->osdep.tag,
2339 1.88.2.6 snj PCI_CAP_PCIEXPRESS, &offset, NULL)) {
2340 1.88.2.6 snj /*
2341 1.88.2.6 snj * Hmm...can't get PCI-Express capabilities.
2342 1.88.2.6 snj * Falling back to default method.
2343 1.88.2.6 snj */
2344 1.88.2.6 snj bus_info_valid = FALSE;
2345 1.88.2.6 snj ixgbe_get_bus_info(hw);
2346 1.88.2.6 snj goto display;
2347 1.88.2.6 snj }
2348 1.88.2.6 snj /* ...and read the Link Status Register */
2349 1.88.2.6 snj link = pci_conf_read(adapter->osdep.pc, adapter->osdep.tag,
2350 1.88.2.10 martin offset + PCIE_LCSR) >> 16;
2351 1.88.2.10 martin ixgbe_set_pci_config_data_generic(hw, link);
2352 1.43 msaitoh
2353 1.88.2.6 snj display:
2354 1.88.2.6 snj device_printf(dev, "PCI Express Bus: Speed %s Width %s\n",
2355 1.88.2.6 snj ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" :
2356 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" :
2357 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" :
2358 1.88.2.6 snj "Unknown"),
2359 1.88.2.6 snj ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :
2360 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :
2361 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :
2362 1.88.2.6 snj "Unknown"));
2363 1.88.2.6 snj
2364 1.88.2.6 snj if (bus_info_valid) {
2365 1.88.2.6 snj if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2366 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&
2367 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500))) {
2368 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2369 1.88.2.6 snj " for this card\n is not sufficient for"
2370 1.88.2.6 snj " optimal performance.\n");
2371 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2372 1.88.2.6 snj "PCIE, or x4 PCIE Gen2 slot is required.\n");
2373 1.88.2.6 snj }
2374 1.88.2.6 snj if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2375 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&
2376 1.88.2.6 snj (hw->bus.speed < ixgbe_bus_speed_8000))) {
2377 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2378 1.88.2.6 snj " for this card\n is not sufficient for"
2379 1.88.2.6 snj " optimal performance.\n");
2380 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2381 1.88.2.6 snj "PCIE Gen3 slot is required.\n");
2382 1.88.2.6 snj }
2383 1.88.2.6 snj } else
2384 1.88.2.6 snj device_printf(dev, "Unable to determine slot speed/width. The speed/width reported are that of the internal switch.\n");
2385 1.43 msaitoh
2386 1.88.2.6 snj return;
2387 1.88.2.6 snj } /* ixgbe_get_slot_info */
2388 1.43 msaitoh
2389 1.88.2.6 snj /************************************************************************
2390 1.88.2.6 snj * ixgbe_enable_queue - MSI-X Interrupt Handlers and Tasklets
2391 1.88.2.6 snj ************************************************************************/
2392 1.88.2.6 snj static inline void
2393 1.88.2.6 snj ixgbe_enable_queue(struct adapter *adapter, u32 vector)
2394 1.43 msaitoh {
2395 1.43 msaitoh struct ixgbe_hw *hw = &adapter->hw;
2396 1.88.2.11 martin struct ix_queue *que = &adapter->queues[vector];
2397 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2398 1.88.2.6 snj u32 mask;
2399 1.43 msaitoh
2400 1.88.2.11 martin mutex_enter(&que->im_mtx);
2401 1.88.2.11 martin if (que->im_nest > 0 && --que->im_nest > 0)
2402 1.88.2.11 martin goto out;
2403 1.88.2.11 martin
2404 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2405 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2406 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2407 1.88.2.6 snj } else {
2408 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2409 1.88.2.6 snj if (mask)
2410 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2411 1.88.2.6 snj mask = (queue >> 32);
2412 1.88.2.6 snj if (mask)
2413 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2414 1.88.2.6 snj }
2415 1.88.2.11 martin out:
2416 1.88.2.11 martin mutex_exit(&que->im_mtx);
2417 1.88.2.6 snj } /* ixgbe_enable_queue */
2418 1.88.2.6 snj
2419 1.88.2.6 snj /************************************************************************
2420 1.88.2.6 snj * ixgbe_disable_queue
2421 1.88.2.6 snj ************************************************************************/
2422 1.88.2.6 snj static inline void
2423 1.88.2.6 snj ixgbe_disable_queue(struct adapter *adapter, u32 vector)
2424 1.88.2.6 snj {
2425 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2426 1.88.2.11 martin struct ix_queue *que = &adapter->queues[vector];
2427 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2428 1.88.2.6 snj u32 mask;
2429 1.55 msaitoh
2430 1.88.2.11 martin mutex_enter(&que->im_mtx);
2431 1.88.2.11 martin if (que->im_nest++ > 0)
2432 1.88.2.11 martin goto out;
2433 1.88.2.11 martin
2434 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2435 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2436 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2437 1.88.2.6 snj } else {
2438 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2439 1.88.2.6 snj if (mask)
2440 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2441 1.88.2.6 snj mask = (queue >> 32);
2442 1.88.2.6 snj if (mask)
2443 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2444 1.88.2.6 snj }
2445 1.88.2.11 martin out:
2446 1.88.2.11 martin mutex_exit(&que->im_mtx);
2447 1.88.2.6 snj } /* ixgbe_disable_queue */
2448 1.88.2.6 snj
2449 1.88.2.6 snj /************************************************************************
2450 1.88.2.13 martin * ixgbe_sched_handle_que - schedule deferred packet processing
2451 1.88.2.13 martin ************************************************************************/
2452 1.88.2.13 martin static inline void
2453 1.88.2.13 martin ixgbe_sched_handle_que(struct adapter *adapter, struct ix_queue *que)
2454 1.88.2.13 martin {
2455 1.88.2.13 martin
2456 1.88.2.13 martin if (adapter->txrx_use_workqueue) {
2457 1.88.2.13 martin /*
2458 1.88.2.13 martin * adapter->que_wq is bound to each CPU instead of
2459 1.88.2.13 martin * each NIC queue to reduce workqueue kthread. As we
2460 1.88.2.13 martin * should consider about interrupt affinity in this
2461 1.88.2.13 martin * function, the workqueue kthread must be WQ_PERCPU.
2462 1.88.2.13 martin * If create WQ_PERCPU workqueue kthread for each NIC
2463 1.88.2.13 martin * queue, that number of created workqueue kthread is
2464 1.88.2.13 martin * (number of used NIC queue) * (number of CPUs) =
2465 1.88.2.13 martin * (number of CPUs) ^ 2 most often.
2466 1.88.2.13 martin *
2467 1.88.2.13 martin * The same NIC queue's interrupts are avoided by
2468 1.88.2.13 martin * masking the queue's interrupt. And different
2469 1.88.2.13 martin * NIC queue's interrupts use different struct work
2470 1.88.2.13 martin * (que->wq_cookie). So, "enqueued flag" to avoid
2471 1.88.2.13 martin * twice workqueue_enqueue() is not required .
2472 1.88.2.13 martin */
2473 1.88.2.13 martin workqueue_enqueue(adapter->que_wq, &que->wq_cookie, curcpu());
2474 1.88.2.13 martin } else {
2475 1.88.2.13 martin softint_schedule(que->que_si);
2476 1.88.2.13 martin }
2477 1.88.2.13 martin }
2478 1.88.2.13 martin
2479 1.88.2.13 martin /************************************************************************
2480 1.88.2.6 snj * ixgbe_msix_que - MSI-X Queue Interrupt Service routine
2481 1.88.2.6 snj ************************************************************************/
2482 1.88.2.6 snj static int
2483 1.88.2.6 snj ixgbe_msix_que(void *arg)
2484 1.88.2.6 snj {
2485 1.88.2.6 snj struct ix_queue *que = arg;
2486 1.88.2.6 snj struct adapter *adapter = que->adapter;
2487 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2488 1.88.2.6 snj struct tx_ring *txr = que->txr;
2489 1.88.2.6 snj struct rx_ring *rxr = que->rxr;
2490 1.88.2.6 snj bool more;
2491 1.88.2.6 snj u32 newitr = 0;
2492 1.55 msaitoh
2493 1.88.2.6 snj /* Protect against spurious interrupts */
2494 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
2495 1.88.2.6 snj return 0;
2496 1.43 msaitoh
2497 1.88.2.6 snj ixgbe_disable_queue(adapter, que->msix);
2498 1.88.2.6 snj ++que->irqs.ev_count;
2499 1.43 msaitoh
2500 1.88.2.6 snj #ifdef __NetBSD__
2501 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
2502 1.88.2.6 snj more = true;
2503 1.88.2.6 snj #else
2504 1.88.2.6 snj more = ixgbe_rxeof(que);
2505 1.88.2.1 martin #endif
2506 1.43 msaitoh
2507 1.88.2.6 snj IXGBE_TX_LOCK(txr);
2508 1.88.2.6 snj ixgbe_txeof(txr);
2509 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
2510 1.55 msaitoh
2511 1.88.2.6 snj /* Do AIM now? */
2512 1.1 dyoung
2513 1.88.2.6 snj if (adapter->enable_aim == false)
2514 1.88.2.6 snj goto no_calc;
2515 1.88.2.6 snj /*
2516 1.88.2.6 snj * Do Adaptive Interrupt Moderation:
2517 1.88.2.6 snj * - Write out last calculated setting
2518 1.88.2.6 snj * - Calculate based on average size over
2519 1.88.2.6 snj * the last interval.
2520 1.88.2.6 snj */
2521 1.88.2.6 snj if (que->eitr_setting)
2522 1.88.2.10 martin ixgbe_eitr_write(que, que->eitr_setting);
2523 1.1 dyoung
2524 1.88.2.6 snj que->eitr_setting = 0;
2525 1.1 dyoung
2526 1.88.2.6 snj /* Idle, do nothing */
2527 1.88.2.6 snj if ((txr->bytes == 0) && (rxr->bytes == 0))
2528 1.88.2.6 snj goto no_calc;
2529 1.88.2.6 snj
2530 1.88.2.6 snj if ((txr->bytes) && (txr->packets))
2531 1.88.2.6 snj newitr = txr->bytes/txr->packets;
2532 1.88.2.6 snj if ((rxr->bytes) && (rxr->packets))
2533 1.88.2.6 snj newitr = max(newitr, (rxr->bytes / rxr->packets));
2534 1.88.2.6 snj newitr += 24; /* account for hardware frame, crc */
2535 1.1 dyoung
2536 1.88.2.6 snj /* set an upper boundary */
2537 1.88.2.6 snj newitr = min(newitr, 3000);
2538 1.43 msaitoh
2539 1.88.2.6 snj /* Be nice to the mid range */
2540 1.88.2.6 snj if ((newitr > 300) && (newitr < 1200))
2541 1.88.2.6 snj newitr = (newitr / 3);
2542 1.88.2.6 snj else
2543 1.88.2.6 snj newitr = (newitr / 2);
2544 1.88.2.6 snj
2545 1.88.2.10 martin /*
2546 1.88.2.10 martin * When RSC is used, ITR interval must be larger than RSC_DELAY.
2547 1.88.2.10 martin * Currently, we use 2us for RSC_DELAY. The minimum value is always
2548 1.88.2.10 martin * greater than 2us on 100M (and 10M?(not documented)), but it's not
2549 1.88.2.10 martin * on 1G and higher.
2550 1.88.2.10 martin */
2551 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
2552 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
2553 1.88.2.10 martin if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
2554 1.88.2.10 martin newitr = IXGBE_MIN_RSC_EITR_10G1G;
2555 1.88.2.10 martin }
2556 1.88.2.10 martin
2557 1.88.2.6 snj /* save for next interrupt */
2558 1.88.2.6 snj que->eitr_setting = newitr;
2559 1.88.2.6 snj
2560 1.88.2.6 snj /* Reset state */
2561 1.88.2.6 snj txr->bytes = 0;
2562 1.88.2.6 snj txr->packets = 0;
2563 1.88.2.6 snj rxr->bytes = 0;
2564 1.88.2.6 snj rxr->packets = 0;
2565 1.88.2.6 snj
2566 1.88.2.6 snj no_calc:
2567 1.88.2.13 martin if (more)
2568 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
2569 1.88.2.13 martin else
2570 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
2571 1.88.2.6 snj
2572 1.88.2.6 snj return 1;
2573 1.88.2.6 snj } /* ixgbe_msix_que */
2574 1.88.2.6 snj
2575 1.88.2.6 snj /************************************************************************
2576 1.88.2.6 snj * ixgbe_media_status - Media Ioctl callback
2577 1.1 dyoung *
2578 1.88.2.6 snj * Called whenever the user queries the status of
2579 1.88.2.6 snj * the interface using ifconfig.
2580 1.88.2.6 snj ************************************************************************/
2581 1.42 msaitoh static void
2582 1.88.2.6 snj ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
2583 1.1 dyoung {
2584 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2585 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2586 1.88.2.6 snj int layer;
2587 1.1 dyoung
2588 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_status: begin");
2589 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2590 1.88.2.6 snj ixgbe_update_link_status(adapter);
2591 1.1 dyoung
2592 1.88.2.6 snj ifmr->ifm_status = IFM_AVALID;
2593 1.88.2.6 snj ifmr->ifm_active = IFM_ETHER;
2594 1.1 dyoung
2595 1.88.2.6 snj if (!adapter->link_active) {
2596 1.88.2.6 snj ifmr->ifm_active |= IFM_NONE;
2597 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2598 1.88.2.6 snj return;
2599 1.88.2.6 snj }
2600 1.1 dyoung
2601 1.88.2.6 snj ifmr->ifm_status |= IFM_ACTIVE;
2602 1.88.2.6 snj layer = adapter->phy_layer;
2603 1.1 dyoung
2604 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T ||
2605 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_5GBASE_T ||
2606 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_T ||
2607 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_T ||
2608 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_100BASE_TX ||
2609 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_10BASE_T)
2610 1.88.2.6 snj switch (adapter->link_speed) {
2611 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2612 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2613 1.42 msaitoh break;
2614 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
2615 1.88.2.6 snj ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
2616 1.42 msaitoh break;
2617 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2618 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
2619 1.42 msaitoh break;
2620 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2621 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
2622 1.88.2.6 snj break;
2623 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
2624 1.88.2.6 snj ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
2625 1.88.2.6 snj break;
2626 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
2627 1.88.2.6 snj ifmr->ifm_active |= IFM_10_T | IFM_FDX;
2628 1.42 msaitoh break;
2629 1.1 dyoung }
2630 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
2631 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA)
2632 1.88.2.6 snj switch (adapter->link_speed) {
2633 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2634 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX;
2635 1.88.2.6 snj break;
2636 1.88.2.6 snj }
2637 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR)
2638 1.88.2.6 snj switch (adapter->link_speed) {
2639 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2640 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LR | IFM_FDX;
2641 1.88.2.6 snj break;
2642 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2643 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2644 1.88.2.6 snj break;
2645 1.88.2.6 snj }
2646 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM)
2647 1.88.2.6 snj switch (adapter->link_speed) {
2648 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2649 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX;
2650 1.88.2.6 snj break;
2651 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2652 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2653 1.88.2.6 snj break;
2654 1.88.2.6 snj }
2655 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR ||
2656 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
2657 1.88.2.6 snj switch (adapter->link_speed) {
2658 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2659 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2660 1.88.2.6 snj break;
2661 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2662 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
2663 1.88.2.6 snj break;
2664 1.88.2.6 snj }
2665 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
2666 1.88.2.6 snj switch (adapter->link_speed) {
2667 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2668 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2669 1.88.2.6 snj break;
2670 1.88.2.6 snj }
2671 1.88.2.6 snj /*
2672 1.88.2.6 snj * XXX: These need to use the proper media types once
2673 1.88.2.6 snj * they're added.
2674 1.88.2.6 snj */
2675 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
2676 1.88.2.6 snj switch (adapter->link_speed) {
2677 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2678 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2679 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2680 1.88.2.6 snj #else
2681 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KR | IFM_FDX;
2682 1.45 msaitoh #endif
2683 1.88.2.6 snj break;
2684 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2685 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2686 1.88.2.6 snj break;
2687 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2688 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2689 1.88.2.6 snj break;
2690 1.88.2.6 snj }
2691 1.88.2.6 snj else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
2692 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
2693 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
2694 1.88.2.6 snj switch (adapter->link_speed) {
2695 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2696 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2697 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2698 1.45 msaitoh #else
2699 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX;
2700 1.45 msaitoh #endif
2701 1.88.2.6 snj break;
2702 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2703 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2704 1.88.2.6 snj break;
2705 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2706 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2707 1.88.2.6 snj break;
2708 1.88.2.6 snj }
2709 1.88.2.6 snj
2710 1.88.2.6 snj /* If nothing is recognized... */
2711 1.88.2.6 snj #if 0
2712 1.88.2.6 snj if (IFM_SUBTYPE(ifmr->ifm_active) == 0)
2713 1.88.2.6 snj ifmr->ifm_active |= IFM_UNKNOWN;
2714 1.88.2.6 snj #endif
2715 1.88.2.6 snj
2716 1.88.2.6 snj ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
2717 1.88.2.6 snj
2718 1.88.2.6 snj /* Display current flow control setting used on link */
2719 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_rx_pause ||
2720 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2721 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_RXPAUSE;
2722 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_tx_pause ||
2723 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2724 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_TXPAUSE;
2725 1.88.2.6 snj
2726 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2727 1.1 dyoung
2728 1.42 msaitoh return;
2729 1.88.2.6 snj } /* ixgbe_media_status */
2730 1.1 dyoung
2731 1.88.2.6 snj /************************************************************************
2732 1.88.2.6 snj * ixgbe_media_change - Media Ioctl callback
2733 1.88.2.6 snj *
2734 1.88.2.6 snj * Called when the user changes speed/duplex using
2735 1.88.2.6 snj * media/mediopt option with ifconfig.
2736 1.88.2.6 snj ************************************************************************/
2737 1.88.2.6 snj static int
2738 1.88.2.6 snj ixgbe_media_change(struct ifnet *ifp)
2739 1.33 msaitoh {
2740 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2741 1.88.2.6 snj struct ifmedia *ifm = &adapter->media;
2742 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2743 1.88.2.6 snj ixgbe_link_speed speed = 0;
2744 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
2745 1.88.2.6 snj bool negotiate = false;
2746 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
2747 1.88.2.6 snj
2748 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_change: begin");
2749 1.88.2.6 snj
2750 1.88.2.6 snj if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2751 1.88.2.6 snj return (EINVAL);
2752 1.33 msaitoh
2753 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
2754 1.88.2.6 snj return (ENODEV);
2755 1.88.2.6 snj
2756 1.88.2.6 snj /*
2757 1.88.2.6 snj * We don't actually need to check against the supported
2758 1.88.2.6 snj * media types of the adapter; ifmedia will take care of
2759 1.88.2.6 snj * that for us.
2760 1.88.2.6 snj */
2761 1.88.2.6 snj switch (IFM_SUBTYPE(ifm->ifm_media)) {
2762 1.88.2.6 snj case IFM_AUTO:
2763 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
2764 1.88.2.6 snj &negotiate);
2765 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
2766 1.88.2.6 snj device_printf(adapter->dev, "Unable to determine "
2767 1.88.2.6 snj "supported advertise speeds\n");
2768 1.88.2.6 snj return (ENODEV);
2769 1.88.2.6 snj }
2770 1.88.2.6 snj speed |= link_caps;
2771 1.88.2.6 snj break;
2772 1.88.2.6 snj case IFM_10G_T:
2773 1.88.2.6 snj case IFM_10G_LRM:
2774 1.88.2.6 snj case IFM_10G_LR:
2775 1.88.2.6 snj case IFM_10G_TWINAX:
2776 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2777 1.88.2.6 snj case IFM_10G_SR: /* KR, too */
2778 1.88.2.6 snj case IFM_10G_CX4: /* KX4 */
2779 1.33 msaitoh #else
2780 1.88.2.6 snj case IFM_10G_KR:
2781 1.88.2.6 snj case IFM_10G_KX4:
2782 1.33 msaitoh #endif
2783 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
2784 1.44 msaitoh break;
2785 1.88.2.6 snj case IFM_5000_T:
2786 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
2787 1.44 msaitoh break;
2788 1.88.2.6 snj case IFM_2500_T:
2789 1.88.2.6 snj case IFM_2500_KX:
2790 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
2791 1.88.2.6 snj break;
2792 1.88.2.6 snj case IFM_1000_T:
2793 1.88.2.6 snj case IFM_1000_LX:
2794 1.88.2.6 snj case IFM_1000_SX:
2795 1.88.2.6 snj case IFM_1000_KX:
2796 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
2797 1.88.2.6 snj break;
2798 1.88.2.6 snj case IFM_100_TX:
2799 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
2800 1.88.2.6 snj break;
2801 1.88.2.6 snj case IFM_10_T:
2802 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
2803 1.44 msaitoh break;
2804 1.88.2.6 snj default:
2805 1.88.2.6 snj goto invalid;
2806 1.44 msaitoh }
2807 1.44 msaitoh
2808 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
2809 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
2810 1.88.2.6 snj adapter->advertise = 0;
2811 1.88.2.6 snj if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) {
2812 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0)
2813 1.88.2.6 snj adapter->advertise |= 1 << 2;
2814 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0)
2815 1.88.2.6 snj adapter->advertise |= 1 << 1;
2816 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0)
2817 1.88.2.6 snj adapter->advertise |= 1 << 0;
2818 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0)
2819 1.88.2.6 snj adapter->advertise |= 1 << 3;
2820 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0)
2821 1.88.2.6 snj adapter->advertise |= 1 << 4;
2822 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0)
2823 1.88.2.6 snj adapter->advertise |= 1 << 5;
2824 1.33 msaitoh }
2825 1.33 msaitoh
2826 1.88.2.6 snj return (0);
2827 1.33 msaitoh
2828 1.88.2.6 snj invalid:
2829 1.88.2.6 snj device_printf(adapter->dev, "Invalid media type!\n");
2830 1.33 msaitoh
2831 1.88.2.6 snj return (EINVAL);
2832 1.88.2.6 snj } /* ixgbe_media_change */
2833 1.1 dyoung
2834 1.88.2.6 snj /************************************************************************
2835 1.88.2.6 snj * ixgbe_set_promisc
2836 1.88.2.6 snj ************************************************************************/
2837 1.1 dyoung static void
2838 1.88.2.6 snj ixgbe_set_promisc(struct adapter *adapter)
2839 1.1 dyoung {
2840 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2841 1.88.2.6 snj int mcnt = 0;
2842 1.88.2.6 snj u32 rctl;
2843 1.88.2.6 snj struct ether_multi *enm;
2844 1.88.2.6 snj struct ether_multistep step;
2845 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
2846 1.1 dyoung
2847 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
2848 1.88.2.6 snj rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2849 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_UPE);
2850 1.88.2.6 snj if (ifp->if_flags & IFF_ALLMULTI)
2851 1.88.2.6 snj mcnt = MAX_NUM_MULTICAST_ADDRESSES;
2852 1.88.2.6 snj else {
2853 1.88.2.6 snj ETHER_LOCK(ec);
2854 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
2855 1.88.2.6 snj while (enm != NULL) {
2856 1.88.2.6 snj if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2857 1.88.2.6 snj break;
2858 1.88.2.6 snj mcnt++;
2859 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
2860 1.88.2.6 snj }
2861 1.88.2.6 snj ETHER_UNLOCK(ec);
2862 1.44 msaitoh }
2863 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES)
2864 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_MPE);
2865 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2866 1.1 dyoung
2867 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC) {
2868 1.88.2.6 snj rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2869 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2870 1.88.2.6 snj } else if (ifp->if_flags & IFF_ALLMULTI) {
2871 1.88.2.6 snj rctl |= IXGBE_FCTRL_MPE;
2872 1.88.2.6 snj rctl &= ~IXGBE_FCTRL_UPE;
2873 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2874 1.88.2.6 snj }
2875 1.88.2.6 snj } /* ixgbe_set_promisc */
2876 1.88.2.6 snj
2877 1.88.2.6 snj /************************************************************************
2878 1.88.2.6 snj * ixgbe_msix_link - Link status change ISR (MSI/MSI-X)
2879 1.88.2.6 snj ************************************************************************/
2880 1.88.2.6 snj static int
2881 1.88.2.6 snj ixgbe_msix_link(void *arg)
2882 1.88.2.6 snj {
2883 1.88.2.6 snj struct adapter *adapter = arg;
2884 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2885 1.88.2.6 snj u32 eicr, eicr_mask;
2886 1.88.2.6 snj s32 retval;
2887 1.1 dyoung
2888 1.88.2.6 snj ++adapter->link_irq.ev_count;
2889 1.1 dyoung
2890 1.88.2.6 snj /* Pause other interrupts */
2891 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);
2892 1.1 dyoung
2893 1.88.2.6 snj /* First get the cause */
2894 1.88.2.10 martin /*
2895 1.88.2.10 martin * The specifications of 82598, 82599, X540 and X550 say EICS register
2896 1.88.2.10 martin * is write only. However, Linux says it is a workaround for silicon
2897 1.88.2.10 martin * errata to read EICS instead of EICR to get interrupt cause. It seems
2898 1.88.2.10 martin * there is a problem about read clear mechanism for EICR register.
2899 1.88.2.10 martin */
2900 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2901 1.88.2.6 snj /* Be sure the queue bits are not cleared */
2902 1.88.2.6 snj eicr &= ~IXGBE_EICR_RTX_QUEUE;
2903 1.88.2.6 snj /* Clear interrupt with write */
2904 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2905 1.1 dyoung
2906 1.88.2.6 snj /* Link status change */
2907 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC) {
2908 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2909 1.88.2.6 snj softint_schedule(adapter->link_si);
2910 1.88.2.6 snj }
2911 1.33 msaitoh
2912 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
2913 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_FDIR) &&
2914 1.88.2.6 snj (eicr & IXGBE_EICR_FLOW_DIR)) {
2915 1.88.2.6 snj /* This is probably overkill :) */
2916 1.88.2.6 snj if (!atomic_cas_uint(&adapter->fdir_reinit, 0, 1))
2917 1.88.2.6 snj return 1;
2918 1.88.2.6 snj /* Disable the interrupt */
2919 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2920 1.88.2.6 snj softint_schedule(adapter->fdir_si);
2921 1.88.2.6 snj }
2922 1.82 msaitoh
2923 1.88.2.6 snj if (eicr & IXGBE_EICR_ECC) {
2924 1.88.2.6 snj device_printf(adapter->dev,
2925 1.88.2.6 snj "CRITICAL: ECC ERROR!! Please Reboot!!\n");
2926 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2927 1.88.2.6 snj }
2928 1.82 msaitoh
2929 1.88.2.6 snj /* Check for over temp condition */
2930 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR) {
2931 1.88.2.6 snj switch (adapter->hw.mac.type) {
2932 1.88.2.6 snj case ixgbe_mac_X550EM_a:
2933 1.88.2.6 snj if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a))
2934 1.88.2.6 snj break;
2935 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC,
2936 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
2937 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
2938 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
2939 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
2940 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
2941 1.88.2.6 snj break;
2942 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
2943 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
2944 1.88.2.6 snj break;
2945 1.88.2.6 snj default:
2946 1.88.2.6 snj if (!(eicr & IXGBE_EICR_TS))
2947 1.88.2.6 snj break;
2948 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
2949 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
2950 1.88.2.6 snj break;
2951 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
2952 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
2953 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS);
2954 1.88.2.6 snj break;
2955 1.88.2.6 snj }
2956 1.46 msaitoh }
2957 1.33 msaitoh
2958 1.88.2.6 snj /* Check for VF message */
2959 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_SRIOV) &&
2960 1.88.2.6 snj (eicr & IXGBE_EICR_MAILBOX))
2961 1.88.2.6 snj softint_schedule(adapter->mbx_si);
2962 1.88.2.6 snj }
2963 1.1 dyoung
2964 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
2965 1.88.2.6 snj /* Pluggable optics-related interrupt */
2966 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
2967 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2968 1.88.2.6 snj else
2969 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
2970 1.28 msaitoh
2971 1.88.2.6 snj if (eicr & eicr_mask) {
2972 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2973 1.88.2.6 snj softint_schedule(adapter->mod_si);
2974 1.88.2.6 snj }
2975 1.88.2.6 snj
2976 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
2977 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
2978 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
2979 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
2980 1.88.2.6 snj softint_schedule(adapter->msf_si);
2981 1.88.2.6 snj }
2982 1.1 dyoung }
2983 1.1 dyoung
2984 1.88.2.6 snj /* Check for fan failure */
2985 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
2986 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, TRUE);
2987 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
2988 1.88.2.6 snj }
2989 1.88.2.6 snj
2990 1.88.2.6 snj /* External PHY interrupt */
2991 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
2992 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2993 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);
2994 1.88.2.6 snj softint_schedule(adapter->phy_si);
2995 1.88.2.6 snj }
2996 1.88.2.6 snj
2997 1.88.2.6 snj /* Re-enable other interrupts */
2998 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
2999 1.88.2.6 snj return 1;
3000 1.88.2.6 snj } /* ixgbe_msix_link */
3001 1.88.2.6 snj
3002 1.88.2.10 martin static void
3003 1.88.2.10 martin ixgbe_eitr_write(struct ix_queue *que, uint32_t itr)
3004 1.88.2.10 martin {
3005 1.88.2.10 martin struct adapter *adapter = que->adapter;
3006 1.88.2.10 martin
3007 1.88.2.10 martin if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3008 1.88.2.10 martin itr |= itr << 16;
3009 1.88.2.10 martin else
3010 1.88.2.10 martin itr |= IXGBE_EITR_CNT_WDIS;
3011 1.88.2.10 martin
3012 1.88.2.10 martin IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(que->msix),
3013 1.88.2.10 martin itr);
3014 1.88.2.10 martin }
3015 1.88.2.10 martin
3016 1.88.2.10 martin
3017 1.88.2.6 snj /************************************************************************
3018 1.88.2.6 snj * ixgbe_sysctl_interrupt_rate_handler
3019 1.88.2.6 snj ************************************************************************/
3020 1.88.2.6 snj static int
3021 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS)
3022 1.88.2.6 snj {
3023 1.88.2.6 snj struct sysctlnode node = *rnode;
3024 1.88.2.6 snj struct ix_queue *que = (struct ix_queue *)node.sysctl_data;
3025 1.88.2.10 martin struct adapter *adapter = que->adapter;
3026 1.88.2.6 snj uint32_t reg, usec, rate;
3027 1.88.2.6 snj int error;
3028 1.88.2.6 snj
3029 1.88.2.6 snj if (que == NULL)
3030 1.88.2.6 snj return 0;
3031 1.88.2.6 snj reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix));
3032 1.88.2.6 snj usec = ((reg & 0x0FF8) >> 3);
3033 1.88.2.6 snj if (usec > 0)
3034 1.88.2.6 snj rate = 500000 / usec;
3035 1.88.2.6 snj else
3036 1.88.2.6 snj rate = 0;
3037 1.88.2.6 snj node.sysctl_data = &rate;
3038 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
3039 1.88.2.6 snj if (error || newp == NULL)
3040 1.88.2.6 snj return error;
3041 1.88.2.6 snj reg &= ~0xfff; /* default, no limitation */
3042 1.88.2.6 snj if (rate > 0 && rate < 500000) {
3043 1.88.2.6 snj if (rate < 1000)
3044 1.88.2.6 snj rate = 1000;
3045 1.88.2.6 snj reg |= ((4000000/rate) & 0xff8);
3046 1.88.2.10 martin /*
3047 1.88.2.10 martin * When RSC is used, ITR interval must be larger than
3048 1.88.2.10 martin * RSC_DELAY. Currently, we use 2us for RSC_DELAY.
3049 1.88.2.10 martin * The minimum value is always greater than 2us on 100M
3050 1.88.2.10 martin * (and 10M?(not documented)), but it's not on 1G and higher.
3051 1.88.2.10 martin */
3052 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
3053 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
3054 1.88.2.10 martin if ((adapter->num_queues > 1)
3055 1.88.2.10 martin && (reg < IXGBE_MIN_RSC_EITR_10G1G))
3056 1.88.2.10 martin return EINVAL;
3057 1.88.2.10 martin }
3058 1.88.2.10 martin ixgbe_max_interrupt_rate = rate;
3059 1.88.2.10 martin } else
3060 1.88.2.10 martin ixgbe_max_interrupt_rate = 0;
3061 1.88.2.10 martin ixgbe_eitr_write(que, reg);
3062 1.1 dyoung
3063 1.88.2.6 snj return (0);
3064 1.88.2.6 snj } /* ixgbe_sysctl_interrupt_rate_handler */
3065 1.33 msaitoh
3066 1.88.2.6 snj const struct sysctlnode *
3067 1.88.2.6 snj ixgbe_sysctl_instance(struct adapter *adapter)
3068 1.88.2.6 snj {
3069 1.88.2.6 snj const char *dvname;
3070 1.88.2.6 snj struct sysctllog **log;
3071 1.88.2.6 snj int rc;
3072 1.88.2.6 snj const struct sysctlnode *rnode;
3073 1.1 dyoung
3074 1.88.2.6 snj if (adapter->sysctltop != NULL)
3075 1.88.2.6 snj return adapter->sysctltop;
3076 1.1 dyoung
3077 1.88.2.6 snj log = &adapter->sysctllog;
3078 1.88.2.6 snj dvname = device_xname(adapter->dev);
3079 1.1 dyoung
3080 1.88.2.6 snj if ((rc = sysctl_createv(log, 0, NULL, &rnode,
3081 1.88.2.6 snj 0, CTLTYPE_NODE, dvname,
3082 1.88.2.6 snj SYSCTL_DESCR("ixgbe information and settings"),
3083 1.88.2.6 snj NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
3084 1.88.2.6 snj goto err;
3085 1.1 dyoung
3086 1.88.2.6 snj return rnode;
3087 1.88.2.6 snj err:
3088 1.88.2.6 snj printf("%s: sysctl_createv failed, rc = %d\n", __func__, rc);
3089 1.88.2.6 snj return NULL;
3090 1.1 dyoung }
3091 1.1 dyoung
3092 1.88.2.6 snj /************************************************************************
3093 1.88.2.6 snj * ixgbe_add_device_sysctls
3094 1.88.2.6 snj ************************************************************************/
3095 1.1 dyoung static void
3096 1.88.2.6 snj ixgbe_add_device_sysctls(struct adapter *adapter)
3097 1.1 dyoung {
3098 1.88.2.6 snj device_t dev = adapter->dev;
3099 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3100 1.88.2.6 snj struct sysctllog **log;
3101 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
3102 1.1 dyoung
3103 1.88.2.6 snj log = &adapter->sysctllog;
3104 1.1 dyoung
3105 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
3106 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
3107 1.1 dyoung return;
3108 1.88.2.6 snj }
3109 1.1 dyoung
3110 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3111 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3112 1.88.2.6 snj "num_rx_desc", SYSCTL_DESCR("Number of rx descriptors"),
3113 1.88.2.6 snj NULL, 0, &adapter->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0)
3114 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3115 1.1 dyoung
3116 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3117 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3118 1.88.2.6 snj "num_queues", SYSCTL_DESCR("Number of queues"),
3119 1.88.2.6 snj NULL, 0, &adapter->num_queues, 0, CTL_CREATE, CTL_EOL) != 0)
3120 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3121 1.1 dyoung
3122 1.88.2.6 snj /* Sysctls for all devices */
3123 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3124 1.88.2.6 snj CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC),
3125 1.88.2.6 snj ixgbe_sysctl_flowcntl, 0, (void *)adapter, 0, CTL_CREATE,
3126 1.88.2.6 snj CTL_EOL) != 0)
3127 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3128 1.1 dyoung
3129 1.88.2.6 snj adapter->enable_aim = ixgbe_enable_aim;
3130 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3131 1.88.2.6 snj CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"),
3132 1.88.2.6 snj NULL, 0, &adapter->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0)
3133 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3134 1.1 dyoung
3135 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3136 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
3137 1.88.2.6 snj "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED),
3138 1.88.2.6 snj ixgbe_sysctl_advertise, 0, (void *)adapter, 0, CTL_CREATE,
3139 1.88.2.6 snj CTL_EOL) != 0)
3140 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3141 1.88.2.6 snj
3142 1.88.2.12 martin adapter->txrx_use_workqueue = ixgbe_txrx_workqueue;
3143 1.88.2.12 martin if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3144 1.88.2.12 martin CTLTYPE_BOOL, "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
3145 1.88.2.12 martin NULL, 0, &adapter->txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL) != 0)
3146 1.88.2.12 martin aprint_error_dev(dev, "could not create sysctl\n");
3147 1.88.2.12 martin
3148 1.88.2.6 snj #ifdef IXGBE_DEBUG
3149 1.88.2.6 snj /* testing sysctls (for all devices) */
3150 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3151 1.88.2.6 snj CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"),
3152 1.88.2.6 snj ixgbe_sysctl_power_state, 0, (void *)adapter, 0, CTL_CREATE,
3153 1.88.2.6 snj CTL_EOL) != 0)
3154 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3155 1.88.2.6 snj
3156 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY,
3157 1.88.2.6 snj CTLTYPE_STRING, "print_rss_config",
3158 1.88.2.6 snj SYSCTL_DESCR("Prints RSS Configuration"),
3159 1.88.2.6 snj ixgbe_sysctl_print_rss_config, 0, (void *)adapter, 0, CTL_CREATE,
3160 1.88.2.6 snj CTL_EOL) != 0)
3161 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3162 1.1 dyoung #endif
3163 1.88.2.6 snj /* for X550 series devices */
3164 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3165 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3166 1.88.2.6 snj CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"),
3167 1.88.2.6 snj ixgbe_sysctl_dmac, 0, (void *)adapter, 0, CTL_CREATE,
3168 1.88.2.6 snj CTL_EOL) != 0)
3169 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3170 1.1 dyoung
3171 1.88.2.6 snj /* for WoL-capable devices */
3172 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3173 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3174 1.88.2.6 snj CTLTYPE_BOOL, "wol_enable",
3175 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake on LAN"),
3176 1.88.2.6 snj ixgbe_sysctl_wol_enable, 0, (void *)adapter, 0, CTL_CREATE,
3177 1.88.2.6 snj CTL_EOL) != 0)
3178 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3179 1.1 dyoung
3180 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3181 1.88.2.6 snj CTLTYPE_INT, "wufc",
3182 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake Up Filters"),
3183 1.88.2.6 snj ixgbe_sysctl_wufc, 0, (void *)adapter, 0, CTL_CREATE,
3184 1.88.2.6 snj CTL_EOL) != 0)
3185 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3186 1.88.2.6 snj }
3187 1.35 msaitoh
3188 1.88.2.6 snj /* for X552/X557-AT devices */
3189 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3190 1.88.2.6 snj const struct sysctlnode *phy_node;
3191 1.1 dyoung
3192 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE,
3193 1.88.2.6 snj "phy", SYSCTL_DESCR("External PHY sysctls"),
3194 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) {
3195 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3196 1.88.2.6 snj return;
3197 1.33 msaitoh }
3198 1.88.2.6 snj
3199 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3200 1.88.2.6 snj CTLTYPE_INT, "temp",
3201 1.88.2.6 snj SYSCTL_DESCR("Current External PHY Temperature (Celsius)"),
3202 1.88.2.6 snj ixgbe_sysctl_phy_temp, 0, (void *)adapter, 0, CTL_CREATE,
3203 1.88.2.6 snj CTL_EOL) != 0)
3204 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3205 1.88.2.6 snj
3206 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3207 1.88.2.6 snj CTLTYPE_INT, "overtemp_occurred",
3208 1.88.2.6 snj SYSCTL_DESCR("External PHY High Temperature Event Occurred"),
3209 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)adapter, 0,
3210 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
3211 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3212 1.33 msaitoh }
3213 1.33 msaitoh
3214 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE) {
3215 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3216 1.88.2.6 snj CTLTYPE_INT, "eee_state",
3217 1.88.2.6 snj SYSCTL_DESCR("EEE Power Save State"),
3218 1.88.2.6 snj ixgbe_sysctl_eee_state, 0, (void *)adapter, 0, CTL_CREATE,
3219 1.88.2.6 snj CTL_EOL) != 0)
3220 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3221 1.88.2.6 snj }
3222 1.88.2.6 snj } /* ixgbe_add_device_sysctls */
3223 1.1 dyoung
3224 1.88.2.6 snj /************************************************************************
3225 1.88.2.6 snj * ixgbe_allocate_pci_resources
3226 1.88.2.6 snj ************************************************************************/
3227 1.88.2.6 snj static int
3228 1.88.2.6 snj ixgbe_allocate_pci_resources(struct adapter *adapter,
3229 1.88.2.6 snj const struct pci_attach_args *pa)
3230 1.88.2.6 snj {
3231 1.88.2.6 snj pcireg_t memtype;
3232 1.88.2.6 snj device_t dev = adapter->dev;
3233 1.88.2.6 snj bus_addr_t addr;
3234 1.88.2.6 snj int flags;
3235 1.88.2.6 snj
3236 1.88.2.6 snj memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
3237 1.88.2.6 snj switch (memtype) {
3238 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
3239 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
3240 1.88.2.6 snj adapter->osdep.mem_bus_space_tag = pa->pa_memt;
3241 1.88.2.6 snj if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0),
3242 1.88.2.6 snj memtype, &addr, &adapter->osdep.mem_size, &flags) != 0)
3243 1.88.2.6 snj goto map_err;
3244 1.88.2.6 snj if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) {
3245 1.88.2.6 snj aprint_normal_dev(dev, "clearing prefetchable bit\n");
3246 1.88.2.6 snj flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
3247 1.88.2.6 snj }
3248 1.88.2.6 snj if (bus_space_map(adapter->osdep.mem_bus_space_tag, addr,
3249 1.88.2.6 snj adapter->osdep.mem_size, flags,
3250 1.88.2.6 snj &adapter->osdep.mem_bus_space_handle) != 0) {
3251 1.88.2.6 snj map_err:
3252 1.88.2.6 snj adapter->osdep.mem_size = 0;
3253 1.88.2.6 snj aprint_error_dev(dev, "unable to map BAR0\n");
3254 1.88.2.6 snj return ENXIO;
3255 1.88.2.6 snj }
3256 1.88.2.6 snj break;
3257 1.88.2.6 snj default:
3258 1.88.2.6 snj aprint_error_dev(dev, "unexpected type on BAR0\n");
3259 1.88.2.6 snj return ENXIO;
3260 1.1 dyoung }
3261 1.1 dyoung
3262 1.88.2.6 snj return (0);
3263 1.88.2.6 snj } /* ixgbe_allocate_pci_resources */
3264 1.88.2.6 snj
3265 1.88.2.8 snj static void
3266 1.88.2.8 snj ixgbe_free_softint(struct adapter *adapter)
3267 1.88.2.8 snj {
3268 1.88.2.8 snj struct ix_queue *que = adapter->queues;
3269 1.88.2.8 snj struct tx_ring *txr = adapter->tx_rings;
3270 1.88.2.8 snj int i;
3271 1.88.2.8 snj
3272 1.88.2.8 snj for (i = 0; i < adapter->num_queues; i++, que++, txr++) {
3273 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
3274 1.88.2.8 snj if (txr->txr_si != NULL)
3275 1.88.2.8 snj softint_disestablish(txr->txr_si);
3276 1.88.2.8 snj }
3277 1.88.2.8 snj if (que->que_si != NULL)
3278 1.88.2.8 snj softint_disestablish(que->que_si);
3279 1.88.2.8 snj }
3280 1.88.2.12 martin if (adapter->txr_wq != NULL)
3281 1.88.2.12 martin workqueue_destroy(adapter->txr_wq);
3282 1.88.2.12 martin if (adapter->txr_wq_enqueued != NULL)
3283 1.88.2.12 martin percpu_free(adapter->txr_wq_enqueued, sizeof(u_int));
3284 1.88.2.12 martin if (adapter->que_wq != NULL)
3285 1.88.2.12 martin workqueue_destroy(adapter->que_wq);
3286 1.88.2.8 snj
3287 1.88.2.8 snj /* Drain the Link queue */
3288 1.88.2.8 snj if (adapter->link_si != NULL) {
3289 1.88.2.8 snj softint_disestablish(adapter->link_si);
3290 1.88.2.8 snj adapter->link_si = NULL;
3291 1.88.2.8 snj }
3292 1.88.2.8 snj if (adapter->mod_si != NULL) {
3293 1.88.2.8 snj softint_disestablish(adapter->mod_si);
3294 1.88.2.8 snj adapter->mod_si = NULL;
3295 1.88.2.8 snj }
3296 1.88.2.8 snj if (adapter->msf_si != NULL) {
3297 1.88.2.8 snj softint_disestablish(adapter->msf_si);
3298 1.88.2.8 snj adapter->msf_si = NULL;
3299 1.88.2.8 snj }
3300 1.88.2.8 snj if (adapter->phy_si != NULL) {
3301 1.88.2.8 snj softint_disestablish(adapter->phy_si);
3302 1.88.2.8 snj adapter->phy_si = NULL;
3303 1.88.2.8 snj }
3304 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR) {
3305 1.88.2.8 snj if (adapter->fdir_si != NULL) {
3306 1.88.2.8 snj softint_disestablish(adapter->fdir_si);
3307 1.88.2.8 snj adapter->fdir_si = NULL;
3308 1.88.2.8 snj }
3309 1.88.2.8 snj }
3310 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
3311 1.88.2.8 snj if (adapter->mbx_si != NULL) {
3312 1.88.2.8 snj softint_disestablish(adapter->mbx_si);
3313 1.88.2.8 snj adapter->mbx_si = NULL;
3314 1.88.2.8 snj }
3315 1.88.2.8 snj }
3316 1.88.2.8 snj } /* ixgbe_free_softint */
3317 1.88.2.8 snj
3318 1.88.2.6 snj /************************************************************************
3319 1.88.2.6 snj * ixgbe_detach - Device removal routine
3320 1.88.2.6 snj *
3321 1.88.2.6 snj * Called when the driver is being removed.
3322 1.88.2.6 snj * Stops the adapter and deallocates all the resources
3323 1.88.2.6 snj * that were allocated for driver operation.
3324 1.88.2.6 snj *
3325 1.88.2.6 snj * return 0 on success, positive on failure
3326 1.88.2.6 snj ************************************************************************/
3327 1.88.2.6 snj static int
3328 1.88.2.6 snj ixgbe_detach(device_t dev, int flags)
3329 1.1 dyoung {
3330 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3331 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
3332 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
3333 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3334 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
3335 1.88.2.6 snj u32 ctrl_ext;
3336 1.1 dyoung
3337 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_detach: begin");
3338 1.88.2.6 snj if (adapter->osdep.attached == false)
3339 1.88.2.6 snj return 0;
3340 1.28 msaitoh
3341 1.88.2.6 snj if (ixgbe_pci_iov_detach(dev) != 0) {
3342 1.88.2.6 snj device_printf(dev, "SR-IOV in use; detach first.\n");
3343 1.88.2.6 snj return (EBUSY);
3344 1.1 dyoung }
3345 1.1 dyoung
3346 1.88.2.6 snj /* Stop the interface. Callouts are stopped in it. */
3347 1.88.2.6 snj ixgbe_ifstop(adapter->ifp, 1);
3348 1.88.2.6 snj #if NVLAN > 0
3349 1.88.2.6 snj /* Make sure VLANs are not using driver */
3350 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
3351 1.88.2.6 snj ; /* nothing to do: no VLANs */
3352 1.88.2.6 snj else if ((flags & (DETACH_SHUTDOWN|DETACH_FORCE)) != 0)
3353 1.88.2.6 snj vlan_ifdetach(adapter->ifp);
3354 1.88.2.6 snj else {
3355 1.88.2.6 snj aprint_error_dev(dev, "VLANs in use, detach first\n");
3356 1.88.2.6 snj return (EBUSY);
3357 1.88.2.6 snj }
3358 1.45 msaitoh #endif
3359 1.88.2.6 snj
3360 1.88.2.6 snj pmf_device_deregister(dev);
3361 1.88.2.6 snj
3362 1.88.2.6 snj ether_ifdetach(adapter->ifp);
3363 1.88.2.6 snj /* Stop the adapter */
3364 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3365 1.88.2.6 snj ixgbe_setup_low_power_mode(adapter);
3366 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3367 1.88.2.6 snj
3368 1.88.2.8 snj ixgbe_free_softint(adapter);
3369 1.88.2.8 snj
3370 1.88.2.6 snj /* let hardware know driver is unloading */
3371 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
3372 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
3373 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
3374 1.1 dyoung
3375 1.88.2.6 snj callout_halt(&adapter->timer, NULL);
3376 1.1 dyoung
3377 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
3378 1.88.2.6 snj netmap_detach(adapter->ifp);
3379 1.1 dyoung
3380 1.88.2.6 snj ixgbe_free_pci_resources(adapter);
3381 1.88.2.6 snj #if 0 /* XXX the NetBSD port is probably missing something here */
3382 1.88.2.6 snj bus_generic_detach(dev);
3383 1.88.2.6 snj #endif
3384 1.88.2.6 snj if_detach(adapter->ifp);
3385 1.88.2.6 snj if_percpuq_destroy(adapter->ipq);
3386 1.33 msaitoh
3387 1.88.2.6 snj sysctl_teardown(&adapter->sysctllog);
3388 1.88.2.6 snj evcnt_detach(&adapter->efbig_tx_dma_setup);
3389 1.88.2.6 snj evcnt_detach(&adapter->mbuf_defrag_failed);
3390 1.88.2.6 snj evcnt_detach(&adapter->efbig2_tx_dma_setup);
3391 1.88.2.6 snj evcnt_detach(&adapter->einval_tx_dma_setup);
3392 1.88.2.6 snj evcnt_detach(&adapter->other_tx_dma_setup);
3393 1.88.2.6 snj evcnt_detach(&adapter->eagain_tx_dma_setup);
3394 1.88.2.6 snj evcnt_detach(&adapter->enomem_tx_dma_setup);
3395 1.88.2.6 snj evcnt_detach(&adapter->watchdog_events);
3396 1.88.2.6 snj evcnt_detach(&adapter->tso_err);
3397 1.88.2.6 snj evcnt_detach(&adapter->link_irq);
3398 1.33 msaitoh
3399 1.88.2.6 snj txr = adapter->tx_rings;
3400 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
3401 1.88.2.6 snj evcnt_detach(&adapter->queues[i].irqs);
3402 1.88.2.13 martin evcnt_detach(&adapter->queues[i].handleq);
3403 1.88.2.13 martin evcnt_detach(&adapter->queues[i].req);
3404 1.88.2.6 snj evcnt_detach(&txr->no_desc_avail);
3405 1.88.2.6 snj evcnt_detach(&txr->total_packets);
3406 1.88.2.6 snj evcnt_detach(&txr->tso_tx);
3407 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
3408 1.88.2.6 snj evcnt_detach(&txr->pcq_drops);
3409 1.33 msaitoh #endif
3410 1.33 msaitoh
3411 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
3412 1.88.2.6 snj evcnt_detach(&stats->mpc[i]);
3413 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3414 1.88.2.6 snj evcnt_detach(&stats->rnbc[i]);
3415 1.88.2.6 snj }
3416 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
3417 1.88.2.6 snj evcnt_detach(&stats->pxontxc[i]);
3418 1.88.2.6 snj evcnt_detach(&stats->pxonrxc[i]);
3419 1.88.2.6 snj evcnt_detach(&stats->pxofftxc[i]);
3420 1.88.2.6 snj evcnt_detach(&stats->pxoffrxc[i]);
3421 1.88.2.6 snj evcnt_detach(&stats->pxon2offc[i]);
3422 1.88.2.6 snj }
3423 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
3424 1.88.2.6 snj evcnt_detach(&stats->qprc[i]);
3425 1.88.2.6 snj evcnt_detach(&stats->qptc[i]);
3426 1.88.2.6 snj evcnt_detach(&stats->qbrc[i]);
3427 1.88.2.6 snj evcnt_detach(&stats->qbtc[i]);
3428 1.88.2.6 snj evcnt_detach(&stats->qprdc[i]);
3429 1.88.2.6 snj }
3430 1.88.2.6 snj
3431 1.88.2.6 snj evcnt_detach(&rxr->rx_packets);
3432 1.88.2.6 snj evcnt_detach(&rxr->rx_bytes);
3433 1.88.2.6 snj evcnt_detach(&rxr->rx_copies);
3434 1.88.2.6 snj evcnt_detach(&rxr->no_jmbuf);
3435 1.88.2.6 snj evcnt_detach(&rxr->rx_discarded);
3436 1.33 msaitoh }
3437 1.88.2.6 snj evcnt_detach(&stats->ipcs);
3438 1.88.2.6 snj evcnt_detach(&stats->l4cs);
3439 1.88.2.6 snj evcnt_detach(&stats->ipcs_bad);
3440 1.88.2.6 snj evcnt_detach(&stats->l4cs_bad);
3441 1.88.2.6 snj evcnt_detach(&stats->intzero);
3442 1.88.2.6 snj evcnt_detach(&stats->legint);
3443 1.88.2.6 snj evcnt_detach(&stats->crcerrs);
3444 1.88.2.6 snj evcnt_detach(&stats->illerrc);
3445 1.88.2.6 snj evcnt_detach(&stats->errbc);
3446 1.88.2.6 snj evcnt_detach(&stats->mspdc);
3447 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3448 1.88.2.6 snj evcnt_detach(&stats->mbsdc);
3449 1.88.2.6 snj evcnt_detach(&stats->mpctotal);
3450 1.88.2.6 snj evcnt_detach(&stats->mlfc);
3451 1.88.2.6 snj evcnt_detach(&stats->mrfc);
3452 1.88.2.6 snj evcnt_detach(&stats->rlec);
3453 1.88.2.6 snj evcnt_detach(&stats->lxontxc);
3454 1.88.2.6 snj evcnt_detach(&stats->lxonrxc);
3455 1.88.2.6 snj evcnt_detach(&stats->lxofftxc);
3456 1.88.2.6 snj evcnt_detach(&stats->lxoffrxc);
3457 1.88.2.6 snj
3458 1.88.2.6 snj /* Packet Reception Stats */
3459 1.88.2.6 snj evcnt_detach(&stats->tor);
3460 1.88.2.6 snj evcnt_detach(&stats->gorc);
3461 1.88.2.6 snj evcnt_detach(&stats->tpr);
3462 1.88.2.6 snj evcnt_detach(&stats->gprc);
3463 1.88.2.6 snj evcnt_detach(&stats->mprc);
3464 1.88.2.6 snj evcnt_detach(&stats->bprc);
3465 1.88.2.6 snj evcnt_detach(&stats->prc64);
3466 1.88.2.6 snj evcnt_detach(&stats->prc127);
3467 1.88.2.6 snj evcnt_detach(&stats->prc255);
3468 1.88.2.6 snj evcnt_detach(&stats->prc511);
3469 1.88.2.6 snj evcnt_detach(&stats->prc1023);
3470 1.88.2.6 snj evcnt_detach(&stats->prc1522);
3471 1.88.2.6 snj evcnt_detach(&stats->ruc);
3472 1.88.2.6 snj evcnt_detach(&stats->rfc);
3473 1.88.2.6 snj evcnt_detach(&stats->roc);
3474 1.88.2.6 snj evcnt_detach(&stats->rjc);
3475 1.88.2.6 snj evcnt_detach(&stats->mngprc);
3476 1.88.2.6 snj evcnt_detach(&stats->mngpdc);
3477 1.88.2.6 snj evcnt_detach(&stats->xec);
3478 1.33 msaitoh
3479 1.88.2.6 snj /* Packet Transmission Stats */
3480 1.88.2.6 snj evcnt_detach(&stats->gotc);
3481 1.88.2.6 snj evcnt_detach(&stats->tpt);
3482 1.88.2.6 snj evcnt_detach(&stats->gptc);
3483 1.88.2.6 snj evcnt_detach(&stats->bptc);
3484 1.88.2.6 snj evcnt_detach(&stats->mptc);
3485 1.88.2.6 snj evcnt_detach(&stats->mngptc);
3486 1.88.2.6 snj evcnt_detach(&stats->ptc64);
3487 1.88.2.6 snj evcnt_detach(&stats->ptc127);
3488 1.88.2.6 snj evcnt_detach(&stats->ptc255);
3489 1.88.2.6 snj evcnt_detach(&stats->ptc511);
3490 1.88.2.6 snj evcnt_detach(&stats->ptc1023);
3491 1.88.2.6 snj evcnt_detach(&stats->ptc1522);
3492 1.33 msaitoh
3493 1.88.2.6 snj ixgbe_free_transmit_structures(adapter);
3494 1.88.2.6 snj ixgbe_free_receive_structures(adapter);
3495 1.88.2.11 martin for (int i = 0; i < adapter->num_queues; i++) {
3496 1.88.2.11 martin struct ix_queue * que = &adapter->queues[i];
3497 1.88.2.11 martin mutex_destroy(&que->im_mtx);
3498 1.88.2.11 martin }
3499 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
3500 1.88.2.6 snj free(adapter->mta, M_DEVBUF);
3501 1.33 msaitoh
3502 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
3503 1.33 msaitoh
3504 1.88.2.6 snj return (0);
3505 1.88.2.6 snj } /* ixgbe_detach */
3506 1.33 msaitoh
3507 1.88.2.6 snj /************************************************************************
3508 1.88.2.6 snj * ixgbe_setup_low_power_mode - LPLU/WoL preparation
3509 1.88.2.6 snj *
3510 1.88.2.6 snj * Prepare the adapter/port for LPLU and/or WoL
3511 1.88.2.6 snj ************************************************************************/
3512 1.88.2.6 snj static int
3513 1.88.2.6 snj ixgbe_setup_low_power_mode(struct adapter *adapter)
3514 1.1 dyoung {
3515 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3516 1.88.2.6 snj device_t dev = adapter->dev;
3517 1.88.2.6 snj s32 error = 0;
3518 1.1 dyoung
3519 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3520 1.1 dyoung
3521 1.88.2.6 snj /* Limit power management flow to X550EM baseT */
3522 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
3523 1.88.2.6 snj hw->phy.ops.enter_lplu) {
3524 1.88.2.6 snj /* X550EM baseT adapters need a special LPLU flow */
3525 1.88.2.6 snj hw->phy.reset_disable = true;
3526 1.88.2.6 snj ixgbe_stop(adapter);
3527 1.88.2.6 snj error = hw->phy.ops.enter_lplu(hw);
3528 1.88.2.6 snj if (error)
3529 1.88.2.6 snj device_printf(dev,
3530 1.88.2.6 snj "Error entering LPLU: %d\n", error);
3531 1.88.2.6 snj hw->phy.reset_disable = false;
3532 1.88.2.6 snj } else {
3533 1.88.2.6 snj /* Just stop for other adapters */
3534 1.88.2.6 snj ixgbe_stop(adapter);
3535 1.88.2.6 snj }
3536 1.1 dyoung
3537 1.88.2.6 snj if (!hw->wol_enabled) {
3538 1.88.2.6 snj ixgbe_set_phy_power(hw, FALSE);
3539 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3540 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
3541 1.88.2.6 snj } else {
3542 1.88.2.6 snj /* Turn off support for APM wakeup. (Using ACPI instead) */
3543 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_GRC,
3544 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2);
3545 1.1 dyoung
3546 1.88.2.6 snj /*
3547 1.88.2.6 snj * Clear Wake Up Status register to prevent any previous wakeup
3548 1.88.2.6 snj * events from waking us up immediately after we suspend.
3549 1.88.2.6 snj */
3550 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3551 1.88.2.6 snj
3552 1.88.2.6 snj /*
3553 1.88.2.6 snj * Program the Wakeup Filter Control register with user filter
3554 1.88.2.6 snj * settings
3555 1.88.2.6 snj */
3556 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc);
3557 1.88.2.6 snj
3558 1.88.2.6 snj /* Enable wakeups and power management in Wakeup Control */
3559 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC,
3560 1.88.2.6 snj IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
3561 1.1 dyoung
3562 1.1 dyoung }
3563 1.1 dyoung
3564 1.88.2.6 snj return error;
3565 1.88.2.6 snj } /* ixgbe_setup_low_power_mode */
3566 1.88.2.6 snj
3567 1.88.2.6 snj /************************************************************************
3568 1.88.2.6 snj * ixgbe_shutdown - Shutdown entry point
3569 1.88.2.6 snj ************************************************************************/
3570 1.88.2.6 snj #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */
3571 1.88.2.6 snj static int
3572 1.88.2.6 snj ixgbe_shutdown(device_t dev)
3573 1.1 dyoung {
3574 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3575 1.88.2.6 snj int error = 0;
3576 1.1 dyoung
3577 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_shutdown: begin");
3578 1.1 dyoung
3579 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3580 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3581 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3582 1.1 dyoung
3583 1.88.2.6 snj return (error);
3584 1.88.2.6 snj } /* ixgbe_shutdown */
3585 1.88.2.6 snj #endif
3586 1.1 dyoung
3587 1.88.2.6 snj /************************************************************************
3588 1.88.2.6 snj * ixgbe_suspend
3589 1.88.2.6 snj *
3590 1.88.2.6 snj * From D0 to D3
3591 1.88.2.6 snj ************************************************************************/
3592 1.45 msaitoh static bool
3593 1.88.2.6 snj ixgbe_suspend(device_t dev, const pmf_qual_t *qual)
3594 1.1 dyoung {
3595 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3596 1.88.2.6 snj int error = 0;
3597 1.1 dyoung
3598 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_suspend: begin");
3599 1.1 dyoung
3600 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3601 1.88.2.6 snj
3602 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3603 1.88.2.6 snj
3604 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3605 1.88.2.6 snj
3606 1.88.2.6 snj return (error);
3607 1.88.2.6 snj } /* ixgbe_suspend */
3608 1.88.2.6 snj
3609 1.88.2.6 snj /************************************************************************
3610 1.88.2.6 snj * ixgbe_resume
3611 1.88.2.6 snj *
3612 1.88.2.6 snj * From D3 to D0
3613 1.88.2.6 snj ************************************************************************/
3614 1.88.2.6 snj static bool
3615 1.88.2.6 snj ixgbe_resume(device_t dev, const pmf_qual_t *qual)
3616 1.1 dyoung {
3617 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3618 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3619 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
3620 1.88.2.6 snj u32 wus;
3621 1.1 dyoung
3622 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_resume: begin");
3623 1.48 msaitoh
3624 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3625 1.88.2.6 snj
3626 1.88.2.6 snj /* Read & clear WUS register */
3627 1.88.2.6 snj wus = IXGBE_READ_REG(hw, IXGBE_WUS);
3628 1.88.2.6 snj if (wus)
3629 1.88.2.6 snj device_printf(dev, "Woken up by (WUS): %#010x\n",
3630 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_WUS));
3631 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3632 1.88.2.6 snj /* And clear WUFC until next low-power transition */
3633 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3634 1.88.2.6 snj
3635 1.88.2.6 snj /*
3636 1.88.2.6 snj * Required after D3->D0 transition;
3637 1.88.2.6 snj * will re-advertise all previous advertised speeds
3638 1.88.2.6 snj */
3639 1.88.2.6 snj if (ifp->if_flags & IFF_UP)
3640 1.88.2.6 snj ixgbe_init_locked(adapter);
3641 1.88.2.6 snj
3642 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3643 1.88.2.6 snj
3644 1.88.2.6 snj return true;
3645 1.88.2.6 snj } /* ixgbe_resume */
3646 1.1 dyoung
3647 1.1 dyoung /*
3648 1.88.2.6 snj * Set the various hardware offload abilities.
3649 1.88.2.6 snj *
3650 1.88.2.6 snj * This takes the ifnet's if_capenable flags (e.g. set by the user using
3651 1.88.2.6 snj * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what
3652 1.88.2.6 snj * mbuf offload flags the driver will understand.
3653 1.88.2.6 snj */
3654 1.1 dyoung static void
3655 1.88.2.6 snj ixgbe_set_if_hwassist(struct adapter *adapter)
3656 1.1 dyoung {
3657 1.88.2.6 snj /* XXX */
3658 1.88.2.6 snj }
3659 1.88.2.6 snj
3660 1.88.2.6 snj /************************************************************************
3661 1.88.2.6 snj * ixgbe_init_locked - Init entry point
3662 1.88.2.6 snj *
3663 1.88.2.6 snj * Used in two ways: It is used by the stack as an init
3664 1.88.2.6 snj * entry point in network interface structure. It is also
3665 1.88.2.6 snj * used by the driver as a hw/sw initialization routine to
3666 1.88.2.6 snj * get to a consistent state.
3667 1.88.2.6 snj *
3668 1.88.2.6 snj * return 0 on success, positive on failure
3669 1.88.2.6 snj ************************************************************************/
3670 1.88.2.6 snj static void
3671 1.88.2.6 snj ixgbe_init_locked(struct adapter *adapter)
3672 1.88.2.6 snj {
3673 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3674 1.88.2.6 snj device_t dev = adapter->dev;
3675 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3676 1.88.2.6 snj struct tx_ring *txr;
3677 1.88.2.6 snj struct rx_ring *rxr;
3678 1.88.2.6 snj u32 txdctl, mhadd;
3679 1.88.2.6 snj u32 rxdctl, rxctrl;
3680 1.88.2.6 snj u32 ctrl_ext;
3681 1.88.2.6 snj int err = 0;
3682 1.1 dyoung
3683 1.88.2.6 snj /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */
3684 1.65 msaitoh
3685 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3686 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_init_locked: begin");
3687 1.51 msaitoh
3688 1.88.2.6 snj hw->adapter_stopped = FALSE;
3689 1.88.2.6 snj ixgbe_stop_adapter(hw);
3690 1.88.2.6 snj callout_stop(&adapter->timer);
3691 1.51 msaitoh
3692 1.88.2.6 snj /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */
3693 1.88.2.6 snj adapter->max_frame_size =
3694 1.88.2.6 snj ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
3695 1.51 msaitoh
3696 1.88.2.6 snj /* Queue indices may change with IOV mode */
3697 1.88.2.6 snj ixgbe_align_all_queue_indices(adapter);
3698 1.51 msaitoh
3699 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
3700 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV);
3701 1.88.2.6 snj
3702 1.88.2.6 snj /* Get the latest mac address, User can use a LAA */
3703 1.88.2.6 snj memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl),
3704 1.88.2.6 snj IXGBE_ETH_LENGTH_OF_ADDRESS);
3705 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1);
3706 1.88.2.6 snj hw->addr_ctrl.rar_used_count = 1;
3707 1.88.2.6 snj
3708 1.88.2.6 snj /* Set hardware offload abilities from ifnet flags */
3709 1.88.2.6 snj ixgbe_set_if_hwassist(adapter);
3710 1.88.2.6 snj
3711 1.88.2.6 snj /* Prepare transmit descriptors and buffers */
3712 1.88.2.6 snj if (ixgbe_setup_transmit_structures(adapter)) {
3713 1.88.2.6 snj device_printf(dev, "Could not setup transmit structures\n");
3714 1.88.2.6 snj ixgbe_stop(adapter);
3715 1.88.2.6 snj return;
3716 1.1 dyoung }
3717 1.45 msaitoh
3718 1.88.2.6 snj ixgbe_init_hw(hw);
3719 1.88.2.6 snj ixgbe_initialize_iov(adapter);
3720 1.88.2.6 snj ixgbe_initialize_transmit_units(adapter);
3721 1.88.2.6 snj
3722 1.88.2.6 snj /* Setup Multicast table */
3723 1.88.2.6 snj ixgbe_set_multi(adapter);
3724 1.88.2.6 snj
3725 1.88.2.6 snj /* Determine the correct mbuf pool, based on frame size */
3726 1.88.2.6 snj if (adapter->max_frame_size <= MCLBYTES)
3727 1.88.2.6 snj adapter->rx_mbuf_sz = MCLBYTES;
3728 1.88.2.6 snj else
3729 1.88.2.6 snj adapter->rx_mbuf_sz = MJUMPAGESIZE;
3730 1.88.2.6 snj
3731 1.88.2.6 snj /* Prepare receive descriptors and buffers */
3732 1.88.2.6 snj if (ixgbe_setup_receive_structures(adapter)) {
3733 1.88.2.6 snj device_printf(dev, "Could not setup receive structures\n");
3734 1.88.2.6 snj ixgbe_stop(adapter);
3735 1.88.2.6 snj return;
3736 1.51 msaitoh }
3737 1.88.2.6 snj
3738 1.88.2.6 snj /* Configure RX settings */
3739 1.88.2.6 snj ixgbe_initialize_receive_units(adapter);
3740 1.88.2.6 snj
3741 1.88.2.6 snj /* Enable SDP & MSI-X interrupts based on adapter */
3742 1.88.2.6 snj ixgbe_config_gpie(adapter);
3743 1.88.2.6 snj
3744 1.88.2.6 snj /* Set MTU size */
3745 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU) {
3746 1.88.2.6 snj /* aka IXGBE_MAXFRS on 82599 and newer */
3747 1.88.2.6 snj mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3748 1.88.2.6 snj mhadd &= ~IXGBE_MHADD_MFS_MASK;
3749 1.88.2.6 snj mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT;
3750 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3751 1.1 dyoung }
3752 1.51 msaitoh
3753 1.88.2.6 snj /* Now enable all the queues */
3754 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
3755 1.88.2.6 snj txr = &adapter->tx_rings[i];
3756 1.88.2.6 snj txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
3757 1.88.2.6 snj txdctl |= IXGBE_TXDCTL_ENABLE;
3758 1.88.2.6 snj /* Set WTHRESH to 8, burst writeback */
3759 1.88.2.6 snj txdctl |= (8 << 16);
3760 1.88.2.6 snj /*
3761 1.88.2.6 snj * When the internal queue falls below PTHRESH (32),
3762 1.88.2.6 snj * start prefetching as long as there are at least
3763 1.88.2.6 snj * HTHRESH (1) buffers ready. The values are taken
3764 1.88.2.6 snj * from the Intel linux driver 3.8.21.
3765 1.88.2.6 snj * Prefetching enables tx line rate even with 1 queue.
3766 1.88.2.6 snj */
3767 1.88.2.6 snj txdctl |= (32 << 0) | (1 << 8);
3768 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
3769 1.88.2.6 snj }
3770 1.64 msaitoh
3771 1.88.2.6 snj for (int i = 0, j = 0; i < adapter->num_queues; i++) {
3772 1.88.2.6 snj rxr = &adapter->rx_rings[i];
3773 1.88.2.6 snj rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
3774 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
3775 1.88.2.6 snj /*
3776 1.88.2.6 snj * PTHRESH = 21
3777 1.88.2.6 snj * HTHRESH = 4
3778 1.88.2.6 snj * WTHRESH = 8
3779 1.88.2.6 snj */
3780 1.88.2.6 snj rxdctl &= ~0x3FFFFF;
3781 1.88.2.6 snj rxdctl |= 0x080420;
3782 1.88.2.6 snj }
3783 1.88.2.6 snj rxdctl |= IXGBE_RXDCTL_ENABLE;
3784 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
3785 1.88.2.6 snj for (; j < 10; j++) {
3786 1.88.2.6 snj if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &
3787 1.88.2.6 snj IXGBE_RXDCTL_ENABLE)
3788 1.88.2.6 snj break;
3789 1.88.2.6 snj else
3790 1.88.2.6 snj msec_delay(1);
3791 1.88.2.6 snj }
3792 1.88.2.6 snj wmb();
3793 1.1 dyoung
3794 1.88.2.6 snj /*
3795 1.88.2.6 snj * In netmap mode, we must preserve the buffers made
3796 1.88.2.6 snj * available to userspace before the if_init()
3797 1.88.2.6 snj * (this is true by default on the TX side, because
3798 1.88.2.6 snj * init makes all buffers available to userspace).
3799 1.88.2.6 snj *
3800 1.88.2.6 snj * netmap_reset() and the device specific routines
3801 1.88.2.6 snj * (e.g. ixgbe_setup_receive_rings()) map these
3802 1.88.2.6 snj * buffers at the end of the NIC ring, so here we
3803 1.88.2.6 snj * must set the RDT (tail) register to make sure
3804 1.88.2.6 snj * they are not overwritten.
3805 1.88.2.6 snj *
3806 1.88.2.6 snj * In this driver the NIC ring starts at RDH = 0,
3807 1.88.2.6 snj * RDT points to the last slot available for reception (?),
3808 1.88.2.6 snj * so RDT = num_rx_desc - 1 means the whole ring is available.
3809 1.88.2.6 snj */
3810 1.88.2.6 snj #ifdef DEV_NETMAP
3811 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
3812 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP)) {
3813 1.88.2.6 snj struct netmap_adapter *na = NA(adapter->ifp);
3814 1.88.2.6 snj struct netmap_kring *kring = &na->rx_rings[i];
3815 1.88.2.6 snj int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring);
3816 1.1 dyoung
3817 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t);
3818 1.88.2.6 snj } else
3819 1.88.2.6 snj #endif /* DEV_NETMAP */
3820 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me),
3821 1.88.2.6 snj adapter->num_rx_desc - 1);
3822 1.88.2.6 snj }
3823 1.43 msaitoh
3824 1.88.2.6 snj /* Enable Receive engine */
3825 1.88.2.6 snj rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3826 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3827 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_DMBYPS;
3828 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_RXEN;
3829 1.88.2.6 snj ixgbe_enable_rx_dma(hw, rxctrl);
3830 1.1 dyoung
3831 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
3832 1.43 msaitoh
3833 1.88.2.6 snj /* Set up MSI-X routing */
3834 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
3835 1.88.2.6 snj ixgbe_configure_ivars(adapter);
3836 1.88.2.6 snj /* Set up auto-mask */
3837 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3838 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3839 1.88.2.6 snj else {
3840 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3841 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3842 1.88.2.6 snj }
3843 1.88.2.6 snj } else { /* Simple settings for Legacy/MSI */
3844 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 0);
3845 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 1);
3846 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3847 1.88.2.6 snj }
3848 1.1 dyoung
3849 1.88.2.6 snj ixgbe_init_fdir(adapter);
3850 1.44 msaitoh
3851 1.88.2.6 snj /*
3852 1.88.2.6 snj * Check on any SFP devices that
3853 1.88.2.6 snj * need to be kick-started
3854 1.88.2.6 snj */
3855 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_none) {
3856 1.88.2.6 snj err = hw->phy.ops.identify(hw);
3857 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3858 1.88.2.6 snj device_printf(dev,
3859 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
3860 1.88.2.6 snj return;
3861 1.88.2.6 snj }
3862 1.88.2.6 snj }
3863 1.44 msaitoh
3864 1.88.2.6 snj /* Set moderation on the Link interrupt */
3865 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR);
3866 1.1 dyoung
3867 1.88.2.6 snj /* Config/Enable Link */
3868 1.88.2.6 snj ixgbe_config_link(adapter);
3869 1.1 dyoung
3870 1.88.2.6 snj /* Hardware Packet Buffer & Flow Control setup */
3871 1.88.2.6 snj ixgbe_config_delay_values(adapter);
3872 1.44 msaitoh
3873 1.88.2.6 snj /* Initialize the FC settings */
3874 1.88.2.6 snj ixgbe_start_hw(hw);
3875 1.44 msaitoh
3876 1.88.2.6 snj /* Set up VLAN support and filter */
3877 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
3878 1.44 msaitoh
3879 1.88.2.6 snj /* Setup DMA Coalescing */
3880 1.88.2.6 snj ixgbe_config_dmac(adapter);
3881 1.44 msaitoh
3882 1.88.2.6 snj /* And now turn on interrupts */
3883 1.88.2.6 snj ixgbe_enable_intr(adapter);
3884 1.44 msaitoh
3885 1.88.2.6 snj /* Enable the use of the MBX by the VF's */
3886 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV) {
3887 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3888 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
3889 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3890 1.88.2.6 snj }
3891 1.44 msaitoh
3892 1.88.2.10 martin /* Update saved flags. See ixgbe_ifflags_cb() */
3893 1.88.2.10 martin adapter->if_flags = ifp->if_flags;
3894 1.88.2.10 martin
3895 1.88.2.6 snj /* Now inform the stack we're ready */
3896 1.88.2.6 snj ifp->if_flags |= IFF_RUNNING;
3897 1.44 msaitoh
3898 1.44 msaitoh return;
3899 1.88.2.6 snj } /* ixgbe_init_locked */
3900 1.44 msaitoh
3901 1.88.2.6 snj /************************************************************************
3902 1.88.2.6 snj * ixgbe_init
3903 1.88.2.6 snj ************************************************************************/
3904 1.44 msaitoh static int
3905 1.88.2.6 snj ixgbe_init(struct ifnet *ifp)
3906 1.44 msaitoh {
3907 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
3908 1.44 msaitoh
3909 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3910 1.88.2.6 snj ixgbe_init_locked(adapter);
3911 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3912 1.44 msaitoh
3913 1.88.2.6 snj return 0; /* XXX ixgbe_init_locked cannot fail? really? */
3914 1.88.2.6 snj } /* ixgbe_init */
3915 1.44 msaitoh
3916 1.88.2.6 snj /************************************************************************
3917 1.88.2.6 snj * ixgbe_set_ivar
3918 1.44 msaitoh *
3919 1.88.2.6 snj * Setup the correct IVAR register for a particular MSI-X interrupt
3920 1.88.2.6 snj * (yes this is all very magic and confusing :)
3921 1.88.2.6 snj * - entry is the register array entry
3922 1.88.2.6 snj * - vector is the MSI-X vector for this queue
3923 1.88.2.6 snj * - type is RX/TX/MISC
3924 1.88.2.6 snj ************************************************************************/
3925 1.44 msaitoh static void
3926 1.88.2.6 snj ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type)
3927 1.44 msaitoh {
3928 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
3929 1.88.2.6 snj u32 ivar, index;
3930 1.1 dyoung
3931 1.88.2.6 snj vector |= IXGBE_IVAR_ALLOC_VAL;
3932 1.1 dyoung
3933 1.88.2.6 snj switch (hw->mac.type) {
3934 1.88.2.6 snj
3935 1.88.2.6 snj case ixgbe_mac_82598EB:
3936 1.88.2.6 snj if (type == -1)
3937 1.88.2.6 snj entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
3938 1.88.2.6 snj else
3939 1.88.2.6 snj entry += (type * 64);
3940 1.88.2.6 snj index = (entry >> 2) & 0x1F;
3941 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
3942 1.88.2.6 snj ivar &= ~(0xFF << (8 * (entry & 0x3)));
3943 1.88.2.6 snj ivar |= (vector << (8 * (entry & 0x3)));
3944 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
3945 1.88.2.6 snj break;
3946 1.88.2.6 snj
3947 1.88.2.6 snj case ixgbe_mac_82599EB:
3948 1.88.2.6 snj case ixgbe_mac_X540:
3949 1.88.2.6 snj case ixgbe_mac_X550:
3950 1.88.2.6 snj case ixgbe_mac_X550EM_x:
3951 1.88.2.6 snj case ixgbe_mac_X550EM_a:
3952 1.88.2.6 snj if (type == -1) { /* MISC IVAR */
3953 1.88.2.6 snj index = (entry & 1) * 8;
3954 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
3955 1.88.2.6 snj ivar &= ~(0xFF << index);
3956 1.88.2.6 snj ivar |= (vector << index);
3957 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
3958 1.88.2.6 snj } else { /* RX/TX IVARS */
3959 1.88.2.6 snj index = (16 * (entry & 1)) + (8 * type);
3960 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
3961 1.88.2.6 snj ivar &= ~(0xFF << index);
3962 1.88.2.6 snj ivar |= (vector << index);
3963 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
3964 1.88.2.6 snj }
3965 1.88.2.6 snj
3966 1.88.2.6 snj default:
3967 1.88.2.6 snj break;
3968 1.1 dyoung }
3969 1.88.2.6 snj } /* ixgbe_set_ivar */
3970 1.82 msaitoh
3971 1.88.2.6 snj /************************************************************************
3972 1.88.2.6 snj * ixgbe_configure_ivars
3973 1.88.2.6 snj ************************************************************************/
3974 1.88.2.6 snj static void
3975 1.88.2.6 snj ixgbe_configure_ivars(struct adapter *adapter)
3976 1.88.2.6 snj {
3977 1.88.2.6 snj struct ix_queue *que = adapter->queues;
3978 1.88.2.6 snj u32 newitr;
3979 1.82 msaitoh
3980 1.88.2.6 snj if (ixgbe_max_interrupt_rate > 0)
3981 1.88.2.6 snj newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8;
3982 1.88.2.6 snj else {
3983 1.88.2.6 snj /*
3984 1.88.2.6 snj * Disable DMA coalescing if interrupt moderation is
3985 1.88.2.6 snj * disabled.
3986 1.88.2.6 snj */
3987 1.88.2.6 snj adapter->dmac = 0;
3988 1.88.2.6 snj newitr = 0;
3989 1.82 msaitoh }
3990 1.83 msaitoh
3991 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
3992 1.88.2.6 snj struct rx_ring *rxr = &adapter->rx_rings[i];
3993 1.88.2.6 snj struct tx_ring *txr = &adapter->tx_rings[i];
3994 1.88.2.6 snj /* First the RX queue entry */
3995 1.88.2.6 snj ixgbe_set_ivar(adapter, rxr->me, que->msix, 0);
3996 1.88.2.6 snj /* ... and the TX */
3997 1.88.2.6 snj ixgbe_set_ivar(adapter, txr->me, que->msix, 1);
3998 1.88.2.6 snj /* Set an Initial EITR value */
3999 1.88.2.10 martin ixgbe_eitr_write(que, newitr);
4000 1.83 msaitoh }
4001 1.1 dyoung
4002 1.88.2.6 snj /* For the Link interrupt */
4003 1.88.2.6 snj ixgbe_set_ivar(adapter, 1, adapter->vector, -1);
4004 1.88.2.6 snj } /* ixgbe_configure_ivars */
4005 1.1 dyoung
4006 1.88.2.6 snj /************************************************************************
4007 1.88.2.6 snj * ixgbe_config_gpie
4008 1.88.2.6 snj ************************************************************************/
4009 1.88.2.6 snj static void
4010 1.88.2.6 snj ixgbe_config_gpie(struct adapter *adapter)
4011 1.88.2.6 snj {
4012 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4013 1.88.2.6 snj u32 gpie;
4014 1.1 dyoung
4015 1.88.2.6 snj gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
4016 1.1 dyoung
4017 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
4018 1.88.2.6 snj /* Enable Enhanced MSI-X mode */
4019 1.88.2.6 snj gpie |= IXGBE_GPIE_MSIX_MODE
4020 1.88.2.6 snj | IXGBE_GPIE_EIAME
4021 1.88.2.6 snj | IXGBE_GPIE_PBA_SUPPORT
4022 1.88.2.6 snj | IXGBE_GPIE_OCD;
4023 1.88.2.6 snj }
4024 1.1 dyoung
4025 1.88.2.6 snj /* Fan Failure Interrupt */
4026 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
4027 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN;
4028 1.43 msaitoh
4029 1.88.2.6 snj /* Thermal Sensor Interrupt */
4030 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR)
4031 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
4032 1.43 msaitoh
4033 1.88.2.6 snj /* Link detection */
4034 1.88.2.6 snj switch (hw->mac.type) {
4035 1.88.2.6 snj case ixgbe_mac_82599EB:
4036 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN;
4037 1.88.2.6 snj break;
4038 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4039 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4040 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
4041 1.88.2.6 snj break;
4042 1.88.2.6 snj default:
4043 1.88.2.6 snj break;
4044 1.1 dyoung }
4045 1.1 dyoung
4046 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4047 1.28 msaitoh
4048 1.88.2.6 snj return;
4049 1.88.2.6 snj } /* ixgbe_config_gpie */
4050 1.1 dyoung
4051 1.88.2.6 snj /************************************************************************
4052 1.88.2.6 snj * ixgbe_config_delay_values
4053 1.88.2.6 snj *
4054 1.88.2.6 snj * Requires adapter->max_frame_size to be set.
4055 1.88.2.6 snj ************************************************************************/
4056 1.88.2.6 snj static void
4057 1.88.2.6 snj ixgbe_config_delay_values(struct adapter *adapter)
4058 1.1 dyoung {
4059 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4060 1.88.2.6 snj u32 rxpb, frame, size, tmp;
4061 1.1 dyoung
4062 1.88.2.6 snj frame = adapter->max_frame_size;
4063 1.1 dyoung
4064 1.88.2.6 snj /* Calculate High Water */
4065 1.88.2.6 snj switch (hw->mac.type) {
4066 1.88.2.6 snj case ixgbe_mac_X540:
4067 1.88.2.6 snj case ixgbe_mac_X550:
4068 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4069 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4070 1.88.2.6 snj tmp = IXGBE_DV_X540(frame, frame);
4071 1.88.2.6 snj break;
4072 1.88.2.6 snj default:
4073 1.88.2.6 snj tmp = IXGBE_DV(frame, frame);
4074 1.88.2.6 snj break;
4075 1.88.2.6 snj }
4076 1.88.2.6 snj size = IXGBE_BT2KB(tmp);
4077 1.88.2.6 snj rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10;
4078 1.88.2.6 snj hw->fc.high_water[0] = rxpb - size;
4079 1.1 dyoung
4080 1.88.2.6 snj /* Now calculate Low Water */
4081 1.88.2.6 snj switch (hw->mac.type) {
4082 1.88.2.6 snj case ixgbe_mac_X540:
4083 1.88.2.6 snj case ixgbe_mac_X550:
4084 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4085 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4086 1.88.2.6 snj tmp = IXGBE_LOW_DV_X540(frame);
4087 1.88.2.6 snj break;
4088 1.88.2.6 snj default:
4089 1.88.2.6 snj tmp = IXGBE_LOW_DV(frame);
4090 1.88.2.6 snj break;
4091 1.88.2.6 snj }
4092 1.88.2.6 snj hw->fc.low_water[0] = IXGBE_BT2KB(tmp);
4093 1.1 dyoung
4094 1.88.2.6 snj hw->fc.pause_time = IXGBE_FC_PAUSE;
4095 1.88.2.6 snj hw->fc.send_xon = TRUE;
4096 1.88.2.6 snj } /* ixgbe_config_delay_values */
4097 1.88.2.6 snj
4098 1.88.2.6 snj /************************************************************************
4099 1.88.2.6 snj * ixgbe_set_multi - Multicast Update
4100 1.88.2.6 snj *
4101 1.88.2.6 snj * Called whenever multicast address list is updated.
4102 1.88.2.6 snj ************************************************************************/
4103 1.88.2.6 snj static void
4104 1.88.2.6 snj ixgbe_set_multi(struct adapter *adapter)
4105 1.1 dyoung {
4106 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4107 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4108 1.88.2.6 snj u8 *update_ptr;
4109 1.88.2.6 snj int mcnt = 0;
4110 1.88.2.6 snj u32 fctrl;
4111 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
4112 1.88.2.6 snj struct ether_multi *enm;
4113 1.88.2.6 snj struct ether_multistep step;
4114 1.1 dyoung
4115 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4116 1.88.2.6 snj IOCTL_DEBUGOUT("ixgbe_set_multi: begin");
4117 1.1 dyoung
4118 1.88.2.6 snj mta = adapter->mta;
4119 1.88.2.6 snj bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES);
4120 1.1 dyoung
4121 1.88.2.6 snj ifp->if_flags &= ~IFF_ALLMULTI;
4122 1.88.2.6 snj ETHER_LOCK(ec);
4123 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
4124 1.88.2.6 snj while (enm != NULL) {
4125 1.88.2.6 snj if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) ||
4126 1.88.2.6 snj (memcmp(enm->enm_addrlo, enm->enm_addrhi,
4127 1.88.2.6 snj ETHER_ADDR_LEN) != 0)) {
4128 1.88.2.6 snj ifp->if_flags |= IFF_ALLMULTI;
4129 1.88.2.6 snj break;
4130 1.88.2.6 snj }
4131 1.88.2.6 snj bcopy(enm->enm_addrlo,
4132 1.88.2.6 snj mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
4133 1.88.2.6 snj mta[mcnt].vmdq = adapter->pool;
4134 1.88.2.6 snj mcnt++;
4135 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
4136 1.88.2.6 snj }
4137 1.88.2.6 snj ETHER_UNLOCK(ec);
4138 1.1 dyoung
4139 1.88.2.6 snj fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
4140 1.88.2.6 snj fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4141 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC)
4142 1.88.2.6 snj fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4143 1.88.2.6 snj else if (ifp->if_flags & IFF_ALLMULTI) {
4144 1.88.2.6 snj fctrl |= IXGBE_FCTRL_MPE;
4145 1.88.2.6 snj }
4146 1.1 dyoung
4147 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
4148 1.88.2.6 snj
4149 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) {
4150 1.88.2.6 snj update_ptr = (u8 *)mta;
4151 1.88.2.6 snj ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
4152 1.88.2.6 snj ixgbe_mc_array_itr, TRUE);
4153 1.22 msaitoh }
4154 1.1 dyoung
4155 1.88.2.6 snj return;
4156 1.88.2.6 snj } /* ixgbe_set_multi */
4157 1.88.2.6 snj
4158 1.88.2.6 snj /************************************************************************
4159 1.88.2.6 snj * ixgbe_mc_array_itr
4160 1.88.2.6 snj *
4161 1.88.2.6 snj * An iterator function needed by the multicast shared code.
4162 1.88.2.6 snj * It feeds the shared code routine the addresses in the
4163 1.88.2.6 snj * array of ixgbe_set_multi() one by one.
4164 1.88.2.6 snj ************************************************************************/
4165 1.88.2.6 snj static u8 *
4166 1.88.2.6 snj ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
4167 1.1 dyoung {
4168 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4169 1.1 dyoung
4170 1.88.2.6 snj mta = (struct ixgbe_mc_addr *)*update_ptr;
4171 1.88.2.6 snj *vmdq = mta->vmdq;
4172 1.61 msaitoh
4173 1.88.2.6 snj *update_ptr = (u8*)(mta + 1);
4174 1.1 dyoung
4175 1.88.2.6 snj return (mta->addr);
4176 1.88.2.6 snj } /* ixgbe_mc_array_itr */
4177 1.1 dyoung
4178 1.88.2.6 snj /************************************************************************
4179 1.88.2.6 snj * ixgbe_local_timer - Timer routine
4180 1.88.2.6 snj *
4181 1.88.2.6 snj * Checks for link status, updates statistics,
4182 1.88.2.6 snj * and runs the watchdog check.
4183 1.88.2.6 snj ************************************************************************/
4184 1.88.2.6 snj static void
4185 1.88.2.6 snj ixgbe_local_timer(void *arg)
4186 1.88.2.6 snj {
4187 1.88.2.6 snj struct adapter *adapter = arg;
4188 1.88.2.6 snj
4189 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4190 1.88.2.6 snj ixgbe_local_timer1(adapter);
4191 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4192 1.1 dyoung }
4193 1.1 dyoung
4194 1.44 msaitoh static void
4195 1.88.2.6 snj ixgbe_local_timer1(void *arg)
4196 1.44 msaitoh {
4197 1.88.2.6 snj struct adapter *adapter = arg;
4198 1.88.2.6 snj device_t dev = adapter->dev;
4199 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4200 1.88.2.6 snj u64 queues = 0;
4201 1.88.2.14 martin u64 v0, v1, v2, v3, v4, v5, v6, v7;
4202 1.88.2.6 snj int hung = 0;
4203 1.88.2.14 martin int i;
4204 1.44 msaitoh
4205 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4206 1.44 msaitoh
4207 1.88.2.6 snj /* Check for pluggable optics */
4208 1.88.2.6 snj if (adapter->sfp_probe)
4209 1.88.2.6 snj if (!ixgbe_sfp_probe(adapter))
4210 1.88.2.6 snj goto out; /* Nothing to do */
4211 1.44 msaitoh
4212 1.88.2.6 snj ixgbe_update_link_status(adapter);
4213 1.88.2.6 snj ixgbe_update_stats_counters(adapter);
4214 1.44 msaitoh
4215 1.88.2.14 martin /* Update some event counters */
4216 1.88.2.14 martin v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
4217 1.88.2.14 martin que = adapter->queues;
4218 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4219 1.88.2.14 martin struct tx_ring *txr = que->txr;
4220 1.88.2.14 martin
4221 1.88.2.14 martin v0 += txr->q_efbig_tx_dma_setup;
4222 1.88.2.14 martin v1 += txr->q_mbuf_defrag_failed;
4223 1.88.2.14 martin v2 += txr->q_efbig2_tx_dma_setup;
4224 1.88.2.14 martin v3 += txr->q_einval_tx_dma_setup;
4225 1.88.2.14 martin v4 += txr->q_other_tx_dma_setup;
4226 1.88.2.14 martin v5 += txr->q_eagain_tx_dma_setup;
4227 1.88.2.14 martin v6 += txr->q_enomem_tx_dma_setup;
4228 1.88.2.14 martin v7 += txr->q_tso_err;
4229 1.88.2.14 martin }
4230 1.88.2.14 martin adapter->efbig_tx_dma_setup.ev_count = v0;
4231 1.88.2.14 martin adapter->mbuf_defrag_failed.ev_count = v1;
4232 1.88.2.14 martin adapter->efbig2_tx_dma_setup.ev_count = v2;
4233 1.88.2.14 martin adapter->einval_tx_dma_setup.ev_count = v3;
4234 1.88.2.14 martin adapter->other_tx_dma_setup.ev_count = v4;
4235 1.88.2.14 martin adapter->eagain_tx_dma_setup.ev_count = v5;
4236 1.88.2.14 martin adapter->enomem_tx_dma_setup.ev_count = v6;
4237 1.88.2.14 martin adapter->tso_err.ev_count = v7;
4238 1.88.2.14 martin
4239 1.88.2.6 snj /*
4240 1.88.2.6 snj * Check the TX queues status
4241 1.88.2.6 snj * - mark hung queues so we don't schedule on them
4242 1.88.2.6 snj * - watchdog only if all queues show hung
4243 1.88.2.6 snj */
4244 1.88.2.14 martin que = adapter->queues;
4245 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4246 1.88.2.6 snj /* Keep track of queues with work for soft irq */
4247 1.88.2.6 snj if (que->txr->busy)
4248 1.88.2.6 snj queues |= ((u64)1 << que->me);
4249 1.88.2.6 snj /*
4250 1.88.2.6 snj * Each time txeof runs without cleaning, but there
4251 1.88.2.6 snj * are uncleaned descriptors it increments busy. If
4252 1.88.2.6 snj * we get to the MAX we declare it hung.
4253 1.88.2.6 snj */
4254 1.88.2.6 snj if (que->busy == IXGBE_QUEUE_HUNG) {
4255 1.88.2.6 snj ++hung;
4256 1.88.2.6 snj /* Mark the queue as inactive */
4257 1.88.2.6 snj adapter->active_queues &= ~((u64)1 << que->me);
4258 1.88.2.6 snj continue;
4259 1.88.2.6 snj } else {
4260 1.88.2.6 snj /* Check if we've come back from hung */
4261 1.88.2.6 snj if ((adapter->active_queues & ((u64)1 << que->me)) == 0)
4262 1.88.2.6 snj adapter->active_queues |= ((u64)1 << que->me);
4263 1.88.2.6 snj }
4264 1.88.2.6 snj if (que->busy >= IXGBE_MAX_TX_BUSY) {
4265 1.88.2.6 snj device_printf(dev,
4266 1.88.2.6 snj "Warning queue %d appears to be hung!\n", i);
4267 1.88.2.6 snj que->txr->busy = IXGBE_QUEUE_HUNG;
4268 1.88.2.6 snj ++hung;
4269 1.88.2.6 snj }
4270 1.88.2.6 snj }
4271 1.44 msaitoh
4272 1.88.2.6 snj /* Only truely watchdog if all queues show hung */
4273 1.88.2.6 snj if (hung == adapter->num_queues)
4274 1.88.2.6 snj goto watchdog;
4275 1.88.2.6 snj else if (queues != 0) { /* Force an IRQ on queues with work */
4276 1.88.2.13 martin que = adapter->queues;
4277 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4278 1.88.2.13 martin mutex_enter(&que->im_mtx);
4279 1.88.2.13 martin if (que->im_nest == 0)
4280 1.88.2.13 martin ixgbe_rearm_queues(adapter,
4281 1.88.2.13 martin queues & ((u64)1 << i));
4282 1.88.2.13 martin mutex_exit(&que->im_mtx);
4283 1.88.2.13 martin }
4284 1.88.2.6 snj }
4285 1.44 msaitoh
4286 1.88.2.6 snj out:
4287 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
4288 1.88.2.6 snj return;
4289 1.44 msaitoh
4290 1.88.2.6 snj watchdog:
4291 1.88.2.6 snj device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
4292 1.88.2.6 snj adapter->ifp->if_flags &= ~IFF_RUNNING;
4293 1.88.2.6 snj adapter->watchdog_events.ev_count++;
4294 1.88.2.6 snj ixgbe_init_locked(adapter);
4295 1.88.2.6 snj } /* ixgbe_local_timer */
4296 1.44 msaitoh
4297 1.88.2.6 snj /************************************************************************
4298 1.88.2.6 snj * ixgbe_sfp_probe
4299 1.88.2.6 snj *
4300 1.88.2.6 snj * Determine if a port had optics inserted.
4301 1.88.2.6 snj ************************************************************************/
4302 1.88.2.6 snj static bool
4303 1.88.2.6 snj ixgbe_sfp_probe(struct adapter *adapter)
4304 1.88.2.6 snj {
4305 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4306 1.88.2.6 snj device_t dev = adapter->dev;
4307 1.88.2.6 snj bool result = FALSE;
4308 1.44 msaitoh
4309 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_nl) &&
4310 1.88.2.6 snj (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4311 1.88.2.6 snj s32 ret = hw->phy.ops.identify_sfp(hw);
4312 1.88.2.6 snj if (ret)
4313 1.88.2.6 snj goto out;
4314 1.88.2.6 snj ret = hw->phy.ops.reset(hw);
4315 1.88.2.6 snj adapter->sfp_probe = FALSE;
4316 1.88.2.6 snj if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4317 1.88.2.6 snj device_printf(dev,"Unsupported SFP+ module detected!");
4318 1.88.2.6 snj device_printf(dev,
4319 1.88.2.6 snj "Reload driver with supported module.\n");
4320 1.88.2.6 snj goto out;
4321 1.88.2.6 snj } else
4322 1.88.2.6 snj device_printf(dev, "SFP+ module detected!\n");
4323 1.88.2.6 snj /* We now have supported optics */
4324 1.88.2.6 snj result = TRUE;
4325 1.88.2.6 snj }
4326 1.88.2.6 snj out:
4327 1.48 msaitoh
4328 1.88.2.6 snj return (result);
4329 1.88.2.6 snj } /* ixgbe_sfp_probe */
4330 1.88.2.6 snj
4331 1.88.2.6 snj /************************************************************************
4332 1.88.2.6 snj * ixgbe_handle_mod - Tasklet for SFP module interrupts
4333 1.88.2.6 snj ************************************************************************/
4334 1.88.2.6 snj static void
4335 1.88.2.6 snj ixgbe_handle_mod(void *context)
4336 1.88.2.6 snj {
4337 1.88.2.6 snj struct adapter *adapter = context;
4338 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4339 1.88.2.6 snj device_t dev = adapter->dev;
4340 1.88.2.6 snj u32 err, cage_full = 0;
4341 1.44 msaitoh
4342 1.88.2.6 snj if (adapter->hw.need_crosstalk_fix) {
4343 1.88.2.6 snj switch (hw->mac.type) {
4344 1.88.2.6 snj case ixgbe_mac_82599EB:
4345 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4346 1.88.2.6 snj IXGBE_ESDP_SDP2;
4347 1.88.2.6 snj break;
4348 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4349 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4350 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4351 1.88.2.6 snj IXGBE_ESDP_SDP0;
4352 1.88.2.6 snj break;
4353 1.88.2.6 snj default:
4354 1.88.2.6 snj break;
4355 1.88.2.6 snj }
4356 1.44 msaitoh
4357 1.88.2.6 snj if (!cage_full)
4358 1.44 msaitoh return;
4359 1.88.2.6 snj }
4360 1.44 msaitoh
4361 1.88.2.6 snj err = hw->phy.ops.identify_sfp(hw);
4362 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4363 1.88.2.6 snj device_printf(dev,
4364 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
4365 1.88.2.6 snj return;
4366 1.88.2.6 snj }
4367 1.44 msaitoh
4368 1.88.2.6 snj err = hw->mac.ops.setup_sfp(hw);
4369 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4370 1.88.2.6 snj device_printf(dev,
4371 1.88.2.6 snj "Setup failure - unsupported SFP+ module type.\n");
4372 1.88.2.6 snj return;
4373 1.88.2.6 snj }
4374 1.88.2.6 snj softint_schedule(adapter->msf_si);
4375 1.88.2.6 snj } /* ixgbe_handle_mod */
4376 1.44 msaitoh
4377 1.44 msaitoh
4378 1.88.2.6 snj /************************************************************************
4379 1.88.2.6 snj * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts
4380 1.88.2.6 snj ************************************************************************/
4381 1.88.2.6 snj static void
4382 1.88.2.6 snj ixgbe_handle_msf(void *context)
4383 1.88.2.6 snj {
4384 1.88.2.6 snj struct adapter *adapter = context;
4385 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4386 1.88.2.6 snj u32 autoneg;
4387 1.88.2.6 snj bool negotiate;
4388 1.44 msaitoh
4389 1.88.2.6 snj /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
4390 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(hw);
4391 1.44 msaitoh
4392 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
4393 1.88.2.6 snj if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4394 1.88.2.6 snj hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
4395 1.88.2.6 snj else
4396 1.88.2.6 snj negotiate = 0;
4397 1.88.2.6 snj if (hw->mac.ops.setup_link)
4398 1.88.2.6 snj hw->mac.ops.setup_link(hw, autoneg, TRUE);
4399 1.44 msaitoh
4400 1.88.2.6 snj /* Adjust media types shown in ifconfig */
4401 1.88.2.6 snj ifmedia_removeall(&adapter->media);
4402 1.88.2.6 snj ixgbe_add_media_types(adapter);
4403 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
4404 1.88.2.6 snj } /* ixgbe_handle_msf */
4405 1.44 msaitoh
4406 1.88.2.6 snj /************************************************************************
4407 1.88.2.6 snj * ixgbe_handle_phy - Tasklet for external PHY interrupts
4408 1.88.2.6 snj ************************************************************************/
4409 1.88.2.6 snj static void
4410 1.88.2.6 snj ixgbe_handle_phy(void *context)
4411 1.88.2.6 snj {
4412 1.88.2.6 snj struct adapter *adapter = context;
4413 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4414 1.88.2.6 snj int error;
4415 1.44 msaitoh
4416 1.88.2.6 snj error = hw->phy.ops.handle_lasi(hw);
4417 1.88.2.6 snj if (error == IXGBE_ERR_OVERTEMP)
4418 1.88.2.6 snj device_printf(adapter->dev,
4419 1.88.2.6 snj "CRITICAL: EXTERNAL PHY OVER TEMP!! "
4420 1.88.2.6 snj " PHY will downshift to lower power state!\n");
4421 1.88.2.6 snj else if (error)
4422 1.88.2.6 snj device_printf(adapter->dev,
4423 1.88.2.6 snj "Error handling LASI interrupt: %d\n", error);
4424 1.88.2.6 snj } /* ixgbe_handle_phy */
4425 1.44 msaitoh
4426 1.88.2.6 snj static void
4427 1.88.2.6 snj ixgbe_ifstop(struct ifnet *ifp, int disable)
4428 1.88.2.6 snj {
4429 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
4430 1.44 msaitoh
4431 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4432 1.88.2.6 snj ixgbe_stop(adapter);
4433 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4434 1.44 msaitoh }
4435 1.44 msaitoh
4436 1.88.2.6 snj /************************************************************************
4437 1.88.2.6 snj * ixgbe_stop - Stop the hardware
4438 1.88.2.6 snj *
4439 1.88.2.6 snj * Disables all traffic on the adapter by issuing a
4440 1.88.2.6 snj * global reset on the MAC and deallocates TX/RX buffers.
4441 1.88.2.6 snj ************************************************************************/
4442 1.1 dyoung static void
4443 1.88.2.6 snj ixgbe_stop(void *arg)
4444 1.1 dyoung {
4445 1.88.2.6 snj struct ifnet *ifp;
4446 1.88.2.6 snj struct adapter *adapter = arg;
4447 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4448 1.1 dyoung
4449 1.88.2.6 snj ifp = adapter->ifp;
4450 1.1 dyoung
4451 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4452 1.1 dyoung
4453 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_stop: begin\n");
4454 1.88.2.6 snj ixgbe_disable_intr(adapter);
4455 1.88.2.6 snj callout_stop(&adapter->timer);
4456 1.1 dyoung
4457 1.88.2.6 snj /* Let the stack know...*/
4458 1.88.2.6 snj ifp->if_flags &= ~IFF_RUNNING;
4459 1.1 dyoung
4460 1.88.2.6 snj ixgbe_reset_hw(hw);
4461 1.88.2.6 snj hw->adapter_stopped = FALSE;
4462 1.88.2.6 snj ixgbe_stop_adapter(hw);
4463 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82599EB)
4464 1.88.2.6 snj ixgbe_stop_mac_link_on_d3_82599(hw);
4465 1.88.2.6 snj /* Turn off the laser - noop with no optics */
4466 1.88.2.6 snj ixgbe_disable_tx_laser(hw);
4467 1.22 msaitoh
4468 1.88.2.6 snj /* Update the stack */
4469 1.88.2.6 snj adapter->link_up = FALSE;
4470 1.88.2.6 snj ixgbe_update_link_status(adapter);
4471 1.1 dyoung
4472 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
4473 1.88.2.6 snj ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
4474 1.1 dyoung
4475 1.88.2.6 snj return;
4476 1.88.2.6 snj } /* ixgbe_stop */
4477 1.1 dyoung
4478 1.88.2.6 snj /************************************************************************
4479 1.88.2.6 snj * ixgbe_update_link_status - Update OS on link state
4480 1.88.2.6 snj *
4481 1.88.2.6 snj * Note: Only updates the OS on the cached link state.
4482 1.88.2.6 snj * The real check of the hardware only happens with
4483 1.88.2.6 snj * a link interrupt.
4484 1.88.2.6 snj ************************************************************************/
4485 1.88.2.6 snj static void
4486 1.88.2.6 snj ixgbe_update_link_status(struct adapter *adapter)
4487 1.88.2.6 snj {
4488 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4489 1.88.2.6 snj device_t dev = adapter->dev;
4490 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4491 1.1 dyoung
4492 1.88.2.6 snj if (adapter->link_up) {
4493 1.88.2.6 snj if (adapter->link_active == FALSE) {
4494 1.88.2.6 snj if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL){
4495 1.88.2.6 snj /*
4496 1.88.2.6 snj * Discard count for both MAC Local Fault and
4497 1.88.2.6 snj * Remote Fault because those registers are
4498 1.88.2.6 snj * valid only when the link speed is up and
4499 1.88.2.6 snj * 10Gbps.
4500 1.88.2.6 snj */
4501 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MLFC);
4502 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MRFC);
4503 1.88.2.6 snj }
4504 1.1 dyoung
4505 1.88.2.6 snj if (bootverbose) {
4506 1.88.2.6 snj const char *bpsmsg;
4507 1.1 dyoung
4508 1.88.2.6 snj switch (adapter->link_speed) {
4509 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
4510 1.88.2.6 snj bpsmsg = "10 Gbps";
4511 1.88.2.6 snj break;
4512 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
4513 1.88.2.6 snj bpsmsg = "5 Gbps";
4514 1.88.2.6 snj break;
4515 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
4516 1.88.2.6 snj bpsmsg = "2.5 Gbps";
4517 1.88.2.6 snj break;
4518 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
4519 1.88.2.6 snj bpsmsg = "1 Gbps";
4520 1.88.2.6 snj break;
4521 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
4522 1.88.2.6 snj bpsmsg = "100 Mbps";
4523 1.88.2.6 snj break;
4524 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
4525 1.88.2.6 snj bpsmsg = "10 Mbps";
4526 1.88.2.6 snj break;
4527 1.88.2.6 snj default:
4528 1.88.2.6 snj bpsmsg = "unknown speed";
4529 1.88.2.6 snj break;
4530 1.88.2.6 snj }
4531 1.88.2.6 snj device_printf(dev, "Link is up %s %s \n",
4532 1.88.2.6 snj bpsmsg, "Full Duplex");
4533 1.88.2.6 snj }
4534 1.88.2.6 snj adapter->link_active = TRUE;
4535 1.88.2.6 snj /* Update any Flow Control changes */
4536 1.88.2.6 snj ixgbe_fc_enable(&adapter->hw);
4537 1.88.2.6 snj /* Update DMA coalescing config */
4538 1.88.2.6 snj ixgbe_config_dmac(adapter);
4539 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_UP);
4540 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4541 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4542 1.1 dyoung }
4543 1.88.2.6 snj } else { /* Link down */
4544 1.88.2.6 snj if (adapter->link_active == TRUE) {
4545 1.88.2.6 snj if (bootverbose)
4546 1.88.2.6 snj device_printf(dev, "Link is Down\n");
4547 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_DOWN);
4548 1.88.2.6 snj adapter->link_active = FALSE;
4549 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4550 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4551 1.1 dyoung }
4552 1.88.2.6 snj }
4553 1.1 dyoung
4554 1.88.2.6 snj return;
4555 1.88.2.6 snj } /* ixgbe_update_link_status */
4556 1.88.2.6 snj
4557 1.88.2.6 snj /************************************************************************
4558 1.88.2.6 snj * ixgbe_config_dmac - Configure DMA Coalescing
4559 1.88.2.6 snj ************************************************************************/
4560 1.88.2.6 snj static void
4561 1.88.2.6 snj ixgbe_config_dmac(struct adapter *adapter)
4562 1.88.2.6 snj {
4563 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4564 1.88.2.6 snj struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;
4565 1.88.2.6 snj
4566 1.88.2.6 snj if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)
4567 1.88.2.6 snj return;
4568 1.88.2.6 snj
4569 1.88.2.6 snj if (dcfg->watchdog_timer ^ adapter->dmac ||
4570 1.88.2.6 snj dcfg->link_speed ^ adapter->link_speed) {
4571 1.88.2.6 snj dcfg->watchdog_timer = adapter->dmac;
4572 1.88.2.6 snj dcfg->fcoe_en = false;
4573 1.88.2.6 snj dcfg->link_speed = adapter->link_speed;
4574 1.88.2.6 snj dcfg->num_tcs = 1;
4575 1.88.2.6 snj
4576 1.88.2.6 snj INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n",
4577 1.88.2.6 snj dcfg->watchdog_timer, dcfg->link_speed);
4578 1.88.2.6 snj
4579 1.88.2.6 snj hw->mac.ops.dmac_config(hw);
4580 1.1 dyoung }
4581 1.88.2.6 snj } /* ixgbe_config_dmac */
4582 1.1 dyoung
4583 1.88.2.6 snj /************************************************************************
4584 1.88.2.6 snj * ixgbe_enable_intr
4585 1.88.2.6 snj ************************************************************************/
4586 1.88.2.6 snj static void
4587 1.88.2.6 snj ixgbe_enable_intr(struct adapter *adapter)
4588 1.88.2.6 snj {
4589 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4590 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4591 1.88.2.6 snj u32 mask, fwsm;
4592 1.1 dyoung
4593 1.88.2.6 snj mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
4594 1.1 dyoung
4595 1.88.2.6 snj switch (adapter->hw.mac.type) {
4596 1.88.2.6 snj case ixgbe_mac_82599EB:
4597 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4598 1.88.2.6 snj /* Temperature sensor on some adapters */
4599 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0;
4600 1.88.2.6 snj /* SFP+ (RX_LOS_N & MOD_ABS_N) */
4601 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4602 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP2;
4603 1.88.2.6 snj break;
4604 1.88.2.6 snj case ixgbe_mac_X540:
4605 1.88.2.6 snj /* Detect if Thermal Sensor is enabled */
4606 1.88.2.6 snj fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
4607 1.88.2.6 snj if (fwsm & IXGBE_FWSM_TS_ENABLED)
4608 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4609 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4610 1.88.2.6 snj break;
4611 1.88.2.6 snj case ixgbe_mac_X550:
4612 1.88.2.6 snj /* MAC thermal sensor is automatically enabled */
4613 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4614 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4615 1.88.2.6 snj break;
4616 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4617 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4618 1.88.2.6 snj /* Some devices use SDP0 for important information */
4619 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
4620 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
4621 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||
4622 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)
4623 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);
4624 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_x550em_ext_t)
4625 1.88.2.6 snj mask |= IXGBE_EICR_GPI_SDP0_X540;
4626 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4627 1.88.2.6 snj break;
4628 1.88.2.6 snj default:
4629 1.88.2.6 snj break;
4630 1.88.2.6 snj }
4631 1.1 dyoung
4632 1.88.2.6 snj /* Enable Fan Failure detection */
4633 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
4634 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4635 1.88.2.6 snj /* Enable SR-IOV */
4636 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4637 1.88.2.6 snj mask |= IXGBE_EIMS_MAILBOX;
4638 1.88.2.6 snj /* Enable Flow Director */
4639 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
4640 1.88.2.6 snj mask |= IXGBE_EIMS_FLOW_DIR;
4641 1.1 dyoung
4642 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
4643 1.88.2.6 snj
4644 1.88.2.6 snj /* With MSI-X we use auto clear */
4645 1.88.2.6 snj if (adapter->msix_mem) {
4646 1.88.2.6 snj mask = IXGBE_EIMS_ENABLE_MASK;
4647 1.88.2.6 snj /* Don't autoclear Link */
4648 1.88.2.6 snj mask &= ~IXGBE_EIMS_OTHER;
4649 1.88.2.6 snj mask &= ~IXGBE_EIMS_LSC;
4650 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
4651 1.88.2.6 snj mask &= ~IXGBE_EIMS_MAILBOX;
4652 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
4653 1.88.2.6 snj }
4654 1.88.2.6 snj
4655 1.88.2.6 snj /*
4656 1.88.2.6 snj * Now enable all queues, this is done separately to
4657 1.88.2.6 snj * allow for handling the extended (beyond 32) MSI-X
4658 1.88.2.6 snj * vectors that can be used by 82599
4659 1.88.2.6 snj */
4660 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++)
4661 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
4662 1.88.2.6 snj
4663 1.88.2.6 snj IXGBE_WRITE_FLUSH(hw);
4664 1.1 dyoung
4665 1.88.2.6 snj return;
4666 1.88.2.6 snj } /* ixgbe_enable_intr */
4667 1.88.2.6 snj
4668 1.88.2.6 snj /************************************************************************
4669 1.88.2.6 snj * ixgbe_disable_intr
4670 1.88.2.6 snj ************************************************************************/
4671 1.47 msaitoh static void
4672 1.88.2.6 snj ixgbe_disable_intr(struct adapter *adapter)
4673 1.85 msaitoh {
4674 1.88.2.11 martin struct ix_queue *que = adapter->queues;
4675 1.88.2.11 martin
4676 1.88.2.11 martin /* disable interrupts other than queues */
4677 1.88.2.11 martin IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE);
4678 1.88.2.11 martin
4679 1.88.2.6 snj if (adapter->msix_mem)
4680 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0);
4681 1.88.2.11 martin
4682 1.88.2.11 martin for (int i = 0; i < adapter->num_queues; i++, que++)
4683 1.88.2.11 martin ixgbe_disable_queue(adapter, que->msix);
4684 1.88.2.11 martin
4685 1.88.2.6 snj IXGBE_WRITE_FLUSH(&adapter->hw);
4686 1.85 msaitoh
4687 1.88.2.6 snj return;
4688 1.88.2.6 snj } /* ixgbe_disable_intr */
4689 1.85 msaitoh
4690 1.88.2.6 snj /************************************************************************
4691 1.88.2.6 snj * ixgbe_legacy_irq - Legacy Interrupt Service routine
4692 1.88.2.6 snj ************************************************************************/
4693 1.88.2.6 snj static int
4694 1.88.2.6 snj ixgbe_legacy_irq(void *arg)
4695 1.88.2.6 snj {
4696 1.88.2.6 snj struct ix_queue *que = arg;
4697 1.88.2.6 snj struct adapter *adapter = que->adapter;
4698 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4699 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4700 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
4701 1.88.2.6 snj bool more = false;
4702 1.88.2.6 snj u32 eicr, eicr_mask;
4703 1.88.2.6 snj
4704 1.88.2.6 snj /* Silicon errata #26 on 82598 */
4705 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
4706 1.88.2.6 snj
4707 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
4708 1.88.2.6 snj
4709 1.88.2.6 snj adapter->stats.pf.legint.ev_count++;
4710 1.88.2.6 snj ++que->irqs.ev_count;
4711 1.88.2.6 snj if (eicr == 0) {
4712 1.88.2.6 snj adapter->stats.pf.intzero.ev_count++;
4713 1.88.2.6 snj if ((ifp->if_flags & IFF_UP) != 0)
4714 1.88.2.6 snj ixgbe_enable_intr(adapter);
4715 1.88.2.6 snj return 0;
4716 1.88.2.6 snj }
4717 1.88.2.6 snj
4718 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) != 0) {
4719 1.88.2.6 snj #ifdef __NetBSD__
4720 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
4721 1.88.2.6 snj more = true;
4722 1.88.2.6 snj #else
4723 1.88.2.6 snj more = ixgbe_rxeof(que);
4724 1.88.2.6 snj #endif
4725 1.88.2.6 snj
4726 1.88.2.6 snj IXGBE_TX_LOCK(txr);
4727 1.88.2.6 snj ixgbe_txeof(txr);
4728 1.88.2.6 snj #ifdef notyet
4729 1.88.2.6 snj if (!ixgbe_ring_empty(ifp, txr->br))
4730 1.88.2.6 snj ixgbe_start_locked(ifp, txr);
4731 1.85 msaitoh #endif
4732 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
4733 1.88.2.6 snj }
4734 1.88.2.6 snj
4735 1.88.2.6 snj /* Check for fan failure */
4736 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
4737 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, true);
4738 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4739 1.88.2.6 snj }
4740 1.85 msaitoh
4741 1.88.2.6 snj /* Link status change */
4742 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC)
4743 1.88.2.6 snj softint_schedule(adapter->link_si);
4744 1.88.2.6 snj
4745 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
4746 1.88.2.6 snj /* Pluggable optics-related interrupt */
4747 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
4748 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
4749 1.88.2.6 snj else
4750 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
4751 1.88.2.6 snj
4752 1.88.2.6 snj if (eicr & eicr_mask) {
4753 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
4754 1.88.2.6 snj softint_schedule(adapter->mod_si);
4755 1.85 msaitoh }
4756 1.88.2.6 snj
4757 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
4758 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
4759 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
4760 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4761 1.88.2.6 snj softint_schedule(adapter->msf_si);
4762 1.85 msaitoh }
4763 1.88.2.6 snj }
4764 1.85 msaitoh
4765 1.88.2.6 snj /* External PHY interrupt */
4766 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
4767 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540))
4768 1.88.2.6 snj softint_schedule(adapter->phy_si);
4769 1.88.2.6 snj
4770 1.88.2.13 martin if (more) {
4771 1.88.2.13 martin que->req.ev_count++;
4772 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
4773 1.88.2.13 martin } else
4774 1.88.2.6 snj ixgbe_enable_intr(adapter);
4775 1.88.2.6 snj
4776 1.88.2.6 snj return 1;
4777 1.88.2.6 snj } /* ixgbe_legacy_irq */
4778 1.88.2.6 snj
4779 1.88.2.6 snj /************************************************************************
4780 1.88.2.8 snj * ixgbe_free_pciintr_resources
4781 1.88.2.6 snj ************************************************************************/
4782 1.88.2.6 snj static void
4783 1.88.2.8 snj ixgbe_free_pciintr_resources(struct adapter *adapter)
4784 1.88.2.6 snj {
4785 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4786 1.88.2.6 snj int rid;
4787 1.88.2.6 snj
4788 1.88.2.6 snj /*
4789 1.88.2.6 snj * Release all msix queue resources:
4790 1.88.2.6 snj */
4791 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
4792 1.88.2.8 snj if (que->res != NULL) {
4793 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4794 1.88.2.6 snj adapter->osdep.ihs[i]);
4795 1.88.2.8 snj adapter->osdep.ihs[i] = NULL;
4796 1.88.2.8 snj }
4797 1.85 msaitoh }
4798 1.85 msaitoh
4799 1.88.2.6 snj /* Clean the Legacy or Link interrupt last */
4800 1.88.2.6 snj if (adapter->vector) /* we are doing MSIX */
4801 1.88.2.6 snj rid = adapter->vector;
4802 1.88.2.6 snj else
4803 1.88.2.6 snj rid = 0;
4804 1.85 msaitoh
4805 1.88.2.6 snj if (adapter->osdep.ihs[rid] != NULL) {
4806 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4807 1.88.2.6 snj adapter->osdep.ihs[rid]);
4808 1.88.2.6 snj adapter->osdep.ihs[rid] = NULL;
4809 1.88.2.6 snj }
4810 1.88.2.6 snj
4811 1.88.2.8 snj if (adapter->osdep.intrs != NULL) {
4812 1.88.2.8 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs,
4813 1.88.2.8 snj adapter->osdep.nintrs);
4814 1.88.2.8 snj adapter->osdep.intrs = NULL;
4815 1.88.2.8 snj }
4816 1.88.2.8 snj
4817 1.88.2.8 snj return;
4818 1.88.2.8 snj } /* ixgbe_free_pciintr_resources */
4819 1.88.2.8 snj
4820 1.88.2.8 snj /************************************************************************
4821 1.88.2.8 snj * ixgbe_free_pci_resources
4822 1.88.2.8 snj ************************************************************************/
4823 1.88.2.8 snj static void
4824 1.88.2.8 snj ixgbe_free_pci_resources(struct adapter *adapter)
4825 1.88.2.8 snj {
4826 1.88.2.8 snj
4827 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
4828 1.88.2.6 snj
4829 1.88.2.6 snj if (adapter->osdep.mem_size != 0) {
4830 1.88.2.6 snj bus_space_unmap(adapter->osdep.mem_bus_space_tag,
4831 1.88.2.6 snj adapter->osdep.mem_bus_space_handle,
4832 1.88.2.6 snj adapter->osdep.mem_size);
4833 1.88.2.6 snj }
4834 1.85 msaitoh
4835 1.88.2.6 snj return;
4836 1.88.2.6 snj } /* ixgbe_free_pci_resources */
4837 1.88.2.6 snj
4838 1.88.2.6 snj /************************************************************************
4839 1.88.2.6 snj * ixgbe_set_sysctl_value
4840 1.88.2.6 snj ************************************************************************/
4841 1.85 msaitoh static void
4842 1.47 msaitoh ixgbe_set_sysctl_value(struct adapter *adapter, const char *name,
4843 1.47 msaitoh const char *description, int *limit, int value)
4844 1.47 msaitoh {
4845 1.47 msaitoh device_t dev = adapter->dev;
4846 1.47 msaitoh struct sysctllog **log;
4847 1.47 msaitoh const struct sysctlnode *rnode, *cnode;
4848 1.47 msaitoh
4849 1.47 msaitoh log = &adapter->sysctllog;
4850 1.47 msaitoh if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
4851 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl root\n");
4852 1.47 msaitoh return;
4853 1.47 msaitoh }
4854 1.47 msaitoh if (sysctl_createv(log, 0, &rnode, &cnode,
4855 1.50 msaitoh CTLFLAG_READWRITE, CTLTYPE_INT,
4856 1.47 msaitoh name, SYSCTL_DESCR(description),
4857 1.50 msaitoh NULL, 0, limit, 0, CTL_CREATE, CTL_EOL) != 0)
4858 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl\n");
4859 1.47 msaitoh *limit = value;
4860 1.88.2.6 snj } /* ixgbe_set_sysctl_value */
4861 1.47 msaitoh
4862 1.88.2.6 snj /************************************************************************
4863 1.88.2.6 snj * ixgbe_sysctl_flowcntl
4864 1.88.2.6 snj *
4865 1.88.2.6 snj * SYSCTL wrapper around setting Flow Control
4866 1.88.2.6 snj ************************************************************************/
4867 1.1 dyoung static int
4868 1.52 msaitoh ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS)
4869 1.1 dyoung {
4870 1.44 msaitoh struct sysctlnode node = *rnode;
4871 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
4872 1.88.2.6 snj int error, fc;
4873 1.1 dyoung
4874 1.88.2.6 snj fc = adapter->hw.fc.current_mode;
4875 1.53 msaitoh node.sysctl_data = &fc;
4876 1.1 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
4877 1.1 dyoung if (error != 0 || newp == NULL)
4878 1.1 dyoung return error;
4879 1.1 dyoung
4880 1.1 dyoung /* Don't bother if it's not changed */
4881 1.88.2.6 snj if (fc == adapter->hw.fc.current_mode)
4882 1.1 dyoung return (0);
4883 1.1 dyoung
4884 1.52 msaitoh return ixgbe_set_flowcntl(adapter, fc);
4885 1.88.2.6 snj } /* ixgbe_sysctl_flowcntl */
4886 1.52 msaitoh
4887 1.88.2.6 snj /************************************************************************
4888 1.88.2.6 snj * ixgbe_set_flowcntl - Set flow control
4889 1.88.2.6 snj *
4890 1.88.2.6 snj * Flow control values:
4891 1.88.2.6 snj * 0 - off
4892 1.88.2.6 snj * 1 - rx pause
4893 1.88.2.6 snj * 2 - tx pause
4894 1.88.2.6 snj * 3 - full
4895 1.88.2.6 snj ************************************************************************/
4896 1.52 msaitoh static int
4897 1.52 msaitoh ixgbe_set_flowcntl(struct adapter *adapter, int fc)
4898 1.52 msaitoh {
4899 1.52 msaitoh switch (fc) {
4900 1.1 dyoung case ixgbe_fc_rx_pause:
4901 1.1 dyoung case ixgbe_fc_tx_pause:
4902 1.1 dyoung case ixgbe_fc_full:
4903 1.88.2.6 snj adapter->hw.fc.requested_mode = fc;
4904 1.26 msaitoh if (adapter->num_queues > 1)
4905 1.26 msaitoh ixgbe_disable_rx_drop(adapter);
4906 1.1 dyoung break;
4907 1.1 dyoung case ixgbe_fc_none:
4908 1.1 dyoung adapter->hw.fc.requested_mode = ixgbe_fc_none;
4909 1.26 msaitoh if (adapter->num_queues > 1)
4910 1.26 msaitoh ixgbe_enable_rx_drop(adapter);
4911 1.28 msaitoh break;
4912 1.28 msaitoh default:
4913 1.28 msaitoh return (EINVAL);
4914 1.1 dyoung }
4915 1.88.2.6 snj
4916 1.56 msaitoh #if 0 /* XXX NetBSD */
4917 1.25 msaitoh /* Don't autoneg if forcing a value */
4918 1.25 msaitoh adapter->hw.fc.disable_fc_autoneg = TRUE;
4919 1.56 msaitoh #endif
4920 1.25 msaitoh ixgbe_fc_enable(&adapter->hw);
4921 1.52 msaitoh
4922 1.88.2.6 snj return (0);
4923 1.88.2.6 snj } /* ixgbe_set_flowcntl */
4924 1.52 msaitoh
4925 1.88.2.6 snj /************************************************************************
4926 1.88.2.6 snj * ixgbe_enable_rx_drop
4927 1.88.2.6 snj *
4928 1.88.2.6 snj * Enable the hardware to drop packets when the buffer is
4929 1.88.2.6 snj * full. This is useful with multiqueue, so that no single
4930 1.88.2.6 snj * queue being full stalls the entire RX engine. We only
4931 1.88.2.6 snj * enable this when Multiqueue is enabled AND Flow Control
4932 1.88.2.6 snj * is disabled.
4933 1.88.2.6 snj ************************************************************************/
4934 1.88.2.6 snj static void
4935 1.88.2.6 snj ixgbe_enable_rx_drop(struct adapter *adapter)
4936 1.52 msaitoh {
4937 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4938 1.88.2.6 snj struct rx_ring *rxr;
4939 1.88.2.6 snj u32 srrctl;
4940 1.48 msaitoh
4941 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
4942 1.88.2.6 snj rxr = &adapter->rx_rings[i];
4943 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
4944 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
4945 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
4946 1.43 msaitoh }
4947 1.1 dyoung
4948 1.88.2.6 snj /* enable drop for each vf */
4949 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
4950 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
4951 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) |
4952 1.88.2.6 snj IXGBE_QDE_ENABLE));
4953 1.28 msaitoh }
4954 1.88.2.6 snj } /* ixgbe_enable_rx_drop */
4955 1.1 dyoung
4956 1.88.2.6 snj /************************************************************************
4957 1.88.2.6 snj * ixgbe_disable_rx_drop
4958 1.88.2.6 snj ************************************************************************/
4959 1.88.2.6 snj static void
4960 1.88.2.6 snj ixgbe_disable_rx_drop(struct adapter *adapter)
4961 1.44 msaitoh {
4962 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4963 1.88.2.6 snj struct rx_ring *rxr;
4964 1.88.2.6 snj u32 srrctl;
4965 1.44 msaitoh
4966 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
4967 1.88.2.6 snj rxr = &adapter->rx_rings[i];
4968 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
4969 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
4970 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
4971 1.44 msaitoh }
4972 1.44 msaitoh
4973 1.88.2.6 snj /* disable drop for each vf */
4974 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
4975 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
4976 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT)));
4977 1.44 msaitoh }
4978 1.88.2.6 snj } /* ixgbe_disable_rx_drop */
4979 1.44 msaitoh
4980 1.88.2.6 snj /************************************************************************
4981 1.88.2.6 snj * ixgbe_sysctl_advertise
4982 1.88.2.6 snj *
4983 1.88.2.6 snj * SYSCTL wrapper around setting advertised speed
4984 1.88.2.6 snj ************************************************************************/
4985 1.88.2.6 snj static int
4986 1.88.2.6 snj ixgbe_sysctl_advertise(SYSCTLFN_ARGS)
4987 1.88.2.6 snj {
4988 1.88.2.6 snj struct sysctlnode node = *rnode;
4989 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
4990 1.88.2.6 snj int error = 0, advertise;
4991 1.44 msaitoh
4992 1.88.2.6 snj advertise = adapter->advertise;
4993 1.88.2.6 snj node.sysctl_data = &advertise;
4994 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
4995 1.88.2.6 snj if (error != 0 || newp == NULL)
4996 1.88.2.6 snj return error;
4997 1.44 msaitoh
4998 1.88.2.6 snj return ixgbe_set_advertise(adapter, advertise);
4999 1.88.2.6 snj } /* ixgbe_sysctl_advertise */
5000 1.44 msaitoh
5001 1.88.2.6 snj /************************************************************************
5002 1.88.2.6 snj * ixgbe_set_advertise - Control advertised link speed
5003 1.88.2.6 snj *
5004 1.88.2.6 snj * Flags:
5005 1.88.2.6 snj * 0x00 - Default (all capable link speed)
5006 1.88.2.6 snj * 0x01 - advertise 100 Mb
5007 1.88.2.6 snj * 0x02 - advertise 1G
5008 1.88.2.6 snj * 0x04 - advertise 10G
5009 1.88.2.6 snj * 0x08 - advertise 10 Mb
5010 1.88.2.6 snj * 0x10 - advertise 2.5G
5011 1.88.2.6 snj * 0x20 - advertise 5G
5012 1.88.2.6 snj ************************************************************************/
5013 1.44 msaitoh static int
5014 1.88.2.6 snj ixgbe_set_advertise(struct adapter *adapter, int advertise)
5015 1.44 msaitoh {
5016 1.88.2.6 snj device_t dev;
5017 1.88.2.6 snj struct ixgbe_hw *hw;
5018 1.88.2.6 snj ixgbe_link_speed speed = 0;
5019 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
5020 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
5021 1.88.2.6 snj bool negotiate = FALSE;
5022 1.44 msaitoh
5023 1.88.2.6 snj /* Checks to validate new value */
5024 1.88.2.6 snj if (adapter->advertise == advertise) /* no change */
5025 1.88.2.6 snj return (0);
5026 1.88.2.6 snj
5027 1.88.2.6 snj dev = adapter->dev;
5028 1.88.2.6 snj hw = &adapter->hw;
5029 1.88.2.6 snj
5030 1.88.2.6 snj /* No speed changes for backplane media */
5031 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
5032 1.44 msaitoh return (ENODEV);
5033 1.88.2.6 snj
5034 1.88.2.6 snj if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
5035 1.88.2.6 snj (hw->phy.multispeed_fiber))) {
5036 1.88.2.6 snj device_printf(dev,
5037 1.88.2.6 snj "Advertised speed can only be set on copper or "
5038 1.88.2.6 snj "multispeed fiber media types.\n");
5039 1.88.2.6 snj return (EINVAL);
5040 1.44 msaitoh }
5041 1.44 msaitoh
5042 1.88.2.6 snj if (advertise < 0x0 || advertise > 0x2f) {
5043 1.88.2.6 snj device_printf(dev,
5044 1.88.2.6 snj "Invalid advertised speed; valid modes are 0x0 through 0x7\n");
5045 1.88.2.6 snj return (EINVAL);
5046 1.44 msaitoh }
5047 1.44 msaitoh
5048 1.88.2.6 snj if (hw->mac.ops.get_link_capabilities) {
5049 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
5050 1.88.2.6 snj &negotiate);
5051 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
5052 1.88.2.6 snj device_printf(dev, "Unable to determine supported advertise speeds\n");
5053 1.88.2.6 snj return (ENODEV);
5054 1.88.2.6 snj }
5055 1.88.2.6 snj }
5056 1.44 msaitoh
5057 1.88.2.6 snj /* Set new value and report new advertised mode */
5058 1.88.2.6 snj if (advertise & 0x1) {
5059 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) {
5060 1.88.2.6 snj device_printf(dev, "Interface does not support 100Mb advertised speed\n");
5061 1.88.2.6 snj return (EINVAL);
5062 1.88.2.6 snj }
5063 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
5064 1.88.2.6 snj }
5065 1.88.2.6 snj if (advertise & 0x2) {
5066 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) {
5067 1.88.2.6 snj device_printf(dev, "Interface does not support 1Gb advertised speed\n");
5068 1.88.2.6 snj return (EINVAL);
5069 1.88.2.6 snj }
5070 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
5071 1.88.2.6 snj }
5072 1.88.2.6 snj if (advertise & 0x4) {
5073 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) {
5074 1.88.2.6 snj device_printf(dev, "Interface does not support 10Gb advertised speed\n");
5075 1.88.2.6 snj return (EINVAL);
5076 1.88.2.6 snj }
5077 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
5078 1.88.2.6 snj }
5079 1.88.2.6 snj if (advertise & 0x8) {
5080 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) {
5081 1.88.2.6 snj device_printf(dev, "Interface does not support 10Mb advertised speed\n");
5082 1.88.2.6 snj return (EINVAL);
5083 1.88.2.6 snj }
5084 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
5085 1.88.2.6 snj }
5086 1.88.2.6 snj if (advertise & 0x10) {
5087 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) {
5088 1.88.2.6 snj device_printf(dev, "Interface does not support 2.5Gb advertised speed\n");
5089 1.88.2.6 snj return (EINVAL);
5090 1.88.2.6 snj }
5091 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
5092 1.88.2.6 snj }
5093 1.88.2.6 snj if (advertise & 0x20) {
5094 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) {
5095 1.88.2.6 snj device_printf(dev, "Interface does not support 5Gb advertised speed\n");
5096 1.88.2.6 snj return (EINVAL);
5097 1.88.2.6 snj }
5098 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
5099 1.88.2.6 snj }
5100 1.88.2.6 snj if (advertise == 0)
5101 1.88.2.6 snj speed = link_caps; /* All capable link speed */
5102 1.44 msaitoh
5103 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
5104 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
5105 1.88.2.6 snj adapter->advertise = advertise;
5106 1.44 msaitoh
5107 1.44 msaitoh return (0);
5108 1.88.2.6 snj } /* ixgbe_set_advertise */
5109 1.44 msaitoh
5110 1.88.2.6 snj /************************************************************************
5111 1.88.2.6 snj * ixgbe_get_advertise - Get current advertised speed settings
5112 1.88.2.6 snj *
5113 1.88.2.6 snj * Formatted for sysctl usage.
5114 1.88.2.6 snj * Flags:
5115 1.88.2.6 snj * 0x01 - advertise 100 Mb
5116 1.88.2.6 snj * 0x02 - advertise 1G
5117 1.88.2.6 snj * 0x04 - advertise 10G
5118 1.88.2.6 snj * 0x08 - advertise 10 Mb (yes, Mb)
5119 1.88.2.6 snj * 0x10 - advertise 2.5G
5120 1.88.2.6 snj * 0x20 - advertise 5G
5121 1.88.2.6 snj ************************************************************************/
5122 1.24 msaitoh static int
5123 1.88.2.6 snj ixgbe_get_advertise(struct adapter *adapter)
5124 1.24 msaitoh {
5125 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5126 1.88.2.6 snj int speed;
5127 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
5128 1.88.2.6 snj s32 err;
5129 1.88.2.6 snj bool negotiate = FALSE;
5130 1.24 msaitoh
5131 1.88.2.6 snj /*
5132 1.88.2.6 snj * Advertised speed means nothing unless it's copper or
5133 1.88.2.6 snj * multi-speed fiber
5134 1.88.2.6 snj */
5135 1.88.2.6 snj if (!(hw->phy.media_type == ixgbe_media_type_copper) &&
5136 1.88.2.6 snj !(hw->phy.multispeed_fiber))
5137 1.88.2.6 snj return (0);
5138 1.24 msaitoh
5139 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);
5140 1.88.2.6 snj if (err != IXGBE_SUCCESS)
5141 1.88.2.6 snj return (0);
5142 1.26 msaitoh
5143 1.88.2.6 snj speed =
5144 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x04 : 0) |
5145 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x02 : 0) |
5146 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x01 : 0) |
5147 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x08 : 0) |
5148 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
5149 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0);
5150 1.88.2.6 snj
5151 1.88.2.6 snj return speed;
5152 1.88.2.6 snj } /* ixgbe_get_advertise */
5153 1.88.2.6 snj
5154 1.88.2.6 snj /************************************************************************
5155 1.88.2.6 snj * ixgbe_sysctl_dmac - Manage DMA Coalescing
5156 1.88.2.6 snj *
5157 1.88.2.6 snj * Control values:
5158 1.88.2.6 snj * 0/1 - off / on (use default value of 1000)
5159 1.88.2.6 snj *
5160 1.88.2.6 snj * Legal timer values are:
5161 1.88.2.6 snj * 50,100,250,500,1000,2000,5000,10000
5162 1.88.2.6 snj *
5163 1.88.2.6 snj * Turning off interrupt moderation will also turn this off.
5164 1.88.2.6 snj ************************************************************************/
5165 1.44 msaitoh static int
5166 1.44 msaitoh ixgbe_sysctl_dmac(SYSCTLFN_ARGS)
5167 1.44 msaitoh {
5168 1.44 msaitoh struct sysctlnode node = *rnode;
5169 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5170 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5171 1.88.2.6 snj int error;
5172 1.88.2.6 snj int newval;
5173 1.44 msaitoh
5174 1.88.2.6 snj newval = adapter->dmac;
5175 1.48 msaitoh node.sysctl_data = &newval;
5176 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5177 1.44 msaitoh if ((error) || (newp == NULL))
5178 1.44 msaitoh return (error);
5179 1.44 msaitoh
5180 1.48 msaitoh switch (newval) {
5181 1.44 msaitoh case 0:
5182 1.44 msaitoh /* Disabled */
5183 1.48 msaitoh adapter->dmac = 0;
5184 1.44 msaitoh break;
5185 1.48 msaitoh case 1:
5186 1.48 msaitoh /* Enable and use default */
5187 1.44 msaitoh adapter->dmac = 1000;
5188 1.44 msaitoh break;
5189 1.44 msaitoh case 50:
5190 1.44 msaitoh case 100:
5191 1.44 msaitoh case 250:
5192 1.44 msaitoh case 500:
5193 1.44 msaitoh case 1000:
5194 1.44 msaitoh case 2000:
5195 1.44 msaitoh case 5000:
5196 1.44 msaitoh case 10000:
5197 1.44 msaitoh /* Legal values - allow */
5198 1.48 msaitoh adapter->dmac = newval;
5199 1.44 msaitoh break;
5200 1.44 msaitoh default:
5201 1.44 msaitoh /* Do nothing, illegal value */
5202 1.44 msaitoh return (EINVAL);
5203 1.44 msaitoh }
5204 1.44 msaitoh
5205 1.44 msaitoh /* Re-initialize hardware if it's already running */
5206 1.44 msaitoh if (ifp->if_flags & IFF_RUNNING)
5207 1.44 msaitoh ixgbe_init(ifp);
5208 1.44 msaitoh
5209 1.44 msaitoh return (0);
5210 1.44 msaitoh }
5211 1.44 msaitoh
5212 1.48 msaitoh #ifdef IXGBE_DEBUG
5213 1.88.2.6 snj /************************************************************************
5214 1.88.2.6 snj * ixgbe_sysctl_power_state
5215 1.88.2.6 snj *
5216 1.88.2.6 snj * Sysctl to test power states
5217 1.88.2.6 snj * Values:
5218 1.88.2.6 snj * 0 - set device to D0
5219 1.88.2.6 snj * 3 - set device to D3
5220 1.88.2.6 snj * (none) - get current device power state
5221 1.88.2.6 snj ************************************************************************/
5222 1.48 msaitoh static int
5223 1.48 msaitoh ixgbe_sysctl_power_state(SYSCTLFN_ARGS)
5224 1.48 msaitoh {
5225 1.88.2.6 snj #ifdef notyet
5226 1.48 msaitoh struct sysctlnode node = *rnode;
5227 1.48 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5228 1.88.2.6 snj device_t dev = adapter->dev;
5229 1.88.2.6 snj int curr_ps, new_ps, error = 0;
5230 1.48 msaitoh
5231 1.48 msaitoh curr_ps = new_ps = pci_get_powerstate(dev);
5232 1.48 msaitoh
5233 1.48 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5234 1.48 msaitoh if ((error) || (req->newp == NULL))
5235 1.48 msaitoh return (error);
5236 1.48 msaitoh
5237 1.48 msaitoh if (new_ps == curr_ps)
5238 1.48 msaitoh return (0);
5239 1.48 msaitoh
5240 1.48 msaitoh if (new_ps == 3 && curr_ps == 0)
5241 1.48 msaitoh error = DEVICE_SUSPEND(dev);
5242 1.48 msaitoh else if (new_ps == 0 && curr_ps == 3)
5243 1.48 msaitoh error = DEVICE_RESUME(dev);
5244 1.48 msaitoh else
5245 1.48 msaitoh return (EINVAL);
5246 1.48 msaitoh
5247 1.48 msaitoh device_printf(dev, "New state: %d\n", pci_get_powerstate(dev));
5248 1.48 msaitoh
5249 1.48 msaitoh return (error);
5250 1.48 msaitoh #else
5251 1.48 msaitoh return 0;
5252 1.48 msaitoh #endif
5253 1.88.2.6 snj } /* ixgbe_sysctl_power_state */
5254 1.48 msaitoh #endif
5255 1.88.2.6 snj
5256 1.88.2.6 snj /************************************************************************
5257 1.88.2.6 snj * ixgbe_sysctl_wol_enable
5258 1.88.2.6 snj *
5259 1.88.2.6 snj * Sysctl to enable/disable the WoL capability,
5260 1.88.2.6 snj * if supported by the adapter.
5261 1.88.2.6 snj *
5262 1.88.2.6 snj * Values:
5263 1.88.2.6 snj * 0 - disabled
5264 1.88.2.6 snj * 1 - enabled
5265 1.88.2.6 snj ************************************************************************/
5266 1.44 msaitoh static int
5267 1.44 msaitoh ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS)
5268 1.44 msaitoh {
5269 1.44 msaitoh struct sysctlnode node = *rnode;
5270 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5271 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5272 1.88.2.6 snj bool new_wol_enabled;
5273 1.88.2.6 snj int error = 0;
5274 1.44 msaitoh
5275 1.44 msaitoh new_wol_enabled = hw->wol_enabled;
5276 1.53 msaitoh node.sysctl_data = &new_wol_enabled;
5277 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5278 1.44 msaitoh if ((error) || (newp == NULL))
5279 1.44 msaitoh return (error);
5280 1.44 msaitoh if (new_wol_enabled == hw->wol_enabled)
5281 1.44 msaitoh return (0);
5282 1.44 msaitoh
5283 1.53 msaitoh if (new_wol_enabled && !adapter->wol_support)
5284 1.44 msaitoh return (ENODEV);
5285 1.44 msaitoh else
5286 1.48 msaitoh hw->wol_enabled = new_wol_enabled;
5287 1.44 msaitoh
5288 1.44 msaitoh return (0);
5289 1.88.2.6 snj } /* ixgbe_sysctl_wol_enable */
5290 1.48 msaitoh
5291 1.88.2.6 snj /************************************************************************
5292 1.88.2.6 snj * ixgbe_sysctl_wufc - Wake Up Filter Control
5293 1.44 msaitoh *
5294 1.88.2.6 snj * Sysctl to enable/disable the types of packets that the
5295 1.88.2.6 snj * adapter will wake up on upon receipt.
5296 1.88.2.6 snj * Flags:
5297 1.88.2.6 snj * 0x1 - Link Status Change
5298 1.88.2.6 snj * 0x2 - Magic Packet
5299 1.88.2.6 snj * 0x4 - Direct Exact
5300 1.88.2.6 snj * 0x8 - Directed Multicast
5301 1.88.2.6 snj * 0x10 - Broadcast
5302 1.88.2.6 snj * 0x20 - ARP/IPv4 Request Packet
5303 1.88.2.6 snj * 0x40 - Direct IPv4 Packet
5304 1.88.2.6 snj * 0x80 - Direct IPv6 Packet
5305 1.88.2.6 snj *
5306 1.88.2.6 snj * Settings not listed above will cause the sysctl to return an error.
5307 1.88.2.6 snj ************************************************************************/
5308 1.44 msaitoh static int
5309 1.44 msaitoh ixgbe_sysctl_wufc(SYSCTLFN_ARGS)
5310 1.44 msaitoh {
5311 1.44 msaitoh struct sysctlnode node = *rnode;
5312 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5313 1.44 msaitoh int error = 0;
5314 1.44 msaitoh u32 new_wufc;
5315 1.44 msaitoh
5316 1.44 msaitoh new_wufc = adapter->wufc;
5317 1.53 msaitoh node.sysctl_data = &new_wufc;
5318 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5319 1.44 msaitoh if ((error) || (newp == NULL))
5320 1.44 msaitoh return (error);
5321 1.44 msaitoh if (new_wufc == adapter->wufc)
5322 1.44 msaitoh return (0);
5323 1.44 msaitoh
5324 1.44 msaitoh if (new_wufc & 0xffffff00)
5325 1.44 msaitoh return (EINVAL);
5326 1.88.2.6 snj
5327 1.88.2.6 snj new_wufc &= 0xff;
5328 1.88.2.6 snj new_wufc |= (0xffffff & adapter->wufc);
5329 1.88.2.6 snj adapter->wufc = new_wufc;
5330 1.44 msaitoh
5331 1.44 msaitoh return (0);
5332 1.88.2.6 snj } /* ixgbe_sysctl_wufc */
5333 1.44 msaitoh
5334 1.48 msaitoh #ifdef IXGBE_DEBUG
5335 1.88.2.6 snj /************************************************************************
5336 1.88.2.6 snj * ixgbe_sysctl_print_rss_config
5337 1.88.2.6 snj ************************************************************************/
5338 1.48 msaitoh static int
5339 1.48 msaitoh ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS)
5340 1.48 msaitoh {
5341 1.88.2.6 snj #ifdef notyet
5342 1.88.2.6 snj struct sysctlnode node = *rnode;
5343 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5344 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5345 1.88.2.6 snj device_t dev = adapter->dev;
5346 1.88.2.6 snj struct sbuf *buf;
5347 1.88.2.6 snj int error = 0, reta_size;
5348 1.88.2.6 snj u32 reg;
5349 1.48 msaitoh
5350 1.48 msaitoh buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
5351 1.48 msaitoh if (!buf) {
5352 1.48 msaitoh device_printf(dev, "Could not allocate sbuf for output.\n");
5353 1.48 msaitoh return (ENOMEM);
5354 1.48 msaitoh }
5355 1.48 msaitoh
5356 1.48 msaitoh // TODO: use sbufs to make a string to print out
5357 1.48 msaitoh /* Set multiplier for RETA setup and table size based on MAC */
5358 1.48 msaitoh switch (adapter->hw.mac.type) {
5359 1.48 msaitoh case ixgbe_mac_X550:
5360 1.48 msaitoh case ixgbe_mac_X550EM_x:
5361 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5362 1.48 msaitoh reta_size = 128;
5363 1.48 msaitoh break;
5364 1.48 msaitoh default:
5365 1.48 msaitoh reta_size = 32;
5366 1.48 msaitoh break;
5367 1.48 msaitoh }
5368 1.48 msaitoh
5369 1.48 msaitoh /* Print out the redirection table */
5370 1.48 msaitoh sbuf_cat(buf, "\n");
5371 1.48 msaitoh for (int i = 0; i < reta_size; i++) {
5372 1.48 msaitoh if (i < 32) {
5373 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));
5374 1.48 msaitoh sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg);
5375 1.48 msaitoh } else {
5376 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));
5377 1.48 msaitoh sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg);
5378 1.48 msaitoh }
5379 1.48 msaitoh }
5380 1.48 msaitoh
5381 1.48 msaitoh // TODO: print more config
5382 1.48 msaitoh
5383 1.88.2.6 snj error = sbuf_finish(buf);
5384 1.88.2.6 snj if (error)
5385 1.88.2.6 snj device_printf(dev, "Error finishing sbuf: %d\n", error);
5386 1.88.2.6 snj
5387 1.88.2.6 snj sbuf_delete(buf);
5388 1.88.2.6 snj #endif
5389 1.88.2.6 snj return (0);
5390 1.88.2.6 snj } /* ixgbe_sysctl_print_rss_config */
5391 1.88.2.6 snj #endif /* IXGBE_DEBUG */
5392 1.88.2.6 snj
5393 1.88.2.6 snj /************************************************************************
5394 1.88.2.6 snj * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY
5395 1.88.2.6 snj *
5396 1.88.2.6 snj * For X552/X557-AT devices using an external PHY
5397 1.88.2.6 snj ************************************************************************/
5398 1.88.2.6 snj static int
5399 1.88.2.6 snj ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS)
5400 1.88.2.6 snj {
5401 1.88.2.6 snj struct sysctlnode node = *rnode;
5402 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5403 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5404 1.88.2.6 snj int val;
5405 1.88.2.6 snj u16 reg;
5406 1.88.2.6 snj int error;
5407 1.88.2.6 snj
5408 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5409 1.88.2.6 snj device_printf(adapter->dev,
5410 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5411 1.88.2.6 snj return (ENODEV);
5412 1.88.2.6 snj }
5413 1.88.2.6 snj
5414 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,
5415 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5416 1.88.2.6 snj device_printf(adapter->dev,
5417 1.88.2.6 snj "Error reading from PHY's current temperature register\n");
5418 1.88.2.6 snj return (EAGAIN);
5419 1.88.2.6 snj }
5420 1.88.2.6 snj
5421 1.88.2.6 snj node.sysctl_data = &val;
5422 1.88.2.6 snj
5423 1.88.2.6 snj /* Shift temp for output */
5424 1.88.2.6 snj val = reg >> 8;
5425 1.88.2.6 snj
5426 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5427 1.88.2.6 snj if ((error) || (newp == NULL))
5428 1.88.2.6 snj return (error);
5429 1.88.2.6 snj
5430 1.88.2.6 snj return (0);
5431 1.88.2.6 snj } /* ixgbe_sysctl_phy_temp */
5432 1.88.2.6 snj
5433 1.88.2.6 snj /************************************************************************
5434 1.88.2.6 snj * ixgbe_sysctl_phy_overtemp_occurred
5435 1.88.2.6 snj *
5436 1.88.2.6 snj * Reports (directly from the PHY) whether the current PHY
5437 1.88.2.6 snj * temperature is over the overtemp threshold.
5438 1.88.2.6 snj ************************************************************************/
5439 1.88.2.6 snj static int
5440 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS)
5441 1.88.2.6 snj {
5442 1.88.2.6 snj struct sysctlnode node = *rnode;
5443 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5444 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5445 1.88.2.6 snj int val, error;
5446 1.88.2.6 snj u16 reg;
5447 1.88.2.6 snj
5448 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5449 1.88.2.6 snj device_printf(adapter->dev,
5450 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5451 1.88.2.6 snj return (ENODEV);
5452 1.88.2.6 snj }
5453 1.88.2.6 snj
5454 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,
5455 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5456 1.88.2.6 snj device_printf(adapter->dev,
5457 1.88.2.6 snj "Error reading from PHY's temperature status register\n");
5458 1.88.2.6 snj return (EAGAIN);
5459 1.88.2.6 snj }
5460 1.88.2.6 snj
5461 1.88.2.6 snj node.sysctl_data = &val;
5462 1.88.2.6 snj
5463 1.88.2.6 snj /* Get occurrence bit */
5464 1.88.2.6 snj val = !!(reg & 0x4000);
5465 1.88.2.6 snj
5466 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5467 1.88.2.6 snj if ((error) || (newp == NULL))
5468 1.88.2.6 snj return (error);
5469 1.48 msaitoh
5470 1.48 msaitoh return (0);
5471 1.88.2.6 snj } /* ixgbe_sysctl_phy_overtemp_occurred */
5472 1.48 msaitoh
5473 1.88.2.6 snj /************************************************************************
5474 1.88.2.6 snj * ixgbe_sysctl_eee_state
5475 1.88.2.6 snj *
5476 1.88.2.6 snj * Sysctl to set EEE power saving feature
5477 1.88.2.6 snj * Values:
5478 1.88.2.6 snj * 0 - disable EEE
5479 1.88.2.6 snj * 1 - enable EEE
5480 1.88.2.6 snj * (none) - get current device EEE state
5481 1.88.2.6 snj ************************************************************************/
5482 1.88.2.6 snj static int
5483 1.88.2.6 snj ixgbe_sysctl_eee_state(SYSCTLFN_ARGS)
5484 1.26 msaitoh {
5485 1.88.2.6 snj struct sysctlnode node = *rnode;
5486 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5487 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5488 1.88.2.6 snj device_t dev = adapter->dev;
5489 1.88.2.6 snj int curr_eee, new_eee, error = 0;
5490 1.88.2.6 snj s32 retval;
5491 1.26 msaitoh
5492 1.88.2.6 snj curr_eee = new_eee = !!(adapter->feat_en & IXGBE_FEATURE_EEE);
5493 1.88.2.6 snj node.sysctl_data = &new_eee;
5494 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5495 1.88.2.6 snj if ((error) || (newp == NULL))
5496 1.88.2.6 snj return (error);
5497 1.26 msaitoh
5498 1.88.2.6 snj /* Nothing to do */
5499 1.88.2.6 snj if (new_eee == curr_eee)
5500 1.88.2.6 snj return (0);
5501 1.26 msaitoh
5502 1.88.2.6 snj /* Not supported */
5503 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_EEE))
5504 1.88.2.6 snj return (EINVAL);
5505 1.88.2.6 snj
5506 1.88.2.6 snj /* Bounds checking */
5507 1.88.2.6 snj if ((new_eee < 0) || (new_eee > 1))
5508 1.88.2.6 snj return (EINVAL);
5509 1.88.2.6 snj
5510 1.88.2.6 snj retval = adapter->hw.mac.ops.setup_eee(&adapter->hw, new_eee);
5511 1.88.2.6 snj if (retval) {
5512 1.88.2.6 snj device_printf(dev, "Error in EEE setup: 0x%08X\n", retval);
5513 1.88.2.6 snj return (EINVAL);
5514 1.45 msaitoh }
5515 1.45 msaitoh
5516 1.88.2.6 snj /* Restart auto-neg */
5517 1.88.2.6 snj ixgbe_init(ifp);
5518 1.63 msaitoh
5519 1.88.2.6 snj device_printf(dev, "New EEE state: %d\n", new_eee);
5520 1.88.2.6 snj
5521 1.88.2.6 snj /* Cache new value */
5522 1.88.2.6 snj if (new_eee)
5523 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5524 1.88.2.6 snj else
5525 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_EEE;
5526 1.88.2.6 snj
5527 1.88.2.6 snj return (error);
5528 1.88.2.6 snj } /* ixgbe_sysctl_eee_state */
5529 1.88.2.6 snj
5530 1.88.2.6 snj /************************************************************************
5531 1.88.2.6 snj * ixgbe_init_device_features
5532 1.88.2.6 snj ************************************************************************/
5533 1.88.2.6 snj static void
5534 1.88.2.6 snj ixgbe_init_device_features(struct adapter *adapter)
5535 1.88.2.6 snj {
5536 1.88.2.6 snj adapter->feat_cap = IXGBE_FEATURE_NETMAP
5537 1.88.2.6 snj | IXGBE_FEATURE_RSS
5538 1.88.2.6 snj | IXGBE_FEATURE_MSI
5539 1.88.2.6 snj | IXGBE_FEATURE_MSIX
5540 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_IRQ
5541 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_TX;
5542 1.88.2.6 snj
5543 1.88.2.6 snj /* Set capabilities first... */
5544 1.63 msaitoh switch (adapter->hw.mac.type) {
5545 1.63 msaitoh case ixgbe_mac_82598EB:
5546 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82598AT)
5547 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FAN_FAIL;
5548 1.63 msaitoh break;
5549 1.63 msaitoh case ixgbe_mac_X540:
5550 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5551 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5552 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&
5553 1.88.2.6 snj (adapter->hw.bus.func == 0))
5554 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5555 1.88.2.6 snj break;
5556 1.63 msaitoh case ixgbe_mac_X550:
5557 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5558 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5559 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5560 1.88.2.6 snj break;
5561 1.63 msaitoh case ixgbe_mac_X550EM_x:
5562 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5563 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5564 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)
5565 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5566 1.88.2.6 snj break;
5567 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5568 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5569 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5570 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5571 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||
5572 1.88.2.6 snj (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {
5573 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5574 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5575 1.88.2.6 snj }
5576 1.88.2.6 snj break;
5577 1.88.2.6 snj case ixgbe_mac_82599EB:
5578 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5579 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5580 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&
5581 1.88.2.6 snj (adapter->hw.bus.func == 0))
5582 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5583 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)
5584 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5585 1.63 msaitoh break;
5586 1.63 msaitoh default:
5587 1.63 msaitoh break;
5588 1.63 msaitoh }
5589 1.45 msaitoh
5590 1.88.2.6 snj /* Enabled by default... */
5591 1.88.2.6 snj /* Fan failure detection */
5592 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FAN_FAIL)
5593 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FAN_FAIL;
5594 1.88.2.6 snj /* Netmap */
5595 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_NETMAP)
5596 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_NETMAP;
5597 1.88.2.6 snj /* EEE */
5598 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE)
5599 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5600 1.88.2.6 snj /* Thermal Sensor */
5601 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
5602 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
5603 1.88.2.6 snj
5604 1.88.2.6 snj /* Enabled via global sysctl... */
5605 1.88.2.6 snj /* Flow Director */
5606 1.88.2.6 snj if (ixgbe_enable_fdir) {
5607 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FDIR)
5608 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FDIR;
5609 1.88.2.6 snj else
5610 1.88.2.6 snj device_printf(adapter->dev, "Device does not support Flow Director. Leaving disabled.");
5611 1.88.2.6 snj }
5612 1.88.2.6 snj /* Legacy (single queue) transmit */
5613 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_LEGACY_TX) &&
5614 1.88.2.6 snj ixgbe_enable_legacy_tx)
5615 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_TX;
5616 1.88.2.6 snj /*
5617 1.88.2.6 snj * Message Signal Interrupts - Extended (MSI-X)
5618 1.88.2.6 snj * Normal MSI is only enabled if MSI-X calls fail.
5619 1.88.2.6 snj */
5620 1.88.2.6 snj if (!ixgbe_enable_msix)
5621 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_MSIX;
5622 1.88.2.6 snj /* Receive-Side Scaling (RSS) */
5623 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss)
5624 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_RSS;
5625 1.88.2.6 snj
5626 1.88.2.6 snj /* Disable features with unmet dependencies... */
5627 1.88.2.6 snj /* No MSI-X */
5628 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX)) {
5629 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
5630 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
5631 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
5632 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
5633 1.88.2.6 snj }
5634 1.88.2.6 snj } /* ixgbe_init_device_features */
5635 1.45 msaitoh
5636 1.88.2.6 snj /************************************************************************
5637 1.88.2.6 snj * ixgbe_probe - Device identification routine
5638 1.88.2.6 snj *
5639 1.88.2.6 snj * Determines if the driver should be loaded on
5640 1.88.2.6 snj * adapter based on its PCI vendor/device ID.
5641 1.88.2.6 snj *
5642 1.88.2.6 snj * return BUS_PROBE_DEFAULT on success, positive on failure
5643 1.88.2.6 snj ************************************************************************/
5644 1.88.2.6 snj static int
5645 1.88.2.6 snj ixgbe_probe(device_t dev, cfdata_t cf, void *aux)
5646 1.45 msaitoh {
5647 1.88.2.6 snj const struct pci_attach_args *pa = aux;
5648 1.45 msaitoh
5649 1.88.2.6 snj return (ixgbe_lookup(pa) != NULL) ? 1 : 0;
5650 1.45 msaitoh }
5651 1.45 msaitoh
5652 1.88.2.6 snj static ixgbe_vendor_info_t *
5653 1.88.2.6 snj ixgbe_lookup(const struct pci_attach_args *pa)
5654 1.45 msaitoh {
5655 1.88.2.6 snj ixgbe_vendor_info_t *ent;
5656 1.88.2.6 snj pcireg_t subid;
5657 1.45 msaitoh
5658 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_lookup: begin");
5659 1.45 msaitoh
5660 1.88.2.6 snj if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID)
5661 1.88.2.6 snj return NULL;
5662 1.45 msaitoh
5663 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
5664 1.45 msaitoh
5665 1.88.2.6 snj for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) {
5666 1.88.2.6 snj if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) &&
5667 1.88.2.6 snj (PCI_PRODUCT(pa->pa_id) == ent->device_id) &&
5668 1.88.2.6 snj ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) ||
5669 1.88.2.6 snj (ent->subvendor_id == 0)) &&
5670 1.88.2.6 snj ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) ||
5671 1.88.2.6 snj (ent->subdevice_id == 0))) {
5672 1.88.2.6 snj ++ixgbe_total_ports;
5673 1.88.2.6 snj return ent;
5674 1.88.2.6 snj }
5675 1.88.2.6 snj }
5676 1.88.2.6 snj return NULL;
5677 1.88.2.6 snj }
5678 1.45 msaitoh
5679 1.88.2.6 snj static int
5680 1.88.2.6 snj ixgbe_ifflags_cb(struct ethercom *ec)
5681 1.88.2.6 snj {
5682 1.88.2.6 snj struct ifnet *ifp = &ec->ec_if;
5683 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
5684 1.88.2.6 snj int change = ifp->if_flags ^ adapter->if_flags, rc = 0;
5685 1.45 msaitoh
5686 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5687 1.45 msaitoh
5688 1.88.2.6 snj if (change != 0)
5689 1.88.2.6 snj adapter->if_flags = ifp->if_flags;
5690 1.45 msaitoh
5691 1.88.2.6 snj if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0)
5692 1.88.2.6 snj rc = ENETRESET;
5693 1.88.2.6 snj else if ((change & (IFF_PROMISC | IFF_ALLMULTI)) != 0)
5694 1.88.2.6 snj ixgbe_set_promisc(adapter);
5695 1.45 msaitoh
5696 1.88.2.6 snj /* Set up VLAN support and filter */
5697 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
5698 1.45 msaitoh
5699 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5700 1.45 msaitoh
5701 1.88.2.6 snj return rc;
5702 1.88.2.6 snj }
5703 1.45 msaitoh
5704 1.88.2.6 snj /************************************************************************
5705 1.88.2.6 snj * ixgbe_ioctl - Ioctl entry point
5706 1.88.2.6 snj *
5707 1.88.2.6 snj * Called when the user wants to configure the interface.
5708 1.88.2.6 snj *
5709 1.88.2.6 snj * return 0 on success, positive on failure
5710 1.88.2.6 snj ************************************************************************/
5711 1.88.2.6 snj static int
5712 1.88.2.6 snj ixgbe_ioctl(struct ifnet * ifp, u_long command, void *data)
5713 1.88.2.6 snj {
5714 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
5715 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5716 1.88.2.6 snj struct ifcapreq *ifcr = data;
5717 1.88.2.6 snj struct ifreq *ifr = data;
5718 1.88.2.6 snj int error = 0;
5719 1.88.2.6 snj int l4csum_en;
5720 1.88.2.6 snj const int l4csum = IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx|
5721 1.88.2.6 snj IFCAP_CSUM_TCPv6_Rx|IFCAP_CSUM_UDPv6_Rx;
5722 1.45 msaitoh
5723 1.88.2.6 snj switch (command) {
5724 1.88.2.6 snj case SIOCSIFFLAGS:
5725 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)");
5726 1.88.2.6 snj break;
5727 1.88.2.6 snj case SIOCADDMULTI:
5728 1.88.2.6 snj case SIOCDELMULTI:
5729 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI");
5730 1.88.2.6 snj break;
5731 1.88.2.6 snj case SIOCSIFMEDIA:
5732 1.88.2.6 snj case SIOCGIFMEDIA:
5733 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)");
5734 1.88.2.6 snj break;
5735 1.88.2.6 snj case SIOCSIFCAP:
5736 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)");
5737 1.88.2.6 snj break;
5738 1.88.2.6 snj case SIOCSIFMTU:
5739 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
5740 1.88.2.6 snj break;
5741 1.88.2.6 snj #ifdef __NetBSD__
5742 1.88.2.6 snj case SIOCINITIFADDR:
5743 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR");
5744 1.88.2.6 snj break;
5745 1.88.2.6 snj case SIOCGIFFLAGS:
5746 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS");
5747 1.88.2.6 snj break;
5748 1.88.2.6 snj case SIOCGIFAFLAG_IN:
5749 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN");
5750 1.88.2.6 snj break;
5751 1.88.2.6 snj case SIOCGIFADDR:
5752 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR");
5753 1.88.2.6 snj break;
5754 1.88.2.6 snj case SIOCGIFMTU:
5755 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)");
5756 1.88.2.6 snj break;
5757 1.88.2.6 snj case SIOCGIFCAP:
5758 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)");
5759 1.88.2.6 snj break;
5760 1.88.2.6 snj case SIOCGETHERCAP:
5761 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)");
5762 1.88.2.6 snj break;
5763 1.88.2.6 snj case SIOCGLIFADDR:
5764 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)");
5765 1.88.2.6 snj break;
5766 1.88.2.6 snj case SIOCZIFDATA:
5767 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)");
5768 1.88.2.6 snj hw->mac.ops.clear_hw_cntrs(hw);
5769 1.88.2.6 snj ixgbe_clear_evcnt(adapter);
5770 1.45 msaitoh break;
5771 1.88.2.6 snj case SIOCAIFADDR:
5772 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)");
5773 1.88.2.6 snj break;
5774 1.88.2.6 snj #endif
5775 1.45 msaitoh default:
5776 1.88.2.6 snj IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command);
5777 1.88.2.6 snj break;
5778 1.88.2.6 snj }
5779 1.45 msaitoh
5780 1.88.2.6 snj switch (command) {
5781 1.88.2.6 snj case SIOCSIFMEDIA:
5782 1.88.2.6 snj case SIOCGIFMEDIA:
5783 1.88.2.6 snj return ifmedia_ioctl(ifp, ifr, &adapter->media, command);
5784 1.88.2.6 snj case SIOCGI2C:
5785 1.88.2.6 snj {
5786 1.88.2.6 snj struct ixgbe_i2c_req i2c;
5787 1.45 msaitoh
5788 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)");
5789 1.88.2.6 snj error = copyin(ifr->ifr_data, &i2c, sizeof(i2c));
5790 1.88.2.6 snj if (error != 0)
5791 1.88.2.6 snj break;
5792 1.88.2.6 snj if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) {
5793 1.88.2.6 snj error = EINVAL;
5794 1.88.2.6 snj break;
5795 1.88.2.6 snj }
5796 1.88.2.6 snj if (i2c.len > sizeof(i2c.data)) {
5797 1.88.2.6 snj error = EINVAL;
5798 1.88.2.6 snj break;
5799 1.88.2.6 snj }
5800 1.88.2.6 snj
5801 1.88.2.6 snj hw->phy.ops.read_i2c_byte(hw, i2c.offset,
5802 1.88.2.6 snj i2c.dev_addr, i2c.data);
5803 1.88.2.6 snj error = copyout(&i2c, ifr->ifr_data, sizeof(i2c));
5804 1.88.2.6 snj break;
5805 1.88.2.6 snj }
5806 1.88.2.6 snj case SIOCSIFCAP:
5807 1.88.2.6 snj /* Layer-4 Rx checksum offload has to be turned on and
5808 1.88.2.6 snj * off as a unit.
5809 1.88.2.6 snj */
5810 1.88.2.6 snj l4csum_en = ifcr->ifcr_capenable & l4csum;
5811 1.88.2.6 snj if (l4csum_en != l4csum && l4csum_en != 0)
5812 1.88.2.6 snj return EINVAL;
5813 1.88.2.6 snj /*FALLTHROUGH*/
5814 1.88.2.6 snj case SIOCADDMULTI:
5815 1.88.2.6 snj case SIOCDELMULTI:
5816 1.88.2.6 snj case SIOCSIFFLAGS:
5817 1.88.2.6 snj case SIOCSIFMTU:
5818 1.88.2.6 snj default:
5819 1.88.2.6 snj if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
5820 1.88.2.6 snj return error;
5821 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
5822 1.88.2.6 snj ;
5823 1.88.2.6 snj else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
5824 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5825 1.88.2.6 snj ixgbe_init_locked(adapter);
5826 1.88.2.6 snj ixgbe_recalculate_max_frame(adapter);
5827 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5828 1.88.2.6 snj } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
5829 1.88.2.6 snj /*
5830 1.88.2.6 snj * Multicast list has changed; set the hardware filter
5831 1.88.2.6 snj * accordingly.
5832 1.88.2.6 snj */
5833 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5834 1.88.2.6 snj ixgbe_disable_intr(adapter);
5835 1.88.2.6 snj ixgbe_set_multi(adapter);
5836 1.88.2.6 snj ixgbe_enable_intr(adapter);
5837 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5838 1.88.2.6 snj }
5839 1.88.2.6 snj return 0;
5840 1.45 msaitoh }
5841 1.45 msaitoh
5842 1.88.2.6 snj return error;
5843 1.88.2.6 snj } /* ixgbe_ioctl */
5844 1.45 msaitoh
5845 1.88.2.6 snj /************************************************************************
5846 1.88.2.6 snj * ixgbe_check_fan_failure
5847 1.88.2.6 snj ************************************************************************/
5848 1.45 msaitoh static void
5849 1.88.2.6 snj ixgbe_check_fan_failure(struct adapter *adapter, u32 reg, bool in_interrupt)
5850 1.45 msaitoh {
5851 1.88.2.6 snj u32 mask;
5852 1.45 msaitoh
5853 1.88.2.6 snj mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&adapter->hw) :
5854 1.88.2.6 snj IXGBE_ESDP_SDP1;
5855 1.45 msaitoh
5856 1.88.2.6 snj if (reg & mask)
5857 1.88.2.6 snj device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
5858 1.88.2.6 snj } /* ixgbe_check_fan_failure */
5859 1.88.2.6 snj
5860 1.88.2.6 snj /************************************************************************
5861 1.88.2.6 snj * ixgbe_handle_que
5862 1.88.2.6 snj ************************************************************************/
5863 1.45 msaitoh static void
5864 1.88.2.6 snj ixgbe_handle_que(void *context)
5865 1.45 msaitoh {
5866 1.88.2.6 snj struct ix_queue *que = context;
5867 1.88.2.6 snj struct adapter *adapter = que->adapter;
5868 1.88.2.6 snj struct tx_ring *txr = que->txr;
5869 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5870 1.88.2.10 martin bool more = false;
5871 1.45 msaitoh
5872 1.88.2.13 martin que->handleq.ev_count++;
5873 1.45 msaitoh
5874 1.88.2.6 snj if (ifp->if_flags & IFF_RUNNING) {
5875 1.88.2.10 martin more = ixgbe_rxeof(que);
5876 1.88.2.6 snj IXGBE_TX_LOCK(txr);
5877 1.88.2.10 martin more |= ixgbe_txeof(txr);
5878 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
5879 1.88.2.6 snj if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
5880 1.88.2.6 snj ixgbe_mq_start_locked(ifp, txr);
5881 1.88.2.6 snj /* Only for queue 0 */
5882 1.88.2.6 snj /* NetBSD still needs this for CBQ */
5883 1.88.2.6 snj if ((&adapter->queues[0] == que)
5884 1.88.2.6 snj && (!ixgbe_legacy_ring_empty(ifp, NULL)))
5885 1.88.2.6 snj ixgbe_legacy_start_locked(ifp, txr);
5886 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
5887 1.45 msaitoh }
5888 1.45 msaitoh
5889 1.88.2.12 martin if (more) {
5890 1.88.2.13 martin que->req.ev_count++;
5891 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
5892 1.88.2.12 martin } else if (que->res != NULL) {
5893 1.88.2.10 martin /* Re-enable this interrupt */
5894 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
5895 1.88.2.10 martin } else
5896 1.88.2.6 snj ixgbe_enable_intr(adapter);
5897 1.45 msaitoh
5898 1.45 msaitoh return;
5899 1.88.2.6 snj } /* ixgbe_handle_que */
5900 1.45 msaitoh
5901 1.88.2.6 snj /************************************************************************
5902 1.88.2.12 martin * ixgbe_handle_que_work
5903 1.88.2.12 martin ************************************************************************/
5904 1.88.2.12 martin static void
5905 1.88.2.12 martin ixgbe_handle_que_work(struct work *wk, void *context)
5906 1.88.2.12 martin {
5907 1.88.2.12 martin struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie);
5908 1.88.2.12 martin
5909 1.88.2.12 martin /*
5910 1.88.2.12 martin * "enqueued flag" is not required here.
5911 1.88.2.12 martin * See ixgbe_msix_que().
5912 1.88.2.12 martin */
5913 1.88.2.12 martin ixgbe_handle_que(que);
5914 1.88.2.12 martin }
5915 1.88.2.12 martin
5916 1.88.2.12 martin /************************************************************************
5917 1.88.2.6 snj * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler
5918 1.88.2.6 snj ************************************************************************/
5919 1.88.2.6 snj static int
5920 1.88.2.6 snj ixgbe_allocate_legacy(struct adapter *adapter,
5921 1.88.2.6 snj const struct pci_attach_args *pa)
5922 1.45 msaitoh {
5923 1.88.2.6 snj device_t dev = adapter->dev;
5924 1.88.2.6 snj struct ix_queue *que = adapter->queues;
5925 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
5926 1.88.2.6 snj int counts[PCI_INTR_TYPE_SIZE];
5927 1.88.2.6 snj pci_intr_type_t intr_type, max_type;
5928 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
5929 1.88.2.6 snj const char *intrstr = NULL;
5930 1.88.2.6 snj
5931 1.88.2.6 snj /* We allocate a single interrupt resource */
5932 1.88.2.6 snj max_type = PCI_INTR_TYPE_MSI;
5933 1.88.2.6 snj counts[PCI_INTR_TYPE_MSIX] = 0;
5934 1.88.2.6 snj counts[PCI_INTR_TYPE_MSI] =
5935 1.88.2.6 snj (adapter->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0;
5936 1.88.2.8 snj /* Check not feat_en but feat_cap to fallback to INTx */
5937 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] =
5938 1.88.2.8 snj (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0;
5939 1.45 msaitoh
5940 1.88.2.6 snj alloc_retry:
5941 1.88.2.6 snj if (pci_intr_alloc(pa, &adapter->osdep.intrs, counts, max_type) != 0) {
5942 1.88.2.6 snj aprint_error_dev(dev, "couldn't alloc interrupt\n");
5943 1.88.2.6 snj return ENXIO;
5944 1.45 msaitoh }
5945 1.88.2.6 snj adapter->osdep.nintrs = 1;
5946 1.88.2.6 snj intrstr = pci_intr_string(adapter->osdep.pc, adapter->osdep.intrs[0],
5947 1.88.2.6 snj intrbuf, sizeof(intrbuf));
5948 1.88.2.6 snj adapter->osdep.ihs[0] = pci_intr_establish_xname(adapter->osdep.pc,
5949 1.88.2.6 snj adapter->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que,
5950 1.88.2.6 snj device_xname(dev));
5951 1.88.2.8 snj intr_type = pci_intr_type(adapter->osdep.pc, adapter->osdep.intrs[0]);
5952 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
5953 1.88.2.6 snj aprint_error_dev(dev,"unable to establish %s\n",
5954 1.88.2.6 snj (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx");
5955 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
5956 1.88.2.8 snj adapter->osdep.intrs = NULL;
5957 1.88.2.6 snj switch (intr_type) {
5958 1.88.2.6 snj case PCI_INTR_TYPE_MSI:
5959 1.88.2.6 snj /* The next try is for INTx: Disable MSI */
5960 1.88.2.6 snj max_type = PCI_INTR_TYPE_INTX;
5961 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] = 1;
5962 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
5963 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) {
5964 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
5965 1.88.2.8 snj goto alloc_retry;
5966 1.88.2.8 snj } else
5967 1.88.2.8 snj break;
5968 1.88.2.6 snj case PCI_INTR_TYPE_INTX:
5969 1.88.2.6 snj default:
5970 1.88.2.6 snj /* See below */
5971 1.88.2.6 snj break;
5972 1.88.2.6 snj }
5973 1.45 msaitoh }
5974 1.88.2.8 snj if (intr_type == PCI_INTR_TYPE_INTX) {
5975 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
5976 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
5977 1.88.2.8 snj }
5978 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
5979 1.88.2.6 snj aprint_error_dev(dev,
5980 1.88.2.6 snj "couldn't establish interrupt%s%s\n",
5981 1.88.2.6 snj intrstr ? " at " : "", intrstr ? intrstr : "");
5982 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
5983 1.88.2.8 snj adapter->osdep.intrs = NULL;
5984 1.88.2.6 snj return ENXIO;
5985 1.88.2.6 snj }
5986 1.88.2.6 snj aprint_normal_dev(dev, "interrupting at %s\n", intrstr);
5987 1.88.2.6 snj /*
5988 1.88.2.6 snj * Try allocating a fast interrupt and the associated deferred
5989 1.88.2.6 snj * processing contexts.
5990 1.88.2.6 snj */
5991 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
5992 1.88.2.6 snj txr->txr_si =
5993 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
5994 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
5995 1.88.2.6 snj que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
5996 1.88.2.6 snj ixgbe_handle_que, que);
5997 1.45 msaitoh
5998 1.88.2.8 snj if ((!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)
5999 1.88.2.8 snj & (txr->txr_si == NULL)) || (que->que_si == NULL)) {
6000 1.88.2.6 snj aprint_error_dev(dev,
6001 1.88.2.6 snj "could not establish software interrupts\n");
6002 1.45 msaitoh
6003 1.88.2.6 snj return ENXIO;
6004 1.45 msaitoh }
6005 1.88.2.6 snj /* For simplicity in the handlers */
6006 1.88.2.6 snj adapter->active_queues = IXGBE_EIMS_ENABLE_MASK;
6007 1.45 msaitoh
6008 1.88.2.6 snj return (0);
6009 1.88.2.6 snj } /* ixgbe_allocate_legacy */
6010 1.45 msaitoh
6011 1.88.2.6 snj /************************************************************************
6012 1.88.2.6 snj * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers
6013 1.88.2.6 snj ************************************************************************/
6014 1.88.2.6 snj static int
6015 1.88.2.6 snj ixgbe_allocate_msix(struct adapter *adapter, const struct pci_attach_args *pa)
6016 1.88.2.6 snj {
6017 1.88.2.6 snj device_t dev = adapter->dev;
6018 1.88.2.6 snj struct ix_queue *que = adapter->queues;
6019 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
6020 1.88.2.6 snj pci_chipset_tag_t pc;
6021 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
6022 1.88.2.6 snj char intr_xname[32];
6023 1.88.2.12 martin char wqname[MAXCOMLEN];
6024 1.88.2.6 snj const char *intrstr = NULL;
6025 1.88.2.6 snj int error, vector = 0;
6026 1.88.2.6 snj int cpu_id = 0;
6027 1.88.2.6 snj kcpuset_t *affinity;
6028 1.88.2.6 snj #ifdef RSS
6029 1.88.2.6 snj unsigned int rss_buckets = 0;
6030 1.88.2.6 snj kcpuset_t cpu_mask;
6031 1.88.2.6 snj #endif
6032 1.45 msaitoh
6033 1.88.2.6 snj pc = adapter->osdep.pc;
6034 1.88.2.6 snj #ifdef RSS
6035 1.45 msaitoh /*
6036 1.88.2.6 snj * If we're doing RSS, the number of queues needs to
6037 1.88.2.6 snj * match the number of RSS buckets that are configured.
6038 1.88.2.6 snj *
6039 1.88.2.6 snj * + If there's more queues than RSS buckets, we'll end
6040 1.88.2.6 snj * up with queues that get no traffic.
6041 1.88.2.6 snj *
6042 1.88.2.6 snj * + If there's more RSS buckets than queues, we'll end
6043 1.88.2.6 snj * up having multiple RSS buckets map to the same queue,
6044 1.88.2.6 snj * so there'll be some contention.
6045 1.45 msaitoh */
6046 1.88.2.6 snj rss_buckets = rss_getnumbuckets();
6047 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_RSS) &&
6048 1.88.2.6 snj (adapter->num_queues != rss_buckets)) {
6049 1.88.2.6 snj device_printf(dev,
6050 1.88.2.6 snj "%s: number of queues (%d) != number of RSS buckets (%d)"
6051 1.88.2.6 snj "; performance will be impacted.\n",
6052 1.88.2.6 snj __func__, adapter->num_queues, rss_buckets);
6053 1.45 msaitoh }
6054 1.88.2.6 snj #endif
6055 1.45 msaitoh
6056 1.88.2.6 snj adapter->osdep.nintrs = adapter->num_queues + 1;
6057 1.88.2.6 snj if (pci_msix_alloc_exact(pa, &adapter->osdep.intrs,
6058 1.88.2.6 snj adapter->osdep.nintrs) != 0) {
6059 1.88.2.6 snj aprint_error_dev(dev,
6060 1.88.2.6 snj "failed to allocate MSI-X interrupt\n");
6061 1.88.2.6 snj return (ENXIO);
6062 1.88.2.6 snj }
6063 1.45 msaitoh
6064 1.88.2.6 snj kcpuset_create(&affinity, false);
6065 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) {
6066 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d",
6067 1.88.2.6 snj device_xname(dev), i);
6068 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[i], intrbuf,
6069 1.88.2.6 snj sizeof(intrbuf));
6070 1.88.2.6 snj #ifdef IXGBE_MPSAFE
6071 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[i], PCI_INTR_MPSAFE,
6072 1.88.2.6 snj true);
6073 1.88.2.6 snj #endif
6074 1.88.2.6 snj /* Set the handler function */
6075 1.88.2.6 snj que->res = adapter->osdep.ihs[i] = pci_intr_establish_xname(pc,
6076 1.88.2.6 snj adapter->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que,
6077 1.88.2.6 snj intr_xname);
6078 1.88.2.6 snj if (que->res == NULL) {
6079 1.88.2.6 snj aprint_error_dev(dev,
6080 1.88.2.6 snj "Failed to register QUE handler\n");
6081 1.88.2.8 snj error = ENXIO;
6082 1.88.2.8 snj goto err_out;
6083 1.88.2.6 snj }
6084 1.88.2.6 snj que->msix = vector;
6085 1.88.2.6 snj adapter->active_queues |= (u64)(1 << que->msix);
6086 1.45 msaitoh
6087 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
6088 1.88.2.6 snj #ifdef RSS
6089 1.88.2.6 snj /*
6090 1.88.2.6 snj * The queue ID is used as the RSS layer bucket ID.
6091 1.88.2.6 snj * We look up the queue ID -> RSS CPU ID and select
6092 1.88.2.6 snj * that.
6093 1.88.2.6 snj */
6094 1.88.2.6 snj cpu_id = rss_getcpu(i % rss_getnumbuckets());
6095 1.88.2.6 snj CPU_SETOF(cpu_id, &cpu_mask);
6096 1.88.2.6 snj #endif
6097 1.88.2.6 snj } else {
6098 1.88.2.6 snj /*
6099 1.88.2.6 snj * Bind the MSI-X vector, and thus the
6100 1.88.2.6 snj * rings to the corresponding CPU.
6101 1.88.2.6 snj *
6102 1.88.2.6 snj * This just happens to match the default RSS
6103 1.88.2.6 snj * round-robin bucket -> queue -> CPU allocation.
6104 1.88.2.6 snj */
6105 1.88.2.6 snj if (adapter->num_queues > 1)
6106 1.88.2.6 snj cpu_id = i;
6107 1.88.2.6 snj }
6108 1.88.2.6 snj /* Round-robin affinity */
6109 1.88.2.6 snj kcpuset_zero(affinity);
6110 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
6111 1.88.2.6 snj error = interrupt_distribute(adapter->osdep.ihs[i], affinity,
6112 1.88.2.6 snj NULL);
6113 1.88.2.6 snj aprint_normal_dev(dev, "for TX/RX, interrupting at %s",
6114 1.88.2.6 snj intrstr);
6115 1.88.2.6 snj if (error == 0) {
6116 1.88.2.6 snj #if 1 /* def IXGBE_DEBUG */
6117 1.88.2.6 snj #ifdef RSS
6118 1.88.2.6 snj aprintf_normal(", bound RSS bucket %d to CPU %d", i,
6119 1.88.2.6 snj cpu_id % ncpu);
6120 1.88.2.6 snj #else
6121 1.88.2.6 snj aprint_normal(", bound queue %d to cpu %d", i,
6122 1.88.2.6 snj cpu_id % ncpu);
6123 1.88.2.6 snj #endif
6124 1.88.2.6 snj #endif /* IXGBE_DEBUG */
6125 1.88.2.6 snj }
6126 1.88.2.6 snj aprint_normal("\n");
6127 1.45 msaitoh
6128 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
6129 1.88.2.6 snj txr->txr_si = softint_establish(
6130 1.88.2.6 snj SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6131 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
6132 1.88.2.8 snj if (txr->txr_si == NULL) {
6133 1.88.2.8 snj aprint_error_dev(dev,
6134 1.88.2.8 snj "couldn't establish software interrupt\n");
6135 1.88.2.8 snj error = ENXIO;
6136 1.88.2.8 snj goto err_out;
6137 1.88.2.8 snj }
6138 1.88.2.8 snj }
6139 1.88.2.6 snj que->que_si
6140 1.88.2.6 snj = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6141 1.88.2.6 snj ixgbe_handle_que, que);
6142 1.88.2.6 snj if (que->que_si == NULL) {
6143 1.88.2.6 snj aprint_error_dev(dev,
6144 1.88.2.8 snj "couldn't establish software interrupt\n");
6145 1.88.2.8 snj error = ENXIO;
6146 1.88.2.8 snj goto err_out;
6147 1.88.2.6 snj }
6148 1.45 msaitoh }
6149 1.88.2.12 martin snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev));
6150 1.88.2.12 martin error = workqueue_create(&adapter->txr_wq, wqname,
6151 1.88.2.12 martin ixgbe_deferred_mq_start_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
6152 1.88.2.12 martin IXGBE_WORKQUEUE_FLAGS);
6153 1.88.2.12 martin if (error) {
6154 1.88.2.12 martin aprint_error_dev(dev, "couldn't create workqueue for deferred Tx\n");
6155 1.88.2.12 martin goto err_out;
6156 1.88.2.12 martin }
6157 1.88.2.12 martin adapter->txr_wq_enqueued = percpu_alloc(sizeof(u_int));
6158 1.88.2.12 martin
6159 1.88.2.12 martin snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev));
6160 1.88.2.12 martin error = workqueue_create(&adapter->que_wq, wqname,
6161 1.88.2.12 martin ixgbe_handle_que_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
6162 1.88.2.12 martin IXGBE_WORKQUEUE_FLAGS);
6163 1.88.2.12 martin if (error) {
6164 1.88.2.12 martin aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n");
6165 1.88.2.12 martin goto err_out;
6166 1.88.2.12 martin }
6167 1.45 msaitoh
6168 1.88.2.6 snj /* and Link */
6169 1.88.2.6 snj cpu_id++;
6170 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev));
6171 1.88.2.8 snj adapter->vector = vector;
6172 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[vector], intrbuf,
6173 1.88.2.6 snj sizeof(intrbuf));
6174 1.88.2.6 snj #ifdef IXGBE_MPSAFE
6175 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[vector], PCI_INTR_MPSAFE,
6176 1.88.2.6 snj true);
6177 1.88.2.6 snj #endif
6178 1.88.2.6 snj /* Set the link handler function */
6179 1.88.2.6 snj adapter->osdep.ihs[vector] = pci_intr_establish_xname(pc,
6180 1.88.2.6 snj adapter->osdep.intrs[vector], IPL_NET, ixgbe_msix_link, adapter,
6181 1.88.2.6 snj intr_xname);
6182 1.88.2.6 snj if (adapter->osdep.ihs[vector] == NULL) {
6183 1.88.2.6 snj adapter->res = NULL;
6184 1.88.2.6 snj aprint_error_dev(dev, "Failed to register LINK handler\n");
6185 1.88.2.8 snj error = ENXIO;
6186 1.88.2.8 snj goto err_out;
6187 1.45 msaitoh }
6188 1.88.2.6 snj /* Round-robin affinity */
6189 1.88.2.6 snj kcpuset_zero(affinity);
6190 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
6191 1.88.2.8 snj error = interrupt_distribute(adapter->osdep.ihs[vector], affinity,
6192 1.88.2.8 snj NULL);
6193 1.45 msaitoh
6194 1.88.2.6 snj aprint_normal_dev(dev,
6195 1.88.2.6 snj "for link, interrupting at %s", intrstr);
6196 1.88.2.6 snj if (error == 0)
6197 1.88.2.6 snj aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu);
6198 1.88.2.6 snj else
6199 1.88.2.6 snj aprint_normal("\n");
6200 1.45 msaitoh
6201 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
6202 1.88.2.6 snj adapter->mbx_si =
6203 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6204 1.88.2.6 snj ixgbe_handle_mbx, adapter);
6205 1.88.2.8 snj if (adapter->mbx_si == NULL) {
6206 1.88.2.8 snj aprint_error_dev(dev,
6207 1.88.2.8 snj "could not establish software interrupts\n");
6208 1.88.2.8 snj
6209 1.88.2.8 snj error = ENXIO;
6210 1.88.2.8 snj goto err_out;
6211 1.88.2.8 snj }
6212 1.88.2.8 snj }
6213 1.45 msaitoh
6214 1.88.2.6 snj kcpuset_destroy(affinity);
6215 1.88.2.8 snj aprint_normal_dev(dev,
6216 1.88.2.8 snj "Using MSI-X interrupts with %d vectors\n", vector + 1);
6217 1.45 msaitoh
6218 1.88.2.6 snj return (0);
6219 1.88.2.8 snj
6220 1.88.2.8 snj err_out:
6221 1.88.2.8 snj kcpuset_destroy(affinity);
6222 1.88.2.8 snj ixgbe_free_softint(adapter);
6223 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
6224 1.88.2.8 snj return (error);
6225 1.88.2.6 snj } /* ixgbe_allocate_msix */
6226 1.45 msaitoh
6227 1.88.2.6 snj /************************************************************************
6228 1.88.2.6 snj * ixgbe_configure_interrupts
6229 1.88.2.6 snj *
6230 1.88.2.6 snj * Setup MSI-X, MSI, or legacy interrupts (in that order).
6231 1.88.2.6 snj * This will also depend on user settings.
6232 1.88.2.6 snj ************************************************************************/
6233 1.88.2.6 snj static int
6234 1.88.2.6 snj ixgbe_configure_interrupts(struct adapter *adapter)
6235 1.45 msaitoh {
6236 1.88.2.6 snj device_t dev = adapter->dev;
6237 1.88.2.6 snj struct ixgbe_mac_info *mac = &adapter->hw.mac;
6238 1.88.2.6 snj int want, queues, msgs;
6239 1.45 msaitoh
6240 1.88.2.6 snj /* Default to 1 queue if MSI-X setup fails */
6241 1.88.2.6 snj adapter->num_queues = 1;
6242 1.45 msaitoh
6243 1.88.2.6 snj /* Override by tuneable */
6244 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX))
6245 1.88.2.6 snj goto msi;
6246 1.45 msaitoh
6247 1.88.2.8 snj /*
6248 1.88.2.8 snj * NetBSD only: Use single vector MSI when number of CPU is 1 to save
6249 1.88.2.8 snj * interrupt slot.
6250 1.88.2.8 snj */
6251 1.88.2.8 snj if (ncpu == 1)
6252 1.88.2.8 snj goto msi;
6253 1.88.2.8 snj
6254 1.88.2.6 snj /* First try MSI-X */
6255 1.88.2.6 snj msgs = pci_msix_count(adapter->osdep.pc, adapter->osdep.tag);
6256 1.88.2.6 snj msgs = MIN(msgs, IXG_MAX_NINTR);
6257 1.88.2.6 snj if (msgs < 2)
6258 1.88.2.6 snj goto msi;
6259 1.45 msaitoh
6260 1.88.2.6 snj adapter->msix_mem = (void *)1; /* XXX */
6261 1.45 msaitoh
6262 1.88.2.6 snj /* Figure out a reasonable auto config value */
6263 1.88.2.6 snj queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu;
6264 1.45 msaitoh
6265 1.88.2.6 snj #ifdef RSS
6266 1.88.2.6 snj /* If we're doing RSS, clamp at the number of RSS buckets */
6267 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
6268 1.88.2.6 snj queues = min(queues, rss_getnumbuckets());
6269 1.88.2.6 snj #endif
6270 1.88.2.6 snj if (ixgbe_num_queues > queues) {
6271 1.88.2.6 snj aprint_error_dev(adapter->dev, "ixgbe_num_queues (%d) is too large, using reduced amount (%d).\n", ixgbe_num_queues, queues);
6272 1.88.2.6 snj ixgbe_num_queues = queues;
6273 1.45 msaitoh }
6274 1.45 msaitoh
6275 1.88.2.6 snj if (ixgbe_num_queues != 0)
6276 1.88.2.6 snj queues = ixgbe_num_queues;
6277 1.88.2.6 snj else
6278 1.88.2.6 snj queues = min(queues,
6279 1.88.2.6 snj min(mac->max_tx_queues, mac->max_rx_queues));
6280 1.45 msaitoh
6281 1.88.2.6 snj /* reflect correct sysctl value */
6282 1.88.2.6 snj ixgbe_num_queues = queues;
6283 1.45 msaitoh
6284 1.88.2.6 snj /*
6285 1.88.2.6 snj * Want one vector (RX/TX pair) per queue
6286 1.88.2.6 snj * plus an additional for Link.
6287 1.88.2.6 snj */
6288 1.88.2.6 snj want = queues + 1;
6289 1.88.2.6 snj if (msgs >= want)
6290 1.88.2.6 snj msgs = want;
6291 1.88.2.6 snj else {
6292 1.88.2.6 snj aprint_error_dev(dev, "MSI-X Configuration Problem, "
6293 1.88.2.6 snj "%d vectors but %d queues wanted!\n",
6294 1.88.2.6 snj msgs, want);
6295 1.88.2.6 snj goto msi;
6296 1.45 msaitoh }
6297 1.88.2.6 snj adapter->num_queues = queues;
6298 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSIX;
6299 1.88.2.6 snj return (0);
6300 1.45 msaitoh
6301 1.88.2.6 snj /*
6302 1.88.2.6 snj * MSI-X allocation failed or provided us with
6303 1.88.2.6 snj * less vectors than needed. Free MSI-X resources
6304 1.88.2.6 snj * and we'll try enabling MSI.
6305 1.88.2.6 snj */
6306 1.88.2.6 snj msi:
6307 1.88.2.6 snj /* Without MSI-X, some features are no longer supported */
6308 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
6309 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
6310 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
6311 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
6312 1.45 msaitoh
6313 1.88.2.6 snj msgs = pci_msi_count(adapter->osdep.pc, adapter->osdep.tag);
6314 1.88.2.6 snj adapter->msix_mem = NULL; /* XXX */
6315 1.88.2.6 snj if (msgs > 1)
6316 1.88.2.6 snj msgs = 1;
6317 1.88.2.6 snj if (msgs != 0) {
6318 1.88.2.6 snj msgs = 1;
6319 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
6320 1.88.2.6 snj return (0);
6321 1.45 msaitoh }
6322 1.45 msaitoh
6323 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) {
6324 1.88.2.6 snj aprint_error_dev(dev,
6325 1.88.2.6 snj "Device does not support legacy interrupts.\n");
6326 1.88.2.6 snj return 1;
6327 1.45 msaitoh }
6328 1.45 msaitoh
6329 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
6330 1.45 msaitoh
6331 1.45 msaitoh return (0);
6332 1.88.2.6 snj } /* ixgbe_configure_interrupts */
6333 1.45 msaitoh
6334 1.45 msaitoh
6335 1.88.2.6 snj /************************************************************************
6336 1.88.2.6 snj * ixgbe_handle_link - Tasklet for MSI-X Link interrupts
6337 1.88.2.6 snj *
6338 1.88.2.6 snj * Done outside of interrupt context since the driver might sleep
6339 1.88.2.6 snj ************************************************************************/
6340 1.45 msaitoh static void
6341 1.88.2.6 snj ixgbe_handle_link(void *context)
6342 1.45 msaitoh {
6343 1.88.2.6 snj struct adapter *adapter = context;
6344 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
6345 1.45 msaitoh
6346 1.88.2.6 snj ixgbe_check_link(hw, &adapter->link_speed, &adapter->link_up, 0);
6347 1.88.2.6 snj ixgbe_update_link_status(adapter);
6348 1.45 msaitoh
6349 1.88.2.6 snj /* Re-enable link interrupts */
6350 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC);
6351 1.88.2.6 snj } /* ixgbe_handle_link */
6352 1.45 msaitoh
6353 1.88.2.6 snj /************************************************************************
6354 1.88.2.6 snj * ixgbe_rearm_queues
6355 1.88.2.6 snj ************************************************************************/
6356 1.45 msaitoh static void
6357 1.88.2.6 snj ixgbe_rearm_queues(struct adapter *adapter, u64 queues)
6358 1.45 msaitoh {
6359 1.88.2.6 snj u32 mask;
6360 1.45 msaitoh
6361 1.88.2.6 snj switch (adapter->hw.mac.type) {
6362 1.88.2.6 snj case ixgbe_mac_82598EB:
6363 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queues);
6364 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
6365 1.45 msaitoh break;
6366 1.88.2.6 snj case ixgbe_mac_82599EB:
6367 1.88.2.6 snj case ixgbe_mac_X540:
6368 1.88.2.6 snj case ixgbe_mac_X550:
6369 1.88.2.6 snj case ixgbe_mac_X550EM_x:
6370 1.88.2.6 snj case ixgbe_mac_X550EM_a:
6371 1.88.2.6 snj mask = (queues & 0xFFFFFFFF);
6372 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
6373 1.88.2.6 snj mask = (queues >> 32);
6374 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
6375 1.45 msaitoh break;
6376 1.45 msaitoh default:
6377 1.45 msaitoh break;
6378 1.45 msaitoh }
6379 1.88.2.6 snj } /* ixgbe_rearm_queues */
6380