ixgbe.c revision 1.88.2.26 1 1.88.2.26 martin /* $NetBSD: ixgbe.c,v 1.88.2.26 2019/01/27 18:35:19 martin Exp $ */
2 1.88.2.6 snj
3 1.1 dyoung /******************************************************************************
4 1.1 dyoung
5 1.88.2.6 snj Copyright (c) 2001-2017, Intel Corporation
6 1.1 dyoung All rights reserved.
7 1.88.2.6 snj
8 1.88.2.6 snj Redistribution and use in source and binary forms, with or without
9 1.1 dyoung modification, are permitted provided that the following conditions are met:
10 1.88.2.6 snj
11 1.88.2.6 snj 1. Redistributions of source code must retain the above copyright notice,
12 1.1 dyoung this list of conditions and the following disclaimer.
13 1.88.2.6 snj
14 1.88.2.6 snj 2. Redistributions in binary form must reproduce the above copyright
15 1.88.2.6 snj notice, this list of conditions and the following disclaimer in the
16 1.1 dyoung documentation and/or other materials provided with the distribution.
17 1.88.2.6 snj
18 1.88.2.6 snj 3. Neither the name of the Intel Corporation nor the names of its
19 1.88.2.6 snj contributors may be used to endorse or promote products derived from
20 1.1 dyoung this software without specific prior written permission.
21 1.88.2.6 snj
22 1.1 dyoung THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 1.88.2.6 snj AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.88.2.6 snj IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.88.2.6 snj ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 1.88.2.6 snj LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.88.2.6 snj CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.88.2.6 snj SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.88.2.6 snj INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.88.2.6 snj CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 dyoung ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 1.1 dyoung POSSIBILITY OF SUCH DAMAGE.
33 1.1 dyoung
34 1.1 dyoung ******************************************************************************/
35 1.88.2.17 martin /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/
36 1.88.2.6 snj
37 1.1 dyoung /*
38 1.1 dyoung * Copyright (c) 2011 The NetBSD Foundation, Inc.
39 1.1 dyoung * All rights reserved.
40 1.1 dyoung *
41 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
42 1.1 dyoung * by Coyote Point Systems, Inc.
43 1.1 dyoung *
44 1.1 dyoung * Redistribution and use in source and binary forms, with or without
45 1.1 dyoung * modification, are permitted provided that the following conditions
46 1.1 dyoung * are met:
47 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
48 1.1 dyoung * notice, this list of conditions and the following disclaimer.
49 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
51 1.1 dyoung * documentation and/or other materials provided with the distribution.
52 1.1 dyoung *
53 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
54 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
64 1.1 dyoung */
65 1.1 dyoung
66 1.80 msaitoh #ifdef _KERNEL_OPT
67 1.1 dyoung #include "opt_inet.h"
68 1.22 msaitoh #include "opt_inet6.h"
69 1.80 msaitoh #include "opt_net_mpsafe.h"
70 1.80 msaitoh #endif
71 1.1 dyoung
72 1.1 dyoung #include "ixgbe.h"
73 1.88.2.15 martin #include "ixgbe_sriov.h"
74 1.29 msaitoh #include "vlan.h"
75 1.1 dyoung
76 1.33 msaitoh #include <sys/cprng.h>
77 1.88.2.2 snj #include <dev/mii/mii.h>
78 1.88.2.2 snj #include <dev/mii/miivar.h>
79 1.33 msaitoh
80 1.88.2.6 snj /************************************************************************
81 1.88.2.6 snj * Driver version
82 1.88.2.6 snj ************************************************************************/
83 1.88.2.20 martin static const char ixgbe_driver_version[] = "4.0.1-k";
84 1.1 dyoung
85 1.1 dyoung
86 1.88.2.6 snj /************************************************************************
87 1.88.2.6 snj * PCI Device ID Table
88 1.1 dyoung *
89 1.88.2.6 snj * Used by probe to select devices to load on
90 1.88.2.6 snj * Last field stores an index into ixgbe_strings
91 1.88.2.6 snj * Last entry must be all 0s
92 1.1 dyoung *
93 1.88.2.6 snj * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
94 1.88.2.6 snj ************************************************************************/
95 1.88.2.20 martin static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] =
96 1.1 dyoung {
97 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0},
98 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0},
99 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0},
100 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0},
101 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0},
102 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0},
103 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0},
104 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0},
105 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0},
106 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0},
107 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0},
108 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0},
109 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0},
110 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0},
111 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0},
112 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0},
113 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0},
114 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0},
115 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0},
116 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0},
117 1.1 dyoung {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0},
118 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0},
119 1.21 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0},
120 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0},
121 1.24 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0},
122 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0},
123 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0},
124 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0},
125 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0},
126 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0},
127 1.43 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0},
128 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0},
129 1.48 msaitoh {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0},
130 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0},
131 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0},
132 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0},
133 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0},
134 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0},
135 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0},
136 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0},
137 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0},
138 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0},
139 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0},
140 1.88.2.6 snj {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0},
141 1.1 dyoung /* required last entry */
142 1.1 dyoung {0, 0, 0, 0, 0}
143 1.1 dyoung };
144 1.1 dyoung
145 1.88.2.6 snj /************************************************************************
146 1.88.2.6 snj * Table of branding strings
147 1.88.2.6 snj ************************************************************************/
148 1.1 dyoung static const char *ixgbe_strings[] = {
149 1.1 dyoung "Intel(R) PRO/10GbE PCI-Express Network Driver"
150 1.1 dyoung };
151 1.1 dyoung
152 1.88.2.6 snj /************************************************************************
153 1.88.2.6 snj * Function prototypes
154 1.88.2.6 snj ************************************************************************/
155 1.1 dyoung static int ixgbe_probe(device_t, cfdata_t, void *);
156 1.1 dyoung static void ixgbe_attach(device_t, device_t, void *);
157 1.1 dyoung static int ixgbe_detach(device_t, int);
158 1.1 dyoung #if 0
159 1.1 dyoung static int ixgbe_shutdown(device_t);
160 1.1 dyoung #endif
161 1.44 msaitoh static bool ixgbe_suspend(device_t, const pmf_qual_t *);
162 1.44 msaitoh static bool ixgbe_resume(device_t, const pmf_qual_t *);
163 1.88.2.6 snj static int ixgbe_ifflags_cb(struct ethercom *);
164 1.1 dyoung static int ixgbe_ioctl(struct ifnet *, u_long, void *);
165 1.1 dyoung static void ixgbe_ifstop(struct ifnet *, int);
166 1.1 dyoung static int ixgbe_init(struct ifnet *);
167 1.1 dyoung static void ixgbe_init_locked(struct adapter *);
168 1.1 dyoung static void ixgbe_stop(void *);
169 1.88.2.6 snj static void ixgbe_init_device_features(struct adapter *);
170 1.88.2.6 snj static void ixgbe_check_fan_failure(struct adapter *, u32, bool);
171 1.43 msaitoh static void ixgbe_add_media_types(struct adapter *);
172 1.1 dyoung static void ixgbe_media_status(struct ifnet *, struct ifmediareq *);
173 1.1 dyoung static int ixgbe_media_change(struct ifnet *);
174 1.1 dyoung static int ixgbe_allocate_pci_resources(struct adapter *,
175 1.1 dyoung const struct pci_attach_args *);
176 1.88.2.15 martin static void ixgbe_free_softint(struct adapter *);
177 1.48 msaitoh static void ixgbe_get_slot_info(struct adapter *);
178 1.1 dyoung static int ixgbe_allocate_msix(struct adapter *,
179 1.1 dyoung const struct pci_attach_args *);
180 1.1 dyoung static int ixgbe_allocate_legacy(struct adapter *,
181 1.1 dyoung const struct pci_attach_args *);
182 1.88.2.6 snj static int ixgbe_configure_interrupts(struct adapter *);
183 1.88.2.8 snj static void ixgbe_free_pciintr_resources(struct adapter *);
184 1.1 dyoung static void ixgbe_free_pci_resources(struct adapter *);
185 1.1 dyoung static void ixgbe_local_timer(void *);
186 1.63 msaitoh static void ixgbe_local_timer1(void *);
187 1.1 dyoung static int ixgbe_setup_interface(device_t, struct adapter *);
188 1.45 msaitoh static void ixgbe_config_gpie(struct adapter *);
189 1.44 msaitoh static void ixgbe_config_dmac(struct adapter *);
190 1.44 msaitoh static void ixgbe_config_delay_values(struct adapter *);
191 1.1 dyoung static void ixgbe_config_link(struct adapter *);
192 1.44 msaitoh static void ixgbe_check_wol_support(struct adapter *);
193 1.44 msaitoh static int ixgbe_setup_low_power_mode(struct adapter *);
194 1.43 msaitoh static void ixgbe_rearm_queues(struct adapter *, u64);
195 1.1 dyoung
196 1.1 dyoung static void ixgbe_initialize_transmit_units(struct adapter *);
197 1.1 dyoung static void ixgbe_initialize_receive_units(struct adapter *);
198 1.43 msaitoh static void ixgbe_enable_rx_drop(struct adapter *);
199 1.43 msaitoh static void ixgbe_disable_rx_drop(struct adapter *);
200 1.48 msaitoh static void ixgbe_initialize_rss_mapping(struct adapter *);
201 1.1 dyoung
202 1.1 dyoung static void ixgbe_enable_intr(struct adapter *);
203 1.1 dyoung static void ixgbe_disable_intr(struct adapter *);
204 1.1 dyoung static void ixgbe_update_stats_counters(struct adapter *);
205 1.1 dyoung static void ixgbe_set_promisc(struct adapter *);
206 1.1 dyoung static void ixgbe_set_multi(struct adapter *);
207 1.1 dyoung static void ixgbe_update_link_status(struct adapter *);
208 1.1 dyoung static void ixgbe_set_ivar(struct adapter *, u8, u8, s8);
209 1.1 dyoung static void ixgbe_configure_ivars(struct adapter *);
210 1.1 dyoung static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
211 1.88.2.20 martin static void ixgbe_eitr_write(struct adapter *, uint32_t, uint32_t);
212 1.1 dyoung
213 1.1 dyoung static void ixgbe_setup_vlan_hw_support(struct adapter *);
214 1.1 dyoung #if 0
215 1.1 dyoung static void ixgbe_register_vlan(void *, struct ifnet *, u16);
216 1.1 dyoung static void ixgbe_unregister_vlan(void *, struct ifnet *, u16);
217 1.1 dyoung #endif
218 1.1 dyoung
219 1.44 msaitoh static void ixgbe_add_device_sysctls(struct adapter *);
220 1.44 msaitoh static void ixgbe_add_hw_stats(struct adapter *);
221 1.85 msaitoh static void ixgbe_clear_evcnt(struct adapter *);
222 1.52 msaitoh static int ixgbe_set_flowcntl(struct adapter *, int);
223 1.52 msaitoh static int ixgbe_set_advertise(struct adapter *, int);
224 1.88.2.6 snj static int ixgbe_get_advertise(struct adapter *);
225 1.44 msaitoh
226 1.44 msaitoh /* Sysctl handlers */
227 1.47 msaitoh static void ixgbe_set_sysctl_value(struct adapter *, const char *,
228 1.48 msaitoh const char *, int *, int);
229 1.52 msaitoh static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO);
230 1.52 msaitoh static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO);
231 1.88.2.6 snj static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO);
232 1.44 msaitoh static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO);
233 1.44 msaitoh static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO);
234 1.44 msaitoh static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO);
235 1.48 msaitoh #ifdef IXGBE_DEBUG
236 1.48 msaitoh static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO);
237 1.48 msaitoh static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO);
238 1.48 msaitoh #endif
239 1.88.2.20 martin static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO);
240 1.88.2.6 snj static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO);
241 1.88.2.6 snj static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO);
242 1.88.2.6 snj static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO);
243 1.88.2.6 snj static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO);
244 1.88.2.6 snj static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO);
245 1.88.2.20 martin static int ixgbe_sysctl_debug(SYSCTLFN_PROTO);
246 1.44 msaitoh static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO);
247 1.44 msaitoh static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO);
248 1.1 dyoung
249 1.1 dyoung /* Support for pluggable optic modules */
250 1.1 dyoung static bool ixgbe_sfp_probe(struct adapter *);
251 1.1 dyoung
252 1.88.2.6 snj /* Legacy (single vector) interrupt handler */
253 1.1 dyoung static int ixgbe_legacy_irq(void *);
254 1.1 dyoung
255 1.88.2.6 snj /* The MSI/MSI-X Interrupt handlers */
256 1.34 msaitoh static int ixgbe_msix_que(void *);
257 1.34 msaitoh static int ixgbe_msix_link(void *);
258 1.1 dyoung
259 1.1 dyoung /* Software interrupts for deferred work */
260 1.1 dyoung static void ixgbe_handle_que(void *);
261 1.1 dyoung static void ixgbe_handle_link(void *);
262 1.1 dyoung static void ixgbe_handle_msf(void *);
263 1.1 dyoung static void ixgbe_handle_mod(void *);
264 1.44 msaitoh static void ixgbe_handle_phy(void *);
265 1.1 dyoung
266 1.88.2.12 martin /* Workqueue handler for deferred work */
267 1.88.2.12 martin static void ixgbe_handle_que_work(struct work *, void *);
268 1.88.2.12 martin
269 1.88.2.20 martin static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *);
270 1.1 dyoung
271 1.88.2.6 snj /************************************************************************
272 1.88.2.6 snj * NetBSD Device Interface Entry Points
273 1.88.2.6 snj ************************************************************************/
274 1.1 dyoung CFATTACH_DECL3_NEW(ixg, sizeof(struct adapter),
275 1.1 dyoung ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL,
276 1.1 dyoung DVF_DETACH_SHUTDOWN);
277 1.1 dyoung
278 1.1 dyoung #if 0
279 1.44 msaitoh devclass_t ix_devclass;
280 1.44 msaitoh DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0);
281 1.1 dyoung
282 1.44 msaitoh MODULE_DEPEND(ix, pci, 1, 1, 1);
283 1.44 msaitoh MODULE_DEPEND(ix, ether, 1, 1, 1);
284 1.88.2.6 snj #ifdef DEV_NETMAP
285 1.88.2.6 snj MODULE_DEPEND(ix, netmap, 1, 1, 1);
286 1.88.2.6 snj #endif
287 1.1 dyoung #endif
288 1.1 dyoung
289 1.1 dyoung /*
290 1.88.2.6 snj * TUNEABLE PARAMETERS:
291 1.88.2.6 snj */
292 1.1 dyoung
293 1.1 dyoung /*
294 1.88.2.6 snj * AIM: Adaptive Interrupt Moderation
295 1.88.2.6 snj * which means that the interrupt rate
296 1.88.2.6 snj * is varied over time based on the
297 1.88.2.6 snj * traffic for that interrupt vector
298 1.88.2.6 snj */
299 1.73 msaitoh static bool ixgbe_enable_aim = true;
300 1.52 msaitoh #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7)
301 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0,
302 1.52 msaitoh "Enable adaptive interrupt moderation");
303 1.1 dyoung
304 1.22 msaitoh static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
305 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
306 1.52 msaitoh &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
307 1.1 dyoung
308 1.1 dyoung /* How many packets rxeof tries to clean at a time */
309 1.1 dyoung static int ixgbe_rx_process_limit = 256;
310 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
311 1.88.2.6 snj &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited");
312 1.1 dyoung
313 1.28 msaitoh /* How many packets txeof tries to clean at a time */
314 1.28 msaitoh static int ixgbe_tx_process_limit = 256;
315 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN,
316 1.52 msaitoh &ixgbe_tx_process_limit, 0,
317 1.88.2.6 snj "Maximum number of sent packets to process at a time, -1 means unlimited");
318 1.52 msaitoh
319 1.52 msaitoh /* Flow control setting, default to full */
320 1.52 msaitoh static int ixgbe_flow_control = ixgbe_fc_full;
321 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
322 1.52 msaitoh &ixgbe_flow_control, 0, "Default flow control used for all adapters");
323 1.52 msaitoh
324 1.88.2.12 martin /* Which pakcet processing uses workqueue or softint */
325 1.88.2.12 martin static bool ixgbe_txrx_workqueue = false;
326 1.88.2.12 martin
327 1.1 dyoung /*
328 1.88.2.6 snj * Smart speed setting, default to on
329 1.88.2.6 snj * this only works as a compile option
330 1.88.2.6 snj * right now as its during attach, set
331 1.88.2.6 snj * this to 'ixgbe_smart_speed_off' to
332 1.88.2.6 snj * disable.
333 1.88.2.6 snj */
334 1.1 dyoung static int ixgbe_smart_speed = ixgbe_smart_speed_on;
335 1.1 dyoung
336 1.1 dyoung /*
337 1.88.2.6 snj * MSI-X should be the default for best performance,
338 1.1 dyoung * but this allows it to be forced off for testing.
339 1.1 dyoung */
340 1.1 dyoung static int ixgbe_enable_msix = 1;
341 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
342 1.52 msaitoh "Enable MSI-X interrupts");
343 1.1 dyoung
344 1.1 dyoung /*
345 1.1 dyoung * Number of Queues, can be set to 0,
346 1.1 dyoung * it then autoconfigures based on the
347 1.1 dyoung * number of cpus with a max of 8. This
348 1.1 dyoung * can be overriden manually here.
349 1.1 dyoung */
350 1.62 msaitoh static int ixgbe_num_queues = 0;
351 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
352 1.52 msaitoh "Number of queues to configure, 0 indicates autoconfigure");
353 1.1 dyoung
354 1.1 dyoung /*
355 1.88.2.6 snj * Number of TX descriptors per ring,
356 1.88.2.6 snj * setting higher than RX as this seems
357 1.88.2.6 snj * the better performing choice.
358 1.88.2.6 snj */
359 1.1 dyoung static int ixgbe_txd = PERFORM_TXD;
360 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0,
361 1.52 msaitoh "Number of transmit descriptors per queue");
362 1.1 dyoung
363 1.1 dyoung /* Number of RX descriptors per ring */
364 1.1 dyoung static int ixgbe_rxd = PERFORM_RXD;
365 1.52 msaitoh SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0,
366 1.52 msaitoh "Number of receive descriptors per queue");
367 1.33 msaitoh
368 1.33 msaitoh /*
369 1.88.2.6 snj * Defining this on will allow the use
370 1.88.2.6 snj * of unsupported SFP+ modules, note that
371 1.88.2.6 snj * doing so you are on your own :)
372 1.88.2.6 snj */
373 1.35 msaitoh static int allow_unsupported_sfp = false;
374 1.52 msaitoh #define TUNABLE_INT(__x, __y)
375 1.52 msaitoh TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp);
376 1.1 dyoung
377 1.88.2.6 snj /*
378 1.88.2.6 snj * Not sure if Flow Director is fully baked,
379 1.88.2.6 snj * so we'll default to turning it off.
380 1.88.2.6 snj */
381 1.88.2.6 snj static int ixgbe_enable_fdir = 0;
382 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0,
383 1.88.2.6 snj "Enable Flow Director");
384 1.88.2.6 snj
385 1.88.2.6 snj /* Legacy Transmit (single queue) */
386 1.88.2.6 snj static int ixgbe_enable_legacy_tx = 0;
387 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN,
388 1.88.2.6 snj &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow");
389 1.88.2.6 snj
390 1.88.2.6 snj /* Receive-Side Scaling */
391 1.88.2.6 snj static int ixgbe_enable_rss = 1;
392 1.88.2.6 snj SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0,
393 1.88.2.6 snj "Enable Receive-Side Scaling (RSS)");
394 1.88.2.6 snj
395 1.88.2.6 snj #if 0
396 1.88.2.6 snj static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *);
397 1.88.2.6 snj static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *);
398 1.1 dyoung #endif
399 1.1 dyoung
400 1.80 msaitoh #ifdef NET_MPSAFE
401 1.80 msaitoh #define IXGBE_MPSAFE 1
402 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE
403 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS SOFTINT_MPSAFE
404 1.88.2.12 martin #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE
405 1.80 msaitoh #else
406 1.80 msaitoh #define IXGBE_CALLOUT_FLAGS 0
407 1.80 msaitoh #define IXGBE_SOFTINFT_FLAGS 0
408 1.88.2.12 martin #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU
409 1.80 msaitoh #endif
410 1.88.2.12 martin #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET
411 1.80 msaitoh
412 1.88.2.6 snj /************************************************************************
413 1.88.2.6 snj * ixgbe_initialize_rss_mapping
414 1.88.2.6 snj ************************************************************************/
415 1.88.2.6 snj static void
416 1.88.2.6 snj ixgbe_initialize_rss_mapping(struct adapter *adapter)
417 1.1 dyoung {
418 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
419 1.88.2.6 snj u32 reta = 0, mrqc, rss_key[10];
420 1.88.2.6 snj int queue_id, table_size, index_mult;
421 1.88.2.6 snj int i, j;
422 1.88.2.6 snj u32 rss_hash_config;
423 1.88.2.6 snj
424 1.88.2.9 snj /* force use default RSS key. */
425 1.88.2.9 snj #ifdef __NetBSD__
426 1.88.2.9 snj rss_getkey((uint8_t *) &rss_key);
427 1.88.2.9 snj #else
428 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
429 1.88.2.6 snj /* Fetch the configured RSS key */
430 1.88.2.6 snj rss_getkey((uint8_t *) &rss_key);
431 1.88.2.6 snj } else {
432 1.88.2.6 snj /* set up random bits */
433 1.88.2.6 snj cprng_fast(&rss_key, sizeof(rss_key));
434 1.88.2.6 snj }
435 1.88.2.9 snj #endif
436 1.1 dyoung
437 1.88.2.6 snj /* Set multiplier for RETA setup and table size based on MAC */
438 1.88.2.6 snj index_mult = 0x1;
439 1.88.2.6 snj table_size = 128;
440 1.88.2.6 snj switch (adapter->hw.mac.type) {
441 1.88.2.6 snj case ixgbe_mac_82598EB:
442 1.88.2.6 snj index_mult = 0x11;
443 1.88.2.6 snj break;
444 1.88.2.6 snj case ixgbe_mac_X550:
445 1.88.2.6 snj case ixgbe_mac_X550EM_x:
446 1.88.2.6 snj case ixgbe_mac_X550EM_a:
447 1.88.2.6 snj table_size = 512;
448 1.88.2.6 snj break;
449 1.88.2.6 snj default:
450 1.88.2.6 snj break;
451 1.88.2.6 snj }
452 1.1 dyoung
453 1.88.2.6 snj /* Set up the redirection table */
454 1.88.2.6 snj for (i = 0, j = 0; i < table_size; i++, j++) {
455 1.88.2.6 snj if (j == adapter->num_queues)
456 1.88.2.6 snj j = 0;
457 1.1 dyoung
458 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
459 1.88.2.6 snj /*
460 1.88.2.6 snj * Fetch the RSS bucket id for the given indirection
461 1.88.2.6 snj * entry. Cap it at the number of configured buckets
462 1.88.2.6 snj * (which is num_queues.)
463 1.88.2.6 snj */
464 1.88.2.6 snj queue_id = rss_get_indirection_to_bucket(i);
465 1.88.2.6 snj queue_id = queue_id % adapter->num_queues;
466 1.88.2.6 snj } else
467 1.88.2.6 snj queue_id = (j * index_mult);
468 1.1 dyoung
469 1.88.2.6 snj /*
470 1.88.2.6 snj * The low 8 bits are for hash value (n+0);
471 1.88.2.6 snj * The next 8 bits are for hash value (n+1), etc.
472 1.88.2.6 snj */
473 1.88.2.6 snj reta = reta >> 8;
474 1.88.2.6 snj reta = reta | (((uint32_t) queue_id) << 24);
475 1.88.2.6 snj if ((i & 3) == 3) {
476 1.88.2.6 snj if (i < 128)
477 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
478 1.88.2.6 snj else
479 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
480 1.88.2.6 snj reta);
481 1.88.2.6 snj reta = 0;
482 1.88.2.6 snj }
483 1.88.2.6 snj }
484 1.1 dyoung
485 1.88.2.6 snj /* Now fill our hash function seeds */
486 1.88.2.6 snj for (i = 0; i < 10; i++)
487 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
488 1.1 dyoung
489 1.88.2.6 snj /* Perform hash on these packet types */
490 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
491 1.88.2.6 snj rss_hash_config = rss_gethashconfig();
492 1.88.2.6 snj else {
493 1.88.2.6 snj /*
494 1.88.2.6 snj * Disable UDP - IP fragments aren't currently being handled
495 1.88.2.6 snj * and so we end up with a mix of 2-tuple and 4-tuple
496 1.88.2.6 snj * traffic.
497 1.88.2.6 snj */
498 1.88.2.6 snj rss_hash_config = RSS_HASHTYPE_RSS_IPV4
499 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV4
500 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6
501 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6
502 1.88.2.6 snj | RSS_HASHTYPE_RSS_IPV6_EX
503 1.88.2.6 snj | RSS_HASHTYPE_RSS_TCP_IPV6_EX;
504 1.1 dyoung }
505 1.1 dyoung
506 1.88.2.6 snj mrqc = IXGBE_MRQC_RSSEN;
507 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
508 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4;
509 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
510 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
511 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
512 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6;
513 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
514 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
515 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
516 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX;
517 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
518 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP;
519 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
520 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
521 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
522 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
523 1.88.2.6 snj if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
524 1.88.2.6 snj mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
525 1.88.2.6 snj mrqc |= ixgbe_get_mrqc(adapter->iov_mode);
526 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
527 1.88.2.6 snj } /* ixgbe_initialize_rss_mapping */
528 1.1 dyoung
529 1.88.2.6 snj /************************************************************************
530 1.88.2.6 snj * ixgbe_initialize_receive_units - Setup receive registers and features.
531 1.88.2.6 snj ************************************************************************/
532 1.88.2.6 snj #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1)
533 1.88.2.6 snj
534 1.1 dyoung static void
535 1.88.2.6 snj ixgbe_initialize_receive_units(struct adapter *adapter)
536 1.1 dyoung {
537 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
538 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
539 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
540 1.88.2.6 snj int i, j;
541 1.88.2.6 snj u32 bufsz, fctrl, srrctl, rxcsum;
542 1.88.2.6 snj u32 hlreg;
543 1.1 dyoung
544 1.88.2.6 snj /*
545 1.88.2.6 snj * Make sure receives are disabled while
546 1.88.2.6 snj * setting up the descriptor ring
547 1.88.2.6 snj */
548 1.88.2.6 snj ixgbe_disable_rx(hw);
549 1.1 dyoung
550 1.88.2.6 snj /* Enable broadcasts */
551 1.88.2.6 snj fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
552 1.88.2.6 snj fctrl |= IXGBE_FCTRL_BAM;
553 1.88.2.6 snj if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
554 1.88.2.6 snj fctrl |= IXGBE_FCTRL_DPF;
555 1.88.2.6 snj fctrl |= IXGBE_FCTRL_PMCF;
556 1.88.2.6 snj }
557 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
558 1.1 dyoung
559 1.88.2.6 snj /* Set for Jumbo Frames? */
560 1.88.2.6 snj hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);
561 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU)
562 1.88.2.6 snj hlreg |= IXGBE_HLREG0_JUMBOEN;
563 1.88.2.6 snj else
564 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_JUMBOEN;
565 1.1 dyoung
566 1.47 msaitoh #ifdef DEV_NETMAP
567 1.88.2.6 snj /* CRC stripping is conditional in Netmap */
568 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
569 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP) &&
570 1.88.2.6 snj !ix_crcstrip)
571 1.88.2.6 snj hlreg &= ~IXGBE_HLREG0_RXCRCSTRP;
572 1.88.2.6 snj else
573 1.88.2.6 snj #endif /* DEV_NETMAP */
574 1.88.2.6 snj hlreg |= IXGBE_HLREG0_RXCRCSTRP;
575 1.47 msaitoh
576 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
577 1.1 dyoung
578 1.88.2.6 snj bufsz = (adapter->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >>
579 1.88.2.6 snj IXGBE_SRRCTL_BSIZEPKT_SHIFT;
580 1.1 dyoung
581 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++, rxr++) {
582 1.88.2.6 snj u64 rdba = rxr->rxdma.dma_paddr;
583 1.88.2.20 martin u32 reg;
584 1.88.2.6 snj int regnum = i / 4; /* 1 register per 4 queues */
585 1.88.2.6 snj int regshift = i % 4; /* 4 bits per 1 queue */
586 1.88.2.6 snj j = rxr->me;
587 1.1 dyoung
588 1.88.2.6 snj /* Setup the Base and Length of the Rx Descriptor Ring */
589 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
590 1.88.2.6 snj (rdba & 0x00000000ffffffffULL));
591 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
592 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
593 1.88.2.6 snj adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc));
594 1.79 msaitoh
595 1.88.2.6 snj /* Set up the SRRCTL register */
596 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));
597 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
598 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
599 1.88.2.6 snj srrctl |= bufsz;
600 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
601 1.1 dyoung
602 1.88.2.6 snj /* Set RQSMR (Receive Queue Statistic Mapping) register */
603 1.88.2.6 snj reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum));
604 1.88.2.6 snj reg &= ~(0x000000ff << (regshift * 8));
605 1.88.2.6 snj reg |= i << (regshift * 8);
606 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg);
607 1.47 msaitoh
608 1.88.2.6 snj /*
609 1.88.2.6 snj * Set DROP_EN iff we have no flow control and >1 queue.
610 1.88.2.6 snj * Note that srrctl was cleared shortly before during reset,
611 1.88.2.6 snj * so we do not need to clear the bit, but do it just in case
612 1.88.2.6 snj * this code is moved elsewhere.
613 1.88.2.6 snj */
614 1.88.2.6 snj if (adapter->num_queues > 1 &&
615 1.88.2.6 snj adapter->hw.fc.requested_mode == ixgbe_fc_none) {
616 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
617 1.88.2.6 snj } else {
618 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
619 1.88.2.6 snj }
620 1.88.2.6 snj
621 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);
622 1.88.2.6 snj
623 1.88.2.6 snj /* Setup the HW Rx Head and Tail Descriptor Pointers */
624 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
625 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
626 1.88.2.6 snj
627 1.88.2.6 snj /* Set the driver rx tail address */
628 1.88.2.6 snj rxr->tail = IXGBE_RDT(rxr->me);
629 1.88.2.6 snj }
630 1.88.2.6 snj
631 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
632 1.88.2.6 snj u32 psrtype = IXGBE_PSRTYPE_TCPHDR
633 1.88.2.6 snj | IXGBE_PSRTYPE_UDPHDR
634 1.88.2.6 snj | IXGBE_PSRTYPE_IPV4HDR
635 1.88.2.6 snj | IXGBE_PSRTYPE_IPV6HDR;
636 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
637 1.88.2.6 snj }
638 1.88.2.6 snj
639 1.88.2.6 snj rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
640 1.88.2.6 snj
641 1.88.2.6 snj ixgbe_initialize_rss_mapping(adapter);
642 1.88.2.6 snj
643 1.88.2.6 snj if (adapter->num_queues > 1) {
644 1.88.2.6 snj /* RSS and RX IPP Checksum are mutually exclusive */
645 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
646 1.88.2.6 snj }
647 1.88.2.6 snj
648 1.88.2.6 snj if (ifp->if_capenable & IFCAP_RXCSUM)
649 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_PCSD;
650 1.88.2.6 snj
651 1.88.2.6 snj /* This is useful for calculating UDP/IP fragment checksums */
652 1.88.2.6 snj if (!(rxcsum & IXGBE_RXCSUM_PCSD))
653 1.88.2.6 snj rxcsum |= IXGBE_RXCSUM_IPPCSE;
654 1.88.2.6 snj
655 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
656 1.88.2.6 snj
657 1.88.2.6 snj } /* ixgbe_initialize_receive_units */
658 1.88.2.6 snj
659 1.88.2.6 snj /************************************************************************
660 1.88.2.6 snj * ixgbe_initialize_transmit_units - Enable transmit units.
661 1.88.2.6 snj ************************************************************************/
662 1.88.2.6 snj static void
663 1.88.2.6 snj ixgbe_initialize_transmit_units(struct adapter *adapter)
664 1.88.2.6 snj {
665 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
666 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
667 1.88.2.17 martin int i;
668 1.88.2.6 snj
669 1.88.2.6 snj /* Setup the Base and Length of the Tx Descriptor Ring */
670 1.88.2.17 martin for (i = 0; i < adapter->num_queues; i++, txr++) {
671 1.88.2.6 snj u64 tdba = txr->txdma.dma_paddr;
672 1.88.2.6 snj u32 txctrl = 0;
673 1.88.2.20 martin u32 tqsmreg, reg;
674 1.88.2.20 martin int regnum = i / 4; /* 1 register per 4 queues */
675 1.88.2.20 martin int regshift = i % 4; /* 4 bits per 1 queue */
676 1.88.2.6 snj int j = txr->me;
677 1.88.2.6 snj
678 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
679 1.88.2.6 snj (tdba & 0x00000000ffffffffULL));
680 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
681 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),
682 1.88.2.6 snj adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc));
683 1.88.2.6 snj
684 1.88.2.20 martin /*
685 1.88.2.20 martin * Set TQSMR (Transmit Queue Statistic Mapping) register.
686 1.88.2.20 martin * Register location is different between 82598 and others.
687 1.88.2.20 martin */
688 1.88.2.20 martin if (adapter->hw.mac.type == ixgbe_mac_82598EB)
689 1.88.2.20 martin tqsmreg = IXGBE_TQSMR(regnum);
690 1.88.2.20 martin else
691 1.88.2.20 martin tqsmreg = IXGBE_TQSM(regnum);
692 1.88.2.20 martin reg = IXGBE_READ_REG(hw, tqsmreg);
693 1.88.2.20 martin reg &= ~(0x000000ff << (regshift * 8));
694 1.88.2.20 martin reg |= i << (regshift * 8);
695 1.88.2.20 martin IXGBE_WRITE_REG(hw, tqsmreg, reg);
696 1.88.2.20 martin
697 1.88.2.6 snj /* Setup the HW Tx Head and Tail descriptor pointers */
698 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
699 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
700 1.88.2.6 snj
701 1.88.2.6 snj /* Cache the tail address */
702 1.88.2.6 snj txr->tail = IXGBE_TDT(j);
703 1.88.2.6 snj
704 1.88.2.20 martin txr->txr_no_space = false;
705 1.88.2.20 martin
706 1.88.2.6 snj /* Disable Head Writeback */
707 1.88.2.6 snj /*
708 1.88.2.6 snj * Note: for X550 series devices, these registers are actually
709 1.88.2.6 snj * prefixed with TPH_ isntead of DCA_, but the addresses and
710 1.88.2.6 snj * fields remain the same.
711 1.88.2.6 snj */
712 1.88.2.6 snj switch (hw->mac.type) {
713 1.88.2.6 snj case ixgbe_mac_82598EB:
714 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
715 1.88.2.6 snj break;
716 1.88.2.6 snj default:
717 1.88.2.6 snj txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
718 1.88.2.6 snj break;
719 1.88.2.6 snj }
720 1.88.2.6 snj txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
721 1.88.2.6 snj switch (hw->mac.type) {
722 1.88.2.6 snj case ixgbe_mac_82598EB:
723 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
724 1.88.2.6 snj break;
725 1.88.2.6 snj default:
726 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
727 1.88.2.6 snj break;
728 1.88.2.6 snj }
729 1.88.2.6 snj
730 1.88.2.6 snj }
731 1.88.2.6 snj
732 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
733 1.88.2.6 snj u32 dmatxctl, rttdcs;
734 1.88.2.6 snj
735 1.88.2.6 snj dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
736 1.88.2.6 snj dmatxctl |= IXGBE_DMATXCTL_TE;
737 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
738 1.88.2.6 snj /* Disable arbiter to set MTQC */
739 1.88.2.6 snj rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
740 1.88.2.6 snj rttdcs |= IXGBE_RTTDCS_ARBDIS;
741 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
742 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MTQC,
743 1.88.2.6 snj ixgbe_get_mtqc(adapter->iov_mode));
744 1.88.2.6 snj rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
745 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
746 1.88.2.6 snj }
747 1.88.2.6 snj
748 1.88.2.6 snj return;
749 1.88.2.6 snj } /* ixgbe_initialize_transmit_units */
750 1.88.2.6 snj
751 1.88.2.6 snj /************************************************************************
752 1.88.2.6 snj * ixgbe_attach - Device initialization routine
753 1.88.2.6 snj *
754 1.88.2.6 snj * Called when the driver is being loaded.
755 1.88.2.6 snj * Identifies the type of hardware, allocates all resources
756 1.88.2.6 snj * and initializes the hardware.
757 1.88.2.6 snj *
758 1.88.2.6 snj * return 0 on success, positive on failure
759 1.88.2.6 snj ************************************************************************/
760 1.88.2.6 snj static void
761 1.88.2.6 snj ixgbe_attach(device_t parent, device_t dev, void *aux)
762 1.88.2.6 snj {
763 1.88.2.6 snj struct adapter *adapter;
764 1.88.2.6 snj struct ixgbe_hw *hw;
765 1.88.2.6 snj int error = -1;
766 1.88.2.6 snj u32 ctrl_ext;
767 1.88.2.6 snj u16 high, low, nvmreg;
768 1.88.2.6 snj pcireg_t id, subid;
769 1.88.2.20 martin const ixgbe_vendor_info_t *ent;
770 1.88.2.6 snj struct pci_attach_args *pa = aux;
771 1.88.2.6 snj const char *str;
772 1.88.2.6 snj char buf[256];
773 1.88.2.6 snj
774 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_attach: begin");
775 1.88.2.6 snj
776 1.88.2.6 snj /* Allocate, clear, and link in our adapter structure */
777 1.88.2.6 snj adapter = device_private(dev);
778 1.88.2.6 snj adapter->hw.back = adapter;
779 1.88.2.6 snj adapter->dev = dev;
780 1.88.2.6 snj hw = &adapter->hw;
781 1.88.2.6 snj adapter->osdep.pc = pa->pa_pc;
782 1.88.2.6 snj adapter->osdep.tag = pa->pa_tag;
783 1.88.2.6 snj if (pci_dma64_available(pa))
784 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat64;
785 1.88.2.6 snj else
786 1.88.2.6 snj adapter->osdep.dmat = pa->pa_dmat;
787 1.88.2.6 snj adapter->osdep.attached = false;
788 1.88.2.6 snj
789 1.88.2.6 snj ent = ixgbe_lookup(pa);
790 1.88.2.6 snj
791 1.88.2.6 snj KASSERT(ent != NULL);
792 1.88.2.6 snj
793 1.88.2.6 snj aprint_normal(": %s, Version - %s\n",
794 1.88.2.6 snj ixgbe_strings[ent->index], ixgbe_driver_version);
795 1.88.2.6 snj
796 1.88.2.6 snj /* Core Lock Init*/
797 1.88.2.6 snj IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
798 1.88.2.6 snj
799 1.88.2.6 snj /* Set up the timer callout */
800 1.88.2.6 snj callout_init(&adapter->timer, IXGBE_CALLOUT_FLAGS);
801 1.88.2.6 snj
802 1.88.2.6 snj /* Determine hardware revision */
803 1.88.2.6 snj id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
804 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
805 1.88.2.6 snj
806 1.88.2.6 snj hw->vendor_id = PCI_VENDOR(id);
807 1.88.2.6 snj hw->device_id = PCI_PRODUCT(id);
808 1.88.2.6 snj hw->revision_id =
809 1.88.2.6 snj PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
810 1.88.2.6 snj hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid);
811 1.88.2.6 snj hw->subsystem_device_id = PCI_SUBSYS_ID(subid);
812 1.88.2.6 snj
813 1.88.2.6 snj /*
814 1.88.2.6 snj * Make sure BUSMASTER is set
815 1.88.2.6 snj */
816 1.88.2.6 snj ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag);
817 1.88.2.6 snj
818 1.88.2.6 snj /* Do base PCI setup - map BAR0 */
819 1.88.2.6 snj if (ixgbe_allocate_pci_resources(adapter, pa)) {
820 1.88.2.6 snj aprint_error_dev(dev, "Allocation of PCI resources failed\n");
821 1.88.2.6 snj error = ENXIO;
822 1.88.2.6 snj goto err_out;
823 1.88.2.6 snj }
824 1.88.2.6 snj
825 1.88.2.6 snj /* let hardware know driver is loaded */
826 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
827 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD;
828 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
829 1.88.2.6 snj
830 1.88.2.6 snj /*
831 1.88.2.6 snj * Initialize the shared code
832 1.88.2.6 snj */
833 1.88.2.17 martin if (ixgbe_init_shared_code(hw) != 0) {
834 1.88.2.6 snj aprint_error_dev(dev, "Unable to initialize the shared code\n");
835 1.88.2.6 snj error = ENXIO;
836 1.88.2.6 snj goto err_out;
837 1.88.2.6 snj }
838 1.88.2.6 snj
839 1.88.2.6 snj switch (hw->mac.type) {
840 1.88.2.6 snj case ixgbe_mac_82598EB:
841 1.88.2.6 snj str = "82598EB";
842 1.88.2.6 snj break;
843 1.88.2.6 snj case ixgbe_mac_82599EB:
844 1.88.2.6 snj str = "82599EB";
845 1.88.2.6 snj break;
846 1.88.2.6 snj case ixgbe_mac_X540:
847 1.88.2.6 snj str = "X540";
848 1.88.2.6 snj break;
849 1.88.2.6 snj case ixgbe_mac_X550:
850 1.88.2.6 snj str = "X550";
851 1.88.2.6 snj break;
852 1.88.2.6 snj case ixgbe_mac_X550EM_x:
853 1.88.2.6 snj str = "X550EM";
854 1.88.2.6 snj break;
855 1.88.2.6 snj case ixgbe_mac_X550EM_a:
856 1.88.2.6 snj str = "X550EM A";
857 1.88.2.6 snj break;
858 1.88.2.6 snj default:
859 1.88.2.6 snj str = "Unknown";
860 1.88.2.6 snj break;
861 1.88.2.6 snj }
862 1.88.2.6 snj aprint_normal_dev(dev, "device %s\n", str);
863 1.88.2.6 snj
864 1.88.2.6 snj if (hw->mbx.ops.init_params)
865 1.88.2.6 snj hw->mbx.ops.init_params(hw);
866 1.88.2.6 snj
867 1.88.2.6 snj hw->allow_unsupported_sfp = allow_unsupported_sfp;
868 1.88.2.6 snj
869 1.88.2.6 snj /* Pick up the 82599 settings */
870 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
871 1.88.2.6 snj hw->phy.smart_speed = ixgbe_smart_speed;
872 1.88.2.6 snj adapter->num_segs = IXGBE_82599_SCATTER;
873 1.88.2.6 snj } else
874 1.88.2.6 snj adapter->num_segs = IXGBE_82598_SCATTER;
875 1.88.2.6 snj
876 1.88.2.6 snj hw->mac.ops.set_lan_id(hw);
877 1.88.2.6 snj ixgbe_init_device_features(adapter);
878 1.88.2.6 snj
879 1.88.2.6 snj if (ixgbe_configure_interrupts(adapter)) {
880 1.88.2.6 snj error = ENXIO;
881 1.88.2.6 snj goto err_out;
882 1.88.2.6 snj }
883 1.88.2.6 snj
884 1.88.2.6 snj /* Allocate multicast array memory. */
885 1.88.2.6 snj adapter->mta = malloc(sizeof(*adapter->mta) *
886 1.88.2.6 snj MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT);
887 1.88.2.6 snj if (adapter->mta == NULL) {
888 1.88.2.6 snj aprint_error_dev(dev, "Cannot allocate multicast setup array\n");
889 1.88.2.6 snj error = ENOMEM;
890 1.88.2.6 snj goto err_out;
891 1.88.2.6 snj }
892 1.88.2.6 snj
893 1.88.2.6 snj /* Enable WoL (if supported) */
894 1.88.2.6 snj ixgbe_check_wol_support(adapter);
895 1.88.2.6 snj
896 1.88.2.6 snj /* Verify adapter fan is still functional (if applicable) */
897 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
898 1.88.2.6 snj u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
899 1.88.2.6 snj ixgbe_check_fan_failure(adapter, esdp, FALSE);
900 1.88.2.6 snj }
901 1.88.2.6 snj
902 1.88.2.6 snj /* Ensure SW/FW semaphore is free */
903 1.88.2.6 snj ixgbe_init_swfw_semaphore(hw);
904 1.88.2.6 snj
905 1.88.2.6 snj /* Enable EEE power saving */
906 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_EEE)
907 1.88.2.6 snj hw->mac.ops.setup_eee(hw, TRUE);
908 1.88.2.6 snj
909 1.88.2.6 snj /* Set an initial default flow control value */
910 1.88.2.6 snj hw->fc.requested_mode = ixgbe_flow_control;
911 1.88.2.6 snj
912 1.88.2.6 snj /* Sysctls for limiting the amount of work done in the taskqueues */
913 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "rx_processing_limit",
914 1.88.2.6 snj "max number of rx packets to process",
915 1.88.2.6 snj &adapter->rx_process_limit, ixgbe_rx_process_limit);
916 1.88.2.6 snj
917 1.88.2.6 snj ixgbe_set_sysctl_value(adapter, "tx_processing_limit",
918 1.88.2.6 snj "max number of tx packets to process",
919 1.88.2.6 snj &adapter->tx_process_limit, ixgbe_tx_process_limit);
920 1.88.2.6 snj
921 1.88.2.6 snj /* Do descriptor calc and sanity checks */
922 1.1 dyoung if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 ||
923 1.1 dyoung ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) {
924 1.1 dyoung aprint_error_dev(dev, "TXD config issue, using default!\n");
925 1.1 dyoung adapter->num_tx_desc = DEFAULT_TXD;
926 1.1 dyoung } else
927 1.1 dyoung adapter->num_tx_desc = ixgbe_txd;
928 1.1 dyoung
929 1.1 dyoung if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 ||
930 1.33 msaitoh ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) {
931 1.1 dyoung aprint_error_dev(dev, "RXD config issue, using default!\n");
932 1.1 dyoung adapter->num_rx_desc = DEFAULT_RXD;
933 1.1 dyoung } else
934 1.1 dyoung adapter->num_rx_desc = ixgbe_rxd;
935 1.1 dyoung
936 1.1 dyoung /* Allocate our TX/RX Queues */
937 1.1 dyoung if (ixgbe_allocate_queues(adapter)) {
938 1.1 dyoung error = ENOMEM;
939 1.1 dyoung goto err_out;
940 1.1 dyoung }
941 1.1 dyoung
942 1.88.2.6 snj hw->phy.reset_if_overtemp = TRUE;
943 1.88.2.6 snj error = ixgbe_reset_hw(hw);
944 1.88.2.6 snj hw->phy.reset_if_overtemp = FALSE;
945 1.1 dyoung if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
946 1.1 dyoung /*
947 1.88.2.6 snj * No optics in this port, set up
948 1.88.2.6 snj * so the timer routine will probe
949 1.88.2.6 snj * for later insertion.
950 1.88.2.6 snj */
951 1.1 dyoung adapter->sfp_probe = TRUE;
952 1.88.2.6 snj error = IXGBE_SUCCESS;
953 1.35 msaitoh } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
954 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ module detected!\n");
955 1.1 dyoung error = EIO;
956 1.1 dyoung goto err_late;
957 1.1 dyoung } else if (error) {
958 1.88.2.6 snj aprint_error_dev(dev, "Hardware initialization failed\n");
959 1.1 dyoung error = EIO;
960 1.1 dyoung goto err_late;
961 1.1 dyoung }
962 1.1 dyoung
963 1.1 dyoung /* Make sure we have a good EEPROM before we read from it */
964 1.88.2.6 snj if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL) < 0) {
965 1.48 msaitoh aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n");
966 1.1 dyoung error = EIO;
967 1.1 dyoung goto err_late;
968 1.1 dyoung }
969 1.1 dyoung
970 1.88 msaitoh aprint_normal("%s:", device_xname(dev));
971 1.88 msaitoh /* NVM Image Version */
972 1.88 msaitoh switch (hw->mac.type) {
973 1.88 msaitoh case ixgbe_mac_X540:
974 1.88.2.6 snj case ixgbe_mac_X550EM_a:
975 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
976 1.88 msaitoh if (nvmreg == 0xffff)
977 1.88 msaitoh break;
978 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
979 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
980 1.88 msaitoh id = nvmreg & 0x0f;
981 1.88.2.6 snj aprint_normal(" NVM Image Version %u.", high);
982 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
983 1.88.2.6 snj str = "%x";
984 1.88.2.6 snj else
985 1.88.2.6 snj str = "%02x";
986 1.88.2.6 snj aprint_normal(str, low);
987 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
988 1.88 msaitoh break;
989 1.88 msaitoh case ixgbe_mac_X550EM_x:
990 1.88 msaitoh case ixgbe_mac_X550:
991 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
992 1.88 msaitoh if (nvmreg == 0xffff)
993 1.88 msaitoh break;
994 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
995 1.88 msaitoh low = nvmreg & 0xff;
996 1.88.2.6 snj aprint_normal(" NVM Image Version %u.%02x,", high, low);
997 1.88 msaitoh break;
998 1.88 msaitoh default:
999 1.88 msaitoh break;
1000 1.88 msaitoh }
1001 1.88 msaitoh
1002 1.88 msaitoh /* PHY firmware revision */
1003 1.88 msaitoh switch (hw->mac.type) {
1004 1.88 msaitoh case ixgbe_mac_X540:
1005 1.88 msaitoh case ixgbe_mac_X550:
1006 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg);
1007 1.88 msaitoh if (nvmreg == 0xffff)
1008 1.88 msaitoh break;
1009 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1010 1.88 msaitoh low = (nvmreg >> 4) & 0xff;
1011 1.88 msaitoh id = nvmreg & 0x000f;
1012 1.88.2.6 snj aprint_normal(" PHY FW Revision %u.", high);
1013 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X540)
1014 1.88.2.6 snj str = "%x";
1015 1.88.2.6 snj else
1016 1.88.2.6 snj str = "%02x";
1017 1.88.2.6 snj aprint_normal(str, low);
1018 1.88.2.6 snj aprint_normal(" ID 0x%x,", id);
1019 1.88 msaitoh break;
1020 1.88 msaitoh default:
1021 1.88 msaitoh break;
1022 1.88 msaitoh }
1023 1.88 msaitoh
1024 1.88 msaitoh /* NVM Map version & OEM NVM Image version */
1025 1.88 msaitoh switch (hw->mac.type) {
1026 1.88 msaitoh case ixgbe_mac_X550:
1027 1.88 msaitoh case ixgbe_mac_X550EM_x:
1028 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1029 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg);
1030 1.88 msaitoh if (nvmreg != 0xffff) {
1031 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1032 1.88 msaitoh low = nvmreg & 0x00ff;
1033 1.88 msaitoh aprint_normal(" NVM Map version %u.%02x,", high, low);
1034 1.88 msaitoh }
1035 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg);
1036 1.88.2.6 snj if (nvmreg != 0xffff) {
1037 1.88 msaitoh high = (nvmreg >> 12) & 0x0f;
1038 1.88 msaitoh low = nvmreg & 0x00ff;
1039 1.88 msaitoh aprint_verbose(" OEM NVM Image version %u.%02x,", high,
1040 1.88 msaitoh low);
1041 1.88 msaitoh }
1042 1.88 msaitoh break;
1043 1.88 msaitoh default:
1044 1.88 msaitoh break;
1045 1.88 msaitoh }
1046 1.88 msaitoh
1047 1.88 msaitoh /* Print the ETrackID */
1048 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high);
1049 1.88 msaitoh hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low);
1050 1.88 msaitoh aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low);
1051 1.79 msaitoh
1052 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
1053 1.88.2.6 snj error = ixgbe_allocate_msix(adapter, pa);
1054 1.88.2.8 snj if (error) {
1055 1.88.2.8 snj /* Free allocated queue structures first */
1056 1.88.2.8 snj ixgbe_free_transmit_structures(adapter);
1057 1.88.2.8 snj ixgbe_free_receive_structures(adapter);
1058 1.88.2.8 snj free(adapter->queues, M_DEVBUF);
1059 1.88.2.8 snj
1060 1.88.2.8 snj /* Fallback to legacy interrupt */
1061 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSIX;
1062 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_MSI)
1063 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
1064 1.88.2.8 snj adapter->num_queues = 1;
1065 1.88.2.8 snj
1066 1.88.2.8 snj /* Allocate our TX/RX Queues again */
1067 1.88.2.8 snj if (ixgbe_allocate_queues(adapter)) {
1068 1.88.2.8 snj error = ENOMEM;
1069 1.88.2.8 snj goto err_out;
1070 1.88.2.8 snj }
1071 1.88.2.8 snj }
1072 1.88.2.8 snj }
1073 1.88.2.8 snj if ((adapter->feat_en & IXGBE_FEATURE_MSIX) == 0)
1074 1.88.2.6 snj error = ixgbe_allocate_legacy(adapter, pa);
1075 1.88.2.6 snj if (error)
1076 1.88.2.6 snj goto err_late;
1077 1.88.2.6 snj
1078 1.88.2.8 snj /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */
1079 1.88.2.8 snj adapter->link_si = softint_establish(SOFTINT_NET |IXGBE_SOFTINFT_FLAGS,
1080 1.88.2.8 snj ixgbe_handle_link, adapter);
1081 1.88.2.8 snj adapter->mod_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1082 1.88.2.8 snj ixgbe_handle_mod, adapter);
1083 1.88.2.8 snj adapter->msf_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1084 1.88.2.8 snj ixgbe_handle_msf, adapter);
1085 1.88.2.8 snj adapter->phy_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1086 1.88.2.8 snj ixgbe_handle_phy, adapter);
1087 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
1088 1.88.2.8 snj adapter->fdir_si =
1089 1.88.2.8 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
1090 1.88.2.8 snj ixgbe_reinit_fdir, adapter);
1091 1.88.2.8 snj if ((adapter->link_si == NULL) || (adapter->mod_si == NULL)
1092 1.88.2.8 snj || (adapter->msf_si == NULL) || (adapter->phy_si == NULL)
1093 1.88.2.8 snj || ((adapter->feat_en & IXGBE_FEATURE_FDIR)
1094 1.88.2.8 snj && (adapter->fdir_si == NULL))) {
1095 1.88.2.8 snj aprint_error_dev(dev,
1096 1.88.2.8 snj "could not establish software interrupts ()\n");
1097 1.88.2.8 snj goto err_out;
1098 1.88.2.8 snj }
1099 1.88.2.8 snj
1100 1.88.2.6 snj error = ixgbe_start_hw(hw);
1101 1.25 msaitoh switch (error) {
1102 1.25 msaitoh case IXGBE_ERR_EEPROM_VERSION:
1103 1.1 dyoung aprint_error_dev(dev, "This device is a pre-production adapter/"
1104 1.1 dyoung "LOM. Please be aware there may be issues associated "
1105 1.48 msaitoh "with your hardware.\nIf you are experiencing problems "
1106 1.1 dyoung "please contact your Intel or hardware representative "
1107 1.1 dyoung "who provided you with this hardware.\n");
1108 1.25 msaitoh break;
1109 1.25 msaitoh case IXGBE_ERR_SFP_NOT_SUPPORTED:
1110 1.48 msaitoh aprint_error_dev(dev, "Unsupported SFP+ Module\n");
1111 1.1 dyoung error = EIO;
1112 1.1 dyoung goto err_late;
1113 1.25 msaitoh case IXGBE_ERR_SFP_NOT_PRESENT:
1114 1.48 msaitoh aprint_error_dev(dev, "No SFP+ Module found\n");
1115 1.25 msaitoh /* falls thru */
1116 1.25 msaitoh default:
1117 1.25 msaitoh break;
1118 1.1 dyoung }
1119 1.1 dyoung
1120 1.88.2.8 snj /* Setup OS specific network interface */
1121 1.88.2.8 snj if (ixgbe_setup_interface(dev, adapter) != 0)
1122 1.88.2.8 snj goto err_late;
1123 1.88.2.8 snj
1124 1.88.2.6 snj /*
1125 1.88.2.6 snj * Print PHY ID only for copper PHY. On device which has SFP(+) cage
1126 1.88.2.6 snj * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID.
1127 1.88.2.6 snj */
1128 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_copper) {
1129 1.88.2.2 snj uint16_t id1, id2;
1130 1.88.2.2 snj int oui, model, rev;
1131 1.88.2.2 snj const char *descr;
1132 1.88.2.2 snj
1133 1.88.2.2 snj id1 = hw->phy.id >> 16;
1134 1.88.2.2 snj id2 = hw->phy.id & 0xffff;
1135 1.88.2.2 snj oui = MII_OUI(id1, id2);
1136 1.88.2.2 snj model = MII_MODEL(id2);
1137 1.88.2.2 snj rev = MII_REV(id2);
1138 1.88.2.2 snj if ((descr = mii_get_descr(oui, model)) != NULL)
1139 1.88.2.2 snj aprint_normal_dev(dev,
1140 1.88.2.2 snj "PHY: %s (OUI 0x%06x, model 0x%04x), rev. %d\n",
1141 1.88.2.2 snj descr, oui, model, rev);
1142 1.88.2.2 snj else
1143 1.88.2.2 snj aprint_normal_dev(dev,
1144 1.88.2.2 snj "PHY OUI 0x%06x, model 0x%04x, rev. %d\n",
1145 1.88.2.2 snj oui, model, rev);
1146 1.88.2.2 snj }
1147 1.88.2.2 snj
1148 1.52 msaitoh /* Enable the optics for 82599 SFP+ fiber */
1149 1.52 msaitoh ixgbe_enable_tx_laser(hw);
1150 1.52 msaitoh
1151 1.52 msaitoh /* Enable power to the phy. */
1152 1.52 msaitoh ixgbe_set_phy_power(hw, TRUE);
1153 1.52 msaitoh
1154 1.1 dyoung /* Initialize statistics */
1155 1.1 dyoung ixgbe_update_stats_counters(adapter);
1156 1.1 dyoung
1157 1.88.2.6 snj /* Check PCIE slot type/speed/width */
1158 1.48 msaitoh ixgbe_get_slot_info(adapter);
1159 1.1 dyoung
1160 1.88.2.6 snj /*
1161 1.88.2.6 snj * Do time init and sysctl init here, but
1162 1.88.2.6 snj * only on the first port of a bypass adapter.
1163 1.88.2.6 snj */
1164 1.88.2.6 snj ixgbe_bypass_init(adapter);
1165 1.45 msaitoh
1166 1.88.2.6 snj /* Set an initial dmac value */
1167 1.88.2.6 snj adapter->dmac = 0;
1168 1.88.2.6 snj /* Set initial advertised speeds (if applicable) */
1169 1.88.2.6 snj adapter->advertise = ixgbe_get_advertise(adapter);
1170 1.45 msaitoh
1171 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
1172 1.88.2.6 snj ixgbe_define_iov_schemas(dev, &error);
1173 1.44 msaitoh
1174 1.44 msaitoh /* Add sysctls */
1175 1.44 msaitoh ixgbe_add_device_sysctls(adapter);
1176 1.44 msaitoh ixgbe_add_hw_stats(adapter);
1177 1.44 msaitoh
1178 1.88.2.6 snj /* For Netmap */
1179 1.88.2.6 snj adapter->init_locked = ixgbe_init_locked;
1180 1.88.2.6 snj adapter->stop_locked = ixgbe_stop;
1181 1.1 dyoung
1182 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
1183 1.88.2.6 snj ixgbe_netmap_attach(adapter);
1184 1.88.2.6 snj
1185 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_cap);
1186 1.88.2.6 snj aprint_verbose_dev(dev, "feature cap %s\n", buf);
1187 1.88.2.6 snj snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_en);
1188 1.88.2.6 snj aprint_verbose_dev(dev, "feature ena %s\n", buf);
1189 1.44 msaitoh
1190 1.44 msaitoh if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume))
1191 1.44 msaitoh pmf_class_network_register(dev, adapter->ifp);
1192 1.44 msaitoh else
1193 1.44 msaitoh aprint_error_dev(dev, "couldn't establish power handler\n");
1194 1.44 msaitoh
1195 1.1 dyoung INIT_DEBUGOUT("ixgbe_attach: end");
1196 1.32 msaitoh adapter->osdep.attached = true;
1197 1.88.2.6 snj
1198 1.1 dyoung return;
1199 1.43 msaitoh
1200 1.1 dyoung err_late:
1201 1.1 dyoung ixgbe_free_transmit_structures(adapter);
1202 1.1 dyoung ixgbe_free_receive_structures(adapter);
1203 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
1204 1.1 dyoung err_out:
1205 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1206 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
1207 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
1208 1.88.2.8 snj ixgbe_free_softint(adapter);
1209 1.1 dyoung ixgbe_free_pci_resources(adapter);
1210 1.1 dyoung if (adapter->mta != NULL)
1211 1.1 dyoung free(adapter->mta, M_DEVBUF);
1212 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
1213 1.88.2.6 snj
1214 1.1 dyoung return;
1215 1.88.2.6 snj } /* ixgbe_attach */
1216 1.1 dyoung
1217 1.88.2.6 snj /************************************************************************
1218 1.88.2.6 snj * ixgbe_check_wol_support
1219 1.1 dyoung *
1220 1.88.2.6 snj * Checks whether the adapter's ports are capable of
1221 1.88.2.6 snj * Wake On LAN by reading the adapter's NVM.
1222 1.1 dyoung *
1223 1.88.2.6 snj * Sets each port's hw->wol_enabled value depending
1224 1.88.2.6 snj * on the value read here.
1225 1.88.2.6 snj ************************************************************************/
1226 1.88.2.6 snj static void
1227 1.88.2.6 snj ixgbe_check_wol_support(struct adapter *adapter)
1228 1.1 dyoung {
1229 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1230 1.88.2.6 snj u16 dev_caps = 0;
1231 1.1 dyoung
1232 1.88.2.6 snj /* Find out WoL support for port */
1233 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 0;
1234 1.88.2.6 snj ixgbe_get_device_caps(hw, &dev_caps);
1235 1.88.2.6 snj if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1236 1.88.2.6 snj ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1237 1.88.2.6 snj hw->bus.func == 0))
1238 1.88.2.6 snj adapter->wol_support = hw->wol_enabled = 1;
1239 1.1 dyoung
1240 1.88.2.6 snj /* Save initial wake up filter configuration */
1241 1.88.2.6 snj adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);
1242 1.1 dyoung
1243 1.88.2.6 snj return;
1244 1.88.2.6 snj } /* ixgbe_check_wol_support */
1245 1.45 msaitoh
1246 1.88.2.6 snj /************************************************************************
1247 1.88.2.6 snj * ixgbe_setup_interface
1248 1.88.2.6 snj *
1249 1.88.2.6 snj * Setup networking device structure and register an interface.
1250 1.88.2.6 snj ************************************************************************/
1251 1.88.2.6 snj static int
1252 1.88.2.6 snj ixgbe_setup_interface(device_t dev, struct adapter *adapter)
1253 1.88.2.6 snj {
1254 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
1255 1.88.2.6 snj struct ifnet *ifp;
1256 1.88.2.6 snj int rv;
1257 1.49 msaitoh
1258 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_setup_interface: begin");
1259 1.1 dyoung
1260 1.88.2.6 snj ifp = adapter->ifp = &ec->ec_if;
1261 1.88.2.6 snj strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ);
1262 1.88.2.6 snj ifp->if_baudrate = IF_Gbps(10);
1263 1.88.2.6 snj ifp->if_init = ixgbe_init;
1264 1.88.2.6 snj ifp->if_stop = ixgbe_ifstop;
1265 1.88.2.6 snj ifp->if_softc = adapter;
1266 1.88.2.6 snj ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1267 1.88.2.6 snj #ifdef IXGBE_MPSAFE
1268 1.88.2.7 snj ifp->if_extflags = IFEF_MPSAFE;
1269 1.26 msaitoh #endif
1270 1.88.2.6 snj ifp->if_ioctl = ixgbe_ioctl;
1271 1.88.2.6 snj #if __FreeBSD_version >= 1100045
1272 1.88.2.6 snj /* TSO parameters */
1273 1.88.2.6 snj ifp->if_hw_tsomax = 65518;
1274 1.88.2.6 snj ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER;
1275 1.88.2.6 snj ifp->if_hw_tsomaxsegsize = 2048;
1276 1.45 msaitoh #endif
1277 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_LEGACY_TX) {
1278 1.88.2.6 snj #if 0
1279 1.88.2.6 snj ixgbe_start_locked = ixgbe_legacy_start_locked;
1280 1.88.2.6 snj #endif
1281 1.88.2.6 snj } else {
1282 1.88.2.6 snj ifp->if_transmit = ixgbe_mq_start;
1283 1.88.2.6 snj #if 0
1284 1.88.2.6 snj ixgbe_start_locked = ixgbe_mq_start_locked;
1285 1.1 dyoung #endif
1286 1.88.2.6 snj }
1287 1.88.2.6 snj ifp->if_start = ixgbe_legacy_start;
1288 1.88.2.6 snj IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2);
1289 1.88.2.6 snj IFQ_SET_READY(&ifp->if_snd);
1290 1.1 dyoung
1291 1.88.2.6 snj rv = if_initialize(ifp);
1292 1.88.2.6 snj if (rv != 0) {
1293 1.88.2.6 snj aprint_error_dev(dev, "if_initialize failed(%d)\n", rv);
1294 1.88.2.6 snj return rv;
1295 1.88.2.6 snj }
1296 1.88.2.6 snj adapter->ipq = if_percpuq_create(&adapter->osdep.ec.ec_if);
1297 1.88.2.6 snj ether_ifattach(ifp, adapter->hw.mac.addr);
1298 1.88.2.6 snj /*
1299 1.88.2.6 snj * We use per TX queue softint, so if_deferred_start_init() isn't
1300 1.88.2.6 snj * used.
1301 1.88.2.6 snj */
1302 1.88.2.6 snj ether_set_ifflags_cb(ec, ixgbe_ifflags_cb);
1303 1.1 dyoung
1304 1.88.2.6 snj adapter->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1305 1.1 dyoung
1306 1.88.2.6 snj /*
1307 1.88.2.6 snj * Tell the upper layer(s) we support long frames.
1308 1.88.2.6 snj */
1309 1.88.2.6 snj ifp->if_hdrlen = sizeof(struct ether_vlan_header);
1310 1.26 msaitoh
1311 1.88.2.6 snj /* Set capability flags */
1312 1.88.2.6 snj ifp->if_capabilities |= IFCAP_RXCSUM
1313 1.88.2.6 snj | IFCAP_TXCSUM
1314 1.88.2.6 snj | IFCAP_TSOv4
1315 1.88.2.25 martin | IFCAP_TSOv6;
1316 1.88.2.6 snj ifp->if_capenable = 0;
1317 1.1 dyoung
1318 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING
1319 1.88.2.6 snj | ETHERCAP_VLAN_HWCSUM
1320 1.88.2.6 snj | ETHERCAP_JUMBO_MTU
1321 1.88.2.6 snj | ETHERCAP_VLAN_MTU;
1322 1.1 dyoung
1323 1.88.2.6 snj /* Enable the above capabilities by default */
1324 1.88.2.6 snj ec->ec_capenable = ec->ec_capabilities;
1325 1.1 dyoung
1326 1.88.2.6 snj /*
1327 1.88.2.6 snj * Don't turn this on by default, if vlans are
1328 1.88.2.6 snj * created on another pseudo device (eg. lagg)
1329 1.88.2.6 snj * then vlan events are not passed thru, breaking
1330 1.88.2.6 snj * operation, but with HW FILTER off it works. If
1331 1.88.2.6 snj * using vlans directly on the ixgbe driver you can
1332 1.88.2.6 snj * enable this and get full hardware tag filtering.
1333 1.88.2.6 snj */
1334 1.88.2.6 snj ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER;
1335 1.1 dyoung
1336 1.88.2.6 snj /*
1337 1.88.2.6 snj * Specify the media types supported by this adapter and register
1338 1.88.2.6 snj * callbacks to update media and link information
1339 1.88.2.6 snj */
1340 1.88.2.6 snj ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change,
1341 1.88.2.6 snj ixgbe_media_status);
1342 1.1 dyoung
1343 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw);
1344 1.88.2.6 snj ixgbe_add_media_types(adapter);
1345 1.1 dyoung
1346 1.88.2.6 snj /* Set autoselect media by default */
1347 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
1348 1.1 dyoung
1349 1.88.2.19 martin if_register(ifp);
1350 1.88.2.19 martin
1351 1.88.2.6 snj return (0);
1352 1.88.2.6 snj } /* ixgbe_setup_interface */
1353 1.1 dyoung
1354 1.88.2.6 snj /************************************************************************
1355 1.88.2.6 snj * ixgbe_add_media_types
1356 1.88.2.6 snj ************************************************************************/
1357 1.88.2.6 snj static void
1358 1.88.2.6 snj ixgbe_add_media_types(struct adapter *adapter)
1359 1.1 dyoung {
1360 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1361 1.88.2.6 snj device_t dev = adapter->dev;
1362 1.88.2.6 snj u64 layer;
1363 1.44 msaitoh
1364 1.88.2.6 snj layer = adapter->phy_layer;
1365 1.44 msaitoh
1366 1.88.2.6 snj #define ADD(mm, dd) \
1367 1.88.2.6 snj ifmedia_add(&adapter->media, IFM_ETHER | (mm), (dd), NULL);
1368 1.44 msaitoh
1369 1.88.2.16 martin ADD(IFM_NONE, 0);
1370 1.88.2.16 martin
1371 1.88.2.6 snj /* Media types with matching NetBSD media defines */
1372 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) {
1373 1.88.2.6 snj ADD(IFM_10G_T | IFM_FDX, 0);
1374 1.88.2.6 snj }
1375 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) {
1376 1.88.2.6 snj ADD(IFM_1000_T | IFM_FDX, 0);
1377 1.88.2.6 snj }
1378 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) {
1379 1.88.2.6 snj ADD(IFM_100_TX | IFM_FDX, 0);
1380 1.88.2.6 snj }
1381 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) {
1382 1.88.2.6 snj ADD(IFM_10_T | IFM_FDX, 0);
1383 1.88.2.6 snj }
1384 1.44 msaitoh
1385 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
1386 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) {
1387 1.88.2.6 snj ADD(IFM_10G_TWINAX | IFM_FDX, 0);
1388 1.88.2.6 snj }
1389 1.44 msaitoh
1390 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) {
1391 1.88.2.6 snj ADD(IFM_10G_LR | IFM_FDX, 0);
1392 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1393 1.88.2.6 snj ADD(IFM_1000_LX | IFM_FDX, 0);
1394 1.88.2.6 snj }
1395 1.88.2.6 snj }
1396 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) {
1397 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1398 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1399 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1400 1.88.2.6 snj }
1401 1.88.2.6 snj } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) {
1402 1.88.2.6 snj ADD(IFM_1000_SX | IFM_FDX, 0);
1403 1.88.2.6 snj }
1404 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) {
1405 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1406 1.88.2.6 snj }
1407 1.44 msaitoh
1408 1.88.2.6 snj #ifdef IFM_ETH_XTYPE
1409 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1410 1.88.2.6 snj ADD(IFM_10G_KR | IFM_FDX, 0);
1411 1.88.2.6 snj }
1412 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1413 1.88.2.6 snj ADD(AIFM_10G_KX4 | IFM_FDX, 0);
1414 1.88.2.6 snj }
1415 1.88.2.6 snj #else
1416 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1417 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKR\n");
1418 1.88.2.6 snj device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n");
1419 1.88.2.6 snj ADD(IFM_10G_SR | IFM_FDX, 0);
1420 1.88.2.6 snj }
1421 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1422 1.88.2.6 snj device_printf(dev, "Media supported: 10GbaseKX4\n");
1423 1.88.2.6 snj device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n");
1424 1.88.2.6 snj ADD(IFM_10G_CX4 | IFM_FDX, 0);
1425 1.88.2.6 snj }
1426 1.88.2.6 snj #endif
1427 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) {
1428 1.88.2.6 snj ADD(IFM_1000_KX | IFM_FDX, 0);
1429 1.88.2.6 snj }
1430 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) {
1431 1.88.2.6 snj ADD(IFM_2500_KX | IFM_FDX, 0);
1432 1.88.2.6 snj }
1433 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) {
1434 1.88.2.6 snj ADD(IFM_2500_T | IFM_FDX, 0);
1435 1.88.2.6 snj }
1436 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) {
1437 1.88.2.6 snj ADD(IFM_5000_T | IFM_FDX, 0);
1438 1.88.2.6 snj }
1439 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX)
1440 1.88.2.6 snj device_printf(dev, "Media supported: 1000baseBX\n");
1441 1.88.2.6 snj /* XXX no ifmedia_set? */
1442 1.88.2.6 snj
1443 1.88.2.6 snj ADD(IFM_AUTO, 0);
1444 1.44 msaitoh
1445 1.88.2.6 snj #undef ADD
1446 1.88.2.6 snj } /* ixgbe_add_media_types */
1447 1.44 msaitoh
1448 1.88.2.6 snj /************************************************************************
1449 1.88.2.6 snj * ixgbe_is_sfp
1450 1.88.2.6 snj ************************************************************************/
1451 1.88.2.6 snj static inline bool
1452 1.88.2.6 snj ixgbe_is_sfp(struct ixgbe_hw *hw)
1453 1.88.2.6 snj {
1454 1.88.2.6 snj switch (hw->mac.type) {
1455 1.88.2.6 snj case ixgbe_mac_82598EB:
1456 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_nl)
1457 1.88.2.17 martin return (TRUE);
1458 1.88.2.17 martin return (FALSE);
1459 1.88.2.6 snj case ixgbe_mac_82599EB:
1460 1.88.2.6 snj switch (hw->mac.ops.get_media_type(hw)) {
1461 1.88.2.6 snj case ixgbe_media_type_fiber:
1462 1.88.2.6 snj case ixgbe_media_type_fiber_qsfp:
1463 1.88.2.17 martin return (TRUE);
1464 1.88.2.6 snj default:
1465 1.88.2.17 martin return (FALSE);
1466 1.88.2.6 snj }
1467 1.88.2.6 snj case ixgbe_mac_X550EM_x:
1468 1.88.2.6 snj case ixgbe_mac_X550EM_a:
1469 1.88.2.6 snj if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)
1470 1.88.2.17 martin return (TRUE);
1471 1.88.2.17 martin return (FALSE);
1472 1.88.2.6 snj default:
1473 1.88.2.17 martin return (FALSE);
1474 1.88.2.6 snj }
1475 1.88.2.6 snj } /* ixgbe_is_sfp */
1476 1.44 msaitoh
1477 1.88.2.6 snj /************************************************************************
1478 1.88.2.6 snj * ixgbe_config_link
1479 1.88.2.6 snj ************************************************************************/
1480 1.88.2.6 snj static void
1481 1.88.2.6 snj ixgbe_config_link(struct adapter *adapter)
1482 1.44 msaitoh {
1483 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
1484 1.88.2.6 snj u32 autoneg, err = 0;
1485 1.88.2.6 snj bool sfp, negotiate = false;
1486 1.44 msaitoh
1487 1.88.2.6 snj sfp = ixgbe_is_sfp(hw);
1488 1.44 msaitoh
1489 1.88.2.6 snj if (sfp) {
1490 1.88.2.6 snj if (hw->phy.multispeed_fiber) {
1491 1.88.2.6 snj ixgbe_enable_tx_laser(hw);
1492 1.88.2.6 snj kpreempt_disable();
1493 1.88.2.6 snj softint_schedule(adapter->msf_si);
1494 1.88.2.6 snj kpreempt_enable();
1495 1.88.2.6 snj }
1496 1.88.2.17 martin kpreempt_disable();
1497 1.88.2.17 martin softint_schedule(adapter->mod_si);
1498 1.88.2.17 martin kpreempt_enable();
1499 1.88.2.6 snj } else {
1500 1.88.2.16 martin struct ifmedia *ifm = &adapter->media;
1501 1.88.2.16 martin
1502 1.88.2.6 snj if (hw->mac.ops.check_link)
1503 1.88.2.6 snj err = ixgbe_check_link(hw, &adapter->link_speed,
1504 1.88.2.6 snj &adapter->link_up, FALSE);
1505 1.88.2.6 snj if (err)
1506 1.88.2.17 martin return;
1507 1.88.2.16 martin
1508 1.88.2.16 martin /*
1509 1.88.2.16 martin * Check if it's the first call. If it's the first call,
1510 1.88.2.16 martin * get value for auto negotiation.
1511 1.88.2.16 martin */
1512 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
1513 1.88.2.16 martin if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE)
1514 1.88.2.16 martin && ((!autoneg) && (hw->mac.ops.get_link_capabilities)))
1515 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1516 1.88.2.6 snj &negotiate);
1517 1.88.2.6 snj if (err)
1518 1.88.2.17 martin return;
1519 1.88.2.6 snj if (hw->mac.ops.setup_link)
1520 1.88.2.6 snj err = hw->mac.ops.setup_link(hw, autoneg,
1521 1.88.2.6 snj adapter->link_up);
1522 1.88.2.6 snj }
1523 1.44 msaitoh
1524 1.88.2.6 snj } /* ixgbe_config_link */
1525 1.1 dyoung
1526 1.88.2.6 snj /************************************************************************
1527 1.88.2.6 snj * ixgbe_update_stats_counters - Update board statistics counters.
1528 1.88.2.6 snj ************************************************************************/
1529 1.88.2.6 snj static void
1530 1.88.2.6 snj ixgbe_update_stats_counters(struct adapter *adapter)
1531 1.1 dyoung {
1532 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
1533 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
1534 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1535 1.88.2.6 snj u32 missed_rx = 0, bprc, lxon, lxoff, total;
1536 1.88.2.6 snj u64 total_missed_rx = 0;
1537 1.88.2.6 snj uint64_t crcerrs, rlec;
1538 1.1 dyoung
1539 1.88.2.6 snj crcerrs = IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1540 1.88.2.6 snj stats->crcerrs.ev_count += crcerrs;
1541 1.88.2.6 snj stats->illerrc.ev_count += IXGBE_READ_REG(hw, IXGBE_ILLERRC);
1542 1.88.2.6 snj stats->errbc.ev_count += IXGBE_READ_REG(hw, IXGBE_ERRBC);
1543 1.88.2.6 snj stats->mspdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MSPDC);
1544 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_X550)
1545 1.88.2.6 snj stats->mbsdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MBSDC);
1546 1.1 dyoung
1547 1.88.2.20 martin /* 16 registers */
1548 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->qprc); i++) {
1549 1.88.2.6 snj int j = i % adapter->num_queues;
1550 1.88.2.20 martin
1551 1.88.2.6 snj stats->qprc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
1552 1.88.2.6 snj stats->qptc[j].ev_count += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
1553 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB) {
1554 1.88.2.20 martin stats->qprdc[j].ev_count
1555 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
1556 1.88.2.20 martin }
1557 1.88.2.6 snj }
1558 1.88.2.20 martin
1559 1.88.2.20 martin /* 8 registers */
1560 1.88.2.6 snj for (int i = 0; i < __arraycount(stats->mpc); i++) {
1561 1.88.2.6 snj uint32_t mp;
1562 1.88.2.6 snj int j = i % adapter->num_queues;
1563 1.1 dyoung
1564 1.88.2.20 martin /* MPC */
1565 1.88.2.6 snj mp = IXGBE_READ_REG(hw, IXGBE_MPC(i));
1566 1.88.2.6 snj /* global total per queue */
1567 1.88.2.6 snj stats->mpc[j].ev_count += mp;
1568 1.88.2.6 snj /* running comprehensive total for stats display */
1569 1.88.2.6 snj total_missed_rx += mp;
1570 1.1 dyoung
1571 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1572 1.88.2.6 snj stats->rnbc[j].ev_count
1573 1.88.2.6 snj += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
1574 1.88.2.20 martin
1575 1.88.2.20 martin stats->pxontxc[j].ev_count
1576 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
1577 1.88.2.20 martin stats->pxofftxc[j].ev_count
1578 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
1579 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB) {
1580 1.88.2.20 martin stats->pxonrxc[j].ev_count
1581 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
1582 1.88.2.20 martin stats->pxoffrxc[j].ev_count
1583 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1584 1.88.2.20 martin stats->pxon2offc[j].ev_count
1585 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i));
1586 1.88.2.20 martin } else {
1587 1.88.2.20 martin stats->pxonrxc[j].ev_count
1588 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
1589 1.88.2.20 martin stats->pxoffrxc[j].ev_count
1590 1.88.2.20 martin += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1591 1.88.2.20 martin }
1592 1.88.2.6 snj }
1593 1.88.2.6 snj stats->mpctotal.ev_count += total_missed_rx;
1594 1.23 msaitoh
1595 1.88.2.6 snj /* Document says M[LR]FC are valid when link is up and 10Gbps */
1596 1.88.2.6 snj if ((adapter->link_active == TRUE)
1597 1.88.2.6 snj && (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) {
1598 1.88.2.6 snj stats->mlfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MLFC);
1599 1.88.2.6 snj stats->mrfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MRFC);
1600 1.88.2.6 snj }
1601 1.88.2.6 snj rlec = IXGBE_READ_REG(hw, IXGBE_RLEC);
1602 1.88.2.6 snj stats->rlec.ev_count += rlec;
1603 1.1 dyoung
1604 1.88.2.6 snj /* Hardware workaround, gprc counts missed packets */
1605 1.88.2.6 snj stats->gprc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx;
1606 1.1 dyoung
1607 1.88.2.6 snj lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1608 1.88.2.6 snj stats->lxontxc.ev_count += lxon;
1609 1.88.2.6 snj lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1610 1.88.2.6 snj stats->lxofftxc.ev_count += lxoff;
1611 1.88.2.6 snj total = lxon + lxoff;
1612 1.1 dyoung
1613 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1614 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCL) +
1615 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
1616 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
1617 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) - total * ETHER_MIN_LEN;
1618 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORL) +
1619 1.88.2.6 snj ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);
1620 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
1621 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
1622 1.88.2.6 snj } else {
1623 1.88.2.6 snj stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1624 1.88.2.6 snj stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1625 1.88.2.6 snj /* 82598 only has a counter in the high register */
1626 1.88.2.6 snj stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCH);
1627 1.88.2.6 snj stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCH) - total * ETHER_MIN_LEN;
1628 1.88.2.6 snj stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORH);
1629 1.1 dyoung }
1630 1.1 dyoung
1631 1.88.2.6 snj /*
1632 1.88.2.6 snj * Workaround: mprc hardware is incorrectly counting
1633 1.88.2.6 snj * broadcasts, so for now we subtract those.
1634 1.88.2.6 snj */
1635 1.88.2.6 snj bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1636 1.88.2.6 snj stats->bprc.ev_count += bprc;
1637 1.88.2.6 snj stats->mprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPRC)
1638 1.88.2.6 snj - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0);
1639 1.33 msaitoh
1640 1.88.2.6 snj stats->prc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC64);
1641 1.88.2.6 snj stats->prc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC127);
1642 1.88.2.6 snj stats->prc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC255);
1643 1.88.2.6 snj stats->prc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC511);
1644 1.88.2.6 snj stats->prc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1645 1.88.2.6 snj stats->prc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1646 1.88.2.6 snj
1647 1.88.2.6 snj stats->gptc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPTC) - total;
1648 1.88.2.6 snj stats->mptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPTC) - total;
1649 1.88.2.6 snj stats->ptc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC64) - total;
1650 1.88.2.6 snj
1651 1.88.2.6 snj stats->ruc.ev_count += IXGBE_READ_REG(hw, IXGBE_RUC);
1652 1.88.2.6 snj stats->rfc.ev_count += IXGBE_READ_REG(hw, IXGBE_RFC);
1653 1.88.2.6 snj stats->roc.ev_count += IXGBE_READ_REG(hw, IXGBE_ROC);
1654 1.88.2.6 snj stats->rjc.ev_count += IXGBE_READ_REG(hw, IXGBE_RJC);
1655 1.88.2.6 snj stats->mngprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPRC);
1656 1.88.2.6 snj stats->mngpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPDC);
1657 1.88.2.6 snj stats->mngptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPTC);
1658 1.88.2.6 snj stats->tpr.ev_count += IXGBE_READ_REG(hw, IXGBE_TPR);
1659 1.88.2.6 snj stats->tpt.ev_count += IXGBE_READ_REG(hw, IXGBE_TPT);
1660 1.88.2.6 snj stats->ptc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC127);
1661 1.88.2.6 snj stats->ptc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC255);
1662 1.88.2.6 snj stats->ptc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC511);
1663 1.88.2.6 snj stats->ptc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1023);
1664 1.88.2.6 snj stats->ptc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1522);
1665 1.88.2.6 snj stats->bptc.ev_count += IXGBE_READ_REG(hw, IXGBE_BPTC);
1666 1.88.2.6 snj stats->xec.ev_count += IXGBE_READ_REG(hw, IXGBE_XEC);
1667 1.88.2.6 snj stats->fccrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCCRC);
1668 1.88.2.6 snj stats->fclast.ev_count += IXGBE_READ_REG(hw, IXGBE_FCLAST);
1669 1.88.2.6 snj /* Only read FCOE on 82599 */
1670 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
1671 1.88.2.6 snj stats->fcoerpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
1672 1.88.2.6 snj stats->fcoeprc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
1673 1.88.2.6 snj stats->fcoeptc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
1674 1.88.2.6 snj stats->fcoedwrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
1675 1.88.2.6 snj stats->fcoedwtc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
1676 1.1 dyoung }
1677 1.28 msaitoh
1678 1.88.2.6 snj /* Fill out the OS statistics structure */
1679 1.88.2.6 snj /*
1680 1.88.2.6 snj * NetBSD: Don't override if_{i|o}{packets|bytes|mcasts} with
1681 1.88.2.6 snj * adapter->stats counters. It's required to make ifconfig -z
1682 1.88.2.6 snj * (SOICZIFDATA) work.
1683 1.88.2.6 snj */
1684 1.88.2.6 snj ifp->if_collisions = 0;
1685 1.1 dyoung
1686 1.88.2.6 snj /* Rx Errors */
1687 1.88.2.6 snj ifp->if_iqdrops += total_missed_rx;
1688 1.88.2.6 snj ifp->if_ierrors += crcerrs + rlec;
1689 1.88.2.6 snj } /* ixgbe_update_stats_counters */
1690 1.48 msaitoh
1691 1.88.2.6 snj /************************************************************************
1692 1.88.2.6 snj * ixgbe_add_hw_stats
1693 1.1 dyoung *
1694 1.88.2.6 snj * Add sysctl variables, one per statistic, to the system.
1695 1.88.2.6 snj ************************************************************************/
1696 1.1 dyoung static void
1697 1.88.2.6 snj ixgbe_add_hw_stats(struct adapter *adapter)
1698 1.1 dyoung {
1699 1.88.2.6 snj device_t dev = adapter->dev;
1700 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
1701 1.88.2.6 snj struct sysctllog **log = &adapter->sysctllog;
1702 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
1703 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
1704 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
1705 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
1706 1.88.2.6 snj const char *xname = device_xname(dev);
1707 1.88.2.17 martin int i;
1708 1.1 dyoung
1709 1.88.2.6 snj /* Driver Statistics */
1710 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig_tx_dma_setup, EVCNT_TYPE_MISC,
1711 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EFBIG");
1712 1.88.2.6 snj evcnt_attach_dynamic(&adapter->mbuf_defrag_failed, EVCNT_TYPE_MISC,
1713 1.88.2.6 snj NULL, xname, "m_defrag() failed");
1714 1.88.2.6 snj evcnt_attach_dynamic(&adapter->efbig2_tx_dma_setup, EVCNT_TYPE_MISC,
1715 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EFBIG");
1716 1.88.2.6 snj evcnt_attach_dynamic(&adapter->einval_tx_dma_setup, EVCNT_TYPE_MISC,
1717 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail EINVAL");
1718 1.88.2.6 snj evcnt_attach_dynamic(&adapter->other_tx_dma_setup, EVCNT_TYPE_MISC,
1719 1.88.2.6 snj NULL, xname, "Driver tx dma hard fail other");
1720 1.88.2.6 snj evcnt_attach_dynamic(&adapter->eagain_tx_dma_setup, EVCNT_TYPE_MISC,
1721 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail EAGAIN");
1722 1.88.2.6 snj evcnt_attach_dynamic(&adapter->enomem_tx_dma_setup, EVCNT_TYPE_MISC,
1723 1.88.2.6 snj NULL, xname, "Driver tx dma soft fail ENOMEM");
1724 1.88.2.6 snj evcnt_attach_dynamic(&adapter->watchdog_events, EVCNT_TYPE_MISC,
1725 1.88.2.6 snj NULL, xname, "Watchdog timeouts");
1726 1.88.2.6 snj evcnt_attach_dynamic(&adapter->tso_err, EVCNT_TYPE_MISC,
1727 1.88.2.6 snj NULL, xname, "TSO errors");
1728 1.88.2.6 snj evcnt_attach_dynamic(&adapter->link_irq, EVCNT_TYPE_INTR,
1729 1.88.2.6 snj NULL, xname, "Link MSI-X IRQ Handled");
1730 1.88.2.15 martin evcnt_attach_dynamic(&adapter->link_sicount, EVCNT_TYPE_INTR,
1731 1.88.2.15 martin NULL, xname, "Link softint");
1732 1.88.2.15 martin evcnt_attach_dynamic(&adapter->mod_sicount, EVCNT_TYPE_INTR,
1733 1.88.2.15 martin NULL, xname, "module softint");
1734 1.88.2.15 martin evcnt_attach_dynamic(&adapter->msf_sicount, EVCNT_TYPE_INTR,
1735 1.88.2.15 martin NULL, xname, "multimode softint");
1736 1.88.2.15 martin evcnt_attach_dynamic(&adapter->phy_sicount, EVCNT_TYPE_INTR,
1737 1.88.2.15 martin NULL, xname, "external PHY softint");
1738 1.1 dyoung
1739 1.88.2.17 martin for (i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
1740 1.88.2.15 martin #ifdef LRO
1741 1.88.2.15 martin struct lro_ctrl *lro = &rxr->lro;
1742 1.88.2.15 martin #endif /* LRO */
1743 1.88.2.15 martin
1744 1.88.2.6 snj snprintf(adapter->queues[i].evnamebuf,
1745 1.88.2.6 snj sizeof(adapter->queues[i].evnamebuf), "%s q%d",
1746 1.88.2.6 snj xname, i);
1747 1.88.2.6 snj snprintf(adapter->queues[i].namebuf,
1748 1.88.2.6 snj sizeof(adapter->queues[i].namebuf), "q%d", i);
1749 1.48 msaitoh
1750 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
1751 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
1752 1.88.2.6 snj break;
1753 1.88.2.6 snj }
1754 1.1 dyoung
1755 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &rnode,
1756 1.88.2.6 snj 0, CTLTYPE_NODE,
1757 1.88.2.6 snj adapter->queues[i].namebuf, SYSCTL_DESCR("Queue Name"),
1758 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0)
1759 1.88.2.6 snj break;
1760 1.88.2.6 snj
1761 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1762 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
1763 1.88.2.6 snj "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"),
1764 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler, 0,
1765 1.88.2.6 snj (void *)&adapter->queues[i], 0, CTL_CREATE, CTL_EOL) != 0)
1766 1.88.2.6 snj break;
1767 1.88.2.6 snj
1768 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1769 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1770 1.88.2.6 snj "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"),
1771 1.88.2.6 snj ixgbe_sysctl_tdh_handler, 0, (void *)txr,
1772 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1773 1.88.2.6 snj break;
1774 1.1 dyoung
1775 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1776 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
1777 1.88.2.6 snj "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"),
1778 1.88.2.6 snj ixgbe_sysctl_tdt_handler, 0, (void *)txr,
1779 1.88.2.6 snj 0, CTL_CREATE, CTL_EOL) != 0)
1780 1.88.2.6 snj break;
1781 1.1 dyoung
1782 1.88.2.6 snj evcnt_attach_dynamic(&adapter->queues[i].irqs, EVCNT_TYPE_INTR,
1783 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "IRQs on queue");
1784 1.88.2.13 martin evcnt_attach_dynamic(&adapter->queues[i].handleq,
1785 1.88.2.13 martin EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1786 1.88.2.13 martin "Handled queue in softint");
1787 1.88.2.13 martin evcnt_attach_dynamic(&adapter->queues[i].req, EVCNT_TYPE_MISC,
1788 1.88.2.13 martin NULL, adapter->queues[i].evnamebuf, "Requeued in softint");
1789 1.88.2.6 snj evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
1790 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "TSO");
1791 1.88.2.6 snj evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
1792 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1793 1.88.2.6 snj "Queue No Descriptor Available");
1794 1.88.2.6 snj evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
1795 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1796 1.88.2.6 snj "Queue Packets Transmitted");
1797 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
1798 1.88.2.6 snj evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
1799 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf,
1800 1.88.2.6 snj "Packets dropped in pcq");
1801 1.88.2.6 snj #endif
1802 1.1 dyoung
1803 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1804 1.88.2.6 snj CTLFLAG_READONLY,
1805 1.88.2.6 snj CTLTYPE_INT,
1806 1.88.2.20 martin "rxd_nxck", SYSCTL_DESCR("Receive Descriptor next to check"),
1807 1.88.2.20 martin ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0,
1808 1.88.2.20 martin CTL_CREATE, CTL_EOL) != 0)
1809 1.88.2.20 martin break;
1810 1.88.2.20 martin
1811 1.88.2.20 martin if (sysctl_createv(log, 0, &rnode, &cnode,
1812 1.88.2.20 martin CTLFLAG_READONLY,
1813 1.88.2.20 martin CTLTYPE_INT,
1814 1.88.2.6 snj "rxd_head", SYSCTL_DESCR("Receive Descriptor Head"),
1815 1.88.2.6 snj ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0,
1816 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1817 1.88.2.6 snj break;
1818 1.1 dyoung
1819 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
1820 1.88.2.6 snj CTLFLAG_READONLY,
1821 1.88.2.6 snj CTLTYPE_INT,
1822 1.88.2.6 snj "rxd_tail", SYSCTL_DESCR("Receive Descriptor Tail"),
1823 1.88.2.6 snj ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0,
1824 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
1825 1.88.2.6 snj break;
1826 1.1 dyoung
1827 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
1828 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpc[i],
1829 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1830 1.88.2.6 snj "RX Missed Packet Count");
1831 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
1832 1.88.2.6 snj evcnt_attach_dynamic(&stats->rnbc[i],
1833 1.88.2.6 snj EVCNT_TYPE_MISC, NULL,
1834 1.88.2.6 snj adapter->queues[i].evnamebuf,
1835 1.88.2.6 snj "Receive No Buffers");
1836 1.1 dyoung }
1837 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
1838 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxontxc[i],
1839 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1840 1.88.2.6 snj "pxontxc");
1841 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxonrxc[i],
1842 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1843 1.88.2.6 snj "pxonrxc");
1844 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxofftxc[i],
1845 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1846 1.88.2.6 snj "pxofftxc");
1847 1.88.2.6 snj evcnt_attach_dynamic(&stats->pxoffrxc[i],
1848 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1849 1.88.2.6 snj "pxoffrxc");
1850 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
1851 1.88.2.20 martin evcnt_attach_dynamic(&stats->pxon2offc[i],
1852 1.88.2.20 martin EVCNT_TYPE_MISC, NULL,
1853 1.88.2.20 martin adapter->queues[i].evnamebuf,
1854 1.88.2.6 snj "pxon2offc");
1855 1.88.2.6 snj }
1856 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
1857 1.88.2.6 snj evcnt_attach_dynamic(&stats->qprc[i],
1858 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1859 1.88.2.6 snj "qprc");
1860 1.88.2.6 snj evcnt_attach_dynamic(&stats->qptc[i],
1861 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1862 1.88.2.6 snj "qptc");
1863 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbrc[i],
1864 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1865 1.88.2.6 snj "qbrc");
1866 1.88.2.6 snj evcnt_attach_dynamic(&stats->qbtc[i],
1867 1.88.2.6 snj EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
1868 1.88.2.6 snj "qbtc");
1869 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
1870 1.88.2.20 martin evcnt_attach_dynamic(&stats->qprdc[i],
1871 1.88.2.20 martin EVCNT_TYPE_MISC, NULL,
1872 1.88.2.20 martin adapter->queues[i].evnamebuf, "qprdc");
1873 1.1 dyoung }
1874 1.22 msaitoh
1875 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC,
1876 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Packets Received");
1877 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC,
1878 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Queue Bytes Received");
1879 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC,
1880 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Copied RX Frames");
1881 1.88.2.6 snj evcnt_attach_dynamic(&rxr->no_jmbuf, EVCNT_TYPE_MISC,
1882 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx no jumbo mbuf");
1883 1.88.2.6 snj evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC,
1884 1.88.2.6 snj NULL, adapter->queues[i].evnamebuf, "Rx discarded");
1885 1.88.2.6 snj #ifdef LRO
1886 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued",
1887 1.88.2.6 snj CTLFLAG_RD, &lro->lro_queued, 0,
1888 1.88.2.6 snj "LRO Queued");
1889 1.88.2.6 snj SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed",
1890 1.88.2.6 snj CTLFLAG_RD, &lro->lro_flushed, 0,
1891 1.88.2.6 snj "LRO Flushed");
1892 1.88.2.6 snj #endif /* LRO */
1893 1.1 dyoung }
1894 1.1 dyoung
1895 1.88.2.6 snj /* MAC stats get their own sub node */
1896 1.1 dyoung
1897 1.88.2.6 snj snprintf(stats->namebuf,
1898 1.88.2.6 snj sizeof(stats->namebuf), "%s MAC Statistics", xname);
1899 1.45 msaitoh
1900 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL,
1901 1.88.2.6 snj stats->namebuf, "rx csum offload - IP");
1902 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL,
1903 1.88.2.6 snj stats->namebuf, "rx csum offload - L4");
1904 1.88.2.6 snj evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL,
1905 1.88.2.6 snj stats->namebuf, "rx csum offload - IP bad");
1906 1.88.2.6 snj evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL,
1907 1.88.2.6 snj stats->namebuf, "rx csum offload - L4 bad");
1908 1.88.2.6 snj evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL,
1909 1.88.2.6 snj stats->namebuf, "Interrupt conditions zero");
1910 1.88.2.6 snj evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL,
1911 1.88.2.6 snj stats->namebuf, "Legacy interrupts");
1912 1.45 msaitoh
1913 1.88.2.6 snj evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL,
1914 1.88.2.6 snj stats->namebuf, "CRC Errors");
1915 1.88.2.6 snj evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL,
1916 1.88.2.6 snj stats->namebuf, "Illegal Byte Errors");
1917 1.88.2.6 snj evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL,
1918 1.88.2.6 snj stats->namebuf, "Byte Errors");
1919 1.88.2.6 snj evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL,
1920 1.88.2.6 snj stats->namebuf, "MAC Short Packets Discarded");
1921 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
1922 1.88.2.6 snj evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL,
1923 1.88.2.6 snj stats->namebuf, "Bad SFD");
1924 1.88.2.6 snj evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL,
1925 1.88.2.6 snj stats->namebuf, "Total Packets Missed");
1926 1.88.2.6 snj evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL,
1927 1.88.2.6 snj stats->namebuf, "MAC Local Faults");
1928 1.88.2.6 snj evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL,
1929 1.88.2.6 snj stats->namebuf, "MAC Remote Faults");
1930 1.88.2.6 snj evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL,
1931 1.88.2.6 snj stats->namebuf, "Receive Length Errors");
1932 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL,
1933 1.88.2.6 snj stats->namebuf, "Link XON Transmitted");
1934 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL,
1935 1.88.2.6 snj stats->namebuf, "Link XON Received");
1936 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL,
1937 1.88.2.6 snj stats->namebuf, "Link XOFF Transmitted");
1938 1.88.2.6 snj evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL,
1939 1.88.2.6 snj stats->namebuf, "Link XOFF Received");
1940 1.45 msaitoh
1941 1.88.2.6 snj /* Packet Reception Stats */
1942 1.88.2.6 snj evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL,
1943 1.88.2.6 snj stats->namebuf, "Total Octets Received");
1944 1.88.2.6 snj evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL,
1945 1.88.2.6 snj stats->namebuf, "Good Octets Received");
1946 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL,
1947 1.88.2.6 snj stats->namebuf, "Total Packets Received");
1948 1.88.2.6 snj evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL,
1949 1.88.2.6 snj stats->namebuf, "Good Packets Received");
1950 1.88.2.6 snj evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL,
1951 1.88.2.6 snj stats->namebuf, "Multicast Packets Received");
1952 1.88.2.6 snj evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL,
1953 1.88.2.6 snj stats->namebuf, "Broadcast Packets Received");
1954 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL,
1955 1.88.2.6 snj stats->namebuf, "64 byte frames received ");
1956 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL,
1957 1.88.2.6 snj stats->namebuf, "65-127 byte frames received");
1958 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL,
1959 1.88.2.6 snj stats->namebuf, "128-255 byte frames received");
1960 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL,
1961 1.88.2.6 snj stats->namebuf, "256-511 byte frames received");
1962 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL,
1963 1.88.2.6 snj stats->namebuf, "512-1023 byte frames received");
1964 1.88.2.6 snj evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL,
1965 1.88.2.6 snj stats->namebuf, "1023-1522 byte frames received");
1966 1.88.2.6 snj evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL,
1967 1.88.2.6 snj stats->namebuf, "Receive Undersized");
1968 1.88.2.6 snj evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL,
1969 1.88.2.6 snj stats->namebuf, "Fragmented Packets Received ");
1970 1.88.2.6 snj evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL,
1971 1.88.2.6 snj stats->namebuf, "Oversized Packets Received");
1972 1.88.2.6 snj evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL,
1973 1.88.2.6 snj stats->namebuf, "Received Jabber");
1974 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL,
1975 1.88.2.6 snj stats->namebuf, "Management Packets Received");
1976 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL,
1977 1.88.2.6 snj stats->namebuf, "Management Packets Dropped");
1978 1.88.2.6 snj evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL,
1979 1.88.2.6 snj stats->namebuf, "Checksum Errors");
1980 1.45 msaitoh
1981 1.88.2.6 snj /* Packet Transmission Stats */
1982 1.88.2.6 snj evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL,
1983 1.88.2.6 snj stats->namebuf, "Good Octets Transmitted");
1984 1.88.2.6 snj evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL,
1985 1.88.2.6 snj stats->namebuf, "Total Packets Transmitted");
1986 1.88.2.6 snj evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL,
1987 1.88.2.6 snj stats->namebuf, "Good Packets Transmitted");
1988 1.88.2.6 snj evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL,
1989 1.88.2.6 snj stats->namebuf, "Broadcast Packets Transmitted");
1990 1.88.2.6 snj evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL,
1991 1.88.2.6 snj stats->namebuf, "Multicast Packets Transmitted");
1992 1.88.2.6 snj evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL,
1993 1.88.2.6 snj stats->namebuf, "Management Packets Transmitted");
1994 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL,
1995 1.88.2.6 snj stats->namebuf, "64 byte frames transmitted ");
1996 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL,
1997 1.88.2.6 snj stats->namebuf, "65-127 byte frames transmitted");
1998 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL,
1999 1.88.2.6 snj stats->namebuf, "128-255 byte frames transmitted");
2000 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL,
2001 1.88.2.6 snj stats->namebuf, "256-511 byte frames transmitted");
2002 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL,
2003 1.88.2.6 snj stats->namebuf, "512-1023 byte frames transmitted");
2004 1.88.2.6 snj evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL,
2005 1.88.2.6 snj stats->namebuf, "1024-1522 byte frames transmitted");
2006 1.88.2.6 snj } /* ixgbe_add_hw_stats */
2007 1.45 msaitoh
2008 1.45 msaitoh static void
2009 1.88.2.6 snj ixgbe_clear_evcnt(struct adapter *adapter)
2010 1.44 msaitoh {
2011 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
2012 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
2013 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
2014 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
2015 1.44 msaitoh
2016 1.88.2.6 snj adapter->efbig_tx_dma_setup.ev_count = 0;
2017 1.88.2.6 snj adapter->mbuf_defrag_failed.ev_count = 0;
2018 1.88.2.6 snj adapter->efbig2_tx_dma_setup.ev_count = 0;
2019 1.88.2.6 snj adapter->einval_tx_dma_setup.ev_count = 0;
2020 1.88.2.6 snj adapter->other_tx_dma_setup.ev_count = 0;
2021 1.88.2.6 snj adapter->eagain_tx_dma_setup.ev_count = 0;
2022 1.88.2.6 snj adapter->enomem_tx_dma_setup.ev_count = 0;
2023 1.88.2.6 snj adapter->tso_err.ev_count = 0;
2024 1.88.2.14 martin adapter->watchdog_events.ev_count = 0;
2025 1.88.2.6 snj adapter->link_irq.ev_count = 0;
2026 1.88.2.15 martin adapter->link_sicount.ev_count = 0;
2027 1.88.2.15 martin adapter->mod_sicount.ev_count = 0;
2028 1.88.2.15 martin adapter->msf_sicount.ev_count = 0;
2029 1.88.2.15 martin adapter->phy_sicount.ev_count = 0;
2030 1.1 dyoung
2031 1.88.2.6 snj txr = adapter->tx_rings;
2032 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
2033 1.88.2.6 snj adapter->queues[i].irqs.ev_count = 0;
2034 1.88.2.13 martin adapter->queues[i].handleq.ev_count = 0;
2035 1.88.2.13 martin adapter->queues[i].req.ev_count = 0;
2036 1.88.2.6 snj txr->no_desc_avail.ev_count = 0;
2037 1.88.2.6 snj txr->total_packets.ev_count = 0;
2038 1.88.2.6 snj txr->tso_tx.ev_count = 0;
2039 1.28 msaitoh #ifndef IXGBE_LEGACY_TX
2040 1.88.2.6 snj txr->pcq_drops.ev_count = 0;
2041 1.26 msaitoh #endif
2042 1.88.2.14 martin txr->q_efbig_tx_dma_setup = 0;
2043 1.88.2.14 martin txr->q_mbuf_defrag_failed = 0;
2044 1.88.2.14 martin txr->q_efbig2_tx_dma_setup = 0;
2045 1.88.2.14 martin txr->q_einval_tx_dma_setup = 0;
2046 1.88.2.14 martin txr->q_other_tx_dma_setup = 0;
2047 1.88.2.14 martin txr->q_eagain_tx_dma_setup = 0;
2048 1.88.2.14 martin txr->q_enomem_tx_dma_setup = 0;
2049 1.88.2.14 martin txr->q_tso_err = 0;
2050 1.88.2.6 snj
2051 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
2052 1.88.2.6 snj stats->mpc[i].ev_count = 0;
2053 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2054 1.88.2.6 snj stats->rnbc[i].ev_count = 0;
2055 1.88.2.6 snj }
2056 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
2057 1.88.2.6 snj stats->pxontxc[i].ev_count = 0;
2058 1.88.2.6 snj stats->pxonrxc[i].ev_count = 0;
2059 1.88.2.6 snj stats->pxofftxc[i].ev_count = 0;
2060 1.88.2.6 snj stats->pxoffrxc[i].ev_count = 0;
2061 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
2062 1.88.2.20 martin stats->pxon2offc[i].ev_count = 0;
2063 1.88.2.6 snj }
2064 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
2065 1.88.2.6 snj stats->qprc[i].ev_count = 0;
2066 1.88.2.6 snj stats->qptc[i].ev_count = 0;
2067 1.88.2.6 snj stats->qbrc[i].ev_count = 0;
2068 1.88.2.6 snj stats->qbtc[i].ev_count = 0;
2069 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
2070 1.88.2.20 martin stats->qprdc[i].ev_count = 0;
2071 1.1 dyoung }
2072 1.1 dyoung
2073 1.88.2.6 snj rxr->rx_packets.ev_count = 0;
2074 1.88.2.6 snj rxr->rx_bytes.ev_count = 0;
2075 1.88.2.6 snj rxr->rx_copies.ev_count = 0;
2076 1.88.2.6 snj rxr->no_jmbuf.ev_count = 0;
2077 1.88.2.6 snj rxr->rx_discarded.ev_count = 0;
2078 1.1 dyoung }
2079 1.88.2.6 snj stats->ipcs.ev_count = 0;
2080 1.88.2.6 snj stats->l4cs.ev_count = 0;
2081 1.88.2.6 snj stats->ipcs_bad.ev_count = 0;
2082 1.88.2.6 snj stats->l4cs_bad.ev_count = 0;
2083 1.88.2.6 snj stats->intzero.ev_count = 0;
2084 1.88.2.6 snj stats->legint.ev_count = 0;
2085 1.88.2.6 snj stats->crcerrs.ev_count = 0;
2086 1.88.2.6 snj stats->illerrc.ev_count = 0;
2087 1.88.2.6 snj stats->errbc.ev_count = 0;
2088 1.88.2.6 snj stats->mspdc.ev_count = 0;
2089 1.88.2.6 snj stats->mbsdc.ev_count = 0;
2090 1.88.2.6 snj stats->mpctotal.ev_count = 0;
2091 1.88.2.6 snj stats->mlfc.ev_count = 0;
2092 1.88.2.6 snj stats->mrfc.ev_count = 0;
2093 1.88.2.6 snj stats->rlec.ev_count = 0;
2094 1.88.2.6 snj stats->lxontxc.ev_count = 0;
2095 1.88.2.6 snj stats->lxonrxc.ev_count = 0;
2096 1.88.2.6 snj stats->lxofftxc.ev_count = 0;
2097 1.88.2.6 snj stats->lxoffrxc.ev_count = 0;
2098 1.34 msaitoh
2099 1.88.2.6 snj /* Packet Reception Stats */
2100 1.88.2.6 snj stats->tor.ev_count = 0;
2101 1.88.2.6 snj stats->gorc.ev_count = 0;
2102 1.88.2.6 snj stats->tpr.ev_count = 0;
2103 1.88.2.6 snj stats->gprc.ev_count = 0;
2104 1.88.2.6 snj stats->mprc.ev_count = 0;
2105 1.88.2.6 snj stats->bprc.ev_count = 0;
2106 1.88.2.6 snj stats->prc64.ev_count = 0;
2107 1.88.2.6 snj stats->prc127.ev_count = 0;
2108 1.88.2.6 snj stats->prc255.ev_count = 0;
2109 1.88.2.6 snj stats->prc511.ev_count = 0;
2110 1.88.2.6 snj stats->prc1023.ev_count = 0;
2111 1.88.2.6 snj stats->prc1522.ev_count = 0;
2112 1.88.2.6 snj stats->ruc.ev_count = 0;
2113 1.88.2.6 snj stats->rfc.ev_count = 0;
2114 1.88.2.6 snj stats->roc.ev_count = 0;
2115 1.88.2.6 snj stats->rjc.ev_count = 0;
2116 1.88.2.6 snj stats->mngprc.ev_count = 0;
2117 1.88.2.6 snj stats->mngpdc.ev_count = 0;
2118 1.88.2.6 snj stats->xec.ev_count = 0;
2119 1.1 dyoung
2120 1.88.2.6 snj /* Packet Transmission Stats */
2121 1.88.2.6 snj stats->gotc.ev_count = 0;
2122 1.88.2.6 snj stats->tpt.ev_count = 0;
2123 1.88.2.6 snj stats->gptc.ev_count = 0;
2124 1.88.2.6 snj stats->bptc.ev_count = 0;
2125 1.88.2.6 snj stats->mptc.ev_count = 0;
2126 1.88.2.6 snj stats->mngptc.ev_count = 0;
2127 1.88.2.6 snj stats->ptc64.ev_count = 0;
2128 1.88.2.6 snj stats->ptc127.ev_count = 0;
2129 1.88.2.6 snj stats->ptc255.ev_count = 0;
2130 1.88.2.6 snj stats->ptc511.ev_count = 0;
2131 1.88.2.6 snj stats->ptc1023.ev_count = 0;
2132 1.88.2.6 snj stats->ptc1522.ev_count = 0;
2133 1.1 dyoung }
2134 1.1 dyoung
2135 1.88.2.6 snj /************************************************************************
2136 1.88.2.6 snj * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function
2137 1.88.2.6 snj *
2138 1.88.2.6 snj * Retrieves the TDH value from the hardware
2139 1.88.2.6 snj ************************************************************************/
2140 1.88.2.6 snj static int
2141 1.88.2.6 snj ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS)
2142 1.1 dyoung {
2143 1.88.2.6 snj struct sysctlnode node = *rnode;
2144 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2145 1.88.2.6 snj uint32_t val;
2146 1.34 msaitoh
2147 1.88.2.6 snj if (!txr)
2148 1.88.2.6 snj return (0);
2149 1.1 dyoung
2150 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me));
2151 1.88.2.6 snj node.sysctl_data = &val;
2152 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2153 1.88.2.6 snj } /* ixgbe_sysctl_tdh_handler */
2154 1.1 dyoung
2155 1.88.2.6 snj /************************************************************************
2156 1.88.2.6 snj * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
2157 1.88.2.6 snj *
2158 1.88.2.6 snj * Retrieves the TDT value from the hardware
2159 1.88.2.6 snj ************************************************************************/
2160 1.88.2.6 snj static int
2161 1.88.2.6 snj ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS)
2162 1.88.2.6 snj {
2163 1.88.2.6 snj struct sysctlnode node = *rnode;
2164 1.88.2.6 snj struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2165 1.88.2.6 snj uint32_t val;
2166 1.33 msaitoh
2167 1.88.2.6 snj if (!txr)
2168 1.88.2.6 snj return (0);
2169 1.43 msaitoh
2170 1.88.2.6 snj val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me));
2171 1.88.2.6 snj node.sysctl_data = &val;
2172 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2173 1.88.2.6 snj } /* ixgbe_sysctl_tdt_handler */
2174 1.1 dyoung
2175 1.88.2.6 snj /************************************************************************
2176 1.88.2.20 martin * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check
2177 1.88.2.20 martin * handler function
2178 1.88.2.20 martin *
2179 1.88.2.20 martin * Retrieves the next_to_check value
2180 1.88.2.20 martin ************************************************************************/
2181 1.88.2.20 martin static int
2182 1.88.2.20 martin ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS)
2183 1.88.2.20 martin {
2184 1.88.2.20 martin struct sysctlnode node = *rnode;
2185 1.88.2.20 martin struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2186 1.88.2.20 martin uint32_t val;
2187 1.88.2.20 martin
2188 1.88.2.20 martin if (!rxr)
2189 1.88.2.20 martin return (0);
2190 1.88.2.20 martin
2191 1.88.2.20 martin val = rxr->next_to_check;
2192 1.88.2.20 martin node.sysctl_data = &val;
2193 1.88.2.20 martin return sysctl_lookup(SYSCTLFN_CALL(&node));
2194 1.88.2.20 martin } /* ixgbe_sysctl_next_to_check_handler */
2195 1.88.2.20 martin
2196 1.88.2.20 martin /************************************************************************
2197 1.88.2.6 snj * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function
2198 1.88.2.6 snj *
2199 1.88.2.6 snj * Retrieves the RDH value from the hardware
2200 1.88.2.6 snj ************************************************************************/
2201 1.88.2.6 snj static int
2202 1.88.2.6 snj ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS)
2203 1.88.2.6 snj {
2204 1.88.2.6 snj struct sysctlnode node = *rnode;
2205 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2206 1.88.2.6 snj uint32_t val;
2207 1.34 msaitoh
2208 1.88.2.6 snj if (!rxr)
2209 1.88.2.6 snj return (0);
2210 1.1 dyoung
2211 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me));
2212 1.88.2.6 snj node.sysctl_data = &val;
2213 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2214 1.88.2.6 snj } /* ixgbe_sysctl_rdh_handler */
2215 1.1 dyoung
2216 1.88.2.6 snj /************************************************************************
2217 1.88.2.6 snj * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function
2218 1.88.2.6 snj *
2219 1.88.2.6 snj * Retrieves the RDT value from the hardware
2220 1.88.2.6 snj ************************************************************************/
2221 1.88.2.6 snj static int
2222 1.88.2.6 snj ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS)
2223 1.1 dyoung {
2224 1.88.2.6 snj struct sysctlnode node = *rnode;
2225 1.88.2.6 snj struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
2226 1.88.2.6 snj uint32_t val;
2227 1.1 dyoung
2228 1.88.2.6 snj if (!rxr)
2229 1.88.2.6 snj return (0);
2230 1.1 dyoung
2231 1.88.2.6 snj val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me));
2232 1.88.2.6 snj node.sysctl_data = &val;
2233 1.88.2.6 snj return sysctl_lookup(SYSCTLFN_CALL(&node));
2234 1.88.2.6 snj } /* ixgbe_sysctl_rdt_handler */
2235 1.1 dyoung
2236 1.88.2.6 snj #if 0 /* XXX Badly need to overhaul vlan(4) on NetBSD. */
2237 1.88.2.6 snj /************************************************************************
2238 1.88.2.6 snj * ixgbe_register_vlan
2239 1.88.2.6 snj *
2240 1.88.2.6 snj * Run via vlan config EVENT, it enables us to use the
2241 1.88.2.6 snj * HW Filter table since we can get the vlan id. This
2242 1.88.2.6 snj * just creates the entry in the soft version of the
2243 1.88.2.6 snj * VFTA, init will repopulate the real table.
2244 1.88.2.6 snj ************************************************************************/
2245 1.1 dyoung static void
2246 1.88.2.6 snj ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2247 1.1 dyoung {
2248 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2249 1.88.2.6 snj u16 index, bit;
2250 1.1 dyoung
2251 1.88.2.6 snj if (ifp->if_softc != arg) /* Not our event */
2252 1.88.2.6 snj return;
2253 1.43 msaitoh
2254 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2255 1.88.2.6 snj return;
2256 1.1 dyoung
2257 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2258 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2259 1.88.2.6 snj bit = vtag & 0x1F;
2260 1.88.2.6 snj adapter->shadow_vfta[index] |= (1 << bit);
2261 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2262 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2263 1.88.2.6 snj } /* ixgbe_register_vlan */
2264 1.1 dyoung
2265 1.88.2.6 snj /************************************************************************
2266 1.88.2.6 snj * ixgbe_unregister_vlan
2267 1.88.2.6 snj *
2268 1.88.2.6 snj * Run via vlan unconfig EVENT, remove our entry in the soft vfta.
2269 1.88.2.6 snj ************************************************************************/
2270 1.88.2.6 snj static void
2271 1.88.2.6 snj ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag)
2272 1.88.2.6 snj {
2273 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2274 1.88.2.6 snj u16 index, bit;
2275 1.1 dyoung
2276 1.88.2.6 snj if (ifp->if_softc != arg)
2277 1.88.2.6 snj return;
2278 1.1 dyoung
2279 1.88.2.6 snj if ((vtag == 0) || (vtag > 4095)) /* Invalid */
2280 1.88.2.6 snj return;
2281 1.1 dyoung
2282 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2283 1.88.2.6 snj index = (vtag >> 5) & 0x7F;
2284 1.88.2.6 snj bit = vtag & 0x1F;
2285 1.88.2.6 snj adapter->shadow_vfta[index] &= ~(1 << bit);
2286 1.88.2.6 snj /* Re-init to load the changes */
2287 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
2288 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2289 1.88.2.6 snj } /* ixgbe_unregister_vlan */
2290 1.88.2.6 snj #endif
2291 1.88.2.6 snj
2292 1.88.2.6 snj static void
2293 1.88.2.6 snj ixgbe_setup_vlan_hw_support(struct adapter *adapter)
2294 1.1 dyoung {
2295 1.1 dyoung struct ethercom *ec = &adapter->osdep.ec;
2296 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2297 1.88.2.6 snj struct rx_ring *rxr;
2298 1.88.2.6 snj int i;
2299 1.88.2.6 snj u32 ctrl;
2300 1.1 dyoung
2301 1.1 dyoung
2302 1.74 msaitoh /*
2303 1.88.2.6 snj * We get here thru init_locked, meaning
2304 1.88.2.6 snj * a soft reset, this has already cleared
2305 1.88.2.6 snj * the VFTA and other state, so if there
2306 1.88.2.6 snj * have been no vlan's registered do nothing.
2307 1.74 msaitoh */
2308 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
2309 1.88.2.6 snj return;
2310 1.1 dyoung
2311 1.88.2.6 snj /* Setup the queues for vlans */
2312 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) {
2313 1.88.2.6 snj for (i = 0; i < adapter->num_queues; i++) {
2314 1.88.2.6 snj rxr = &adapter->rx_rings[i];
2315 1.88.2.6 snj /* On 82599 the VLAN enable is per/queue in RXDCTL */
2316 1.88.2.6 snj if (hw->mac.type != ixgbe_mac_82598EB) {
2317 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
2318 1.88.2.6 snj ctrl |= IXGBE_RXDCTL_VME;
2319 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
2320 1.88.2.6 snj }
2321 1.88.2.6 snj rxr->vtag_strip = TRUE;
2322 1.88.2.6 snj }
2323 1.88.2.6 snj }
2324 1.1 dyoung
2325 1.88.2.6 snj if ((ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) == 0)
2326 1.88.2.6 snj return;
2327 1.1 dyoung /*
2328 1.88.2.6 snj * A soft reset zero's out the VFTA, so
2329 1.88.2.6 snj * we need to repopulate it now.
2330 1.1 dyoung */
2331 1.88.2.6 snj for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2332 1.88.2.6 snj if (adapter->shadow_vfta[i] != 0)
2333 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VFTA(i),
2334 1.88.2.6 snj adapter->shadow_vfta[i]);
2335 1.1 dyoung
2336 1.88.2.6 snj ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2337 1.88.2.6 snj /* Enable the Filter Table if enabled */
2338 1.88.2.6 snj if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) {
2339 1.88.2.6 snj ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2340 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VFE;
2341 1.88.2.6 snj }
2342 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
2343 1.88.2.6 snj ctrl |= IXGBE_VLNCTRL_VME;
2344 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2345 1.88.2.6 snj } /* ixgbe_setup_vlan_hw_support */
2346 1.1 dyoung
2347 1.88.2.6 snj /************************************************************************
2348 1.88.2.6 snj * ixgbe_get_slot_info
2349 1.88.2.6 snj *
2350 1.88.2.6 snj * Get the width and transaction speed of
2351 1.88.2.6 snj * the slot this adapter is plugged into.
2352 1.88.2.6 snj ************************************************************************/
2353 1.88.2.6 snj static void
2354 1.88.2.6 snj ixgbe_get_slot_info(struct adapter *adapter)
2355 1.88.2.6 snj {
2356 1.88.2.6 snj device_t dev = adapter->dev;
2357 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2358 1.88.2.6 snj u32 offset;
2359 1.88.2.6 snj u16 link;
2360 1.88.2.6 snj int bus_info_valid = TRUE;
2361 1.48 msaitoh
2362 1.88.2.6 snj /* Some devices are behind an internal bridge */
2363 1.88.2.6 snj switch (hw->device_id) {
2364 1.88.2.6 snj case IXGBE_DEV_ID_82599_SFP_SF_QP:
2365 1.88.2.6 snj case IXGBE_DEV_ID_82599_QSFP_SF_QP:
2366 1.88.2.6 snj goto get_parent_info;
2367 1.88.2.6 snj default:
2368 1.88.2.6 snj break;
2369 1.88.2.6 snj }
2370 1.1 dyoung
2371 1.88.2.6 snj ixgbe_get_bus_info(hw);
2372 1.1 dyoung
2373 1.1 dyoung /*
2374 1.88.2.6 snj * Some devices don't use PCI-E, but there is no need
2375 1.88.2.6 snj * to display "Unknown" for bus speed and width.
2376 1.1 dyoung */
2377 1.88.2.6 snj switch (hw->mac.type) {
2378 1.88.2.6 snj case ixgbe_mac_X550EM_x:
2379 1.88.2.6 snj case ixgbe_mac_X550EM_a:
2380 1.88.2.6 snj return;
2381 1.88.2.6 snj default:
2382 1.88.2.6 snj goto display;
2383 1.88.2.6 snj }
2384 1.43 msaitoh
2385 1.88.2.6 snj get_parent_info:
2386 1.88.2.6 snj /*
2387 1.88.2.6 snj * For the Quad port adapter we need to parse back
2388 1.88.2.6 snj * up the PCI tree to find the speed of the expansion
2389 1.88.2.6 snj * slot into which this adapter is plugged. A bit more work.
2390 1.88.2.6 snj */
2391 1.88.2.6 snj dev = device_parent(device_parent(dev));
2392 1.88.2.6 snj #if 0
2393 1.88.2.6 snj #ifdef IXGBE_DEBUG
2394 1.88.2.6 snj device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev),
2395 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2396 1.88.2.6 snj #endif
2397 1.88.2.6 snj dev = device_parent(device_parent(dev));
2398 1.88.2.6 snj #ifdef IXGBE_DEBUG
2399 1.88.2.6 snj device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev),
2400 1.88.2.6 snj pci_get_slot(dev), pci_get_function(dev));
2401 1.88.2.6 snj #endif
2402 1.88.2.6 snj #endif
2403 1.88.2.6 snj /* Now get the PCI Express Capabilities offset */
2404 1.88.2.6 snj if (pci_get_capability(adapter->osdep.pc, adapter->osdep.tag,
2405 1.88.2.6 snj PCI_CAP_PCIEXPRESS, &offset, NULL)) {
2406 1.88.2.6 snj /*
2407 1.88.2.6 snj * Hmm...can't get PCI-Express capabilities.
2408 1.88.2.6 snj * Falling back to default method.
2409 1.88.2.6 snj */
2410 1.88.2.6 snj bus_info_valid = FALSE;
2411 1.88.2.6 snj ixgbe_get_bus_info(hw);
2412 1.88.2.6 snj goto display;
2413 1.88.2.6 snj }
2414 1.88.2.6 snj /* ...and read the Link Status Register */
2415 1.88.2.6 snj link = pci_conf_read(adapter->osdep.pc, adapter->osdep.tag,
2416 1.88.2.10 martin offset + PCIE_LCSR) >> 16;
2417 1.88.2.10 martin ixgbe_set_pci_config_data_generic(hw, link);
2418 1.43 msaitoh
2419 1.88.2.6 snj display:
2420 1.88.2.6 snj device_printf(dev, "PCI Express Bus: Speed %s Width %s\n",
2421 1.88.2.6 snj ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" :
2422 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" :
2423 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" :
2424 1.88.2.6 snj "Unknown"),
2425 1.88.2.6 snj ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :
2426 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :
2427 1.88.2.6 snj (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :
2428 1.88.2.6 snj "Unknown"));
2429 1.88.2.6 snj
2430 1.88.2.6 snj if (bus_info_valid) {
2431 1.88.2.6 snj if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2432 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&
2433 1.88.2.6 snj (hw->bus.speed == ixgbe_bus_speed_2500))) {
2434 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2435 1.88.2.6 snj " for this card\n is not sufficient for"
2436 1.88.2.6 snj " optimal performance.\n");
2437 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2438 1.88.2.6 snj "PCIE, or x4 PCIE Gen2 slot is required.\n");
2439 1.88.2.6 snj }
2440 1.88.2.6 snj if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2441 1.88.2.6 snj ((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&
2442 1.88.2.6 snj (hw->bus.speed < ixgbe_bus_speed_8000))) {
2443 1.88.2.6 snj device_printf(dev, "PCI-Express bandwidth available"
2444 1.88.2.6 snj " for this card\n is not sufficient for"
2445 1.88.2.6 snj " optimal performance.\n");
2446 1.88.2.6 snj device_printf(dev, "For optimal performance a x8 "
2447 1.88.2.6 snj "PCIE Gen3 slot is required.\n");
2448 1.88.2.6 snj }
2449 1.88.2.6 snj } else
2450 1.88.2.6 snj device_printf(dev, "Unable to determine slot speed/width. The speed/width reported are that of the internal switch.\n");
2451 1.43 msaitoh
2452 1.88.2.6 snj return;
2453 1.88.2.6 snj } /* ixgbe_get_slot_info */
2454 1.43 msaitoh
2455 1.88.2.6 snj /************************************************************************
2456 1.88.2.6 snj * ixgbe_enable_queue - MSI-X Interrupt Handlers and Tasklets
2457 1.88.2.6 snj ************************************************************************/
2458 1.88.2.6 snj static inline void
2459 1.88.2.6 snj ixgbe_enable_queue(struct adapter *adapter, u32 vector)
2460 1.43 msaitoh {
2461 1.43 msaitoh struct ixgbe_hw *hw = &adapter->hw;
2462 1.88.2.11 martin struct ix_queue *que = &adapter->queues[vector];
2463 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2464 1.88.2.6 snj u32 mask;
2465 1.43 msaitoh
2466 1.88.2.16 martin mutex_enter(&que->dc_mtx);
2467 1.88.2.16 martin if (que->disabled_count > 0 && --que->disabled_count > 0)
2468 1.88.2.11 martin goto out;
2469 1.88.2.11 martin
2470 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2471 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2472 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2473 1.88.2.6 snj } else {
2474 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2475 1.88.2.6 snj if (mask)
2476 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2477 1.88.2.6 snj mask = (queue >> 32);
2478 1.88.2.6 snj if (mask)
2479 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2480 1.88.2.6 snj }
2481 1.88.2.11 martin out:
2482 1.88.2.16 martin mutex_exit(&que->dc_mtx);
2483 1.88.2.6 snj } /* ixgbe_enable_queue */
2484 1.88.2.6 snj
2485 1.88.2.6 snj /************************************************************************
2486 1.88.2.16 martin * ixgbe_disable_queue_internal
2487 1.88.2.6 snj ************************************************************************/
2488 1.88.2.6 snj static inline void
2489 1.88.2.16 martin ixgbe_disable_queue_internal(struct adapter *adapter, u32 vector, bool nestok)
2490 1.88.2.6 snj {
2491 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2492 1.88.2.11 martin struct ix_queue *que = &adapter->queues[vector];
2493 1.88.2.6 snj u64 queue = (u64)(1ULL << vector);
2494 1.88.2.6 snj u32 mask;
2495 1.55 msaitoh
2496 1.88.2.16 martin mutex_enter(&que->dc_mtx);
2497 1.88.2.16 martin
2498 1.88.2.16 martin if (que->disabled_count > 0) {
2499 1.88.2.16 martin if (nestok)
2500 1.88.2.16 martin que->disabled_count++;
2501 1.88.2.16 martin goto out;
2502 1.88.2.16 martin }
2503 1.88.2.16 martin que->disabled_count++;
2504 1.88.2.11 martin
2505 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
2506 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queue);
2507 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2508 1.88.2.6 snj } else {
2509 1.88.2.6 snj mask = (queue & 0xFFFFFFFF);
2510 1.88.2.6 snj if (mask)
2511 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2512 1.88.2.6 snj mask = (queue >> 32);
2513 1.88.2.6 snj if (mask)
2514 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2515 1.88.2.6 snj }
2516 1.88.2.11 martin out:
2517 1.88.2.16 martin mutex_exit(&que->dc_mtx);
2518 1.88.2.16 martin } /* ixgbe_disable_queue_internal */
2519 1.88.2.16 martin
2520 1.88.2.16 martin /************************************************************************
2521 1.88.2.16 martin * ixgbe_disable_queue
2522 1.88.2.16 martin ************************************************************************/
2523 1.88.2.16 martin static inline void
2524 1.88.2.16 martin ixgbe_disable_queue(struct adapter *adapter, u32 vector)
2525 1.88.2.16 martin {
2526 1.88.2.16 martin
2527 1.88.2.16 martin ixgbe_disable_queue_internal(adapter, vector, true);
2528 1.88.2.6 snj } /* ixgbe_disable_queue */
2529 1.88.2.6 snj
2530 1.88.2.6 snj /************************************************************************
2531 1.88.2.13 martin * ixgbe_sched_handle_que - schedule deferred packet processing
2532 1.88.2.13 martin ************************************************************************/
2533 1.88.2.13 martin static inline void
2534 1.88.2.13 martin ixgbe_sched_handle_que(struct adapter *adapter, struct ix_queue *que)
2535 1.88.2.13 martin {
2536 1.88.2.13 martin
2537 1.88.2.18 martin if(que->txrx_use_workqueue) {
2538 1.88.2.13 martin /*
2539 1.88.2.13 martin * adapter->que_wq is bound to each CPU instead of
2540 1.88.2.13 martin * each NIC queue to reduce workqueue kthread. As we
2541 1.88.2.13 martin * should consider about interrupt affinity in this
2542 1.88.2.13 martin * function, the workqueue kthread must be WQ_PERCPU.
2543 1.88.2.13 martin * If create WQ_PERCPU workqueue kthread for each NIC
2544 1.88.2.13 martin * queue, that number of created workqueue kthread is
2545 1.88.2.13 martin * (number of used NIC queue) * (number of CPUs) =
2546 1.88.2.13 martin * (number of CPUs) ^ 2 most often.
2547 1.88.2.13 martin *
2548 1.88.2.13 martin * The same NIC queue's interrupts are avoided by
2549 1.88.2.13 martin * masking the queue's interrupt. And different
2550 1.88.2.13 martin * NIC queue's interrupts use different struct work
2551 1.88.2.13 martin * (que->wq_cookie). So, "enqueued flag" to avoid
2552 1.88.2.13 martin * twice workqueue_enqueue() is not required .
2553 1.88.2.13 martin */
2554 1.88.2.13 martin workqueue_enqueue(adapter->que_wq, &que->wq_cookie, curcpu());
2555 1.88.2.13 martin } else {
2556 1.88.2.13 martin softint_schedule(que->que_si);
2557 1.88.2.13 martin }
2558 1.88.2.13 martin }
2559 1.88.2.13 martin
2560 1.88.2.13 martin /************************************************************************
2561 1.88.2.6 snj * ixgbe_msix_que - MSI-X Queue Interrupt Service routine
2562 1.88.2.6 snj ************************************************************************/
2563 1.88.2.6 snj static int
2564 1.88.2.6 snj ixgbe_msix_que(void *arg)
2565 1.88.2.6 snj {
2566 1.88.2.6 snj struct ix_queue *que = arg;
2567 1.88.2.6 snj struct adapter *adapter = que->adapter;
2568 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2569 1.88.2.6 snj struct tx_ring *txr = que->txr;
2570 1.88.2.6 snj struct rx_ring *rxr = que->rxr;
2571 1.88.2.6 snj bool more;
2572 1.88.2.6 snj u32 newitr = 0;
2573 1.55 msaitoh
2574 1.88.2.6 snj /* Protect against spurious interrupts */
2575 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
2576 1.88.2.6 snj return 0;
2577 1.43 msaitoh
2578 1.88.2.6 snj ixgbe_disable_queue(adapter, que->msix);
2579 1.88.2.6 snj ++que->irqs.ev_count;
2580 1.43 msaitoh
2581 1.88.2.18 martin /*
2582 1.88.2.18 martin * Don't change "que->txrx_use_workqueue" from this point to avoid
2583 1.88.2.18 martin * flip-flopping softint/workqueue mode in one deferred processing.
2584 1.88.2.18 martin */
2585 1.88.2.18 martin que->txrx_use_workqueue = adapter->txrx_use_workqueue;
2586 1.88.2.18 martin
2587 1.88.2.6 snj #ifdef __NetBSD__
2588 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
2589 1.88.2.6 snj more = true;
2590 1.88.2.6 snj #else
2591 1.88.2.6 snj more = ixgbe_rxeof(que);
2592 1.88.2.1 martin #endif
2593 1.43 msaitoh
2594 1.88.2.6 snj IXGBE_TX_LOCK(txr);
2595 1.88.2.6 snj ixgbe_txeof(txr);
2596 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
2597 1.55 msaitoh
2598 1.88.2.6 snj /* Do AIM now? */
2599 1.1 dyoung
2600 1.88.2.6 snj if (adapter->enable_aim == false)
2601 1.88.2.6 snj goto no_calc;
2602 1.88.2.6 snj /*
2603 1.88.2.6 snj * Do Adaptive Interrupt Moderation:
2604 1.88.2.6 snj * - Write out last calculated setting
2605 1.88.2.6 snj * - Calculate based on average size over
2606 1.88.2.6 snj * the last interval.
2607 1.88.2.6 snj */
2608 1.88.2.6 snj if (que->eitr_setting)
2609 1.88.2.20 martin ixgbe_eitr_write(adapter, que->msix, que->eitr_setting);
2610 1.1 dyoung
2611 1.88.2.6 snj que->eitr_setting = 0;
2612 1.1 dyoung
2613 1.88.2.6 snj /* Idle, do nothing */
2614 1.88.2.6 snj if ((txr->bytes == 0) && (rxr->bytes == 0))
2615 1.88.2.6 snj goto no_calc;
2616 1.88.2.6 snj
2617 1.88.2.6 snj if ((txr->bytes) && (txr->packets))
2618 1.88.2.6 snj newitr = txr->bytes/txr->packets;
2619 1.88.2.6 snj if ((rxr->bytes) && (rxr->packets))
2620 1.88.2.6 snj newitr = max(newitr, (rxr->bytes / rxr->packets));
2621 1.88.2.6 snj newitr += 24; /* account for hardware frame, crc */
2622 1.1 dyoung
2623 1.88.2.6 snj /* set an upper boundary */
2624 1.88.2.6 snj newitr = min(newitr, 3000);
2625 1.43 msaitoh
2626 1.88.2.6 snj /* Be nice to the mid range */
2627 1.88.2.6 snj if ((newitr > 300) && (newitr < 1200))
2628 1.88.2.6 snj newitr = (newitr / 3);
2629 1.88.2.6 snj else
2630 1.88.2.6 snj newitr = (newitr / 2);
2631 1.88.2.6 snj
2632 1.88.2.10 martin /*
2633 1.88.2.10 martin * When RSC is used, ITR interval must be larger than RSC_DELAY.
2634 1.88.2.10 martin * Currently, we use 2us for RSC_DELAY. The minimum value is always
2635 1.88.2.10 martin * greater than 2us on 100M (and 10M?(not documented)), but it's not
2636 1.88.2.10 martin * on 1G and higher.
2637 1.88.2.10 martin */
2638 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
2639 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
2640 1.88.2.10 martin if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
2641 1.88.2.10 martin newitr = IXGBE_MIN_RSC_EITR_10G1G;
2642 1.88.2.10 martin }
2643 1.88.2.10 martin
2644 1.88.2.6 snj /* save for next interrupt */
2645 1.88.2.6 snj que->eitr_setting = newitr;
2646 1.88.2.6 snj
2647 1.88.2.6 snj /* Reset state */
2648 1.88.2.6 snj txr->bytes = 0;
2649 1.88.2.6 snj txr->packets = 0;
2650 1.88.2.6 snj rxr->bytes = 0;
2651 1.88.2.6 snj rxr->packets = 0;
2652 1.88.2.6 snj
2653 1.88.2.6 snj no_calc:
2654 1.88.2.13 martin if (more)
2655 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
2656 1.88.2.13 martin else
2657 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
2658 1.88.2.6 snj
2659 1.88.2.6 snj return 1;
2660 1.88.2.6 snj } /* ixgbe_msix_que */
2661 1.88.2.6 snj
2662 1.88.2.6 snj /************************************************************************
2663 1.88.2.6 snj * ixgbe_media_status - Media Ioctl callback
2664 1.1 dyoung *
2665 1.88.2.6 snj * Called whenever the user queries the status of
2666 1.88.2.6 snj * the interface using ifconfig.
2667 1.88.2.6 snj ************************************************************************/
2668 1.42 msaitoh static void
2669 1.88.2.6 snj ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
2670 1.1 dyoung {
2671 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2672 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2673 1.88.2.6 snj int layer;
2674 1.1 dyoung
2675 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_status: begin");
2676 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
2677 1.88.2.6 snj ixgbe_update_link_status(adapter);
2678 1.1 dyoung
2679 1.88.2.6 snj ifmr->ifm_status = IFM_AVALID;
2680 1.88.2.6 snj ifmr->ifm_active = IFM_ETHER;
2681 1.1 dyoung
2682 1.88.2.6 snj if (!adapter->link_active) {
2683 1.88.2.6 snj ifmr->ifm_active |= IFM_NONE;
2684 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2685 1.88.2.6 snj return;
2686 1.88.2.6 snj }
2687 1.1 dyoung
2688 1.88.2.6 snj ifmr->ifm_status |= IFM_ACTIVE;
2689 1.88.2.6 snj layer = adapter->phy_layer;
2690 1.1 dyoung
2691 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T ||
2692 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_5GBASE_T ||
2693 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_T ||
2694 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_T ||
2695 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_100BASE_TX ||
2696 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_10BASE_T)
2697 1.88.2.6 snj switch (adapter->link_speed) {
2698 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2699 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2700 1.42 msaitoh break;
2701 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
2702 1.88.2.6 snj ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
2703 1.42 msaitoh break;
2704 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2705 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
2706 1.42 msaitoh break;
2707 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2708 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
2709 1.88.2.6 snj break;
2710 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
2711 1.88.2.6 snj ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
2712 1.88.2.6 snj break;
2713 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
2714 1.88.2.6 snj ifmr->ifm_active |= IFM_10_T | IFM_FDX;
2715 1.42 msaitoh break;
2716 1.1 dyoung }
2717 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
2718 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA)
2719 1.88.2.6 snj switch (adapter->link_speed) {
2720 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2721 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX;
2722 1.88.2.6 snj break;
2723 1.88.2.6 snj }
2724 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR)
2725 1.88.2.6 snj switch (adapter->link_speed) {
2726 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2727 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LR | IFM_FDX;
2728 1.88.2.6 snj break;
2729 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2730 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2731 1.88.2.6 snj break;
2732 1.88.2.6 snj }
2733 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM)
2734 1.88.2.6 snj switch (adapter->link_speed) {
2735 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2736 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX;
2737 1.88.2.6 snj break;
2738 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2739 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2740 1.88.2.6 snj break;
2741 1.88.2.6 snj }
2742 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR ||
2743 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
2744 1.88.2.6 snj switch (adapter->link_speed) {
2745 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2746 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2747 1.88.2.6 snj break;
2748 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2749 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
2750 1.88.2.6 snj break;
2751 1.88.2.6 snj }
2752 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
2753 1.88.2.6 snj switch (adapter->link_speed) {
2754 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2755 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2756 1.88.2.6 snj break;
2757 1.88.2.6 snj }
2758 1.88.2.6 snj /*
2759 1.88.2.6 snj * XXX: These need to use the proper media types once
2760 1.88.2.6 snj * they're added.
2761 1.88.2.6 snj */
2762 1.88.2.6 snj if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
2763 1.88.2.6 snj switch (adapter->link_speed) {
2764 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2765 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2766 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
2767 1.88.2.6 snj #else
2768 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KR | IFM_FDX;
2769 1.45 msaitoh #endif
2770 1.88.2.6 snj break;
2771 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2772 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2773 1.88.2.6 snj break;
2774 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2775 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2776 1.88.2.6 snj break;
2777 1.88.2.6 snj }
2778 1.88.2.6 snj else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
2779 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
2780 1.88.2.6 snj layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
2781 1.88.2.6 snj switch (adapter->link_speed) {
2782 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
2783 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2784 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
2785 1.45 msaitoh #else
2786 1.88.2.6 snj ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX;
2787 1.45 msaitoh #endif
2788 1.88.2.6 snj break;
2789 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
2790 1.88.2.6 snj ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
2791 1.88.2.6 snj break;
2792 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
2793 1.88.2.6 snj ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2794 1.88.2.6 snj break;
2795 1.88.2.6 snj }
2796 1.88.2.6 snj
2797 1.88.2.6 snj /* If nothing is recognized... */
2798 1.88.2.6 snj #if 0
2799 1.88.2.6 snj if (IFM_SUBTYPE(ifmr->ifm_active) == 0)
2800 1.88.2.6 snj ifmr->ifm_active |= IFM_UNKNOWN;
2801 1.88.2.6 snj #endif
2802 1.88.2.6 snj
2803 1.88.2.6 snj ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
2804 1.88.2.6 snj
2805 1.88.2.6 snj /* Display current flow control setting used on link */
2806 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_rx_pause ||
2807 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2808 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_RXPAUSE;
2809 1.88.2.6 snj if (hw->fc.current_mode == ixgbe_fc_tx_pause ||
2810 1.88.2.6 snj hw->fc.current_mode == ixgbe_fc_full)
2811 1.88.2.6 snj ifmr->ifm_active |= IFM_ETH_TXPAUSE;
2812 1.88.2.6 snj
2813 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
2814 1.1 dyoung
2815 1.42 msaitoh return;
2816 1.88.2.6 snj } /* ixgbe_media_status */
2817 1.1 dyoung
2818 1.88.2.6 snj /************************************************************************
2819 1.88.2.6 snj * ixgbe_media_change - Media Ioctl callback
2820 1.88.2.6 snj *
2821 1.88.2.6 snj * Called when the user changes speed/duplex using
2822 1.88.2.6 snj * media/mediopt option with ifconfig.
2823 1.88.2.6 snj ************************************************************************/
2824 1.88.2.6 snj static int
2825 1.88.2.6 snj ixgbe_media_change(struct ifnet *ifp)
2826 1.33 msaitoh {
2827 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
2828 1.88.2.6 snj struct ifmedia *ifm = &adapter->media;
2829 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2830 1.88.2.6 snj ixgbe_link_speed speed = 0;
2831 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
2832 1.88.2.6 snj bool negotiate = false;
2833 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
2834 1.88.2.6 snj
2835 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_media_change: begin");
2836 1.88.2.6 snj
2837 1.88.2.6 snj if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2838 1.88.2.6 snj return (EINVAL);
2839 1.33 msaitoh
2840 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
2841 1.88.2.17 martin return (EPERM);
2842 1.88.2.6 snj
2843 1.88.2.23 martin IXGBE_CORE_LOCK(adapter);
2844 1.88.2.6 snj /*
2845 1.88.2.6 snj * We don't actually need to check against the supported
2846 1.88.2.6 snj * media types of the adapter; ifmedia will take care of
2847 1.88.2.6 snj * that for us.
2848 1.88.2.6 snj */
2849 1.88.2.6 snj switch (IFM_SUBTYPE(ifm->ifm_media)) {
2850 1.88.2.6 snj case IFM_AUTO:
2851 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
2852 1.88.2.6 snj &negotiate);
2853 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
2854 1.88.2.6 snj device_printf(adapter->dev, "Unable to determine "
2855 1.88.2.6 snj "supported advertise speeds\n");
2856 1.88.2.23 martin IXGBE_CORE_UNLOCK(adapter);
2857 1.88.2.6 snj return (ENODEV);
2858 1.88.2.6 snj }
2859 1.88.2.6 snj speed |= link_caps;
2860 1.88.2.6 snj break;
2861 1.88.2.6 snj case IFM_10G_T:
2862 1.88.2.6 snj case IFM_10G_LRM:
2863 1.88.2.6 snj case IFM_10G_LR:
2864 1.88.2.6 snj case IFM_10G_TWINAX:
2865 1.88.2.6 snj #ifndef IFM_ETH_XTYPE
2866 1.88.2.6 snj case IFM_10G_SR: /* KR, too */
2867 1.88.2.6 snj case IFM_10G_CX4: /* KX4 */
2868 1.33 msaitoh #else
2869 1.88.2.6 snj case IFM_10G_KR:
2870 1.88.2.6 snj case IFM_10G_KX4:
2871 1.33 msaitoh #endif
2872 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
2873 1.44 msaitoh break;
2874 1.88.2.6 snj case IFM_5000_T:
2875 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
2876 1.44 msaitoh break;
2877 1.88.2.6 snj case IFM_2500_T:
2878 1.88.2.6 snj case IFM_2500_KX:
2879 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
2880 1.88.2.6 snj break;
2881 1.88.2.6 snj case IFM_1000_T:
2882 1.88.2.6 snj case IFM_1000_LX:
2883 1.88.2.6 snj case IFM_1000_SX:
2884 1.88.2.6 snj case IFM_1000_KX:
2885 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
2886 1.88.2.6 snj break;
2887 1.88.2.6 snj case IFM_100_TX:
2888 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
2889 1.88.2.6 snj break;
2890 1.88.2.6 snj case IFM_10_T:
2891 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
2892 1.44 msaitoh break;
2893 1.88.2.16 martin case IFM_NONE:
2894 1.88.2.16 martin break;
2895 1.88.2.6 snj default:
2896 1.88.2.6 snj goto invalid;
2897 1.44 msaitoh }
2898 1.44 msaitoh
2899 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
2900 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
2901 1.88.2.6 snj adapter->advertise = 0;
2902 1.88.2.6 snj if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) {
2903 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0)
2904 1.88.2.6 snj adapter->advertise |= 1 << 2;
2905 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0)
2906 1.88.2.6 snj adapter->advertise |= 1 << 1;
2907 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0)
2908 1.88.2.6 snj adapter->advertise |= 1 << 0;
2909 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0)
2910 1.88.2.6 snj adapter->advertise |= 1 << 3;
2911 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0)
2912 1.88.2.6 snj adapter->advertise |= 1 << 4;
2913 1.88.2.6 snj if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0)
2914 1.88.2.6 snj adapter->advertise |= 1 << 5;
2915 1.33 msaitoh }
2916 1.33 msaitoh
2917 1.88.2.23 martin IXGBE_CORE_UNLOCK(adapter);
2918 1.88.2.6 snj return (0);
2919 1.33 msaitoh
2920 1.88.2.6 snj invalid:
2921 1.88.2.6 snj device_printf(adapter->dev, "Invalid media type!\n");
2922 1.88.2.23 martin IXGBE_CORE_UNLOCK(adapter);
2923 1.33 msaitoh
2924 1.88.2.6 snj return (EINVAL);
2925 1.88.2.6 snj } /* ixgbe_media_change */
2926 1.1 dyoung
2927 1.88.2.6 snj /************************************************************************
2928 1.88.2.6 snj * ixgbe_set_promisc
2929 1.88.2.6 snj ************************************************************************/
2930 1.1 dyoung static void
2931 1.88.2.6 snj ixgbe_set_promisc(struct adapter *adapter)
2932 1.1 dyoung {
2933 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
2934 1.88.2.6 snj int mcnt = 0;
2935 1.88.2.6 snj u32 rctl;
2936 1.88.2.6 snj struct ether_multi *enm;
2937 1.88.2.6 snj struct ether_multistep step;
2938 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
2939 1.1 dyoung
2940 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
2941 1.88.2.6 snj rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2942 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_UPE);
2943 1.88.2.6 snj if (ifp->if_flags & IFF_ALLMULTI)
2944 1.88.2.6 snj mcnt = MAX_NUM_MULTICAST_ADDRESSES;
2945 1.88.2.6 snj else {
2946 1.88.2.6 snj ETHER_LOCK(ec);
2947 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
2948 1.88.2.6 snj while (enm != NULL) {
2949 1.88.2.6 snj if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2950 1.88.2.6 snj break;
2951 1.88.2.6 snj mcnt++;
2952 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
2953 1.88.2.6 snj }
2954 1.88.2.6 snj ETHER_UNLOCK(ec);
2955 1.44 msaitoh }
2956 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES)
2957 1.88.2.6 snj rctl &= (~IXGBE_FCTRL_MPE);
2958 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2959 1.1 dyoung
2960 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC) {
2961 1.88.2.6 snj rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2962 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2963 1.88.2.6 snj } else if (ifp->if_flags & IFF_ALLMULTI) {
2964 1.88.2.6 snj rctl |= IXGBE_FCTRL_MPE;
2965 1.88.2.6 snj rctl &= ~IXGBE_FCTRL_UPE;
2966 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, rctl);
2967 1.88.2.6 snj }
2968 1.88.2.6 snj } /* ixgbe_set_promisc */
2969 1.88.2.6 snj
2970 1.88.2.6 snj /************************************************************************
2971 1.88.2.6 snj * ixgbe_msix_link - Link status change ISR (MSI/MSI-X)
2972 1.88.2.6 snj ************************************************************************/
2973 1.88.2.6 snj static int
2974 1.88.2.6 snj ixgbe_msix_link(void *arg)
2975 1.88.2.6 snj {
2976 1.88.2.6 snj struct adapter *adapter = arg;
2977 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
2978 1.88.2.6 snj u32 eicr, eicr_mask;
2979 1.88.2.6 snj s32 retval;
2980 1.1 dyoung
2981 1.88.2.6 snj ++adapter->link_irq.ev_count;
2982 1.1 dyoung
2983 1.88.2.6 snj /* Pause other interrupts */
2984 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);
2985 1.1 dyoung
2986 1.88.2.6 snj /* First get the cause */
2987 1.88.2.10 martin /*
2988 1.88.2.10 martin * The specifications of 82598, 82599, X540 and X550 say EICS register
2989 1.88.2.10 martin * is write only. However, Linux says it is a workaround for silicon
2990 1.88.2.10 martin * errata to read EICS instead of EICR to get interrupt cause. It seems
2991 1.88.2.10 martin * there is a problem about read clear mechanism for EICR register.
2992 1.88.2.10 martin */
2993 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2994 1.88.2.6 snj /* Be sure the queue bits are not cleared */
2995 1.88.2.6 snj eicr &= ~IXGBE_EICR_RTX_QUEUE;
2996 1.88.2.6 snj /* Clear interrupt with write */
2997 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2998 1.1 dyoung
2999 1.88.2.6 snj /* Link status change */
3000 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC) {
3001 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
3002 1.88.2.6 snj softint_schedule(adapter->link_si);
3003 1.88.2.6 snj }
3004 1.33 msaitoh
3005 1.88.2.6 snj if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
3006 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_FDIR) &&
3007 1.88.2.6 snj (eicr & IXGBE_EICR_FLOW_DIR)) {
3008 1.88.2.6 snj /* This is probably overkill :) */
3009 1.88.2.6 snj if (!atomic_cas_uint(&adapter->fdir_reinit, 0, 1))
3010 1.88.2.6 snj return 1;
3011 1.88.2.6 snj /* Disable the interrupt */
3012 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3013 1.88.2.6 snj softint_schedule(adapter->fdir_si);
3014 1.88.2.6 snj }
3015 1.82 msaitoh
3016 1.88.2.6 snj if (eicr & IXGBE_EICR_ECC) {
3017 1.88.2.6 snj device_printf(adapter->dev,
3018 1.88.2.6 snj "CRITICAL: ECC ERROR!! Please Reboot!!\n");
3019 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3020 1.88.2.6 snj }
3021 1.82 msaitoh
3022 1.88.2.6 snj /* Check for over temp condition */
3023 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR) {
3024 1.88.2.6 snj switch (adapter->hw.mac.type) {
3025 1.88.2.6 snj case ixgbe_mac_X550EM_a:
3026 1.88.2.6 snj if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a))
3027 1.88.2.6 snj break;
3028 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC,
3029 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
3030 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
3031 1.88.2.6 snj IXGBE_EICR_GPI_SDP0_X550EM_a);
3032 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
3033 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
3034 1.88.2.6 snj break;
3035 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
3036 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
3037 1.88.2.6 snj break;
3038 1.88.2.6 snj default:
3039 1.88.2.6 snj if (!(eicr & IXGBE_EICR_TS))
3040 1.88.2.6 snj break;
3041 1.88.2.6 snj retval = hw->phy.ops.check_overtemp(hw);
3042 1.88.2.6 snj if (retval != IXGBE_ERR_OVERTEMP)
3043 1.88.2.6 snj break;
3044 1.88.2.6 snj device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
3045 1.88.2.6 snj device_printf(adapter->dev, "System shutdown required!\n");
3046 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS);
3047 1.88.2.6 snj break;
3048 1.88.2.6 snj }
3049 1.46 msaitoh }
3050 1.33 msaitoh
3051 1.88.2.6 snj /* Check for VF message */
3052 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_SRIOV) &&
3053 1.88.2.6 snj (eicr & IXGBE_EICR_MAILBOX))
3054 1.88.2.6 snj softint_schedule(adapter->mbx_si);
3055 1.88.2.6 snj }
3056 1.1 dyoung
3057 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
3058 1.88.2.6 snj /* Pluggable optics-related interrupt */
3059 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
3060 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
3061 1.88.2.6 snj else
3062 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
3063 1.28 msaitoh
3064 1.88.2.6 snj if (eicr & eicr_mask) {
3065 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
3066 1.88.2.6 snj softint_schedule(adapter->mod_si);
3067 1.88.2.6 snj }
3068 1.88.2.6 snj
3069 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
3070 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
3071 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
3072 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
3073 1.88.2.6 snj softint_schedule(adapter->msf_si);
3074 1.88.2.6 snj }
3075 1.1 dyoung }
3076 1.1 dyoung
3077 1.88.2.6 snj /* Check for fan failure */
3078 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
3079 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, TRUE);
3080 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
3081 1.88.2.6 snj }
3082 1.88.2.6 snj
3083 1.88.2.6 snj /* External PHY interrupt */
3084 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
3085 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3086 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);
3087 1.88.2.6 snj softint_schedule(adapter->phy_si);
3088 1.88.2.6 snj }
3089 1.88.2.6 snj
3090 1.88.2.6 snj /* Re-enable other interrupts */
3091 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
3092 1.88.2.6 snj return 1;
3093 1.88.2.6 snj } /* ixgbe_msix_link */
3094 1.88.2.6 snj
3095 1.88.2.10 martin static void
3096 1.88.2.20 martin ixgbe_eitr_write(struct adapter *adapter, uint32_t index, uint32_t itr)
3097 1.88.2.10 martin {
3098 1.88.2.10 martin
3099 1.88.2.10 martin if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3100 1.88.2.10 martin itr |= itr << 16;
3101 1.88.2.10 martin else
3102 1.88.2.10 martin itr |= IXGBE_EITR_CNT_WDIS;
3103 1.88.2.10 martin
3104 1.88.2.20 martin IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(index), itr);
3105 1.88.2.10 martin }
3106 1.88.2.10 martin
3107 1.88.2.10 martin
3108 1.88.2.6 snj /************************************************************************
3109 1.88.2.6 snj * ixgbe_sysctl_interrupt_rate_handler
3110 1.88.2.6 snj ************************************************************************/
3111 1.88.2.6 snj static int
3112 1.88.2.6 snj ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS)
3113 1.88.2.6 snj {
3114 1.88.2.6 snj struct sysctlnode node = *rnode;
3115 1.88.2.6 snj struct ix_queue *que = (struct ix_queue *)node.sysctl_data;
3116 1.88.2.10 martin struct adapter *adapter = que->adapter;
3117 1.88.2.6 snj uint32_t reg, usec, rate;
3118 1.88.2.6 snj int error;
3119 1.88.2.6 snj
3120 1.88.2.6 snj if (que == NULL)
3121 1.88.2.6 snj return 0;
3122 1.88.2.6 snj reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix));
3123 1.88.2.6 snj usec = ((reg & 0x0FF8) >> 3);
3124 1.88.2.6 snj if (usec > 0)
3125 1.88.2.6 snj rate = 500000 / usec;
3126 1.88.2.6 snj else
3127 1.88.2.6 snj rate = 0;
3128 1.88.2.6 snj node.sysctl_data = &rate;
3129 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
3130 1.88.2.6 snj if (error || newp == NULL)
3131 1.88.2.6 snj return error;
3132 1.88.2.6 snj reg &= ~0xfff; /* default, no limitation */
3133 1.88.2.6 snj if (rate > 0 && rate < 500000) {
3134 1.88.2.6 snj if (rate < 1000)
3135 1.88.2.6 snj rate = 1000;
3136 1.88.2.6 snj reg |= ((4000000/rate) & 0xff8);
3137 1.88.2.10 martin /*
3138 1.88.2.10 martin * When RSC is used, ITR interval must be larger than
3139 1.88.2.10 martin * RSC_DELAY. Currently, we use 2us for RSC_DELAY.
3140 1.88.2.10 martin * The minimum value is always greater than 2us on 100M
3141 1.88.2.10 martin * (and 10M?(not documented)), but it's not on 1G and higher.
3142 1.88.2.10 martin */
3143 1.88.2.10 martin if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
3144 1.88.2.10 martin && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
3145 1.88.2.10 martin if ((adapter->num_queues > 1)
3146 1.88.2.10 martin && (reg < IXGBE_MIN_RSC_EITR_10G1G))
3147 1.88.2.10 martin return EINVAL;
3148 1.88.2.10 martin }
3149 1.88.2.10 martin ixgbe_max_interrupt_rate = rate;
3150 1.88.2.10 martin } else
3151 1.88.2.10 martin ixgbe_max_interrupt_rate = 0;
3152 1.88.2.20 martin ixgbe_eitr_write(adapter, que->msix, reg);
3153 1.1 dyoung
3154 1.88.2.6 snj return (0);
3155 1.88.2.6 snj } /* ixgbe_sysctl_interrupt_rate_handler */
3156 1.33 msaitoh
3157 1.88.2.6 snj const struct sysctlnode *
3158 1.88.2.6 snj ixgbe_sysctl_instance(struct adapter *adapter)
3159 1.88.2.6 snj {
3160 1.88.2.6 snj const char *dvname;
3161 1.88.2.6 snj struct sysctllog **log;
3162 1.88.2.6 snj int rc;
3163 1.88.2.6 snj const struct sysctlnode *rnode;
3164 1.1 dyoung
3165 1.88.2.6 snj if (adapter->sysctltop != NULL)
3166 1.88.2.6 snj return adapter->sysctltop;
3167 1.1 dyoung
3168 1.88.2.6 snj log = &adapter->sysctllog;
3169 1.88.2.6 snj dvname = device_xname(adapter->dev);
3170 1.1 dyoung
3171 1.88.2.6 snj if ((rc = sysctl_createv(log, 0, NULL, &rnode,
3172 1.88.2.6 snj 0, CTLTYPE_NODE, dvname,
3173 1.88.2.6 snj SYSCTL_DESCR("ixgbe information and settings"),
3174 1.88.2.6 snj NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
3175 1.88.2.6 snj goto err;
3176 1.1 dyoung
3177 1.88.2.6 snj return rnode;
3178 1.88.2.6 snj err:
3179 1.88.2.6 snj printf("%s: sysctl_createv failed, rc = %d\n", __func__, rc);
3180 1.88.2.6 snj return NULL;
3181 1.1 dyoung }
3182 1.1 dyoung
3183 1.88.2.6 snj /************************************************************************
3184 1.88.2.6 snj * ixgbe_add_device_sysctls
3185 1.88.2.6 snj ************************************************************************/
3186 1.1 dyoung static void
3187 1.88.2.6 snj ixgbe_add_device_sysctls(struct adapter *adapter)
3188 1.1 dyoung {
3189 1.88.2.6 snj device_t dev = adapter->dev;
3190 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3191 1.88.2.6 snj struct sysctllog **log;
3192 1.88.2.6 snj const struct sysctlnode *rnode, *cnode;
3193 1.1 dyoung
3194 1.88.2.6 snj log = &adapter->sysctllog;
3195 1.1 dyoung
3196 1.88.2.6 snj if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
3197 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl root\n");
3198 1.1 dyoung return;
3199 1.88.2.6 snj }
3200 1.1 dyoung
3201 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3202 1.88.2.20 martin CTLFLAG_READWRITE, CTLTYPE_INT,
3203 1.88.2.20 martin "debug", SYSCTL_DESCR("Debug Info"),
3204 1.88.2.20 martin ixgbe_sysctl_debug, 0, (void *)adapter, 0, CTL_CREATE, CTL_EOL) != 0)
3205 1.88.2.20 martin aprint_error_dev(dev, "could not create sysctl\n");
3206 1.88.2.20 martin
3207 1.88.2.20 martin if (sysctl_createv(log, 0, &rnode, &cnode,
3208 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3209 1.88.2.6 snj "num_rx_desc", SYSCTL_DESCR("Number of rx descriptors"),
3210 1.88.2.6 snj NULL, 0, &adapter->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0)
3211 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3212 1.1 dyoung
3213 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3214 1.88.2.6 snj CTLFLAG_READONLY, CTLTYPE_INT,
3215 1.88.2.6 snj "num_queues", SYSCTL_DESCR("Number of queues"),
3216 1.88.2.6 snj NULL, 0, &adapter->num_queues, 0, CTL_CREATE, CTL_EOL) != 0)
3217 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3218 1.1 dyoung
3219 1.88.2.6 snj /* Sysctls for all devices */
3220 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3221 1.88.2.6 snj CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC),
3222 1.88.2.6 snj ixgbe_sysctl_flowcntl, 0, (void *)adapter, 0, CTL_CREATE,
3223 1.88.2.6 snj CTL_EOL) != 0)
3224 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3225 1.1 dyoung
3226 1.88.2.6 snj adapter->enable_aim = ixgbe_enable_aim;
3227 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3228 1.88.2.6 snj CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"),
3229 1.88.2.6 snj NULL, 0, &adapter->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0)
3230 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3231 1.1 dyoung
3232 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode,
3233 1.88.2.6 snj CTLFLAG_READWRITE, CTLTYPE_INT,
3234 1.88.2.6 snj "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED),
3235 1.88.2.6 snj ixgbe_sysctl_advertise, 0, (void *)adapter, 0, CTL_CREATE,
3236 1.88.2.6 snj CTL_EOL) != 0)
3237 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3238 1.88.2.6 snj
3239 1.88.2.18 martin /*
3240 1.88.2.18 martin * If each "que->txrx_use_workqueue" is changed in sysctl handler,
3241 1.88.2.18 martin * it causesflip-flopping softint/workqueue mode in one deferred
3242 1.88.2.18 martin * processing. Therefore, preempt_disable()/preempt_enable() are
3243 1.88.2.18 martin * required in ixgbe_sched_handle_que() to avoid
3244 1.88.2.18 martin * KASSERT(ixgbe_sched_handle_que()) in softint_schedule().
3245 1.88.2.18 martin * I think changing "que->txrx_use_workqueue" in interrupt handler
3246 1.88.2.18 martin * is lighter than doing preempt_disable()/preempt_enable() in every
3247 1.88.2.18 martin * ixgbe_sched_handle_que().
3248 1.88.2.18 martin */
3249 1.88.2.12 martin adapter->txrx_use_workqueue = ixgbe_txrx_workqueue;
3250 1.88.2.12 martin if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3251 1.88.2.12 martin CTLTYPE_BOOL, "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
3252 1.88.2.12 martin NULL, 0, &adapter->txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL) != 0)
3253 1.88.2.12 martin aprint_error_dev(dev, "could not create sysctl\n");
3254 1.88.2.12 martin
3255 1.88.2.6 snj #ifdef IXGBE_DEBUG
3256 1.88.2.6 snj /* testing sysctls (for all devices) */
3257 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3258 1.88.2.6 snj CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"),
3259 1.88.2.6 snj ixgbe_sysctl_power_state, 0, (void *)adapter, 0, CTL_CREATE,
3260 1.88.2.6 snj CTL_EOL) != 0)
3261 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3262 1.88.2.6 snj
3263 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY,
3264 1.88.2.6 snj CTLTYPE_STRING, "print_rss_config",
3265 1.88.2.6 snj SYSCTL_DESCR("Prints RSS Configuration"),
3266 1.88.2.6 snj ixgbe_sysctl_print_rss_config, 0, (void *)adapter, 0, CTL_CREATE,
3267 1.88.2.6 snj CTL_EOL) != 0)
3268 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3269 1.1 dyoung #endif
3270 1.88.2.6 snj /* for X550 series devices */
3271 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3272 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3273 1.88.2.6 snj CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"),
3274 1.88.2.6 snj ixgbe_sysctl_dmac, 0, (void *)adapter, 0, CTL_CREATE,
3275 1.88.2.6 snj CTL_EOL) != 0)
3276 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3277 1.1 dyoung
3278 1.88.2.6 snj /* for WoL-capable devices */
3279 1.88.2.24 martin if (adapter->wol_support) {
3280 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3281 1.88.2.6 snj CTLTYPE_BOOL, "wol_enable",
3282 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake on LAN"),
3283 1.88.2.6 snj ixgbe_sysctl_wol_enable, 0, (void *)adapter, 0, CTL_CREATE,
3284 1.88.2.6 snj CTL_EOL) != 0)
3285 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3286 1.1 dyoung
3287 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3288 1.88.2.6 snj CTLTYPE_INT, "wufc",
3289 1.88.2.6 snj SYSCTL_DESCR("Enable/Disable Wake Up Filters"),
3290 1.88.2.6 snj ixgbe_sysctl_wufc, 0, (void *)adapter, 0, CTL_CREATE,
3291 1.88.2.6 snj CTL_EOL) != 0)
3292 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3293 1.88.2.6 snj }
3294 1.35 msaitoh
3295 1.88.2.6 snj /* for X552/X557-AT devices */
3296 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3297 1.88.2.6 snj const struct sysctlnode *phy_node;
3298 1.1 dyoung
3299 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE,
3300 1.88.2.6 snj "phy", SYSCTL_DESCR("External PHY sysctls"),
3301 1.88.2.6 snj NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) {
3302 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3303 1.88.2.6 snj return;
3304 1.33 msaitoh }
3305 1.88.2.6 snj
3306 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3307 1.88.2.6 snj CTLTYPE_INT, "temp",
3308 1.88.2.6 snj SYSCTL_DESCR("Current External PHY Temperature (Celsius)"),
3309 1.88.2.6 snj ixgbe_sysctl_phy_temp, 0, (void *)adapter, 0, CTL_CREATE,
3310 1.88.2.6 snj CTL_EOL) != 0)
3311 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3312 1.88.2.6 snj
3313 1.88.2.6 snj if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
3314 1.88.2.6 snj CTLTYPE_INT, "overtemp_occurred",
3315 1.88.2.6 snj SYSCTL_DESCR("External PHY High Temperature Event Occurred"),
3316 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)adapter, 0,
3317 1.88.2.6 snj CTL_CREATE, CTL_EOL) != 0)
3318 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3319 1.33 msaitoh }
3320 1.33 msaitoh
3321 1.88.2.22 martin if ((hw->mac.type == ixgbe_mac_X550EM_a)
3322 1.88.2.22 martin && (hw->phy.type == ixgbe_phy_fw))
3323 1.88.2.22 martin if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3324 1.88.2.22 martin CTLTYPE_BOOL, "force_10_100_autonego",
3325 1.88.2.22 martin SYSCTL_DESCR("Force autonego on 10M and 100M"),
3326 1.88.2.22 martin NULL, 0, &hw->phy.force_10_100_autonego, 0,
3327 1.88.2.22 martin CTL_CREATE, CTL_EOL) != 0)
3328 1.88.2.22 martin aprint_error_dev(dev, "could not create sysctl\n");
3329 1.88.2.22 martin
3330 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE) {
3331 1.88.2.6 snj if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
3332 1.88.2.6 snj CTLTYPE_INT, "eee_state",
3333 1.88.2.6 snj SYSCTL_DESCR("EEE Power Save State"),
3334 1.88.2.6 snj ixgbe_sysctl_eee_state, 0, (void *)adapter, 0, CTL_CREATE,
3335 1.88.2.6 snj CTL_EOL) != 0)
3336 1.88.2.6 snj aprint_error_dev(dev, "could not create sysctl\n");
3337 1.88.2.6 snj }
3338 1.88.2.6 snj } /* ixgbe_add_device_sysctls */
3339 1.1 dyoung
3340 1.88.2.6 snj /************************************************************************
3341 1.88.2.6 snj * ixgbe_allocate_pci_resources
3342 1.88.2.6 snj ************************************************************************/
3343 1.88.2.6 snj static int
3344 1.88.2.6 snj ixgbe_allocate_pci_resources(struct adapter *adapter,
3345 1.88.2.6 snj const struct pci_attach_args *pa)
3346 1.88.2.6 snj {
3347 1.88.2.26 martin pcireg_t memtype, csr;
3348 1.88.2.6 snj device_t dev = adapter->dev;
3349 1.88.2.6 snj bus_addr_t addr;
3350 1.88.2.6 snj int flags;
3351 1.88.2.6 snj
3352 1.88.2.6 snj memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
3353 1.88.2.6 snj switch (memtype) {
3354 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
3355 1.88.2.6 snj case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
3356 1.88.2.6 snj adapter->osdep.mem_bus_space_tag = pa->pa_memt;
3357 1.88.2.6 snj if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0),
3358 1.88.2.6 snj memtype, &addr, &adapter->osdep.mem_size, &flags) != 0)
3359 1.88.2.6 snj goto map_err;
3360 1.88.2.6 snj if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) {
3361 1.88.2.6 snj aprint_normal_dev(dev, "clearing prefetchable bit\n");
3362 1.88.2.6 snj flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
3363 1.88.2.6 snj }
3364 1.88.2.6 snj if (bus_space_map(adapter->osdep.mem_bus_space_tag, addr,
3365 1.88.2.6 snj adapter->osdep.mem_size, flags,
3366 1.88.2.6 snj &adapter->osdep.mem_bus_space_handle) != 0) {
3367 1.88.2.6 snj map_err:
3368 1.88.2.6 snj adapter->osdep.mem_size = 0;
3369 1.88.2.6 snj aprint_error_dev(dev, "unable to map BAR0\n");
3370 1.88.2.6 snj return ENXIO;
3371 1.88.2.6 snj }
3372 1.88.2.26 martin /*
3373 1.88.2.26 martin * Enable address decoding for memory range in case BIOS or
3374 1.88.2.26 martin * UEFI don't set it.
3375 1.88.2.26 martin */
3376 1.88.2.26 martin csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
3377 1.88.2.26 martin PCI_COMMAND_STATUS_REG);
3378 1.88.2.26 martin csr |= PCI_COMMAND_MEM_ENABLE;
3379 1.88.2.26 martin pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
3380 1.88.2.26 martin csr);
3381 1.88.2.6 snj break;
3382 1.88.2.6 snj default:
3383 1.88.2.6 snj aprint_error_dev(dev, "unexpected type on BAR0\n");
3384 1.88.2.6 snj return ENXIO;
3385 1.1 dyoung }
3386 1.1 dyoung
3387 1.88.2.6 snj return (0);
3388 1.88.2.6 snj } /* ixgbe_allocate_pci_resources */
3389 1.88.2.6 snj
3390 1.88.2.8 snj static void
3391 1.88.2.8 snj ixgbe_free_softint(struct adapter *adapter)
3392 1.88.2.8 snj {
3393 1.88.2.8 snj struct ix_queue *que = adapter->queues;
3394 1.88.2.8 snj struct tx_ring *txr = adapter->tx_rings;
3395 1.88.2.8 snj int i;
3396 1.88.2.8 snj
3397 1.88.2.8 snj for (i = 0; i < adapter->num_queues; i++, que++, txr++) {
3398 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
3399 1.88.2.8 snj if (txr->txr_si != NULL)
3400 1.88.2.8 snj softint_disestablish(txr->txr_si);
3401 1.88.2.8 snj }
3402 1.88.2.8 snj if (que->que_si != NULL)
3403 1.88.2.8 snj softint_disestablish(que->que_si);
3404 1.88.2.8 snj }
3405 1.88.2.12 martin if (adapter->txr_wq != NULL)
3406 1.88.2.12 martin workqueue_destroy(adapter->txr_wq);
3407 1.88.2.12 martin if (adapter->txr_wq_enqueued != NULL)
3408 1.88.2.12 martin percpu_free(adapter->txr_wq_enqueued, sizeof(u_int));
3409 1.88.2.12 martin if (adapter->que_wq != NULL)
3410 1.88.2.12 martin workqueue_destroy(adapter->que_wq);
3411 1.88.2.8 snj
3412 1.88.2.8 snj /* Drain the Link queue */
3413 1.88.2.8 snj if (adapter->link_si != NULL) {
3414 1.88.2.8 snj softint_disestablish(adapter->link_si);
3415 1.88.2.8 snj adapter->link_si = NULL;
3416 1.88.2.8 snj }
3417 1.88.2.8 snj if (adapter->mod_si != NULL) {
3418 1.88.2.8 snj softint_disestablish(adapter->mod_si);
3419 1.88.2.8 snj adapter->mod_si = NULL;
3420 1.88.2.8 snj }
3421 1.88.2.8 snj if (adapter->msf_si != NULL) {
3422 1.88.2.8 snj softint_disestablish(adapter->msf_si);
3423 1.88.2.8 snj adapter->msf_si = NULL;
3424 1.88.2.8 snj }
3425 1.88.2.8 snj if (adapter->phy_si != NULL) {
3426 1.88.2.8 snj softint_disestablish(adapter->phy_si);
3427 1.88.2.8 snj adapter->phy_si = NULL;
3428 1.88.2.8 snj }
3429 1.88.2.8 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR) {
3430 1.88.2.8 snj if (adapter->fdir_si != NULL) {
3431 1.88.2.8 snj softint_disestablish(adapter->fdir_si);
3432 1.88.2.8 snj adapter->fdir_si = NULL;
3433 1.88.2.8 snj }
3434 1.88.2.8 snj }
3435 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
3436 1.88.2.8 snj if (adapter->mbx_si != NULL) {
3437 1.88.2.8 snj softint_disestablish(adapter->mbx_si);
3438 1.88.2.8 snj adapter->mbx_si = NULL;
3439 1.88.2.8 snj }
3440 1.88.2.8 snj }
3441 1.88.2.8 snj } /* ixgbe_free_softint */
3442 1.88.2.8 snj
3443 1.88.2.6 snj /************************************************************************
3444 1.88.2.6 snj * ixgbe_detach - Device removal routine
3445 1.88.2.6 snj *
3446 1.88.2.6 snj * Called when the driver is being removed.
3447 1.88.2.6 snj * Stops the adapter and deallocates all the resources
3448 1.88.2.6 snj * that were allocated for driver operation.
3449 1.88.2.6 snj *
3450 1.88.2.6 snj * return 0 on success, positive on failure
3451 1.88.2.6 snj ************************************************************************/
3452 1.88.2.6 snj static int
3453 1.88.2.6 snj ixgbe_detach(device_t dev, int flags)
3454 1.1 dyoung {
3455 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3456 1.88.2.6 snj struct rx_ring *rxr = adapter->rx_rings;
3457 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
3458 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
3459 1.88.2.6 snj struct ixgbe_hw_stats *stats = &adapter->stats.pf;
3460 1.88.2.6 snj u32 ctrl_ext;
3461 1.1 dyoung
3462 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_detach: begin");
3463 1.88.2.6 snj if (adapter->osdep.attached == false)
3464 1.88.2.6 snj return 0;
3465 1.28 msaitoh
3466 1.88.2.6 snj if (ixgbe_pci_iov_detach(dev) != 0) {
3467 1.88.2.6 snj device_printf(dev, "SR-IOV in use; detach first.\n");
3468 1.88.2.6 snj return (EBUSY);
3469 1.1 dyoung }
3470 1.1 dyoung
3471 1.88.2.6 snj /* Stop the interface. Callouts are stopped in it. */
3472 1.88.2.6 snj ixgbe_ifstop(adapter->ifp, 1);
3473 1.88.2.6 snj #if NVLAN > 0
3474 1.88.2.6 snj /* Make sure VLANs are not using driver */
3475 1.88.2.6 snj if (!VLAN_ATTACHED(&adapter->osdep.ec))
3476 1.88.2.6 snj ; /* nothing to do: no VLANs */
3477 1.88.2.6 snj else if ((flags & (DETACH_SHUTDOWN|DETACH_FORCE)) != 0)
3478 1.88.2.6 snj vlan_ifdetach(adapter->ifp);
3479 1.88.2.6 snj else {
3480 1.88.2.6 snj aprint_error_dev(dev, "VLANs in use, detach first\n");
3481 1.88.2.6 snj return (EBUSY);
3482 1.88.2.6 snj }
3483 1.45 msaitoh #endif
3484 1.88.2.6 snj
3485 1.88.2.6 snj pmf_device_deregister(dev);
3486 1.88.2.6 snj
3487 1.88.2.6 snj ether_ifdetach(adapter->ifp);
3488 1.88.2.6 snj /* Stop the adapter */
3489 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3490 1.88.2.6 snj ixgbe_setup_low_power_mode(adapter);
3491 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3492 1.88.2.6 snj
3493 1.88.2.8 snj ixgbe_free_softint(adapter);
3494 1.88.2.8 snj
3495 1.88.2.6 snj /* let hardware know driver is unloading */
3496 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
3497 1.88.2.6 snj ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
3498 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
3499 1.1 dyoung
3500 1.88.2.6 snj callout_halt(&adapter->timer, NULL);
3501 1.1 dyoung
3502 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
3503 1.88.2.6 snj netmap_detach(adapter->ifp);
3504 1.1 dyoung
3505 1.88.2.6 snj ixgbe_free_pci_resources(adapter);
3506 1.88.2.6 snj #if 0 /* XXX the NetBSD port is probably missing something here */
3507 1.88.2.6 snj bus_generic_detach(dev);
3508 1.88.2.6 snj #endif
3509 1.88.2.6 snj if_detach(adapter->ifp);
3510 1.88.2.6 snj if_percpuq_destroy(adapter->ipq);
3511 1.33 msaitoh
3512 1.88.2.6 snj sysctl_teardown(&adapter->sysctllog);
3513 1.88.2.6 snj evcnt_detach(&adapter->efbig_tx_dma_setup);
3514 1.88.2.6 snj evcnt_detach(&adapter->mbuf_defrag_failed);
3515 1.88.2.6 snj evcnt_detach(&adapter->efbig2_tx_dma_setup);
3516 1.88.2.6 snj evcnt_detach(&adapter->einval_tx_dma_setup);
3517 1.88.2.6 snj evcnt_detach(&adapter->other_tx_dma_setup);
3518 1.88.2.6 snj evcnt_detach(&adapter->eagain_tx_dma_setup);
3519 1.88.2.6 snj evcnt_detach(&adapter->enomem_tx_dma_setup);
3520 1.88.2.6 snj evcnt_detach(&adapter->watchdog_events);
3521 1.88.2.6 snj evcnt_detach(&adapter->tso_err);
3522 1.88.2.6 snj evcnt_detach(&adapter->link_irq);
3523 1.88.2.15 martin evcnt_detach(&adapter->link_sicount);
3524 1.88.2.15 martin evcnt_detach(&adapter->mod_sicount);
3525 1.88.2.15 martin evcnt_detach(&adapter->msf_sicount);
3526 1.88.2.15 martin evcnt_detach(&adapter->phy_sicount);
3527 1.33 msaitoh
3528 1.88.2.6 snj txr = adapter->tx_rings;
3529 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
3530 1.88.2.6 snj evcnt_detach(&adapter->queues[i].irqs);
3531 1.88.2.13 martin evcnt_detach(&adapter->queues[i].handleq);
3532 1.88.2.13 martin evcnt_detach(&adapter->queues[i].req);
3533 1.88.2.6 snj evcnt_detach(&txr->no_desc_avail);
3534 1.88.2.6 snj evcnt_detach(&txr->total_packets);
3535 1.88.2.6 snj evcnt_detach(&txr->tso_tx);
3536 1.88.2.6 snj #ifndef IXGBE_LEGACY_TX
3537 1.88.2.6 snj evcnt_detach(&txr->pcq_drops);
3538 1.33 msaitoh #endif
3539 1.33 msaitoh
3540 1.88.2.6 snj if (i < __arraycount(stats->mpc)) {
3541 1.88.2.6 snj evcnt_detach(&stats->mpc[i]);
3542 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3543 1.88.2.6 snj evcnt_detach(&stats->rnbc[i]);
3544 1.88.2.6 snj }
3545 1.88.2.6 snj if (i < __arraycount(stats->pxontxc)) {
3546 1.88.2.6 snj evcnt_detach(&stats->pxontxc[i]);
3547 1.88.2.6 snj evcnt_detach(&stats->pxonrxc[i]);
3548 1.88.2.6 snj evcnt_detach(&stats->pxofftxc[i]);
3549 1.88.2.6 snj evcnt_detach(&stats->pxoffrxc[i]);
3550 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
3551 1.88.2.20 martin evcnt_detach(&stats->pxon2offc[i]);
3552 1.88.2.6 snj }
3553 1.88.2.6 snj if (i < __arraycount(stats->qprc)) {
3554 1.88.2.6 snj evcnt_detach(&stats->qprc[i]);
3555 1.88.2.6 snj evcnt_detach(&stats->qptc[i]);
3556 1.88.2.6 snj evcnt_detach(&stats->qbrc[i]);
3557 1.88.2.6 snj evcnt_detach(&stats->qbtc[i]);
3558 1.88.2.20 martin if (hw->mac.type >= ixgbe_mac_82599EB)
3559 1.88.2.20 martin evcnt_detach(&stats->qprdc[i]);
3560 1.88.2.6 snj }
3561 1.88.2.6 snj
3562 1.88.2.6 snj evcnt_detach(&rxr->rx_packets);
3563 1.88.2.6 snj evcnt_detach(&rxr->rx_bytes);
3564 1.88.2.6 snj evcnt_detach(&rxr->rx_copies);
3565 1.88.2.6 snj evcnt_detach(&rxr->no_jmbuf);
3566 1.88.2.6 snj evcnt_detach(&rxr->rx_discarded);
3567 1.33 msaitoh }
3568 1.88.2.6 snj evcnt_detach(&stats->ipcs);
3569 1.88.2.6 snj evcnt_detach(&stats->l4cs);
3570 1.88.2.6 snj evcnt_detach(&stats->ipcs_bad);
3571 1.88.2.6 snj evcnt_detach(&stats->l4cs_bad);
3572 1.88.2.6 snj evcnt_detach(&stats->intzero);
3573 1.88.2.6 snj evcnt_detach(&stats->legint);
3574 1.88.2.6 snj evcnt_detach(&stats->crcerrs);
3575 1.88.2.6 snj evcnt_detach(&stats->illerrc);
3576 1.88.2.6 snj evcnt_detach(&stats->errbc);
3577 1.88.2.6 snj evcnt_detach(&stats->mspdc);
3578 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X550)
3579 1.88.2.6 snj evcnt_detach(&stats->mbsdc);
3580 1.88.2.6 snj evcnt_detach(&stats->mpctotal);
3581 1.88.2.6 snj evcnt_detach(&stats->mlfc);
3582 1.88.2.6 snj evcnt_detach(&stats->mrfc);
3583 1.88.2.6 snj evcnt_detach(&stats->rlec);
3584 1.88.2.6 snj evcnt_detach(&stats->lxontxc);
3585 1.88.2.6 snj evcnt_detach(&stats->lxonrxc);
3586 1.88.2.6 snj evcnt_detach(&stats->lxofftxc);
3587 1.88.2.6 snj evcnt_detach(&stats->lxoffrxc);
3588 1.88.2.6 snj
3589 1.88.2.6 snj /* Packet Reception Stats */
3590 1.88.2.6 snj evcnt_detach(&stats->tor);
3591 1.88.2.6 snj evcnt_detach(&stats->gorc);
3592 1.88.2.6 snj evcnt_detach(&stats->tpr);
3593 1.88.2.6 snj evcnt_detach(&stats->gprc);
3594 1.88.2.6 snj evcnt_detach(&stats->mprc);
3595 1.88.2.6 snj evcnt_detach(&stats->bprc);
3596 1.88.2.6 snj evcnt_detach(&stats->prc64);
3597 1.88.2.6 snj evcnt_detach(&stats->prc127);
3598 1.88.2.6 snj evcnt_detach(&stats->prc255);
3599 1.88.2.6 snj evcnt_detach(&stats->prc511);
3600 1.88.2.6 snj evcnt_detach(&stats->prc1023);
3601 1.88.2.6 snj evcnt_detach(&stats->prc1522);
3602 1.88.2.6 snj evcnt_detach(&stats->ruc);
3603 1.88.2.6 snj evcnt_detach(&stats->rfc);
3604 1.88.2.6 snj evcnt_detach(&stats->roc);
3605 1.88.2.6 snj evcnt_detach(&stats->rjc);
3606 1.88.2.6 snj evcnt_detach(&stats->mngprc);
3607 1.88.2.6 snj evcnt_detach(&stats->mngpdc);
3608 1.88.2.6 snj evcnt_detach(&stats->xec);
3609 1.33 msaitoh
3610 1.88.2.6 snj /* Packet Transmission Stats */
3611 1.88.2.6 snj evcnt_detach(&stats->gotc);
3612 1.88.2.6 snj evcnt_detach(&stats->tpt);
3613 1.88.2.6 snj evcnt_detach(&stats->gptc);
3614 1.88.2.6 snj evcnt_detach(&stats->bptc);
3615 1.88.2.6 snj evcnt_detach(&stats->mptc);
3616 1.88.2.6 snj evcnt_detach(&stats->mngptc);
3617 1.88.2.6 snj evcnt_detach(&stats->ptc64);
3618 1.88.2.6 snj evcnt_detach(&stats->ptc127);
3619 1.88.2.6 snj evcnt_detach(&stats->ptc255);
3620 1.88.2.6 snj evcnt_detach(&stats->ptc511);
3621 1.88.2.6 snj evcnt_detach(&stats->ptc1023);
3622 1.88.2.6 snj evcnt_detach(&stats->ptc1522);
3623 1.33 msaitoh
3624 1.88.2.6 snj ixgbe_free_transmit_structures(adapter);
3625 1.88.2.6 snj ixgbe_free_receive_structures(adapter);
3626 1.88.2.11 martin for (int i = 0; i < adapter->num_queues; i++) {
3627 1.88.2.11 martin struct ix_queue * que = &adapter->queues[i];
3628 1.88.2.16 martin mutex_destroy(&que->dc_mtx);
3629 1.88.2.11 martin }
3630 1.88.2.6 snj free(adapter->queues, M_DEVBUF);
3631 1.88.2.6 snj free(adapter->mta, M_DEVBUF);
3632 1.33 msaitoh
3633 1.88.2.6 snj IXGBE_CORE_LOCK_DESTROY(adapter);
3634 1.33 msaitoh
3635 1.88.2.6 snj return (0);
3636 1.88.2.6 snj } /* ixgbe_detach */
3637 1.33 msaitoh
3638 1.88.2.6 snj /************************************************************************
3639 1.88.2.6 snj * ixgbe_setup_low_power_mode - LPLU/WoL preparation
3640 1.88.2.6 snj *
3641 1.88.2.6 snj * Prepare the adapter/port for LPLU and/or WoL
3642 1.88.2.6 snj ************************************************************************/
3643 1.88.2.6 snj static int
3644 1.88.2.6 snj ixgbe_setup_low_power_mode(struct adapter *adapter)
3645 1.1 dyoung {
3646 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3647 1.88.2.6 snj device_t dev = adapter->dev;
3648 1.88.2.6 snj s32 error = 0;
3649 1.1 dyoung
3650 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3651 1.1 dyoung
3652 1.88.2.6 snj /* Limit power management flow to X550EM baseT */
3653 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
3654 1.88.2.6 snj hw->phy.ops.enter_lplu) {
3655 1.88.2.6 snj /* X550EM baseT adapters need a special LPLU flow */
3656 1.88.2.6 snj hw->phy.reset_disable = true;
3657 1.88.2.6 snj ixgbe_stop(adapter);
3658 1.88.2.6 snj error = hw->phy.ops.enter_lplu(hw);
3659 1.88.2.6 snj if (error)
3660 1.88.2.6 snj device_printf(dev,
3661 1.88.2.6 snj "Error entering LPLU: %d\n", error);
3662 1.88.2.6 snj hw->phy.reset_disable = false;
3663 1.88.2.6 snj } else {
3664 1.88.2.6 snj /* Just stop for other adapters */
3665 1.88.2.6 snj ixgbe_stop(adapter);
3666 1.88.2.6 snj }
3667 1.1 dyoung
3668 1.88.2.6 snj if (!hw->wol_enabled) {
3669 1.88.2.6 snj ixgbe_set_phy_power(hw, FALSE);
3670 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3671 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
3672 1.88.2.6 snj } else {
3673 1.88.2.6 snj /* Turn off support for APM wakeup. (Using ACPI instead) */
3674 1.88.2.24 martin IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw),
3675 1.88.2.24 martin IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);
3676 1.1 dyoung
3677 1.88.2.6 snj /*
3678 1.88.2.6 snj * Clear Wake Up Status register to prevent any previous wakeup
3679 1.88.2.6 snj * events from waking us up immediately after we suspend.
3680 1.88.2.6 snj */
3681 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3682 1.88.2.6 snj
3683 1.88.2.6 snj /*
3684 1.88.2.6 snj * Program the Wakeup Filter Control register with user filter
3685 1.88.2.6 snj * settings
3686 1.88.2.6 snj */
3687 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc);
3688 1.88.2.6 snj
3689 1.88.2.6 snj /* Enable wakeups and power management in Wakeup Control */
3690 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUC,
3691 1.88.2.6 snj IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
3692 1.1 dyoung
3693 1.1 dyoung }
3694 1.1 dyoung
3695 1.88.2.6 snj return error;
3696 1.88.2.6 snj } /* ixgbe_setup_low_power_mode */
3697 1.88.2.6 snj
3698 1.88.2.6 snj /************************************************************************
3699 1.88.2.6 snj * ixgbe_shutdown - Shutdown entry point
3700 1.88.2.6 snj ************************************************************************/
3701 1.88.2.6 snj #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */
3702 1.88.2.6 snj static int
3703 1.88.2.6 snj ixgbe_shutdown(device_t dev)
3704 1.1 dyoung {
3705 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3706 1.88.2.6 snj int error = 0;
3707 1.1 dyoung
3708 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_shutdown: begin");
3709 1.1 dyoung
3710 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3711 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3712 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3713 1.1 dyoung
3714 1.88.2.6 snj return (error);
3715 1.88.2.6 snj } /* ixgbe_shutdown */
3716 1.88.2.6 snj #endif
3717 1.1 dyoung
3718 1.88.2.6 snj /************************************************************************
3719 1.88.2.6 snj * ixgbe_suspend
3720 1.88.2.6 snj *
3721 1.88.2.6 snj * From D0 to D3
3722 1.88.2.6 snj ************************************************************************/
3723 1.45 msaitoh static bool
3724 1.88.2.6 snj ixgbe_suspend(device_t dev, const pmf_qual_t *qual)
3725 1.1 dyoung {
3726 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3727 1.88.2.6 snj int error = 0;
3728 1.1 dyoung
3729 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_suspend: begin");
3730 1.1 dyoung
3731 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3732 1.88.2.6 snj
3733 1.88.2.6 snj error = ixgbe_setup_low_power_mode(adapter);
3734 1.88.2.6 snj
3735 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3736 1.88.2.6 snj
3737 1.88.2.6 snj return (error);
3738 1.88.2.6 snj } /* ixgbe_suspend */
3739 1.88.2.6 snj
3740 1.88.2.6 snj /************************************************************************
3741 1.88.2.6 snj * ixgbe_resume
3742 1.88.2.6 snj *
3743 1.88.2.6 snj * From D3 to D0
3744 1.88.2.6 snj ************************************************************************/
3745 1.88.2.6 snj static bool
3746 1.88.2.6 snj ixgbe_resume(device_t dev, const pmf_qual_t *qual)
3747 1.1 dyoung {
3748 1.88.2.6 snj struct adapter *adapter = device_private(dev);
3749 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3750 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
3751 1.88.2.6 snj u32 wus;
3752 1.1 dyoung
3753 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_resume: begin");
3754 1.48 msaitoh
3755 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
3756 1.88.2.6 snj
3757 1.88.2.6 snj /* Read & clear WUS register */
3758 1.88.2.6 snj wus = IXGBE_READ_REG(hw, IXGBE_WUS);
3759 1.88.2.6 snj if (wus)
3760 1.88.2.6 snj device_printf(dev, "Woken up by (WUS): %#010x\n",
3761 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_WUS));
3762 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3763 1.88.2.6 snj /* And clear WUFC until next low-power transition */
3764 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3765 1.88.2.6 snj
3766 1.88.2.6 snj /*
3767 1.88.2.6 snj * Required after D3->D0 transition;
3768 1.88.2.6 snj * will re-advertise all previous advertised speeds
3769 1.88.2.6 snj */
3770 1.88.2.6 snj if (ifp->if_flags & IFF_UP)
3771 1.88.2.6 snj ixgbe_init_locked(adapter);
3772 1.88.2.6 snj
3773 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
3774 1.88.2.6 snj
3775 1.88.2.6 snj return true;
3776 1.88.2.6 snj } /* ixgbe_resume */
3777 1.1 dyoung
3778 1.1 dyoung /*
3779 1.88.2.6 snj * Set the various hardware offload abilities.
3780 1.88.2.6 snj *
3781 1.88.2.6 snj * This takes the ifnet's if_capenable flags (e.g. set by the user using
3782 1.88.2.6 snj * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what
3783 1.88.2.6 snj * mbuf offload flags the driver will understand.
3784 1.88.2.6 snj */
3785 1.1 dyoung static void
3786 1.88.2.6 snj ixgbe_set_if_hwassist(struct adapter *adapter)
3787 1.1 dyoung {
3788 1.88.2.6 snj /* XXX */
3789 1.88.2.6 snj }
3790 1.88.2.6 snj
3791 1.88.2.6 snj /************************************************************************
3792 1.88.2.6 snj * ixgbe_init_locked - Init entry point
3793 1.88.2.6 snj *
3794 1.88.2.6 snj * Used in two ways: It is used by the stack as an init
3795 1.88.2.6 snj * entry point in network interface structure. It is also
3796 1.88.2.6 snj * used by the driver as a hw/sw initialization routine to
3797 1.88.2.6 snj * get to a consistent state.
3798 1.88.2.6 snj *
3799 1.88.2.6 snj * return 0 on success, positive on failure
3800 1.88.2.6 snj ************************************************************************/
3801 1.88.2.6 snj static void
3802 1.88.2.6 snj ixgbe_init_locked(struct adapter *adapter)
3803 1.88.2.6 snj {
3804 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
3805 1.88.2.6 snj device_t dev = adapter->dev;
3806 1.1 dyoung struct ixgbe_hw *hw = &adapter->hw;
3807 1.88.2.20 martin struct ix_queue *que;
3808 1.88.2.6 snj struct tx_ring *txr;
3809 1.88.2.6 snj struct rx_ring *rxr;
3810 1.88.2.6 snj u32 txdctl, mhadd;
3811 1.88.2.6 snj u32 rxdctl, rxctrl;
3812 1.88.2.6 snj u32 ctrl_ext;
3813 1.88.2.17 martin int i, j, err;
3814 1.1 dyoung
3815 1.88.2.6 snj /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */
3816 1.65 msaitoh
3817 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
3818 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_init_locked: begin");
3819 1.51 msaitoh
3820 1.88.2.6 snj hw->adapter_stopped = FALSE;
3821 1.88.2.6 snj ixgbe_stop_adapter(hw);
3822 1.88.2.6 snj callout_stop(&adapter->timer);
3823 1.88.2.20 martin for (i = 0, que = adapter->queues; i < adapter->num_queues; i++, que++)
3824 1.88.2.20 martin que->disabled_count = 0;
3825 1.51 msaitoh
3826 1.88.2.6 snj /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */
3827 1.88.2.6 snj adapter->max_frame_size =
3828 1.88.2.6 snj ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
3829 1.51 msaitoh
3830 1.88.2.6 snj /* Queue indices may change with IOV mode */
3831 1.88.2.6 snj ixgbe_align_all_queue_indices(adapter);
3832 1.51 msaitoh
3833 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
3834 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV);
3835 1.88.2.6 snj
3836 1.88.2.6 snj /* Get the latest mac address, User can use a LAA */
3837 1.88.2.6 snj memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl),
3838 1.88.2.6 snj IXGBE_ETH_LENGTH_OF_ADDRESS);
3839 1.88.2.6 snj ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1);
3840 1.88.2.6 snj hw->addr_ctrl.rar_used_count = 1;
3841 1.88.2.6 snj
3842 1.88.2.6 snj /* Set hardware offload abilities from ifnet flags */
3843 1.88.2.6 snj ixgbe_set_if_hwassist(adapter);
3844 1.88.2.6 snj
3845 1.88.2.6 snj /* Prepare transmit descriptors and buffers */
3846 1.88.2.6 snj if (ixgbe_setup_transmit_structures(adapter)) {
3847 1.88.2.6 snj device_printf(dev, "Could not setup transmit structures\n");
3848 1.88.2.6 snj ixgbe_stop(adapter);
3849 1.88.2.6 snj return;
3850 1.1 dyoung }
3851 1.45 msaitoh
3852 1.88.2.6 snj ixgbe_init_hw(hw);
3853 1.88.2.17 martin
3854 1.88.2.6 snj ixgbe_initialize_iov(adapter);
3855 1.88.2.17 martin
3856 1.88.2.6 snj ixgbe_initialize_transmit_units(adapter);
3857 1.88.2.6 snj
3858 1.88.2.6 snj /* Setup Multicast table */
3859 1.88.2.6 snj ixgbe_set_multi(adapter);
3860 1.88.2.6 snj
3861 1.88.2.6 snj /* Determine the correct mbuf pool, based on frame size */
3862 1.88.2.6 snj if (adapter->max_frame_size <= MCLBYTES)
3863 1.88.2.6 snj adapter->rx_mbuf_sz = MCLBYTES;
3864 1.88.2.6 snj else
3865 1.88.2.6 snj adapter->rx_mbuf_sz = MJUMPAGESIZE;
3866 1.88.2.6 snj
3867 1.88.2.6 snj /* Prepare receive descriptors and buffers */
3868 1.88.2.6 snj if (ixgbe_setup_receive_structures(adapter)) {
3869 1.88.2.6 snj device_printf(dev, "Could not setup receive structures\n");
3870 1.88.2.6 snj ixgbe_stop(adapter);
3871 1.88.2.6 snj return;
3872 1.51 msaitoh }
3873 1.88.2.6 snj
3874 1.88.2.6 snj /* Configure RX settings */
3875 1.88.2.6 snj ixgbe_initialize_receive_units(adapter);
3876 1.88.2.6 snj
3877 1.88.2.6 snj /* Enable SDP & MSI-X interrupts based on adapter */
3878 1.88.2.6 snj ixgbe_config_gpie(adapter);
3879 1.88.2.6 snj
3880 1.88.2.6 snj /* Set MTU size */
3881 1.88.2.6 snj if (ifp->if_mtu > ETHERMTU) {
3882 1.88.2.6 snj /* aka IXGBE_MAXFRS on 82599 and newer */
3883 1.88.2.6 snj mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3884 1.88.2.6 snj mhadd &= ~IXGBE_MHADD_MFS_MASK;
3885 1.88.2.6 snj mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT;
3886 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3887 1.1 dyoung }
3888 1.51 msaitoh
3889 1.88.2.6 snj /* Now enable all the queues */
3890 1.88.2.17 martin for (i = 0; i < adapter->num_queues; i++) {
3891 1.88.2.6 snj txr = &adapter->tx_rings[i];
3892 1.88.2.6 snj txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
3893 1.88.2.6 snj txdctl |= IXGBE_TXDCTL_ENABLE;
3894 1.88.2.6 snj /* Set WTHRESH to 8, burst writeback */
3895 1.88.2.6 snj txdctl |= (8 << 16);
3896 1.88.2.6 snj /*
3897 1.88.2.6 snj * When the internal queue falls below PTHRESH (32),
3898 1.88.2.6 snj * start prefetching as long as there are at least
3899 1.88.2.6 snj * HTHRESH (1) buffers ready. The values are taken
3900 1.88.2.6 snj * from the Intel linux driver 3.8.21.
3901 1.88.2.6 snj * Prefetching enables tx line rate even with 1 queue.
3902 1.88.2.6 snj */
3903 1.88.2.6 snj txdctl |= (32 << 0) | (1 << 8);
3904 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
3905 1.88.2.6 snj }
3906 1.64 msaitoh
3907 1.88.2.17 martin for (i = 0; i < adapter->num_queues; i++) {
3908 1.88.2.6 snj rxr = &adapter->rx_rings[i];
3909 1.88.2.6 snj rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
3910 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB) {
3911 1.88.2.6 snj /*
3912 1.88.2.6 snj * PTHRESH = 21
3913 1.88.2.6 snj * HTHRESH = 4
3914 1.88.2.6 snj * WTHRESH = 8
3915 1.88.2.6 snj */
3916 1.88.2.6 snj rxdctl &= ~0x3FFFFF;
3917 1.88.2.6 snj rxdctl |= 0x080420;
3918 1.88.2.6 snj }
3919 1.88.2.6 snj rxdctl |= IXGBE_RXDCTL_ENABLE;
3920 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
3921 1.88.2.17 martin for (j = 0; j < 10; j++) {
3922 1.88.2.6 snj if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &
3923 1.88.2.6 snj IXGBE_RXDCTL_ENABLE)
3924 1.88.2.6 snj break;
3925 1.88.2.6 snj else
3926 1.88.2.6 snj msec_delay(1);
3927 1.88.2.6 snj }
3928 1.88.2.6 snj wmb();
3929 1.1 dyoung
3930 1.88.2.6 snj /*
3931 1.88.2.6 snj * In netmap mode, we must preserve the buffers made
3932 1.88.2.6 snj * available to userspace before the if_init()
3933 1.88.2.6 snj * (this is true by default on the TX side, because
3934 1.88.2.6 snj * init makes all buffers available to userspace).
3935 1.88.2.6 snj *
3936 1.88.2.6 snj * netmap_reset() and the device specific routines
3937 1.88.2.6 snj * (e.g. ixgbe_setup_receive_rings()) map these
3938 1.88.2.6 snj * buffers at the end of the NIC ring, so here we
3939 1.88.2.6 snj * must set the RDT (tail) register to make sure
3940 1.88.2.6 snj * they are not overwritten.
3941 1.88.2.6 snj *
3942 1.88.2.6 snj * In this driver the NIC ring starts at RDH = 0,
3943 1.88.2.6 snj * RDT points to the last slot available for reception (?),
3944 1.88.2.6 snj * so RDT = num_rx_desc - 1 means the whole ring is available.
3945 1.88.2.6 snj */
3946 1.88.2.6 snj #ifdef DEV_NETMAP
3947 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
3948 1.88.2.6 snj (ifp->if_capenable & IFCAP_NETMAP)) {
3949 1.88.2.6 snj struct netmap_adapter *na = NA(adapter->ifp);
3950 1.88.2.6 snj struct netmap_kring *kring = &na->rx_rings[i];
3951 1.88.2.6 snj int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring);
3952 1.1 dyoung
3953 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t);
3954 1.88.2.6 snj } else
3955 1.88.2.6 snj #endif /* DEV_NETMAP */
3956 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me),
3957 1.88.2.6 snj adapter->num_rx_desc - 1);
3958 1.88.2.6 snj }
3959 1.43 msaitoh
3960 1.88.2.6 snj /* Enable Receive engine */
3961 1.88.2.6 snj rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3962 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3963 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_DMBYPS;
3964 1.88.2.6 snj rxctrl |= IXGBE_RXCTRL_RXEN;
3965 1.88.2.6 snj ixgbe_enable_rx_dma(hw, rxctrl);
3966 1.1 dyoung
3967 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
3968 1.43 msaitoh
3969 1.88.2.17 martin /* Set up MSI/MSI-X routing */
3970 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
3971 1.88.2.6 snj ixgbe_configure_ivars(adapter);
3972 1.88.2.6 snj /* Set up auto-mask */
3973 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82598EB)
3974 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3975 1.88.2.6 snj else {
3976 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3977 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3978 1.88.2.6 snj }
3979 1.88.2.6 snj } else { /* Simple settings for Legacy/MSI */
3980 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 0);
3981 1.88.2.6 snj ixgbe_set_ivar(adapter, 0, 0, 1);
3982 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3983 1.88.2.6 snj }
3984 1.1 dyoung
3985 1.88.2.6 snj ixgbe_init_fdir(adapter);
3986 1.44 msaitoh
3987 1.88.2.6 snj /*
3988 1.88.2.6 snj * Check on any SFP devices that
3989 1.88.2.6 snj * need to be kick-started
3990 1.88.2.6 snj */
3991 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_none) {
3992 1.88.2.6 snj err = hw->phy.ops.identify(hw);
3993 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
3994 1.88.2.6 snj device_printf(dev,
3995 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
3996 1.88.2.6 snj return;
3997 1.88.2.6 snj }
3998 1.88.2.6 snj }
3999 1.44 msaitoh
4000 1.88.2.6 snj /* Set moderation on the Link interrupt */
4001 1.88.2.20 martin ixgbe_eitr_write(adapter, adapter->vector, IXGBE_LINK_ITR);
4002 1.1 dyoung
4003 1.88.2.17 martin /* Enable power to the phy. */
4004 1.88.2.17 martin ixgbe_set_phy_power(hw, TRUE);
4005 1.88.2.17 martin
4006 1.88.2.6 snj /* Config/Enable Link */
4007 1.88.2.6 snj ixgbe_config_link(adapter);
4008 1.1 dyoung
4009 1.88.2.6 snj /* Hardware Packet Buffer & Flow Control setup */
4010 1.88.2.6 snj ixgbe_config_delay_values(adapter);
4011 1.44 msaitoh
4012 1.88.2.6 snj /* Initialize the FC settings */
4013 1.88.2.6 snj ixgbe_start_hw(hw);
4014 1.44 msaitoh
4015 1.88.2.6 snj /* Set up VLAN support and filter */
4016 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
4017 1.44 msaitoh
4018 1.88.2.6 snj /* Setup DMA Coalescing */
4019 1.88.2.6 snj ixgbe_config_dmac(adapter);
4020 1.44 msaitoh
4021 1.88.2.6 snj /* And now turn on interrupts */
4022 1.88.2.6 snj ixgbe_enable_intr(adapter);
4023 1.44 msaitoh
4024 1.88.2.6 snj /* Enable the use of the MBX by the VF's */
4025 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV) {
4026 1.88.2.6 snj ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4027 1.88.2.6 snj ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4028 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4029 1.88.2.6 snj }
4030 1.44 msaitoh
4031 1.88.2.10 martin /* Update saved flags. See ixgbe_ifflags_cb() */
4032 1.88.2.10 martin adapter->if_flags = ifp->if_flags;
4033 1.88.2.10 martin
4034 1.88.2.6 snj /* Now inform the stack we're ready */
4035 1.88.2.6 snj ifp->if_flags |= IFF_RUNNING;
4036 1.44 msaitoh
4037 1.44 msaitoh return;
4038 1.88.2.6 snj } /* ixgbe_init_locked */
4039 1.44 msaitoh
4040 1.88.2.6 snj /************************************************************************
4041 1.88.2.6 snj * ixgbe_init
4042 1.88.2.6 snj ************************************************************************/
4043 1.44 msaitoh static int
4044 1.88.2.6 snj ixgbe_init(struct ifnet *ifp)
4045 1.44 msaitoh {
4046 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
4047 1.44 msaitoh
4048 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4049 1.88.2.6 snj ixgbe_init_locked(adapter);
4050 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4051 1.44 msaitoh
4052 1.88.2.6 snj return 0; /* XXX ixgbe_init_locked cannot fail? really? */
4053 1.88.2.6 snj } /* ixgbe_init */
4054 1.44 msaitoh
4055 1.88.2.6 snj /************************************************************************
4056 1.88.2.6 snj * ixgbe_set_ivar
4057 1.44 msaitoh *
4058 1.88.2.6 snj * Setup the correct IVAR register for a particular MSI-X interrupt
4059 1.88.2.6 snj * (yes this is all very magic and confusing :)
4060 1.88.2.6 snj * - entry is the register array entry
4061 1.88.2.6 snj * - vector is the MSI-X vector for this queue
4062 1.88.2.6 snj * - type is RX/TX/MISC
4063 1.88.2.6 snj ************************************************************************/
4064 1.44 msaitoh static void
4065 1.88.2.6 snj ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type)
4066 1.44 msaitoh {
4067 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4068 1.88.2.6 snj u32 ivar, index;
4069 1.1 dyoung
4070 1.88.2.6 snj vector |= IXGBE_IVAR_ALLOC_VAL;
4071 1.1 dyoung
4072 1.88.2.6 snj switch (hw->mac.type) {
4073 1.88.2.6 snj case ixgbe_mac_82598EB:
4074 1.88.2.6 snj if (type == -1)
4075 1.88.2.6 snj entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
4076 1.88.2.6 snj else
4077 1.88.2.6 snj entry += (type * 64);
4078 1.88.2.6 snj index = (entry >> 2) & 0x1F;
4079 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
4080 1.88.2.6 snj ivar &= ~(0xFF << (8 * (entry & 0x3)));
4081 1.88.2.6 snj ivar |= (vector << (8 * (entry & 0x3)));
4082 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
4083 1.88.2.6 snj break;
4084 1.88.2.6 snj case ixgbe_mac_82599EB:
4085 1.88.2.6 snj case ixgbe_mac_X540:
4086 1.88.2.6 snj case ixgbe_mac_X550:
4087 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4088 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4089 1.88.2.6 snj if (type == -1) { /* MISC IVAR */
4090 1.88.2.6 snj index = (entry & 1) * 8;
4091 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
4092 1.88.2.6 snj ivar &= ~(0xFF << index);
4093 1.88.2.6 snj ivar |= (vector << index);
4094 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
4095 1.88.2.6 snj } else { /* RX/TX IVARS */
4096 1.88.2.6 snj index = (16 * (entry & 1)) + (8 * type);
4097 1.88.2.6 snj ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
4098 1.88.2.6 snj ivar &= ~(0xFF << index);
4099 1.88.2.6 snj ivar |= (vector << index);
4100 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
4101 1.88.2.6 snj }
4102 1.88.2.15 martin break;
4103 1.88.2.6 snj default:
4104 1.88.2.6 snj break;
4105 1.1 dyoung }
4106 1.88.2.6 snj } /* ixgbe_set_ivar */
4107 1.82 msaitoh
4108 1.88.2.6 snj /************************************************************************
4109 1.88.2.6 snj * ixgbe_configure_ivars
4110 1.88.2.6 snj ************************************************************************/
4111 1.88.2.6 snj static void
4112 1.88.2.6 snj ixgbe_configure_ivars(struct adapter *adapter)
4113 1.88.2.6 snj {
4114 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4115 1.88.2.6 snj u32 newitr;
4116 1.82 msaitoh
4117 1.88.2.6 snj if (ixgbe_max_interrupt_rate > 0)
4118 1.88.2.6 snj newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8;
4119 1.88.2.6 snj else {
4120 1.88.2.6 snj /*
4121 1.88.2.6 snj * Disable DMA coalescing if interrupt moderation is
4122 1.88.2.6 snj * disabled.
4123 1.88.2.6 snj */
4124 1.88.2.6 snj adapter->dmac = 0;
4125 1.88.2.6 snj newitr = 0;
4126 1.82 msaitoh }
4127 1.83 msaitoh
4128 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
4129 1.88.2.6 snj struct rx_ring *rxr = &adapter->rx_rings[i];
4130 1.88.2.6 snj struct tx_ring *txr = &adapter->tx_rings[i];
4131 1.88.2.6 snj /* First the RX queue entry */
4132 1.88.2.6 snj ixgbe_set_ivar(adapter, rxr->me, que->msix, 0);
4133 1.88.2.6 snj /* ... and the TX */
4134 1.88.2.6 snj ixgbe_set_ivar(adapter, txr->me, que->msix, 1);
4135 1.88.2.6 snj /* Set an Initial EITR value */
4136 1.88.2.20 martin ixgbe_eitr_write(adapter, que->msix, newitr);
4137 1.88.2.16 martin /*
4138 1.88.2.16 martin * To eliminate influence of the previous state.
4139 1.88.2.16 martin * At this point, Tx/Rx interrupt handler
4140 1.88.2.16 martin * (ixgbe_msix_que()) cannot be called, so both
4141 1.88.2.16 martin * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required.
4142 1.88.2.16 martin */
4143 1.88.2.16 martin que->eitr_setting = 0;
4144 1.83 msaitoh }
4145 1.1 dyoung
4146 1.88.2.6 snj /* For the Link interrupt */
4147 1.88.2.6 snj ixgbe_set_ivar(adapter, 1, adapter->vector, -1);
4148 1.88.2.6 snj } /* ixgbe_configure_ivars */
4149 1.1 dyoung
4150 1.88.2.6 snj /************************************************************************
4151 1.88.2.6 snj * ixgbe_config_gpie
4152 1.88.2.6 snj ************************************************************************/
4153 1.88.2.6 snj static void
4154 1.88.2.6 snj ixgbe_config_gpie(struct adapter *adapter)
4155 1.88.2.6 snj {
4156 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4157 1.88.2.6 snj u32 gpie;
4158 1.1 dyoung
4159 1.88.2.6 snj gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
4160 1.1 dyoung
4161 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
4162 1.88.2.6 snj /* Enable Enhanced MSI-X mode */
4163 1.88.2.6 snj gpie |= IXGBE_GPIE_MSIX_MODE
4164 1.88.2.6 snj | IXGBE_GPIE_EIAME
4165 1.88.2.6 snj | IXGBE_GPIE_PBA_SUPPORT
4166 1.88.2.6 snj | IXGBE_GPIE_OCD;
4167 1.88.2.6 snj }
4168 1.1 dyoung
4169 1.88.2.6 snj /* Fan Failure Interrupt */
4170 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
4171 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN;
4172 1.43 msaitoh
4173 1.88.2.6 snj /* Thermal Sensor Interrupt */
4174 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR)
4175 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
4176 1.43 msaitoh
4177 1.88.2.6 snj /* Link detection */
4178 1.88.2.6 snj switch (hw->mac.type) {
4179 1.88.2.6 snj case ixgbe_mac_82599EB:
4180 1.88.2.6 snj gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN;
4181 1.88.2.6 snj break;
4182 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4183 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4184 1.88.2.6 snj gpie |= IXGBE_SDP0_GPIEN_X540;
4185 1.88.2.6 snj break;
4186 1.88.2.6 snj default:
4187 1.88.2.6 snj break;
4188 1.1 dyoung }
4189 1.1 dyoung
4190 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4191 1.28 msaitoh
4192 1.88.2.6 snj } /* ixgbe_config_gpie */
4193 1.1 dyoung
4194 1.88.2.6 snj /************************************************************************
4195 1.88.2.6 snj * ixgbe_config_delay_values
4196 1.88.2.6 snj *
4197 1.88.2.6 snj * Requires adapter->max_frame_size to be set.
4198 1.88.2.6 snj ************************************************************************/
4199 1.88.2.6 snj static void
4200 1.88.2.6 snj ixgbe_config_delay_values(struct adapter *adapter)
4201 1.1 dyoung {
4202 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4203 1.88.2.6 snj u32 rxpb, frame, size, tmp;
4204 1.1 dyoung
4205 1.88.2.6 snj frame = adapter->max_frame_size;
4206 1.1 dyoung
4207 1.88.2.6 snj /* Calculate High Water */
4208 1.88.2.6 snj switch (hw->mac.type) {
4209 1.88.2.6 snj case ixgbe_mac_X540:
4210 1.88.2.6 snj case ixgbe_mac_X550:
4211 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4212 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4213 1.88.2.6 snj tmp = IXGBE_DV_X540(frame, frame);
4214 1.88.2.6 snj break;
4215 1.88.2.6 snj default:
4216 1.88.2.6 snj tmp = IXGBE_DV(frame, frame);
4217 1.88.2.6 snj break;
4218 1.88.2.6 snj }
4219 1.88.2.6 snj size = IXGBE_BT2KB(tmp);
4220 1.88.2.6 snj rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10;
4221 1.88.2.6 snj hw->fc.high_water[0] = rxpb - size;
4222 1.1 dyoung
4223 1.88.2.6 snj /* Now calculate Low Water */
4224 1.88.2.6 snj switch (hw->mac.type) {
4225 1.88.2.6 snj case ixgbe_mac_X540:
4226 1.88.2.6 snj case ixgbe_mac_X550:
4227 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4228 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4229 1.88.2.6 snj tmp = IXGBE_LOW_DV_X540(frame);
4230 1.88.2.6 snj break;
4231 1.88.2.6 snj default:
4232 1.88.2.6 snj tmp = IXGBE_LOW_DV(frame);
4233 1.88.2.6 snj break;
4234 1.88.2.6 snj }
4235 1.88.2.6 snj hw->fc.low_water[0] = IXGBE_BT2KB(tmp);
4236 1.1 dyoung
4237 1.88.2.6 snj hw->fc.pause_time = IXGBE_FC_PAUSE;
4238 1.88.2.6 snj hw->fc.send_xon = TRUE;
4239 1.88.2.6 snj } /* ixgbe_config_delay_values */
4240 1.88.2.6 snj
4241 1.88.2.6 snj /************************************************************************
4242 1.88.2.6 snj * ixgbe_set_multi - Multicast Update
4243 1.88.2.6 snj *
4244 1.88.2.6 snj * Called whenever multicast address list is updated.
4245 1.88.2.6 snj ************************************************************************/
4246 1.88.2.6 snj static void
4247 1.88.2.6 snj ixgbe_set_multi(struct adapter *adapter)
4248 1.1 dyoung {
4249 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4250 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4251 1.88.2.6 snj u8 *update_ptr;
4252 1.88.2.6 snj int mcnt = 0;
4253 1.88.2.6 snj u32 fctrl;
4254 1.88.2.6 snj struct ethercom *ec = &adapter->osdep.ec;
4255 1.88.2.6 snj struct ether_multi *enm;
4256 1.88.2.6 snj struct ether_multistep step;
4257 1.1 dyoung
4258 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4259 1.88.2.6 snj IOCTL_DEBUGOUT("ixgbe_set_multi: begin");
4260 1.1 dyoung
4261 1.88.2.6 snj mta = adapter->mta;
4262 1.88.2.6 snj bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES);
4263 1.1 dyoung
4264 1.88.2.6 snj ifp->if_flags &= ~IFF_ALLMULTI;
4265 1.88.2.6 snj ETHER_LOCK(ec);
4266 1.88.2.6 snj ETHER_FIRST_MULTI(step, ec, enm);
4267 1.88.2.6 snj while (enm != NULL) {
4268 1.88.2.6 snj if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) ||
4269 1.88.2.6 snj (memcmp(enm->enm_addrlo, enm->enm_addrhi,
4270 1.88.2.6 snj ETHER_ADDR_LEN) != 0)) {
4271 1.88.2.6 snj ifp->if_flags |= IFF_ALLMULTI;
4272 1.88.2.6 snj break;
4273 1.88.2.6 snj }
4274 1.88.2.6 snj bcopy(enm->enm_addrlo,
4275 1.88.2.6 snj mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
4276 1.88.2.6 snj mta[mcnt].vmdq = adapter->pool;
4277 1.88.2.6 snj mcnt++;
4278 1.88.2.6 snj ETHER_NEXT_MULTI(step, enm);
4279 1.88.2.6 snj }
4280 1.88.2.6 snj ETHER_UNLOCK(ec);
4281 1.1 dyoung
4282 1.88.2.6 snj fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
4283 1.88.2.6 snj fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4284 1.88.2.6 snj if (ifp->if_flags & IFF_PROMISC)
4285 1.88.2.6 snj fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4286 1.88.2.6 snj else if (ifp->if_flags & IFF_ALLMULTI) {
4287 1.88.2.6 snj fctrl |= IXGBE_FCTRL_MPE;
4288 1.88.2.6 snj }
4289 1.1 dyoung
4290 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
4291 1.88.2.6 snj
4292 1.88.2.6 snj if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) {
4293 1.88.2.6 snj update_ptr = (u8 *)mta;
4294 1.88.2.6 snj ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
4295 1.88.2.6 snj ixgbe_mc_array_itr, TRUE);
4296 1.22 msaitoh }
4297 1.1 dyoung
4298 1.88.2.6 snj } /* ixgbe_set_multi */
4299 1.88.2.6 snj
4300 1.88.2.6 snj /************************************************************************
4301 1.88.2.6 snj * ixgbe_mc_array_itr
4302 1.88.2.6 snj *
4303 1.88.2.6 snj * An iterator function needed by the multicast shared code.
4304 1.88.2.6 snj * It feeds the shared code routine the addresses in the
4305 1.88.2.6 snj * array of ixgbe_set_multi() one by one.
4306 1.88.2.6 snj ************************************************************************/
4307 1.88.2.6 snj static u8 *
4308 1.88.2.6 snj ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
4309 1.1 dyoung {
4310 1.88.2.6 snj struct ixgbe_mc_addr *mta;
4311 1.1 dyoung
4312 1.88.2.6 snj mta = (struct ixgbe_mc_addr *)*update_ptr;
4313 1.88.2.6 snj *vmdq = mta->vmdq;
4314 1.61 msaitoh
4315 1.88.2.6 snj *update_ptr = (u8*)(mta + 1);
4316 1.1 dyoung
4317 1.88.2.6 snj return (mta->addr);
4318 1.88.2.6 snj } /* ixgbe_mc_array_itr */
4319 1.1 dyoung
4320 1.88.2.6 snj /************************************************************************
4321 1.88.2.6 snj * ixgbe_local_timer - Timer routine
4322 1.88.2.6 snj *
4323 1.88.2.6 snj * Checks for link status, updates statistics,
4324 1.88.2.6 snj * and runs the watchdog check.
4325 1.88.2.6 snj ************************************************************************/
4326 1.88.2.6 snj static void
4327 1.88.2.6 snj ixgbe_local_timer(void *arg)
4328 1.88.2.6 snj {
4329 1.88.2.6 snj struct adapter *adapter = arg;
4330 1.88.2.6 snj
4331 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4332 1.88.2.6 snj ixgbe_local_timer1(adapter);
4333 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4334 1.1 dyoung }
4335 1.1 dyoung
4336 1.44 msaitoh static void
4337 1.88.2.6 snj ixgbe_local_timer1(void *arg)
4338 1.44 msaitoh {
4339 1.88.2.6 snj struct adapter *adapter = arg;
4340 1.88.2.6 snj device_t dev = adapter->dev;
4341 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4342 1.88.2.6 snj u64 queues = 0;
4343 1.88.2.14 martin u64 v0, v1, v2, v3, v4, v5, v6, v7;
4344 1.88.2.6 snj int hung = 0;
4345 1.88.2.14 martin int i;
4346 1.44 msaitoh
4347 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4348 1.44 msaitoh
4349 1.88.2.6 snj /* Check for pluggable optics */
4350 1.88.2.6 snj if (adapter->sfp_probe)
4351 1.88.2.6 snj if (!ixgbe_sfp_probe(adapter))
4352 1.88.2.6 snj goto out; /* Nothing to do */
4353 1.44 msaitoh
4354 1.88.2.6 snj ixgbe_update_link_status(adapter);
4355 1.88.2.6 snj ixgbe_update_stats_counters(adapter);
4356 1.44 msaitoh
4357 1.88.2.14 martin /* Update some event counters */
4358 1.88.2.14 martin v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
4359 1.88.2.14 martin que = adapter->queues;
4360 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4361 1.88.2.14 martin struct tx_ring *txr = que->txr;
4362 1.88.2.14 martin
4363 1.88.2.14 martin v0 += txr->q_efbig_tx_dma_setup;
4364 1.88.2.14 martin v1 += txr->q_mbuf_defrag_failed;
4365 1.88.2.14 martin v2 += txr->q_efbig2_tx_dma_setup;
4366 1.88.2.14 martin v3 += txr->q_einval_tx_dma_setup;
4367 1.88.2.14 martin v4 += txr->q_other_tx_dma_setup;
4368 1.88.2.14 martin v5 += txr->q_eagain_tx_dma_setup;
4369 1.88.2.14 martin v6 += txr->q_enomem_tx_dma_setup;
4370 1.88.2.14 martin v7 += txr->q_tso_err;
4371 1.88.2.14 martin }
4372 1.88.2.14 martin adapter->efbig_tx_dma_setup.ev_count = v0;
4373 1.88.2.14 martin adapter->mbuf_defrag_failed.ev_count = v1;
4374 1.88.2.14 martin adapter->efbig2_tx_dma_setup.ev_count = v2;
4375 1.88.2.14 martin adapter->einval_tx_dma_setup.ev_count = v3;
4376 1.88.2.14 martin adapter->other_tx_dma_setup.ev_count = v4;
4377 1.88.2.14 martin adapter->eagain_tx_dma_setup.ev_count = v5;
4378 1.88.2.14 martin adapter->enomem_tx_dma_setup.ev_count = v6;
4379 1.88.2.14 martin adapter->tso_err.ev_count = v7;
4380 1.88.2.14 martin
4381 1.88.2.6 snj /*
4382 1.88.2.6 snj * Check the TX queues status
4383 1.88.2.6 snj * - mark hung queues so we don't schedule on them
4384 1.88.2.6 snj * - watchdog only if all queues show hung
4385 1.88.2.6 snj */
4386 1.88.2.14 martin que = adapter->queues;
4387 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4388 1.88.2.6 snj /* Keep track of queues with work for soft irq */
4389 1.88.2.6 snj if (que->txr->busy)
4390 1.88.2.6 snj queues |= ((u64)1 << que->me);
4391 1.88.2.6 snj /*
4392 1.88.2.6 snj * Each time txeof runs without cleaning, but there
4393 1.88.2.6 snj * are uncleaned descriptors it increments busy. If
4394 1.88.2.6 snj * we get to the MAX we declare it hung.
4395 1.88.2.6 snj */
4396 1.88.2.6 snj if (que->busy == IXGBE_QUEUE_HUNG) {
4397 1.88.2.6 snj ++hung;
4398 1.88.2.6 snj /* Mark the queue as inactive */
4399 1.88.2.6 snj adapter->active_queues &= ~((u64)1 << que->me);
4400 1.88.2.6 snj continue;
4401 1.88.2.6 snj } else {
4402 1.88.2.6 snj /* Check if we've come back from hung */
4403 1.88.2.6 snj if ((adapter->active_queues & ((u64)1 << que->me)) == 0)
4404 1.88.2.6 snj adapter->active_queues |= ((u64)1 << que->me);
4405 1.88.2.6 snj }
4406 1.88.2.6 snj if (que->busy >= IXGBE_MAX_TX_BUSY) {
4407 1.88.2.6 snj device_printf(dev,
4408 1.88.2.6 snj "Warning queue %d appears to be hung!\n", i);
4409 1.88.2.6 snj que->txr->busy = IXGBE_QUEUE_HUNG;
4410 1.88.2.6 snj ++hung;
4411 1.88.2.6 snj }
4412 1.88.2.6 snj }
4413 1.44 msaitoh
4414 1.88.2.6 snj /* Only truely watchdog if all queues show hung */
4415 1.88.2.6 snj if (hung == adapter->num_queues)
4416 1.88.2.6 snj goto watchdog;
4417 1.88.2.20 martin #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */
4418 1.88.2.6 snj else if (queues != 0) { /* Force an IRQ on queues with work */
4419 1.88.2.13 martin que = adapter->queues;
4420 1.88.2.14 martin for (i = 0; i < adapter->num_queues; i++, que++) {
4421 1.88.2.16 martin mutex_enter(&que->dc_mtx);
4422 1.88.2.16 martin if (que->disabled_count == 0)
4423 1.88.2.13 martin ixgbe_rearm_queues(adapter,
4424 1.88.2.13 martin queues & ((u64)1 << i));
4425 1.88.2.16 martin mutex_exit(&que->dc_mtx);
4426 1.88.2.13 martin }
4427 1.88.2.6 snj }
4428 1.88.2.20 martin #endif
4429 1.44 msaitoh
4430 1.88.2.6 snj out:
4431 1.88.2.6 snj callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
4432 1.88.2.6 snj return;
4433 1.44 msaitoh
4434 1.88.2.6 snj watchdog:
4435 1.88.2.6 snj device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
4436 1.88.2.6 snj adapter->ifp->if_flags &= ~IFF_RUNNING;
4437 1.88.2.6 snj adapter->watchdog_events.ev_count++;
4438 1.88.2.6 snj ixgbe_init_locked(adapter);
4439 1.88.2.6 snj } /* ixgbe_local_timer */
4440 1.44 msaitoh
4441 1.88.2.6 snj /************************************************************************
4442 1.88.2.6 snj * ixgbe_sfp_probe
4443 1.88.2.6 snj *
4444 1.88.2.6 snj * Determine if a port had optics inserted.
4445 1.88.2.6 snj ************************************************************************/
4446 1.88.2.6 snj static bool
4447 1.88.2.6 snj ixgbe_sfp_probe(struct adapter *adapter)
4448 1.88.2.6 snj {
4449 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4450 1.88.2.6 snj device_t dev = adapter->dev;
4451 1.88.2.6 snj bool result = FALSE;
4452 1.44 msaitoh
4453 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_nl) &&
4454 1.88.2.6 snj (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4455 1.88.2.6 snj s32 ret = hw->phy.ops.identify_sfp(hw);
4456 1.88.2.6 snj if (ret)
4457 1.88.2.6 snj goto out;
4458 1.88.2.6 snj ret = hw->phy.ops.reset(hw);
4459 1.88.2.6 snj adapter->sfp_probe = FALSE;
4460 1.88.2.6 snj if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4461 1.88.2.6 snj device_printf(dev,"Unsupported SFP+ module detected!");
4462 1.88.2.6 snj device_printf(dev,
4463 1.88.2.6 snj "Reload driver with supported module.\n");
4464 1.88.2.6 snj goto out;
4465 1.88.2.6 snj } else
4466 1.88.2.6 snj device_printf(dev, "SFP+ module detected!\n");
4467 1.88.2.6 snj /* We now have supported optics */
4468 1.88.2.6 snj result = TRUE;
4469 1.88.2.6 snj }
4470 1.88.2.6 snj out:
4471 1.48 msaitoh
4472 1.88.2.6 snj return (result);
4473 1.88.2.6 snj } /* ixgbe_sfp_probe */
4474 1.88.2.6 snj
4475 1.88.2.6 snj /************************************************************************
4476 1.88.2.6 snj * ixgbe_handle_mod - Tasklet for SFP module interrupts
4477 1.88.2.6 snj ************************************************************************/
4478 1.88.2.6 snj static void
4479 1.88.2.6 snj ixgbe_handle_mod(void *context)
4480 1.88.2.6 snj {
4481 1.88.2.6 snj struct adapter *adapter = context;
4482 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4483 1.88.2.6 snj device_t dev = adapter->dev;
4484 1.88.2.6 snj u32 err, cage_full = 0;
4485 1.44 msaitoh
4486 1.88.2.15 martin ++adapter->mod_sicount.ev_count;
4487 1.88.2.6 snj if (adapter->hw.need_crosstalk_fix) {
4488 1.88.2.6 snj switch (hw->mac.type) {
4489 1.88.2.6 snj case ixgbe_mac_82599EB:
4490 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4491 1.88.2.6 snj IXGBE_ESDP_SDP2;
4492 1.88.2.6 snj break;
4493 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4494 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4495 1.88.2.6 snj cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4496 1.88.2.6 snj IXGBE_ESDP_SDP0;
4497 1.88.2.6 snj break;
4498 1.88.2.6 snj default:
4499 1.88.2.6 snj break;
4500 1.88.2.6 snj }
4501 1.44 msaitoh
4502 1.88.2.6 snj if (!cage_full)
4503 1.44 msaitoh return;
4504 1.88.2.6 snj }
4505 1.44 msaitoh
4506 1.88.2.6 snj err = hw->phy.ops.identify_sfp(hw);
4507 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4508 1.88.2.6 snj device_printf(dev,
4509 1.88.2.6 snj "Unsupported SFP+ module type was detected.\n");
4510 1.88.2.6 snj return;
4511 1.88.2.6 snj }
4512 1.44 msaitoh
4513 1.88.2.16 martin if (hw->mac.type == ixgbe_mac_82598EB)
4514 1.88.2.16 martin err = hw->phy.ops.reset(hw);
4515 1.88.2.16 martin else
4516 1.88.2.16 martin err = hw->mac.ops.setup_sfp(hw);
4517 1.88.2.16 martin
4518 1.88.2.6 snj if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4519 1.88.2.6 snj device_printf(dev,
4520 1.88.2.6 snj "Setup failure - unsupported SFP+ module type.\n");
4521 1.88.2.6 snj return;
4522 1.88.2.6 snj }
4523 1.88.2.6 snj softint_schedule(adapter->msf_si);
4524 1.88.2.6 snj } /* ixgbe_handle_mod */
4525 1.44 msaitoh
4526 1.44 msaitoh
4527 1.88.2.6 snj /************************************************************************
4528 1.88.2.6 snj * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts
4529 1.88.2.6 snj ************************************************************************/
4530 1.88.2.6 snj static void
4531 1.88.2.6 snj ixgbe_handle_msf(void *context)
4532 1.88.2.6 snj {
4533 1.88.2.6 snj struct adapter *adapter = context;
4534 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4535 1.88.2.6 snj u32 autoneg;
4536 1.88.2.6 snj bool negotiate;
4537 1.44 msaitoh
4538 1.88.2.15 martin ++adapter->msf_sicount.ev_count;
4539 1.88.2.6 snj /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
4540 1.88.2.6 snj adapter->phy_layer = ixgbe_get_supported_physical_layer(hw);
4541 1.44 msaitoh
4542 1.88.2.6 snj autoneg = hw->phy.autoneg_advertised;
4543 1.88.2.6 snj if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4544 1.88.2.6 snj hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
4545 1.88.2.6 snj else
4546 1.88.2.6 snj negotiate = 0;
4547 1.88.2.6 snj if (hw->mac.ops.setup_link)
4548 1.88.2.6 snj hw->mac.ops.setup_link(hw, autoneg, TRUE);
4549 1.44 msaitoh
4550 1.88.2.6 snj /* Adjust media types shown in ifconfig */
4551 1.88.2.6 snj ifmedia_removeall(&adapter->media);
4552 1.88.2.6 snj ixgbe_add_media_types(adapter);
4553 1.88.2.6 snj ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
4554 1.88.2.6 snj } /* ixgbe_handle_msf */
4555 1.44 msaitoh
4556 1.88.2.6 snj /************************************************************************
4557 1.88.2.6 snj * ixgbe_handle_phy - Tasklet for external PHY interrupts
4558 1.88.2.6 snj ************************************************************************/
4559 1.88.2.6 snj static void
4560 1.88.2.6 snj ixgbe_handle_phy(void *context)
4561 1.88.2.6 snj {
4562 1.88.2.6 snj struct adapter *adapter = context;
4563 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4564 1.88.2.6 snj int error;
4565 1.44 msaitoh
4566 1.88.2.15 martin ++adapter->phy_sicount.ev_count;
4567 1.88.2.6 snj error = hw->phy.ops.handle_lasi(hw);
4568 1.88.2.6 snj if (error == IXGBE_ERR_OVERTEMP)
4569 1.88.2.6 snj device_printf(adapter->dev,
4570 1.88.2.6 snj "CRITICAL: EXTERNAL PHY OVER TEMP!! "
4571 1.88.2.6 snj " PHY will downshift to lower power state!\n");
4572 1.88.2.6 snj else if (error)
4573 1.88.2.6 snj device_printf(adapter->dev,
4574 1.88.2.6 snj "Error handling LASI interrupt: %d\n", error);
4575 1.88.2.6 snj } /* ixgbe_handle_phy */
4576 1.44 msaitoh
4577 1.88.2.6 snj static void
4578 1.88.2.6 snj ixgbe_ifstop(struct ifnet *ifp, int disable)
4579 1.88.2.6 snj {
4580 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
4581 1.44 msaitoh
4582 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
4583 1.88.2.6 snj ixgbe_stop(adapter);
4584 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
4585 1.44 msaitoh }
4586 1.44 msaitoh
4587 1.88.2.6 snj /************************************************************************
4588 1.88.2.6 snj * ixgbe_stop - Stop the hardware
4589 1.88.2.6 snj *
4590 1.88.2.6 snj * Disables all traffic on the adapter by issuing a
4591 1.88.2.6 snj * global reset on the MAC and deallocates TX/RX buffers.
4592 1.88.2.6 snj ************************************************************************/
4593 1.1 dyoung static void
4594 1.88.2.6 snj ixgbe_stop(void *arg)
4595 1.1 dyoung {
4596 1.88.2.6 snj struct ifnet *ifp;
4597 1.88.2.6 snj struct adapter *adapter = arg;
4598 1.82 msaitoh struct ixgbe_hw *hw = &adapter->hw;
4599 1.1 dyoung
4600 1.88.2.6 snj ifp = adapter->ifp;
4601 1.1 dyoung
4602 1.88.2.6 snj KASSERT(mutex_owned(&adapter->core_mtx));
4603 1.1 dyoung
4604 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_stop: begin\n");
4605 1.88.2.6 snj ixgbe_disable_intr(adapter);
4606 1.88.2.6 snj callout_stop(&adapter->timer);
4607 1.1 dyoung
4608 1.88.2.6 snj /* Let the stack know...*/
4609 1.88.2.6 snj ifp->if_flags &= ~IFF_RUNNING;
4610 1.1 dyoung
4611 1.88.2.6 snj ixgbe_reset_hw(hw);
4612 1.88.2.6 snj hw->adapter_stopped = FALSE;
4613 1.88.2.6 snj ixgbe_stop_adapter(hw);
4614 1.88.2.6 snj if (hw->mac.type == ixgbe_mac_82599EB)
4615 1.88.2.6 snj ixgbe_stop_mac_link_on_d3_82599(hw);
4616 1.88.2.6 snj /* Turn off the laser - noop with no optics */
4617 1.88.2.6 snj ixgbe_disable_tx_laser(hw);
4618 1.22 msaitoh
4619 1.88.2.6 snj /* Update the stack */
4620 1.88.2.6 snj adapter->link_up = FALSE;
4621 1.88.2.6 snj ixgbe_update_link_status(adapter);
4622 1.1 dyoung
4623 1.88.2.6 snj /* reprogram the RAR[0] in case user changed it. */
4624 1.88.2.6 snj ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
4625 1.1 dyoung
4626 1.88.2.6 snj return;
4627 1.88.2.6 snj } /* ixgbe_stop */
4628 1.1 dyoung
4629 1.88.2.6 snj /************************************************************************
4630 1.88.2.6 snj * ixgbe_update_link_status - Update OS on link state
4631 1.88.2.6 snj *
4632 1.88.2.6 snj * Note: Only updates the OS on the cached link state.
4633 1.88.2.6 snj * The real check of the hardware only happens with
4634 1.88.2.6 snj * a link interrupt.
4635 1.88.2.6 snj ************************************************************************/
4636 1.88.2.6 snj static void
4637 1.88.2.6 snj ixgbe_update_link_status(struct adapter *adapter)
4638 1.88.2.6 snj {
4639 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4640 1.88.2.6 snj device_t dev = adapter->dev;
4641 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4642 1.1 dyoung
4643 1.88.2.15 martin KASSERT(mutex_owned(&adapter->core_mtx));
4644 1.88.2.15 martin
4645 1.88.2.6 snj if (adapter->link_up) {
4646 1.88.2.6 snj if (adapter->link_active == FALSE) {
4647 1.88.2.16 martin /*
4648 1.88.2.16 martin * To eliminate influence of the previous state
4649 1.88.2.16 martin * in the same way as ixgbe_init_locked().
4650 1.88.2.16 martin */
4651 1.88.2.16 martin struct ix_queue *que = adapter->queues;
4652 1.88.2.16 martin for (int i = 0; i < adapter->num_queues; i++, que++)
4653 1.88.2.16 martin que->eitr_setting = 0;
4654 1.88.2.16 martin
4655 1.88.2.6 snj if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL){
4656 1.88.2.6 snj /*
4657 1.88.2.6 snj * Discard count for both MAC Local Fault and
4658 1.88.2.6 snj * Remote Fault because those registers are
4659 1.88.2.6 snj * valid only when the link speed is up and
4660 1.88.2.6 snj * 10Gbps.
4661 1.88.2.6 snj */
4662 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MLFC);
4663 1.88.2.6 snj IXGBE_READ_REG(hw, IXGBE_MRFC);
4664 1.88.2.6 snj }
4665 1.1 dyoung
4666 1.88.2.6 snj if (bootverbose) {
4667 1.88.2.6 snj const char *bpsmsg;
4668 1.1 dyoung
4669 1.88.2.6 snj switch (adapter->link_speed) {
4670 1.88.2.6 snj case IXGBE_LINK_SPEED_10GB_FULL:
4671 1.88.2.6 snj bpsmsg = "10 Gbps";
4672 1.88.2.6 snj break;
4673 1.88.2.6 snj case IXGBE_LINK_SPEED_5GB_FULL:
4674 1.88.2.6 snj bpsmsg = "5 Gbps";
4675 1.88.2.6 snj break;
4676 1.88.2.6 snj case IXGBE_LINK_SPEED_2_5GB_FULL:
4677 1.88.2.6 snj bpsmsg = "2.5 Gbps";
4678 1.88.2.6 snj break;
4679 1.88.2.6 snj case IXGBE_LINK_SPEED_1GB_FULL:
4680 1.88.2.6 snj bpsmsg = "1 Gbps";
4681 1.88.2.6 snj break;
4682 1.88.2.6 snj case IXGBE_LINK_SPEED_100_FULL:
4683 1.88.2.6 snj bpsmsg = "100 Mbps";
4684 1.88.2.6 snj break;
4685 1.88.2.6 snj case IXGBE_LINK_SPEED_10_FULL:
4686 1.88.2.6 snj bpsmsg = "10 Mbps";
4687 1.88.2.6 snj break;
4688 1.88.2.6 snj default:
4689 1.88.2.6 snj bpsmsg = "unknown speed";
4690 1.88.2.6 snj break;
4691 1.88.2.6 snj }
4692 1.88.2.6 snj device_printf(dev, "Link is up %s %s \n",
4693 1.88.2.6 snj bpsmsg, "Full Duplex");
4694 1.88.2.6 snj }
4695 1.88.2.6 snj adapter->link_active = TRUE;
4696 1.88.2.6 snj /* Update any Flow Control changes */
4697 1.88.2.6 snj ixgbe_fc_enable(&adapter->hw);
4698 1.88.2.6 snj /* Update DMA coalescing config */
4699 1.88.2.6 snj ixgbe_config_dmac(adapter);
4700 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_UP);
4701 1.88.2.17 martin
4702 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4703 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4704 1.1 dyoung }
4705 1.88.2.6 snj } else { /* Link down */
4706 1.88.2.6 snj if (adapter->link_active == TRUE) {
4707 1.88.2.6 snj if (bootverbose)
4708 1.88.2.6 snj device_printf(dev, "Link is Down\n");
4709 1.88.2.6 snj if_link_state_change(ifp, LINK_STATE_DOWN);
4710 1.88.2.6 snj adapter->link_active = FALSE;
4711 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4712 1.88.2.6 snj ixgbe_ping_all_vfs(adapter);
4713 1.88.2.16 martin ixgbe_drain_all(adapter);
4714 1.1 dyoung }
4715 1.88.2.6 snj }
4716 1.88.2.6 snj } /* ixgbe_update_link_status */
4717 1.88.2.6 snj
4718 1.88.2.6 snj /************************************************************************
4719 1.88.2.6 snj * ixgbe_config_dmac - Configure DMA Coalescing
4720 1.88.2.6 snj ************************************************************************/
4721 1.88.2.6 snj static void
4722 1.88.2.6 snj ixgbe_config_dmac(struct adapter *adapter)
4723 1.88.2.6 snj {
4724 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4725 1.88.2.6 snj struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;
4726 1.88.2.6 snj
4727 1.88.2.6 snj if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)
4728 1.88.2.6 snj return;
4729 1.88.2.6 snj
4730 1.88.2.6 snj if (dcfg->watchdog_timer ^ adapter->dmac ||
4731 1.88.2.6 snj dcfg->link_speed ^ adapter->link_speed) {
4732 1.88.2.6 snj dcfg->watchdog_timer = adapter->dmac;
4733 1.88.2.6 snj dcfg->fcoe_en = false;
4734 1.88.2.6 snj dcfg->link_speed = adapter->link_speed;
4735 1.88.2.6 snj dcfg->num_tcs = 1;
4736 1.88.2.6 snj
4737 1.88.2.6 snj INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n",
4738 1.88.2.6 snj dcfg->watchdog_timer, dcfg->link_speed);
4739 1.88.2.6 snj
4740 1.88.2.6 snj hw->mac.ops.dmac_config(hw);
4741 1.1 dyoung }
4742 1.88.2.6 snj } /* ixgbe_config_dmac */
4743 1.1 dyoung
4744 1.88.2.6 snj /************************************************************************
4745 1.88.2.6 snj * ixgbe_enable_intr
4746 1.88.2.6 snj ************************************************************************/
4747 1.88.2.6 snj static void
4748 1.88.2.6 snj ixgbe_enable_intr(struct adapter *adapter)
4749 1.88.2.6 snj {
4750 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4751 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4752 1.88.2.6 snj u32 mask, fwsm;
4753 1.1 dyoung
4754 1.88.2.6 snj mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
4755 1.1 dyoung
4756 1.88.2.6 snj switch (adapter->hw.mac.type) {
4757 1.88.2.6 snj case ixgbe_mac_82599EB:
4758 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4759 1.88.2.6 snj /* Temperature sensor on some adapters */
4760 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0;
4761 1.88.2.6 snj /* SFP+ (RX_LOS_N & MOD_ABS_N) */
4762 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4763 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP2;
4764 1.88.2.6 snj break;
4765 1.88.2.6 snj case ixgbe_mac_X540:
4766 1.88.2.6 snj /* Detect if Thermal Sensor is enabled */
4767 1.88.2.6 snj fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
4768 1.88.2.6 snj if (fwsm & IXGBE_FWSM_TS_ENABLED)
4769 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4770 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4771 1.88.2.6 snj break;
4772 1.88.2.6 snj case ixgbe_mac_X550:
4773 1.88.2.6 snj /* MAC thermal sensor is automatically enabled */
4774 1.88.2.6 snj mask |= IXGBE_EIMS_TS;
4775 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4776 1.88.2.6 snj break;
4777 1.88.2.6 snj case ixgbe_mac_X550EM_x:
4778 1.88.2.6 snj case ixgbe_mac_X550EM_a:
4779 1.88.2.6 snj /* Some devices use SDP0 for important information */
4780 1.88.2.6 snj if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
4781 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
4782 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||
4783 1.88.2.6 snj hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)
4784 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);
4785 1.88.2.6 snj if (hw->phy.type == ixgbe_phy_x550em_ext_t)
4786 1.88.2.6 snj mask |= IXGBE_EICR_GPI_SDP0_X540;
4787 1.88.2.6 snj mask |= IXGBE_EIMS_ECC;
4788 1.88.2.6 snj break;
4789 1.88.2.6 snj default:
4790 1.88.2.6 snj break;
4791 1.88.2.6 snj }
4792 1.1 dyoung
4793 1.88.2.6 snj /* Enable Fan Failure detection */
4794 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
4795 1.88.2.6 snj mask |= IXGBE_EIMS_GPI_SDP1;
4796 1.88.2.6 snj /* Enable SR-IOV */
4797 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
4798 1.88.2.6 snj mask |= IXGBE_EIMS_MAILBOX;
4799 1.88.2.6 snj /* Enable Flow Director */
4800 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FDIR)
4801 1.88.2.6 snj mask |= IXGBE_EIMS_FLOW_DIR;
4802 1.1 dyoung
4803 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
4804 1.88.2.6 snj
4805 1.88.2.6 snj /* With MSI-X we use auto clear */
4806 1.88.2.6 snj if (adapter->msix_mem) {
4807 1.88.2.6 snj mask = IXGBE_EIMS_ENABLE_MASK;
4808 1.88.2.6 snj /* Don't autoclear Link */
4809 1.88.2.6 snj mask &= ~IXGBE_EIMS_OTHER;
4810 1.88.2.6 snj mask &= ~IXGBE_EIMS_LSC;
4811 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
4812 1.88.2.6 snj mask &= ~IXGBE_EIMS_MAILBOX;
4813 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
4814 1.88.2.6 snj }
4815 1.88.2.6 snj
4816 1.88.2.6 snj /*
4817 1.88.2.6 snj * Now enable all queues, this is done separately to
4818 1.88.2.6 snj * allow for handling the extended (beyond 32) MSI-X
4819 1.88.2.6 snj * vectors that can be used by 82599
4820 1.88.2.6 snj */
4821 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++)
4822 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
4823 1.88.2.6 snj
4824 1.88.2.6 snj IXGBE_WRITE_FLUSH(hw);
4825 1.1 dyoung
4826 1.88.2.6 snj } /* ixgbe_enable_intr */
4827 1.88.2.6 snj
4828 1.88.2.6 snj /************************************************************************
4829 1.88.2.16 martin * ixgbe_disable_intr_internal
4830 1.88.2.6 snj ************************************************************************/
4831 1.47 msaitoh static void
4832 1.88.2.16 martin ixgbe_disable_intr_internal(struct adapter *adapter, bool nestok)
4833 1.85 msaitoh {
4834 1.88.2.11 martin struct ix_queue *que = adapter->queues;
4835 1.88.2.11 martin
4836 1.88.2.11 martin /* disable interrupts other than queues */
4837 1.88.2.11 martin IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE);
4838 1.88.2.11 martin
4839 1.88.2.6 snj if (adapter->msix_mem)
4840 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0);
4841 1.88.2.11 martin
4842 1.88.2.11 martin for (int i = 0; i < adapter->num_queues; i++, que++)
4843 1.88.2.16 martin ixgbe_disable_queue_internal(adapter, que->msix, nestok);
4844 1.88.2.11 martin
4845 1.88.2.6 snj IXGBE_WRITE_FLUSH(&adapter->hw);
4846 1.85 msaitoh
4847 1.88.2.16 martin } /* ixgbe_do_disable_intr_internal */
4848 1.88.2.16 martin
4849 1.88.2.16 martin /************************************************************************
4850 1.88.2.16 martin * ixgbe_disable_intr
4851 1.88.2.16 martin ************************************************************************/
4852 1.88.2.16 martin static void
4853 1.88.2.16 martin ixgbe_disable_intr(struct adapter *adapter)
4854 1.88.2.16 martin {
4855 1.88.2.16 martin
4856 1.88.2.16 martin ixgbe_disable_intr_internal(adapter, true);
4857 1.88.2.6 snj } /* ixgbe_disable_intr */
4858 1.85 msaitoh
4859 1.88.2.6 snj /************************************************************************
4860 1.88.2.16 martin * ixgbe_ensure_disabled_intr
4861 1.88.2.16 martin ************************************************************************/
4862 1.88.2.16 martin void
4863 1.88.2.16 martin ixgbe_ensure_disabled_intr(struct adapter *adapter)
4864 1.88.2.16 martin {
4865 1.88.2.16 martin
4866 1.88.2.16 martin ixgbe_disable_intr_internal(adapter, false);
4867 1.88.2.16 martin } /* ixgbe_ensure_disabled_intr */
4868 1.88.2.16 martin
4869 1.88.2.16 martin /************************************************************************
4870 1.88.2.6 snj * ixgbe_legacy_irq - Legacy Interrupt Service routine
4871 1.88.2.6 snj ************************************************************************/
4872 1.88.2.6 snj static int
4873 1.88.2.6 snj ixgbe_legacy_irq(void *arg)
4874 1.88.2.6 snj {
4875 1.88.2.6 snj struct ix_queue *que = arg;
4876 1.88.2.6 snj struct adapter *adapter = que->adapter;
4877 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
4878 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
4879 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
4880 1.88.2.6 snj bool more = false;
4881 1.88.2.6 snj u32 eicr, eicr_mask;
4882 1.88.2.6 snj
4883 1.88.2.6 snj /* Silicon errata #26 on 82598 */
4884 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
4885 1.88.2.6 snj
4886 1.88.2.6 snj eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
4887 1.88.2.6 snj
4888 1.88.2.6 snj adapter->stats.pf.legint.ev_count++;
4889 1.88.2.6 snj ++que->irqs.ev_count;
4890 1.88.2.6 snj if (eicr == 0) {
4891 1.88.2.6 snj adapter->stats.pf.intzero.ev_count++;
4892 1.88.2.6 snj if ((ifp->if_flags & IFF_UP) != 0)
4893 1.88.2.6 snj ixgbe_enable_intr(adapter);
4894 1.88.2.6 snj return 0;
4895 1.88.2.6 snj }
4896 1.88.2.6 snj
4897 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) != 0) {
4898 1.88.2.18 martin /*
4899 1.88.2.18 martin * The same as ixgbe_msix_que() about "que->txrx_use_workqueue".
4900 1.88.2.18 martin */
4901 1.88.2.18 martin que->txrx_use_workqueue = adapter->txrx_use_workqueue;
4902 1.88.2.18 martin
4903 1.88.2.6 snj #ifdef __NetBSD__
4904 1.88.2.6 snj /* Don't run ixgbe_rxeof in interrupt context */
4905 1.88.2.6 snj more = true;
4906 1.88.2.6 snj #else
4907 1.88.2.6 snj more = ixgbe_rxeof(que);
4908 1.88.2.6 snj #endif
4909 1.88.2.6 snj
4910 1.88.2.6 snj IXGBE_TX_LOCK(txr);
4911 1.88.2.6 snj ixgbe_txeof(txr);
4912 1.88.2.6 snj #ifdef notyet
4913 1.88.2.6 snj if (!ixgbe_ring_empty(ifp, txr->br))
4914 1.88.2.6 snj ixgbe_start_locked(ifp, txr);
4915 1.85 msaitoh #endif
4916 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
4917 1.88.2.6 snj }
4918 1.88.2.6 snj
4919 1.88.2.6 snj /* Check for fan failure */
4920 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
4921 1.88.2.6 snj ixgbe_check_fan_failure(adapter, eicr, true);
4922 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4923 1.88.2.6 snj }
4924 1.85 msaitoh
4925 1.88.2.6 snj /* Link status change */
4926 1.88.2.6 snj if (eicr & IXGBE_EICR_LSC)
4927 1.88.2.6 snj softint_schedule(adapter->link_si);
4928 1.88.2.6 snj
4929 1.88.2.6 snj if (ixgbe_is_sfp(hw)) {
4930 1.88.2.6 snj /* Pluggable optics-related interrupt */
4931 1.88.2.6 snj if (hw->mac.type >= ixgbe_mac_X540)
4932 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
4933 1.88.2.6 snj else
4934 1.88.2.6 snj eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
4935 1.88.2.6 snj
4936 1.88.2.6 snj if (eicr & eicr_mask) {
4937 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
4938 1.88.2.6 snj softint_schedule(adapter->mod_si);
4939 1.85 msaitoh }
4940 1.88.2.6 snj
4941 1.88.2.6 snj if ((hw->mac.type == ixgbe_mac_82599EB) &&
4942 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
4943 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EICR,
4944 1.88.2.6 snj IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
4945 1.88.2.6 snj softint_schedule(adapter->msf_si);
4946 1.85 msaitoh }
4947 1.88.2.6 snj }
4948 1.85 msaitoh
4949 1.88.2.6 snj /* External PHY interrupt */
4950 1.88.2.6 snj if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
4951 1.88.2.6 snj (eicr & IXGBE_EICR_GPI_SDP0_X540))
4952 1.88.2.6 snj softint_schedule(adapter->phy_si);
4953 1.88.2.6 snj
4954 1.88.2.13 martin if (more) {
4955 1.88.2.13 martin que->req.ev_count++;
4956 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
4957 1.88.2.13 martin } else
4958 1.88.2.6 snj ixgbe_enable_intr(adapter);
4959 1.88.2.6 snj
4960 1.88.2.6 snj return 1;
4961 1.88.2.6 snj } /* ixgbe_legacy_irq */
4962 1.88.2.6 snj
4963 1.88.2.6 snj /************************************************************************
4964 1.88.2.8 snj * ixgbe_free_pciintr_resources
4965 1.88.2.6 snj ************************************************************************/
4966 1.88.2.6 snj static void
4967 1.88.2.8 snj ixgbe_free_pciintr_resources(struct adapter *adapter)
4968 1.88.2.6 snj {
4969 1.88.2.6 snj struct ix_queue *que = adapter->queues;
4970 1.88.2.6 snj int rid;
4971 1.88.2.6 snj
4972 1.88.2.6 snj /*
4973 1.88.2.6 snj * Release all msix queue resources:
4974 1.88.2.6 snj */
4975 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, que++) {
4976 1.88.2.8 snj if (que->res != NULL) {
4977 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4978 1.88.2.6 snj adapter->osdep.ihs[i]);
4979 1.88.2.8 snj adapter->osdep.ihs[i] = NULL;
4980 1.88.2.8 snj }
4981 1.85 msaitoh }
4982 1.85 msaitoh
4983 1.88.2.6 snj /* Clean the Legacy or Link interrupt last */
4984 1.88.2.6 snj if (adapter->vector) /* we are doing MSIX */
4985 1.88.2.6 snj rid = adapter->vector;
4986 1.88.2.6 snj else
4987 1.88.2.6 snj rid = 0;
4988 1.85 msaitoh
4989 1.88.2.6 snj if (adapter->osdep.ihs[rid] != NULL) {
4990 1.88.2.6 snj pci_intr_disestablish(adapter->osdep.pc,
4991 1.88.2.6 snj adapter->osdep.ihs[rid]);
4992 1.88.2.6 snj adapter->osdep.ihs[rid] = NULL;
4993 1.88.2.6 snj }
4994 1.88.2.6 snj
4995 1.88.2.8 snj if (adapter->osdep.intrs != NULL) {
4996 1.88.2.8 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs,
4997 1.88.2.8 snj adapter->osdep.nintrs);
4998 1.88.2.8 snj adapter->osdep.intrs = NULL;
4999 1.88.2.8 snj }
5000 1.88.2.8 snj } /* ixgbe_free_pciintr_resources */
5001 1.88.2.8 snj
5002 1.88.2.8 snj /************************************************************************
5003 1.88.2.8 snj * ixgbe_free_pci_resources
5004 1.88.2.8 snj ************************************************************************/
5005 1.88.2.8 snj static void
5006 1.88.2.8 snj ixgbe_free_pci_resources(struct adapter *adapter)
5007 1.88.2.8 snj {
5008 1.88.2.8 snj
5009 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
5010 1.88.2.6 snj
5011 1.88.2.6 snj if (adapter->osdep.mem_size != 0) {
5012 1.88.2.6 snj bus_space_unmap(adapter->osdep.mem_bus_space_tag,
5013 1.88.2.6 snj adapter->osdep.mem_bus_space_handle,
5014 1.88.2.6 snj adapter->osdep.mem_size);
5015 1.88.2.6 snj }
5016 1.85 msaitoh
5017 1.88.2.6 snj } /* ixgbe_free_pci_resources */
5018 1.88.2.6 snj
5019 1.88.2.6 snj /************************************************************************
5020 1.88.2.6 snj * ixgbe_set_sysctl_value
5021 1.88.2.6 snj ************************************************************************/
5022 1.85 msaitoh static void
5023 1.47 msaitoh ixgbe_set_sysctl_value(struct adapter *adapter, const char *name,
5024 1.47 msaitoh const char *description, int *limit, int value)
5025 1.47 msaitoh {
5026 1.47 msaitoh device_t dev = adapter->dev;
5027 1.47 msaitoh struct sysctllog **log;
5028 1.47 msaitoh const struct sysctlnode *rnode, *cnode;
5029 1.47 msaitoh
5030 1.47 msaitoh log = &adapter->sysctllog;
5031 1.47 msaitoh if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
5032 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl root\n");
5033 1.47 msaitoh return;
5034 1.47 msaitoh }
5035 1.47 msaitoh if (sysctl_createv(log, 0, &rnode, &cnode,
5036 1.50 msaitoh CTLFLAG_READWRITE, CTLTYPE_INT,
5037 1.47 msaitoh name, SYSCTL_DESCR(description),
5038 1.50 msaitoh NULL, 0, limit, 0, CTL_CREATE, CTL_EOL) != 0)
5039 1.47 msaitoh aprint_error_dev(dev, "could not create sysctl\n");
5040 1.47 msaitoh *limit = value;
5041 1.88.2.6 snj } /* ixgbe_set_sysctl_value */
5042 1.47 msaitoh
5043 1.88.2.6 snj /************************************************************************
5044 1.88.2.6 snj * ixgbe_sysctl_flowcntl
5045 1.88.2.6 snj *
5046 1.88.2.6 snj * SYSCTL wrapper around setting Flow Control
5047 1.88.2.6 snj ************************************************************************/
5048 1.1 dyoung static int
5049 1.52 msaitoh ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS)
5050 1.1 dyoung {
5051 1.44 msaitoh struct sysctlnode node = *rnode;
5052 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5053 1.88.2.6 snj int error, fc;
5054 1.1 dyoung
5055 1.88.2.6 snj fc = adapter->hw.fc.current_mode;
5056 1.53 msaitoh node.sysctl_data = &fc;
5057 1.1 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
5058 1.1 dyoung if (error != 0 || newp == NULL)
5059 1.1 dyoung return error;
5060 1.1 dyoung
5061 1.1 dyoung /* Don't bother if it's not changed */
5062 1.88.2.6 snj if (fc == adapter->hw.fc.current_mode)
5063 1.1 dyoung return (0);
5064 1.1 dyoung
5065 1.52 msaitoh return ixgbe_set_flowcntl(adapter, fc);
5066 1.88.2.6 snj } /* ixgbe_sysctl_flowcntl */
5067 1.52 msaitoh
5068 1.88.2.6 snj /************************************************************************
5069 1.88.2.6 snj * ixgbe_set_flowcntl - Set flow control
5070 1.88.2.6 snj *
5071 1.88.2.6 snj * Flow control values:
5072 1.88.2.6 snj * 0 - off
5073 1.88.2.6 snj * 1 - rx pause
5074 1.88.2.6 snj * 2 - tx pause
5075 1.88.2.6 snj * 3 - full
5076 1.88.2.6 snj ************************************************************************/
5077 1.52 msaitoh static int
5078 1.52 msaitoh ixgbe_set_flowcntl(struct adapter *adapter, int fc)
5079 1.52 msaitoh {
5080 1.52 msaitoh switch (fc) {
5081 1.1 dyoung case ixgbe_fc_rx_pause:
5082 1.1 dyoung case ixgbe_fc_tx_pause:
5083 1.1 dyoung case ixgbe_fc_full:
5084 1.88.2.6 snj adapter->hw.fc.requested_mode = fc;
5085 1.26 msaitoh if (adapter->num_queues > 1)
5086 1.26 msaitoh ixgbe_disable_rx_drop(adapter);
5087 1.1 dyoung break;
5088 1.1 dyoung case ixgbe_fc_none:
5089 1.1 dyoung adapter->hw.fc.requested_mode = ixgbe_fc_none;
5090 1.26 msaitoh if (adapter->num_queues > 1)
5091 1.26 msaitoh ixgbe_enable_rx_drop(adapter);
5092 1.28 msaitoh break;
5093 1.28 msaitoh default:
5094 1.28 msaitoh return (EINVAL);
5095 1.1 dyoung }
5096 1.88.2.6 snj
5097 1.56 msaitoh #if 0 /* XXX NetBSD */
5098 1.25 msaitoh /* Don't autoneg if forcing a value */
5099 1.25 msaitoh adapter->hw.fc.disable_fc_autoneg = TRUE;
5100 1.56 msaitoh #endif
5101 1.25 msaitoh ixgbe_fc_enable(&adapter->hw);
5102 1.52 msaitoh
5103 1.88.2.6 snj return (0);
5104 1.88.2.6 snj } /* ixgbe_set_flowcntl */
5105 1.52 msaitoh
5106 1.88.2.6 snj /************************************************************************
5107 1.88.2.6 snj * ixgbe_enable_rx_drop
5108 1.88.2.6 snj *
5109 1.88.2.6 snj * Enable the hardware to drop packets when the buffer is
5110 1.88.2.6 snj * full. This is useful with multiqueue, so that no single
5111 1.88.2.6 snj * queue being full stalls the entire RX engine. We only
5112 1.88.2.6 snj * enable this when Multiqueue is enabled AND Flow Control
5113 1.88.2.6 snj * is disabled.
5114 1.88.2.6 snj ************************************************************************/
5115 1.88.2.6 snj static void
5116 1.88.2.6 snj ixgbe_enable_rx_drop(struct adapter *adapter)
5117 1.52 msaitoh {
5118 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5119 1.88.2.6 snj struct rx_ring *rxr;
5120 1.88.2.6 snj u32 srrctl;
5121 1.48 msaitoh
5122 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
5123 1.88.2.6 snj rxr = &adapter->rx_rings[i];
5124 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
5125 1.88.2.6 snj srrctl |= IXGBE_SRRCTL_DROP_EN;
5126 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
5127 1.43 msaitoh }
5128 1.1 dyoung
5129 1.88.2.6 snj /* enable drop for each vf */
5130 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
5131 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
5132 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) |
5133 1.88.2.6 snj IXGBE_QDE_ENABLE));
5134 1.28 msaitoh }
5135 1.88.2.6 snj } /* ixgbe_enable_rx_drop */
5136 1.1 dyoung
5137 1.88.2.6 snj /************************************************************************
5138 1.88.2.6 snj * ixgbe_disable_rx_drop
5139 1.88.2.6 snj ************************************************************************/
5140 1.88.2.6 snj static void
5141 1.88.2.6 snj ixgbe_disable_rx_drop(struct adapter *adapter)
5142 1.44 msaitoh {
5143 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5144 1.88.2.6 snj struct rx_ring *rxr;
5145 1.88.2.6 snj u32 srrctl;
5146 1.44 msaitoh
5147 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++) {
5148 1.88.2.6 snj rxr = &adapter->rx_rings[i];
5149 1.88.2.6 snj srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
5150 1.88.2.6 snj srrctl &= ~IXGBE_SRRCTL_DROP_EN;
5151 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
5152 1.44 msaitoh }
5153 1.44 msaitoh
5154 1.88.2.6 snj /* disable drop for each vf */
5155 1.88.2.6 snj for (int i = 0; i < adapter->num_vfs; i++) {
5156 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_QDE,
5157 1.88.2.6 snj (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT)));
5158 1.44 msaitoh }
5159 1.88.2.6 snj } /* ixgbe_disable_rx_drop */
5160 1.44 msaitoh
5161 1.88.2.6 snj /************************************************************************
5162 1.88.2.6 snj * ixgbe_sysctl_advertise
5163 1.88.2.6 snj *
5164 1.88.2.6 snj * SYSCTL wrapper around setting advertised speed
5165 1.88.2.6 snj ************************************************************************/
5166 1.88.2.6 snj static int
5167 1.88.2.6 snj ixgbe_sysctl_advertise(SYSCTLFN_ARGS)
5168 1.88.2.6 snj {
5169 1.88.2.6 snj struct sysctlnode node = *rnode;
5170 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5171 1.88.2.6 snj int error = 0, advertise;
5172 1.44 msaitoh
5173 1.88.2.6 snj advertise = adapter->advertise;
5174 1.88.2.6 snj node.sysctl_data = &advertise;
5175 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5176 1.88.2.6 snj if (error != 0 || newp == NULL)
5177 1.88.2.6 snj return error;
5178 1.44 msaitoh
5179 1.88.2.6 snj return ixgbe_set_advertise(adapter, advertise);
5180 1.88.2.6 snj } /* ixgbe_sysctl_advertise */
5181 1.44 msaitoh
5182 1.88.2.6 snj /************************************************************************
5183 1.88.2.6 snj * ixgbe_set_advertise - Control advertised link speed
5184 1.88.2.6 snj *
5185 1.88.2.6 snj * Flags:
5186 1.88.2.6 snj * 0x00 - Default (all capable link speed)
5187 1.88.2.6 snj * 0x01 - advertise 100 Mb
5188 1.88.2.6 snj * 0x02 - advertise 1G
5189 1.88.2.6 snj * 0x04 - advertise 10G
5190 1.88.2.6 snj * 0x08 - advertise 10 Mb
5191 1.88.2.6 snj * 0x10 - advertise 2.5G
5192 1.88.2.6 snj * 0x20 - advertise 5G
5193 1.88.2.6 snj ************************************************************************/
5194 1.44 msaitoh static int
5195 1.88.2.6 snj ixgbe_set_advertise(struct adapter *adapter, int advertise)
5196 1.44 msaitoh {
5197 1.88.2.6 snj device_t dev;
5198 1.88.2.6 snj struct ixgbe_hw *hw;
5199 1.88.2.6 snj ixgbe_link_speed speed = 0;
5200 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
5201 1.88.2.6 snj s32 err = IXGBE_NOT_IMPLEMENTED;
5202 1.88.2.6 snj bool negotiate = FALSE;
5203 1.44 msaitoh
5204 1.88.2.6 snj /* Checks to validate new value */
5205 1.88.2.6 snj if (adapter->advertise == advertise) /* no change */
5206 1.88.2.6 snj return (0);
5207 1.88.2.6 snj
5208 1.88.2.6 snj dev = adapter->dev;
5209 1.88.2.6 snj hw = &adapter->hw;
5210 1.88.2.6 snj
5211 1.88.2.6 snj /* No speed changes for backplane media */
5212 1.88.2.6 snj if (hw->phy.media_type == ixgbe_media_type_backplane)
5213 1.44 msaitoh return (ENODEV);
5214 1.88.2.6 snj
5215 1.88.2.6 snj if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
5216 1.88.2.6 snj (hw->phy.multispeed_fiber))) {
5217 1.88.2.6 snj device_printf(dev,
5218 1.88.2.6 snj "Advertised speed can only be set on copper or "
5219 1.88.2.6 snj "multispeed fiber media types.\n");
5220 1.88.2.6 snj return (EINVAL);
5221 1.44 msaitoh }
5222 1.44 msaitoh
5223 1.88.2.6 snj if (advertise < 0x0 || advertise > 0x2f) {
5224 1.88.2.6 snj device_printf(dev,
5225 1.88.2.6 snj "Invalid advertised speed; valid modes are 0x0 through 0x7\n");
5226 1.88.2.6 snj return (EINVAL);
5227 1.44 msaitoh }
5228 1.44 msaitoh
5229 1.88.2.6 snj if (hw->mac.ops.get_link_capabilities) {
5230 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
5231 1.88.2.6 snj &negotiate);
5232 1.88.2.6 snj if (err != IXGBE_SUCCESS) {
5233 1.88.2.6 snj device_printf(dev, "Unable to determine supported advertise speeds\n");
5234 1.88.2.6 snj return (ENODEV);
5235 1.88.2.6 snj }
5236 1.88.2.6 snj }
5237 1.44 msaitoh
5238 1.88.2.6 snj /* Set new value and report new advertised mode */
5239 1.88.2.6 snj if (advertise & 0x1) {
5240 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) {
5241 1.88.2.6 snj device_printf(dev, "Interface does not support 100Mb advertised speed\n");
5242 1.88.2.6 snj return (EINVAL);
5243 1.88.2.6 snj }
5244 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_100_FULL;
5245 1.88.2.6 snj }
5246 1.88.2.6 snj if (advertise & 0x2) {
5247 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) {
5248 1.88.2.6 snj device_printf(dev, "Interface does not support 1Gb advertised speed\n");
5249 1.88.2.6 snj return (EINVAL);
5250 1.88.2.6 snj }
5251 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_1GB_FULL;
5252 1.88.2.6 snj }
5253 1.88.2.6 snj if (advertise & 0x4) {
5254 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) {
5255 1.88.2.6 snj device_printf(dev, "Interface does not support 10Gb advertised speed\n");
5256 1.88.2.6 snj return (EINVAL);
5257 1.88.2.6 snj }
5258 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10GB_FULL;
5259 1.88.2.6 snj }
5260 1.88.2.6 snj if (advertise & 0x8) {
5261 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) {
5262 1.88.2.6 snj device_printf(dev, "Interface does not support 10Mb advertised speed\n");
5263 1.88.2.6 snj return (EINVAL);
5264 1.88.2.6 snj }
5265 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_10_FULL;
5266 1.88.2.6 snj }
5267 1.88.2.6 snj if (advertise & 0x10) {
5268 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) {
5269 1.88.2.6 snj device_printf(dev, "Interface does not support 2.5Gb advertised speed\n");
5270 1.88.2.6 snj return (EINVAL);
5271 1.88.2.6 snj }
5272 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
5273 1.88.2.6 snj }
5274 1.88.2.6 snj if (advertise & 0x20) {
5275 1.88.2.6 snj if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) {
5276 1.88.2.6 snj device_printf(dev, "Interface does not support 5Gb advertised speed\n");
5277 1.88.2.6 snj return (EINVAL);
5278 1.88.2.6 snj }
5279 1.88.2.6 snj speed |= IXGBE_LINK_SPEED_5GB_FULL;
5280 1.88.2.6 snj }
5281 1.88.2.6 snj if (advertise == 0)
5282 1.88.2.6 snj speed = link_caps; /* All capable link speed */
5283 1.44 msaitoh
5284 1.88.2.6 snj hw->mac.autotry_restart = TRUE;
5285 1.88.2.6 snj hw->mac.ops.setup_link(hw, speed, TRUE);
5286 1.88.2.6 snj adapter->advertise = advertise;
5287 1.44 msaitoh
5288 1.44 msaitoh return (0);
5289 1.88.2.6 snj } /* ixgbe_set_advertise */
5290 1.44 msaitoh
5291 1.88.2.6 snj /************************************************************************
5292 1.88.2.6 snj * ixgbe_get_advertise - Get current advertised speed settings
5293 1.88.2.6 snj *
5294 1.88.2.6 snj * Formatted for sysctl usage.
5295 1.88.2.6 snj * Flags:
5296 1.88.2.6 snj * 0x01 - advertise 100 Mb
5297 1.88.2.6 snj * 0x02 - advertise 1G
5298 1.88.2.6 snj * 0x04 - advertise 10G
5299 1.88.2.6 snj * 0x08 - advertise 10 Mb (yes, Mb)
5300 1.88.2.6 snj * 0x10 - advertise 2.5G
5301 1.88.2.6 snj * 0x20 - advertise 5G
5302 1.88.2.6 snj ************************************************************************/
5303 1.24 msaitoh static int
5304 1.88.2.6 snj ixgbe_get_advertise(struct adapter *adapter)
5305 1.24 msaitoh {
5306 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5307 1.88.2.6 snj int speed;
5308 1.88.2.6 snj ixgbe_link_speed link_caps = 0;
5309 1.88.2.6 snj s32 err;
5310 1.88.2.6 snj bool negotiate = FALSE;
5311 1.24 msaitoh
5312 1.88.2.6 snj /*
5313 1.88.2.6 snj * Advertised speed means nothing unless it's copper or
5314 1.88.2.6 snj * multi-speed fiber
5315 1.88.2.6 snj */
5316 1.88.2.6 snj if (!(hw->phy.media_type == ixgbe_media_type_copper) &&
5317 1.88.2.6 snj !(hw->phy.multispeed_fiber))
5318 1.88.2.6 snj return (0);
5319 1.24 msaitoh
5320 1.88.2.6 snj err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);
5321 1.88.2.6 snj if (err != IXGBE_SUCCESS)
5322 1.88.2.6 snj return (0);
5323 1.26 msaitoh
5324 1.88.2.6 snj speed =
5325 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x04 : 0) |
5326 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x02 : 0) |
5327 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x01 : 0) |
5328 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x08 : 0) |
5329 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
5330 1.88.2.6 snj ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0);
5331 1.88.2.6 snj
5332 1.88.2.6 snj return speed;
5333 1.88.2.6 snj } /* ixgbe_get_advertise */
5334 1.88.2.6 snj
5335 1.88.2.6 snj /************************************************************************
5336 1.88.2.6 snj * ixgbe_sysctl_dmac - Manage DMA Coalescing
5337 1.88.2.6 snj *
5338 1.88.2.6 snj * Control values:
5339 1.88.2.6 snj * 0/1 - off / on (use default value of 1000)
5340 1.88.2.6 snj *
5341 1.88.2.6 snj * Legal timer values are:
5342 1.88.2.6 snj * 50,100,250,500,1000,2000,5000,10000
5343 1.88.2.6 snj *
5344 1.88.2.6 snj * Turning off interrupt moderation will also turn this off.
5345 1.88.2.6 snj ************************************************************************/
5346 1.44 msaitoh static int
5347 1.44 msaitoh ixgbe_sysctl_dmac(SYSCTLFN_ARGS)
5348 1.44 msaitoh {
5349 1.44 msaitoh struct sysctlnode node = *rnode;
5350 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5351 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5352 1.88.2.6 snj int error;
5353 1.88.2.6 snj int newval;
5354 1.44 msaitoh
5355 1.88.2.6 snj newval = adapter->dmac;
5356 1.48 msaitoh node.sysctl_data = &newval;
5357 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5358 1.44 msaitoh if ((error) || (newp == NULL))
5359 1.44 msaitoh return (error);
5360 1.44 msaitoh
5361 1.48 msaitoh switch (newval) {
5362 1.44 msaitoh case 0:
5363 1.44 msaitoh /* Disabled */
5364 1.48 msaitoh adapter->dmac = 0;
5365 1.44 msaitoh break;
5366 1.48 msaitoh case 1:
5367 1.48 msaitoh /* Enable and use default */
5368 1.44 msaitoh adapter->dmac = 1000;
5369 1.44 msaitoh break;
5370 1.44 msaitoh case 50:
5371 1.44 msaitoh case 100:
5372 1.44 msaitoh case 250:
5373 1.44 msaitoh case 500:
5374 1.44 msaitoh case 1000:
5375 1.44 msaitoh case 2000:
5376 1.44 msaitoh case 5000:
5377 1.44 msaitoh case 10000:
5378 1.44 msaitoh /* Legal values - allow */
5379 1.48 msaitoh adapter->dmac = newval;
5380 1.44 msaitoh break;
5381 1.44 msaitoh default:
5382 1.44 msaitoh /* Do nothing, illegal value */
5383 1.44 msaitoh return (EINVAL);
5384 1.44 msaitoh }
5385 1.44 msaitoh
5386 1.44 msaitoh /* Re-initialize hardware if it's already running */
5387 1.44 msaitoh if (ifp->if_flags & IFF_RUNNING)
5388 1.88.2.15 martin ifp->if_init(ifp);
5389 1.44 msaitoh
5390 1.44 msaitoh return (0);
5391 1.44 msaitoh }
5392 1.44 msaitoh
5393 1.48 msaitoh #ifdef IXGBE_DEBUG
5394 1.88.2.6 snj /************************************************************************
5395 1.88.2.6 snj * ixgbe_sysctl_power_state
5396 1.88.2.6 snj *
5397 1.88.2.6 snj * Sysctl to test power states
5398 1.88.2.6 snj * Values:
5399 1.88.2.6 snj * 0 - set device to D0
5400 1.88.2.6 snj * 3 - set device to D3
5401 1.88.2.6 snj * (none) - get current device power state
5402 1.88.2.6 snj ************************************************************************/
5403 1.48 msaitoh static int
5404 1.48 msaitoh ixgbe_sysctl_power_state(SYSCTLFN_ARGS)
5405 1.48 msaitoh {
5406 1.88.2.6 snj #ifdef notyet
5407 1.48 msaitoh struct sysctlnode node = *rnode;
5408 1.48 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5409 1.88.2.6 snj device_t dev = adapter->dev;
5410 1.88.2.6 snj int curr_ps, new_ps, error = 0;
5411 1.48 msaitoh
5412 1.48 msaitoh curr_ps = new_ps = pci_get_powerstate(dev);
5413 1.48 msaitoh
5414 1.48 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5415 1.48 msaitoh if ((error) || (req->newp == NULL))
5416 1.48 msaitoh return (error);
5417 1.48 msaitoh
5418 1.48 msaitoh if (new_ps == curr_ps)
5419 1.48 msaitoh return (0);
5420 1.48 msaitoh
5421 1.48 msaitoh if (new_ps == 3 && curr_ps == 0)
5422 1.48 msaitoh error = DEVICE_SUSPEND(dev);
5423 1.48 msaitoh else if (new_ps == 0 && curr_ps == 3)
5424 1.48 msaitoh error = DEVICE_RESUME(dev);
5425 1.48 msaitoh else
5426 1.48 msaitoh return (EINVAL);
5427 1.48 msaitoh
5428 1.48 msaitoh device_printf(dev, "New state: %d\n", pci_get_powerstate(dev));
5429 1.48 msaitoh
5430 1.48 msaitoh return (error);
5431 1.48 msaitoh #else
5432 1.48 msaitoh return 0;
5433 1.48 msaitoh #endif
5434 1.88.2.6 snj } /* ixgbe_sysctl_power_state */
5435 1.48 msaitoh #endif
5436 1.88.2.6 snj
5437 1.88.2.6 snj /************************************************************************
5438 1.88.2.6 snj * ixgbe_sysctl_wol_enable
5439 1.88.2.6 snj *
5440 1.88.2.6 snj * Sysctl to enable/disable the WoL capability,
5441 1.88.2.6 snj * if supported by the adapter.
5442 1.88.2.6 snj *
5443 1.88.2.6 snj * Values:
5444 1.88.2.6 snj * 0 - disabled
5445 1.88.2.6 snj * 1 - enabled
5446 1.88.2.6 snj ************************************************************************/
5447 1.44 msaitoh static int
5448 1.44 msaitoh ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS)
5449 1.44 msaitoh {
5450 1.44 msaitoh struct sysctlnode node = *rnode;
5451 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5452 1.44 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5453 1.88.2.6 snj bool new_wol_enabled;
5454 1.88.2.6 snj int error = 0;
5455 1.44 msaitoh
5456 1.44 msaitoh new_wol_enabled = hw->wol_enabled;
5457 1.53 msaitoh node.sysctl_data = &new_wol_enabled;
5458 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5459 1.44 msaitoh if ((error) || (newp == NULL))
5460 1.44 msaitoh return (error);
5461 1.44 msaitoh if (new_wol_enabled == hw->wol_enabled)
5462 1.44 msaitoh return (0);
5463 1.44 msaitoh
5464 1.53 msaitoh if (new_wol_enabled && !adapter->wol_support)
5465 1.44 msaitoh return (ENODEV);
5466 1.44 msaitoh else
5467 1.48 msaitoh hw->wol_enabled = new_wol_enabled;
5468 1.44 msaitoh
5469 1.44 msaitoh return (0);
5470 1.88.2.6 snj } /* ixgbe_sysctl_wol_enable */
5471 1.48 msaitoh
5472 1.88.2.6 snj /************************************************************************
5473 1.88.2.6 snj * ixgbe_sysctl_wufc - Wake Up Filter Control
5474 1.44 msaitoh *
5475 1.88.2.6 snj * Sysctl to enable/disable the types of packets that the
5476 1.88.2.6 snj * adapter will wake up on upon receipt.
5477 1.88.2.6 snj * Flags:
5478 1.88.2.6 snj * 0x1 - Link Status Change
5479 1.88.2.6 snj * 0x2 - Magic Packet
5480 1.88.2.6 snj * 0x4 - Direct Exact
5481 1.88.2.6 snj * 0x8 - Directed Multicast
5482 1.88.2.6 snj * 0x10 - Broadcast
5483 1.88.2.6 snj * 0x20 - ARP/IPv4 Request Packet
5484 1.88.2.6 snj * 0x40 - Direct IPv4 Packet
5485 1.88.2.6 snj * 0x80 - Direct IPv6 Packet
5486 1.88.2.6 snj *
5487 1.88.2.6 snj * Settings not listed above will cause the sysctl to return an error.
5488 1.88.2.6 snj ************************************************************************/
5489 1.44 msaitoh static int
5490 1.44 msaitoh ixgbe_sysctl_wufc(SYSCTLFN_ARGS)
5491 1.44 msaitoh {
5492 1.44 msaitoh struct sysctlnode node = *rnode;
5493 1.44 msaitoh struct adapter *adapter = (struct adapter *)node.sysctl_data;
5494 1.44 msaitoh int error = 0;
5495 1.44 msaitoh u32 new_wufc;
5496 1.44 msaitoh
5497 1.44 msaitoh new_wufc = adapter->wufc;
5498 1.53 msaitoh node.sysctl_data = &new_wufc;
5499 1.44 msaitoh error = sysctl_lookup(SYSCTLFN_CALL(&node));
5500 1.44 msaitoh if ((error) || (newp == NULL))
5501 1.44 msaitoh return (error);
5502 1.44 msaitoh if (new_wufc == adapter->wufc)
5503 1.44 msaitoh return (0);
5504 1.44 msaitoh
5505 1.44 msaitoh if (new_wufc & 0xffffff00)
5506 1.44 msaitoh return (EINVAL);
5507 1.88.2.6 snj
5508 1.88.2.6 snj new_wufc &= 0xff;
5509 1.88.2.6 snj new_wufc |= (0xffffff & adapter->wufc);
5510 1.88.2.6 snj adapter->wufc = new_wufc;
5511 1.44 msaitoh
5512 1.44 msaitoh return (0);
5513 1.88.2.6 snj } /* ixgbe_sysctl_wufc */
5514 1.44 msaitoh
5515 1.48 msaitoh #ifdef IXGBE_DEBUG
5516 1.88.2.6 snj /************************************************************************
5517 1.88.2.6 snj * ixgbe_sysctl_print_rss_config
5518 1.88.2.6 snj ************************************************************************/
5519 1.48 msaitoh static int
5520 1.48 msaitoh ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS)
5521 1.48 msaitoh {
5522 1.88.2.6 snj #ifdef notyet
5523 1.88.2.6 snj struct sysctlnode node = *rnode;
5524 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5525 1.48 msaitoh struct ixgbe_hw *hw = &adapter->hw;
5526 1.88.2.6 snj device_t dev = adapter->dev;
5527 1.88.2.6 snj struct sbuf *buf;
5528 1.88.2.6 snj int error = 0, reta_size;
5529 1.88.2.6 snj u32 reg;
5530 1.48 msaitoh
5531 1.48 msaitoh buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
5532 1.48 msaitoh if (!buf) {
5533 1.48 msaitoh device_printf(dev, "Could not allocate sbuf for output.\n");
5534 1.48 msaitoh return (ENOMEM);
5535 1.48 msaitoh }
5536 1.48 msaitoh
5537 1.48 msaitoh // TODO: use sbufs to make a string to print out
5538 1.48 msaitoh /* Set multiplier for RETA setup and table size based on MAC */
5539 1.48 msaitoh switch (adapter->hw.mac.type) {
5540 1.48 msaitoh case ixgbe_mac_X550:
5541 1.48 msaitoh case ixgbe_mac_X550EM_x:
5542 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5543 1.48 msaitoh reta_size = 128;
5544 1.48 msaitoh break;
5545 1.48 msaitoh default:
5546 1.48 msaitoh reta_size = 32;
5547 1.48 msaitoh break;
5548 1.48 msaitoh }
5549 1.48 msaitoh
5550 1.48 msaitoh /* Print out the redirection table */
5551 1.48 msaitoh sbuf_cat(buf, "\n");
5552 1.48 msaitoh for (int i = 0; i < reta_size; i++) {
5553 1.48 msaitoh if (i < 32) {
5554 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));
5555 1.48 msaitoh sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg);
5556 1.48 msaitoh } else {
5557 1.48 msaitoh reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));
5558 1.48 msaitoh sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg);
5559 1.48 msaitoh }
5560 1.48 msaitoh }
5561 1.48 msaitoh
5562 1.48 msaitoh // TODO: print more config
5563 1.48 msaitoh
5564 1.88.2.6 snj error = sbuf_finish(buf);
5565 1.88.2.6 snj if (error)
5566 1.88.2.6 snj device_printf(dev, "Error finishing sbuf: %d\n", error);
5567 1.88.2.6 snj
5568 1.88.2.6 snj sbuf_delete(buf);
5569 1.88.2.6 snj #endif
5570 1.88.2.6 snj return (0);
5571 1.88.2.6 snj } /* ixgbe_sysctl_print_rss_config */
5572 1.88.2.6 snj #endif /* IXGBE_DEBUG */
5573 1.88.2.6 snj
5574 1.88.2.6 snj /************************************************************************
5575 1.88.2.6 snj * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY
5576 1.88.2.6 snj *
5577 1.88.2.6 snj * For X552/X557-AT devices using an external PHY
5578 1.88.2.6 snj ************************************************************************/
5579 1.88.2.6 snj static int
5580 1.88.2.6 snj ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS)
5581 1.88.2.6 snj {
5582 1.88.2.6 snj struct sysctlnode node = *rnode;
5583 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5584 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5585 1.88.2.6 snj int val;
5586 1.88.2.6 snj u16 reg;
5587 1.88.2.6 snj int error;
5588 1.88.2.6 snj
5589 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5590 1.88.2.6 snj device_printf(adapter->dev,
5591 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5592 1.88.2.6 snj return (ENODEV);
5593 1.88.2.6 snj }
5594 1.88.2.6 snj
5595 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,
5596 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5597 1.88.2.6 snj device_printf(adapter->dev,
5598 1.88.2.6 snj "Error reading from PHY's current temperature register\n");
5599 1.88.2.6 snj return (EAGAIN);
5600 1.88.2.6 snj }
5601 1.88.2.6 snj
5602 1.88.2.6 snj node.sysctl_data = &val;
5603 1.88.2.6 snj
5604 1.88.2.6 snj /* Shift temp for output */
5605 1.88.2.6 snj val = reg >> 8;
5606 1.88.2.6 snj
5607 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5608 1.88.2.6 snj if ((error) || (newp == NULL))
5609 1.88.2.6 snj return (error);
5610 1.88.2.6 snj
5611 1.88.2.6 snj return (0);
5612 1.88.2.6 snj } /* ixgbe_sysctl_phy_temp */
5613 1.88.2.6 snj
5614 1.88.2.6 snj /************************************************************************
5615 1.88.2.6 snj * ixgbe_sysctl_phy_overtemp_occurred
5616 1.88.2.6 snj *
5617 1.88.2.6 snj * Reports (directly from the PHY) whether the current PHY
5618 1.88.2.6 snj * temperature is over the overtemp threshold.
5619 1.88.2.6 snj ************************************************************************/
5620 1.88.2.6 snj static int
5621 1.88.2.6 snj ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS)
5622 1.88.2.6 snj {
5623 1.88.2.6 snj struct sysctlnode node = *rnode;
5624 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5625 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
5626 1.88.2.6 snj int val, error;
5627 1.88.2.6 snj u16 reg;
5628 1.88.2.6 snj
5629 1.88.2.6 snj if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
5630 1.88.2.6 snj device_printf(adapter->dev,
5631 1.88.2.6 snj "Device has no supported external thermal sensor.\n");
5632 1.88.2.6 snj return (ENODEV);
5633 1.88.2.6 snj }
5634 1.88.2.6 snj
5635 1.88.2.6 snj if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,
5636 1.88.2.6 snj IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
5637 1.88.2.6 snj device_printf(adapter->dev,
5638 1.88.2.6 snj "Error reading from PHY's temperature status register\n");
5639 1.88.2.6 snj return (EAGAIN);
5640 1.88.2.6 snj }
5641 1.88.2.6 snj
5642 1.88.2.6 snj node.sysctl_data = &val;
5643 1.88.2.6 snj
5644 1.88.2.6 snj /* Get occurrence bit */
5645 1.88.2.6 snj val = !!(reg & 0x4000);
5646 1.88.2.6 snj
5647 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5648 1.88.2.6 snj if ((error) || (newp == NULL))
5649 1.88.2.6 snj return (error);
5650 1.48 msaitoh
5651 1.48 msaitoh return (0);
5652 1.88.2.6 snj } /* ixgbe_sysctl_phy_overtemp_occurred */
5653 1.48 msaitoh
5654 1.88.2.6 snj /************************************************************************
5655 1.88.2.6 snj * ixgbe_sysctl_eee_state
5656 1.88.2.6 snj *
5657 1.88.2.6 snj * Sysctl to set EEE power saving feature
5658 1.88.2.6 snj * Values:
5659 1.88.2.6 snj * 0 - disable EEE
5660 1.88.2.6 snj * 1 - enable EEE
5661 1.88.2.6 snj * (none) - get current device EEE state
5662 1.88.2.6 snj ************************************************************************/
5663 1.88.2.6 snj static int
5664 1.88.2.6 snj ixgbe_sysctl_eee_state(SYSCTLFN_ARGS)
5665 1.26 msaitoh {
5666 1.88.2.6 snj struct sysctlnode node = *rnode;
5667 1.88.2.6 snj struct adapter *adapter = (struct adapter *)node.sysctl_data;
5668 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
5669 1.88.2.6 snj device_t dev = adapter->dev;
5670 1.88.2.6 snj int curr_eee, new_eee, error = 0;
5671 1.88.2.6 snj s32 retval;
5672 1.26 msaitoh
5673 1.88.2.6 snj curr_eee = new_eee = !!(adapter->feat_en & IXGBE_FEATURE_EEE);
5674 1.88.2.6 snj node.sysctl_data = &new_eee;
5675 1.88.2.6 snj error = sysctl_lookup(SYSCTLFN_CALL(&node));
5676 1.88.2.6 snj if ((error) || (newp == NULL))
5677 1.88.2.6 snj return (error);
5678 1.26 msaitoh
5679 1.88.2.6 snj /* Nothing to do */
5680 1.88.2.6 snj if (new_eee == curr_eee)
5681 1.88.2.6 snj return (0);
5682 1.26 msaitoh
5683 1.88.2.6 snj /* Not supported */
5684 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_EEE))
5685 1.88.2.6 snj return (EINVAL);
5686 1.88.2.6 snj
5687 1.88.2.6 snj /* Bounds checking */
5688 1.88.2.6 snj if ((new_eee < 0) || (new_eee > 1))
5689 1.88.2.6 snj return (EINVAL);
5690 1.88.2.6 snj
5691 1.88.2.6 snj retval = adapter->hw.mac.ops.setup_eee(&adapter->hw, new_eee);
5692 1.88.2.6 snj if (retval) {
5693 1.88.2.6 snj device_printf(dev, "Error in EEE setup: 0x%08X\n", retval);
5694 1.88.2.6 snj return (EINVAL);
5695 1.45 msaitoh }
5696 1.45 msaitoh
5697 1.88.2.6 snj /* Restart auto-neg */
5698 1.88.2.15 martin ifp->if_init(ifp);
5699 1.63 msaitoh
5700 1.88.2.6 snj device_printf(dev, "New EEE state: %d\n", new_eee);
5701 1.88.2.6 snj
5702 1.88.2.6 snj /* Cache new value */
5703 1.88.2.6 snj if (new_eee)
5704 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5705 1.88.2.6 snj else
5706 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_EEE;
5707 1.88.2.6 snj
5708 1.88.2.6 snj return (error);
5709 1.88.2.6 snj } /* ixgbe_sysctl_eee_state */
5710 1.88.2.6 snj
5711 1.88.2.20 martin #define PRINTQS(adapter, regname) \
5712 1.88.2.20 martin do { \
5713 1.88.2.20 martin struct ixgbe_hw *_hw = &(adapter)->hw; \
5714 1.88.2.20 martin int _i; \
5715 1.88.2.20 martin \
5716 1.88.2.20 martin printf("%s: %s", device_xname((adapter)->dev), #regname); \
5717 1.88.2.20 martin for (_i = 0; _i < (adapter)->num_queues; _i++) { \
5718 1.88.2.20 martin printf((_i == 0) ? "\t" : " "); \
5719 1.88.2.20 martin printf("%08x", IXGBE_READ_REG(_hw, \
5720 1.88.2.20 martin IXGBE_##regname(_i))); \
5721 1.88.2.20 martin } \
5722 1.88.2.20 martin printf("\n"); \
5723 1.88.2.20 martin } while (0)
5724 1.88.2.20 martin
5725 1.88.2.20 martin /************************************************************************
5726 1.88.2.20 martin * ixgbe_print_debug_info
5727 1.88.2.20 martin *
5728 1.88.2.20 martin * Called only when em_display_debug_stats is enabled.
5729 1.88.2.20 martin * Provides a way to take a look at important statistics
5730 1.88.2.20 martin * maintained by the driver and hardware.
5731 1.88.2.20 martin ************************************************************************/
5732 1.88.2.20 martin static void
5733 1.88.2.20 martin ixgbe_print_debug_info(struct adapter *adapter)
5734 1.88.2.20 martin {
5735 1.88.2.20 martin device_t dev = adapter->dev;
5736 1.88.2.20 martin struct ixgbe_hw *hw = &adapter->hw;
5737 1.88.2.20 martin int table_size;
5738 1.88.2.20 martin int i;
5739 1.88.2.20 martin
5740 1.88.2.20 martin switch (adapter->hw.mac.type) {
5741 1.88.2.20 martin case ixgbe_mac_X550:
5742 1.88.2.20 martin case ixgbe_mac_X550EM_x:
5743 1.88.2.20 martin case ixgbe_mac_X550EM_a:
5744 1.88.2.20 martin table_size = 128;
5745 1.88.2.20 martin break;
5746 1.88.2.20 martin default:
5747 1.88.2.20 martin table_size = 32;
5748 1.88.2.20 martin break;
5749 1.88.2.20 martin }
5750 1.88.2.20 martin
5751 1.88.2.20 martin device_printf(dev, "[E]RETA:\n");
5752 1.88.2.20 martin for (i = 0; i < table_size; i++) {
5753 1.88.2.20 martin if (i < 32)
5754 1.88.2.20 martin printf("%02x: %08x\n", i, IXGBE_READ_REG(hw,
5755 1.88.2.20 martin IXGBE_RETA(i)));
5756 1.88.2.20 martin else
5757 1.88.2.20 martin printf("%02x: %08x\n", i, IXGBE_READ_REG(hw,
5758 1.88.2.20 martin IXGBE_ERETA(i - 32)));
5759 1.88.2.20 martin }
5760 1.88.2.20 martin
5761 1.88.2.20 martin device_printf(dev, "queue:");
5762 1.88.2.20 martin for (i = 0; i < adapter->num_queues; i++) {
5763 1.88.2.20 martin printf((i == 0) ? "\t" : " ");
5764 1.88.2.20 martin printf("%8d", i);
5765 1.88.2.20 martin }
5766 1.88.2.20 martin printf("\n");
5767 1.88.2.20 martin PRINTQS(adapter, RDBAL);
5768 1.88.2.20 martin PRINTQS(adapter, RDBAH);
5769 1.88.2.20 martin PRINTQS(adapter, RDLEN);
5770 1.88.2.20 martin PRINTQS(adapter, SRRCTL);
5771 1.88.2.20 martin PRINTQS(adapter, RDH);
5772 1.88.2.20 martin PRINTQS(adapter, RDT);
5773 1.88.2.20 martin PRINTQS(adapter, RXDCTL);
5774 1.88.2.20 martin
5775 1.88.2.20 martin device_printf(dev, "RQSMR:");
5776 1.88.2.20 martin for (i = 0; i < adapter->num_queues / 4; i++) {
5777 1.88.2.20 martin printf((i == 0) ? "\t" : " ");
5778 1.88.2.20 martin printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i)));
5779 1.88.2.20 martin }
5780 1.88.2.20 martin printf("\n");
5781 1.88.2.20 martin
5782 1.88.2.20 martin device_printf(dev, "disabled_count:");
5783 1.88.2.20 martin for (i = 0; i < adapter->num_queues; i++) {
5784 1.88.2.20 martin printf((i == 0) ? "\t" : " ");
5785 1.88.2.20 martin printf("%8d", adapter->queues[i].disabled_count);
5786 1.88.2.20 martin }
5787 1.88.2.20 martin printf("\n");
5788 1.88.2.20 martin
5789 1.88.2.20 martin device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS));
5790 1.88.2.20 martin if (hw->mac.type != ixgbe_mac_82598EB) {
5791 1.88.2.20 martin device_printf(dev, "EIMS_EX(0):\t%08x\n",
5792 1.88.2.20 martin IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0)));
5793 1.88.2.20 martin device_printf(dev, "EIMS_EX(1):\t%08x\n",
5794 1.88.2.20 martin IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1)));
5795 1.88.2.20 martin }
5796 1.88.2.20 martin } /* ixgbe_print_debug_info */
5797 1.88.2.20 martin
5798 1.88.2.20 martin /************************************************************************
5799 1.88.2.20 martin * ixgbe_sysctl_debug
5800 1.88.2.20 martin ************************************************************************/
5801 1.88.2.20 martin static int
5802 1.88.2.20 martin ixgbe_sysctl_debug(SYSCTLFN_ARGS)
5803 1.88.2.20 martin {
5804 1.88.2.20 martin struct sysctlnode node = *rnode;
5805 1.88.2.20 martin struct adapter *adapter = (struct adapter *)node.sysctl_data;
5806 1.88.2.20 martin int error, result = 0;
5807 1.88.2.20 martin
5808 1.88.2.20 martin node.sysctl_data = &result;
5809 1.88.2.20 martin error = sysctl_lookup(SYSCTLFN_CALL(&node));
5810 1.88.2.20 martin
5811 1.88.2.20 martin if (error || newp == NULL)
5812 1.88.2.20 martin return error;
5813 1.88.2.20 martin
5814 1.88.2.20 martin if (result == 1)
5815 1.88.2.20 martin ixgbe_print_debug_info(adapter);
5816 1.88.2.20 martin
5817 1.88.2.20 martin return 0;
5818 1.88.2.20 martin } /* ixgbe_sysctl_debug */
5819 1.88.2.20 martin
5820 1.88.2.6 snj /************************************************************************
5821 1.88.2.6 snj * ixgbe_init_device_features
5822 1.88.2.6 snj ************************************************************************/
5823 1.88.2.6 snj static void
5824 1.88.2.6 snj ixgbe_init_device_features(struct adapter *adapter)
5825 1.88.2.6 snj {
5826 1.88.2.6 snj adapter->feat_cap = IXGBE_FEATURE_NETMAP
5827 1.88.2.6 snj | IXGBE_FEATURE_RSS
5828 1.88.2.6 snj | IXGBE_FEATURE_MSI
5829 1.88.2.6 snj | IXGBE_FEATURE_MSIX
5830 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_IRQ
5831 1.88.2.6 snj | IXGBE_FEATURE_LEGACY_TX;
5832 1.88.2.6 snj
5833 1.88.2.6 snj /* Set capabilities first... */
5834 1.63 msaitoh switch (adapter->hw.mac.type) {
5835 1.63 msaitoh case ixgbe_mac_82598EB:
5836 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82598AT)
5837 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FAN_FAIL;
5838 1.63 msaitoh break;
5839 1.63 msaitoh case ixgbe_mac_X540:
5840 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5841 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5842 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&
5843 1.88.2.6 snj (adapter->hw.bus.func == 0))
5844 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5845 1.88.2.6 snj break;
5846 1.63 msaitoh case ixgbe_mac_X550:
5847 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5848 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5849 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5850 1.88.2.6 snj break;
5851 1.63 msaitoh case ixgbe_mac_X550EM_x:
5852 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5853 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5854 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)
5855 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5856 1.88.2.6 snj break;
5857 1.88.2.6 snj case ixgbe_mac_X550EM_a:
5858 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5859 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5860 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5861 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||
5862 1.88.2.6 snj (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {
5863 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
5864 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_EEE;
5865 1.88.2.6 snj }
5866 1.88.2.6 snj break;
5867 1.88.2.6 snj case ixgbe_mac_82599EB:
5868 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
5869 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_FDIR;
5870 1.88.2.6 snj if ((adapter->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&
5871 1.88.2.6 snj (adapter->hw.bus.func == 0))
5872 1.88.2.6 snj adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
5873 1.88.2.6 snj if (adapter->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)
5874 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
5875 1.63 msaitoh break;
5876 1.63 msaitoh default:
5877 1.63 msaitoh break;
5878 1.63 msaitoh }
5879 1.45 msaitoh
5880 1.88.2.6 snj /* Enabled by default... */
5881 1.88.2.6 snj /* Fan failure detection */
5882 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FAN_FAIL)
5883 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FAN_FAIL;
5884 1.88.2.6 snj /* Netmap */
5885 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_NETMAP)
5886 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_NETMAP;
5887 1.88.2.6 snj /* EEE */
5888 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_EEE)
5889 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_EEE;
5890 1.88.2.6 snj /* Thermal Sensor */
5891 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
5892 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
5893 1.88.2.6 snj
5894 1.88.2.6 snj /* Enabled via global sysctl... */
5895 1.88.2.6 snj /* Flow Director */
5896 1.88.2.6 snj if (ixgbe_enable_fdir) {
5897 1.88.2.6 snj if (adapter->feat_cap & IXGBE_FEATURE_FDIR)
5898 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_FDIR;
5899 1.88.2.6 snj else
5900 1.88.2.6 snj device_printf(adapter->dev, "Device does not support Flow Director. Leaving disabled.");
5901 1.88.2.6 snj }
5902 1.88.2.6 snj /* Legacy (single queue) transmit */
5903 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_LEGACY_TX) &&
5904 1.88.2.6 snj ixgbe_enable_legacy_tx)
5905 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_TX;
5906 1.88.2.6 snj /*
5907 1.88.2.6 snj * Message Signal Interrupts - Extended (MSI-X)
5908 1.88.2.6 snj * Normal MSI is only enabled if MSI-X calls fail.
5909 1.88.2.6 snj */
5910 1.88.2.6 snj if (!ixgbe_enable_msix)
5911 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_MSIX;
5912 1.88.2.6 snj /* Receive-Side Scaling (RSS) */
5913 1.88.2.6 snj if ((adapter->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss)
5914 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_RSS;
5915 1.88.2.6 snj
5916 1.88.2.6 snj /* Disable features with unmet dependencies... */
5917 1.88.2.6 snj /* No MSI-X */
5918 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX)) {
5919 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
5920 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
5921 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
5922 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
5923 1.88.2.6 snj }
5924 1.88.2.6 snj } /* ixgbe_init_device_features */
5925 1.45 msaitoh
5926 1.88.2.6 snj /************************************************************************
5927 1.88.2.6 snj * ixgbe_probe - Device identification routine
5928 1.88.2.6 snj *
5929 1.88.2.6 snj * Determines if the driver should be loaded on
5930 1.88.2.6 snj * adapter based on its PCI vendor/device ID.
5931 1.88.2.6 snj *
5932 1.88.2.6 snj * return BUS_PROBE_DEFAULT on success, positive on failure
5933 1.88.2.6 snj ************************************************************************/
5934 1.88.2.6 snj static int
5935 1.88.2.6 snj ixgbe_probe(device_t dev, cfdata_t cf, void *aux)
5936 1.45 msaitoh {
5937 1.88.2.6 snj const struct pci_attach_args *pa = aux;
5938 1.45 msaitoh
5939 1.88.2.6 snj return (ixgbe_lookup(pa) != NULL) ? 1 : 0;
5940 1.45 msaitoh }
5941 1.45 msaitoh
5942 1.88.2.20 martin static const ixgbe_vendor_info_t *
5943 1.88.2.6 snj ixgbe_lookup(const struct pci_attach_args *pa)
5944 1.45 msaitoh {
5945 1.88.2.20 martin const ixgbe_vendor_info_t *ent;
5946 1.88.2.6 snj pcireg_t subid;
5947 1.45 msaitoh
5948 1.88.2.6 snj INIT_DEBUGOUT("ixgbe_lookup: begin");
5949 1.45 msaitoh
5950 1.88.2.6 snj if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID)
5951 1.88.2.6 snj return NULL;
5952 1.45 msaitoh
5953 1.88.2.6 snj subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
5954 1.45 msaitoh
5955 1.88.2.6 snj for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) {
5956 1.88.2.6 snj if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) &&
5957 1.88.2.6 snj (PCI_PRODUCT(pa->pa_id) == ent->device_id) &&
5958 1.88.2.6 snj ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) ||
5959 1.88.2.6 snj (ent->subvendor_id == 0)) &&
5960 1.88.2.6 snj ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) ||
5961 1.88.2.6 snj (ent->subdevice_id == 0))) {
5962 1.88.2.6 snj return ent;
5963 1.88.2.6 snj }
5964 1.88.2.6 snj }
5965 1.88.2.6 snj return NULL;
5966 1.88.2.6 snj }
5967 1.45 msaitoh
5968 1.88.2.6 snj static int
5969 1.88.2.6 snj ixgbe_ifflags_cb(struct ethercom *ec)
5970 1.88.2.6 snj {
5971 1.88.2.6 snj struct ifnet *ifp = &ec->ec_if;
5972 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
5973 1.88.2.17 martin int change, rc = 0;
5974 1.45 msaitoh
5975 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
5976 1.45 msaitoh
5977 1.88.2.17 martin change = ifp->if_flags ^ adapter->if_flags;
5978 1.88.2.6 snj if (change != 0)
5979 1.88.2.6 snj adapter->if_flags = ifp->if_flags;
5980 1.45 msaitoh
5981 1.88.2.6 snj if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0)
5982 1.88.2.6 snj rc = ENETRESET;
5983 1.88.2.6 snj else if ((change & (IFF_PROMISC | IFF_ALLMULTI)) != 0)
5984 1.88.2.6 snj ixgbe_set_promisc(adapter);
5985 1.45 msaitoh
5986 1.88.2.6 snj /* Set up VLAN support and filter */
5987 1.88.2.6 snj ixgbe_setup_vlan_hw_support(adapter);
5988 1.45 msaitoh
5989 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
5990 1.45 msaitoh
5991 1.88.2.6 snj return rc;
5992 1.88.2.6 snj }
5993 1.45 msaitoh
5994 1.88.2.6 snj /************************************************************************
5995 1.88.2.6 snj * ixgbe_ioctl - Ioctl entry point
5996 1.88.2.6 snj *
5997 1.88.2.6 snj * Called when the user wants to configure the interface.
5998 1.88.2.6 snj *
5999 1.88.2.6 snj * return 0 on success, positive on failure
6000 1.88.2.6 snj ************************************************************************/
6001 1.88.2.6 snj static int
6002 1.88.2.6 snj ixgbe_ioctl(struct ifnet * ifp, u_long command, void *data)
6003 1.88.2.6 snj {
6004 1.88.2.6 snj struct adapter *adapter = ifp->if_softc;
6005 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
6006 1.88.2.6 snj struct ifcapreq *ifcr = data;
6007 1.88.2.6 snj struct ifreq *ifr = data;
6008 1.88.2.6 snj int error = 0;
6009 1.88.2.6 snj int l4csum_en;
6010 1.88.2.6 snj const int l4csum = IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx|
6011 1.88.2.6 snj IFCAP_CSUM_TCPv6_Rx|IFCAP_CSUM_UDPv6_Rx;
6012 1.45 msaitoh
6013 1.88.2.6 snj switch (command) {
6014 1.88.2.6 snj case SIOCSIFFLAGS:
6015 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)");
6016 1.88.2.6 snj break;
6017 1.88.2.6 snj case SIOCADDMULTI:
6018 1.88.2.6 snj case SIOCDELMULTI:
6019 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI");
6020 1.88.2.6 snj break;
6021 1.88.2.6 snj case SIOCSIFMEDIA:
6022 1.88.2.6 snj case SIOCGIFMEDIA:
6023 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)");
6024 1.88.2.6 snj break;
6025 1.88.2.6 snj case SIOCSIFCAP:
6026 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)");
6027 1.88.2.6 snj break;
6028 1.88.2.6 snj case SIOCSIFMTU:
6029 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
6030 1.88.2.6 snj break;
6031 1.88.2.6 snj #ifdef __NetBSD__
6032 1.88.2.6 snj case SIOCINITIFADDR:
6033 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR");
6034 1.88.2.6 snj break;
6035 1.88.2.6 snj case SIOCGIFFLAGS:
6036 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS");
6037 1.88.2.6 snj break;
6038 1.88.2.6 snj case SIOCGIFAFLAG_IN:
6039 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN");
6040 1.88.2.6 snj break;
6041 1.88.2.6 snj case SIOCGIFADDR:
6042 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR");
6043 1.88.2.6 snj break;
6044 1.88.2.6 snj case SIOCGIFMTU:
6045 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)");
6046 1.88.2.6 snj break;
6047 1.88.2.6 snj case SIOCGIFCAP:
6048 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)");
6049 1.88.2.6 snj break;
6050 1.88.2.6 snj case SIOCGETHERCAP:
6051 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)");
6052 1.88.2.6 snj break;
6053 1.88.2.6 snj case SIOCGLIFADDR:
6054 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)");
6055 1.88.2.6 snj break;
6056 1.88.2.6 snj case SIOCZIFDATA:
6057 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)");
6058 1.88.2.6 snj hw->mac.ops.clear_hw_cntrs(hw);
6059 1.88.2.6 snj ixgbe_clear_evcnt(adapter);
6060 1.45 msaitoh break;
6061 1.88.2.6 snj case SIOCAIFADDR:
6062 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)");
6063 1.88.2.6 snj break;
6064 1.88.2.6 snj #endif
6065 1.45 msaitoh default:
6066 1.88.2.6 snj IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command);
6067 1.88.2.6 snj break;
6068 1.88.2.6 snj }
6069 1.45 msaitoh
6070 1.88.2.6 snj switch (command) {
6071 1.88.2.6 snj case SIOCSIFMEDIA:
6072 1.88.2.6 snj case SIOCGIFMEDIA:
6073 1.88.2.6 snj return ifmedia_ioctl(ifp, ifr, &adapter->media, command);
6074 1.88.2.6 snj case SIOCGI2C:
6075 1.88.2.6 snj {
6076 1.88.2.6 snj struct ixgbe_i2c_req i2c;
6077 1.45 msaitoh
6078 1.88.2.6 snj IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)");
6079 1.88.2.6 snj error = copyin(ifr->ifr_data, &i2c, sizeof(i2c));
6080 1.88.2.6 snj if (error != 0)
6081 1.88.2.6 snj break;
6082 1.88.2.6 snj if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) {
6083 1.88.2.6 snj error = EINVAL;
6084 1.88.2.6 snj break;
6085 1.88.2.6 snj }
6086 1.88.2.6 snj if (i2c.len > sizeof(i2c.data)) {
6087 1.88.2.6 snj error = EINVAL;
6088 1.88.2.6 snj break;
6089 1.88.2.6 snj }
6090 1.88.2.6 snj
6091 1.88.2.6 snj hw->phy.ops.read_i2c_byte(hw, i2c.offset,
6092 1.88.2.6 snj i2c.dev_addr, i2c.data);
6093 1.88.2.6 snj error = copyout(&i2c, ifr->ifr_data, sizeof(i2c));
6094 1.88.2.6 snj break;
6095 1.88.2.6 snj }
6096 1.88.2.6 snj case SIOCSIFCAP:
6097 1.88.2.6 snj /* Layer-4 Rx checksum offload has to be turned on and
6098 1.88.2.6 snj * off as a unit.
6099 1.88.2.6 snj */
6100 1.88.2.6 snj l4csum_en = ifcr->ifcr_capenable & l4csum;
6101 1.88.2.6 snj if (l4csum_en != l4csum && l4csum_en != 0)
6102 1.88.2.6 snj return EINVAL;
6103 1.88.2.6 snj /*FALLTHROUGH*/
6104 1.88.2.6 snj case SIOCADDMULTI:
6105 1.88.2.6 snj case SIOCDELMULTI:
6106 1.88.2.6 snj case SIOCSIFFLAGS:
6107 1.88.2.6 snj case SIOCSIFMTU:
6108 1.88.2.6 snj default:
6109 1.88.2.6 snj if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
6110 1.88.2.6 snj return error;
6111 1.88.2.6 snj if ((ifp->if_flags & IFF_RUNNING) == 0)
6112 1.88.2.6 snj ;
6113 1.88.2.6 snj else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
6114 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
6115 1.88.2.15 martin if ((ifp->if_flags & IFF_RUNNING) != 0)
6116 1.88.2.15 martin ixgbe_init_locked(adapter);
6117 1.88.2.6 snj ixgbe_recalculate_max_frame(adapter);
6118 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
6119 1.88.2.6 snj } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
6120 1.88.2.6 snj /*
6121 1.88.2.6 snj * Multicast list has changed; set the hardware filter
6122 1.88.2.6 snj * accordingly.
6123 1.88.2.6 snj */
6124 1.88.2.6 snj IXGBE_CORE_LOCK(adapter);
6125 1.88.2.6 snj ixgbe_disable_intr(adapter);
6126 1.88.2.6 snj ixgbe_set_multi(adapter);
6127 1.88.2.6 snj ixgbe_enable_intr(adapter);
6128 1.88.2.6 snj IXGBE_CORE_UNLOCK(adapter);
6129 1.88.2.6 snj }
6130 1.88.2.6 snj return 0;
6131 1.45 msaitoh }
6132 1.45 msaitoh
6133 1.88.2.6 snj return error;
6134 1.88.2.6 snj } /* ixgbe_ioctl */
6135 1.45 msaitoh
6136 1.88.2.6 snj /************************************************************************
6137 1.88.2.6 snj * ixgbe_check_fan_failure
6138 1.88.2.6 snj ************************************************************************/
6139 1.45 msaitoh static void
6140 1.88.2.6 snj ixgbe_check_fan_failure(struct adapter *adapter, u32 reg, bool in_interrupt)
6141 1.45 msaitoh {
6142 1.88.2.6 snj u32 mask;
6143 1.45 msaitoh
6144 1.88.2.6 snj mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&adapter->hw) :
6145 1.88.2.6 snj IXGBE_ESDP_SDP1;
6146 1.45 msaitoh
6147 1.88.2.6 snj if (reg & mask)
6148 1.88.2.6 snj device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
6149 1.88.2.6 snj } /* ixgbe_check_fan_failure */
6150 1.88.2.6 snj
6151 1.88.2.6 snj /************************************************************************
6152 1.88.2.6 snj * ixgbe_handle_que
6153 1.88.2.6 snj ************************************************************************/
6154 1.45 msaitoh static void
6155 1.88.2.6 snj ixgbe_handle_que(void *context)
6156 1.45 msaitoh {
6157 1.88.2.6 snj struct ix_queue *que = context;
6158 1.88.2.6 snj struct adapter *adapter = que->adapter;
6159 1.88.2.6 snj struct tx_ring *txr = que->txr;
6160 1.88.2.6 snj struct ifnet *ifp = adapter->ifp;
6161 1.88.2.10 martin bool more = false;
6162 1.45 msaitoh
6163 1.88.2.13 martin que->handleq.ev_count++;
6164 1.45 msaitoh
6165 1.88.2.6 snj if (ifp->if_flags & IFF_RUNNING) {
6166 1.88.2.10 martin more = ixgbe_rxeof(que);
6167 1.88.2.6 snj IXGBE_TX_LOCK(txr);
6168 1.88.2.10 martin more |= ixgbe_txeof(txr);
6169 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
6170 1.88.2.6 snj if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
6171 1.88.2.6 snj ixgbe_mq_start_locked(ifp, txr);
6172 1.88.2.6 snj /* Only for queue 0 */
6173 1.88.2.6 snj /* NetBSD still needs this for CBQ */
6174 1.88.2.6 snj if ((&adapter->queues[0] == que)
6175 1.88.2.6 snj && (!ixgbe_legacy_ring_empty(ifp, NULL)))
6176 1.88.2.6 snj ixgbe_legacy_start_locked(ifp, txr);
6177 1.88.2.6 snj IXGBE_TX_UNLOCK(txr);
6178 1.45 msaitoh }
6179 1.45 msaitoh
6180 1.88.2.12 martin if (more) {
6181 1.88.2.13 martin que->req.ev_count++;
6182 1.88.2.13 martin ixgbe_sched_handle_que(adapter, que);
6183 1.88.2.12 martin } else if (que->res != NULL) {
6184 1.88.2.10 martin /* Re-enable this interrupt */
6185 1.88.2.6 snj ixgbe_enable_queue(adapter, que->msix);
6186 1.88.2.10 martin } else
6187 1.88.2.6 snj ixgbe_enable_intr(adapter);
6188 1.45 msaitoh
6189 1.45 msaitoh return;
6190 1.88.2.6 snj } /* ixgbe_handle_que */
6191 1.45 msaitoh
6192 1.88.2.6 snj /************************************************************************
6193 1.88.2.12 martin * ixgbe_handle_que_work
6194 1.88.2.12 martin ************************************************************************/
6195 1.88.2.12 martin static void
6196 1.88.2.12 martin ixgbe_handle_que_work(struct work *wk, void *context)
6197 1.88.2.12 martin {
6198 1.88.2.12 martin struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie);
6199 1.88.2.12 martin
6200 1.88.2.12 martin /*
6201 1.88.2.12 martin * "enqueued flag" is not required here.
6202 1.88.2.12 martin * See ixgbe_msix_que().
6203 1.88.2.12 martin */
6204 1.88.2.12 martin ixgbe_handle_que(que);
6205 1.88.2.12 martin }
6206 1.88.2.12 martin
6207 1.88.2.12 martin /************************************************************************
6208 1.88.2.6 snj * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler
6209 1.88.2.6 snj ************************************************************************/
6210 1.88.2.6 snj static int
6211 1.88.2.6 snj ixgbe_allocate_legacy(struct adapter *adapter,
6212 1.88.2.6 snj const struct pci_attach_args *pa)
6213 1.45 msaitoh {
6214 1.88.2.6 snj device_t dev = adapter->dev;
6215 1.88.2.6 snj struct ix_queue *que = adapter->queues;
6216 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
6217 1.88.2.6 snj int counts[PCI_INTR_TYPE_SIZE];
6218 1.88.2.6 snj pci_intr_type_t intr_type, max_type;
6219 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
6220 1.88.2.6 snj const char *intrstr = NULL;
6221 1.88.2.6 snj
6222 1.88.2.6 snj /* We allocate a single interrupt resource */
6223 1.88.2.6 snj max_type = PCI_INTR_TYPE_MSI;
6224 1.88.2.6 snj counts[PCI_INTR_TYPE_MSIX] = 0;
6225 1.88.2.6 snj counts[PCI_INTR_TYPE_MSI] =
6226 1.88.2.6 snj (adapter->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0;
6227 1.88.2.8 snj /* Check not feat_en but feat_cap to fallback to INTx */
6228 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] =
6229 1.88.2.8 snj (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0;
6230 1.45 msaitoh
6231 1.88.2.6 snj alloc_retry:
6232 1.88.2.6 snj if (pci_intr_alloc(pa, &adapter->osdep.intrs, counts, max_type) != 0) {
6233 1.88.2.6 snj aprint_error_dev(dev, "couldn't alloc interrupt\n");
6234 1.88.2.6 snj return ENXIO;
6235 1.45 msaitoh }
6236 1.88.2.6 snj adapter->osdep.nintrs = 1;
6237 1.88.2.6 snj intrstr = pci_intr_string(adapter->osdep.pc, adapter->osdep.intrs[0],
6238 1.88.2.6 snj intrbuf, sizeof(intrbuf));
6239 1.88.2.6 snj adapter->osdep.ihs[0] = pci_intr_establish_xname(adapter->osdep.pc,
6240 1.88.2.6 snj adapter->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que,
6241 1.88.2.6 snj device_xname(dev));
6242 1.88.2.8 snj intr_type = pci_intr_type(adapter->osdep.pc, adapter->osdep.intrs[0]);
6243 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
6244 1.88.2.6 snj aprint_error_dev(dev,"unable to establish %s\n",
6245 1.88.2.6 snj (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx");
6246 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
6247 1.88.2.8 snj adapter->osdep.intrs = NULL;
6248 1.88.2.6 snj switch (intr_type) {
6249 1.88.2.6 snj case PCI_INTR_TYPE_MSI:
6250 1.88.2.6 snj /* The next try is for INTx: Disable MSI */
6251 1.88.2.6 snj max_type = PCI_INTR_TYPE_INTX;
6252 1.88.2.6 snj counts[PCI_INTR_TYPE_INTX] = 1;
6253 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
6254 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) {
6255 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
6256 1.88.2.8 snj goto alloc_retry;
6257 1.88.2.8 snj } else
6258 1.88.2.8 snj break;
6259 1.88.2.6 snj case PCI_INTR_TYPE_INTX:
6260 1.88.2.6 snj default:
6261 1.88.2.6 snj /* See below */
6262 1.88.2.6 snj break;
6263 1.88.2.6 snj }
6264 1.45 msaitoh }
6265 1.88.2.8 snj if (intr_type == PCI_INTR_TYPE_INTX) {
6266 1.88.2.8 snj adapter->feat_en &= ~IXGBE_FEATURE_MSI;
6267 1.88.2.8 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
6268 1.88.2.8 snj }
6269 1.88.2.6 snj if (adapter->osdep.ihs[0] == NULL) {
6270 1.88.2.6 snj aprint_error_dev(dev,
6271 1.88.2.6 snj "couldn't establish interrupt%s%s\n",
6272 1.88.2.6 snj intrstr ? " at " : "", intrstr ? intrstr : "");
6273 1.88.2.6 snj pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs, 1);
6274 1.88.2.8 snj adapter->osdep.intrs = NULL;
6275 1.88.2.6 snj return ENXIO;
6276 1.88.2.6 snj }
6277 1.88.2.6 snj aprint_normal_dev(dev, "interrupting at %s\n", intrstr);
6278 1.88.2.6 snj /*
6279 1.88.2.6 snj * Try allocating a fast interrupt and the associated deferred
6280 1.88.2.6 snj * processing contexts.
6281 1.88.2.6 snj */
6282 1.88.2.6 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
6283 1.88.2.6 snj txr->txr_si =
6284 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6285 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
6286 1.88.2.6 snj que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6287 1.88.2.6 snj ixgbe_handle_que, que);
6288 1.45 msaitoh
6289 1.88.2.8 snj if ((!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)
6290 1.88.2.8 snj & (txr->txr_si == NULL)) || (que->que_si == NULL)) {
6291 1.88.2.6 snj aprint_error_dev(dev,
6292 1.88.2.6 snj "could not establish software interrupts\n");
6293 1.45 msaitoh
6294 1.88.2.6 snj return ENXIO;
6295 1.45 msaitoh }
6296 1.88.2.6 snj /* For simplicity in the handlers */
6297 1.88.2.6 snj adapter->active_queues = IXGBE_EIMS_ENABLE_MASK;
6298 1.45 msaitoh
6299 1.88.2.6 snj return (0);
6300 1.88.2.6 snj } /* ixgbe_allocate_legacy */
6301 1.45 msaitoh
6302 1.88.2.6 snj /************************************************************************
6303 1.88.2.6 snj * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers
6304 1.88.2.6 snj ************************************************************************/
6305 1.88.2.6 snj static int
6306 1.88.2.6 snj ixgbe_allocate_msix(struct adapter *adapter, const struct pci_attach_args *pa)
6307 1.88.2.6 snj {
6308 1.88.2.6 snj device_t dev = adapter->dev;
6309 1.88.2.6 snj struct ix_queue *que = adapter->queues;
6310 1.88.2.6 snj struct tx_ring *txr = adapter->tx_rings;
6311 1.88.2.6 snj pci_chipset_tag_t pc;
6312 1.88.2.6 snj char intrbuf[PCI_INTRSTR_LEN];
6313 1.88.2.6 snj char intr_xname[32];
6314 1.88.2.12 martin char wqname[MAXCOMLEN];
6315 1.88.2.6 snj const char *intrstr = NULL;
6316 1.88.2.6 snj int error, vector = 0;
6317 1.88.2.6 snj int cpu_id = 0;
6318 1.88.2.6 snj kcpuset_t *affinity;
6319 1.88.2.6 snj #ifdef RSS
6320 1.88.2.6 snj unsigned int rss_buckets = 0;
6321 1.88.2.6 snj kcpuset_t cpu_mask;
6322 1.88.2.6 snj #endif
6323 1.45 msaitoh
6324 1.88.2.6 snj pc = adapter->osdep.pc;
6325 1.88.2.6 snj #ifdef RSS
6326 1.45 msaitoh /*
6327 1.88.2.6 snj * If we're doing RSS, the number of queues needs to
6328 1.88.2.6 snj * match the number of RSS buckets that are configured.
6329 1.88.2.6 snj *
6330 1.88.2.6 snj * + If there's more queues than RSS buckets, we'll end
6331 1.88.2.6 snj * up with queues that get no traffic.
6332 1.88.2.6 snj *
6333 1.88.2.6 snj * + If there's more RSS buckets than queues, we'll end
6334 1.88.2.6 snj * up having multiple RSS buckets map to the same queue,
6335 1.88.2.6 snj * so there'll be some contention.
6336 1.45 msaitoh */
6337 1.88.2.6 snj rss_buckets = rss_getnumbuckets();
6338 1.88.2.6 snj if ((adapter->feat_en & IXGBE_FEATURE_RSS) &&
6339 1.88.2.6 snj (adapter->num_queues != rss_buckets)) {
6340 1.88.2.6 snj device_printf(dev,
6341 1.88.2.6 snj "%s: number of queues (%d) != number of RSS buckets (%d)"
6342 1.88.2.6 snj "; performance will be impacted.\n",
6343 1.88.2.6 snj __func__, adapter->num_queues, rss_buckets);
6344 1.45 msaitoh }
6345 1.88.2.6 snj #endif
6346 1.45 msaitoh
6347 1.88.2.6 snj adapter->osdep.nintrs = adapter->num_queues + 1;
6348 1.88.2.6 snj if (pci_msix_alloc_exact(pa, &adapter->osdep.intrs,
6349 1.88.2.6 snj adapter->osdep.nintrs) != 0) {
6350 1.88.2.6 snj aprint_error_dev(dev,
6351 1.88.2.6 snj "failed to allocate MSI-X interrupt\n");
6352 1.88.2.6 snj return (ENXIO);
6353 1.88.2.6 snj }
6354 1.45 msaitoh
6355 1.88.2.6 snj kcpuset_create(&affinity, false);
6356 1.88.2.6 snj for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) {
6357 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d",
6358 1.88.2.6 snj device_xname(dev), i);
6359 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[i], intrbuf,
6360 1.88.2.6 snj sizeof(intrbuf));
6361 1.88.2.6 snj #ifdef IXGBE_MPSAFE
6362 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[i], PCI_INTR_MPSAFE,
6363 1.88.2.6 snj true);
6364 1.88.2.6 snj #endif
6365 1.88.2.6 snj /* Set the handler function */
6366 1.88.2.6 snj que->res = adapter->osdep.ihs[i] = pci_intr_establish_xname(pc,
6367 1.88.2.6 snj adapter->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que,
6368 1.88.2.6 snj intr_xname);
6369 1.88.2.6 snj if (que->res == NULL) {
6370 1.88.2.6 snj aprint_error_dev(dev,
6371 1.88.2.6 snj "Failed to register QUE handler\n");
6372 1.88.2.8 snj error = ENXIO;
6373 1.88.2.8 snj goto err_out;
6374 1.88.2.6 snj }
6375 1.88.2.6 snj que->msix = vector;
6376 1.88.2.6 snj adapter->active_queues |= (u64)(1 << que->msix);
6377 1.45 msaitoh
6378 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS) {
6379 1.88.2.6 snj #ifdef RSS
6380 1.88.2.6 snj /*
6381 1.88.2.6 snj * The queue ID is used as the RSS layer bucket ID.
6382 1.88.2.6 snj * We look up the queue ID -> RSS CPU ID and select
6383 1.88.2.6 snj * that.
6384 1.88.2.6 snj */
6385 1.88.2.6 snj cpu_id = rss_getcpu(i % rss_getnumbuckets());
6386 1.88.2.6 snj CPU_SETOF(cpu_id, &cpu_mask);
6387 1.88.2.6 snj #endif
6388 1.88.2.6 snj } else {
6389 1.88.2.6 snj /*
6390 1.88.2.6 snj * Bind the MSI-X vector, and thus the
6391 1.88.2.6 snj * rings to the corresponding CPU.
6392 1.88.2.6 snj *
6393 1.88.2.6 snj * This just happens to match the default RSS
6394 1.88.2.6 snj * round-robin bucket -> queue -> CPU allocation.
6395 1.88.2.6 snj */
6396 1.88.2.6 snj if (adapter->num_queues > 1)
6397 1.88.2.6 snj cpu_id = i;
6398 1.88.2.6 snj }
6399 1.88.2.6 snj /* Round-robin affinity */
6400 1.88.2.6 snj kcpuset_zero(affinity);
6401 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
6402 1.88.2.6 snj error = interrupt_distribute(adapter->osdep.ihs[i], affinity,
6403 1.88.2.6 snj NULL);
6404 1.88.2.6 snj aprint_normal_dev(dev, "for TX/RX, interrupting at %s",
6405 1.88.2.6 snj intrstr);
6406 1.88.2.6 snj if (error == 0) {
6407 1.88.2.6 snj #if 1 /* def IXGBE_DEBUG */
6408 1.88.2.6 snj #ifdef RSS
6409 1.88.2.6 snj aprintf_normal(", bound RSS bucket %d to CPU %d", i,
6410 1.88.2.6 snj cpu_id % ncpu);
6411 1.88.2.6 snj #else
6412 1.88.2.6 snj aprint_normal(", bound queue %d to cpu %d", i,
6413 1.88.2.6 snj cpu_id % ncpu);
6414 1.88.2.6 snj #endif
6415 1.88.2.6 snj #endif /* IXGBE_DEBUG */
6416 1.88.2.6 snj }
6417 1.88.2.6 snj aprint_normal("\n");
6418 1.45 msaitoh
6419 1.88.2.8 snj if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
6420 1.88.2.6 snj txr->txr_si = softint_establish(
6421 1.88.2.6 snj SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6422 1.88.2.6 snj ixgbe_deferred_mq_start, txr);
6423 1.88.2.8 snj if (txr->txr_si == NULL) {
6424 1.88.2.8 snj aprint_error_dev(dev,
6425 1.88.2.8 snj "couldn't establish software interrupt\n");
6426 1.88.2.8 snj error = ENXIO;
6427 1.88.2.8 snj goto err_out;
6428 1.88.2.8 snj }
6429 1.88.2.8 snj }
6430 1.88.2.6 snj que->que_si
6431 1.88.2.6 snj = softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6432 1.88.2.6 snj ixgbe_handle_que, que);
6433 1.88.2.6 snj if (que->que_si == NULL) {
6434 1.88.2.6 snj aprint_error_dev(dev,
6435 1.88.2.8 snj "couldn't establish software interrupt\n");
6436 1.88.2.8 snj error = ENXIO;
6437 1.88.2.8 snj goto err_out;
6438 1.88.2.6 snj }
6439 1.45 msaitoh }
6440 1.88.2.12 martin snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev));
6441 1.88.2.12 martin error = workqueue_create(&adapter->txr_wq, wqname,
6442 1.88.2.12 martin ixgbe_deferred_mq_start_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
6443 1.88.2.12 martin IXGBE_WORKQUEUE_FLAGS);
6444 1.88.2.12 martin if (error) {
6445 1.88.2.12 martin aprint_error_dev(dev, "couldn't create workqueue for deferred Tx\n");
6446 1.88.2.12 martin goto err_out;
6447 1.88.2.12 martin }
6448 1.88.2.12 martin adapter->txr_wq_enqueued = percpu_alloc(sizeof(u_int));
6449 1.88.2.12 martin
6450 1.88.2.12 martin snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev));
6451 1.88.2.12 martin error = workqueue_create(&adapter->que_wq, wqname,
6452 1.88.2.12 martin ixgbe_handle_que_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
6453 1.88.2.12 martin IXGBE_WORKQUEUE_FLAGS);
6454 1.88.2.12 martin if (error) {
6455 1.88.2.12 martin aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n");
6456 1.88.2.12 martin goto err_out;
6457 1.88.2.12 martin }
6458 1.45 msaitoh
6459 1.88.2.6 snj /* and Link */
6460 1.88.2.6 snj cpu_id++;
6461 1.88.2.6 snj snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev));
6462 1.88.2.8 snj adapter->vector = vector;
6463 1.88.2.6 snj intrstr = pci_intr_string(pc, adapter->osdep.intrs[vector], intrbuf,
6464 1.88.2.6 snj sizeof(intrbuf));
6465 1.88.2.6 snj #ifdef IXGBE_MPSAFE
6466 1.88.2.6 snj pci_intr_setattr(pc, &adapter->osdep.intrs[vector], PCI_INTR_MPSAFE,
6467 1.88.2.6 snj true);
6468 1.88.2.6 snj #endif
6469 1.88.2.6 snj /* Set the link handler function */
6470 1.88.2.6 snj adapter->osdep.ihs[vector] = pci_intr_establish_xname(pc,
6471 1.88.2.6 snj adapter->osdep.intrs[vector], IPL_NET, ixgbe_msix_link, adapter,
6472 1.88.2.6 snj intr_xname);
6473 1.88.2.6 snj if (adapter->osdep.ihs[vector] == NULL) {
6474 1.88.2.6 snj aprint_error_dev(dev, "Failed to register LINK handler\n");
6475 1.88.2.8 snj error = ENXIO;
6476 1.88.2.8 snj goto err_out;
6477 1.45 msaitoh }
6478 1.88.2.6 snj /* Round-robin affinity */
6479 1.88.2.6 snj kcpuset_zero(affinity);
6480 1.88.2.6 snj kcpuset_set(affinity, cpu_id % ncpu);
6481 1.88.2.8 snj error = interrupt_distribute(adapter->osdep.ihs[vector], affinity,
6482 1.88.2.8 snj NULL);
6483 1.45 msaitoh
6484 1.88.2.6 snj aprint_normal_dev(dev,
6485 1.88.2.6 snj "for link, interrupting at %s", intrstr);
6486 1.88.2.6 snj if (error == 0)
6487 1.88.2.6 snj aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu);
6488 1.88.2.6 snj else
6489 1.88.2.6 snj aprint_normal("\n");
6490 1.45 msaitoh
6491 1.88.2.8 snj if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
6492 1.88.2.6 snj adapter->mbx_si =
6493 1.88.2.6 snj softint_establish(SOFTINT_NET | IXGBE_SOFTINFT_FLAGS,
6494 1.88.2.6 snj ixgbe_handle_mbx, adapter);
6495 1.88.2.8 snj if (adapter->mbx_si == NULL) {
6496 1.88.2.8 snj aprint_error_dev(dev,
6497 1.88.2.8 snj "could not establish software interrupts\n");
6498 1.88.2.8 snj
6499 1.88.2.8 snj error = ENXIO;
6500 1.88.2.8 snj goto err_out;
6501 1.88.2.8 snj }
6502 1.88.2.8 snj }
6503 1.45 msaitoh
6504 1.88.2.6 snj kcpuset_destroy(affinity);
6505 1.88.2.8 snj aprint_normal_dev(dev,
6506 1.88.2.8 snj "Using MSI-X interrupts with %d vectors\n", vector + 1);
6507 1.45 msaitoh
6508 1.88.2.6 snj return (0);
6509 1.88.2.8 snj
6510 1.88.2.8 snj err_out:
6511 1.88.2.8 snj kcpuset_destroy(affinity);
6512 1.88.2.8 snj ixgbe_free_softint(adapter);
6513 1.88.2.8 snj ixgbe_free_pciintr_resources(adapter);
6514 1.88.2.8 snj return (error);
6515 1.88.2.6 snj } /* ixgbe_allocate_msix */
6516 1.45 msaitoh
6517 1.88.2.6 snj /************************************************************************
6518 1.88.2.6 snj * ixgbe_configure_interrupts
6519 1.88.2.6 snj *
6520 1.88.2.6 snj * Setup MSI-X, MSI, or legacy interrupts (in that order).
6521 1.88.2.6 snj * This will also depend on user settings.
6522 1.88.2.6 snj ************************************************************************/
6523 1.88.2.6 snj static int
6524 1.88.2.6 snj ixgbe_configure_interrupts(struct adapter *adapter)
6525 1.45 msaitoh {
6526 1.88.2.6 snj device_t dev = adapter->dev;
6527 1.88.2.6 snj struct ixgbe_mac_info *mac = &adapter->hw.mac;
6528 1.88.2.6 snj int want, queues, msgs;
6529 1.45 msaitoh
6530 1.88.2.6 snj /* Default to 1 queue if MSI-X setup fails */
6531 1.88.2.6 snj adapter->num_queues = 1;
6532 1.45 msaitoh
6533 1.88.2.6 snj /* Override by tuneable */
6534 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX))
6535 1.88.2.6 snj goto msi;
6536 1.45 msaitoh
6537 1.88.2.8 snj /*
6538 1.88.2.8 snj * NetBSD only: Use single vector MSI when number of CPU is 1 to save
6539 1.88.2.8 snj * interrupt slot.
6540 1.88.2.8 snj */
6541 1.88.2.8 snj if (ncpu == 1)
6542 1.88.2.8 snj goto msi;
6543 1.88.2.8 snj
6544 1.88.2.6 snj /* First try MSI-X */
6545 1.88.2.6 snj msgs = pci_msix_count(adapter->osdep.pc, adapter->osdep.tag);
6546 1.88.2.6 snj msgs = MIN(msgs, IXG_MAX_NINTR);
6547 1.88.2.6 snj if (msgs < 2)
6548 1.88.2.6 snj goto msi;
6549 1.45 msaitoh
6550 1.88.2.6 snj adapter->msix_mem = (void *)1; /* XXX */
6551 1.45 msaitoh
6552 1.88.2.6 snj /* Figure out a reasonable auto config value */
6553 1.88.2.6 snj queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu;
6554 1.45 msaitoh
6555 1.88.2.6 snj #ifdef RSS
6556 1.88.2.6 snj /* If we're doing RSS, clamp at the number of RSS buckets */
6557 1.88.2.6 snj if (adapter->feat_en & IXGBE_FEATURE_RSS)
6558 1.88.2.6 snj queues = min(queues, rss_getnumbuckets());
6559 1.88.2.6 snj #endif
6560 1.88.2.6 snj if (ixgbe_num_queues > queues) {
6561 1.88.2.6 snj aprint_error_dev(adapter->dev, "ixgbe_num_queues (%d) is too large, using reduced amount (%d).\n", ixgbe_num_queues, queues);
6562 1.88.2.6 snj ixgbe_num_queues = queues;
6563 1.45 msaitoh }
6564 1.45 msaitoh
6565 1.88.2.6 snj if (ixgbe_num_queues != 0)
6566 1.88.2.6 snj queues = ixgbe_num_queues;
6567 1.88.2.6 snj else
6568 1.88.2.6 snj queues = min(queues,
6569 1.88.2.6 snj min(mac->max_tx_queues, mac->max_rx_queues));
6570 1.45 msaitoh
6571 1.88.2.6 snj /* reflect correct sysctl value */
6572 1.88.2.6 snj ixgbe_num_queues = queues;
6573 1.45 msaitoh
6574 1.88.2.6 snj /*
6575 1.88.2.6 snj * Want one vector (RX/TX pair) per queue
6576 1.88.2.6 snj * plus an additional for Link.
6577 1.88.2.6 snj */
6578 1.88.2.6 snj want = queues + 1;
6579 1.88.2.6 snj if (msgs >= want)
6580 1.88.2.6 snj msgs = want;
6581 1.88.2.6 snj else {
6582 1.88.2.6 snj aprint_error_dev(dev, "MSI-X Configuration Problem, "
6583 1.88.2.6 snj "%d vectors but %d queues wanted!\n",
6584 1.88.2.6 snj msgs, want);
6585 1.88.2.6 snj goto msi;
6586 1.45 msaitoh }
6587 1.88.2.6 snj adapter->num_queues = queues;
6588 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSIX;
6589 1.88.2.6 snj return (0);
6590 1.45 msaitoh
6591 1.88.2.6 snj /*
6592 1.88.2.6 snj * MSI-X allocation failed or provided us with
6593 1.88.2.6 snj * less vectors than needed. Free MSI-X resources
6594 1.88.2.6 snj * and we'll try enabling MSI.
6595 1.88.2.6 snj */
6596 1.88.2.6 snj msi:
6597 1.88.2.6 snj /* Without MSI-X, some features are no longer supported */
6598 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
6599 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_RSS;
6600 1.88.2.6 snj adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
6601 1.88.2.6 snj adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
6602 1.45 msaitoh
6603 1.88.2.6 snj msgs = pci_msi_count(adapter->osdep.pc, adapter->osdep.tag);
6604 1.88.2.6 snj adapter->msix_mem = NULL; /* XXX */
6605 1.88.2.6 snj if (msgs > 1)
6606 1.88.2.6 snj msgs = 1;
6607 1.88.2.6 snj if (msgs != 0) {
6608 1.88.2.6 snj msgs = 1;
6609 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_MSI;
6610 1.88.2.6 snj return (0);
6611 1.45 msaitoh }
6612 1.45 msaitoh
6613 1.88.2.6 snj if (!(adapter->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) {
6614 1.88.2.6 snj aprint_error_dev(dev,
6615 1.88.2.6 snj "Device does not support legacy interrupts.\n");
6616 1.88.2.6 snj return 1;
6617 1.45 msaitoh }
6618 1.45 msaitoh
6619 1.88.2.6 snj adapter->feat_en |= IXGBE_FEATURE_LEGACY_IRQ;
6620 1.45 msaitoh
6621 1.45 msaitoh return (0);
6622 1.88.2.6 snj } /* ixgbe_configure_interrupts */
6623 1.45 msaitoh
6624 1.45 msaitoh
6625 1.88.2.6 snj /************************************************************************
6626 1.88.2.6 snj * ixgbe_handle_link - Tasklet for MSI-X Link interrupts
6627 1.88.2.6 snj *
6628 1.88.2.6 snj * Done outside of interrupt context since the driver might sleep
6629 1.88.2.6 snj ************************************************************************/
6630 1.45 msaitoh static void
6631 1.88.2.6 snj ixgbe_handle_link(void *context)
6632 1.45 msaitoh {
6633 1.88.2.6 snj struct adapter *adapter = context;
6634 1.88.2.6 snj struct ixgbe_hw *hw = &adapter->hw;
6635 1.45 msaitoh
6636 1.88.2.15 martin IXGBE_CORE_LOCK(adapter);
6637 1.88.2.15 martin ++adapter->link_sicount.ev_count;
6638 1.88.2.6 snj ixgbe_check_link(hw, &adapter->link_speed, &adapter->link_up, 0);
6639 1.88.2.6 snj ixgbe_update_link_status(adapter);
6640 1.45 msaitoh
6641 1.88.2.6 snj /* Re-enable link interrupts */
6642 1.88.2.6 snj IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC);
6643 1.88.2.15 martin
6644 1.88.2.15 martin IXGBE_CORE_UNLOCK(adapter);
6645 1.88.2.6 snj } /* ixgbe_handle_link */
6646 1.45 msaitoh
6647 1.88.2.6 snj /************************************************************************
6648 1.88.2.6 snj * ixgbe_rearm_queues
6649 1.88.2.6 snj ************************************************************************/
6650 1.88.2.20 martin static __inline void
6651 1.88.2.6 snj ixgbe_rearm_queues(struct adapter *adapter, u64 queues)
6652 1.45 msaitoh {
6653 1.88.2.6 snj u32 mask;
6654 1.45 msaitoh
6655 1.88.2.6 snj switch (adapter->hw.mac.type) {
6656 1.88.2.6 snj case ixgbe_mac_82598EB:
6657 1.88.2.6 snj mask = (IXGBE_EIMS_RTX_QUEUE & queues);
6658 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
6659 1.45 msaitoh break;
6660 1.88.2.6 snj case ixgbe_mac_82599EB:
6661 1.88.2.6 snj case ixgbe_mac_X540:
6662 1.88.2.6 snj case ixgbe_mac_X550:
6663 1.88.2.6 snj case ixgbe_mac_X550EM_x:
6664 1.88.2.6 snj case ixgbe_mac_X550EM_a:
6665 1.88.2.6 snj mask = (queues & 0xFFFFFFFF);
6666 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
6667 1.88.2.6 snj mask = (queues >> 32);
6668 1.88.2.6 snj IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
6669 1.45 msaitoh break;
6670 1.45 msaitoh default:
6671 1.45 msaitoh break;
6672 1.45 msaitoh }
6673 1.88.2.6 snj } /* ixgbe_rearm_queues */
6674