ixgbe.c revision 1.334
1 /* $NetBSD: ixgbe.c,v 1.334 2023/10/06 14:40:06 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.334 2023/10/06 14:40:06 msaitoh Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus with a max of 8. This 362 * can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = PERFORM_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = PERFORM_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_MPSAFE 1 416 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 417 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 418 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 419 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 420 #else 421 #define IXGBE_CALLOUT_FLAGS 0 422 #define IXGBE_SOFTINT_FLAGS 0 423 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 424 #define IXGBE_TASKLET_WQ_FLAGS 0 425 #endif 426 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 427 428 /* Interval between reports of errors */ 429 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 430 431 /************************************************************************ 432 * ixgbe_initialize_rss_mapping 433 ************************************************************************/ 434 static void 435 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 436 { 437 struct ixgbe_hw *hw = &sc->hw; 438 u32 reta = 0, mrqc, rss_key[10]; 439 int queue_id, table_size, index_mult; 440 int i, j; 441 u32 rss_hash_config; 442 443 /* force use default RSS key. */ 444 #ifdef __NetBSD__ 445 rss_getkey((uint8_t *) &rss_key); 446 #else 447 if (sc->feat_en & IXGBE_FEATURE_RSS) { 448 /* Fetch the configured RSS key */ 449 rss_getkey((uint8_t *) &rss_key); 450 } else { 451 /* set up random bits */ 452 cprng_fast(&rss_key, sizeof(rss_key)); 453 } 454 #endif 455 456 /* Set multiplier for RETA setup and table size based on MAC */ 457 index_mult = 0x1; 458 table_size = 128; 459 switch (sc->hw.mac.type) { 460 case ixgbe_mac_82598EB: 461 index_mult = 0x11; 462 break; 463 case ixgbe_mac_X550: 464 case ixgbe_mac_X550EM_x: 465 case ixgbe_mac_X550EM_a: 466 table_size = 512; 467 break; 468 default: 469 break; 470 } 471 472 /* Set up the redirection table */ 473 for (i = 0, j = 0; i < table_size; i++, j++) { 474 if (j == sc->num_queues) 475 j = 0; 476 477 if (sc->feat_en & IXGBE_FEATURE_RSS) { 478 /* 479 * Fetch the RSS bucket id for the given indirection 480 * entry. Cap it at the number of configured buckets 481 * (which is num_queues.) 482 */ 483 queue_id = rss_get_indirection_to_bucket(i); 484 queue_id = queue_id % sc->num_queues; 485 } else 486 queue_id = (j * index_mult); 487 488 /* 489 * The low 8 bits are for hash value (n+0); 490 * The next 8 bits are for hash value (n+1), etc. 491 */ 492 reta = reta >> 8; 493 reta = reta | (((uint32_t) queue_id) << 24); 494 if ((i & 3) == 3) { 495 if (i < 128) 496 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 497 else 498 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 499 reta); 500 reta = 0; 501 } 502 } 503 504 /* Now fill our hash function seeds */ 505 for (i = 0; i < 10; i++) 506 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 507 508 /* Perform hash on these packet types */ 509 if (sc->feat_en & IXGBE_FEATURE_RSS) 510 rss_hash_config = rss_gethashconfig(); 511 else { 512 /* 513 * Disable UDP - IP fragments aren't currently being handled 514 * and so we end up with a mix of 2-tuple and 4-tuple 515 * traffic. 516 */ 517 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 518 | RSS_HASHTYPE_RSS_TCP_IPV4 519 | RSS_HASHTYPE_RSS_IPV6 520 | RSS_HASHTYPE_RSS_TCP_IPV6 521 | RSS_HASHTYPE_RSS_IPV6_EX 522 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 523 } 524 525 mrqc = IXGBE_MRQC_RSSEN; 526 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 527 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 528 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 529 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 530 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 531 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 532 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 533 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 534 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 535 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 536 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 537 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 538 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 539 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 540 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 541 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 542 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 543 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 544 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 545 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 546 } /* ixgbe_initialize_rss_mapping */ 547 548 /************************************************************************ 549 * ixgbe_initialize_receive_units - Setup receive registers and features. 550 ************************************************************************/ 551 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 552 553 static void 554 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 555 { 556 struct rx_ring *rxr = sc->rx_rings; 557 struct ixgbe_hw *hw = &sc->hw; 558 struct ifnet *ifp = sc->ifp; 559 int i, j; 560 u32 bufsz, fctrl, srrctl, rxcsum; 561 u32 hlreg; 562 563 /* 564 * Make sure receives are disabled while 565 * setting up the descriptor ring 566 */ 567 ixgbe_disable_rx(hw); 568 569 /* Enable broadcasts */ 570 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 571 fctrl |= IXGBE_FCTRL_BAM; 572 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 573 fctrl |= IXGBE_FCTRL_DPF; 574 fctrl |= IXGBE_FCTRL_PMCF; 575 } 576 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 577 578 /* Set for Jumbo Frames? */ 579 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 580 if (ifp->if_mtu > ETHERMTU) 581 hlreg |= IXGBE_HLREG0_JUMBOEN; 582 else 583 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 584 585 #ifdef DEV_NETMAP 586 /* CRC stripping is conditional in Netmap */ 587 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 588 (ifp->if_capenable & IFCAP_NETMAP) && 589 !ix_crcstrip) 590 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 591 else 592 #endif /* DEV_NETMAP */ 593 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 594 595 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 596 597 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 598 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 599 600 for (i = 0; i < sc->num_queues; i++, rxr++) { 601 u64 rdba = rxr->rxdma.dma_paddr; 602 u32 reg; 603 int regnum = i / 4; /* 1 register per 4 queues */ 604 int regshift = i % 4; /* 4 bits per 1 queue */ 605 j = rxr->me; 606 607 /* Setup the Base and Length of the Rx Descriptor Ring */ 608 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 609 (rdba & 0x00000000ffffffffULL)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 611 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 612 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 613 614 /* Set up the SRRCTL register */ 615 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 616 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 617 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 618 srrctl |= bufsz; 619 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 620 621 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 622 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 623 reg &= ~(0x000000ffUL << (regshift * 8)); 624 reg |= i << (regshift * 8); 625 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 626 627 /* 628 * Set DROP_EN iff we have no flow control and >1 queue. 629 * Note that srrctl was cleared shortly before during reset, 630 * so we do not need to clear the bit, but do it just in case 631 * this code is moved elsewhere. 632 */ 633 if ((sc->num_queues > 1) && 634 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 635 srrctl |= IXGBE_SRRCTL_DROP_EN; 636 else 637 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 638 639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 640 641 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 642 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 643 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 644 645 /* Set the driver rx tail address */ 646 rxr->tail = IXGBE_RDT(rxr->me); 647 } 648 649 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 650 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 651 | IXGBE_PSRTYPE_UDPHDR 652 | IXGBE_PSRTYPE_IPV4HDR 653 | IXGBE_PSRTYPE_IPV6HDR; 654 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 655 } 656 657 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 658 659 ixgbe_initialize_rss_mapping(sc); 660 661 if (sc->num_queues > 1) { 662 /* RSS and RX IPP Checksum are mutually exclusive */ 663 rxcsum |= IXGBE_RXCSUM_PCSD; 664 } 665 666 if (ifp->if_capenable & IFCAP_RXCSUM) 667 rxcsum |= IXGBE_RXCSUM_PCSD; 668 669 /* This is useful for calculating UDP/IP fragment checksums */ 670 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 671 rxcsum |= IXGBE_RXCSUM_IPPCSE; 672 673 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 674 675 } /* ixgbe_initialize_receive_units */ 676 677 /************************************************************************ 678 * ixgbe_initialize_transmit_units - Enable transmit units. 679 ************************************************************************/ 680 static void 681 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 682 { 683 struct tx_ring *txr = sc->tx_rings; 684 struct ixgbe_hw *hw = &sc->hw; 685 int i; 686 687 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 688 689 /* Setup the Base and Length of the Tx Descriptor Ring */ 690 for (i = 0; i < sc->num_queues; i++, txr++) { 691 u64 tdba = txr->txdma.dma_paddr; 692 u32 txctrl = 0; 693 u32 tqsmreg, reg; 694 int regnum = i / 4; /* 1 register per 4 queues */ 695 int regshift = i % 4; /* 4 bits per 1 queue */ 696 int j = txr->me; 697 698 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 699 (tdba & 0x00000000ffffffffULL)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 701 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 702 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 703 704 /* 705 * Set TQSMR (Transmit Queue Statistic Mapping) register. 706 * Register location is different between 82598 and others. 707 */ 708 if (sc->hw.mac.type == ixgbe_mac_82598EB) 709 tqsmreg = IXGBE_TQSMR(regnum); 710 else 711 tqsmreg = IXGBE_TQSM(regnum); 712 reg = IXGBE_READ_REG(hw, tqsmreg); 713 reg &= ~(0x000000ffUL << (regshift * 8)); 714 reg |= i << (regshift * 8); 715 IXGBE_WRITE_REG(hw, tqsmreg, reg); 716 717 /* Setup the HW Tx Head and Tail descriptor pointers */ 718 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 719 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 720 721 /* Cache the tail address */ 722 txr->tail = IXGBE_TDT(j); 723 724 txr->txr_no_space = false; 725 726 /* Disable Head Writeback */ 727 /* 728 * Note: for X550 series devices, these registers are actually 729 * prefixed with TPH_ instead of DCA_, but the addresses and 730 * fields remain the same. 731 */ 732 switch (hw->mac.type) { 733 case ixgbe_mac_82598EB: 734 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 735 break; 736 default: 737 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 738 break; 739 } 740 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 741 switch (hw->mac.type) { 742 case ixgbe_mac_82598EB: 743 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 744 break; 745 default: 746 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 747 break; 748 } 749 750 } 751 752 if (hw->mac.type != ixgbe_mac_82598EB) { 753 u32 dmatxctl, rttdcs; 754 755 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 756 dmatxctl |= IXGBE_DMATXCTL_TE; 757 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 758 /* Disable arbiter to set MTQC */ 759 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 760 rttdcs |= IXGBE_RTTDCS_ARBDIS; 761 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 762 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 763 ixgbe_get_mtqc(sc->iov_mode)); 764 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 765 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 766 } 767 768 return; 769 } /* ixgbe_initialize_transmit_units */ 770 771 static void 772 ixgbe_quirks(struct ixgbe_softc *sc) 773 { 774 device_t dev = sc->dev; 775 struct ixgbe_hw *hw = &sc->hw; 776 const char *vendor, *product; 777 778 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 779 /* 780 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 781 * MA10-ST0. 782 */ 783 vendor = pmf_get_platform("system-vendor"); 784 product = pmf_get_platform("system-product"); 785 786 if ((vendor == NULL) || (product == NULL)) 787 return; 788 789 if ((strcmp(vendor, "GIGABYTE") == 0) && 790 (strcmp(product, "MA10-ST0") == 0)) { 791 aprint_verbose_dev(dev, 792 "Enable SFP+ MOD_ABS inverse quirk\n"); 793 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 794 } 795 } 796 } 797 798 /************************************************************************ 799 * ixgbe_attach - Device initialization routine 800 * 801 * Called when the driver is being loaded. 802 * Identifies the type of hardware, allocates all resources 803 * and initializes the hardware. 804 * 805 * return 0 on success, positive on failure 806 ************************************************************************/ 807 static void 808 ixgbe_attach(device_t parent, device_t dev, void *aux) 809 { 810 struct ixgbe_softc *sc; 811 struct ixgbe_hw *hw; 812 int error = -1; 813 u32 ctrl_ext; 814 u16 high, low, nvmreg; 815 pcireg_t id, subid; 816 const ixgbe_vendor_info_t *ent; 817 struct pci_attach_args *pa = aux; 818 bool unsupported_sfp = false; 819 const char *str; 820 char wqname[MAXCOMLEN]; 821 char buf[256]; 822 823 INIT_DEBUGOUT("ixgbe_attach: begin"); 824 825 /* Allocate, clear, and link in our adapter structure */ 826 sc = device_private(dev); 827 sc->hw.back = sc; 828 sc->dev = dev; 829 hw = &sc->hw; 830 sc->osdep.pc = pa->pa_pc; 831 sc->osdep.tag = pa->pa_tag; 832 if (pci_dma64_available(pa)) 833 sc->osdep.dmat = pa->pa_dmat64; 834 else 835 sc->osdep.dmat = pa->pa_dmat; 836 sc->osdep.attached = false; 837 sc->osdep.detaching = false; 838 839 ent = ixgbe_lookup(pa); 840 841 KASSERT(ent != NULL); 842 843 aprint_normal(": %s, Version - %s\n", 844 ixgbe_strings[ent->index], ixgbe_driver_version); 845 846 /* Core Lock Init */ 847 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 848 849 /* Set up the timer callout and workqueue */ 850 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 851 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 852 error = workqueue_create(&sc->timer_wq, wqname, 853 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 854 IXGBE_TASKLET_WQ_FLAGS); 855 if (error) { 856 aprint_error_dev(dev, 857 "could not create timer workqueue (%d)\n", error); 858 goto err_out; 859 } 860 861 /* Determine hardware revision */ 862 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 863 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 864 865 hw->vendor_id = PCI_VENDOR(id); 866 hw->device_id = PCI_PRODUCT(id); 867 hw->revision_id = 868 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 869 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 870 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 871 872 /* Set quirk flags */ 873 ixgbe_quirks(sc); 874 875 /* 876 * Make sure BUSMASTER is set 877 */ 878 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 879 880 /* Do base PCI setup - map BAR0 */ 881 if (ixgbe_allocate_pci_resources(sc, pa)) { 882 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 883 error = ENXIO; 884 goto err_out; 885 } 886 887 /* let hardware know driver is loaded */ 888 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 889 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 890 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 891 892 /* 893 * Initialize the shared code 894 */ 895 if (ixgbe_init_shared_code(hw) != 0) { 896 aprint_error_dev(dev, 897 "Unable to initialize the shared code\n"); 898 error = ENXIO; 899 goto err_out; 900 } 901 902 switch (hw->mac.type) { 903 case ixgbe_mac_82598EB: 904 str = "82598EB"; 905 break; 906 case ixgbe_mac_82599EB: 907 str = "82599EB"; 908 break; 909 case ixgbe_mac_X540: 910 str = "X540"; 911 break; 912 case ixgbe_mac_X550: 913 str = "X550"; 914 break; 915 case ixgbe_mac_X550EM_x: 916 str = "X550EM X"; 917 break; 918 case ixgbe_mac_X550EM_a: 919 str = "X550EM A"; 920 break; 921 default: 922 str = "Unknown"; 923 break; 924 } 925 aprint_normal_dev(dev, "device %s\n", str); 926 927 hw->allow_unsupported_sfp = allow_unsupported_sfp; 928 929 /* Pick up the 82599 settings */ 930 if (hw->mac.type != ixgbe_mac_82598EB) 931 hw->phy.smart_speed = ixgbe_smart_speed; 932 933 /* Set the right number of segments */ 934 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 935 sc->num_segs = IXGBE_SCATTER_DEFAULT; 936 937 /* Ensure SW/FW semaphore is free */ 938 ixgbe_init_swfw_semaphore(hw); 939 940 hw->mac.ops.set_lan_id(hw); 941 ixgbe_init_device_features(sc); 942 943 if (ixgbe_configure_interrupts(sc)) { 944 error = ENXIO; 945 goto err_out; 946 } 947 948 /* Allocate multicast array memory. */ 949 sc->mta = malloc(sizeof(*sc->mta) * 950 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 951 952 /* Enable WoL (if supported) */ 953 ixgbe_check_wol_support(sc); 954 955 /* Register for VLAN events */ 956 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 957 958 /* Verify adapter fan is still functional (if applicable) */ 959 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 960 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 961 ixgbe_check_fan_failure(sc, esdp, FALSE); 962 } 963 964 /* Set an initial default flow control value */ 965 hw->fc.requested_mode = ixgbe_flow_control; 966 967 /* Do descriptor calc and sanity checks */ 968 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 969 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 970 aprint_error_dev(dev, "TXD config issue, using default!\n"); 971 sc->num_tx_desc = DEFAULT_TXD; 972 } else 973 sc->num_tx_desc = ixgbe_txd; 974 975 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 976 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 977 aprint_error_dev(dev, "RXD config issue, using default!\n"); 978 sc->num_rx_desc = DEFAULT_RXD; 979 } else 980 sc->num_rx_desc = ixgbe_rxd; 981 982 /* Sysctls for limiting the amount of work done in the taskqueues */ 983 sc->rx_process_limit 984 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 985 ? ixgbe_rx_process_limit : sc->num_rx_desc; 986 sc->tx_process_limit 987 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 988 ? ixgbe_tx_process_limit : sc->num_tx_desc; 989 990 /* Set default high limit of copying mbuf in rxeof */ 991 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 992 993 /* Allocate our TX/RX Queues */ 994 if (ixgbe_allocate_queues(sc)) { 995 error = ENOMEM; 996 goto err_out; 997 } 998 999 hw->phy.reset_if_overtemp = TRUE; 1000 error = ixgbe_reset_hw(hw); 1001 hw->phy.reset_if_overtemp = FALSE; 1002 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1003 error = IXGBE_SUCCESS; 1004 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1005 aprint_error_dev(dev, 1006 "Unsupported SFP+ module type was detected.\n"); 1007 unsupported_sfp = true; 1008 error = IXGBE_SUCCESS; 1009 } else if (error) { 1010 aprint_error_dev(dev, 1011 "Hardware initialization failed(error = %d)\n", error); 1012 error = EIO; 1013 goto err_late; 1014 } 1015 1016 /* Make sure we have a good EEPROM before we read from it */ 1017 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1018 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1019 error = EIO; 1020 goto err_late; 1021 } 1022 1023 aprint_normal("%s:", device_xname(dev)); 1024 /* NVM Image Version */ 1025 high = low = 0; 1026 switch (hw->mac.type) { 1027 case ixgbe_mac_82598EB: 1028 /* 1029 * Print version from the dev starter version (0x29). The 1030 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1031 */ 1032 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1033 if (nvmreg == 0xffff) 1034 break; 1035 high = (nvmreg >> 12) & 0x0f; 1036 low = (nvmreg >> 4) & 0xff; 1037 id = nvmreg & 0x0f; 1038 /* 1039 * The following output might not be correct. Some 82598 cards 1040 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1041 */ 1042 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1043 break; 1044 case ixgbe_mac_X540: 1045 case ixgbe_mac_X550EM_a: 1046 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1047 if (nvmreg == 0xffff) 1048 break; 1049 high = (nvmreg >> 12) & 0x0f; 1050 low = (nvmreg >> 4) & 0xff; 1051 id = nvmreg & 0x0f; 1052 aprint_normal(" NVM Image Version %u.", high); 1053 if (hw->mac.type == ixgbe_mac_X540) 1054 str = "%x"; 1055 else 1056 str = "%02x"; 1057 aprint_normal(str, low); 1058 aprint_normal(" ID 0x%x,", id); 1059 break; 1060 case ixgbe_mac_X550EM_x: 1061 case ixgbe_mac_X550: 1062 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1063 if (nvmreg == 0xffff) 1064 break; 1065 high = (nvmreg >> 12) & 0x0f; 1066 low = nvmreg & 0xff; 1067 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1068 break; 1069 default: 1070 break; 1071 } 1072 hw->eeprom.nvm_image_ver_high = high; 1073 hw->eeprom.nvm_image_ver_low = low; 1074 1075 /* PHY firmware revision */ 1076 switch (hw->mac.type) { 1077 case ixgbe_mac_X540: 1078 case ixgbe_mac_X550: 1079 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1080 if (nvmreg == 0xffff) 1081 break; 1082 high = (nvmreg >> 12) & 0x0f; 1083 low = (nvmreg >> 4) & 0xff; 1084 id = nvmreg & 0x000f; 1085 aprint_normal(" PHY FW Revision %u.", high); 1086 if (hw->mac.type == ixgbe_mac_X540) 1087 str = "%x"; 1088 else 1089 str = "%02x"; 1090 aprint_normal(str, low); 1091 aprint_normal(" ID 0x%x,", id); 1092 break; 1093 default: 1094 break; 1095 } 1096 1097 /* NVM Map version & OEM NVM Image version */ 1098 switch (hw->mac.type) { 1099 case ixgbe_mac_X550: 1100 case ixgbe_mac_X550EM_x: 1101 case ixgbe_mac_X550EM_a: 1102 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1103 if (nvmreg != 0xffff) { 1104 high = (nvmreg >> 12) & 0x0f; 1105 low = nvmreg & 0x00ff; 1106 aprint_normal(" NVM Map version %u.%02x,", high, low); 1107 } 1108 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1109 if (nvmreg != 0xffff) { 1110 high = (nvmreg >> 12) & 0x0f; 1111 low = nvmreg & 0x00ff; 1112 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1113 low); 1114 } 1115 break; 1116 default: 1117 break; 1118 } 1119 1120 /* Print the ETrackID */ 1121 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1122 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1123 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1124 1125 /* Printed Board Assembly number */ 1126 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1127 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1128 1129 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1130 error = ixgbe_allocate_msix(sc, pa); 1131 if (error) { 1132 /* Free allocated queue structures first */ 1133 ixgbe_free_queues(sc); 1134 1135 /* Fallback to legacy interrupt */ 1136 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1137 sc->feat_en |= IXGBE_FEATURE_MSI; 1138 sc->num_queues = 1; 1139 1140 /* Allocate our TX/RX Queues again */ 1141 if (ixgbe_allocate_queues(sc)) { 1142 error = ENOMEM; 1143 goto err_out; 1144 } 1145 } 1146 } 1147 1148 /* Recovery mode */ 1149 switch (sc->hw.mac.type) { 1150 case ixgbe_mac_X550: 1151 case ixgbe_mac_X550EM_x: 1152 case ixgbe_mac_X550EM_a: 1153 /* >= 2.00 */ 1154 if (hw->eeprom.nvm_image_ver_high >= 2) { 1155 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1156 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1157 } 1158 break; 1159 default: 1160 break; 1161 } 1162 1163 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1164 error = ixgbe_allocate_legacy(sc, pa); 1165 if (error) 1166 goto err_late; 1167 1168 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1169 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1170 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1171 error = workqueue_create(&sc->admin_wq, wqname, 1172 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1173 IXGBE_TASKLET_WQ_FLAGS); 1174 if (error) { 1175 aprint_error_dev(dev, 1176 "could not create admin workqueue (%d)\n", error); 1177 goto err_out; 1178 } 1179 1180 error = ixgbe_start_hw(hw); 1181 switch (error) { 1182 case IXGBE_ERR_EEPROM_VERSION: 1183 aprint_error_dev(dev, 1184 "This device is a pre-production adapter/" 1185 "LOM. Please be aware there may be issues associated " 1186 "with your hardware.\nIf you are experiencing problems " 1187 "please contact your Intel or hardware representative " 1188 "who provided you with this hardware.\n"); 1189 break; 1190 default: 1191 break; 1192 } 1193 1194 /* Setup OS specific network interface */ 1195 if (ixgbe_setup_interface(dev, sc) != 0) 1196 goto err_late; 1197 1198 /* 1199 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1200 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1201 */ 1202 if (hw->phy.media_type == ixgbe_media_type_copper) { 1203 uint16_t id1, id2; 1204 int oui, model, rev; 1205 char descr[MII_MAX_DESCR_LEN]; 1206 1207 id1 = hw->phy.id >> 16; 1208 id2 = hw->phy.id & 0xffff; 1209 oui = MII_OUI(id1, id2); 1210 model = MII_MODEL(id2); 1211 rev = MII_REV(id2); 1212 mii_get_descr(descr, sizeof(descr), oui, model); 1213 if (descr[0]) 1214 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1215 descr, rev); 1216 else 1217 aprint_normal_dev(dev, 1218 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1219 oui, model, rev); 1220 } 1221 1222 /* Enable EEE power saving */ 1223 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1224 hw->mac.ops.setup_eee(hw, 1225 sc->feat_en & IXGBE_FEATURE_EEE); 1226 1227 /* Enable power to the phy. */ 1228 if (!unsupported_sfp) { 1229 /* Enable the optics for 82599 SFP+ fiber */ 1230 ixgbe_enable_tx_laser(hw); 1231 1232 /* 1233 * XXX Currently, ixgbe_set_phy_power() supports only copper 1234 * PHY, so it's not required to test with !unsupported_sfp. 1235 */ 1236 ixgbe_set_phy_power(hw, TRUE); 1237 } 1238 1239 /* Initialize statistics */ 1240 ixgbe_update_stats_counters(sc); 1241 1242 /* Check PCIE slot type/speed/width */ 1243 ixgbe_get_slot_info(sc); 1244 1245 /* 1246 * Do time init and sysctl init here, but 1247 * only on the first port of a bypass adapter. 1248 */ 1249 ixgbe_bypass_init(sc); 1250 1251 /* Set an initial dmac value */ 1252 sc->dmac = 0; 1253 /* Set initial advertised speeds (if applicable) */ 1254 sc->advertise = ixgbe_get_default_advertise(sc); 1255 1256 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1257 ixgbe_define_iov_schemas(dev, &error); 1258 1259 /* Add sysctls */ 1260 ixgbe_add_device_sysctls(sc); 1261 ixgbe_add_hw_stats(sc); 1262 1263 /* For Netmap */ 1264 sc->init_locked = ixgbe_init_locked; 1265 sc->stop_locked = ixgbe_stop_locked; 1266 1267 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1268 ixgbe_netmap_attach(sc); 1269 1270 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1271 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1272 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1273 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1274 1275 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1276 pmf_class_network_register(dev, sc->ifp); 1277 else 1278 aprint_error_dev(dev, "couldn't establish power handler\n"); 1279 1280 /* Init recovery mode timer and state variable */ 1281 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1282 sc->recovery_mode = 0; 1283 1284 /* Set up the timer callout */ 1285 callout_init(&sc->recovery_mode_timer, 1286 IXGBE_CALLOUT_FLAGS); 1287 snprintf(wqname, sizeof(wqname), "%s-recovery", 1288 device_xname(dev)); 1289 error = workqueue_create(&sc->recovery_mode_timer_wq, 1290 wqname, ixgbe_handle_recovery_mode_timer, sc, 1291 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1292 if (error) { 1293 aprint_error_dev(dev, "could not create " 1294 "recovery_mode_timer workqueue (%d)\n", error); 1295 goto err_out; 1296 } 1297 1298 /* Start the task */ 1299 callout_reset(&sc->recovery_mode_timer, hz, 1300 ixgbe_recovery_mode_timer, sc); 1301 } 1302 1303 INIT_DEBUGOUT("ixgbe_attach: end"); 1304 sc->osdep.attached = true; 1305 1306 return; 1307 1308 err_late: 1309 ixgbe_free_queues(sc); 1310 err_out: 1311 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1312 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1313 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1314 ixgbe_free_deferred_handlers(sc); 1315 ixgbe_free_pci_resources(sc); 1316 if (sc->mta != NULL) 1317 free(sc->mta, M_DEVBUF); 1318 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1319 IXGBE_CORE_LOCK_DESTROY(sc); 1320 1321 return; 1322 } /* ixgbe_attach */ 1323 1324 /************************************************************************ 1325 * ixgbe_check_wol_support 1326 * 1327 * Checks whether the adapter's ports are capable of 1328 * Wake On LAN by reading the adapter's NVM. 1329 * 1330 * Sets each port's hw->wol_enabled value depending 1331 * on the value read here. 1332 ************************************************************************/ 1333 static void 1334 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1335 { 1336 struct ixgbe_hw *hw = &sc->hw; 1337 u16 dev_caps = 0; 1338 1339 /* Find out WoL support for port */ 1340 sc->wol_support = hw->wol_enabled = 0; 1341 ixgbe_get_device_caps(hw, &dev_caps); 1342 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1343 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1344 hw->bus.func == 0)) 1345 sc->wol_support = hw->wol_enabled = 1; 1346 1347 /* Save initial wake up filter configuration */ 1348 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1349 1350 return; 1351 } /* ixgbe_check_wol_support */ 1352 1353 /************************************************************************ 1354 * ixgbe_setup_interface 1355 * 1356 * Setup networking device structure and register an interface. 1357 ************************************************************************/ 1358 static int 1359 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1360 { 1361 struct ethercom *ec = &sc->osdep.ec; 1362 struct ifnet *ifp; 1363 1364 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1365 1366 ifp = sc->ifp = &ec->ec_if; 1367 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1368 ifp->if_baudrate = IF_Gbps(10); 1369 ifp->if_init = ixgbe_init; 1370 ifp->if_stop = ixgbe_ifstop; 1371 ifp->if_softc = sc; 1372 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1373 #ifdef IXGBE_MPSAFE 1374 ifp->if_extflags = IFEF_MPSAFE; 1375 #endif 1376 ifp->if_ioctl = ixgbe_ioctl; 1377 #if __FreeBSD_version >= 1100045 1378 /* TSO parameters */ 1379 ifp->if_hw_tsomax = 65518; 1380 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1381 ifp->if_hw_tsomaxsegsize = 2048; 1382 #endif 1383 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1384 #if 0 1385 ixgbe_start_locked = ixgbe_legacy_start_locked; 1386 #endif 1387 } else { 1388 ifp->if_transmit = ixgbe_mq_start; 1389 #if 0 1390 ixgbe_start_locked = ixgbe_mq_start_locked; 1391 #endif 1392 } 1393 ifp->if_start = ixgbe_legacy_start; 1394 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1395 IFQ_SET_READY(&ifp->if_snd); 1396 1397 if_initialize(ifp); 1398 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1399 ether_ifattach(ifp, sc->hw.mac.addr); 1400 aprint_normal_dev(dev, "Ethernet address %s\n", 1401 ether_sprintf(sc->hw.mac.addr)); 1402 /* 1403 * We use per TX queue softint, so if_deferred_start_init() isn't 1404 * used. 1405 */ 1406 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1407 1408 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1409 1410 /* 1411 * Tell the upper layer(s) we support long frames. 1412 */ 1413 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1414 1415 /* Set capability flags */ 1416 ifp->if_capabilities |= IFCAP_RXCSUM 1417 | IFCAP_TXCSUM 1418 | IFCAP_TSOv4 1419 | IFCAP_TSOv6; 1420 ifp->if_capenable = 0; 1421 1422 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1423 | ETHERCAP_VLAN_HWCSUM 1424 | ETHERCAP_JUMBO_MTU 1425 | ETHERCAP_VLAN_MTU; 1426 1427 /* Enable the above capabilities by default */ 1428 ec->ec_capenable = ec->ec_capabilities; 1429 1430 /* 1431 * Don't turn this on by default, if vlans are 1432 * created on another pseudo device (eg. lagg) 1433 * then vlan events are not passed thru, breaking 1434 * operation, but with HW FILTER off it works. If 1435 * using vlans directly on the ixgbe driver you can 1436 * enable this and get full hardware tag filtering. 1437 */ 1438 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1439 1440 /* 1441 * Specify the media types supported by this adapter and register 1442 * callbacks to update media and link information 1443 */ 1444 ec->ec_ifmedia = &sc->media; 1445 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1446 ixgbe_media_status, &sc->core_mtx); 1447 1448 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1449 ixgbe_add_media_types(sc); 1450 1451 /* Set autoselect media by default */ 1452 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1453 1454 if_register(ifp); 1455 1456 return (0); 1457 } /* ixgbe_setup_interface */ 1458 1459 /************************************************************************ 1460 * ixgbe_add_media_types 1461 ************************************************************************/ 1462 static void 1463 ixgbe_add_media_types(struct ixgbe_softc *sc) 1464 { 1465 struct ixgbe_hw *hw = &sc->hw; 1466 u64 layer; 1467 1468 layer = sc->phy_layer; 1469 1470 #define ADD(mm, dd) \ 1471 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1472 1473 ADD(IFM_NONE, 0); 1474 1475 /* Media types with matching NetBSD media defines */ 1476 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1477 ADD(IFM_10G_T | IFM_FDX, 0); 1478 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1479 ADD(IFM_1000_T | IFM_FDX, 0); 1480 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1481 ADD(IFM_100_TX | IFM_FDX, 0); 1482 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1483 ADD(IFM_10_T | IFM_FDX, 0); 1484 1485 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1486 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1487 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1488 1489 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1490 ADD(IFM_10G_LR | IFM_FDX, 0); 1491 if (hw->phy.multispeed_fiber) 1492 ADD(IFM_1000_LX | IFM_FDX, 0); 1493 } 1494 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1495 ADD(IFM_10G_SR | IFM_FDX, 0); 1496 if (hw->phy.multispeed_fiber) 1497 ADD(IFM_1000_SX | IFM_FDX, 0); 1498 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1499 ADD(IFM_1000_SX | IFM_FDX, 0); 1500 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1501 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1502 1503 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1504 ADD(IFM_10G_KR | IFM_FDX, 0); 1505 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1506 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1507 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1508 ADD(IFM_1000_KX | IFM_FDX, 0); 1509 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1510 ADD(IFM_2500_KX | IFM_FDX, 0); 1511 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1512 ADD(IFM_2500_T | IFM_FDX, 0); 1513 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1514 ADD(IFM_5000_T | IFM_FDX, 0); 1515 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1516 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1517 /* XXX no ifmedia_set? */ 1518 1519 ADD(IFM_AUTO, 0); 1520 1521 #undef ADD 1522 } /* ixgbe_add_media_types */ 1523 1524 /************************************************************************ 1525 * ixgbe_is_sfp 1526 ************************************************************************/ 1527 static inline bool 1528 ixgbe_is_sfp(struct ixgbe_hw *hw) 1529 { 1530 switch (hw->mac.type) { 1531 case ixgbe_mac_82598EB: 1532 if (hw->phy.type == ixgbe_phy_nl) 1533 return (TRUE); 1534 return (FALSE); 1535 case ixgbe_mac_82599EB: 1536 case ixgbe_mac_X550EM_x: 1537 case ixgbe_mac_X550EM_a: 1538 switch (hw->mac.ops.get_media_type(hw)) { 1539 case ixgbe_media_type_fiber: 1540 case ixgbe_media_type_fiber_qsfp: 1541 return (TRUE); 1542 default: 1543 return (FALSE); 1544 } 1545 default: 1546 return (FALSE); 1547 } 1548 } /* ixgbe_is_sfp */ 1549 1550 static void 1551 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1552 { 1553 1554 KASSERT(mutex_owned(&sc->admin_mtx)); 1555 1556 if (__predict_true(sc->osdep.detaching == false)) { 1557 if (sc->admin_pending == 0) 1558 workqueue_enqueue(sc->admin_wq, 1559 &sc->admin_wc, NULL); 1560 sc->admin_pending = 1; 1561 } 1562 } 1563 1564 /************************************************************************ 1565 * ixgbe_config_link 1566 ************************************************************************/ 1567 static void 1568 ixgbe_config_link(struct ixgbe_softc *sc) 1569 { 1570 struct ixgbe_hw *hw = &sc->hw; 1571 u32 autoneg, err = 0; 1572 u32 task_requests = 0; 1573 bool sfp, negotiate = false; 1574 1575 sfp = ixgbe_is_sfp(hw); 1576 1577 if (sfp) { 1578 if (hw->phy.multispeed_fiber) { 1579 ixgbe_enable_tx_laser(hw); 1580 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1581 } 1582 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1583 1584 mutex_enter(&sc->admin_mtx); 1585 sc->task_requests |= task_requests; 1586 ixgbe_schedule_admin_tasklet(sc); 1587 mutex_exit(&sc->admin_mtx); 1588 } else { 1589 struct ifmedia *ifm = &sc->media; 1590 1591 if (hw->mac.ops.check_link) 1592 err = ixgbe_check_link(hw, &sc->link_speed, 1593 &sc->link_up, FALSE); 1594 if (err) 1595 return; 1596 1597 /* 1598 * Check if it's the first call. If it's the first call, 1599 * get value for auto negotiation. 1600 */ 1601 autoneg = hw->phy.autoneg_advertised; 1602 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1603 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1604 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1605 &negotiate); 1606 if (err) 1607 return; 1608 if (hw->mac.ops.setup_link) 1609 err = hw->mac.ops.setup_link(hw, autoneg, 1610 sc->link_up); 1611 } 1612 } /* ixgbe_config_link */ 1613 1614 /************************************************************************ 1615 * ixgbe_update_stats_counters - Update board statistics counters. 1616 ************************************************************************/ 1617 static void 1618 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1619 { 1620 struct ifnet *ifp = sc->ifp; 1621 struct ixgbe_hw *hw = &sc->hw; 1622 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1623 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1624 u64 total, total_missed_rx = 0; 1625 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1626 unsigned int queue_counters; 1627 int i; 1628 1629 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1630 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1631 1632 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1633 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1634 if (hw->mac.type >= ixgbe_mac_X550) 1635 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1636 1637 /* 16 registers exist */ 1638 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1639 for (i = 0; i < queue_counters; i++) { 1640 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1641 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1642 if (hw->mac.type >= ixgbe_mac_82599EB) { 1643 IXGBE_EVC_ADD(&stats->qbrc[i], 1644 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1645 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1646 IXGBE_EVC_ADD(&stats->qbtc[i], 1647 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1648 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1649 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRDC(i), qprdc[i]); 1650 } else { 1651 /* 82598 */ 1652 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1653 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1654 } 1655 } 1656 1657 /* 8 registers exist */ 1658 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1659 uint32_t mp; 1660 1661 /* MPC */ 1662 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1663 /* global total per queue */ 1664 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1665 /* running comprehensive total for stats display */ 1666 total_missed_rx += mp; 1667 1668 if (hw->mac.type == ixgbe_mac_82598EB) 1669 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1670 1671 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1672 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1673 if (hw->mac.type >= ixgbe_mac_82599EB) { 1674 IXGBE_EVC_REGADD(hw, stats, 1675 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1676 IXGBE_EVC_REGADD(hw, stats, 1677 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1678 IXGBE_EVC_REGADD(hw, stats, 1679 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1680 } else { 1681 IXGBE_EVC_REGADD(hw, stats, 1682 IXGBE_PXONRXC(i), pxonrxc[i]); 1683 IXGBE_EVC_REGADD(hw, stats, 1684 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1685 } 1686 } 1687 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1688 1689 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1690 if ((sc->link_active == LINK_STATE_UP) 1691 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1692 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1693 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1694 } 1695 if (hw->mac.type == ixgbe_mac_X550EM_a) 1696 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1697 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1698 1699 /* Hardware workaround, gprc counts missed packets */ 1700 IXGBE_EVC_ADD(&stats->gprc, 1701 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1702 1703 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1704 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1705 total = lxontxc + lxofftxc; 1706 1707 if (hw->mac.type != ixgbe_mac_82598EB) { 1708 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1709 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1710 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1711 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1712 - total * ETHER_MIN_LEN); 1713 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1714 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1715 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1716 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1717 } else { 1718 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1719 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1720 /* 82598 only has a counter in the high register */ 1721 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1722 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1723 - total * ETHER_MIN_LEN); 1724 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1725 } 1726 1727 /* 1728 * Workaround: mprc hardware is incorrectly counting 1729 * broadcasts, so for now we subtract those. 1730 */ 1731 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1732 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1733 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1734 1735 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1736 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1737 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1738 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1739 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1740 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1741 1742 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1743 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1744 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1745 1746 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1747 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1748 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1749 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1750 1751 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1752 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1753 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1754 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1755 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1756 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1757 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1758 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1759 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1760 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1761 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1762 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1763 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1764 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1765 /* Only read FCOE on 82599 */ 1766 if (hw->mac.type != ixgbe_mac_82598EB) { 1767 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1768 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1769 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1770 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1771 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1772 } 1773 1774 /* 1775 * Fill out the OS statistics structure. Only RX errors are required 1776 * here because all TX counters are incremented in the TX path and 1777 * normal RX counters are prepared in ether_input(). 1778 */ 1779 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1780 if_statadd_ref(nsr, if_iqdrops, total_missed_rx); 1781 1782 /* 1783 * Aggregate following types of errors as RX errors: 1784 * - CRC error count, 1785 * - illegal byte error count, 1786 * - length error count, 1787 * - undersized packets count, 1788 * - fragmented packets count, 1789 * - oversized packets count, 1790 * - jabber count. 1791 */ 1792 if_statadd_ref(nsr, if_ierrors, 1793 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1794 1795 IF_STAT_PUTREF(ifp); 1796 } /* ixgbe_update_stats_counters */ 1797 1798 /************************************************************************ 1799 * ixgbe_add_hw_stats 1800 * 1801 * Add sysctl variables, one per statistic, to the system. 1802 ************************************************************************/ 1803 static void 1804 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1805 { 1806 device_t dev = sc->dev; 1807 const struct sysctlnode *rnode, *cnode; 1808 struct sysctllog **log = &sc->sysctllog; 1809 struct tx_ring *txr = sc->tx_rings; 1810 struct rx_ring *rxr = sc->rx_rings; 1811 struct ixgbe_hw *hw = &sc->hw; 1812 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1813 const char *xname = device_xname(dev); 1814 int i; 1815 1816 /* Driver Statistics */ 1817 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1818 NULL, xname, "Driver tx dma soft fail EFBIG"); 1819 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1820 NULL, xname, "m_defrag() failed"); 1821 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1822 NULL, xname, "Driver tx dma hard fail EFBIG"); 1823 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1824 NULL, xname, "Driver tx dma hard fail EINVAL"); 1825 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1826 NULL, xname, "Driver tx dma hard fail other"); 1827 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1828 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1829 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1830 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1831 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1832 NULL, xname, "Watchdog timeouts"); 1833 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1834 NULL, xname, "TSO errors"); 1835 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1836 NULL, xname, "Admin MSI-X IRQ Handled"); 1837 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1838 NULL, xname, "Link event"); 1839 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1840 NULL, xname, "SFP+ module event"); 1841 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1842 NULL, xname, "Multispeed event"); 1843 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1844 NULL, xname, "External PHY event"); 1845 1846 /* Max number of traffic class is 8 */ 1847 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1848 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1849 snprintf(sc->tcs[i].evnamebuf, 1850 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1851 if (i < __arraycount(stats->mpc)) { 1852 evcnt_attach_dynamic(&stats->mpc[i], 1853 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1854 "RX Missed Packet Count"); 1855 if (hw->mac.type == ixgbe_mac_82598EB) 1856 evcnt_attach_dynamic(&stats->rnbc[i], 1857 EVCNT_TYPE_MISC, NULL, 1858 sc->tcs[i].evnamebuf, 1859 "Receive No Buffers"); 1860 } 1861 if (i < __arraycount(stats->pxontxc)) { 1862 evcnt_attach_dynamic(&stats->pxontxc[i], 1863 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1864 "Priority XON Transmitted"); 1865 evcnt_attach_dynamic(&stats->pxofftxc[i], 1866 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1867 "Priority XOFF Transmitted"); 1868 if (hw->mac.type >= ixgbe_mac_82599EB) 1869 evcnt_attach_dynamic(&stats->pxon2offc[i], 1870 EVCNT_TYPE_MISC, NULL, 1871 sc->tcs[i].evnamebuf, 1872 "Priority XON to XOFF"); 1873 evcnt_attach_dynamic(&stats->pxonrxc[i], 1874 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1875 "Priority XON Received"); 1876 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1877 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1878 "Priority XOFF Received"); 1879 } 1880 } 1881 1882 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1883 #ifdef LRO 1884 struct lro_ctrl *lro = &rxr->lro; 1885 #endif 1886 1887 snprintf(sc->queues[i].evnamebuf, 1888 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1889 snprintf(sc->queues[i].namebuf, 1890 sizeof(sc->queues[i].namebuf), "q%d", i); 1891 1892 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1893 aprint_error_dev(dev, 1894 "could not create sysctl root\n"); 1895 break; 1896 } 1897 1898 if (sysctl_createv(log, 0, &rnode, &rnode, 1899 0, CTLTYPE_NODE, 1900 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1901 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1902 break; 1903 1904 if (sysctl_createv(log, 0, &rnode, &cnode, 1905 CTLFLAG_READWRITE, CTLTYPE_INT, 1906 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1907 ixgbe_sysctl_interrupt_rate_handler, 0, 1908 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1909 break; 1910 1911 if (sysctl_createv(log, 0, &rnode, &cnode, 1912 CTLFLAG_READONLY, CTLTYPE_INT, 1913 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1914 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1915 0, CTL_CREATE, CTL_EOL) != 0) 1916 break; 1917 1918 if (sysctl_createv(log, 0, &rnode, &cnode, 1919 CTLFLAG_READONLY, CTLTYPE_INT, 1920 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1921 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1922 0, CTL_CREATE, CTL_EOL) != 0) 1923 break; 1924 1925 if (sysctl_createv(log, 0, &rnode, &cnode, 1926 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1927 SYSCTL_DESCR("Receive Descriptor next to check"), 1928 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1929 CTL_CREATE, CTL_EOL) != 0) 1930 break; 1931 1932 if (sysctl_createv(log, 0, &rnode, &cnode, 1933 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1934 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1935 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1936 CTL_CREATE, CTL_EOL) != 0) 1937 break; 1938 1939 if (sysctl_createv(log, 0, &rnode, &cnode, 1940 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1941 SYSCTL_DESCR("Receive Descriptor Head"), 1942 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1943 CTL_CREATE, CTL_EOL) != 0) 1944 break; 1945 1946 if (sysctl_createv(log, 0, &rnode, &cnode, 1947 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1948 SYSCTL_DESCR("Receive Descriptor Tail"), 1949 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1950 CTL_CREATE, CTL_EOL) != 0) 1951 break; 1952 1953 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1954 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1955 evcnt_attach_dynamic(&sc->queues[i].handleq, 1956 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1957 "Handled queue in softint"); 1958 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1959 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1960 if (i < __arraycount(stats->qbtc)) 1961 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1962 NULL, sc->queues[i].evnamebuf, 1963 "Queue Bytes Transmitted (reg)"); 1964 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1965 NULL, sc->queues[i].evnamebuf, 1966 "Queue Packets Transmitted (soft)"); 1967 if (i < __arraycount(stats->qptc)) 1968 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1969 NULL, sc->queues[i].evnamebuf, 1970 "Queue Packets Transmitted (reg)"); 1971 #ifndef IXGBE_LEGACY_TX 1972 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1973 NULL, sc->queues[i].evnamebuf, 1974 "Packets dropped in pcq"); 1975 #endif 1976 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1977 NULL, sc->queues[i].evnamebuf, 1978 "TX Queue No Descriptor Available"); 1979 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 1980 NULL, sc->queues[i].evnamebuf, "TSO"); 1981 1982 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 1983 NULL, sc->queues[i].evnamebuf, 1984 "Queue Bytes Received (soft)"); 1985 if (i < __arraycount(stats->qbrc)) 1986 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 1987 NULL, sc->queues[i].evnamebuf, 1988 "Queue Bytes Received (reg)"); 1989 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 1990 NULL, sc->queues[i].evnamebuf, 1991 "Queue Packets Received (soft)"); 1992 if (i < __arraycount(stats->qprc)) 1993 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 1994 NULL, sc->queues[i].evnamebuf, 1995 "Queue Packets Received (reg)"); 1996 if ((i < __arraycount(stats->qprdc)) && 1997 (hw->mac.type >= ixgbe_mac_82599EB)) 1998 evcnt_attach_dynamic(&stats->qprdc[i], 1999 EVCNT_TYPE_MISC, NULL, 2000 sc->queues[i].evnamebuf, 2001 "Queue Packets Received Drop"); 2002 2003 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2004 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2005 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2006 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2007 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2008 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2009 #ifdef LRO 2010 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2011 CTLFLAG_RD, &lro->lro_queued, 0, 2012 "LRO Queued"); 2013 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2014 CTLFLAG_RD, &lro->lro_flushed, 0, 2015 "LRO Flushed"); 2016 #endif /* LRO */ 2017 } 2018 2019 /* MAC stats get their own sub node */ 2020 2021 snprintf(stats->namebuf, 2022 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2023 2024 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2025 stats->namebuf, "rx csum offload - IP"); 2026 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2027 stats->namebuf, "rx csum offload - L4"); 2028 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2029 stats->namebuf, "rx csum offload - IP bad"); 2030 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2031 stats->namebuf, "rx csum offload - L4 bad"); 2032 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2033 stats->namebuf, "Interrupt conditions zero"); 2034 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2035 stats->namebuf, "Legacy interrupts"); 2036 2037 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2038 stats->namebuf, "CRC Errors"); 2039 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2040 stats->namebuf, "Illegal Byte Errors"); 2041 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2042 stats->namebuf, "Byte Errors"); 2043 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2044 stats->namebuf, "MAC Short Packets Discarded"); 2045 if (hw->mac.type >= ixgbe_mac_X550) 2046 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2047 stats->namebuf, "Bad SFD"); 2048 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2049 stats->namebuf, "Total Packets Missed"); 2050 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2051 stats->namebuf, "MAC Local Faults"); 2052 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2053 stats->namebuf, "MAC Remote Faults"); 2054 if (hw->mac.type == ixgbe_mac_X550EM_a) 2055 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2056 NULL, stats->namebuf, "Link down event in the MAC"); 2057 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2058 stats->namebuf, "Receive Length Errors"); 2059 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2060 stats->namebuf, "Link XON Transmitted"); 2061 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2062 stats->namebuf, "Link XOFF Transmitted"); 2063 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2064 stats->namebuf, "Link XON Received"); 2065 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2066 stats->namebuf, "Link XOFF Received"); 2067 2068 /* Packet Reception Stats */ 2069 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2070 stats->namebuf, "Total Octets Received"); 2071 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2072 stats->namebuf, "Good Octets Received"); 2073 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2074 stats->namebuf, "Total Packets Received"); 2075 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2076 stats->namebuf, "Good Packets Received"); 2077 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2078 stats->namebuf, "Multicast Packets Received"); 2079 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2080 stats->namebuf, "Broadcast Packets Received"); 2081 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2082 stats->namebuf, "64 byte frames received "); 2083 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2084 stats->namebuf, "65-127 byte frames received"); 2085 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2086 stats->namebuf, "128-255 byte frames received"); 2087 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2088 stats->namebuf, "256-511 byte frames received"); 2089 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2090 stats->namebuf, "512-1023 byte frames received"); 2091 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2092 stats->namebuf, "1023-1522 byte frames received"); 2093 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2094 stats->namebuf, "Receive Undersized"); 2095 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2096 stats->namebuf, "Fragmented Packets Received "); 2097 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2098 stats->namebuf, "Oversized Packets Received"); 2099 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2100 stats->namebuf, "Received Jabber"); 2101 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2102 stats->namebuf, "Management Packets Received"); 2103 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2104 stats->namebuf, "Management Packets Dropped"); 2105 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2106 stats->namebuf, "Checksum Errors"); 2107 2108 /* Packet Transmission Stats */ 2109 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2110 stats->namebuf, "Good Octets Transmitted"); 2111 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2112 stats->namebuf, "Total Packets Transmitted"); 2113 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2114 stats->namebuf, "Good Packets Transmitted"); 2115 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2116 stats->namebuf, "Broadcast Packets Transmitted"); 2117 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2118 stats->namebuf, "Multicast Packets Transmitted"); 2119 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2120 stats->namebuf, "Management Packets Transmitted"); 2121 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2122 stats->namebuf, "64 byte frames transmitted "); 2123 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2124 stats->namebuf, "65-127 byte frames transmitted"); 2125 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2126 stats->namebuf, "128-255 byte frames transmitted"); 2127 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2128 stats->namebuf, "256-511 byte frames transmitted"); 2129 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2130 stats->namebuf, "512-1023 byte frames transmitted"); 2131 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2132 stats->namebuf, "1024-1522 byte frames transmitted"); 2133 } /* ixgbe_add_hw_stats */ 2134 2135 static void 2136 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2137 { 2138 struct tx_ring *txr = sc->tx_rings; 2139 struct rx_ring *rxr = sc->rx_rings; 2140 struct ixgbe_hw *hw = &sc->hw; 2141 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2142 int i; 2143 2144 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2145 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2146 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2147 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2148 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2149 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2150 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2151 IXGBE_EVC_STORE(&sc->tso_err, 0); 2152 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2153 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2154 IXGBE_EVC_STORE(&sc->link_workev, 0); 2155 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2156 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2157 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2158 2159 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2160 if (i < __arraycount(stats->mpc)) { 2161 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2162 if (hw->mac.type == ixgbe_mac_82598EB) 2163 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2164 } 2165 if (i < __arraycount(stats->pxontxc)) { 2166 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2167 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2168 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2169 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2170 if (hw->mac.type >= ixgbe_mac_82599EB) 2171 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2172 } 2173 } 2174 2175 txr = sc->tx_rings; 2176 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2177 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2178 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2179 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2180 IXGBE_EVC_STORE(&txr->total_packets, 0); 2181 #ifndef IXGBE_LEGACY_TX 2182 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2183 #endif 2184 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2185 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2186 txr->q_efbig_tx_dma_setup = 0; 2187 txr->q_mbuf_defrag_failed = 0; 2188 txr->q_efbig2_tx_dma_setup = 0; 2189 txr->q_einval_tx_dma_setup = 0; 2190 txr->q_other_tx_dma_setup = 0; 2191 txr->q_eagain_tx_dma_setup = 0; 2192 txr->q_enomem_tx_dma_setup = 0; 2193 txr->q_tso_err = 0; 2194 2195 if (i < __arraycount(stats->qprc)) { 2196 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2197 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2198 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2199 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2200 if (hw->mac.type >= ixgbe_mac_82599EB) 2201 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2202 } 2203 2204 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2205 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2206 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2207 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2208 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2209 } 2210 IXGBE_EVC_STORE(&stats->ipcs, 0); 2211 IXGBE_EVC_STORE(&stats->l4cs, 0); 2212 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2213 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2214 IXGBE_EVC_STORE(&stats->intzero, 0); 2215 IXGBE_EVC_STORE(&stats->legint, 0); 2216 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2217 IXGBE_EVC_STORE(&stats->illerrc, 0); 2218 IXGBE_EVC_STORE(&stats->errbc, 0); 2219 IXGBE_EVC_STORE(&stats->mspdc, 0); 2220 if (hw->mac.type >= ixgbe_mac_X550) 2221 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2222 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2223 IXGBE_EVC_STORE(&stats->mlfc, 0); 2224 IXGBE_EVC_STORE(&stats->mrfc, 0); 2225 if (hw->mac.type == ixgbe_mac_X550EM_a) 2226 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2227 IXGBE_EVC_STORE(&stats->rlec, 0); 2228 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2229 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2230 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2231 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2232 2233 /* Packet Reception Stats */ 2234 IXGBE_EVC_STORE(&stats->tor, 0); 2235 IXGBE_EVC_STORE(&stats->gorc, 0); 2236 IXGBE_EVC_STORE(&stats->tpr, 0); 2237 IXGBE_EVC_STORE(&stats->gprc, 0); 2238 IXGBE_EVC_STORE(&stats->mprc, 0); 2239 IXGBE_EVC_STORE(&stats->bprc, 0); 2240 IXGBE_EVC_STORE(&stats->prc64, 0); 2241 IXGBE_EVC_STORE(&stats->prc127, 0); 2242 IXGBE_EVC_STORE(&stats->prc255, 0); 2243 IXGBE_EVC_STORE(&stats->prc511, 0); 2244 IXGBE_EVC_STORE(&stats->prc1023, 0); 2245 IXGBE_EVC_STORE(&stats->prc1522, 0); 2246 IXGBE_EVC_STORE(&stats->ruc, 0); 2247 IXGBE_EVC_STORE(&stats->rfc, 0); 2248 IXGBE_EVC_STORE(&stats->roc, 0); 2249 IXGBE_EVC_STORE(&stats->rjc, 0); 2250 IXGBE_EVC_STORE(&stats->mngprc, 0); 2251 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2252 IXGBE_EVC_STORE(&stats->xec, 0); 2253 2254 /* Packet Transmission Stats */ 2255 IXGBE_EVC_STORE(&stats->gotc, 0); 2256 IXGBE_EVC_STORE(&stats->tpt, 0); 2257 IXGBE_EVC_STORE(&stats->gptc, 0); 2258 IXGBE_EVC_STORE(&stats->bptc, 0); 2259 IXGBE_EVC_STORE(&stats->mptc, 0); 2260 IXGBE_EVC_STORE(&stats->mngptc, 0); 2261 IXGBE_EVC_STORE(&stats->ptc64, 0); 2262 IXGBE_EVC_STORE(&stats->ptc127, 0); 2263 IXGBE_EVC_STORE(&stats->ptc255, 0); 2264 IXGBE_EVC_STORE(&stats->ptc511, 0); 2265 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2266 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2267 } 2268 2269 /************************************************************************ 2270 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2271 * 2272 * Retrieves the TDH value from the hardware 2273 ************************************************************************/ 2274 static int 2275 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2276 { 2277 struct sysctlnode node = *rnode; 2278 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2279 struct ixgbe_softc *sc; 2280 uint32_t val; 2281 2282 if (!txr) 2283 return (0); 2284 2285 sc = txr->sc; 2286 if (ixgbe_fw_recovery_mode_swflag(sc)) 2287 return (EPERM); 2288 2289 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2290 node.sysctl_data = &val; 2291 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2292 } /* ixgbe_sysctl_tdh_handler */ 2293 2294 /************************************************************************ 2295 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2296 * 2297 * Retrieves the TDT value from the hardware 2298 ************************************************************************/ 2299 static int 2300 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2301 { 2302 struct sysctlnode node = *rnode; 2303 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2304 struct ixgbe_softc *sc; 2305 uint32_t val; 2306 2307 if (!txr) 2308 return (0); 2309 2310 sc = txr->sc; 2311 if (ixgbe_fw_recovery_mode_swflag(sc)) 2312 return (EPERM); 2313 2314 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2315 node.sysctl_data = &val; 2316 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2317 } /* ixgbe_sysctl_tdt_handler */ 2318 2319 /************************************************************************ 2320 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2321 * handler function 2322 * 2323 * Retrieves the next_to_check value 2324 ************************************************************************/ 2325 static int 2326 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2327 { 2328 struct sysctlnode node = *rnode; 2329 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2330 struct ixgbe_softc *sc; 2331 uint32_t val; 2332 2333 if (!rxr) 2334 return (0); 2335 2336 sc = rxr->sc; 2337 if (ixgbe_fw_recovery_mode_swflag(sc)) 2338 return (EPERM); 2339 2340 val = rxr->next_to_check; 2341 node.sysctl_data = &val; 2342 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2343 } /* ixgbe_sysctl_next_to_check_handler */ 2344 2345 /************************************************************************ 2346 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2347 * handler function 2348 * 2349 * Retrieves the next_to_refresh value 2350 ************************************************************************/ 2351 static int 2352 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2353 { 2354 struct sysctlnode node = *rnode; 2355 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2356 struct ixgbe_softc *sc; 2357 uint32_t val; 2358 2359 if (!rxr) 2360 return (0); 2361 2362 sc = rxr->sc; 2363 if (ixgbe_fw_recovery_mode_swflag(sc)) 2364 return (EPERM); 2365 2366 val = rxr->next_to_refresh; 2367 node.sysctl_data = &val; 2368 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2369 } /* ixgbe_sysctl_next_to_refresh_handler */ 2370 2371 /************************************************************************ 2372 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2373 * 2374 * Retrieves the RDH value from the hardware 2375 ************************************************************************/ 2376 static int 2377 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2378 { 2379 struct sysctlnode node = *rnode; 2380 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2381 struct ixgbe_softc *sc; 2382 uint32_t val; 2383 2384 if (!rxr) 2385 return (0); 2386 2387 sc = rxr->sc; 2388 if (ixgbe_fw_recovery_mode_swflag(sc)) 2389 return (EPERM); 2390 2391 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2392 node.sysctl_data = &val; 2393 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2394 } /* ixgbe_sysctl_rdh_handler */ 2395 2396 /************************************************************************ 2397 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2398 * 2399 * Retrieves the RDT value from the hardware 2400 ************************************************************************/ 2401 static int 2402 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2403 { 2404 struct sysctlnode node = *rnode; 2405 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2406 struct ixgbe_softc *sc; 2407 uint32_t val; 2408 2409 if (!rxr) 2410 return (0); 2411 2412 sc = rxr->sc; 2413 if (ixgbe_fw_recovery_mode_swflag(sc)) 2414 return (EPERM); 2415 2416 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2417 node.sysctl_data = &val; 2418 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2419 } /* ixgbe_sysctl_rdt_handler */ 2420 2421 static int 2422 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2423 { 2424 struct ifnet *ifp = &ec->ec_if; 2425 struct ixgbe_softc *sc = ifp->if_softc; 2426 int rv; 2427 2428 if (set) 2429 rv = ixgbe_register_vlan(sc, vid); 2430 else 2431 rv = ixgbe_unregister_vlan(sc, vid); 2432 2433 if (rv != 0) 2434 return rv; 2435 2436 /* 2437 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2438 * or 0 to 1. 2439 */ 2440 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2441 ixgbe_setup_vlan_hw_tagging(sc); 2442 2443 return rv; 2444 } 2445 2446 /************************************************************************ 2447 * ixgbe_register_vlan 2448 * 2449 * Run via vlan config EVENT, it enables us to use the 2450 * HW Filter table since we can get the vlan id. This 2451 * just creates the entry in the soft version of the 2452 * VFTA, init will repopulate the real table. 2453 ************************************************************************/ 2454 static int 2455 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2456 { 2457 u16 index, bit; 2458 int error; 2459 2460 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2461 return EINVAL; 2462 2463 IXGBE_CORE_LOCK(sc); 2464 index = (vtag >> 5) & 0x7F; 2465 bit = vtag & 0x1F; 2466 sc->shadow_vfta[index] |= ((u32)1 << bit); 2467 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2468 true); 2469 IXGBE_CORE_UNLOCK(sc); 2470 if (error != 0) 2471 error = EACCES; 2472 2473 return error; 2474 } /* ixgbe_register_vlan */ 2475 2476 /************************************************************************ 2477 * ixgbe_unregister_vlan 2478 * 2479 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2480 ************************************************************************/ 2481 static int 2482 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2483 { 2484 u16 index, bit; 2485 int error; 2486 2487 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2488 return EINVAL; 2489 2490 IXGBE_CORE_LOCK(sc); 2491 index = (vtag >> 5) & 0x7F; 2492 bit = vtag & 0x1F; 2493 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2494 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2495 true); 2496 IXGBE_CORE_UNLOCK(sc); 2497 if (error != 0) 2498 error = EACCES; 2499 2500 return error; 2501 } /* ixgbe_unregister_vlan */ 2502 2503 static void 2504 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2505 { 2506 struct ethercom *ec = &sc->osdep.ec; 2507 struct ixgbe_hw *hw = &sc->hw; 2508 struct rx_ring *rxr; 2509 u32 ctrl; 2510 int i; 2511 bool hwtagging; 2512 2513 /* Enable HW tagging only if any vlan is attached */ 2514 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2515 && VLAN_ATTACHED(ec); 2516 2517 /* Setup the queues for vlans */ 2518 for (i = 0; i < sc->num_queues; i++) { 2519 rxr = &sc->rx_rings[i]; 2520 /* 2521 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2522 */ 2523 if (hw->mac.type != ixgbe_mac_82598EB) { 2524 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2525 if (hwtagging) 2526 ctrl |= IXGBE_RXDCTL_VME; 2527 else 2528 ctrl &= ~IXGBE_RXDCTL_VME; 2529 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2530 } 2531 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2532 } 2533 2534 /* VLAN hw tagging for 82598 */ 2535 if (hw->mac.type == ixgbe_mac_82598EB) { 2536 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2537 if (hwtagging) 2538 ctrl |= IXGBE_VLNCTRL_VME; 2539 else 2540 ctrl &= ~IXGBE_VLNCTRL_VME; 2541 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2542 } 2543 } /* ixgbe_setup_vlan_hw_tagging */ 2544 2545 static void 2546 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2547 { 2548 struct ethercom *ec = &sc->osdep.ec; 2549 struct ixgbe_hw *hw = &sc->hw; 2550 int i; 2551 u32 ctrl; 2552 struct vlanid_list *vlanidp; 2553 2554 /* 2555 * This function is called from both if_init and ifflags_cb() 2556 * on NetBSD. 2557 */ 2558 2559 /* 2560 * Part 1: 2561 * Setup VLAN HW tagging 2562 */ 2563 ixgbe_setup_vlan_hw_tagging(sc); 2564 2565 /* 2566 * Part 2: 2567 * Setup VLAN HW filter 2568 */ 2569 /* Cleanup shadow_vfta */ 2570 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2571 sc->shadow_vfta[i] = 0; 2572 /* Generate shadow_vfta from ec_vids */ 2573 ETHER_LOCK(ec); 2574 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2575 uint32_t idx; 2576 2577 idx = vlanidp->vid / 32; 2578 KASSERT(idx < IXGBE_VFTA_SIZE); 2579 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2580 } 2581 ETHER_UNLOCK(ec); 2582 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2583 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2584 2585 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2586 /* Enable the Filter Table if enabled */ 2587 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2588 ctrl |= IXGBE_VLNCTRL_VFE; 2589 else 2590 ctrl &= ~IXGBE_VLNCTRL_VFE; 2591 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2592 } /* ixgbe_setup_vlan_hw_support */ 2593 2594 /************************************************************************ 2595 * ixgbe_get_slot_info 2596 * 2597 * Get the width and transaction speed of 2598 * the slot this adapter is plugged into. 2599 ************************************************************************/ 2600 static void 2601 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2602 { 2603 device_t dev = sc->dev; 2604 struct ixgbe_hw *hw = &sc->hw; 2605 u32 offset; 2606 u16 link; 2607 int bus_info_valid = TRUE; 2608 2609 /* Some devices are behind an internal bridge */ 2610 switch (hw->device_id) { 2611 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2612 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2613 goto get_parent_info; 2614 default: 2615 break; 2616 } 2617 2618 ixgbe_get_bus_info(hw); 2619 2620 /* 2621 * Some devices don't use PCI-E, but there is no need 2622 * to display "Unknown" for bus speed and width. 2623 */ 2624 switch (hw->mac.type) { 2625 case ixgbe_mac_X550EM_x: 2626 case ixgbe_mac_X550EM_a: 2627 return; 2628 default: 2629 goto display; 2630 } 2631 2632 get_parent_info: 2633 /* 2634 * For the Quad port adapter we need to parse back 2635 * up the PCI tree to find the speed of the expansion 2636 * slot into which this adapter is plugged. A bit more work. 2637 */ 2638 dev = device_parent(device_parent(dev)); 2639 #if 0 2640 #ifdef IXGBE_DEBUG 2641 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2642 pci_get_slot(dev), pci_get_function(dev)); 2643 #endif 2644 dev = device_parent(device_parent(dev)); 2645 #ifdef IXGBE_DEBUG 2646 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2647 pci_get_slot(dev), pci_get_function(dev)); 2648 #endif 2649 #endif 2650 /* Now get the PCI Express Capabilities offset */ 2651 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2652 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2653 /* 2654 * Hmm...can't get PCI-Express capabilities. 2655 * Falling back to default method. 2656 */ 2657 bus_info_valid = FALSE; 2658 ixgbe_get_bus_info(hw); 2659 goto display; 2660 } 2661 /* ...and read the Link Status Register */ 2662 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2663 offset + PCIE_LCSR) >> 16; 2664 ixgbe_set_pci_config_data_generic(hw, link); 2665 2666 display: 2667 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2668 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2669 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2670 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2671 "Unknown"), 2672 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2673 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2674 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2675 "Unknown")); 2676 2677 if (bus_info_valid) { 2678 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2679 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2680 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2681 device_printf(dev, "PCI-Express bandwidth available" 2682 " for this card\n is not sufficient for" 2683 " optimal performance.\n"); 2684 device_printf(dev, "For optimal performance a x8 " 2685 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2686 } 2687 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2688 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2689 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2690 device_printf(dev, "PCI-Express bandwidth available" 2691 " for this card\n is not sufficient for" 2692 " optimal performance.\n"); 2693 device_printf(dev, "For optimal performance a x8 " 2694 "PCIE Gen3 slot is required.\n"); 2695 } 2696 } else 2697 device_printf(dev, 2698 "Unable to determine slot speed/width. The speed/width " 2699 "reported are that of the internal switch.\n"); 2700 2701 return; 2702 } /* ixgbe_get_slot_info */ 2703 2704 /************************************************************************ 2705 * ixgbe_enable_queue - Queue Interrupt Enabler 2706 ************************************************************************/ 2707 static inline void 2708 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2709 { 2710 struct ixgbe_hw *hw = &sc->hw; 2711 struct ix_queue *que = &sc->queues[vector]; 2712 u64 queue = 1ULL << vector; 2713 u32 mask; 2714 2715 mutex_enter(&que->dc_mtx); 2716 if (que->disabled_count > 0 && --que->disabled_count > 0) 2717 goto out; 2718 2719 if (hw->mac.type == ixgbe_mac_82598EB) { 2720 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2721 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2722 } else { 2723 mask = (queue & 0xFFFFFFFF); 2724 if (mask) 2725 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2726 mask = (queue >> 32); 2727 if (mask) 2728 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2729 } 2730 out: 2731 mutex_exit(&que->dc_mtx); 2732 } /* ixgbe_enable_queue */ 2733 2734 /************************************************************************ 2735 * ixgbe_disable_queue_internal 2736 ************************************************************************/ 2737 static inline void 2738 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2739 { 2740 struct ixgbe_hw *hw = &sc->hw; 2741 struct ix_queue *que = &sc->queues[vector]; 2742 u64 queue = 1ULL << vector; 2743 u32 mask; 2744 2745 mutex_enter(&que->dc_mtx); 2746 2747 if (que->disabled_count > 0) { 2748 if (nestok) 2749 que->disabled_count++; 2750 goto out; 2751 } 2752 que->disabled_count++; 2753 2754 if (hw->mac.type == ixgbe_mac_82598EB) { 2755 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2756 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2757 } else { 2758 mask = (queue & 0xFFFFFFFF); 2759 if (mask) 2760 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2761 mask = (queue >> 32); 2762 if (mask) 2763 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2764 } 2765 out: 2766 mutex_exit(&que->dc_mtx); 2767 } /* ixgbe_disable_queue_internal */ 2768 2769 /************************************************************************ 2770 * ixgbe_disable_queue 2771 ************************************************************************/ 2772 static inline void 2773 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2774 { 2775 2776 ixgbe_disable_queue_internal(sc, vector, true); 2777 } /* ixgbe_disable_queue */ 2778 2779 /************************************************************************ 2780 * ixgbe_sched_handle_que - schedule deferred packet processing 2781 ************************************************************************/ 2782 static inline void 2783 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2784 { 2785 2786 if (que->txrx_use_workqueue) { 2787 /* 2788 * sc->que_wq is bound to each CPU instead of 2789 * each NIC queue to reduce workqueue kthread. As we 2790 * should consider about interrupt affinity in this 2791 * function, the workqueue kthread must be WQ_PERCPU. 2792 * If create WQ_PERCPU workqueue kthread for each NIC 2793 * queue, that number of created workqueue kthread is 2794 * (number of used NIC queue) * (number of CPUs) = 2795 * (number of CPUs) ^ 2 most often. 2796 * 2797 * The same NIC queue's interrupts are avoided by 2798 * masking the queue's interrupt. And different 2799 * NIC queue's interrupts use different struct work 2800 * (que->wq_cookie). So, "enqueued flag" to avoid 2801 * twice workqueue_enqueue() is not required . 2802 */ 2803 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2804 } else 2805 softint_schedule(que->que_si); 2806 } 2807 2808 /************************************************************************ 2809 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2810 ************************************************************************/ 2811 static int 2812 ixgbe_msix_que(void *arg) 2813 { 2814 struct ix_queue *que = arg; 2815 struct ixgbe_softc *sc = que->sc; 2816 struct ifnet *ifp = sc->ifp; 2817 struct tx_ring *txr = que->txr; 2818 struct rx_ring *rxr = que->rxr; 2819 u32 newitr = 0; 2820 2821 /* Protect against spurious interrupts */ 2822 if ((ifp->if_flags & IFF_RUNNING) == 0) 2823 return 0; 2824 2825 ixgbe_disable_queue(sc, que->msix); 2826 IXGBE_EVC_ADD(&que->irqs, 1); 2827 2828 /* 2829 * Don't change "que->txrx_use_workqueue" from this point to avoid 2830 * flip-flopping softint/workqueue mode in one deferred processing. 2831 */ 2832 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2833 2834 IXGBE_TX_LOCK(txr); 2835 ixgbe_txeof(txr); 2836 IXGBE_TX_UNLOCK(txr); 2837 2838 /* Do AIM now? */ 2839 2840 if (sc->enable_aim == false) 2841 goto no_calc; 2842 /* 2843 * Do Adaptive Interrupt Moderation: 2844 * - Write out last calculated setting 2845 * - Calculate based on average size over 2846 * the last interval. 2847 */ 2848 if (que->eitr_setting) 2849 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2850 2851 que->eitr_setting = 0; 2852 2853 /* Idle, do nothing */ 2854 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2855 goto no_calc; 2856 2857 if ((txr->bytes) && (txr->packets)) 2858 newitr = txr->bytes/txr->packets; 2859 if ((rxr->bytes) && (rxr->packets)) 2860 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2861 newitr += 24; /* account for hardware frame, crc */ 2862 2863 /* set an upper boundary */ 2864 newitr = uimin(newitr, 3000); 2865 2866 /* Be nice to the mid range */ 2867 if ((newitr > 300) && (newitr < 1200)) 2868 newitr = (newitr / 3); 2869 else 2870 newitr = (newitr / 2); 2871 2872 /* 2873 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2874 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2875 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2876 * on 1G and higher. 2877 */ 2878 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2879 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2880 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2881 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2882 2883 /* save for next interrupt */ 2884 que->eitr_setting = newitr; 2885 2886 /* Reset state */ 2887 txr->bytes = 0; 2888 txr->packets = 0; 2889 rxr->bytes = 0; 2890 rxr->packets = 0; 2891 2892 no_calc: 2893 ixgbe_sched_handle_que(sc, que); 2894 2895 return 1; 2896 } /* ixgbe_msix_que */ 2897 2898 /************************************************************************ 2899 * ixgbe_media_status - Media Ioctl callback 2900 * 2901 * Called whenever the user queries the status of 2902 * the interface using ifconfig. 2903 ************************************************************************/ 2904 static void 2905 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2906 { 2907 struct ixgbe_softc *sc = ifp->if_softc; 2908 struct ixgbe_hw *hw = &sc->hw; 2909 int layer; 2910 2911 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2912 ixgbe_update_link_status(sc); 2913 2914 ifmr->ifm_status = IFM_AVALID; 2915 ifmr->ifm_active = IFM_ETHER; 2916 2917 if (sc->link_active != LINK_STATE_UP) { 2918 ifmr->ifm_active |= IFM_NONE; 2919 return; 2920 } 2921 2922 ifmr->ifm_status |= IFM_ACTIVE; 2923 layer = sc->phy_layer; 2924 2925 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2926 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2927 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2928 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2929 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2930 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2931 switch (sc->link_speed) { 2932 case IXGBE_LINK_SPEED_10GB_FULL: 2933 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2934 break; 2935 case IXGBE_LINK_SPEED_5GB_FULL: 2936 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2937 break; 2938 case IXGBE_LINK_SPEED_2_5GB_FULL: 2939 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2940 break; 2941 case IXGBE_LINK_SPEED_1GB_FULL: 2942 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2943 break; 2944 case IXGBE_LINK_SPEED_100_FULL: 2945 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2946 break; 2947 case IXGBE_LINK_SPEED_10_FULL: 2948 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2949 break; 2950 } 2951 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2952 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2953 switch (sc->link_speed) { 2954 case IXGBE_LINK_SPEED_10GB_FULL: 2955 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2956 break; 2957 } 2958 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2959 switch (sc->link_speed) { 2960 case IXGBE_LINK_SPEED_10GB_FULL: 2961 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2962 break; 2963 case IXGBE_LINK_SPEED_1GB_FULL: 2964 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2965 break; 2966 } 2967 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2968 switch (sc->link_speed) { 2969 case IXGBE_LINK_SPEED_10GB_FULL: 2970 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2971 break; 2972 case IXGBE_LINK_SPEED_1GB_FULL: 2973 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2974 break; 2975 } 2976 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2977 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2978 switch (sc->link_speed) { 2979 case IXGBE_LINK_SPEED_10GB_FULL: 2980 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2981 break; 2982 case IXGBE_LINK_SPEED_1GB_FULL: 2983 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2984 break; 2985 } 2986 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2987 switch (sc->link_speed) { 2988 case IXGBE_LINK_SPEED_10GB_FULL: 2989 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 2990 break; 2991 } 2992 /* 2993 * XXX: These need to use the proper media types once 2994 * they're added. 2995 */ 2996 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2997 switch (sc->link_speed) { 2998 case IXGBE_LINK_SPEED_10GB_FULL: 2999 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3000 break; 3001 case IXGBE_LINK_SPEED_2_5GB_FULL: 3002 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3003 break; 3004 case IXGBE_LINK_SPEED_1GB_FULL: 3005 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3006 break; 3007 } 3008 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3009 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3010 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3011 switch (sc->link_speed) { 3012 case IXGBE_LINK_SPEED_10GB_FULL: 3013 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3014 break; 3015 case IXGBE_LINK_SPEED_2_5GB_FULL: 3016 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3017 break; 3018 case IXGBE_LINK_SPEED_1GB_FULL: 3019 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3020 break; 3021 } 3022 3023 /* If nothing is recognized... */ 3024 #if 0 3025 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3026 ifmr->ifm_active |= IFM_UNKNOWN; 3027 #endif 3028 3029 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3030 3031 /* Display current flow control setting used on link */ 3032 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3033 hw->fc.current_mode == ixgbe_fc_full) 3034 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3035 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3036 hw->fc.current_mode == ixgbe_fc_full) 3037 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3038 3039 return; 3040 } /* ixgbe_media_status */ 3041 3042 /************************************************************************ 3043 * ixgbe_media_change - Media Ioctl callback 3044 * 3045 * Called when the user changes speed/duplex using 3046 * media/mediopt option with ifconfig. 3047 ************************************************************************/ 3048 static int 3049 ixgbe_media_change(struct ifnet *ifp) 3050 { 3051 struct ixgbe_softc *sc = ifp->if_softc; 3052 struct ifmedia *ifm = &sc->media; 3053 struct ixgbe_hw *hw = &sc->hw; 3054 ixgbe_link_speed speed = 0; 3055 ixgbe_link_speed link_caps = 0; 3056 bool negotiate = false; 3057 s32 err = IXGBE_NOT_IMPLEMENTED; 3058 3059 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3060 3061 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3062 return (EINVAL); 3063 3064 if (hw->phy.media_type == ixgbe_media_type_backplane) 3065 return (EPERM); 3066 3067 /* 3068 * We don't actually need to check against the supported 3069 * media types of the adapter; ifmedia will take care of 3070 * that for us. 3071 */ 3072 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3073 case IFM_AUTO: 3074 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3075 &negotiate); 3076 if (err != IXGBE_SUCCESS) { 3077 device_printf(sc->dev, "Unable to determine " 3078 "supported advertise speeds\n"); 3079 return (ENODEV); 3080 } 3081 speed |= link_caps; 3082 break; 3083 case IFM_10G_T: 3084 case IFM_10G_LRM: 3085 case IFM_10G_LR: 3086 case IFM_10G_TWINAX: 3087 case IFM_10G_SR: 3088 case IFM_10G_CX4: 3089 case IFM_10G_KR: 3090 case IFM_10G_KX4: 3091 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3092 break; 3093 case IFM_5000_T: 3094 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3095 break; 3096 case IFM_2500_T: 3097 case IFM_2500_KX: 3098 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3099 break; 3100 case IFM_1000_T: 3101 case IFM_1000_LX: 3102 case IFM_1000_SX: 3103 case IFM_1000_KX: 3104 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3105 break; 3106 case IFM_100_TX: 3107 speed |= IXGBE_LINK_SPEED_100_FULL; 3108 break; 3109 case IFM_10_T: 3110 speed |= IXGBE_LINK_SPEED_10_FULL; 3111 break; 3112 case IFM_NONE: 3113 break; 3114 default: 3115 goto invalid; 3116 } 3117 3118 hw->mac.autotry_restart = TRUE; 3119 hw->mac.ops.setup_link(hw, speed, TRUE); 3120 sc->advertise = 0; 3121 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3122 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3123 sc->advertise |= 1 << 2; 3124 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3125 sc->advertise |= 1 << 1; 3126 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3127 sc->advertise |= 1 << 0; 3128 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3129 sc->advertise |= 1 << 3; 3130 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3131 sc->advertise |= 1 << 4; 3132 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3133 sc->advertise |= 1 << 5; 3134 } 3135 3136 return (0); 3137 3138 invalid: 3139 device_printf(sc->dev, "Invalid media type!\n"); 3140 3141 return (EINVAL); 3142 } /* ixgbe_media_change */ 3143 3144 /************************************************************************ 3145 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3146 ************************************************************************/ 3147 static int 3148 ixgbe_msix_admin(void *arg) 3149 { 3150 struct ixgbe_softc *sc = arg; 3151 struct ixgbe_hw *hw = &sc->hw; 3152 u32 eicr; 3153 u32 eims_orig; 3154 u32 eims_disable = 0; 3155 3156 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3157 3158 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3159 /* Pause other interrupts */ 3160 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3161 3162 /* 3163 * First get the cause. 3164 * 3165 * The specifications of 82598, 82599, X540 and X550 say EICS register 3166 * is write only. However, Linux says it is a workaround for silicon 3167 * errata to read EICS instead of EICR to get interrupt cause. 3168 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3169 */ 3170 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3171 /* Be sure the queue bits are not cleared */ 3172 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3173 /* Clear all OTHER interrupts with write */ 3174 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3175 3176 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3177 3178 /* Re-enable some OTHER interrupts */ 3179 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3180 3181 return 1; 3182 } /* ixgbe_msix_admin */ 3183 3184 static void 3185 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3186 { 3187 struct ixgbe_hw *hw = &sc->hw; 3188 u32 task_requests = 0; 3189 s32 retval; 3190 3191 /* Link status change */ 3192 if (eicr & IXGBE_EICR_LSC) { 3193 task_requests |= IXGBE_REQUEST_TASK_LSC; 3194 *eims_disable |= IXGBE_EIMS_LSC; 3195 } 3196 3197 if (ixgbe_is_sfp(hw)) { 3198 u32 eicr_mask; 3199 3200 /* Pluggable optics-related interrupt */ 3201 if (hw->mac.type >= ixgbe_mac_X540) 3202 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3203 else 3204 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3205 3206 /* 3207 * An interrupt might not arrive when a module is inserted. 3208 * When an link status change interrupt occurred and the driver 3209 * still regard SFP as unplugged, issue the module softint 3210 * and then issue LSC interrupt. 3211 */ 3212 if ((eicr & eicr_mask) 3213 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3214 && (eicr & IXGBE_EICR_LSC))) { 3215 task_requests |= IXGBE_REQUEST_TASK_MOD; 3216 *eims_disable |= IXGBE_EIMS_LSC; 3217 } 3218 3219 if ((hw->mac.type == ixgbe_mac_82599EB) && 3220 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3221 task_requests |= IXGBE_REQUEST_TASK_MSF; 3222 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3223 } 3224 } 3225 3226 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3227 #ifdef IXGBE_FDIR 3228 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3229 (eicr & IXGBE_EICR_FLOW_DIR)) { 3230 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3231 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3232 /* Disable the interrupt */ 3233 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3234 } 3235 } 3236 #endif 3237 3238 if (eicr & IXGBE_EICR_ECC) { 3239 if (ratecheck(&sc->lasterr_time, 3240 &ixgbe_errlog_intrvl)) 3241 device_printf(sc->dev, 3242 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3243 } 3244 3245 /* Check for over temp condition */ 3246 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3247 switch (sc->hw.mac.type) { 3248 case ixgbe_mac_X550EM_a: 3249 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3250 break; 3251 retval = hw->phy.ops.check_overtemp(hw); 3252 if (retval != IXGBE_ERR_OVERTEMP) 3253 break; 3254 if (ratecheck(&sc->lasterr_time, 3255 &ixgbe_errlog_intrvl)) { 3256 device_printf(sc->dev, 3257 "CRITICAL: OVER TEMP!! " 3258 "PHY IS SHUT DOWN!!\n"); 3259 device_printf(sc->dev, 3260 "System shutdown required!\n"); 3261 } 3262 break; 3263 default: 3264 if (!(eicr & IXGBE_EICR_TS)) 3265 break; 3266 retval = hw->phy.ops.check_overtemp(hw); 3267 if (retval != IXGBE_ERR_OVERTEMP) 3268 break; 3269 if (ratecheck(&sc->lasterr_time, 3270 &ixgbe_errlog_intrvl)) { 3271 device_printf(sc->dev, 3272 "CRITICAL: OVER TEMP!! " 3273 "PHY IS SHUT DOWN!!\n"); 3274 device_printf(sc->dev, 3275 "System shutdown required!\n"); 3276 } 3277 break; 3278 } 3279 } 3280 3281 /* Check for VF message */ 3282 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3283 (eicr & IXGBE_EICR_MAILBOX)) { 3284 task_requests |= IXGBE_REQUEST_TASK_MBX; 3285 *eims_disable |= IXGBE_EIMS_MAILBOX; 3286 } 3287 } 3288 3289 /* Check for fan failure */ 3290 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3291 ixgbe_check_fan_failure(sc, eicr, true); 3292 3293 /* External PHY interrupt */ 3294 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3295 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3296 task_requests |= IXGBE_REQUEST_TASK_PHY; 3297 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3298 } 3299 3300 if (task_requests != 0) { 3301 mutex_enter(&sc->admin_mtx); 3302 sc->task_requests |= task_requests; 3303 ixgbe_schedule_admin_tasklet(sc); 3304 mutex_exit(&sc->admin_mtx); 3305 } 3306 } 3307 3308 static void 3309 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3310 { 3311 3312 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3313 itr |= itr << 16; 3314 else 3315 itr |= IXGBE_EITR_CNT_WDIS; 3316 3317 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3318 } 3319 3320 3321 /************************************************************************ 3322 * ixgbe_sysctl_interrupt_rate_handler 3323 ************************************************************************/ 3324 static int 3325 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3326 { 3327 struct sysctlnode node = *rnode; 3328 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3329 struct ixgbe_softc *sc; 3330 uint32_t reg, usec, rate; 3331 int error; 3332 3333 if (que == NULL) 3334 return 0; 3335 3336 sc = que->sc; 3337 if (ixgbe_fw_recovery_mode_swflag(sc)) 3338 return (EPERM); 3339 3340 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3341 usec = ((reg & 0x0FF8) >> 3); 3342 if (usec > 0) 3343 rate = 500000 / usec; 3344 else 3345 rate = 0; 3346 node.sysctl_data = &rate; 3347 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3348 if (error || newp == NULL) 3349 return error; 3350 reg &= ~0xfff; /* default, no limitation */ 3351 if (rate > 0 && rate < 500000) { 3352 if (rate < 1000) 3353 rate = 1000; 3354 reg |= ((4000000 / rate) & 0xff8); 3355 /* 3356 * When RSC is used, ITR interval must be larger than 3357 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3358 * The minimum value is always greater than 2us on 100M 3359 * (and 10M?(not documented)), but it's not on 1G and higher. 3360 */ 3361 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3362 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3363 if ((sc->num_queues > 1) 3364 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3365 return EINVAL; 3366 } 3367 ixgbe_max_interrupt_rate = rate; 3368 } else 3369 ixgbe_max_interrupt_rate = 0; 3370 ixgbe_eitr_write(sc, que->msix, reg); 3371 3372 return (0); 3373 } /* ixgbe_sysctl_interrupt_rate_handler */ 3374 3375 const struct sysctlnode * 3376 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3377 { 3378 const char *dvname; 3379 struct sysctllog **log; 3380 int rc; 3381 const struct sysctlnode *rnode; 3382 3383 if (sc->sysctltop != NULL) 3384 return sc->sysctltop; 3385 3386 log = &sc->sysctllog; 3387 dvname = device_xname(sc->dev); 3388 3389 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3390 0, CTLTYPE_NODE, dvname, 3391 SYSCTL_DESCR("ixgbe information and settings"), 3392 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3393 goto err; 3394 3395 return rnode; 3396 err: 3397 device_printf(sc->dev, 3398 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3399 return NULL; 3400 } 3401 3402 /************************************************************************ 3403 * ixgbe_add_device_sysctls 3404 ************************************************************************/ 3405 static void 3406 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3407 { 3408 device_t dev = sc->dev; 3409 struct ixgbe_hw *hw = &sc->hw; 3410 struct sysctllog **log; 3411 const struct sysctlnode *rnode, *cnode; 3412 3413 log = &sc->sysctllog; 3414 3415 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3416 aprint_error_dev(dev, "could not create sysctl root\n"); 3417 return; 3418 } 3419 3420 if (sysctl_createv(log, 0, &rnode, &cnode, 3421 CTLFLAG_READWRITE, CTLTYPE_INT, 3422 "debug", SYSCTL_DESCR("Debug Info"), 3423 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3424 != 0) 3425 aprint_error_dev(dev, "could not create sysctl\n"); 3426 3427 if (sysctl_createv(log, 0, &rnode, &cnode, 3428 CTLFLAG_READWRITE, CTLTYPE_INT, 3429 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3430 ixgbe_sysctl_rx_copy_len, 0, 3431 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3432 aprint_error_dev(dev, "could not create sysctl\n"); 3433 3434 if (sysctl_createv(log, 0, &rnode, &cnode, 3435 CTLFLAG_READONLY, CTLTYPE_INT, 3436 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3437 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3438 aprint_error_dev(dev, "could not create sysctl\n"); 3439 3440 if (sysctl_createv(log, 0, &rnode, &cnode, 3441 CTLFLAG_READONLY, CTLTYPE_INT, 3442 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3443 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3444 aprint_error_dev(dev, "could not create sysctl\n"); 3445 3446 if (sysctl_createv(log, 0, &rnode, &cnode, 3447 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3448 SYSCTL_DESCR("max number of RX packets to process"), 3449 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3450 CTL_EOL) != 0) 3451 aprint_error_dev(dev, "could not create sysctl\n"); 3452 3453 if (sysctl_createv(log, 0, &rnode, &cnode, 3454 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3455 SYSCTL_DESCR("max number of TX packets to process"), 3456 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3457 CTL_EOL) != 0) 3458 aprint_error_dev(dev, "could not create sysctl\n"); 3459 3460 if (sysctl_createv(log, 0, &rnode, &cnode, 3461 CTLFLAG_READONLY, CTLTYPE_INT, 3462 "num_queues", SYSCTL_DESCR("Number of queues"), 3463 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3464 aprint_error_dev(dev, "could not create sysctl\n"); 3465 3466 /* Sysctls for all devices */ 3467 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3468 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3469 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3470 CTL_EOL) != 0) 3471 aprint_error_dev(dev, "could not create sysctl\n"); 3472 3473 sc->enable_aim = ixgbe_enable_aim; 3474 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3475 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3476 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3477 aprint_error_dev(dev, "could not create sysctl\n"); 3478 3479 if (sysctl_createv(log, 0, &rnode, &cnode, 3480 CTLFLAG_READWRITE, CTLTYPE_INT, 3481 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3482 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3483 CTL_EOL) != 0) 3484 aprint_error_dev(dev, "could not create sysctl\n"); 3485 3486 /* 3487 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3488 * it causesflip-flopping softint/workqueue mode in one deferred 3489 * processing. Therefore, preempt_disable()/preempt_enable() are 3490 * required in ixgbe_sched_handle_que() to avoid 3491 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3492 * I think changing "que->txrx_use_workqueue" in interrupt handler 3493 * is lighter than doing preempt_disable()/preempt_enable() in every 3494 * ixgbe_sched_handle_que(). 3495 */ 3496 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3497 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3498 CTLTYPE_BOOL, "txrx_workqueue", 3499 SYSCTL_DESCR("Use workqueue for packet processing"), 3500 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3501 CTL_EOL) != 0) 3502 aprint_error_dev(dev, "could not create sysctl\n"); 3503 3504 #ifdef IXGBE_DEBUG 3505 /* testing sysctls (for all devices) */ 3506 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3507 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3508 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3509 CTL_EOL) != 0) 3510 aprint_error_dev(dev, "could not create sysctl\n"); 3511 3512 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3513 CTLTYPE_STRING, "print_rss_config", 3514 SYSCTL_DESCR("Prints RSS Configuration"), 3515 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3516 CTL_EOL) != 0) 3517 aprint_error_dev(dev, "could not create sysctl\n"); 3518 #endif 3519 /* for X550 series devices */ 3520 if (hw->mac.type >= ixgbe_mac_X550) 3521 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3522 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3523 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3524 CTL_EOL) != 0) 3525 aprint_error_dev(dev, "could not create sysctl\n"); 3526 3527 /* for WoL-capable devices */ 3528 if (sc->wol_support) { 3529 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3530 CTLTYPE_BOOL, "wol_enable", 3531 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3532 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3533 CTL_EOL) != 0) 3534 aprint_error_dev(dev, "could not create sysctl\n"); 3535 3536 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3537 CTLTYPE_INT, "wufc", 3538 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3539 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3540 CTL_EOL) != 0) 3541 aprint_error_dev(dev, "could not create sysctl\n"); 3542 } 3543 3544 /* for X552/X557-AT devices */ 3545 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3546 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3547 const struct sysctlnode *phy_node; 3548 3549 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3550 "phy", SYSCTL_DESCR("External PHY sysctls"), 3551 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3552 aprint_error_dev(dev, "could not create sysctl\n"); 3553 return; 3554 } 3555 3556 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3557 CTLTYPE_INT, "temp", 3558 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3559 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3560 CTL_EOL) != 0) 3561 aprint_error_dev(dev, "could not create sysctl\n"); 3562 3563 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3564 CTLTYPE_INT, "overtemp_occurred", 3565 SYSCTL_DESCR( 3566 "External PHY High Temperature Event Occurred"), 3567 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3568 CTL_CREATE, CTL_EOL) != 0) 3569 aprint_error_dev(dev, "could not create sysctl\n"); 3570 } 3571 3572 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3573 && (hw->phy.type == ixgbe_phy_fw)) 3574 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3575 CTLTYPE_BOOL, "force_10_100_autonego", 3576 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3577 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3578 CTL_CREATE, CTL_EOL) != 0) 3579 aprint_error_dev(dev, "could not create sysctl\n"); 3580 3581 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3582 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3583 CTLTYPE_INT, "eee_state", 3584 SYSCTL_DESCR("EEE Power Save State"), 3585 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3586 CTL_EOL) != 0) 3587 aprint_error_dev(dev, "could not create sysctl\n"); 3588 } 3589 } /* ixgbe_add_device_sysctls */ 3590 3591 /************************************************************************ 3592 * ixgbe_allocate_pci_resources 3593 ************************************************************************/ 3594 static int 3595 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3596 const struct pci_attach_args *pa) 3597 { 3598 pcireg_t memtype, csr; 3599 device_t dev = sc->dev; 3600 bus_addr_t addr; 3601 int flags; 3602 3603 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3604 switch (memtype) { 3605 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3606 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3607 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3608 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3609 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3610 goto map_err; 3611 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3612 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3613 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3614 } 3615 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3616 sc->osdep.mem_size, flags, 3617 &sc->osdep.mem_bus_space_handle) != 0) { 3618 map_err: 3619 sc->osdep.mem_size = 0; 3620 aprint_error_dev(dev, "unable to map BAR0\n"); 3621 return ENXIO; 3622 } 3623 /* 3624 * Enable address decoding for memory range in case BIOS or 3625 * UEFI don't set it. 3626 */ 3627 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3628 PCI_COMMAND_STATUS_REG); 3629 csr |= PCI_COMMAND_MEM_ENABLE; 3630 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3631 csr); 3632 break; 3633 default: 3634 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3635 return ENXIO; 3636 } 3637 3638 return (0); 3639 } /* ixgbe_allocate_pci_resources */ 3640 3641 static void 3642 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3643 { 3644 struct ix_queue *que = sc->queues; 3645 struct tx_ring *txr = sc->tx_rings; 3646 int i; 3647 3648 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3649 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3650 if (txr->txr_si != NULL) 3651 softint_disestablish(txr->txr_si); 3652 } 3653 if (que->que_si != NULL) 3654 softint_disestablish(que->que_si); 3655 } 3656 if (sc->txr_wq != NULL) 3657 workqueue_destroy(sc->txr_wq); 3658 if (sc->txr_wq_enqueued != NULL) 3659 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3660 if (sc->que_wq != NULL) 3661 workqueue_destroy(sc->que_wq); 3662 3663 if (sc->admin_wq != NULL) { 3664 workqueue_destroy(sc->admin_wq); 3665 sc->admin_wq = NULL; 3666 } 3667 if (sc->timer_wq != NULL) { 3668 workqueue_destroy(sc->timer_wq); 3669 sc->timer_wq = NULL; 3670 } 3671 if (sc->recovery_mode_timer_wq != NULL) { 3672 /* 3673 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3674 * the recovery_mode_timer workqueue, so call it here. 3675 */ 3676 workqueue_wait(sc->recovery_mode_timer_wq, 3677 &sc->recovery_mode_timer_wc); 3678 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3679 workqueue_destroy(sc->recovery_mode_timer_wq); 3680 sc->recovery_mode_timer_wq = NULL; 3681 } 3682 } /* ixgbe_free_deferred_handlers */ 3683 3684 /************************************************************************ 3685 * ixgbe_detach - Device removal routine 3686 * 3687 * Called when the driver is being removed. 3688 * Stops the adapter and deallocates all the resources 3689 * that were allocated for driver operation. 3690 * 3691 * return 0 on success, positive on failure 3692 ************************************************************************/ 3693 static int 3694 ixgbe_detach(device_t dev, int flags) 3695 { 3696 struct ixgbe_softc *sc = device_private(dev); 3697 struct rx_ring *rxr = sc->rx_rings; 3698 struct tx_ring *txr = sc->tx_rings; 3699 struct ixgbe_hw *hw = &sc->hw; 3700 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3701 u32 ctrl_ext; 3702 int i; 3703 3704 INIT_DEBUGOUT("ixgbe_detach: begin"); 3705 if (sc->osdep.attached == false) 3706 return 0; 3707 3708 if (ixgbe_pci_iov_detach(dev) != 0) { 3709 device_printf(dev, "SR-IOV in use; detach first.\n"); 3710 return (EBUSY); 3711 } 3712 3713 if (VLAN_ATTACHED(&sc->osdep.ec) && 3714 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3715 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3716 return (EBUSY); 3717 } 3718 3719 ether_ifdetach(sc->ifp); 3720 3721 sc->osdep.detaching = true; 3722 /* 3723 * Stop the interface. ixgbe_setup_low_power_mode() calls 3724 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3725 * directly. 3726 */ 3727 ixgbe_setup_low_power_mode(sc); 3728 3729 callout_halt(&sc->timer, NULL); 3730 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3731 callout_halt(&sc->recovery_mode_timer, NULL); 3732 3733 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3734 atomic_store_relaxed(&sc->admin_pending, 0); 3735 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3736 atomic_store_relaxed(&sc->timer_pending, 0); 3737 3738 pmf_device_deregister(dev); 3739 3740 ixgbe_free_deferred_handlers(sc); 3741 3742 /* let hardware know driver is unloading */ 3743 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3744 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3745 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3746 3747 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3748 netmap_detach(sc->ifp); 3749 3750 ixgbe_free_pci_resources(sc); 3751 #if 0 /* XXX the NetBSD port is probably missing something here */ 3752 bus_generic_detach(dev); 3753 #endif 3754 if_detach(sc->ifp); 3755 ifmedia_fini(&sc->media); 3756 if_percpuq_destroy(sc->ipq); 3757 3758 sysctl_teardown(&sc->sysctllog); 3759 evcnt_detach(&sc->efbig_tx_dma_setup); 3760 evcnt_detach(&sc->mbuf_defrag_failed); 3761 evcnt_detach(&sc->efbig2_tx_dma_setup); 3762 evcnt_detach(&sc->einval_tx_dma_setup); 3763 evcnt_detach(&sc->other_tx_dma_setup); 3764 evcnt_detach(&sc->eagain_tx_dma_setup); 3765 evcnt_detach(&sc->enomem_tx_dma_setup); 3766 evcnt_detach(&sc->watchdog_events); 3767 evcnt_detach(&sc->tso_err); 3768 evcnt_detach(&sc->admin_irqev); 3769 evcnt_detach(&sc->link_workev); 3770 evcnt_detach(&sc->mod_workev); 3771 evcnt_detach(&sc->msf_workev); 3772 evcnt_detach(&sc->phy_workev); 3773 3774 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3775 if (i < __arraycount(stats->mpc)) { 3776 evcnt_detach(&stats->mpc[i]); 3777 if (hw->mac.type == ixgbe_mac_82598EB) 3778 evcnt_detach(&stats->rnbc[i]); 3779 } 3780 if (i < __arraycount(stats->pxontxc)) { 3781 evcnt_detach(&stats->pxontxc[i]); 3782 evcnt_detach(&stats->pxonrxc[i]); 3783 evcnt_detach(&stats->pxofftxc[i]); 3784 evcnt_detach(&stats->pxoffrxc[i]); 3785 if (hw->mac.type >= ixgbe_mac_82599EB) 3786 evcnt_detach(&stats->pxon2offc[i]); 3787 } 3788 } 3789 3790 txr = sc->tx_rings; 3791 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3792 evcnt_detach(&sc->queues[i].irqs); 3793 evcnt_detach(&sc->queues[i].handleq); 3794 evcnt_detach(&sc->queues[i].req); 3795 evcnt_detach(&txr->total_packets); 3796 #ifndef IXGBE_LEGACY_TX 3797 evcnt_detach(&txr->pcq_drops); 3798 #endif 3799 evcnt_detach(&txr->no_desc_avail); 3800 evcnt_detach(&txr->tso_tx); 3801 3802 if (i < __arraycount(stats->qprc)) { 3803 evcnt_detach(&stats->qprc[i]); 3804 evcnt_detach(&stats->qptc[i]); 3805 evcnt_detach(&stats->qbrc[i]); 3806 evcnt_detach(&stats->qbtc[i]); 3807 if (hw->mac.type >= ixgbe_mac_82599EB) 3808 evcnt_detach(&stats->qprdc[i]); 3809 } 3810 3811 evcnt_detach(&rxr->rx_packets); 3812 evcnt_detach(&rxr->rx_bytes); 3813 evcnt_detach(&rxr->rx_copies); 3814 evcnt_detach(&rxr->no_mbuf); 3815 evcnt_detach(&rxr->rx_discarded); 3816 } 3817 evcnt_detach(&stats->ipcs); 3818 evcnt_detach(&stats->l4cs); 3819 evcnt_detach(&stats->ipcs_bad); 3820 evcnt_detach(&stats->l4cs_bad); 3821 evcnt_detach(&stats->intzero); 3822 evcnt_detach(&stats->legint); 3823 evcnt_detach(&stats->crcerrs); 3824 evcnt_detach(&stats->illerrc); 3825 evcnt_detach(&stats->errbc); 3826 evcnt_detach(&stats->mspdc); 3827 if (hw->mac.type >= ixgbe_mac_X550) 3828 evcnt_detach(&stats->mbsdc); 3829 evcnt_detach(&stats->mpctotal); 3830 evcnt_detach(&stats->mlfc); 3831 evcnt_detach(&stats->mrfc); 3832 if (hw->mac.type == ixgbe_mac_X550EM_a) 3833 evcnt_detach(&stats->link_dn_cnt); 3834 evcnt_detach(&stats->rlec); 3835 evcnt_detach(&stats->lxontxc); 3836 evcnt_detach(&stats->lxonrxc); 3837 evcnt_detach(&stats->lxofftxc); 3838 evcnt_detach(&stats->lxoffrxc); 3839 3840 /* Packet Reception Stats */ 3841 evcnt_detach(&stats->tor); 3842 evcnt_detach(&stats->gorc); 3843 evcnt_detach(&stats->tpr); 3844 evcnt_detach(&stats->gprc); 3845 evcnt_detach(&stats->mprc); 3846 evcnt_detach(&stats->bprc); 3847 evcnt_detach(&stats->prc64); 3848 evcnt_detach(&stats->prc127); 3849 evcnt_detach(&stats->prc255); 3850 evcnt_detach(&stats->prc511); 3851 evcnt_detach(&stats->prc1023); 3852 evcnt_detach(&stats->prc1522); 3853 evcnt_detach(&stats->ruc); 3854 evcnt_detach(&stats->rfc); 3855 evcnt_detach(&stats->roc); 3856 evcnt_detach(&stats->rjc); 3857 evcnt_detach(&stats->mngprc); 3858 evcnt_detach(&stats->mngpdc); 3859 evcnt_detach(&stats->xec); 3860 3861 /* Packet Transmission Stats */ 3862 evcnt_detach(&stats->gotc); 3863 evcnt_detach(&stats->tpt); 3864 evcnt_detach(&stats->gptc); 3865 evcnt_detach(&stats->bptc); 3866 evcnt_detach(&stats->mptc); 3867 evcnt_detach(&stats->mngptc); 3868 evcnt_detach(&stats->ptc64); 3869 evcnt_detach(&stats->ptc127); 3870 evcnt_detach(&stats->ptc255); 3871 evcnt_detach(&stats->ptc511); 3872 evcnt_detach(&stats->ptc1023); 3873 evcnt_detach(&stats->ptc1522); 3874 3875 ixgbe_free_queues(sc); 3876 free(sc->mta, M_DEVBUF); 3877 3878 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3879 IXGBE_CORE_LOCK_DESTROY(sc); 3880 3881 return (0); 3882 } /* ixgbe_detach */ 3883 3884 /************************************************************************ 3885 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3886 * 3887 * Prepare the adapter/port for LPLU and/or WoL 3888 ************************************************************************/ 3889 static int 3890 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3891 { 3892 struct ixgbe_hw *hw = &sc->hw; 3893 device_t dev = sc->dev; 3894 struct ifnet *ifp = sc->ifp; 3895 s32 error = 0; 3896 3897 /* Limit power management flow to X550EM baseT */ 3898 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3899 hw->phy.ops.enter_lplu) { 3900 /* X550EM baseT adapters need a special LPLU flow */ 3901 hw->phy.reset_disable = true; 3902 ixgbe_ifstop(ifp, 1); 3903 error = hw->phy.ops.enter_lplu(hw); 3904 if (error) 3905 device_printf(dev, 3906 "Error entering LPLU: %d\n", error); 3907 hw->phy.reset_disable = false; 3908 } else { 3909 /* Just stop for other adapters */ 3910 ixgbe_ifstop(ifp, 1); 3911 } 3912 3913 IXGBE_CORE_LOCK(sc); 3914 3915 if (!hw->wol_enabled) { 3916 ixgbe_set_phy_power(hw, FALSE); 3917 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3918 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3919 } else { 3920 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3921 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3922 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3923 3924 /* 3925 * Clear Wake Up Status register to prevent any previous wakeup 3926 * events from waking us up immediately after we suspend. 3927 */ 3928 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3929 3930 /* 3931 * Program the Wakeup Filter Control register with user filter 3932 * settings 3933 */ 3934 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3935 3936 /* Enable wakeups and power management in Wakeup Control */ 3937 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3938 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3939 } 3940 3941 IXGBE_CORE_UNLOCK(sc); 3942 3943 return error; 3944 } /* ixgbe_setup_low_power_mode */ 3945 3946 /************************************************************************ 3947 * ixgbe_shutdown - Shutdown entry point 3948 ************************************************************************/ 3949 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3950 static int 3951 ixgbe_shutdown(device_t dev) 3952 { 3953 struct ixgbe_softc *sc = device_private(dev); 3954 int error = 0; 3955 3956 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3957 3958 error = ixgbe_setup_low_power_mode(sc); 3959 3960 return (error); 3961 } /* ixgbe_shutdown */ 3962 #endif 3963 3964 /************************************************************************ 3965 * ixgbe_suspend 3966 * 3967 * From D0 to D3 3968 ************************************************************************/ 3969 static bool 3970 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3971 { 3972 struct ixgbe_softc *sc = device_private(dev); 3973 int error = 0; 3974 3975 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3976 3977 error = ixgbe_setup_low_power_mode(sc); 3978 3979 return (error); 3980 } /* ixgbe_suspend */ 3981 3982 /************************************************************************ 3983 * ixgbe_resume 3984 * 3985 * From D3 to D0 3986 ************************************************************************/ 3987 static bool 3988 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 3989 { 3990 struct ixgbe_softc *sc = device_private(dev); 3991 struct ifnet *ifp = sc->ifp; 3992 struct ixgbe_hw *hw = &sc->hw; 3993 u32 wus; 3994 3995 INIT_DEBUGOUT("ixgbe_resume: begin"); 3996 3997 IXGBE_CORE_LOCK(sc); 3998 3999 /* Read & clear WUS register */ 4000 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4001 if (wus) 4002 device_printf(dev, "Woken up by (WUS): %#010x\n", 4003 IXGBE_READ_REG(hw, IXGBE_WUS)); 4004 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4005 /* And clear WUFC until next low-power transition */ 4006 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4007 4008 /* 4009 * Required after D3->D0 transition; 4010 * will re-advertise all previous advertised speeds 4011 */ 4012 if (ifp->if_flags & IFF_UP) 4013 ixgbe_init_locked(sc); 4014 4015 IXGBE_CORE_UNLOCK(sc); 4016 4017 return true; 4018 } /* ixgbe_resume */ 4019 4020 /* 4021 * Set the various hardware offload abilities. 4022 * 4023 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4024 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4025 * mbuf offload flags the driver will understand. 4026 */ 4027 static void 4028 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4029 { 4030 /* XXX */ 4031 } 4032 4033 /************************************************************************ 4034 * ixgbe_init_locked - Init entry point 4035 * 4036 * Used in two ways: It is used by the stack as an init 4037 * entry point in network interface structure. It is also 4038 * used by the driver as a hw/sw initialization routine to 4039 * get to a consistent state. 4040 * 4041 * return 0 on success, positive on failure 4042 ************************************************************************/ 4043 static void 4044 ixgbe_init_locked(struct ixgbe_softc *sc) 4045 { 4046 struct ifnet *ifp = sc->ifp; 4047 device_t dev = sc->dev; 4048 struct ixgbe_hw *hw = &sc->hw; 4049 struct ix_queue *que; 4050 struct tx_ring *txr; 4051 struct rx_ring *rxr; 4052 u32 txdctl, mhadd; 4053 u32 rxdctl, rxctrl; 4054 u32 ctrl_ext; 4055 bool unsupported_sfp = false; 4056 int i, j, error; 4057 4058 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4059 4060 KASSERT(mutex_owned(&sc->core_mtx)); 4061 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4062 4063 hw->need_unsupported_sfp_recovery = false; 4064 hw->adapter_stopped = FALSE; 4065 ixgbe_stop_adapter(hw); 4066 callout_stop(&sc->timer); 4067 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4068 callout_stop(&sc->recovery_mode_timer); 4069 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4070 que->disabled_count = 0; 4071 4072 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4073 sc->max_frame_size = 4074 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4075 4076 /* Queue indices may change with IOV mode */ 4077 ixgbe_align_all_queue_indices(sc); 4078 4079 /* reprogram the RAR[0] in case user changed it. */ 4080 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4081 4082 /* Get the latest mac address, User can use a LAA */ 4083 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4084 IXGBE_ETH_LENGTH_OF_ADDRESS); 4085 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4086 hw->addr_ctrl.rar_used_count = 1; 4087 4088 /* Set hardware offload abilities from ifnet flags */ 4089 ixgbe_set_if_hwassist(sc); 4090 4091 /* Prepare transmit descriptors and buffers */ 4092 if (ixgbe_setup_transmit_structures(sc)) { 4093 device_printf(dev, "Could not setup transmit structures\n"); 4094 ixgbe_stop_locked(sc); 4095 return; 4096 } 4097 4098 ixgbe_init_hw(hw); 4099 4100 ixgbe_initialize_iov(sc); 4101 4102 ixgbe_initialize_transmit_units(sc); 4103 4104 /* Setup Multicast table */ 4105 ixgbe_set_rxfilter(sc); 4106 4107 /* Use fixed buffer size, even for jumbo frames */ 4108 sc->rx_mbuf_sz = MCLBYTES; 4109 4110 /* Prepare receive descriptors and buffers */ 4111 error = ixgbe_setup_receive_structures(sc); 4112 if (error) { 4113 device_printf(dev, 4114 "Could not setup receive structures (err = %d)\n", error); 4115 ixgbe_stop_locked(sc); 4116 return; 4117 } 4118 4119 /* Configure RX settings */ 4120 ixgbe_initialize_receive_units(sc); 4121 4122 /* Initialize variable holding task enqueue requests interrupts */ 4123 sc->task_requests = 0; 4124 4125 /* Enable SDP & MSI-X interrupts based on adapter */ 4126 ixgbe_config_gpie(sc); 4127 4128 /* Set MTU size */ 4129 if (ifp->if_mtu > ETHERMTU) { 4130 /* aka IXGBE_MAXFRS on 82599 and newer */ 4131 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4132 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4133 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4134 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4135 } 4136 4137 /* Now enable all the queues */ 4138 for (i = 0; i < sc->num_queues; i++) { 4139 txr = &sc->tx_rings[i]; 4140 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4141 txdctl |= IXGBE_TXDCTL_ENABLE; 4142 /* Set WTHRESH to 8, burst writeback */ 4143 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4144 /* 4145 * When the internal queue falls below PTHRESH (32), 4146 * start prefetching as long as there are at least 4147 * HTHRESH (1) buffers ready. The values are taken 4148 * from the Intel linux driver 3.8.21. 4149 * Prefetching enables tx line rate even with 1 queue. 4150 */ 4151 txdctl |= (32 << 0) | (1 << 8); 4152 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4153 } 4154 4155 for (i = 0; i < sc->num_queues; i++) { 4156 rxr = &sc->rx_rings[i]; 4157 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4158 if (hw->mac.type == ixgbe_mac_82598EB) { 4159 /* 4160 * PTHRESH = 21 4161 * HTHRESH = 4 4162 * WTHRESH = 8 4163 */ 4164 rxdctl &= ~0x3FFFFF; 4165 rxdctl |= 0x080420; 4166 } 4167 rxdctl |= IXGBE_RXDCTL_ENABLE; 4168 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4169 for (j = 0; j < 10; j++) { 4170 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4171 IXGBE_RXDCTL_ENABLE) 4172 break; 4173 else 4174 msec_delay(1); 4175 } 4176 IXGBE_WRITE_BARRIER(hw); 4177 4178 /* 4179 * In netmap mode, we must preserve the buffers made 4180 * available to userspace before the if_init() 4181 * (this is true by default on the TX side, because 4182 * init makes all buffers available to userspace). 4183 * 4184 * netmap_reset() and the device specific routines 4185 * (e.g. ixgbe_setup_receive_rings()) map these 4186 * buffers at the end of the NIC ring, so here we 4187 * must set the RDT (tail) register to make sure 4188 * they are not overwritten. 4189 * 4190 * In this driver the NIC ring starts at RDH = 0, 4191 * RDT points to the last slot available for reception (?), 4192 * so RDT = num_rx_desc - 1 means the whole ring is available. 4193 */ 4194 #ifdef DEV_NETMAP 4195 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4196 (ifp->if_capenable & IFCAP_NETMAP)) { 4197 struct netmap_adapter *na = NA(sc->ifp); 4198 struct netmap_kring *kring = na->rx_rings[i]; 4199 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4200 4201 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4202 } else 4203 #endif /* DEV_NETMAP */ 4204 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4205 sc->num_rx_desc - 1); 4206 } 4207 4208 /* Enable Receive engine */ 4209 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4210 if (hw->mac.type == ixgbe_mac_82598EB) 4211 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4212 rxctrl |= IXGBE_RXCTRL_RXEN; 4213 ixgbe_enable_rx_dma(hw, rxctrl); 4214 4215 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4216 atomic_store_relaxed(&sc->timer_pending, 0); 4217 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4218 callout_reset(&sc->recovery_mode_timer, hz, 4219 ixgbe_recovery_mode_timer, sc); 4220 4221 /* Set up MSI/MSI-X routing */ 4222 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4223 ixgbe_configure_ivars(sc); 4224 /* Set up auto-mask */ 4225 if (hw->mac.type == ixgbe_mac_82598EB) 4226 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4227 else { 4228 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4229 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4230 } 4231 } else { /* Simple settings for Legacy/MSI */ 4232 ixgbe_set_ivar(sc, 0, 0, 0); 4233 ixgbe_set_ivar(sc, 0, 0, 1); 4234 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4235 } 4236 4237 ixgbe_init_fdir(sc); 4238 4239 /* 4240 * Check on any SFP devices that 4241 * need to be kick-started 4242 */ 4243 if (hw->phy.type == ixgbe_phy_none) { 4244 error = hw->phy.ops.identify(hw); 4245 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4246 unsupported_sfp = true; 4247 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4248 unsupported_sfp = true; 4249 4250 if (unsupported_sfp) 4251 device_printf(dev, 4252 "Unsupported SFP+ module type was detected.\n"); 4253 4254 /* Set moderation on the Link interrupt */ 4255 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4256 4257 /* Enable EEE power saving */ 4258 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4259 hw->mac.ops.setup_eee(hw, 4260 sc->feat_en & IXGBE_FEATURE_EEE); 4261 4262 /* Enable power to the phy. */ 4263 if (!unsupported_sfp) { 4264 ixgbe_set_phy_power(hw, TRUE); 4265 4266 /* Config/Enable Link */ 4267 ixgbe_config_link(sc); 4268 } 4269 4270 /* Hardware Packet Buffer & Flow Control setup */ 4271 ixgbe_config_delay_values(sc); 4272 4273 /* Initialize the FC settings */ 4274 ixgbe_start_hw(hw); 4275 4276 /* Set up VLAN support and filter */ 4277 ixgbe_setup_vlan_hw_support(sc); 4278 4279 /* Setup DMA Coalescing */ 4280 ixgbe_config_dmac(sc); 4281 4282 /* OK to schedule workqueues. */ 4283 sc->schedule_wqs_ok = true; 4284 4285 /* And now turn on interrupts */ 4286 ixgbe_enable_intr(sc); 4287 4288 /* Enable the use of the MBX by the VF's */ 4289 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4290 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4291 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4292 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4293 } 4294 4295 /* Update saved flags. See ixgbe_ifflags_cb() */ 4296 sc->if_flags = ifp->if_flags; 4297 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4298 4299 /* Now inform the stack we're ready */ 4300 ifp->if_flags |= IFF_RUNNING; 4301 4302 return; 4303 } /* ixgbe_init_locked */ 4304 4305 /************************************************************************ 4306 * ixgbe_init 4307 ************************************************************************/ 4308 static int 4309 ixgbe_init(struct ifnet *ifp) 4310 { 4311 struct ixgbe_softc *sc = ifp->if_softc; 4312 4313 IXGBE_CORE_LOCK(sc); 4314 ixgbe_init_locked(sc); 4315 IXGBE_CORE_UNLOCK(sc); 4316 4317 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4318 } /* ixgbe_init */ 4319 4320 /************************************************************************ 4321 * ixgbe_set_ivar 4322 * 4323 * Setup the correct IVAR register for a particular MSI-X interrupt 4324 * (yes this is all very magic and confusing :) 4325 * - entry is the register array entry 4326 * - vector is the MSI-X vector for this queue 4327 * - type is RX/TX/MISC 4328 ************************************************************************/ 4329 static void 4330 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4331 { 4332 struct ixgbe_hw *hw = &sc->hw; 4333 u32 ivar, index; 4334 4335 vector |= IXGBE_IVAR_ALLOC_VAL; 4336 4337 switch (hw->mac.type) { 4338 case ixgbe_mac_82598EB: 4339 if (type == -1) 4340 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4341 else 4342 entry += (type * 64); 4343 index = (entry >> 2) & 0x1F; 4344 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4345 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4346 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4347 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4348 break; 4349 case ixgbe_mac_82599EB: 4350 case ixgbe_mac_X540: 4351 case ixgbe_mac_X550: 4352 case ixgbe_mac_X550EM_x: 4353 case ixgbe_mac_X550EM_a: 4354 if (type == -1) { /* MISC IVAR */ 4355 index = (entry & 1) * 8; 4356 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4357 ivar &= ~(0xffUL << index); 4358 ivar |= ((u32)vector << index); 4359 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4360 } else { /* RX/TX IVARS */ 4361 index = (16 * (entry & 1)) + (8 * type); 4362 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4363 ivar &= ~(0xffUL << index); 4364 ivar |= ((u32)vector << index); 4365 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4366 } 4367 break; 4368 default: 4369 break; 4370 } 4371 } /* ixgbe_set_ivar */ 4372 4373 /************************************************************************ 4374 * ixgbe_configure_ivars 4375 ************************************************************************/ 4376 static void 4377 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4378 { 4379 struct ix_queue *que = sc->queues; 4380 u32 newitr; 4381 4382 if (ixgbe_max_interrupt_rate > 0) 4383 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4384 else { 4385 /* 4386 * Disable DMA coalescing if interrupt moderation is 4387 * disabled. 4388 */ 4389 sc->dmac = 0; 4390 newitr = 0; 4391 } 4392 4393 for (int i = 0; i < sc->num_queues; i++, que++) { 4394 struct rx_ring *rxr = &sc->rx_rings[i]; 4395 struct tx_ring *txr = &sc->tx_rings[i]; 4396 /* First the RX queue entry */ 4397 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4398 /* ... and the TX */ 4399 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4400 /* Set an Initial EITR value */ 4401 ixgbe_eitr_write(sc, que->msix, newitr); 4402 /* 4403 * To eliminate influence of the previous state. 4404 * At this point, Tx/Rx interrupt handler 4405 * (ixgbe_msix_que()) cannot be called, so both 4406 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4407 */ 4408 que->eitr_setting = 0; 4409 } 4410 4411 /* For the Link interrupt */ 4412 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4413 } /* ixgbe_configure_ivars */ 4414 4415 /************************************************************************ 4416 * ixgbe_config_gpie 4417 ************************************************************************/ 4418 static void 4419 ixgbe_config_gpie(struct ixgbe_softc *sc) 4420 { 4421 struct ixgbe_hw *hw = &sc->hw; 4422 u32 gpie; 4423 4424 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4425 4426 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4427 /* Enable Enhanced MSI-X mode */ 4428 gpie |= IXGBE_GPIE_MSIX_MODE 4429 | IXGBE_GPIE_EIAME 4430 | IXGBE_GPIE_PBA_SUPPORT 4431 | IXGBE_GPIE_OCD; 4432 } 4433 4434 /* Fan Failure Interrupt */ 4435 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4436 gpie |= IXGBE_SDP1_GPIEN; 4437 4438 /* Thermal Sensor Interrupt */ 4439 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4440 gpie |= IXGBE_SDP0_GPIEN_X540; 4441 4442 /* Link detection */ 4443 switch (hw->mac.type) { 4444 case ixgbe_mac_82599EB: 4445 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4446 break; 4447 case ixgbe_mac_X550EM_x: 4448 case ixgbe_mac_X550EM_a: 4449 gpie |= IXGBE_SDP0_GPIEN_X540; 4450 break; 4451 default: 4452 break; 4453 } 4454 4455 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4456 4457 } /* ixgbe_config_gpie */ 4458 4459 /************************************************************************ 4460 * ixgbe_config_delay_values 4461 * 4462 * Requires sc->max_frame_size to be set. 4463 ************************************************************************/ 4464 static void 4465 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4466 { 4467 struct ixgbe_hw *hw = &sc->hw; 4468 u32 rxpb, frame, size, tmp; 4469 4470 frame = sc->max_frame_size; 4471 4472 /* Calculate High Water */ 4473 switch (hw->mac.type) { 4474 case ixgbe_mac_X540: 4475 case ixgbe_mac_X550: 4476 case ixgbe_mac_X550EM_x: 4477 case ixgbe_mac_X550EM_a: 4478 tmp = IXGBE_DV_X540(frame, frame); 4479 break; 4480 default: 4481 tmp = IXGBE_DV(frame, frame); 4482 break; 4483 } 4484 size = IXGBE_BT2KB(tmp); 4485 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4486 hw->fc.high_water[0] = rxpb - size; 4487 4488 /* Now calculate Low Water */ 4489 switch (hw->mac.type) { 4490 case ixgbe_mac_X540: 4491 case ixgbe_mac_X550: 4492 case ixgbe_mac_X550EM_x: 4493 case ixgbe_mac_X550EM_a: 4494 tmp = IXGBE_LOW_DV_X540(frame); 4495 break; 4496 default: 4497 tmp = IXGBE_LOW_DV(frame); 4498 break; 4499 } 4500 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4501 4502 hw->fc.pause_time = IXGBE_FC_PAUSE; 4503 hw->fc.send_xon = TRUE; 4504 } /* ixgbe_config_delay_values */ 4505 4506 /************************************************************************ 4507 * ixgbe_set_rxfilter - Multicast Update 4508 * 4509 * Called whenever multicast address list is updated. 4510 ************************************************************************/ 4511 static void 4512 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4513 { 4514 struct ixgbe_mc_addr *mta; 4515 struct ifnet *ifp = sc->ifp; 4516 u8 *update_ptr; 4517 int mcnt = 0; 4518 u32 fctrl; 4519 struct ethercom *ec = &sc->osdep.ec; 4520 struct ether_multi *enm; 4521 struct ether_multistep step; 4522 4523 KASSERT(mutex_owned(&sc->core_mtx)); 4524 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4525 4526 mta = sc->mta; 4527 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4528 4529 ETHER_LOCK(ec); 4530 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4531 ETHER_FIRST_MULTI(step, ec, enm); 4532 while (enm != NULL) { 4533 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4534 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4535 ETHER_ADDR_LEN) != 0)) { 4536 ec->ec_flags |= ETHER_F_ALLMULTI; 4537 break; 4538 } 4539 bcopy(enm->enm_addrlo, 4540 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4541 mta[mcnt].vmdq = sc->pool; 4542 mcnt++; 4543 ETHER_NEXT_MULTI(step, enm); 4544 } 4545 4546 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4547 if (ifp->if_flags & IFF_PROMISC) 4548 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4549 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4550 fctrl |= IXGBE_FCTRL_MPE; 4551 fctrl &= ~IXGBE_FCTRL_UPE; 4552 } else 4553 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4554 4555 /* Update multicast filter entries only when it's not ALLMULTI */ 4556 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4557 ETHER_UNLOCK(ec); 4558 update_ptr = (u8 *)mta; 4559 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4560 ixgbe_mc_array_itr, TRUE); 4561 } else 4562 ETHER_UNLOCK(ec); 4563 4564 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4565 } /* ixgbe_set_rxfilter */ 4566 4567 /************************************************************************ 4568 * ixgbe_mc_array_itr 4569 * 4570 * An iterator function needed by the multicast shared code. 4571 * It feeds the shared code routine the addresses in the 4572 * array of ixgbe_set_rxfilter() one by one. 4573 ************************************************************************/ 4574 static u8 * 4575 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4576 { 4577 struct ixgbe_mc_addr *mta; 4578 4579 mta = (struct ixgbe_mc_addr *)*update_ptr; 4580 *vmdq = mta->vmdq; 4581 4582 *update_ptr = (u8*)(mta + 1); 4583 4584 return (mta->addr); 4585 } /* ixgbe_mc_array_itr */ 4586 4587 /************************************************************************ 4588 * ixgbe_local_timer - Timer routine 4589 * 4590 * Checks for link status, updates statistics, 4591 * and runs the watchdog check. 4592 ************************************************************************/ 4593 static void 4594 ixgbe_local_timer(void *arg) 4595 { 4596 struct ixgbe_softc *sc = arg; 4597 4598 if (sc->schedule_wqs_ok) { 4599 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4600 workqueue_enqueue(sc->timer_wq, 4601 &sc->timer_wc, NULL); 4602 } 4603 } 4604 4605 static void 4606 ixgbe_handle_timer(struct work *wk, void *context) 4607 { 4608 struct ixgbe_softc *sc = context; 4609 struct ixgbe_hw *hw = &sc->hw; 4610 device_t dev = sc->dev; 4611 struct ix_queue *que = sc->queues; 4612 u64 queues = 0; 4613 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4614 int hung = 0; 4615 int i; 4616 4617 IXGBE_CORE_LOCK(sc); 4618 4619 /* Check for pluggable optics */ 4620 if (ixgbe_is_sfp(hw)) { 4621 bool sched_mod_task = false; 4622 4623 if (hw->mac.type == ixgbe_mac_82598EB) { 4624 /* 4625 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4626 * any GPIO(SDP). So just schedule TASK_MOD. 4627 */ 4628 sched_mod_task = true; 4629 } else { 4630 bool was_full, is_full; 4631 4632 was_full = 4633 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4634 is_full = ixgbe_sfp_cage_full(hw); 4635 4636 /* Do probe if cage state changed */ 4637 if (was_full ^ is_full) 4638 sched_mod_task = true; 4639 } 4640 if (sched_mod_task) { 4641 mutex_enter(&sc->admin_mtx); 4642 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4643 ixgbe_schedule_admin_tasklet(sc); 4644 mutex_exit(&sc->admin_mtx); 4645 } 4646 } 4647 4648 ixgbe_update_link_status(sc); 4649 ixgbe_update_stats_counters(sc); 4650 4651 /* Update some event counters */ 4652 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4653 que = sc->queues; 4654 for (i = 0; i < sc->num_queues; i++, que++) { 4655 struct tx_ring *txr = que->txr; 4656 4657 v0 += txr->q_efbig_tx_dma_setup; 4658 v1 += txr->q_mbuf_defrag_failed; 4659 v2 += txr->q_efbig2_tx_dma_setup; 4660 v3 += txr->q_einval_tx_dma_setup; 4661 v4 += txr->q_other_tx_dma_setup; 4662 v5 += txr->q_eagain_tx_dma_setup; 4663 v6 += txr->q_enomem_tx_dma_setup; 4664 v7 += txr->q_tso_err; 4665 } 4666 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4667 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4668 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4669 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4670 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4671 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4672 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4673 IXGBE_EVC_STORE(&sc->tso_err, v7); 4674 4675 /* 4676 * Check the TX queues status 4677 * - mark hung queues so we don't schedule on them 4678 * - watchdog only if all queues show hung 4679 */ 4680 que = sc->queues; 4681 for (i = 0; i < sc->num_queues; i++, que++) { 4682 /* Keep track of queues with work for soft irq */ 4683 if (que->txr->busy) 4684 queues |= 1ULL << que->me; 4685 /* 4686 * Each time txeof runs without cleaning, but there 4687 * are uncleaned descriptors it increments busy. If 4688 * we get to the MAX we declare it hung. 4689 */ 4690 if (que->busy == IXGBE_QUEUE_HUNG) { 4691 ++hung; 4692 /* Mark the queue as inactive */ 4693 sc->active_queues &= ~(1ULL << que->me); 4694 continue; 4695 } else { 4696 /* Check if we've come back from hung */ 4697 if ((sc->active_queues & (1ULL << que->me)) == 0) 4698 sc->active_queues |= 1ULL << que->me; 4699 } 4700 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4701 device_printf(dev, 4702 "Warning queue %d appears to be hung!\n", i); 4703 que->txr->busy = IXGBE_QUEUE_HUNG; 4704 ++hung; 4705 } 4706 } 4707 4708 /* Only truly watchdog if all queues show hung */ 4709 if (hung == sc->num_queues) 4710 goto watchdog; 4711 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4712 else if (queues != 0) { /* Force an IRQ on queues with work */ 4713 que = sc->queues; 4714 for (i = 0; i < sc->num_queues; i++, que++) { 4715 mutex_enter(&que->dc_mtx); 4716 if (que->disabled_count == 0) 4717 ixgbe_rearm_queues(sc, 4718 queues & ((u64)1 << i)); 4719 mutex_exit(&que->dc_mtx); 4720 } 4721 } 4722 #endif 4723 4724 atomic_store_relaxed(&sc->timer_pending, 0); 4725 IXGBE_CORE_UNLOCK(sc); 4726 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4727 return; 4728 4729 watchdog: 4730 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4731 sc->ifp->if_flags &= ~IFF_RUNNING; 4732 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4733 ixgbe_init_locked(sc); 4734 IXGBE_CORE_UNLOCK(sc); 4735 } /* ixgbe_handle_timer */ 4736 4737 /************************************************************************ 4738 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4739 ************************************************************************/ 4740 static void 4741 ixgbe_recovery_mode_timer(void *arg) 4742 { 4743 struct ixgbe_softc *sc = arg; 4744 4745 if (__predict_true(sc->osdep.detaching == false)) { 4746 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4747 0, 1) == 0) { 4748 workqueue_enqueue(sc->recovery_mode_timer_wq, 4749 &sc->recovery_mode_timer_wc, NULL); 4750 } 4751 } 4752 } 4753 4754 static void 4755 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4756 { 4757 struct ixgbe_softc *sc = context; 4758 struct ixgbe_hw *hw = &sc->hw; 4759 4760 IXGBE_CORE_LOCK(sc); 4761 if (ixgbe_fw_recovery_mode(hw)) { 4762 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4763 /* Firmware error detected, entering recovery mode */ 4764 device_printf(sc->dev, 4765 "Firmware recovery mode detected. Limiting " 4766 "functionality. Refer to the Intel(R) Ethernet " 4767 "Adapters and Devices User Guide for details on " 4768 "firmware recovery mode.\n"); 4769 4770 if (hw->adapter_stopped == FALSE) 4771 ixgbe_stop_locked(sc); 4772 } 4773 } else 4774 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4775 4776 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4777 callout_reset(&sc->recovery_mode_timer, hz, 4778 ixgbe_recovery_mode_timer, sc); 4779 IXGBE_CORE_UNLOCK(sc); 4780 } /* ixgbe_handle_recovery_mode_timer */ 4781 4782 /************************************************************************ 4783 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4784 * bool int_en: true if it's called when the interrupt is enabled. 4785 ************************************************************************/ 4786 static void 4787 ixgbe_handle_mod(void *context, bool int_en) 4788 { 4789 struct ixgbe_softc *sc = context; 4790 struct ixgbe_hw *hw = &sc->hw; 4791 device_t dev = sc->dev; 4792 enum ixgbe_sfp_type last_sfp_type; 4793 u32 err; 4794 bool last_unsupported_sfp_recovery; 4795 4796 KASSERT(mutex_owned(&sc->core_mtx)); 4797 4798 last_sfp_type = hw->phy.sfp_type; 4799 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4800 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4801 if (sc->hw.need_crosstalk_fix) { 4802 if ((hw->mac.type != ixgbe_mac_82598EB) && 4803 !ixgbe_sfp_cage_full(hw)) 4804 goto out; 4805 } 4806 4807 err = hw->phy.ops.identify_sfp(hw); 4808 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4809 if (last_unsupported_sfp_recovery == false) 4810 device_printf(dev, 4811 "Unsupported SFP+ module type was detected.\n"); 4812 goto out; 4813 } 4814 4815 if (hw->need_unsupported_sfp_recovery) { 4816 device_printf(dev, "Recovering from unsupported SFP\n"); 4817 /* 4818 * We could recover the status by calling setup_sfp(), 4819 * setup_link() and some others. It's complex and might not 4820 * work correctly on some unknown cases. To avoid such type of 4821 * problem, call ixgbe_init_locked(). It's simple and safe 4822 * approach. 4823 */ 4824 ixgbe_init_locked(sc); 4825 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4826 (hw->phy.sfp_type != last_sfp_type)) { 4827 /* A module is inserted and changed. */ 4828 4829 if (hw->mac.type == ixgbe_mac_82598EB) 4830 err = hw->phy.ops.reset(hw); 4831 else { 4832 err = hw->mac.ops.setup_sfp(hw); 4833 hw->phy.sfp_setup_needed = FALSE; 4834 } 4835 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4836 device_printf(dev, 4837 "Setup failure - unsupported SFP+ module type.\n"); 4838 goto out; 4839 } 4840 } 4841 4842 out: 4843 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4844 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4845 4846 /* Adjust media types shown in ifconfig */ 4847 IXGBE_CORE_UNLOCK(sc); 4848 ifmedia_removeall(&sc->media); 4849 ixgbe_add_media_types(sc); 4850 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4851 IXGBE_CORE_LOCK(sc); 4852 4853 /* 4854 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4855 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4856 * flap because the function calls setup_link(). 4857 */ 4858 if (hw->mac.type != ixgbe_mac_82598EB) { 4859 mutex_enter(&sc->admin_mtx); 4860 if (int_en) 4861 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4862 else 4863 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4864 mutex_exit(&sc->admin_mtx); 4865 } 4866 4867 /* 4868 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4869 * the workqueue now. 4870 */ 4871 } /* ixgbe_handle_mod */ 4872 4873 4874 /************************************************************************ 4875 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4876 ************************************************************************/ 4877 static void 4878 ixgbe_handle_msf(void *context) 4879 { 4880 struct ixgbe_softc *sc = context; 4881 struct ixgbe_hw *hw = &sc->hw; 4882 u32 autoneg; 4883 bool negotiate; 4884 4885 KASSERT(mutex_owned(&sc->core_mtx)); 4886 4887 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4888 4889 autoneg = hw->phy.autoneg_advertised; 4890 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4891 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4892 if (hw->mac.ops.setup_link) 4893 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4894 } /* ixgbe_handle_msf */ 4895 4896 /************************************************************************ 4897 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4898 ************************************************************************/ 4899 static void 4900 ixgbe_handle_phy(void *context) 4901 { 4902 struct ixgbe_softc *sc = context; 4903 struct ixgbe_hw *hw = &sc->hw; 4904 int error; 4905 4906 KASSERT(mutex_owned(&sc->core_mtx)); 4907 4908 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4909 error = hw->phy.ops.handle_lasi(hw); 4910 if (error == IXGBE_ERR_OVERTEMP) 4911 device_printf(sc->dev, 4912 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4913 " PHY will downshift to lower power state!\n"); 4914 else if (error) 4915 device_printf(sc->dev, 4916 "Error handling LASI interrupt: %d\n", error); 4917 } /* ixgbe_handle_phy */ 4918 4919 static void 4920 ixgbe_handle_admin(struct work *wk, void *context) 4921 { 4922 struct ixgbe_softc *sc = context; 4923 struct ifnet *ifp = sc->ifp; 4924 struct ixgbe_hw *hw = &sc->hw; 4925 u32 task_requests; 4926 u32 eims_enable = 0; 4927 4928 mutex_enter(&sc->admin_mtx); 4929 sc->admin_pending = 0; 4930 task_requests = sc->task_requests; 4931 sc->task_requests = 0; 4932 mutex_exit(&sc->admin_mtx); 4933 4934 /* 4935 * Hold the IFNET_LOCK across this entire call. This will 4936 * prevent additional changes to sc->phy_layer 4937 * and serialize calls to this tasklet. We cannot hold the 4938 * CORE_LOCK while calling into the ifmedia functions as 4939 * they call ifmedia_lock() and the lock is CORE_LOCK. 4940 */ 4941 IFNET_LOCK(ifp); 4942 IXGBE_CORE_LOCK(sc); 4943 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4944 ixgbe_handle_link(sc); 4945 eims_enable |= IXGBE_EIMS_LSC; 4946 } 4947 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4948 ixgbe_handle_mod(sc, false); 4949 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4950 ixgbe_handle_mod(sc, true); 4951 if (hw->mac.type >= ixgbe_mac_X540) 4952 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4953 else 4954 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4955 } 4956 if ((task_requests 4957 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4958 ixgbe_handle_msf(sc); 4959 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4960 (hw->mac.type == ixgbe_mac_82599EB)) 4961 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4962 } 4963 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4964 ixgbe_handle_phy(sc); 4965 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4966 } 4967 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4968 ixgbe_reinit_fdir(sc); 4969 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4970 } 4971 #if 0 /* notyet */ 4972 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4973 ixgbe_handle_mbx(sc); 4974 eims_enable |= IXGBE_EIMS_MAILBOX; 4975 } 4976 #endif 4977 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 4978 4979 IXGBE_CORE_UNLOCK(sc); 4980 IFNET_UNLOCK(ifp); 4981 } /* ixgbe_handle_admin */ 4982 4983 static void 4984 ixgbe_ifstop(struct ifnet *ifp, int disable) 4985 { 4986 struct ixgbe_softc *sc = ifp->if_softc; 4987 4988 IXGBE_CORE_LOCK(sc); 4989 ixgbe_stop_locked(sc); 4990 IXGBE_CORE_UNLOCK(sc); 4991 4992 workqueue_wait(sc->timer_wq, &sc->timer_wc); 4993 atomic_store_relaxed(&sc->timer_pending, 0); 4994 } 4995 4996 /************************************************************************ 4997 * ixgbe_stop_locked - Stop the hardware 4998 * 4999 * Disables all traffic on the adapter by issuing a 5000 * global reset on the MAC and deallocates TX/RX buffers. 5001 ************************************************************************/ 5002 static void 5003 ixgbe_stop_locked(void *arg) 5004 { 5005 struct ifnet *ifp; 5006 struct ixgbe_softc *sc = arg; 5007 struct ixgbe_hw *hw = &sc->hw; 5008 5009 ifp = sc->ifp; 5010 5011 KASSERT(mutex_owned(&sc->core_mtx)); 5012 5013 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5014 ixgbe_disable_intr(sc); 5015 callout_stop(&sc->timer); 5016 5017 /* Don't schedule workqueues. */ 5018 sc->schedule_wqs_ok = false; 5019 5020 /* Let the stack know...*/ 5021 ifp->if_flags &= ~IFF_RUNNING; 5022 5023 ixgbe_reset_hw(hw); 5024 hw->adapter_stopped = FALSE; 5025 ixgbe_stop_adapter(hw); 5026 if (hw->mac.type == ixgbe_mac_82599EB) 5027 ixgbe_stop_mac_link_on_d3_82599(hw); 5028 /* Turn off the laser - noop with no optics */ 5029 ixgbe_disable_tx_laser(hw); 5030 5031 /* Update the stack */ 5032 sc->link_up = FALSE; 5033 ixgbe_update_link_status(sc); 5034 5035 /* reprogram the RAR[0] in case user changed it. */ 5036 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5037 5038 return; 5039 } /* ixgbe_stop_locked */ 5040 5041 /************************************************************************ 5042 * ixgbe_update_link_status - Update OS on link state 5043 * 5044 * Note: Only updates the OS on the cached link state. 5045 * The real check of the hardware only happens with 5046 * a link interrupt. 5047 ************************************************************************/ 5048 static void 5049 ixgbe_update_link_status(struct ixgbe_softc *sc) 5050 { 5051 struct ifnet *ifp = sc->ifp; 5052 device_t dev = sc->dev; 5053 struct ixgbe_hw *hw = &sc->hw; 5054 5055 KASSERT(mutex_owned(&sc->core_mtx)); 5056 5057 if (sc->link_up) { 5058 if (sc->link_active != LINK_STATE_UP) { 5059 /* 5060 * To eliminate influence of the previous state 5061 * in the same way as ixgbe_init_locked(). 5062 */ 5063 struct ix_queue *que = sc->queues; 5064 for (int i = 0; i < sc->num_queues; i++, que++) 5065 que->eitr_setting = 0; 5066 5067 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL){ 5068 /* 5069 * Discard count for both MAC Local Fault and 5070 * Remote Fault because those registers are 5071 * valid only when the link speed is up and 5072 * 10Gbps. 5073 */ 5074 IXGBE_READ_REG(hw, IXGBE_MLFC); 5075 IXGBE_READ_REG(hw, IXGBE_MRFC); 5076 } 5077 5078 if (bootverbose) { 5079 const char *bpsmsg; 5080 5081 switch (sc->link_speed) { 5082 case IXGBE_LINK_SPEED_10GB_FULL: 5083 bpsmsg = "10 Gbps"; 5084 break; 5085 case IXGBE_LINK_SPEED_5GB_FULL: 5086 bpsmsg = "5 Gbps"; 5087 break; 5088 case IXGBE_LINK_SPEED_2_5GB_FULL: 5089 bpsmsg = "2.5 Gbps"; 5090 break; 5091 case IXGBE_LINK_SPEED_1GB_FULL: 5092 bpsmsg = "1 Gbps"; 5093 break; 5094 case IXGBE_LINK_SPEED_100_FULL: 5095 bpsmsg = "100 Mbps"; 5096 break; 5097 case IXGBE_LINK_SPEED_10_FULL: 5098 bpsmsg = "10 Mbps"; 5099 break; 5100 default: 5101 bpsmsg = "unknown speed"; 5102 break; 5103 } 5104 device_printf(dev, "Link is up %s %s \n", 5105 bpsmsg, "Full Duplex"); 5106 } 5107 sc->link_active = LINK_STATE_UP; 5108 /* Update any Flow Control changes */ 5109 ixgbe_fc_enable(&sc->hw); 5110 /* Update DMA coalescing config */ 5111 ixgbe_config_dmac(sc); 5112 if_link_state_change(ifp, LINK_STATE_UP); 5113 5114 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5115 ixgbe_ping_all_vfs(sc); 5116 } 5117 } else { 5118 /* 5119 * Do it when link active changes to DOWN. i.e. 5120 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5121 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5122 */ 5123 if (sc->link_active != LINK_STATE_DOWN) { 5124 if (bootverbose) 5125 device_printf(dev, "Link is Down\n"); 5126 if_link_state_change(ifp, LINK_STATE_DOWN); 5127 sc->link_active = LINK_STATE_DOWN; 5128 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5129 ixgbe_ping_all_vfs(sc); 5130 ixgbe_drain_all(sc); 5131 } 5132 } 5133 } /* ixgbe_update_link_status */ 5134 5135 /************************************************************************ 5136 * ixgbe_config_dmac - Configure DMA Coalescing 5137 ************************************************************************/ 5138 static void 5139 ixgbe_config_dmac(struct ixgbe_softc *sc) 5140 { 5141 struct ixgbe_hw *hw = &sc->hw; 5142 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5143 5144 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5145 return; 5146 5147 if (dcfg->watchdog_timer ^ sc->dmac || 5148 dcfg->link_speed ^ sc->link_speed) { 5149 dcfg->watchdog_timer = sc->dmac; 5150 dcfg->fcoe_en = false; 5151 dcfg->link_speed = sc->link_speed; 5152 dcfg->num_tcs = 1; 5153 5154 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5155 dcfg->watchdog_timer, dcfg->link_speed); 5156 5157 hw->mac.ops.dmac_config(hw); 5158 } 5159 } /* ixgbe_config_dmac */ 5160 5161 /************************************************************************ 5162 * ixgbe_enable_intr 5163 ************************************************************************/ 5164 static void 5165 ixgbe_enable_intr(struct ixgbe_softc *sc) 5166 { 5167 struct ixgbe_hw *hw = &sc->hw; 5168 struct ix_queue *que = sc->queues; 5169 u32 mask, fwsm; 5170 5171 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5172 5173 switch (sc->hw.mac.type) { 5174 case ixgbe_mac_82599EB: 5175 mask |= IXGBE_EIMS_ECC; 5176 /* Temperature sensor on some adapters */ 5177 mask |= IXGBE_EIMS_GPI_SDP0; 5178 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5179 mask |= IXGBE_EIMS_GPI_SDP1; 5180 mask |= IXGBE_EIMS_GPI_SDP2; 5181 break; 5182 case ixgbe_mac_X540: 5183 /* Detect if Thermal Sensor is enabled */ 5184 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5185 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5186 mask |= IXGBE_EIMS_TS; 5187 mask |= IXGBE_EIMS_ECC; 5188 break; 5189 case ixgbe_mac_X550: 5190 /* MAC thermal sensor is automatically enabled */ 5191 mask |= IXGBE_EIMS_TS; 5192 mask |= IXGBE_EIMS_ECC; 5193 break; 5194 case ixgbe_mac_X550EM_x: 5195 case ixgbe_mac_X550EM_a: 5196 /* Some devices use SDP0 for important information */ 5197 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5198 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5199 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5200 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5201 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5202 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5203 mask |= IXGBE_EICR_GPI_SDP0_X540; 5204 mask |= IXGBE_EIMS_ECC; 5205 break; 5206 default: 5207 break; 5208 } 5209 5210 /* Enable Fan Failure detection */ 5211 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5212 mask |= IXGBE_EIMS_GPI_SDP1; 5213 /* Enable SR-IOV */ 5214 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5215 mask |= IXGBE_EIMS_MAILBOX; 5216 /* Enable Flow Director */ 5217 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5218 mask |= IXGBE_EIMS_FLOW_DIR; 5219 5220 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5221 5222 /* With MSI-X we use auto clear */ 5223 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5224 /* 5225 * We use auto clear for RTX_QUEUE only. Don't use other 5226 * interrupts (e.g. link interrupt). BTW, we don't use 5227 * TCP_TIMER interrupt itself. 5228 */ 5229 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5230 } 5231 5232 /* 5233 * Now enable all queues, this is done separately to 5234 * allow for handling the extended (beyond 32) MSI-X 5235 * vectors that can be used by 82599 5236 */ 5237 for (int i = 0; i < sc->num_queues; i++, que++) 5238 ixgbe_enable_queue(sc, que->msix); 5239 5240 IXGBE_WRITE_FLUSH(hw); 5241 5242 } /* ixgbe_enable_intr */ 5243 5244 /************************************************************************ 5245 * ixgbe_disable_intr_internal 5246 ************************************************************************/ 5247 static void 5248 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5249 { 5250 struct ix_queue *que = sc->queues; 5251 5252 /* disable interrupts other than queues */ 5253 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5254 5255 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5256 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5257 5258 for (int i = 0; i < sc->num_queues; i++, que++) 5259 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5260 5261 IXGBE_WRITE_FLUSH(&sc->hw); 5262 5263 } /* ixgbe_do_disable_intr_internal */ 5264 5265 /************************************************************************ 5266 * ixgbe_disable_intr 5267 ************************************************************************/ 5268 static void 5269 ixgbe_disable_intr(struct ixgbe_softc *sc) 5270 { 5271 5272 ixgbe_disable_intr_internal(sc, true); 5273 } /* ixgbe_disable_intr */ 5274 5275 /************************************************************************ 5276 * ixgbe_ensure_disabled_intr 5277 ************************************************************************/ 5278 void 5279 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5280 { 5281 5282 ixgbe_disable_intr_internal(sc, false); 5283 } /* ixgbe_ensure_disabled_intr */ 5284 5285 /************************************************************************ 5286 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5287 ************************************************************************/ 5288 static int 5289 ixgbe_legacy_irq(void *arg) 5290 { 5291 struct ix_queue *que = arg; 5292 struct ixgbe_softc *sc = que->sc; 5293 struct ixgbe_hw *hw = &sc->hw; 5294 struct ifnet *ifp = sc->ifp; 5295 struct tx_ring *txr = sc->tx_rings; 5296 u32 eicr; 5297 u32 eims_orig; 5298 u32 eims_enable = 0; 5299 u32 eims_disable = 0; 5300 5301 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5302 /* 5303 * Silicon errata #26 on 82598. Disable all interrupts before reading 5304 * EICR. 5305 */ 5306 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5307 5308 /* Read and clear EICR */ 5309 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5310 5311 if (eicr == 0) { 5312 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5313 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5314 return 0; 5315 } 5316 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5317 5318 /* Queue (0) intr */ 5319 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5320 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5321 IXGBE_EVC_ADD(&que->irqs, 1); 5322 5323 /* 5324 * The same as ixgbe_msix_que() about 5325 * "que->txrx_use_workqueue". 5326 */ 5327 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5328 5329 IXGBE_TX_LOCK(txr); 5330 ixgbe_txeof(txr); 5331 #ifdef notyet 5332 if (!ixgbe_ring_empty(ifp, txr->br)) 5333 ixgbe_start_locked(ifp, txr); 5334 #endif 5335 IXGBE_TX_UNLOCK(txr); 5336 5337 IXGBE_EVC_ADD(&que->req, 1); 5338 ixgbe_sched_handle_que(sc, que); 5339 /* Disable queue 0 interrupt */ 5340 eims_disable |= 1UL << 0; 5341 } else 5342 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5343 5344 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5345 5346 /* Re-enable some interrupts */ 5347 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5348 (eims_orig & ~eims_disable) | eims_enable); 5349 5350 return 1; 5351 } /* ixgbe_legacy_irq */ 5352 5353 /************************************************************************ 5354 * ixgbe_free_pciintr_resources 5355 ************************************************************************/ 5356 static void 5357 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5358 { 5359 struct ix_queue *que = sc->queues; 5360 int rid; 5361 5362 /* 5363 * Release all msix queue resources: 5364 */ 5365 for (int i = 0; i < sc->num_queues; i++, que++) { 5366 if (que->res != NULL) { 5367 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5368 sc->osdep.ihs[i] = NULL; 5369 } 5370 } 5371 5372 /* Clean the Legacy or Link interrupt last */ 5373 if (sc->vector) /* we are doing MSIX */ 5374 rid = sc->vector; 5375 else 5376 rid = 0; 5377 5378 if (sc->osdep.ihs[rid] != NULL) { 5379 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5380 sc->osdep.ihs[rid] = NULL; 5381 } 5382 5383 if (sc->osdep.intrs != NULL) { 5384 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5385 sc->osdep.nintrs); 5386 sc->osdep.intrs = NULL; 5387 } 5388 } /* ixgbe_free_pciintr_resources */ 5389 5390 /************************************************************************ 5391 * ixgbe_free_pci_resources 5392 ************************************************************************/ 5393 static void 5394 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5395 { 5396 5397 ixgbe_free_pciintr_resources(sc); 5398 5399 if (sc->osdep.mem_size != 0) { 5400 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5401 sc->osdep.mem_bus_space_handle, 5402 sc->osdep.mem_size); 5403 } 5404 } /* ixgbe_free_pci_resources */ 5405 5406 /************************************************************************ 5407 * ixgbe_sysctl_flowcntl 5408 * 5409 * SYSCTL wrapper around setting Flow Control 5410 ************************************************************************/ 5411 static int 5412 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5413 { 5414 struct sysctlnode node = *rnode; 5415 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5416 int error, fc; 5417 5418 if (ixgbe_fw_recovery_mode_swflag(sc)) 5419 return (EPERM); 5420 5421 fc = sc->hw.fc.current_mode; 5422 node.sysctl_data = &fc; 5423 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5424 if (error != 0 || newp == NULL) 5425 return error; 5426 5427 /* Don't bother if it's not changed */ 5428 if (fc == sc->hw.fc.current_mode) 5429 return (0); 5430 5431 return ixgbe_set_flowcntl(sc, fc); 5432 } /* ixgbe_sysctl_flowcntl */ 5433 5434 /************************************************************************ 5435 * ixgbe_set_flowcntl - Set flow control 5436 * 5437 * Flow control values: 5438 * 0 - off 5439 * 1 - rx pause 5440 * 2 - tx pause 5441 * 3 - full 5442 ************************************************************************/ 5443 static int 5444 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5445 { 5446 switch (fc) { 5447 case ixgbe_fc_rx_pause: 5448 case ixgbe_fc_tx_pause: 5449 case ixgbe_fc_full: 5450 sc->hw.fc.requested_mode = fc; 5451 if (sc->num_queues > 1) 5452 ixgbe_disable_rx_drop(sc); 5453 break; 5454 case ixgbe_fc_none: 5455 sc->hw.fc.requested_mode = ixgbe_fc_none; 5456 if (sc->num_queues > 1) 5457 ixgbe_enable_rx_drop(sc); 5458 break; 5459 default: 5460 return (EINVAL); 5461 } 5462 5463 #if 0 /* XXX NetBSD */ 5464 /* Don't autoneg if forcing a value */ 5465 sc->hw.fc.disable_fc_autoneg = TRUE; 5466 #endif 5467 ixgbe_fc_enable(&sc->hw); 5468 5469 return (0); 5470 } /* ixgbe_set_flowcntl */ 5471 5472 /************************************************************************ 5473 * ixgbe_enable_rx_drop 5474 * 5475 * Enable the hardware to drop packets when the buffer is 5476 * full. This is useful with multiqueue, so that no single 5477 * queue being full stalls the entire RX engine. We only 5478 * enable this when Multiqueue is enabled AND Flow Control 5479 * is disabled. 5480 ************************************************************************/ 5481 static void 5482 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5483 { 5484 struct ixgbe_hw *hw = &sc->hw; 5485 struct rx_ring *rxr; 5486 u32 srrctl; 5487 5488 for (int i = 0; i < sc->num_queues; i++) { 5489 rxr = &sc->rx_rings[i]; 5490 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5491 srrctl |= IXGBE_SRRCTL_DROP_EN; 5492 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5493 } 5494 5495 /* enable drop for each vf */ 5496 for (int i = 0; i < sc->num_vfs; i++) { 5497 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5498 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5499 IXGBE_QDE_ENABLE)); 5500 } 5501 } /* ixgbe_enable_rx_drop */ 5502 5503 /************************************************************************ 5504 * ixgbe_disable_rx_drop 5505 ************************************************************************/ 5506 static void 5507 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5508 { 5509 struct ixgbe_hw *hw = &sc->hw; 5510 struct rx_ring *rxr; 5511 u32 srrctl; 5512 5513 for (int i = 0; i < sc->num_queues; i++) { 5514 rxr = &sc->rx_rings[i]; 5515 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5516 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5517 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5518 } 5519 5520 /* disable drop for each vf */ 5521 for (int i = 0; i < sc->num_vfs; i++) { 5522 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5523 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5524 } 5525 } /* ixgbe_disable_rx_drop */ 5526 5527 /************************************************************************ 5528 * ixgbe_sysctl_advertise 5529 * 5530 * SYSCTL wrapper around setting advertised speed 5531 ************************************************************************/ 5532 static int 5533 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5534 { 5535 struct sysctlnode node = *rnode; 5536 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5537 int error = 0, advertise; 5538 5539 if (ixgbe_fw_recovery_mode_swflag(sc)) 5540 return (EPERM); 5541 5542 advertise = sc->advertise; 5543 node.sysctl_data = &advertise; 5544 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5545 if (error != 0 || newp == NULL) 5546 return error; 5547 5548 return ixgbe_set_advertise(sc, advertise); 5549 } /* ixgbe_sysctl_advertise */ 5550 5551 /************************************************************************ 5552 * ixgbe_set_advertise - Control advertised link speed 5553 * 5554 * Flags: 5555 * 0x00 - Default (all capable link speed) 5556 * 0x1 - advertise 100 Mb 5557 * 0x2 - advertise 1G 5558 * 0x4 - advertise 10G 5559 * 0x8 - advertise 10 Mb (yes, Mb) 5560 * 0x10 - advertise 2.5G 5561 * 0x20 - advertise 5G 5562 ************************************************************************/ 5563 static int 5564 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5565 { 5566 device_t dev; 5567 struct ixgbe_hw *hw; 5568 ixgbe_link_speed speed = 0; 5569 ixgbe_link_speed link_caps = 0; 5570 s32 err = IXGBE_NOT_IMPLEMENTED; 5571 bool negotiate = FALSE; 5572 5573 /* Checks to validate new value */ 5574 if (sc->advertise == advertise) /* no change */ 5575 return (0); 5576 5577 dev = sc->dev; 5578 hw = &sc->hw; 5579 5580 /* No speed changes for backplane media */ 5581 if (hw->phy.media_type == ixgbe_media_type_backplane) 5582 return (ENODEV); 5583 5584 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5585 (hw->phy.multispeed_fiber))) { 5586 device_printf(dev, 5587 "Advertised speed can only be set on copper or " 5588 "multispeed fiber media types.\n"); 5589 return (EINVAL); 5590 } 5591 5592 if (advertise < 0x0 || advertise > 0x3f) { 5593 device_printf(dev, "Invalid advertised speed; " 5594 "valid modes are 0x0 through 0x3f\n"); 5595 return (EINVAL); 5596 } 5597 5598 if (hw->mac.ops.get_link_capabilities) { 5599 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5600 &negotiate); 5601 if (err != IXGBE_SUCCESS) { 5602 device_printf(dev, "Unable to determine supported " 5603 "advertise speeds\n"); 5604 return (ENODEV); 5605 } 5606 } 5607 5608 /* Set new value and report new advertised mode */ 5609 if (advertise & 0x1) { 5610 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5611 device_printf(dev, "Interface does not support 100Mb " 5612 "advertised speed\n"); 5613 return (EINVAL); 5614 } 5615 speed |= IXGBE_LINK_SPEED_100_FULL; 5616 } 5617 if (advertise & 0x2) { 5618 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5619 device_printf(dev, "Interface does not support 1Gb " 5620 "advertised speed\n"); 5621 return (EINVAL); 5622 } 5623 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5624 } 5625 if (advertise & 0x4) { 5626 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5627 device_printf(dev, "Interface does not support 10Gb " 5628 "advertised speed\n"); 5629 return (EINVAL); 5630 } 5631 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5632 } 5633 if (advertise & 0x8) { 5634 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5635 device_printf(dev, "Interface does not support 10Mb " 5636 "advertised speed\n"); 5637 return (EINVAL); 5638 } 5639 speed |= IXGBE_LINK_SPEED_10_FULL; 5640 } 5641 if (advertise & 0x10) { 5642 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5643 device_printf(dev, "Interface does not support 2.5Gb " 5644 "advertised speed\n"); 5645 return (EINVAL); 5646 } 5647 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5648 } 5649 if (advertise & 0x20) { 5650 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5651 device_printf(dev, "Interface does not support 5Gb " 5652 "advertised speed\n"); 5653 return (EINVAL); 5654 } 5655 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5656 } 5657 if (advertise == 0) 5658 speed = link_caps; /* All capable link speed */ 5659 5660 hw->mac.autotry_restart = TRUE; 5661 hw->mac.ops.setup_link(hw, speed, TRUE); 5662 sc->advertise = advertise; 5663 5664 return (0); 5665 } /* ixgbe_set_advertise */ 5666 5667 /************************************************************************ 5668 * ixgbe_get_default_advertise - Get default advertised speed settings 5669 * 5670 * Formatted for sysctl usage. 5671 * Flags: 5672 * 0x1 - advertise 100 Mb 5673 * 0x2 - advertise 1G 5674 * 0x4 - advertise 10G 5675 * 0x8 - advertise 10 Mb (yes, Mb) 5676 * 0x10 - advertise 2.5G 5677 * 0x20 - advertise 5G 5678 ************************************************************************/ 5679 static int 5680 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5681 { 5682 struct ixgbe_hw *hw = &sc->hw; 5683 int speed; 5684 ixgbe_link_speed link_caps = 0; 5685 s32 err; 5686 bool negotiate = FALSE; 5687 5688 /* 5689 * Advertised speed means nothing unless it's copper or 5690 * multi-speed fiber 5691 */ 5692 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5693 !(hw->phy.multispeed_fiber)) 5694 return (0); 5695 5696 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5697 if (err != IXGBE_SUCCESS) 5698 return (0); 5699 5700 speed = 5701 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5702 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5703 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5704 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5705 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5706 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5707 5708 return speed; 5709 } /* ixgbe_get_default_advertise */ 5710 5711 /************************************************************************ 5712 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5713 * 5714 * Control values: 5715 * 0/1 - off / on (use default value of 1000) 5716 * 5717 * Legal timer values are: 5718 * 50,100,250,500,1000,2000,5000,10000 5719 * 5720 * Turning off interrupt moderation will also turn this off. 5721 ************************************************************************/ 5722 static int 5723 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5724 { 5725 struct sysctlnode node = *rnode; 5726 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5727 struct ifnet *ifp = sc->ifp; 5728 int error; 5729 int newval; 5730 5731 if (ixgbe_fw_recovery_mode_swflag(sc)) 5732 return (EPERM); 5733 5734 newval = sc->dmac; 5735 node.sysctl_data = &newval; 5736 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5737 if ((error) || (newp == NULL)) 5738 return (error); 5739 5740 switch (newval) { 5741 case 0: 5742 /* Disabled */ 5743 sc->dmac = 0; 5744 break; 5745 case 1: 5746 /* Enable and use default */ 5747 sc->dmac = 1000; 5748 break; 5749 case 50: 5750 case 100: 5751 case 250: 5752 case 500: 5753 case 1000: 5754 case 2000: 5755 case 5000: 5756 case 10000: 5757 /* Legal values - allow */ 5758 sc->dmac = newval; 5759 break; 5760 default: 5761 /* Do nothing, illegal value */ 5762 return (EINVAL); 5763 } 5764 5765 /* Re-initialize hardware if it's already running */ 5766 if (ifp->if_flags & IFF_RUNNING) 5767 if_init(ifp); 5768 5769 return (0); 5770 } 5771 5772 #ifdef IXGBE_DEBUG 5773 /************************************************************************ 5774 * ixgbe_sysctl_power_state 5775 * 5776 * Sysctl to test power states 5777 * Values: 5778 * 0 - set device to D0 5779 * 3 - set device to D3 5780 * (none) - get current device power state 5781 ************************************************************************/ 5782 static int 5783 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5784 { 5785 #ifdef notyet 5786 struct sysctlnode node = *rnode; 5787 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5788 device_t dev = sc->dev; 5789 int curr_ps, new_ps, error = 0; 5790 5791 if (ixgbe_fw_recovery_mode_swflag(sc)) 5792 return (EPERM); 5793 5794 curr_ps = new_ps = pci_get_powerstate(dev); 5795 5796 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5797 if ((error) || (req->newp == NULL)) 5798 return (error); 5799 5800 if (new_ps == curr_ps) 5801 return (0); 5802 5803 if (new_ps == 3 && curr_ps == 0) 5804 error = DEVICE_SUSPEND(dev); 5805 else if (new_ps == 0 && curr_ps == 3) 5806 error = DEVICE_RESUME(dev); 5807 else 5808 return (EINVAL); 5809 5810 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5811 5812 return (error); 5813 #else 5814 return 0; 5815 #endif 5816 } /* ixgbe_sysctl_power_state */ 5817 #endif 5818 5819 /************************************************************************ 5820 * ixgbe_sysctl_wol_enable 5821 * 5822 * Sysctl to enable/disable the WoL capability, 5823 * if supported by the adapter. 5824 * 5825 * Values: 5826 * 0 - disabled 5827 * 1 - enabled 5828 ************************************************************************/ 5829 static int 5830 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5831 { 5832 struct sysctlnode node = *rnode; 5833 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5834 struct ixgbe_hw *hw = &sc->hw; 5835 bool new_wol_enabled; 5836 int error = 0; 5837 5838 /* 5839 * It's not required to check recovery mode because this function never 5840 * touches hardware. 5841 */ 5842 new_wol_enabled = hw->wol_enabled; 5843 node.sysctl_data = &new_wol_enabled; 5844 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5845 if ((error) || (newp == NULL)) 5846 return (error); 5847 if (new_wol_enabled == hw->wol_enabled) 5848 return (0); 5849 5850 if (new_wol_enabled && !sc->wol_support) 5851 return (ENODEV); 5852 else 5853 hw->wol_enabled = new_wol_enabled; 5854 5855 return (0); 5856 } /* ixgbe_sysctl_wol_enable */ 5857 5858 /************************************************************************ 5859 * ixgbe_sysctl_wufc - Wake Up Filter Control 5860 * 5861 * Sysctl to enable/disable the types of packets that the 5862 * adapter will wake up on upon receipt. 5863 * Flags: 5864 * 0x1 - Link Status Change 5865 * 0x2 - Magic Packet 5866 * 0x4 - Direct Exact 5867 * 0x8 - Directed Multicast 5868 * 0x10 - Broadcast 5869 * 0x20 - ARP/IPv4 Request Packet 5870 * 0x40 - Direct IPv4 Packet 5871 * 0x80 - Direct IPv6 Packet 5872 * 5873 * Settings not listed above will cause the sysctl to return an error. 5874 ************************************************************************/ 5875 static int 5876 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5877 { 5878 struct sysctlnode node = *rnode; 5879 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5880 int error = 0; 5881 u32 new_wufc; 5882 5883 /* 5884 * It's not required to check recovery mode because this function never 5885 * touches hardware. 5886 */ 5887 new_wufc = sc->wufc; 5888 node.sysctl_data = &new_wufc; 5889 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5890 if ((error) || (newp == NULL)) 5891 return (error); 5892 if (new_wufc == sc->wufc) 5893 return (0); 5894 5895 if (new_wufc & 0xffffff00) 5896 return (EINVAL); 5897 5898 new_wufc &= 0xff; 5899 new_wufc |= (0xffffff & sc->wufc); 5900 sc->wufc = new_wufc; 5901 5902 return (0); 5903 } /* ixgbe_sysctl_wufc */ 5904 5905 #ifdef IXGBE_DEBUG 5906 /************************************************************************ 5907 * ixgbe_sysctl_print_rss_config 5908 ************************************************************************/ 5909 static int 5910 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5911 { 5912 #ifdef notyet 5913 struct sysctlnode node = *rnode; 5914 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5915 struct ixgbe_hw *hw = &sc->hw; 5916 device_t dev = sc->dev; 5917 struct sbuf *buf; 5918 int error = 0, reta_size; 5919 u32 reg; 5920 5921 if (ixgbe_fw_recovery_mode_swflag(sc)) 5922 return (EPERM); 5923 5924 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5925 if (!buf) { 5926 device_printf(dev, "Could not allocate sbuf for output.\n"); 5927 return (ENOMEM); 5928 } 5929 5930 // TODO: use sbufs to make a string to print out 5931 /* Set multiplier for RETA setup and table size based on MAC */ 5932 switch (sc->hw.mac.type) { 5933 case ixgbe_mac_X550: 5934 case ixgbe_mac_X550EM_x: 5935 case ixgbe_mac_X550EM_a: 5936 reta_size = 128; 5937 break; 5938 default: 5939 reta_size = 32; 5940 break; 5941 } 5942 5943 /* Print out the redirection table */ 5944 sbuf_cat(buf, "\n"); 5945 for (int i = 0; i < reta_size; i++) { 5946 if (i < 32) { 5947 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5948 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5949 } else { 5950 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5951 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5952 } 5953 } 5954 5955 // TODO: print more config 5956 5957 error = sbuf_finish(buf); 5958 if (error) 5959 device_printf(dev, "Error finishing sbuf: %d\n", error); 5960 5961 sbuf_delete(buf); 5962 #endif 5963 return (0); 5964 } /* ixgbe_sysctl_print_rss_config */ 5965 #endif /* IXGBE_DEBUG */ 5966 5967 /************************************************************************ 5968 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5969 * 5970 * For X552/X557-AT devices using an external PHY 5971 ************************************************************************/ 5972 static int 5973 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5974 { 5975 struct sysctlnode node = *rnode; 5976 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5977 struct ixgbe_hw *hw = &sc->hw; 5978 int val; 5979 u16 reg; 5980 int error; 5981 5982 if (ixgbe_fw_recovery_mode_swflag(sc)) 5983 return (EPERM); 5984 5985 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 5986 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 5987 device_printf(sc->dev, 5988 "Device has no supported external thermal sensor.\n"); 5989 return (ENODEV); 5990 } 5991 5992 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 5993 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 5994 device_printf(sc->dev, 5995 "Error reading from PHY's current temperature register\n"); 5996 return (EAGAIN); 5997 } 5998 5999 node.sysctl_data = &val; 6000 6001 /* Shift temp for output */ 6002 val = reg >> 8; 6003 6004 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6005 if ((error) || (newp == NULL)) 6006 return (error); 6007 6008 return (0); 6009 } /* ixgbe_sysctl_phy_temp */ 6010 6011 /************************************************************************ 6012 * ixgbe_sysctl_phy_overtemp_occurred 6013 * 6014 * Reports (directly from the PHY) whether the current PHY 6015 * temperature is over the overtemp threshold. 6016 ************************************************************************/ 6017 static int 6018 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6019 { 6020 struct sysctlnode node = *rnode; 6021 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6022 struct ixgbe_hw *hw = &sc->hw; 6023 int val, error; 6024 u16 reg; 6025 6026 if (ixgbe_fw_recovery_mode_swflag(sc)) 6027 return (EPERM); 6028 6029 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6030 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)){ 6031 device_printf(sc->dev, 6032 "Device has no supported external thermal sensor.\n"); 6033 return (ENODEV); 6034 } 6035 6036 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6037 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6038 device_printf(sc->dev, 6039 "Error reading from PHY's temperature status register\n"); 6040 return (EAGAIN); 6041 } 6042 6043 node.sysctl_data = &val; 6044 6045 /* Get occurrence bit */ 6046 val = !!(reg & 0x4000); 6047 6048 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6049 if ((error) || (newp == NULL)) 6050 return (error); 6051 6052 return (0); 6053 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6054 6055 /************************************************************************ 6056 * ixgbe_sysctl_eee_state 6057 * 6058 * Sysctl to set EEE power saving feature 6059 * Values: 6060 * 0 - disable EEE 6061 * 1 - enable EEE 6062 * (none) - get current device EEE state 6063 ************************************************************************/ 6064 static int 6065 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6066 { 6067 struct sysctlnode node = *rnode; 6068 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6069 struct ifnet *ifp = sc->ifp; 6070 device_t dev = sc->dev; 6071 int curr_eee, new_eee, error = 0; 6072 s32 retval; 6073 6074 if (ixgbe_fw_recovery_mode_swflag(sc)) 6075 return (EPERM); 6076 6077 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6078 node.sysctl_data = &new_eee; 6079 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6080 if ((error) || (newp == NULL)) 6081 return (error); 6082 6083 /* Nothing to do */ 6084 if (new_eee == curr_eee) 6085 return (0); 6086 6087 /* Not supported */ 6088 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6089 return (EINVAL); 6090 6091 /* Bounds checking */ 6092 if ((new_eee < 0) || (new_eee > 1)) 6093 return (EINVAL); 6094 6095 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6096 if (retval) { 6097 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6098 return (EINVAL); 6099 } 6100 6101 /* Restart auto-neg */ 6102 if_init(ifp); 6103 6104 device_printf(dev, "New EEE state: %d\n", new_eee); 6105 6106 /* Cache new value */ 6107 if (new_eee) 6108 sc->feat_en |= IXGBE_FEATURE_EEE; 6109 else 6110 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6111 6112 return (error); 6113 } /* ixgbe_sysctl_eee_state */ 6114 6115 #define PRINTQS(sc, regname) \ 6116 do { \ 6117 struct ixgbe_hw *_hw = &(sc)->hw; \ 6118 int _i; \ 6119 \ 6120 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6121 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6122 printf((_i == 0) ? "\t" : " "); \ 6123 printf("%08x", IXGBE_READ_REG(_hw, \ 6124 IXGBE_##regname(_i))); \ 6125 } \ 6126 printf("\n"); \ 6127 } while (0) 6128 6129 /************************************************************************ 6130 * ixgbe_print_debug_info 6131 * 6132 * Called only when em_display_debug_stats is enabled. 6133 * Provides a way to take a look at important statistics 6134 * maintained by the driver and hardware. 6135 ************************************************************************/ 6136 static void 6137 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6138 { 6139 device_t dev = sc->dev; 6140 struct ixgbe_hw *hw = &sc->hw; 6141 int table_size; 6142 int i; 6143 6144 switch (sc->hw.mac.type) { 6145 case ixgbe_mac_X550: 6146 case ixgbe_mac_X550EM_x: 6147 case ixgbe_mac_X550EM_a: 6148 table_size = 128; 6149 break; 6150 default: 6151 table_size = 32; 6152 break; 6153 } 6154 6155 device_printf(dev, "[E]RETA:\n"); 6156 for (i = 0; i < table_size; i++) { 6157 if (i < 32) 6158 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6159 IXGBE_RETA(i))); 6160 else 6161 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6162 IXGBE_ERETA(i - 32))); 6163 } 6164 6165 device_printf(dev, "queue:"); 6166 for (i = 0; i < sc->num_queues; i++) { 6167 printf((i == 0) ? "\t" : " "); 6168 printf("%8d", i); 6169 } 6170 printf("\n"); 6171 PRINTQS(sc, RDBAL); 6172 PRINTQS(sc, RDBAH); 6173 PRINTQS(sc, RDLEN); 6174 PRINTQS(sc, SRRCTL); 6175 PRINTQS(sc, RDH); 6176 PRINTQS(sc, RDT); 6177 PRINTQS(sc, RXDCTL); 6178 6179 device_printf(dev, "RQSMR:"); 6180 for (i = 0; i < sc->num_queues / 4; i++) { 6181 printf((i == 0) ? "\t" : " "); 6182 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6183 } 6184 printf("\n"); 6185 6186 device_printf(dev, "disabled_count:"); 6187 for (i = 0; i < sc->num_queues; i++) { 6188 printf((i == 0) ? "\t" : " "); 6189 printf("%8d", sc->queues[i].disabled_count); 6190 } 6191 printf("\n"); 6192 6193 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6194 if (hw->mac.type != ixgbe_mac_82598EB) { 6195 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6196 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6197 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6198 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6199 } 6200 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6201 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6202 } /* ixgbe_print_debug_info */ 6203 6204 /************************************************************************ 6205 * ixgbe_sysctl_debug 6206 ************************************************************************/ 6207 static int 6208 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6209 { 6210 struct sysctlnode node = *rnode; 6211 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6212 int error, result = 0; 6213 6214 if (ixgbe_fw_recovery_mode_swflag(sc)) 6215 return (EPERM); 6216 6217 node.sysctl_data = &result; 6218 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6219 6220 if (error || newp == NULL) 6221 return error; 6222 6223 if (result == 1) 6224 ixgbe_print_debug_info(sc); 6225 6226 return 0; 6227 } /* ixgbe_sysctl_debug */ 6228 6229 /************************************************************************ 6230 * ixgbe_sysctl_rx_copy_len 6231 ************************************************************************/ 6232 static int 6233 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6234 { 6235 struct sysctlnode node = *rnode; 6236 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6237 int error; 6238 int result = sc->rx_copy_len; 6239 6240 node.sysctl_data = &result; 6241 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6242 6243 if (error || newp == NULL) 6244 return error; 6245 6246 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6247 return EINVAL; 6248 6249 sc->rx_copy_len = result; 6250 6251 return 0; 6252 } /* ixgbe_sysctl_rx_copy_len */ 6253 6254 /************************************************************************ 6255 * ixgbe_sysctl_tx_process_limit 6256 ************************************************************************/ 6257 static int 6258 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6259 { 6260 struct sysctlnode node = *rnode; 6261 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6262 int error; 6263 int result = sc->tx_process_limit; 6264 6265 node.sysctl_data = &result; 6266 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6267 6268 if (error || newp == NULL) 6269 return error; 6270 6271 if ((result <= 0) || (result > sc->num_tx_desc)) 6272 return EINVAL; 6273 6274 sc->tx_process_limit = result; 6275 6276 return 0; 6277 } /* ixgbe_sysctl_tx_process_limit */ 6278 6279 /************************************************************************ 6280 * ixgbe_sysctl_rx_process_limit 6281 ************************************************************************/ 6282 static int 6283 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6284 { 6285 struct sysctlnode node = *rnode; 6286 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6287 int error; 6288 int result = sc->rx_process_limit; 6289 6290 node.sysctl_data = &result; 6291 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6292 6293 if (error || newp == NULL) 6294 return error; 6295 6296 if ((result <= 0) || (result > sc->num_rx_desc)) 6297 return EINVAL; 6298 6299 sc->rx_process_limit = result; 6300 6301 return 0; 6302 } /* ixgbe_sysctl_rx_process_limit */ 6303 6304 /************************************************************************ 6305 * ixgbe_init_device_features 6306 ************************************************************************/ 6307 static void 6308 ixgbe_init_device_features(struct ixgbe_softc *sc) 6309 { 6310 sc->feat_cap = IXGBE_FEATURE_NETMAP 6311 | IXGBE_FEATURE_RSS 6312 | IXGBE_FEATURE_MSI 6313 | IXGBE_FEATURE_MSIX 6314 | IXGBE_FEATURE_LEGACY_IRQ 6315 | IXGBE_FEATURE_LEGACY_TX; 6316 6317 /* Set capabilities first... */ 6318 switch (sc->hw.mac.type) { 6319 case ixgbe_mac_82598EB: 6320 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6321 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6322 break; 6323 case ixgbe_mac_X540: 6324 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6325 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6326 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6327 (sc->hw.bus.func == 0)) 6328 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6329 break; 6330 case ixgbe_mac_X550: 6331 /* 6332 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6333 * NVM Image version. 6334 */ 6335 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6336 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6337 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6338 break; 6339 case ixgbe_mac_X550EM_x: 6340 /* 6341 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6342 * NVM Image version. 6343 */ 6344 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6345 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6346 break; 6347 case ixgbe_mac_X550EM_a: 6348 /* 6349 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6350 * NVM Image version. 6351 */ 6352 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6353 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6354 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6355 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6356 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6357 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6358 sc->feat_cap |= IXGBE_FEATURE_EEE; 6359 } 6360 break; 6361 case ixgbe_mac_82599EB: 6362 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6363 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6364 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6365 (sc->hw.bus.func == 0)) 6366 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6367 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6368 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6369 break; 6370 default: 6371 break; 6372 } 6373 6374 /* Enabled by default... */ 6375 /* Fan failure detection */ 6376 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6377 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6378 /* Netmap */ 6379 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6380 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6381 /* EEE */ 6382 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6383 sc->feat_en |= IXGBE_FEATURE_EEE; 6384 /* Thermal Sensor */ 6385 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6386 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6387 /* 6388 * Recovery mode: 6389 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6390 * NVM Image version. 6391 */ 6392 6393 /* Enabled via global sysctl... */ 6394 /* Flow Director */ 6395 if (ixgbe_enable_fdir) { 6396 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6397 sc->feat_en |= IXGBE_FEATURE_FDIR; 6398 else 6399 device_printf(sc->dev, "Device does not support " 6400 "Flow Director. Leaving disabled."); 6401 } 6402 /* Legacy (single queue) transmit */ 6403 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6404 ixgbe_enable_legacy_tx) 6405 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6406 /* 6407 * Message Signal Interrupts - Extended (MSI-X) 6408 * Normal MSI is only enabled if MSI-X calls fail. 6409 */ 6410 if (!ixgbe_enable_msix) 6411 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6412 /* Receive-Side Scaling (RSS) */ 6413 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6414 sc->feat_en |= IXGBE_FEATURE_RSS; 6415 6416 /* Disable features with unmet dependencies... */ 6417 /* No MSI-X */ 6418 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6419 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6420 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6421 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6422 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6423 } 6424 } /* ixgbe_init_device_features */ 6425 6426 /************************************************************************ 6427 * ixgbe_probe - Device identification routine 6428 * 6429 * Determines if the driver should be loaded on 6430 * adapter based on its PCI vendor/device ID. 6431 * 6432 * return BUS_PROBE_DEFAULT on success, positive on failure 6433 ************************************************************************/ 6434 static int 6435 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6436 { 6437 const struct pci_attach_args *pa = aux; 6438 6439 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6440 } 6441 6442 static const ixgbe_vendor_info_t * 6443 ixgbe_lookup(const struct pci_attach_args *pa) 6444 { 6445 const ixgbe_vendor_info_t *ent; 6446 pcireg_t subid; 6447 6448 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6449 6450 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6451 return NULL; 6452 6453 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6454 6455 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6456 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6457 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6458 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6459 (ent->subvendor_id == 0)) && 6460 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6461 (ent->subdevice_id == 0))) { 6462 return ent; 6463 } 6464 } 6465 return NULL; 6466 } 6467 6468 static int 6469 ixgbe_ifflags_cb(struct ethercom *ec) 6470 { 6471 struct ifnet *ifp = &ec->ec_if; 6472 struct ixgbe_softc *sc = ifp->if_softc; 6473 u_short change; 6474 int rv = 0; 6475 6476 IXGBE_CORE_LOCK(sc); 6477 6478 change = ifp->if_flags ^ sc->if_flags; 6479 if (change != 0) 6480 sc->if_flags = ifp->if_flags; 6481 6482 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6483 rv = ENETRESET; 6484 goto out; 6485 } else if ((change & IFF_PROMISC) != 0) 6486 ixgbe_set_rxfilter(sc); 6487 6488 /* Check for ec_capenable. */ 6489 change = ec->ec_capenable ^ sc->ec_capenable; 6490 sc->ec_capenable = ec->ec_capenable; 6491 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6492 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6493 rv = ENETRESET; 6494 goto out; 6495 } 6496 6497 /* 6498 * Special handling is not required for ETHERCAP_VLAN_MTU. 6499 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6500 */ 6501 6502 /* Set up VLAN support and filter */ 6503 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6504 ixgbe_setup_vlan_hw_support(sc); 6505 6506 out: 6507 IXGBE_CORE_UNLOCK(sc); 6508 6509 return rv; 6510 } 6511 6512 /************************************************************************ 6513 * ixgbe_ioctl - Ioctl entry point 6514 * 6515 * Called when the user wants to configure the interface. 6516 * 6517 * return 0 on success, positive on failure 6518 ************************************************************************/ 6519 static int 6520 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6521 { 6522 struct ixgbe_softc *sc = ifp->if_softc; 6523 struct ixgbe_hw *hw = &sc->hw; 6524 struct ifcapreq *ifcr = data; 6525 struct ifreq *ifr = data; 6526 int error = 0; 6527 int l4csum_en; 6528 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6529 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6530 6531 if (ixgbe_fw_recovery_mode_swflag(sc)) 6532 return (EPERM); 6533 6534 switch (command) { 6535 case SIOCSIFFLAGS: 6536 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6537 break; 6538 case SIOCADDMULTI: 6539 case SIOCDELMULTI: 6540 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6541 break; 6542 case SIOCSIFMEDIA: 6543 case SIOCGIFMEDIA: 6544 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6545 break; 6546 case SIOCSIFCAP: 6547 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6548 break; 6549 case SIOCSIFMTU: 6550 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6551 break; 6552 #ifdef __NetBSD__ 6553 case SIOCINITIFADDR: 6554 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6555 break; 6556 case SIOCGIFFLAGS: 6557 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6558 break; 6559 case SIOCGIFAFLAG_IN: 6560 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6561 break; 6562 case SIOCGIFADDR: 6563 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6564 break; 6565 case SIOCGIFMTU: 6566 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6567 break; 6568 case SIOCGIFCAP: 6569 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6570 break; 6571 case SIOCGETHERCAP: 6572 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6573 break; 6574 case SIOCGLIFADDR: 6575 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6576 break; 6577 case SIOCZIFDATA: 6578 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6579 hw->mac.ops.clear_hw_cntrs(hw); 6580 ixgbe_clear_evcnt(sc); 6581 break; 6582 case SIOCAIFADDR: 6583 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6584 break; 6585 #endif 6586 default: 6587 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6588 break; 6589 } 6590 6591 switch (command) { 6592 case SIOCGI2C: 6593 { 6594 struct ixgbe_i2c_req i2c; 6595 6596 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6597 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6598 if (error != 0) 6599 break; 6600 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6601 error = EINVAL; 6602 break; 6603 } 6604 if (i2c.len > sizeof(i2c.data)) { 6605 error = EINVAL; 6606 break; 6607 } 6608 6609 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6610 i2c.dev_addr, i2c.data); 6611 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6612 break; 6613 } 6614 case SIOCSIFCAP: 6615 /* Layer-4 Rx checksum offload has to be turned on and 6616 * off as a unit. 6617 */ 6618 l4csum_en = ifcr->ifcr_capenable & l4csum; 6619 if (l4csum_en != l4csum && l4csum_en != 0) 6620 return EINVAL; 6621 /*FALLTHROUGH*/ 6622 case SIOCADDMULTI: 6623 case SIOCDELMULTI: 6624 case SIOCSIFFLAGS: 6625 case SIOCSIFMTU: 6626 default: 6627 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6628 return error; 6629 if ((ifp->if_flags & IFF_RUNNING) == 0) 6630 ; 6631 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6632 IXGBE_CORE_LOCK(sc); 6633 if ((ifp->if_flags & IFF_RUNNING) != 0) 6634 ixgbe_init_locked(sc); 6635 ixgbe_recalculate_max_frame(sc); 6636 IXGBE_CORE_UNLOCK(sc); 6637 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6638 /* 6639 * Multicast list has changed; set the hardware filter 6640 * accordingly. 6641 */ 6642 IXGBE_CORE_LOCK(sc); 6643 ixgbe_disable_intr(sc); 6644 ixgbe_set_rxfilter(sc); 6645 ixgbe_enable_intr(sc); 6646 IXGBE_CORE_UNLOCK(sc); 6647 } 6648 return 0; 6649 } 6650 6651 return error; 6652 } /* ixgbe_ioctl */ 6653 6654 /************************************************************************ 6655 * ixgbe_check_fan_failure 6656 ************************************************************************/ 6657 static int 6658 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6659 { 6660 u32 mask; 6661 6662 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6663 IXGBE_ESDP_SDP1; 6664 6665 if ((reg & mask) == 0) 6666 return IXGBE_SUCCESS; 6667 6668 /* 6669 * Use ratecheck() just in case interrupt occur frequently. 6670 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6671 * an red LED on the board turned on and link never up until 6672 * power off. 6673 */ 6674 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6675 device_printf(sc->dev, 6676 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6677 6678 return IXGBE_ERR_FAN_FAILURE; 6679 } /* ixgbe_check_fan_failure */ 6680 6681 /************************************************************************ 6682 * ixgbe_handle_que 6683 ************************************************************************/ 6684 static void 6685 ixgbe_handle_que(void *context) 6686 { 6687 struct ix_queue *que = context; 6688 struct ixgbe_softc *sc = que->sc; 6689 struct tx_ring *txr = que->txr; 6690 struct ifnet *ifp = sc->ifp; 6691 bool more = false; 6692 6693 IXGBE_EVC_ADD(&que->handleq, 1); 6694 6695 if (ifp->if_flags & IFF_RUNNING) { 6696 IXGBE_TX_LOCK(txr); 6697 more = ixgbe_txeof(txr); 6698 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6699 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6700 ixgbe_mq_start_locked(ifp, txr); 6701 /* Only for queue 0 */ 6702 /* NetBSD still needs this for CBQ */ 6703 if ((&sc->queues[0] == que) 6704 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6705 ixgbe_legacy_start_locked(ifp, txr); 6706 IXGBE_TX_UNLOCK(txr); 6707 more |= ixgbe_rxeof(que); 6708 } 6709 6710 if (more) { 6711 IXGBE_EVC_ADD(&que->req, 1); 6712 ixgbe_sched_handle_que(sc, que); 6713 } else if (que->res != NULL) { 6714 /* MSIX: Re-enable this interrupt */ 6715 ixgbe_enable_queue(sc, que->msix); 6716 } else { 6717 /* INTx or MSI */ 6718 ixgbe_enable_queue(sc, 0); 6719 } 6720 6721 return; 6722 } /* ixgbe_handle_que */ 6723 6724 /************************************************************************ 6725 * ixgbe_handle_que_work 6726 ************************************************************************/ 6727 static void 6728 ixgbe_handle_que_work(struct work *wk, void *context) 6729 { 6730 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6731 6732 /* 6733 * "enqueued flag" is not required here. 6734 * See ixgbe_msix_que(). 6735 */ 6736 ixgbe_handle_que(que); 6737 } 6738 6739 /************************************************************************ 6740 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6741 ************************************************************************/ 6742 static int 6743 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6744 const struct pci_attach_args *pa) 6745 { 6746 device_t dev = sc->dev; 6747 struct ix_queue *que = sc->queues; 6748 struct tx_ring *txr = sc->tx_rings; 6749 int counts[PCI_INTR_TYPE_SIZE]; 6750 pci_intr_type_t intr_type, max_type; 6751 char intrbuf[PCI_INTRSTR_LEN]; 6752 char wqname[MAXCOMLEN]; 6753 const char *intrstr = NULL; 6754 int defertx_error = 0, error; 6755 6756 /* We allocate a single interrupt resource */ 6757 max_type = PCI_INTR_TYPE_MSI; 6758 counts[PCI_INTR_TYPE_MSIX] = 0; 6759 counts[PCI_INTR_TYPE_MSI] = 6760 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6761 /* Check not feat_en but feat_cap to fallback to INTx */ 6762 counts[PCI_INTR_TYPE_INTX] = 6763 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6764 6765 alloc_retry: 6766 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6767 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6768 return ENXIO; 6769 } 6770 sc->osdep.nintrs = 1; 6771 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6772 intrbuf, sizeof(intrbuf)); 6773 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6774 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6775 device_xname(dev)); 6776 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6777 if (sc->osdep.ihs[0] == NULL) { 6778 aprint_error_dev(dev,"unable to establish %s\n", 6779 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6780 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6781 sc->osdep.intrs = NULL; 6782 switch (intr_type) { 6783 case PCI_INTR_TYPE_MSI: 6784 /* The next try is for INTx: Disable MSI */ 6785 max_type = PCI_INTR_TYPE_INTX; 6786 counts[PCI_INTR_TYPE_INTX] = 1; 6787 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6788 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6789 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6790 goto alloc_retry; 6791 } else 6792 break; 6793 case PCI_INTR_TYPE_INTX: 6794 default: 6795 /* See below */ 6796 break; 6797 } 6798 } 6799 if (intr_type == PCI_INTR_TYPE_INTX) { 6800 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6801 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6802 } 6803 if (sc->osdep.ihs[0] == NULL) { 6804 aprint_error_dev(dev, 6805 "couldn't establish interrupt%s%s\n", 6806 intrstr ? " at " : "", intrstr ? intrstr : ""); 6807 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6808 sc->osdep.intrs = NULL; 6809 return ENXIO; 6810 } 6811 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6812 /* 6813 * Try allocating a fast interrupt and the associated deferred 6814 * processing contexts. 6815 */ 6816 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6817 txr->txr_si = 6818 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6819 ixgbe_deferred_mq_start, txr); 6820 6821 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6822 device_xname(dev)); 6823 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6824 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6825 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6826 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6827 } 6828 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6829 ixgbe_handle_que, que); 6830 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6831 error = workqueue_create(&sc->que_wq, wqname, 6832 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6833 IXGBE_WORKQUEUE_FLAGS); 6834 6835 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6836 && ((txr->txr_si == NULL) || defertx_error != 0)) 6837 || (que->que_si == NULL) || error != 0) { 6838 aprint_error_dev(dev, 6839 "could not establish software interrupts\n"); 6840 6841 return ENXIO; 6842 } 6843 /* For simplicity in the handlers */ 6844 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6845 6846 return (0); 6847 } /* ixgbe_allocate_legacy */ 6848 6849 /************************************************************************ 6850 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6851 ************************************************************************/ 6852 static int 6853 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6854 { 6855 device_t dev = sc->dev; 6856 struct ix_queue *que = sc->queues; 6857 struct tx_ring *txr = sc->tx_rings; 6858 pci_chipset_tag_t pc; 6859 char intrbuf[PCI_INTRSTR_LEN]; 6860 char intr_xname[32]; 6861 char wqname[MAXCOMLEN]; 6862 const char *intrstr = NULL; 6863 int error, vector = 0; 6864 int cpu_id = 0; 6865 kcpuset_t *affinity; 6866 #ifdef RSS 6867 unsigned int rss_buckets = 0; 6868 kcpuset_t cpu_mask; 6869 #endif 6870 6871 pc = sc->osdep.pc; 6872 #ifdef RSS 6873 /* 6874 * If we're doing RSS, the number of queues needs to 6875 * match the number of RSS buckets that are configured. 6876 * 6877 * + If there's more queues than RSS buckets, we'll end 6878 * up with queues that get no traffic. 6879 * 6880 * + If there's more RSS buckets than queues, we'll end 6881 * up having multiple RSS buckets map to the same queue, 6882 * so there'll be some contention. 6883 */ 6884 rss_buckets = rss_getnumbuckets(); 6885 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6886 (sc->num_queues != rss_buckets)) { 6887 device_printf(dev, 6888 "%s: number of queues (%d) != number of RSS buckets (%d)" 6889 "; performance will be impacted.\n", 6890 __func__, sc->num_queues, rss_buckets); 6891 } 6892 #endif 6893 6894 sc->osdep.nintrs = sc->num_queues + 1; 6895 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6896 sc->osdep.nintrs) != 0) { 6897 aprint_error_dev(dev, 6898 "failed to allocate MSI-X interrupt\n"); 6899 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6900 return (ENXIO); 6901 } 6902 6903 kcpuset_create(&affinity, false); 6904 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6905 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6906 device_xname(dev), i); 6907 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6908 sizeof(intrbuf)); 6909 #ifdef IXGBE_MPSAFE 6910 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6911 true); 6912 #endif 6913 /* Set the handler function */ 6914 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6915 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6916 intr_xname); 6917 if (que->res == NULL) { 6918 aprint_error_dev(dev, 6919 "Failed to register QUE handler\n"); 6920 error = ENXIO; 6921 goto err_out; 6922 } 6923 que->msix = vector; 6924 sc->active_queues |= 1ULL << que->msix; 6925 6926 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6927 #ifdef RSS 6928 /* 6929 * The queue ID is used as the RSS layer bucket ID. 6930 * We look up the queue ID -> RSS CPU ID and select 6931 * that. 6932 */ 6933 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6934 CPU_SETOF(cpu_id, &cpu_mask); 6935 #endif 6936 } else { 6937 /* 6938 * Bind the MSI-X vector, and thus the 6939 * rings to the corresponding CPU. 6940 * 6941 * This just happens to match the default RSS 6942 * round-robin bucket -> queue -> CPU allocation. 6943 */ 6944 if (sc->num_queues > 1) 6945 cpu_id = i; 6946 } 6947 /* Round-robin affinity */ 6948 kcpuset_zero(affinity); 6949 kcpuset_set(affinity, cpu_id % ncpu); 6950 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6951 NULL); 6952 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6953 intrstr); 6954 if (error == 0) { 6955 #if 1 /* def IXGBE_DEBUG */ 6956 #ifdef RSS 6957 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6958 cpu_id % ncpu); 6959 #else 6960 aprint_normal(", bound queue %d to cpu %d", i, 6961 cpu_id % ncpu); 6962 #endif 6963 #endif /* IXGBE_DEBUG */ 6964 } 6965 aprint_normal("\n"); 6966 6967 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6968 txr->txr_si = softint_establish( 6969 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6970 ixgbe_deferred_mq_start, txr); 6971 if (txr->txr_si == NULL) { 6972 aprint_error_dev(dev, 6973 "couldn't establish software interrupt\n"); 6974 error = ENXIO; 6975 goto err_out; 6976 } 6977 } 6978 que->que_si 6979 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6980 ixgbe_handle_que, que); 6981 if (que->que_si == NULL) { 6982 aprint_error_dev(dev, 6983 "couldn't establish software interrupt\n"); 6984 error = ENXIO; 6985 goto err_out; 6986 } 6987 } 6988 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 6989 error = workqueue_create(&sc->txr_wq, wqname, 6990 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6991 IXGBE_WORKQUEUE_FLAGS); 6992 if (error) { 6993 aprint_error_dev(dev, 6994 "couldn't create workqueue for deferred Tx\n"); 6995 goto err_out; 6996 } 6997 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6998 6999 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7000 error = workqueue_create(&sc->que_wq, wqname, 7001 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7002 IXGBE_WORKQUEUE_FLAGS); 7003 if (error) { 7004 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7005 goto err_out; 7006 } 7007 7008 /* and Link */ 7009 cpu_id++; 7010 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7011 sc->vector = vector; 7012 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7013 sizeof(intrbuf)); 7014 #ifdef IXGBE_MPSAFE 7015 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, 7016 true); 7017 #endif 7018 /* Set the link handler function */ 7019 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7020 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7021 intr_xname); 7022 if (sc->osdep.ihs[vector] == NULL) { 7023 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7024 error = ENXIO; 7025 goto err_out; 7026 } 7027 /* Round-robin affinity */ 7028 kcpuset_zero(affinity); 7029 kcpuset_set(affinity, cpu_id % ncpu); 7030 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7031 NULL); 7032 7033 aprint_normal_dev(dev, 7034 "for link, interrupting at %s", intrstr); 7035 if (error == 0) 7036 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7037 else 7038 aprint_normal("\n"); 7039 7040 kcpuset_destroy(affinity); 7041 aprint_normal_dev(dev, 7042 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7043 7044 return (0); 7045 7046 err_out: 7047 kcpuset_destroy(affinity); 7048 ixgbe_free_deferred_handlers(sc); 7049 ixgbe_free_pciintr_resources(sc); 7050 return (error); 7051 } /* ixgbe_allocate_msix */ 7052 7053 /************************************************************************ 7054 * ixgbe_configure_interrupts 7055 * 7056 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7057 * This will also depend on user settings. 7058 ************************************************************************/ 7059 static int 7060 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7061 { 7062 device_t dev = sc->dev; 7063 struct ixgbe_mac_info *mac = &sc->hw.mac; 7064 int want, queues, msgs; 7065 7066 /* Default to 1 queue if MSI-X setup fails */ 7067 sc->num_queues = 1; 7068 7069 /* Override by tuneable */ 7070 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7071 goto msi; 7072 7073 /* 7074 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7075 * interrupt slot. 7076 */ 7077 if (ncpu == 1) 7078 goto msi; 7079 7080 /* First try MSI-X */ 7081 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7082 msgs = MIN(msgs, IXG_MAX_NINTR); 7083 if (msgs < 2) 7084 goto msi; 7085 7086 sc->feat_en |= IXGBE_FEATURE_MSIX; 7087 7088 /* Figure out a reasonable auto config value */ 7089 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7090 7091 #ifdef RSS 7092 /* If we're doing RSS, clamp at the number of RSS buckets */ 7093 if (sc->feat_en & IXGBE_FEATURE_RSS) 7094 queues = uimin(queues, rss_getnumbuckets()); 7095 #endif 7096 if (ixgbe_num_queues > queues) { 7097 aprint_error_dev(sc->dev, 7098 "ixgbe_num_queues (%d) is too large, " 7099 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7100 ixgbe_num_queues = queues; 7101 } 7102 7103 if (ixgbe_num_queues != 0) 7104 queues = ixgbe_num_queues; 7105 else 7106 queues = uimin(queues, 7107 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7108 7109 /* reflect correct sysctl value */ 7110 ixgbe_num_queues = queues; 7111 7112 /* 7113 * Want one vector (RX/TX pair) per queue 7114 * plus an additional for Link. 7115 */ 7116 want = queues + 1; 7117 if (msgs >= want) 7118 msgs = want; 7119 else { 7120 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7121 "%d vectors but %d queues wanted!\n", msgs, want); 7122 goto msi; 7123 } 7124 sc->num_queues = queues; 7125 sc->feat_en |= IXGBE_FEATURE_MSIX; 7126 return (0); 7127 7128 /* 7129 * MSI-X allocation failed or provided us with 7130 * less vectors than needed. Free MSI-X resources 7131 * and we'll try enabling MSI. 7132 */ 7133 msi: 7134 /* Without MSI-X, some features are no longer supported */ 7135 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7136 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7137 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7138 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7139 7140 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7141 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7142 if (msgs > 1) 7143 msgs = 1; 7144 if (msgs != 0) { 7145 msgs = 1; 7146 sc->feat_en |= IXGBE_FEATURE_MSI; 7147 return (0); 7148 } 7149 7150 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7151 aprint_error_dev(dev, 7152 "Device does not support legacy interrupts.\n"); 7153 return 1; 7154 } 7155 7156 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7157 7158 return (0); 7159 } /* ixgbe_configure_interrupts */ 7160 7161 7162 /************************************************************************ 7163 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7164 * 7165 * Done outside of interrupt context since the driver might sleep 7166 ************************************************************************/ 7167 static void 7168 ixgbe_handle_link(void *context) 7169 { 7170 struct ixgbe_softc *sc = context; 7171 struct ixgbe_hw *hw = &sc->hw; 7172 7173 KASSERT(mutex_owned(&sc->core_mtx)); 7174 7175 IXGBE_EVC_ADD(&sc->link_workev, 1); 7176 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7177 ixgbe_update_link_status(sc); 7178 7179 /* Re-enable link interrupts */ 7180 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7181 } /* ixgbe_handle_link */ 7182 7183 #if 0 7184 /************************************************************************ 7185 * ixgbe_rearm_queues 7186 ************************************************************************/ 7187 static __inline void 7188 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7189 { 7190 u32 mask; 7191 7192 switch (sc->hw.mac.type) { 7193 case ixgbe_mac_82598EB: 7194 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7195 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7196 break; 7197 case ixgbe_mac_82599EB: 7198 case ixgbe_mac_X540: 7199 case ixgbe_mac_X550: 7200 case ixgbe_mac_X550EM_x: 7201 case ixgbe_mac_X550EM_a: 7202 mask = (queues & 0xFFFFFFFF); 7203 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7204 mask = (queues >> 32); 7205 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7206 break; 7207 default: 7208 break; 7209 } 7210 } /* ixgbe_rearm_queues */ 7211 #endif 7212
Indexes created Tue Sep 30 11:09:46 GMT 2025