ixgbe.c revision 1.339
1 /* $NetBSD: ixgbe.c,v 1.339 2023/10/11 03:48:35 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.339 2023/10/11 03:48:35 msaitoh Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus with a max of 8. This 362 * can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = DEFAULT_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = DEFAULT_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_MPSAFE 1 416 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 417 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 418 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 419 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 420 #else 421 #define IXGBE_CALLOUT_FLAGS 0 422 #define IXGBE_SOFTINT_FLAGS 0 423 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 424 #define IXGBE_TASKLET_WQ_FLAGS 0 425 #endif 426 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 427 428 /* Interval between reports of errors */ 429 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 430 431 /************************************************************************ 432 * ixgbe_initialize_rss_mapping 433 ************************************************************************/ 434 static void 435 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 436 { 437 struct ixgbe_hw *hw = &sc->hw; 438 u32 reta = 0, mrqc, rss_key[10]; 439 int queue_id, table_size, index_mult; 440 int i, j; 441 u32 rss_hash_config; 442 443 /* force use default RSS key. */ 444 #ifdef __NetBSD__ 445 rss_getkey((uint8_t *) &rss_key); 446 #else 447 if (sc->feat_en & IXGBE_FEATURE_RSS) { 448 /* Fetch the configured RSS key */ 449 rss_getkey((uint8_t *) &rss_key); 450 } else { 451 /* set up random bits */ 452 cprng_fast(&rss_key, sizeof(rss_key)); 453 } 454 #endif 455 456 /* Set multiplier for RETA setup and table size based on MAC */ 457 index_mult = 0x1; 458 table_size = 128; 459 switch (sc->hw.mac.type) { 460 case ixgbe_mac_82598EB: 461 index_mult = 0x11; 462 break; 463 case ixgbe_mac_X550: 464 case ixgbe_mac_X550EM_x: 465 case ixgbe_mac_X550EM_a: 466 table_size = 512; 467 break; 468 default: 469 break; 470 } 471 472 /* Set up the redirection table */ 473 for (i = 0, j = 0; i < table_size; i++, j++) { 474 if (j == sc->num_queues) 475 j = 0; 476 477 if (sc->feat_en & IXGBE_FEATURE_RSS) { 478 /* 479 * Fetch the RSS bucket id for the given indirection 480 * entry. Cap it at the number of configured buckets 481 * (which is num_queues.) 482 */ 483 queue_id = rss_get_indirection_to_bucket(i); 484 queue_id = queue_id % sc->num_queues; 485 } else 486 queue_id = (j * index_mult); 487 488 /* 489 * The low 8 bits are for hash value (n+0); 490 * The next 8 bits are for hash value (n+1), etc. 491 */ 492 reta = reta >> 8; 493 reta = reta | (((uint32_t) queue_id) << 24); 494 if ((i & 3) == 3) { 495 if (i < 128) 496 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 497 else 498 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 499 reta); 500 reta = 0; 501 } 502 } 503 504 /* Now fill our hash function seeds */ 505 for (i = 0; i < 10; i++) 506 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 507 508 /* Perform hash on these packet types */ 509 if (sc->feat_en & IXGBE_FEATURE_RSS) 510 rss_hash_config = rss_gethashconfig(); 511 else { 512 /* 513 * Disable UDP - IP fragments aren't currently being handled 514 * and so we end up with a mix of 2-tuple and 4-tuple 515 * traffic. 516 */ 517 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 518 | RSS_HASHTYPE_RSS_TCP_IPV4 519 | RSS_HASHTYPE_RSS_IPV6 520 | RSS_HASHTYPE_RSS_TCP_IPV6 521 | RSS_HASHTYPE_RSS_IPV6_EX 522 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 523 } 524 525 mrqc = IXGBE_MRQC_RSSEN; 526 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 527 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 528 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 529 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 530 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 531 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 532 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 533 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 534 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 535 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 536 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 537 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 538 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 539 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 540 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 541 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 542 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 543 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 544 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 545 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 546 } /* ixgbe_initialize_rss_mapping */ 547 548 /************************************************************************ 549 * ixgbe_initialize_receive_units - Setup receive registers and features. 550 ************************************************************************/ 551 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 552 553 static void 554 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 555 { 556 struct rx_ring *rxr = sc->rx_rings; 557 struct ixgbe_hw *hw = &sc->hw; 558 struct ifnet *ifp = sc->ifp; 559 int i, j; 560 u32 bufsz, fctrl, srrctl, rxcsum; 561 u32 hlreg; 562 563 /* 564 * Make sure receives are disabled while 565 * setting up the descriptor ring 566 */ 567 ixgbe_disable_rx(hw); 568 569 /* Enable broadcasts */ 570 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 571 fctrl |= IXGBE_FCTRL_BAM; 572 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 573 fctrl |= IXGBE_FCTRL_DPF; 574 fctrl |= IXGBE_FCTRL_PMCF; 575 } 576 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 577 578 /* Set for Jumbo Frames? */ 579 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 580 if (ifp->if_mtu > ETHERMTU) 581 hlreg |= IXGBE_HLREG0_JUMBOEN; 582 else 583 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 584 585 #ifdef DEV_NETMAP 586 /* CRC stripping is conditional in Netmap */ 587 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 588 (ifp->if_capenable & IFCAP_NETMAP) && 589 !ix_crcstrip) 590 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 591 else 592 #endif /* DEV_NETMAP */ 593 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 594 595 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 596 597 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 598 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 599 600 for (i = 0; i < sc->num_queues; i++, rxr++) { 601 u64 rdba = rxr->rxdma.dma_paddr; 602 u32 reg; 603 int regnum = i / 4; /* 1 register per 4 queues */ 604 int regshift = i % 4; /* 4 bits per 1 queue */ 605 j = rxr->me; 606 607 /* Setup the Base and Length of the Rx Descriptor Ring */ 608 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 609 (rdba & 0x00000000ffffffffULL)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 611 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 612 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 613 614 /* Set up the SRRCTL register */ 615 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 616 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 617 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 618 srrctl |= bufsz; 619 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 620 621 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 622 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 623 reg &= ~(0x000000ffUL << (regshift * 8)); 624 reg |= i << (regshift * 8); 625 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 626 627 /* 628 * Set DROP_EN iff we have no flow control and >1 queue. 629 * Note that srrctl was cleared shortly before during reset, 630 * so we do not need to clear the bit, but do it just in case 631 * this code is moved elsewhere. 632 */ 633 if ((sc->num_queues > 1) && 634 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 635 srrctl |= IXGBE_SRRCTL_DROP_EN; 636 else 637 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 638 639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 640 641 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 642 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 643 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 644 645 /* Set the driver rx tail address */ 646 rxr->tail = IXGBE_RDT(rxr->me); 647 } 648 649 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 650 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 651 | IXGBE_PSRTYPE_UDPHDR 652 | IXGBE_PSRTYPE_IPV4HDR 653 | IXGBE_PSRTYPE_IPV6HDR; 654 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 655 } 656 657 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 658 659 ixgbe_initialize_rss_mapping(sc); 660 661 if (sc->num_queues > 1) { 662 /* RSS and RX IPP Checksum are mutually exclusive */ 663 rxcsum |= IXGBE_RXCSUM_PCSD; 664 } 665 666 if (ifp->if_capenable & IFCAP_RXCSUM) 667 rxcsum |= IXGBE_RXCSUM_PCSD; 668 669 /* This is useful for calculating UDP/IP fragment checksums */ 670 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 671 rxcsum |= IXGBE_RXCSUM_IPPCSE; 672 673 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 674 675 } /* ixgbe_initialize_receive_units */ 676 677 /************************************************************************ 678 * ixgbe_initialize_transmit_units - Enable transmit units. 679 ************************************************************************/ 680 static void 681 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 682 { 683 struct tx_ring *txr = sc->tx_rings; 684 struct ixgbe_hw *hw = &sc->hw; 685 int i; 686 687 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 688 689 /* Setup the Base and Length of the Tx Descriptor Ring */ 690 for (i = 0; i < sc->num_queues; i++, txr++) { 691 u64 tdba = txr->txdma.dma_paddr; 692 u32 txctrl = 0; 693 u32 tqsmreg, reg; 694 int regnum = i / 4; /* 1 register per 4 queues */ 695 int regshift = i % 4; /* 4 bits per 1 queue */ 696 int j = txr->me; 697 698 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 699 (tdba & 0x00000000ffffffffULL)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 701 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 702 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 703 704 /* 705 * Set TQSMR (Transmit Queue Statistic Mapping) register. 706 * Register location is different between 82598 and others. 707 */ 708 if (sc->hw.mac.type == ixgbe_mac_82598EB) 709 tqsmreg = IXGBE_TQSMR(regnum); 710 else 711 tqsmreg = IXGBE_TQSM(regnum); 712 reg = IXGBE_READ_REG(hw, tqsmreg); 713 reg &= ~(0x000000ffUL << (regshift * 8)); 714 reg |= i << (regshift * 8); 715 IXGBE_WRITE_REG(hw, tqsmreg, reg); 716 717 /* Setup the HW Tx Head and Tail descriptor pointers */ 718 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 719 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 720 721 /* Cache the tail address */ 722 txr->tail = IXGBE_TDT(j); 723 724 txr->txr_no_space = false; 725 726 /* Disable Head Writeback */ 727 /* 728 * Note: for X550 series devices, these registers are actually 729 * prefixed with TPH_ instead of DCA_, but the addresses and 730 * fields remain the same. 731 */ 732 switch (hw->mac.type) { 733 case ixgbe_mac_82598EB: 734 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 735 break; 736 default: 737 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 738 break; 739 } 740 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 741 switch (hw->mac.type) { 742 case ixgbe_mac_82598EB: 743 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 744 break; 745 default: 746 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 747 break; 748 } 749 750 } 751 752 if (hw->mac.type != ixgbe_mac_82598EB) { 753 u32 dmatxctl, rttdcs; 754 755 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 756 dmatxctl |= IXGBE_DMATXCTL_TE; 757 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 758 /* Disable arbiter to set MTQC */ 759 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 760 rttdcs |= IXGBE_RTTDCS_ARBDIS; 761 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 762 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 763 ixgbe_get_mtqc(sc->iov_mode)); 764 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 765 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 766 } 767 } /* ixgbe_initialize_transmit_units */ 768 769 static void 770 ixgbe_quirks(struct ixgbe_softc *sc) 771 { 772 device_t dev = sc->dev; 773 struct ixgbe_hw *hw = &sc->hw; 774 const char *vendor, *product; 775 776 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 777 /* 778 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 779 * MA10-ST0. 780 */ 781 vendor = pmf_get_platform("system-vendor"); 782 product = pmf_get_platform("system-product"); 783 784 if ((vendor == NULL) || (product == NULL)) 785 return; 786 787 if ((strcmp(vendor, "GIGABYTE") == 0) && 788 (strcmp(product, "MA10-ST0") == 0)) { 789 aprint_verbose_dev(dev, 790 "Enable SFP+ MOD_ABS inverse quirk\n"); 791 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 792 } 793 } 794 } 795 796 /************************************************************************ 797 * ixgbe_attach - Device initialization routine 798 * 799 * Called when the driver is being loaded. 800 * Identifies the type of hardware, allocates all resources 801 * and initializes the hardware. 802 * 803 * return 0 on success, positive on failure 804 ************************************************************************/ 805 static void 806 ixgbe_attach(device_t parent, device_t dev, void *aux) 807 { 808 struct ixgbe_softc *sc; 809 struct ixgbe_hw *hw; 810 int error = -1; 811 u32 ctrl_ext; 812 u16 high, low, nvmreg; 813 pcireg_t id, subid; 814 const ixgbe_vendor_info_t *ent; 815 struct pci_attach_args *pa = aux; 816 bool unsupported_sfp = false; 817 const char *str; 818 char wqname[MAXCOMLEN]; 819 char buf[256]; 820 821 INIT_DEBUGOUT("ixgbe_attach: begin"); 822 823 /* Allocate, clear, and link in our adapter structure */ 824 sc = device_private(dev); 825 sc->hw.back = sc; 826 sc->dev = dev; 827 hw = &sc->hw; 828 sc->osdep.pc = pa->pa_pc; 829 sc->osdep.tag = pa->pa_tag; 830 if (pci_dma64_available(pa)) 831 sc->osdep.dmat = pa->pa_dmat64; 832 else 833 sc->osdep.dmat = pa->pa_dmat; 834 sc->osdep.attached = false; 835 sc->osdep.detaching = false; 836 837 ent = ixgbe_lookup(pa); 838 839 KASSERT(ent != NULL); 840 841 aprint_normal(": %s, Version - %s\n", 842 ixgbe_strings[ent->index], ixgbe_driver_version); 843 844 /* Core Lock Init */ 845 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 846 847 /* Set up the timer callout and workqueue */ 848 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 849 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 850 error = workqueue_create(&sc->timer_wq, wqname, 851 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 852 IXGBE_TASKLET_WQ_FLAGS); 853 if (error) { 854 aprint_error_dev(dev, 855 "could not create timer workqueue (%d)\n", error); 856 goto err_out; 857 } 858 859 /* Determine hardware revision */ 860 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 861 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 862 863 hw->vendor_id = PCI_VENDOR(id); 864 hw->device_id = PCI_PRODUCT(id); 865 hw->revision_id = 866 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 867 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 868 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 869 870 /* Set quirk flags */ 871 ixgbe_quirks(sc); 872 873 /* 874 * Make sure BUSMASTER is set 875 */ 876 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 877 878 /* Do base PCI setup - map BAR0 */ 879 if (ixgbe_allocate_pci_resources(sc, pa)) { 880 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 881 error = ENXIO; 882 goto err_out; 883 } 884 885 /* let hardware know driver is loaded */ 886 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 887 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 888 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 889 890 /* 891 * Initialize the shared code 892 */ 893 if (ixgbe_init_shared_code(hw) != 0) { 894 aprint_error_dev(dev, 895 "Unable to initialize the shared code\n"); 896 error = ENXIO; 897 goto err_out; 898 } 899 900 switch (hw->mac.type) { 901 case ixgbe_mac_82598EB: 902 str = "82598EB"; 903 break; 904 case ixgbe_mac_82599EB: 905 str = "82599EB"; 906 break; 907 case ixgbe_mac_X540: 908 str = "X540"; 909 break; 910 case ixgbe_mac_X550: 911 str = "X550"; 912 break; 913 case ixgbe_mac_X550EM_x: 914 str = "X550EM X"; 915 break; 916 case ixgbe_mac_X550EM_a: 917 str = "X550EM A"; 918 break; 919 default: 920 str = "Unknown"; 921 break; 922 } 923 aprint_normal_dev(dev, "device %s\n", str); 924 925 hw->allow_unsupported_sfp = allow_unsupported_sfp; 926 927 /* Pick up the 82599 settings */ 928 if (hw->mac.type != ixgbe_mac_82598EB) 929 hw->phy.smart_speed = ixgbe_smart_speed; 930 931 /* Set the right number of segments */ 932 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 933 sc->num_segs = IXGBE_SCATTER_DEFAULT; 934 935 /* Ensure SW/FW semaphore is free */ 936 ixgbe_init_swfw_semaphore(hw); 937 938 hw->mac.ops.set_lan_id(hw); 939 ixgbe_init_device_features(sc); 940 941 if (ixgbe_configure_interrupts(sc)) { 942 error = ENXIO; 943 goto err_out; 944 } 945 946 /* Allocate multicast array memory. */ 947 sc->mta = malloc(sizeof(*sc->mta) * 948 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 949 950 /* Enable WoL (if supported) */ 951 ixgbe_check_wol_support(sc); 952 953 /* Register for VLAN events */ 954 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 955 956 /* Verify adapter fan is still functional (if applicable) */ 957 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 958 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 959 ixgbe_check_fan_failure(sc, esdp, FALSE); 960 } 961 962 /* Set an initial default flow control value */ 963 hw->fc.requested_mode = ixgbe_flow_control; 964 965 /* Do descriptor calc and sanity checks */ 966 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 967 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 968 aprint_error_dev(dev, "Invalid TX ring size (%d). " 969 "It must be between %d and %d, " 970 "inclusive, and must be a multiple of %zu. " 971 "Using default value of %d instead.\n", 972 ixgbe_txd, MIN_TXD, MAX_TXD, 973 DBA_ALIGN / sizeof(union ixgbe_adv_tx_desc), 974 DEFAULT_TXD); 975 sc->num_tx_desc = DEFAULT_TXD; 976 } else 977 sc->num_tx_desc = ixgbe_txd; 978 979 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 980 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 981 aprint_error_dev(dev, "Invalid RX ring size (%d). " 982 "It must be between %d and %d, " 983 "inclusive, and must be a multiple of %zu. " 984 "Using default value of %d instead.\n", 985 ixgbe_rxd, MIN_RXD, MAX_RXD, 986 DBA_ALIGN / sizeof(union ixgbe_adv_rx_desc), 987 DEFAULT_RXD); 988 sc->num_rx_desc = DEFAULT_RXD; 989 } else 990 sc->num_rx_desc = ixgbe_rxd; 991 992 /* Sysctls for limiting the amount of work done in the taskqueues */ 993 sc->rx_process_limit 994 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 995 ? ixgbe_rx_process_limit : sc->num_rx_desc; 996 sc->tx_process_limit 997 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 998 ? ixgbe_tx_process_limit : sc->num_tx_desc; 999 1000 /* Set default high limit of copying mbuf in rxeof */ 1001 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 1002 1003 /* Allocate our TX/RX Queues */ 1004 if (ixgbe_allocate_queues(sc)) { 1005 error = ENOMEM; 1006 goto err_out; 1007 } 1008 1009 hw->phy.reset_if_overtemp = TRUE; 1010 error = ixgbe_reset_hw(hw); 1011 hw->phy.reset_if_overtemp = FALSE; 1012 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1013 error = IXGBE_SUCCESS; 1014 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1015 aprint_error_dev(dev, 1016 "Unsupported SFP+ module type was detected.\n"); 1017 unsupported_sfp = true; 1018 error = IXGBE_SUCCESS; 1019 } else if (error) { 1020 aprint_error_dev(dev, 1021 "Hardware initialization failed(error = %d)\n", error); 1022 error = EIO; 1023 goto err_late; 1024 } 1025 1026 /* Make sure we have a good EEPROM before we read from it */ 1027 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1028 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1029 error = EIO; 1030 goto err_late; 1031 } 1032 1033 aprint_normal("%s:", device_xname(dev)); 1034 /* NVM Image Version */ 1035 high = low = 0; 1036 switch (hw->mac.type) { 1037 case ixgbe_mac_82598EB: 1038 /* 1039 * Print version from the dev starter version (0x29). The 1040 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1041 */ 1042 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1043 if (nvmreg == 0xffff) 1044 break; 1045 high = (nvmreg >> 12) & 0x0f; 1046 low = (nvmreg >> 4) & 0xff; 1047 id = nvmreg & 0x0f; 1048 /* 1049 * The following output might not be correct. Some 82598 cards 1050 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1051 */ 1052 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1053 break; 1054 case ixgbe_mac_X540: 1055 case ixgbe_mac_X550EM_a: 1056 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1057 if (nvmreg == 0xffff) 1058 break; 1059 high = (nvmreg >> 12) & 0x0f; 1060 low = (nvmreg >> 4) & 0xff; 1061 id = nvmreg & 0x0f; 1062 aprint_normal(" NVM Image Version %u.", high); 1063 if (hw->mac.type == ixgbe_mac_X540) 1064 str = "%x"; 1065 else 1066 str = "%02x"; 1067 aprint_normal(str, low); 1068 aprint_normal(" ID 0x%x,", id); 1069 break; 1070 case ixgbe_mac_X550EM_x: 1071 case ixgbe_mac_X550: 1072 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1073 if (nvmreg == 0xffff) 1074 break; 1075 high = (nvmreg >> 12) & 0x0f; 1076 low = nvmreg & 0xff; 1077 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1078 break; 1079 default: 1080 break; 1081 } 1082 hw->eeprom.nvm_image_ver_high = high; 1083 hw->eeprom.nvm_image_ver_low = low; 1084 1085 /* PHY firmware revision */ 1086 switch (hw->mac.type) { 1087 case ixgbe_mac_X540: 1088 case ixgbe_mac_X550: 1089 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1090 if (nvmreg == 0xffff) 1091 break; 1092 high = (nvmreg >> 12) & 0x0f; 1093 low = (nvmreg >> 4) & 0xff; 1094 id = nvmreg & 0x000f; 1095 aprint_normal(" PHY FW Revision %u.", high); 1096 if (hw->mac.type == ixgbe_mac_X540) 1097 str = "%x"; 1098 else 1099 str = "%02x"; 1100 aprint_normal(str, low); 1101 aprint_normal(" ID 0x%x,", id); 1102 break; 1103 default: 1104 break; 1105 } 1106 1107 /* NVM Map version & OEM NVM Image version */ 1108 switch (hw->mac.type) { 1109 case ixgbe_mac_X550: 1110 case ixgbe_mac_X550EM_x: 1111 case ixgbe_mac_X550EM_a: 1112 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1113 if (nvmreg != 0xffff) { 1114 high = (nvmreg >> 12) & 0x0f; 1115 low = nvmreg & 0x00ff; 1116 aprint_normal(" NVM Map version %u.%02x,", high, low); 1117 } 1118 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1119 if (nvmreg != 0xffff) { 1120 high = (nvmreg >> 12) & 0x0f; 1121 low = nvmreg & 0x00ff; 1122 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1123 low); 1124 } 1125 break; 1126 default: 1127 break; 1128 } 1129 1130 /* Print the ETrackID */ 1131 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1132 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1133 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1134 1135 /* Printed Board Assembly number */ 1136 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1137 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1138 1139 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1140 error = ixgbe_allocate_msix(sc, pa); 1141 if (error) { 1142 /* Free allocated queue structures first */ 1143 ixgbe_free_queues(sc); 1144 1145 /* Fallback to legacy interrupt */ 1146 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1147 sc->feat_en |= IXGBE_FEATURE_MSI; 1148 sc->num_queues = 1; 1149 1150 /* Allocate our TX/RX Queues again */ 1151 if (ixgbe_allocate_queues(sc)) { 1152 error = ENOMEM; 1153 goto err_out; 1154 } 1155 } 1156 } 1157 1158 /* Recovery mode */ 1159 switch (sc->hw.mac.type) { 1160 case ixgbe_mac_X550: 1161 case ixgbe_mac_X550EM_x: 1162 case ixgbe_mac_X550EM_a: 1163 /* >= 2.00 */ 1164 if (hw->eeprom.nvm_image_ver_high >= 2) { 1165 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1166 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1167 } 1168 break; 1169 default: 1170 break; 1171 } 1172 1173 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1174 error = ixgbe_allocate_legacy(sc, pa); 1175 if (error) 1176 goto err_late; 1177 1178 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1179 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1180 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1181 error = workqueue_create(&sc->admin_wq, wqname, 1182 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1183 IXGBE_TASKLET_WQ_FLAGS); 1184 if (error) { 1185 aprint_error_dev(dev, 1186 "could not create admin workqueue (%d)\n", error); 1187 goto err_out; 1188 } 1189 1190 error = ixgbe_start_hw(hw); 1191 switch (error) { 1192 case IXGBE_ERR_EEPROM_VERSION: 1193 aprint_error_dev(dev, 1194 "This device is a pre-production adapter/" 1195 "LOM. Please be aware there may be issues associated " 1196 "with your hardware.\nIf you are experiencing problems " 1197 "please contact your Intel or hardware representative " 1198 "who provided you with this hardware.\n"); 1199 break; 1200 default: 1201 break; 1202 } 1203 1204 /* Setup OS specific network interface */ 1205 if (ixgbe_setup_interface(dev, sc) != 0) 1206 goto err_late; 1207 1208 /* 1209 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1210 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1211 */ 1212 if (hw->phy.media_type == ixgbe_media_type_copper) { 1213 uint16_t id1, id2; 1214 int oui, model, rev; 1215 char descr[MII_MAX_DESCR_LEN]; 1216 1217 id1 = hw->phy.id >> 16; 1218 id2 = hw->phy.id & 0xffff; 1219 oui = MII_OUI(id1, id2); 1220 model = MII_MODEL(id2); 1221 rev = MII_REV(id2); 1222 mii_get_descr(descr, sizeof(descr), oui, model); 1223 if (descr[0]) 1224 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1225 descr, rev); 1226 else 1227 aprint_normal_dev(dev, 1228 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1229 oui, model, rev); 1230 } 1231 1232 /* Enable EEE power saving */ 1233 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1234 hw->mac.ops.setup_eee(hw, 1235 sc->feat_en & IXGBE_FEATURE_EEE); 1236 1237 /* Enable power to the phy. */ 1238 if (!unsupported_sfp) { 1239 /* Enable the optics for 82599 SFP+ fiber */ 1240 ixgbe_enable_tx_laser(hw); 1241 1242 /* 1243 * XXX Currently, ixgbe_set_phy_power() supports only copper 1244 * PHY, so it's not required to test with !unsupported_sfp. 1245 */ 1246 ixgbe_set_phy_power(hw, TRUE); 1247 } 1248 1249 /* Initialize statistics */ 1250 ixgbe_update_stats_counters(sc); 1251 1252 /* Check PCIE slot type/speed/width */ 1253 ixgbe_get_slot_info(sc); 1254 1255 /* 1256 * Do time init and sysctl init here, but 1257 * only on the first port of a bypass adapter. 1258 */ 1259 ixgbe_bypass_init(sc); 1260 1261 /* Set an initial dmac value */ 1262 sc->dmac = 0; 1263 /* Set initial advertised speeds (if applicable) */ 1264 sc->advertise = ixgbe_get_default_advertise(sc); 1265 1266 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1267 ixgbe_define_iov_schemas(dev, &error); 1268 1269 /* Add sysctls */ 1270 ixgbe_add_device_sysctls(sc); 1271 ixgbe_add_hw_stats(sc); 1272 1273 /* For Netmap */ 1274 sc->init_locked = ixgbe_init_locked; 1275 sc->stop_locked = ixgbe_stop_locked; 1276 1277 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1278 ixgbe_netmap_attach(sc); 1279 1280 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1281 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1282 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1283 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1284 1285 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1286 pmf_class_network_register(dev, sc->ifp); 1287 else 1288 aprint_error_dev(dev, "couldn't establish power handler\n"); 1289 1290 /* Init recovery mode timer and state variable */ 1291 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1292 sc->recovery_mode = 0; 1293 1294 /* Set up the timer callout */ 1295 callout_init(&sc->recovery_mode_timer, 1296 IXGBE_CALLOUT_FLAGS); 1297 snprintf(wqname, sizeof(wqname), "%s-recovery", 1298 device_xname(dev)); 1299 error = workqueue_create(&sc->recovery_mode_timer_wq, 1300 wqname, ixgbe_handle_recovery_mode_timer, sc, 1301 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1302 if (error) { 1303 aprint_error_dev(dev, "could not create " 1304 "recovery_mode_timer workqueue (%d)\n", error); 1305 goto err_out; 1306 } 1307 1308 /* Start the task */ 1309 callout_reset(&sc->recovery_mode_timer, hz, 1310 ixgbe_recovery_mode_timer, sc); 1311 } 1312 1313 INIT_DEBUGOUT("ixgbe_attach: end"); 1314 sc->osdep.attached = true; 1315 1316 return; 1317 1318 err_late: 1319 ixgbe_free_queues(sc); 1320 err_out: 1321 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1322 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1323 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1324 ixgbe_free_deferred_handlers(sc); 1325 ixgbe_free_pci_resources(sc); 1326 if (sc->mta != NULL) 1327 free(sc->mta, M_DEVBUF); 1328 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1329 IXGBE_CORE_LOCK_DESTROY(sc); 1330 1331 return; 1332 } /* ixgbe_attach */ 1333 1334 /************************************************************************ 1335 * ixgbe_check_wol_support 1336 * 1337 * Checks whether the adapter's ports are capable of 1338 * Wake On LAN by reading the adapter's NVM. 1339 * 1340 * Sets each port's hw->wol_enabled value depending 1341 * on the value read here. 1342 ************************************************************************/ 1343 static void 1344 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1345 { 1346 struct ixgbe_hw *hw = &sc->hw; 1347 u16 dev_caps = 0; 1348 1349 /* Find out WoL support for port */ 1350 sc->wol_support = hw->wol_enabled = 0; 1351 ixgbe_get_device_caps(hw, &dev_caps); 1352 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1353 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1354 hw->bus.func == 0)) 1355 sc->wol_support = hw->wol_enabled = 1; 1356 1357 /* Save initial wake up filter configuration */ 1358 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1359 1360 return; 1361 } /* ixgbe_check_wol_support */ 1362 1363 /************************************************************************ 1364 * ixgbe_setup_interface 1365 * 1366 * Setup networking device structure and register an interface. 1367 ************************************************************************/ 1368 static int 1369 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1370 { 1371 struct ethercom *ec = &sc->osdep.ec; 1372 struct ifnet *ifp; 1373 1374 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1375 1376 ifp = sc->ifp = &ec->ec_if; 1377 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1378 ifp->if_baudrate = IF_Gbps(10); 1379 ifp->if_init = ixgbe_init; 1380 ifp->if_stop = ixgbe_ifstop; 1381 ifp->if_softc = sc; 1382 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1383 #ifdef IXGBE_MPSAFE 1384 ifp->if_extflags = IFEF_MPSAFE; 1385 #endif 1386 ifp->if_ioctl = ixgbe_ioctl; 1387 #if __FreeBSD_version >= 1100045 1388 /* TSO parameters */ 1389 ifp->if_hw_tsomax = 65518; 1390 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1391 ifp->if_hw_tsomaxsegsize = 2048; 1392 #endif 1393 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1394 #if 0 1395 ixgbe_start_locked = ixgbe_legacy_start_locked; 1396 #endif 1397 } else { 1398 ifp->if_transmit = ixgbe_mq_start; 1399 #if 0 1400 ixgbe_start_locked = ixgbe_mq_start_locked; 1401 #endif 1402 } 1403 ifp->if_start = ixgbe_legacy_start; 1404 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1405 IFQ_SET_READY(&ifp->if_snd); 1406 1407 if_initialize(ifp); 1408 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1409 ether_ifattach(ifp, sc->hw.mac.addr); 1410 aprint_normal_dev(dev, "Ethernet address %s\n", 1411 ether_sprintf(sc->hw.mac.addr)); 1412 /* 1413 * We use per TX queue softint, so if_deferred_start_init() isn't 1414 * used. 1415 */ 1416 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1417 1418 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1419 1420 /* 1421 * Tell the upper layer(s) we support long frames. 1422 */ 1423 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1424 1425 /* Set capability flags */ 1426 ifp->if_capabilities |= IFCAP_RXCSUM 1427 | IFCAP_TXCSUM 1428 | IFCAP_TSOv4 1429 | IFCAP_TSOv6; 1430 ifp->if_capenable = 0; 1431 1432 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1433 | ETHERCAP_VLAN_HWCSUM 1434 | ETHERCAP_JUMBO_MTU 1435 | ETHERCAP_VLAN_MTU; 1436 1437 /* Enable the above capabilities by default */ 1438 ec->ec_capenable = ec->ec_capabilities; 1439 1440 /* 1441 * Don't turn this on by default, if vlans are 1442 * created on another pseudo device (eg. lagg) 1443 * then vlan events are not passed thru, breaking 1444 * operation, but with HW FILTER off it works. If 1445 * using vlans directly on the ixgbe driver you can 1446 * enable this and get full hardware tag filtering. 1447 */ 1448 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1449 1450 /* 1451 * Specify the media types supported by this adapter and register 1452 * callbacks to update media and link information 1453 */ 1454 ec->ec_ifmedia = &sc->media; 1455 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1456 ixgbe_media_status, &sc->core_mtx); 1457 1458 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1459 ixgbe_add_media_types(sc); 1460 1461 /* Set autoselect media by default */ 1462 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1463 1464 if_register(ifp); 1465 1466 return (0); 1467 } /* ixgbe_setup_interface */ 1468 1469 /************************************************************************ 1470 * ixgbe_add_media_types 1471 ************************************************************************/ 1472 static void 1473 ixgbe_add_media_types(struct ixgbe_softc *sc) 1474 { 1475 struct ixgbe_hw *hw = &sc->hw; 1476 u64 layer; 1477 1478 layer = sc->phy_layer; 1479 1480 #define ADD(mm, dd) \ 1481 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1482 1483 ADD(IFM_NONE, 0); 1484 1485 /* Media types with matching NetBSD media defines */ 1486 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1487 ADD(IFM_10G_T | IFM_FDX, 0); 1488 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1489 ADD(IFM_1000_T | IFM_FDX, 0); 1490 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1491 ADD(IFM_100_TX | IFM_FDX, 0); 1492 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1493 ADD(IFM_10_T | IFM_FDX, 0); 1494 1495 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1496 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1497 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1498 1499 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1500 ADD(IFM_10G_LR | IFM_FDX, 0); 1501 if (hw->phy.multispeed_fiber) 1502 ADD(IFM_1000_LX | IFM_FDX, 0); 1503 } 1504 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1505 ADD(IFM_10G_SR | IFM_FDX, 0); 1506 if (hw->phy.multispeed_fiber) 1507 ADD(IFM_1000_SX | IFM_FDX, 0); 1508 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1509 ADD(IFM_1000_SX | IFM_FDX, 0); 1510 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1511 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1512 1513 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1514 ADD(IFM_10G_KR | IFM_FDX, 0); 1515 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1516 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1517 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1518 ADD(IFM_1000_KX | IFM_FDX, 0); 1519 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1520 ADD(IFM_2500_KX | IFM_FDX, 0); 1521 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1522 ADD(IFM_2500_T | IFM_FDX, 0); 1523 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1524 ADD(IFM_5000_T | IFM_FDX, 0); 1525 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1526 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1527 /* XXX no ifmedia_set? */ 1528 1529 ADD(IFM_AUTO, 0); 1530 1531 #undef ADD 1532 } /* ixgbe_add_media_types */ 1533 1534 /************************************************************************ 1535 * ixgbe_is_sfp 1536 ************************************************************************/ 1537 static inline bool 1538 ixgbe_is_sfp(struct ixgbe_hw *hw) 1539 { 1540 switch (hw->mac.type) { 1541 case ixgbe_mac_82598EB: 1542 if (hw->phy.type == ixgbe_phy_nl) 1543 return (TRUE); 1544 return (FALSE); 1545 case ixgbe_mac_82599EB: 1546 case ixgbe_mac_X550EM_x: 1547 case ixgbe_mac_X550EM_a: 1548 switch (hw->mac.ops.get_media_type(hw)) { 1549 case ixgbe_media_type_fiber: 1550 case ixgbe_media_type_fiber_qsfp: 1551 return (TRUE); 1552 default: 1553 return (FALSE); 1554 } 1555 default: 1556 return (FALSE); 1557 } 1558 } /* ixgbe_is_sfp */ 1559 1560 static void 1561 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1562 { 1563 1564 KASSERT(mutex_owned(&sc->admin_mtx)); 1565 1566 if (__predict_true(sc->osdep.detaching == false)) { 1567 if (sc->admin_pending == 0) 1568 workqueue_enqueue(sc->admin_wq, 1569 &sc->admin_wc, NULL); 1570 sc->admin_pending = 1; 1571 } 1572 } 1573 1574 /************************************************************************ 1575 * ixgbe_config_link 1576 ************************************************************************/ 1577 static void 1578 ixgbe_config_link(struct ixgbe_softc *sc) 1579 { 1580 struct ixgbe_hw *hw = &sc->hw; 1581 u32 autoneg, err = 0; 1582 u32 task_requests = 0; 1583 bool sfp, negotiate = false; 1584 1585 sfp = ixgbe_is_sfp(hw); 1586 1587 if (sfp) { 1588 if (hw->phy.multispeed_fiber) { 1589 ixgbe_enable_tx_laser(hw); 1590 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1591 } 1592 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1593 1594 mutex_enter(&sc->admin_mtx); 1595 sc->task_requests |= task_requests; 1596 ixgbe_schedule_admin_tasklet(sc); 1597 mutex_exit(&sc->admin_mtx); 1598 } else { 1599 struct ifmedia *ifm = &sc->media; 1600 1601 if (hw->mac.ops.check_link) 1602 err = ixgbe_check_link(hw, &sc->link_speed, 1603 &sc->link_up, FALSE); 1604 if (err) 1605 return; 1606 1607 /* 1608 * Check if it's the first call. If it's the first call, 1609 * get value for auto negotiation. 1610 */ 1611 autoneg = hw->phy.autoneg_advertised; 1612 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1613 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1614 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1615 &negotiate); 1616 if (err) 1617 return; 1618 if (hw->mac.ops.setup_link) 1619 err = hw->mac.ops.setup_link(hw, autoneg, 1620 sc->link_up); 1621 } 1622 } /* ixgbe_config_link */ 1623 1624 /************************************************************************ 1625 * ixgbe_update_stats_counters - Update board statistics counters. 1626 ************************************************************************/ 1627 static void 1628 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1629 { 1630 struct ifnet *ifp = sc->ifp; 1631 struct ixgbe_hw *hw = &sc->hw; 1632 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1633 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1634 u64 total, total_missed_rx = 0; 1635 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1636 unsigned int queue_counters; 1637 int i; 1638 1639 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1640 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1641 1642 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1643 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1644 if (hw->mac.type >= ixgbe_mac_X550) 1645 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1646 1647 /* 16 registers exist */ 1648 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1649 for (i = 0; i < queue_counters; i++) { 1650 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1651 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1652 if (hw->mac.type >= ixgbe_mac_82599EB) { 1653 IXGBE_EVC_ADD(&stats->qbrc[i], 1654 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1655 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1656 IXGBE_EVC_ADD(&stats->qbtc[i], 1657 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1658 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1659 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRDC(i), qprdc[i]); 1660 } else { 1661 /* 82598 */ 1662 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1663 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1664 } 1665 } 1666 1667 /* 8 registers exist */ 1668 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1669 uint32_t mp; 1670 1671 /* MPC */ 1672 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1673 /* global total per queue */ 1674 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1675 /* running comprehensive total for stats display */ 1676 total_missed_rx += mp; 1677 1678 if (hw->mac.type == ixgbe_mac_82598EB) 1679 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1680 1681 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1682 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1683 if (hw->mac.type >= ixgbe_mac_82599EB) { 1684 IXGBE_EVC_REGADD(hw, stats, 1685 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1686 IXGBE_EVC_REGADD(hw, stats, 1687 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1688 IXGBE_EVC_REGADD(hw, stats, 1689 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1690 } else { 1691 IXGBE_EVC_REGADD(hw, stats, 1692 IXGBE_PXONRXC(i), pxonrxc[i]); 1693 IXGBE_EVC_REGADD(hw, stats, 1694 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1695 } 1696 } 1697 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1698 1699 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1700 if ((sc->link_active == LINK_STATE_UP) 1701 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1702 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1703 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1704 } 1705 if (hw->mac.type == ixgbe_mac_X550EM_a) 1706 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1707 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1708 1709 /* Hardware workaround, gprc counts missed packets */ 1710 IXGBE_EVC_ADD(&stats->gprc, 1711 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1712 1713 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1714 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1715 total = lxontxc + lxofftxc; 1716 1717 if (hw->mac.type != ixgbe_mac_82598EB) { 1718 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1719 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1720 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1721 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1722 - total * ETHER_MIN_LEN); 1723 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1724 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1725 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1726 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1727 } else { 1728 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1729 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1730 /* 82598 only has a counter in the high register */ 1731 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1732 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1733 - total * ETHER_MIN_LEN); 1734 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1735 } 1736 1737 /* 1738 * Workaround: mprc hardware is incorrectly counting 1739 * broadcasts, so for now we subtract those. 1740 */ 1741 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1742 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1743 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1744 1745 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1746 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1747 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1748 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1749 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1750 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1751 1752 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1753 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1754 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1755 1756 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1757 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1758 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1759 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1760 1761 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1762 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1763 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1764 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1765 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1766 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1767 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1768 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1769 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1770 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1771 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1772 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1773 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1774 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1775 /* Only read FCOE on 82599 */ 1776 if (hw->mac.type != ixgbe_mac_82598EB) { 1777 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1778 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1779 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1780 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1781 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1782 } 1783 1784 /* 1785 * Fill out the OS statistics structure. Only RX errors are required 1786 * here because all TX counters are incremented in the TX path and 1787 * normal RX counters are prepared in ether_input(). 1788 */ 1789 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1790 if_statadd_ref(nsr, if_iqdrops, total_missed_rx); 1791 1792 /* 1793 * Aggregate following types of errors as RX errors: 1794 * - CRC error count, 1795 * - illegal byte error count, 1796 * - length error count, 1797 * - undersized packets count, 1798 * - fragmented packets count, 1799 * - oversized packets count, 1800 * - jabber count. 1801 */ 1802 if_statadd_ref(nsr, if_ierrors, 1803 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1804 1805 IF_STAT_PUTREF(ifp); 1806 } /* ixgbe_update_stats_counters */ 1807 1808 /************************************************************************ 1809 * ixgbe_add_hw_stats 1810 * 1811 * Add sysctl variables, one per statistic, to the system. 1812 ************************************************************************/ 1813 static void 1814 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1815 { 1816 device_t dev = sc->dev; 1817 const struct sysctlnode *rnode, *cnode; 1818 struct sysctllog **log = &sc->sysctllog; 1819 struct tx_ring *txr = sc->tx_rings; 1820 struct rx_ring *rxr = sc->rx_rings; 1821 struct ixgbe_hw *hw = &sc->hw; 1822 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1823 const char *xname = device_xname(dev); 1824 int i; 1825 1826 /* Driver Statistics */ 1827 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1828 NULL, xname, "Driver tx dma soft fail EFBIG"); 1829 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1830 NULL, xname, "m_defrag() failed"); 1831 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1832 NULL, xname, "Driver tx dma hard fail EFBIG"); 1833 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1834 NULL, xname, "Driver tx dma hard fail EINVAL"); 1835 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1836 NULL, xname, "Driver tx dma hard fail other"); 1837 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1838 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1839 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1840 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1841 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1842 NULL, xname, "Watchdog timeouts"); 1843 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1844 NULL, xname, "TSO errors"); 1845 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1846 NULL, xname, "Admin MSI-X IRQ Handled"); 1847 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1848 NULL, xname, "Link event"); 1849 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1850 NULL, xname, "SFP+ module event"); 1851 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1852 NULL, xname, "Multispeed event"); 1853 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1854 NULL, xname, "External PHY event"); 1855 1856 /* Max number of traffic class is 8 */ 1857 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1858 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1859 snprintf(sc->tcs[i].evnamebuf, 1860 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1861 if (i < __arraycount(stats->mpc)) { 1862 evcnt_attach_dynamic(&stats->mpc[i], 1863 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1864 "RX Missed Packet Count"); 1865 if (hw->mac.type == ixgbe_mac_82598EB) 1866 evcnt_attach_dynamic(&stats->rnbc[i], 1867 EVCNT_TYPE_MISC, NULL, 1868 sc->tcs[i].evnamebuf, 1869 "Receive No Buffers"); 1870 } 1871 if (i < __arraycount(stats->pxontxc)) { 1872 evcnt_attach_dynamic(&stats->pxontxc[i], 1873 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1874 "Priority XON Transmitted"); 1875 evcnt_attach_dynamic(&stats->pxofftxc[i], 1876 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1877 "Priority XOFF Transmitted"); 1878 if (hw->mac.type >= ixgbe_mac_82599EB) 1879 evcnt_attach_dynamic(&stats->pxon2offc[i], 1880 EVCNT_TYPE_MISC, NULL, 1881 sc->tcs[i].evnamebuf, 1882 "Priority XON to XOFF"); 1883 evcnt_attach_dynamic(&stats->pxonrxc[i], 1884 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1885 "Priority XON Received"); 1886 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1887 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1888 "Priority XOFF Received"); 1889 } 1890 } 1891 1892 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1893 #ifdef LRO 1894 struct lro_ctrl *lro = &rxr->lro; 1895 #endif 1896 1897 snprintf(sc->queues[i].evnamebuf, 1898 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1899 snprintf(sc->queues[i].namebuf, 1900 sizeof(sc->queues[i].namebuf), "q%d", i); 1901 1902 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1903 aprint_error_dev(dev, 1904 "could not create sysctl root\n"); 1905 break; 1906 } 1907 1908 if (sysctl_createv(log, 0, &rnode, &rnode, 1909 0, CTLTYPE_NODE, 1910 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1911 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1912 break; 1913 1914 if (sysctl_createv(log, 0, &rnode, &cnode, 1915 CTLFLAG_READWRITE, CTLTYPE_INT, 1916 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1917 ixgbe_sysctl_interrupt_rate_handler, 0, 1918 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1919 break; 1920 1921 if (sysctl_createv(log, 0, &rnode, &cnode, 1922 CTLFLAG_READONLY, CTLTYPE_INT, 1923 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1924 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1925 0, CTL_CREATE, CTL_EOL) != 0) 1926 break; 1927 1928 if (sysctl_createv(log, 0, &rnode, &cnode, 1929 CTLFLAG_READONLY, CTLTYPE_INT, 1930 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1931 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1932 0, CTL_CREATE, CTL_EOL) != 0) 1933 break; 1934 1935 if (sysctl_createv(log, 0, &rnode, &cnode, 1936 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1937 SYSCTL_DESCR("Receive Descriptor next to check"), 1938 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1939 CTL_CREATE, CTL_EOL) != 0) 1940 break; 1941 1942 if (sysctl_createv(log, 0, &rnode, &cnode, 1943 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1944 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1945 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1946 CTL_CREATE, CTL_EOL) != 0) 1947 break; 1948 1949 if (sysctl_createv(log, 0, &rnode, &cnode, 1950 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1951 SYSCTL_DESCR("Receive Descriptor Head"), 1952 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1953 CTL_CREATE, CTL_EOL) != 0) 1954 break; 1955 1956 if (sysctl_createv(log, 0, &rnode, &cnode, 1957 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1958 SYSCTL_DESCR("Receive Descriptor Tail"), 1959 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1960 CTL_CREATE, CTL_EOL) != 0) 1961 break; 1962 1963 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1964 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1965 evcnt_attach_dynamic(&sc->queues[i].handleq, 1966 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1967 "Handled queue in softint"); 1968 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1969 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1970 if (i < __arraycount(stats->qbtc)) 1971 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1972 NULL, sc->queues[i].evnamebuf, 1973 "Queue Bytes Transmitted (reg)"); 1974 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1975 NULL, sc->queues[i].evnamebuf, 1976 "Queue Packets Transmitted (soft)"); 1977 if (i < __arraycount(stats->qptc)) 1978 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1979 NULL, sc->queues[i].evnamebuf, 1980 "Queue Packets Transmitted (reg)"); 1981 #ifndef IXGBE_LEGACY_TX 1982 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1983 NULL, sc->queues[i].evnamebuf, 1984 "Packets dropped in pcq"); 1985 #endif 1986 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1987 NULL, sc->queues[i].evnamebuf, 1988 "TX Queue No Descriptor Available"); 1989 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 1990 NULL, sc->queues[i].evnamebuf, "TSO"); 1991 1992 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 1993 NULL, sc->queues[i].evnamebuf, 1994 "Queue Bytes Received (soft)"); 1995 if (i < __arraycount(stats->qbrc)) 1996 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 1997 NULL, sc->queues[i].evnamebuf, 1998 "Queue Bytes Received (reg)"); 1999 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 2000 NULL, sc->queues[i].evnamebuf, 2001 "Queue Packets Received (soft)"); 2002 if (i < __arraycount(stats->qprc)) 2003 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 2004 NULL, sc->queues[i].evnamebuf, 2005 "Queue Packets Received (reg)"); 2006 if ((i < __arraycount(stats->qprdc)) && 2007 (hw->mac.type >= ixgbe_mac_82599EB)) 2008 evcnt_attach_dynamic(&stats->qprdc[i], 2009 EVCNT_TYPE_MISC, NULL, 2010 sc->queues[i].evnamebuf, 2011 "Queue Packets Received Drop"); 2012 2013 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2014 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2015 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2016 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2017 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2018 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2019 #ifdef LRO 2020 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2021 CTLFLAG_RD, &lro->lro_queued, 0, 2022 "LRO Queued"); 2023 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2024 CTLFLAG_RD, &lro->lro_flushed, 0, 2025 "LRO Flushed"); 2026 #endif /* LRO */ 2027 } 2028 2029 /* MAC stats get their own sub node */ 2030 2031 snprintf(stats->namebuf, 2032 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2033 2034 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2035 stats->namebuf, "rx csum offload - IP"); 2036 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2037 stats->namebuf, "rx csum offload - L4"); 2038 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2039 stats->namebuf, "rx csum offload - IP bad"); 2040 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2041 stats->namebuf, "rx csum offload - L4 bad"); 2042 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2043 stats->namebuf, "Interrupt conditions zero"); 2044 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2045 stats->namebuf, "Legacy interrupts"); 2046 2047 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2048 stats->namebuf, "CRC Errors"); 2049 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2050 stats->namebuf, "Illegal Byte Errors"); 2051 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2052 stats->namebuf, "Byte Errors"); 2053 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2054 stats->namebuf, "MAC Short Packets Discarded"); 2055 if (hw->mac.type >= ixgbe_mac_X550) 2056 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2057 stats->namebuf, "Bad SFD"); 2058 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2059 stats->namebuf, "Total Packets Missed"); 2060 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2061 stats->namebuf, "MAC Local Faults"); 2062 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2063 stats->namebuf, "MAC Remote Faults"); 2064 if (hw->mac.type == ixgbe_mac_X550EM_a) 2065 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2066 NULL, stats->namebuf, "Link down event in the MAC"); 2067 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2068 stats->namebuf, "Receive Length Errors"); 2069 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2070 stats->namebuf, "Link XON Transmitted"); 2071 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2072 stats->namebuf, "Link XOFF Transmitted"); 2073 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2074 stats->namebuf, "Link XON Received"); 2075 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2076 stats->namebuf, "Link XOFF Received"); 2077 2078 /* Packet Reception Stats */ 2079 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2080 stats->namebuf, "Total Octets Received"); 2081 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2082 stats->namebuf, "Good Octets Received"); 2083 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2084 stats->namebuf, "Total Packets Received"); 2085 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2086 stats->namebuf, "Good Packets Received"); 2087 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2088 stats->namebuf, "Multicast Packets Received"); 2089 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2090 stats->namebuf, "Broadcast Packets Received"); 2091 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2092 stats->namebuf, "64 byte frames received "); 2093 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2094 stats->namebuf, "65-127 byte frames received"); 2095 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2096 stats->namebuf, "128-255 byte frames received"); 2097 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2098 stats->namebuf, "256-511 byte frames received"); 2099 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2100 stats->namebuf, "512-1023 byte frames received"); 2101 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2102 stats->namebuf, "1023-1522 byte frames received"); 2103 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2104 stats->namebuf, "Receive Undersized"); 2105 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2106 stats->namebuf, "Fragmented Packets Received "); 2107 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2108 stats->namebuf, "Oversized Packets Received"); 2109 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2110 stats->namebuf, "Received Jabber"); 2111 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2112 stats->namebuf, "Management Packets Received"); 2113 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2114 stats->namebuf, "Management Packets Dropped"); 2115 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2116 stats->namebuf, "Checksum Errors"); 2117 2118 /* Packet Transmission Stats */ 2119 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2120 stats->namebuf, "Good Octets Transmitted"); 2121 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2122 stats->namebuf, "Total Packets Transmitted"); 2123 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2124 stats->namebuf, "Good Packets Transmitted"); 2125 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2126 stats->namebuf, "Broadcast Packets Transmitted"); 2127 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2128 stats->namebuf, "Multicast Packets Transmitted"); 2129 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2130 stats->namebuf, "Management Packets Transmitted"); 2131 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2132 stats->namebuf, "64 byte frames transmitted "); 2133 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2134 stats->namebuf, "65-127 byte frames transmitted"); 2135 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2136 stats->namebuf, "128-255 byte frames transmitted"); 2137 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2138 stats->namebuf, "256-511 byte frames transmitted"); 2139 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2140 stats->namebuf, "512-1023 byte frames transmitted"); 2141 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2142 stats->namebuf, "1024-1522 byte frames transmitted"); 2143 } /* ixgbe_add_hw_stats */ 2144 2145 static void 2146 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2147 { 2148 struct tx_ring *txr = sc->tx_rings; 2149 struct rx_ring *rxr = sc->rx_rings; 2150 struct ixgbe_hw *hw = &sc->hw; 2151 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2152 int i; 2153 2154 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2155 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2156 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2157 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2158 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2159 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2160 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2161 IXGBE_EVC_STORE(&sc->tso_err, 0); 2162 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2163 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2164 IXGBE_EVC_STORE(&sc->link_workev, 0); 2165 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2166 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2167 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2168 2169 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2170 if (i < __arraycount(stats->mpc)) { 2171 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2172 if (hw->mac.type == ixgbe_mac_82598EB) 2173 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2174 } 2175 if (i < __arraycount(stats->pxontxc)) { 2176 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2177 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2178 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2179 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2180 if (hw->mac.type >= ixgbe_mac_82599EB) 2181 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2182 } 2183 } 2184 2185 txr = sc->tx_rings; 2186 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2187 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2188 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2189 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2190 IXGBE_EVC_STORE(&txr->total_packets, 0); 2191 #ifndef IXGBE_LEGACY_TX 2192 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2193 #endif 2194 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2195 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2196 txr->q_efbig_tx_dma_setup = 0; 2197 txr->q_mbuf_defrag_failed = 0; 2198 txr->q_efbig2_tx_dma_setup = 0; 2199 txr->q_einval_tx_dma_setup = 0; 2200 txr->q_other_tx_dma_setup = 0; 2201 txr->q_eagain_tx_dma_setup = 0; 2202 txr->q_enomem_tx_dma_setup = 0; 2203 txr->q_tso_err = 0; 2204 2205 if (i < __arraycount(stats->qprc)) { 2206 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2207 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2208 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2209 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2210 if (hw->mac.type >= ixgbe_mac_82599EB) 2211 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2212 } 2213 2214 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2215 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2216 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2217 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2218 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2219 } 2220 IXGBE_EVC_STORE(&stats->ipcs, 0); 2221 IXGBE_EVC_STORE(&stats->l4cs, 0); 2222 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2223 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2224 IXGBE_EVC_STORE(&stats->intzero, 0); 2225 IXGBE_EVC_STORE(&stats->legint, 0); 2226 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2227 IXGBE_EVC_STORE(&stats->illerrc, 0); 2228 IXGBE_EVC_STORE(&stats->errbc, 0); 2229 IXGBE_EVC_STORE(&stats->mspdc, 0); 2230 if (hw->mac.type >= ixgbe_mac_X550) 2231 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2232 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2233 IXGBE_EVC_STORE(&stats->mlfc, 0); 2234 IXGBE_EVC_STORE(&stats->mrfc, 0); 2235 if (hw->mac.type == ixgbe_mac_X550EM_a) 2236 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2237 IXGBE_EVC_STORE(&stats->rlec, 0); 2238 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2239 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2240 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2241 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2242 2243 /* Packet Reception Stats */ 2244 IXGBE_EVC_STORE(&stats->tor, 0); 2245 IXGBE_EVC_STORE(&stats->gorc, 0); 2246 IXGBE_EVC_STORE(&stats->tpr, 0); 2247 IXGBE_EVC_STORE(&stats->gprc, 0); 2248 IXGBE_EVC_STORE(&stats->mprc, 0); 2249 IXGBE_EVC_STORE(&stats->bprc, 0); 2250 IXGBE_EVC_STORE(&stats->prc64, 0); 2251 IXGBE_EVC_STORE(&stats->prc127, 0); 2252 IXGBE_EVC_STORE(&stats->prc255, 0); 2253 IXGBE_EVC_STORE(&stats->prc511, 0); 2254 IXGBE_EVC_STORE(&stats->prc1023, 0); 2255 IXGBE_EVC_STORE(&stats->prc1522, 0); 2256 IXGBE_EVC_STORE(&stats->ruc, 0); 2257 IXGBE_EVC_STORE(&stats->rfc, 0); 2258 IXGBE_EVC_STORE(&stats->roc, 0); 2259 IXGBE_EVC_STORE(&stats->rjc, 0); 2260 IXGBE_EVC_STORE(&stats->mngprc, 0); 2261 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2262 IXGBE_EVC_STORE(&stats->xec, 0); 2263 2264 /* Packet Transmission Stats */ 2265 IXGBE_EVC_STORE(&stats->gotc, 0); 2266 IXGBE_EVC_STORE(&stats->tpt, 0); 2267 IXGBE_EVC_STORE(&stats->gptc, 0); 2268 IXGBE_EVC_STORE(&stats->bptc, 0); 2269 IXGBE_EVC_STORE(&stats->mptc, 0); 2270 IXGBE_EVC_STORE(&stats->mngptc, 0); 2271 IXGBE_EVC_STORE(&stats->ptc64, 0); 2272 IXGBE_EVC_STORE(&stats->ptc127, 0); 2273 IXGBE_EVC_STORE(&stats->ptc255, 0); 2274 IXGBE_EVC_STORE(&stats->ptc511, 0); 2275 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2276 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2277 } 2278 2279 /************************************************************************ 2280 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2281 * 2282 * Retrieves the TDH value from the hardware 2283 ************************************************************************/ 2284 static int 2285 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2286 { 2287 struct sysctlnode node = *rnode; 2288 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2289 struct ixgbe_softc *sc; 2290 uint32_t val; 2291 2292 if (!txr) 2293 return (0); 2294 2295 sc = txr->sc; 2296 if (ixgbe_fw_recovery_mode_swflag(sc)) 2297 return (EPERM); 2298 2299 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2300 node.sysctl_data = &val; 2301 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2302 } /* ixgbe_sysctl_tdh_handler */ 2303 2304 /************************************************************************ 2305 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2306 * 2307 * Retrieves the TDT value from the hardware 2308 ************************************************************************/ 2309 static int 2310 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2311 { 2312 struct sysctlnode node = *rnode; 2313 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2314 struct ixgbe_softc *sc; 2315 uint32_t val; 2316 2317 if (!txr) 2318 return (0); 2319 2320 sc = txr->sc; 2321 if (ixgbe_fw_recovery_mode_swflag(sc)) 2322 return (EPERM); 2323 2324 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2325 node.sysctl_data = &val; 2326 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2327 } /* ixgbe_sysctl_tdt_handler */ 2328 2329 /************************************************************************ 2330 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2331 * handler function 2332 * 2333 * Retrieves the next_to_check value 2334 ************************************************************************/ 2335 static int 2336 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2337 { 2338 struct sysctlnode node = *rnode; 2339 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2340 struct ixgbe_softc *sc; 2341 uint32_t val; 2342 2343 if (!rxr) 2344 return (0); 2345 2346 sc = rxr->sc; 2347 if (ixgbe_fw_recovery_mode_swflag(sc)) 2348 return (EPERM); 2349 2350 val = rxr->next_to_check; 2351 node.sysctl_data = &val; 2352 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2353 } /* ixgbe_sysctl_next_to_check_handler */ 2354 2355 /************************************************************************ 2356 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2357 * handler function 2358 * 2359 * Retrieves the next_to_refresh value 2360 ************************************************************************/ 2361 static int 2362 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2363 { 2364 struct sysctlnode node = *rnode; 2365 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2366 struct ixgbe_softc *sc; 2367 uint32_t val; 2368 2369 if (!rxr) 2370 return (0); 2371 2372 sc = rxr->sc; 2373 if (ixgbe_fw_recovery_mode_swflag(sc)) 2374 return (EPERM); 2375 2376 val = rxr->next_to_refresh; 2377 node.sysctl_data = &val; 2378 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2379 } /* ixgbe_sysctl_next_to_refresh_handler */ 2380 2381 /************************************************************************ 2382 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2383 * 2384 * Retrieves the RDH value from the hardware 2385 ************************************************************************/ 2386 static int 2387 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2388 { 2389 struct sysctlnode node = *rnode; 2390 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2391 struct ixgbe_softc *sc; 2392 uint32_t val; 2393 2394 if (!rxr) 2395 return (0); 2396 2397 sc = rxr->sc; 2398 if (ixgbe_fw_recovery_mode_swflag(sc)) 2399 return (EPERM); 2400 2401 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2402 node.sysctl_data = &val; 2403 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2404 } /* ixgbe_sysctl_rdh_handler */ 2405 2406 /************************************************************************ 2407 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2408 * 2409 * Retrieves the RDT value from the hardware 2410 ************************************************************************/ 2411 static int 2412 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2413 { 2414 struct sysctlnode node = *rnode; 2415 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2416 struct ixgbe_softc *sc; 2417 uint32_t val; 2418 2419 if (!rxr) 2420 return (0); 2421 2422 sc = rxr->sc; 2423 if (ixgbe_fw_recovery_mode_swflag(sc)) 2424 return (EPERM); 2425 2426 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2427 node.sysctl_data = &val; 2428 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2429 } /* ixgbe_sysctl_rdt_handler */ 2430 2431 static int 2432 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2433 { 2434 struct ifnet *ifp = &ec->ec_if; 2435 struct ixgbe_softc *sc = ifp->if_softc; 2436 int rv; 2437 2438 if (set) 2439 rv = ixgbe_register_vlan(sc, vid); 2440 else 2441 rv = ixgbe_unregister_vlan(sc, vid); 2442 2443 if (rv != 0) 2444 return rv; 2445 2446 /* 2447 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2448 * or 0 to 1. 2449 */ 2450 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2451 ixgbe_setup_vlan_hw_tagging(sc); 2452 2453 return rv; 2454 } 2455 2456 /************************************************************************ 2457 * ixgbe_register_vlan 2458 * 2459 * Run via vlan config EVENT, it enables us to use the 2460 * HW Filter table since we can get the vlan id. This 2461 * just creates the entry in the soft version of the 2462 * VFTA, init will repopulate the real table. 2463 ************************************************************************/ 2464 static int 2465 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2466 { 2467 u16 index, bit; 2468 int error; 2469 2470 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2471 return EINVAL; 2472 2473 IXGBE_CORE_LOCK(sc); 2474 index = (vtag >> 5) & 0x7F; 2475 bit = vtag & 0x1F; 2476 sc->shadow_vfta[index] |= ((u32)1 << bit); 2477 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2478 true); 2479 IXGBE_CORE_UNLOCK(sc); 2480 if (error != 0) 2481 error = EACCES; 2482 2483 return error; 2484 } /* ixgbe_register_vlan */ 2485 2486 /************************************************************************ 2487 * ixgbe_unregister_vlan 2488 * 2489 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2490 ************************************************************************/ 2491 static int 2492 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2493 { 2494 u16 index, bit; 2495 int error; 2496 2497 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2498 return EINVAL; 2499 2500 IXGBE_CORE_LOCK(sc); 2501 index = (vtag >> 5) & 0x7F; 2502 bit = vtag & 0x1F; 2503 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2504 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2505 true); 2506 IXGBE_CORE_UNLOCK(sc); 2507 if (error != 0) 2508 error = EACCES; 2509 2510 return error; 2511 } /* ixgbe_unregister_vlan */ 2512 2513 static void 2514 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2515 { 2516 struct ethercom *ec = &sc->osdep.ec; 2517 struct ixgbe_hw *hw = &sc->hw; 2518 struct rx_ring *rxr; 2519 u32 ctrl; 2520 int i; 2521 bool hwtagging; 2522 2523 /* Enable HW tagging only if any vlan is attached */ 2524 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2525 && VLAN_ATTACHED(ec); 2526 2527 /* Setup the queues for vlans */ 2528 for (i = 0; i < sc->num_queues; i++) { 2529 rxr = &sc->rx_rings[i]; 2530 /* 2531 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2532 */ 2533 if (hw->mac.type != ixgbe_mac_82598EB) { 2534 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2535 if (hwtagging) 2536 ctrl |= IXGBE_RXDCTL_VME; 2537 else 2538 ctrl &= ~IXGBE_RXDCTL_VME; 2539 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2540 } 2541 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2542 } 2543 2544 /* VLAN hw tagging for 82598 */ 2545 if (hw->mac.type == ixgbe_mac_82598EB) { 2546 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2547 if (hwtagging) 2548 ctrl |= IXGBE_VLNCTRL_VME; 2549 else 2550 ctrl &= ~IXGBE_VLNCTRL_VME; 2551 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2552 } 2553 } /* ixgbe_setup_vlan_hw_tagging */ 2554 2555 static void 2556 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2557 { 2558 struct ethercom *ec = &sc->osdep.ec; 2559 struct ixgbe_hw *hw = &sc->hw; 2560 int i; 2561 u32 ctrl; 2562 struct vlanid_list *vlanidp; 2563 2564 /* 2565 * This function is called from both if_init and ifflags_cb() 2566 * on NetBSD. 2567 */ 2568 2569 /* 2570 * Part 1: 2571 * Setup VLAN HW tagging 2572 */ 2573 ixgbe_setup_vlan_hw_tagging(sc); 2574 2575 /* 2576 * Part 2: 2577 * Setup VLAN HW filter 2578 */ 2579 /* Cleanup shadow_vfta */ 2580 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2581 sc->shadow_vfta[i] = 0; 2582 /* Generate shadow_vfta from ec_vids */ 2583 ETHER_LOCK(ec); 2584 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2585 uint32_t idx; 2586 2587 idx = vlanidp->vid / 32; 2588 KASSERT(idx < IXGBE_VFTA_SIZE); 2589 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2590 } 2591 ETHER_UNLOCK(ec); 2592 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2593 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2594 2595 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2596 /* Enable the Filter Table if enabled */ 2597 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2598 ctrl |= IXGBE_VLNCTRL_VFE; 2599 else 2600 ctrl &= ~IXGBE_VLNCTRL_VFE; 2601 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2602 } /* ixgbe_setup_vlan_hw_support */ 2603 2604 /************************************************************************ 2605 * ixgbe_get_slot_info 2606 * 2607 * Get the width and transaction speed of 2608 * the slot this adapter is plugged into. 2609 ************************************************************************/ 2610 static void 2611 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2612 { 2613 device_t dev = sc->dev; 2614 struct ixgbe_hw *hw = &sc->hw; 2615 u32 offset; 2616 u16 link; 2617 int bus_info_valid = TRUE; 2618 2619 /* Some devices are behind an internal bridge */ 2620 switch (hw->device_id) { 2621 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2622 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2623 goto get_parent_info; 2624 default: 2625 break; 2626 } 2627 2628 ixgbe_get_bus_info(hw); 2629 2630 /* 2631 * Some devices don't use PCI-E, but there is no need 2632 * to display "Unknown" for bus speed and width. 2633 */ 2634 switch (hw->mac.type) { 2635 case ixgbe_mac_X550EM_x: 2636 case ixgbe_mac_X550EM_a: 2637 return; 2638 default: 2639 goto display; 2640 } 2641 2642 get_parent_info: 2643 /* 2644 * For the Quad port adapter we need to parse back 2645 * up the PCI tree to find the speed of the expansion 2646 * slot into which this adapter is plugged. A bit more work. 2647 */ 2648 dev = device_parent(device_parent(dev)); 2649 #if 0 2650 #ifdef IXGBE_DEBUG 2651 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2652 pci_get_slot(dev), pci_get_function(dev)); 2653 #endif 2654 dev = device_parent(device_parent(dev)); 2655 #ifdef IXGBE_DEBUG 2656 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2657 pci_get_slot(dev), pci_get_function(dev)); 2658 #endif 2659 #endif 2660 /* Now get the PCI Express Capabilities offset */ 2661 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2662 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2663 /* 2664 * Hmm...can't get PCI-Express capabilities. 2665 * Falling back to default method. 2666 */ 2667 bus_info_valid = FALSE; 2668 ixgbe_get_bus_info(hw); 2669 goto display; 2670 } 2671 /* ...and read the Link Status Register */ 2672 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2673 offset + PCIE_LCSR) >> 16; 2674 ixgbe_set_pci_config_data_generic(hw, link); 2675 2676 display: 2677 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2678 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2679 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2680 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2681 "Unknown"), 2682 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2683 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2684 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2685 "Unknown")); 2686 2687 if (bus_info_valid) { 2688 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2689 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2690 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2691 device_printf(dev, "PCI-Express bandwidth available" 2692 " for this card\n is not sufficient for" 2693 " optimal performance.\n"); 2694 device_printf(dev, "For optimal performance a x8 " 2695 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2696 } 2697 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2698 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2699 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2700 device_printf(dev, "PCI-Express bandwidth available" 2701 " for this card\n is not sufficient for" 2702 " optimal performance.\n"); 2703 device_printf(dev, "For optimal performance a x8 " 2704 "PCIE Gen3 slot is required.\n"); 2705 } 2706 } else 2707 device_printf(dev, 2708 "Unable to determine slot speed/width. The speed/width " 2709 "reported are that of the internal switch.\n"); 2710 2711 return; 2712 } /* ixgbe_get_slot_info */ 2713 2714 /************************************************************************ 2715 * ixgbe_enable_queue - Queue Interrupt Enabler 2716 ************************************************************************/ 2717 static inline void 2718 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2719 { 2720 struct ixgbe_hw *hw = &sc->hw; 2721 struct ix_queue *que = &sc->queues[vector]; 2722 u64 queue = 1ULL << vector; 2723 u32 mask; 2724 2725 mutex_enter(&que->dc_mtx); 2726 if (que->disabled_count > 0 && --que->disabled_count > 0) 2727 goto out; 2728 2729 if (hw->mac.type == ixgbe_mac_82598EB) { 2730 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2731 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2732 } else { 2733 mask = (queue & 0xFFFFFFFF); 2734 if (mask) 2735 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2736 mask = (queue >> 32); 2737 if (mask) 2738 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2739 } 2740 out: 2741 mutex_exit(&que->dc_mtx); 2742 } /* ixgbe_enable_queue */ 2743 2744 /************************************************************************ 2745 * ixgbe_disable_queue_internal 2746 ************************************************************************/ 2747 static inline void 2748 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2749 { 2750 struct ixgbe_hw *hw = &sc->hw; 2751 struct ix_queue *que = &sc->queues[vector]; 2752 u64 queue = 1ULL << vector; 2753 u32 mask; 2754 2755 mutex_enter(&que->dc_mtx); 2756 2757 if (que->disabled_count > 0) { 2758 if (nestok) 2759 que->disabled_count++; 2760 goto out; 2761 } 2762 que->disabled_count++; 2763 2764 if (hw->mac.type == ixgbe_mac_82598EB) { 2765 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2766 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2767 } else { 2768 mask = (queue & 0xFFFFFFFF); 2769 if (mask) 2770 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2771 mask = (queue >> 32); 2772 if (mask) 2773 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2774 } 2775 out: 2776 mutex_exit(&que->dc_mtx); 2777 } /* ixgbe_disable_queue_internal */ 2778 2779 /************************************************************************ 2780 * ixgbe_disable_queue 2781 ************************************************************************/ 2782 static inline void 2783 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2784 { 2785 2786 ixgbe_disable_queue_internal(sc, vector, true); 2787 } /* ixgbe_disable_queue */ 2788 2789 /************************************************************************ 2790 * ixgbe_sched_handle_que - schedule deferred packet processing 2791 ************************************************************************/ 2792 static inline void 2793 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2794 { 2795 2796 if (que->txrx_use_workqueue) { 2797 /* 2798 * sc->que_wq is bound to each CPU instead of 2799 * each NIC queue to reduce workqueue kthread. As we 2800 * should consider about interrupt affinity in this 2801 * function, the workqueue kthread must be WQ_PERCPU. 2802 * If create WQ_PERCPU workqueue kthread for each NIC 2803 * queue, that number of created workqueue kthread is 2804 * (number of used NIC queue) * (number of CPUs) = 2805 * (number of CPUs) ^ 2 most often. 2806 * 2807 * The same NIC queue's interrupts are avoided by 2808 * masking the queue's interrupt. And different 2809 * NIC queue's interrupts use different struct work 2810 * (que->wq_cookie). So, "enqueued flag" to avoid 2811 * twice workqueue_enqueue() is not required . 2812 */ 2813 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2814 } else 2815 softint_schedule(que->que_si); 2816 } 2817 2818 /************************************************************************ 2819 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2820 ************************************************************************/ 2821 static int 2822 ixgbe_msix_que(void *arg) 2823 { 2824 struct ix_queue *que = arg; 2825 struct ixgbe_softc *sc = que->sc; 2826 struct ifnet *ifp = sc->ifp; 2827 struct tx_ring *txr = que->txr; 2828 struct rx_ring *rxr = que->rxr; 2829 u32 newitr = 0; 2830 2831 /* Protect against spurious interrupts */ 2832 if ((ifp->if_flags & IFF_RUNNING) == 0) 2833 return 0; 2834 2835 ixgbe_disable_queue(sc, que->msix); 2836 IXGBE_EVC_ADD(&que->irqs, 1); 2837 2838 /* 2839 * Don't change "que->txrx_use_workqueue" from this point to avoid 2840 * flip-flopping softint/workqueue mode in one deferred processing. 2841 */ 2842 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2843 2844 IXGBE_TX_LOCK(txr); 2845 ixgbe_txeof(txr); 2846 IXGBE_TX_UNLOCK(txr); 2847 2848 /* Do AIM now? */ 2849 2850 if (sc->enable_aim == false) 2851 goto no_calc; 2852 /* 2853 * Do Adaptive Interrupt Moderation: 2854 * - Write out last calculated setting 2855 * - Calculate based on average size over 2856 * the last interval. 2857 */ 2858 if (que->eitr_setting) 2859 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2860 2861 que->eitr_setting = 0; 2862 2863 /* Idle, do nothing */ 2864 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2865 goto no_calc; 2866 2867 if ((txr->bytes) && (txr->packets)) 2868 newitr = txr->bytes/txr->packets; 2869 if ((rxr->bytes) && (rxr->packets)) 2870 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2871 newitr += 24; /* account for hardware frame, crc */ 2872 2873 /* set an upper boundary */ 2874 newitr = uimin(newitr, 3000); 2875 2876 /* Be nice to the mid range */ 2877 if ((newitr > 300) && (newitr < 1200)) 2878 newitr = (newitr / 3); 2879 else 2880 newitr = (newitr / 2); 2881 2882 /* 2883 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2884 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2885 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2886 * on 1G and higher. 2887 */ 2888 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2889 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2890 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2891 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2892 2893 /* save for next interrupt */ 2894 que->eitr_setting = newitr; 2895 2896 /* Reset state */ 2897 txr->bytes = 0; 2898 txr->packets = 0; 2899 rxr->bytes = 0; 2900 rxr->packets = 0; 2901 2902 no_calc: 2903 ixgbe_sched_handle_que(sc, que); 2904 2905 return 1; 2906 } /* ixgbe_msix_que */ 2907 2908 /************************************************************************ 2909 * ixgbe_media_status - Media Ioctl callback 2910 * 2911 * Called whenever the user queries the status of 2912 * the interface using ifconfig. 2913 ************************************************************************/ 2914 static void 2915 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2916 { 2917 struct ixgbe_softc *sc = ifp->if_softc; 2918 struct ixgbe_hw *hw = &sc->hw; 2919 int layer; 2920 2921 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2922 ixgbe_update_link_status(sc); 2923 2924 ifmr->ifm_status = IFM_AVALID; 2925 ifmr->ifm_active = IFM_ETHER; 2926 2927 if (sc->link_active != LINK_STATE_UP) { 2928 ifmr->ifm_active |= IFM_NONE; 2929 return; 2930 } 2931 2932 ifmr->ifm_status |= IFM_ACTIVE; 2933 layer = sc->phy_layer; 2934 2935 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2936 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2937 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2938 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2939 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2940 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2941 switch (sc->link_speed) { 2942 case IXGBE_LINK_SPEED_10GB_FULL: 2943 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2944 break; 2945 case IXGBE_LINK_SPEED_5GB_FULL: 2946 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2947 break; 2948 case IXGBE_LINK_SPEED_2_5GB_FULL: 2949 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2950 break; 2951 case IXGBE_LINK_SPEED_1GB_FULL: 2952 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2953 break; 2954 case IXGBE_LINK_SPEED_100_FULL: 2955 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2956 break; 2957 case IXGBE_LINK_SPEED_10_FULL: 2958 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2959 break; 2960 } 2961 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2962 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2963 switch (sc->link_speed) { 2964 case IXGBE_LINK_SPEED_10GB_FULL: 2965 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2966 break; 2967 } 2968 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2969 switch (sc->link_speed) { 2970 case IXGBE_LINK_SPEED_10GB_FULL: 2971 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2972 break; 2973 case IXGBE_LINK_SPEED_1GB_FULL: 2974 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2975 break; 2976 } 2977 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2978 switch (sc->link_speed) { 2979 case IXGBE_LINK_SPEED_10GB_FULL: 2980 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2981 break; 2982 case IXGBE_LINK_SPEED_1GB_FULL: 2983 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2984 break; 2985 } 2986 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2987 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2988 switch (sc->link_speed) { 2989 case IXGBE_LINK_SPEED_10GB_FULL: 2990 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2991 break; 2992 case IXGBE_LINK_SPEED_1GB_FULL: 2993 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2994 break; 2995 } 2996 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2997 switch (sc->link_speed) { 2998 case IXGBE_LINK_SPEED_10GB_FULL: 2999 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3000 break; 3001 } 3002 /* 3003 * XXX: These need to use the proper media types once 3004 * they're added. 3005 */ 3006 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3007 switch (sc->link_speed) { 3008 case IXGBE_LINK_SPEED_10GB_FULL: 3009 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3010 break; 3011 case IXGBE_LINK_SPEED_2_5GB_FULL: 3012 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3013 break; 3014 case IXGBE_LINK_SPEED_1GB_FULL: 3015 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3016 break; 3017 } 3018 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3019 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3020 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3021 switch (sc->link_speed) { 3022 case IXGBE_LINK_SPEED_10GB_FULL: 3023 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3024 break; 3025 case IXGBE_LINK_SPEED_2_5GB_FULL: 3026 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3027 break; 3028 case IXGBE_LINK_SPEED_1GB_FULL: 3029 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3030 break; 3031 } 3032 3033 /* If nothing is recognized... */ 3034 #if 0 3035 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3036 ifmr->ifm_active |= IFM_UNKNOWN; 3037 #endif 3038 3039 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3040 3041 /* Display current flow control setting used on link */ 3042 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3043 hw->fc.current_mode == ixgbe_fc_full) 3044 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3045 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3046 hw->fc.current_mode == ixgbe_fc_full) 3047 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3048 3049 return; 3050 } /* ixgbe_media_status */ 3051 3052 /************************************************************************ 3053 * ixgbe_media_change - Media Ioctl callback 3054 * 3055 * Called when the user changes speed/duplex using 3056 * media/mediopt option with ifconfig. 3057 ************************************************************************/ 3058 static int 3059 ixgbe_media_change(struct ifnet *ifp) 3060 { 3061 struct ixgbe_softc *sc = ifp->if_softc; 3062 struct ifmedia *ifm = &sc->media; 3063 struct ixgbe_hw *hw = &sc->hw; 3064 ixgbe_link_speed speed = 0; 3065 ixgbe_link_speed link_caps = 0; 3066 bool negotiate = false; 3067 s32 err = IXGBE_NOT_IMPLEMENTED; 3068 3069 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3070 3071 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3072 return (EINVAL); 3073 3074 if (hw->phy.media_type == ixgbe_media_type_backplane) 3075 return (EPERM); 3076 3077 /* 3078 * We don't actually need to check against the supported 3079 * media types of the adapter; ifmedia will take care of 3080 * that for us. 3081 */ 3082 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3083 case IFM_AUTO: 3084 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3085 &negotiate); 3086 if (err != IXGBE_SUCCESS) { 3087 device_printf(sc->dev, "Unable to determine " 3088 "supported advertise speeds\n"); 3089 return (ENODEV); 3090 } 3091 speed |= link_caps; 3092 break; 3093 case IFM_10G_T: 3094 case IFM_10G_LRM: 3095 case IFM_10G_LR: 3096 case IFM_10G_TWINAX: 3097 case IFM_10G_SR: 3098 case IFM_10G_CX4: 3099 case IFM_10G_KR: 3100 case IFM_10G_KX4: 3101 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3102 break; 3103 case IFM_5000_T: 3104 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3105 break; 3106 case IFM_2500_T: 3107 case IFM_2500_KX: 3108 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3109 break; 3110 case IFM_1000_T: 3111 case IFM_1000_LX: 3112 case IFM_1000_SX: 3113 case IFM_1000_KX: 3114 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3115 break; 3116 case IFM_100_TX: 3117 speed |= IXGBE_LINK_SPEED_100_FULL; 3118 break; 3119 case IFM_10_T: 3120 speed |= IXGBE_LINK_SPEED_10_FULL; 3121 break; 3122 case IFM_NONE: 3123 break; 3124 default: 3125 goto invalid; 3126 } 3127 3128 hw->mac.autotry_restart = TRUE; 3129 hw->mac.ops.setup_link(hw, speed, TRUE); 3130 sc->advertise = 0; 3131 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3132 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3133 sc->advertise |= 1 << 2; 3134 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3135 sc->advertise |= 1 << 1; 3136 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3137 sc->advertise |= 1 << 0; 3138 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3139 sc->advertise |= 1 << 3; 3140 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3141 sc->advertise |= 1 << 4; 3142 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3143 sc->advertise |= 1 << 5; 3144 } 3145 3146 return (0); 3147 3148 invalid: 3149 device_printf(sc->dev, "Invalid media type!\n"); 3150 3151 return (EINVAL); 3152 } /* ixgbe_media_change */ 3153 3154 /************************************************************************ 3155 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3156 ************************************************************************/ 3157 static int 3158 ixgbe_msix_admin(void *arg) 3159 { 3160 struct ixgbe_softc *sc = arg; 3161 struct ixgbe_hw *hw = &sc->hw; 3162 u32 eicr; 3163 u32 eims_orig; 3164 u32 eims_disable = 0; 3165 3166 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3167 3168 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3169 /* Pause other interrupts */ 3170 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3171 3172 /* 3173 * First get the cause. 3174 * 3175 * The specifications of 82598, 82599, X540 and X550 say EICS register 3176 * is write only. However, Linux says it is a workaround for silicon 3177 * errata to read EICS instead of EICR to get interrupt cause. 3178 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3179 */ 3180 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3181 /* Be sure the queue bits are not cleared */ 3182 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3183 /* Clear all OTHER interrupts with write */ 3184 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3185 3186 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3187 3188 /* Re-enable some OTHER interrupts */ 3189 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3190 3191 return 1; 3192 } /* ixgbe_msix_admin */ 3193 3194 static void 3195 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3196 { 3197 struct ixgbe_hw *hw = &sc->hw; 3198 u32 task_requests = 0; 3199 s32 retval; 3200 3201 /* Link status change */ 3202 if (eicr & IXGBE_EICR_LSC) { 3203 task_requests |= IXGBE_REQUEST_TASK_LSC; 3204 *eims_disable |= IXGBE_EIMS_LSC; 3205 } 3206 3207 if (ixgbe_is_sfp(hw)) { 3208 u32 eicr_mask; 3209 3210 /* Pluggable optics-related interrupt */ 3211 if (hw->mac.type >= ixgbe_mac_X540) 3212 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3213 else 3214 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3215 3216 /* 3217 * An interrupt might not arrive when a module is inserted. 3218 * When an link status change interrupt occurred and the driver 3219 * still regard SFP as unplugged, issue the module softint 3220 * and then issue LSC interrupt. 3221 */ 3222 if ((eicr & eicr_mask) 3223 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3224 && (eicr & IXGBE_EICR_LSC))) { 3225 task_requests |= IXGBE_REQUEST_TASK_MOD; 3226 *eims_disable |= IXGBE_EIMS_LSC; 3227 } 3228 3229 if ((hw->mac.type == ixgbe_mac_82599EB) && 3230 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3231 task_requests |= IXGBE_REQUEST_TASK_MSF; 3232 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3233 } 3234 } 3235 3236 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3237 #ifdef IXGBE_FDIR 3238 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3239 (eicr & IXGBE_EICR_FLOW_DIR)) { 3240 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3241 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3242 /* Disable the interrupt */ 3243 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3244 } 3245 } 3246 #endif 3247 3248 if (eicr & IXGBE_EICR_ECC) { 3249 if (ratecheck(&sc->lasterr_time, 3250 &ixgbe_errlog_intrvl)) 3251 device_printf(sc->dev, 3252 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3253 } 3254 3255 /* Check for over temp condition */ 3256 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3257 switch (sc->hw.mac.type) { 3258 case ixgbe_mac_X550EM_a: 3259 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3260 break; 3261 retval = hw->phy.ops.check_overtemp(hw); 3262 if (retval != IXGBE_ERR_OVERTEMP) 3263 break; 3264 if (ratecheck(&sc->lasterr_time, 3265 &ixgbe_errlog_intrvl)) { 3266 device_printf(sc->dev, 3267 "CRITICAL: OVER TEMP!! " 3268 "PHY IS SHUT DOWN!!\n"); 3269 device_printf(sc->dev, 3270 "System shutdown required!\n"); 3271 } 3272 break; 3273 default: 3274 if (!(eicr & IXGBE_EICR_TS)) 3275 break; 3276 retval = hw->phy.ops.check_overtemp(hw); 3277 if (retval != IXGBE_ERR_OVERTEMP) 3278 break; 3279 if (ratecheck(&sc->lasterr_time, 3280 &ixgbe_errlog_intrvl)) { 3281 device_printf(sc->dev, 3282 "CRITICAL: OVER TEMP!! " 3283 "PHY IS SHUT DOWN!!\n"); 3284 device_printf(sc->dev, 3285 "System shutdown required!\n"); 3286 } 3287 break; 3288 } 3289 } 3290 3291 /* Check for VF message */ 3292 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3293 (eicr & IXGBE_EICR_MAILBOX)) { 3294 task_requests |= IXGBE_REQUEST_TASK_MBX; 3295 *eims_disable |= IXGBE_EIMS_MAILBOX; 3296 } 3297 } 3298 3299 /* Check for fan failure */ 3300 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3301 ixgbe_check_fan_failure(sc, eicr, true); 3302 3303 /* External PHY interrupt */ 3304 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3305 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3306 task_requests |= IXGBE_REQUEST_TASK_PHY; 3307 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3308 } 3309 3310 if (task_requests != 0) { 3311 mutex_enter(&sc->admin_mtx); 3312 sc->task_requests |= task_requests; 3313 ixgbe_schedule_admin_tasklet(sc); 3314 mutex_exit(&sc->admin_mtx); 3315 } 3316 } 3317 3318 static void 3319 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3320 { 3321 3322 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3323 itr |= itr << 16; 3324 else 3325 itr |= IXGBE_EITR_CNT_WDIS; 3326 3327 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3328 } 3329 3330 3331 /************************************************************************ 3332 * ixgbe_sysctl_interrupt_rate_handler 3333 ************************************************************************/ 3334 static int 3335 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3336 { 3337 struct sysctlnode node = *rnode; 3338 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3339 struct ixgbe_softc *sc; 3340 uint32_t reg, usec, rate; 3341 int error; 3342 3343 if (que == NULL) 3344 return 0; 3345 3346 sc = que->sc; 3347 if (ixgbe_fw_recovery_mode_swflag(sc)) 3348 return (EPERM); 3349 3350 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3351 usec = ((reg & 0x0FF8) >> 3); 3352 if (usec > 0) 3353 rate = 500000 / usec; 3354 else 3355 rate = 0; 3356 node.sysctl_data = &rate; 3357 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3358 if (error || newp == NULL) 3359 return error; 3360 reg &= ~0xfff; /* default, no limitation */ 3361 if (rate > 0 && rate < 500000) { 3362 if (rate < 1000) 3363 rate = 1000; 3364 reg |= ((4000000 / rate) & 0xff8); 3365 /* 3366 * When RSC is used, ITR interval must be larger than 3367 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3368 * The minimum value is always greater than 2us on 100M 3369 * (and 10M?(not documented)), but it's not on 1G and higher. 3370 */ 3371 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3372 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3373 if ((sc->num_queues > 1) 3374 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3375 return EINVAL; 3376 } 3377 ixgbe_max_interrupt_rate = rate; 3378 } else 3379 ixgbe_max_interrupt_rate = 0; 3380 ixgbe_eitr_write(sc, que->msix, reg); 3381 3382 return (0); 3383 } /* ixgbe_sysctl_interrupt_rate_handler */ 3384 3385 const struct sysctlnode * 3386 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3387 { 3388 const char *dvname; 3389 struct sysctllog **log; 3390 int rc; 3391 const struct sysctlnode *rnode; 3392 3393 if (sc->sysctltop != NULL) 3394 return sc->sysctltop; 3395 3396 log = &sc->sysctllog; 3397 dvname = device_xname(sc->dev); 3398 3399 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3400 0, CTLTYPE_NODE, dvname, 3401 SYSCTL_DESCR("ixgbe information and settings"), 3402 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3403 goto err; 3404 3405 return rnode; 3406 err: 3407 device_printf(sc->dev, 3408 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3409 return NULL; 3410 } 3411 3412 /************************************************************************ 3413 * ixgbe_add_device_sysctls 3414 ************************************************************************/ 3415 static void 3416 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3417 { 3418 device_t dev = sc->dev; 3419 struct ixgbe_hw *hw = &sc->hw; 3420 struct sysctllog **log; 3421 const struct sysctlnode *rnode, *cnode; 3422 3423 log = &sc->sysctllog; 3424 3425 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3426 aprint_error_dev(dev, "could not create sysctl root\n"); 3427 return; 3428 } 3429 3430 if (sysctl_createv(log, 0, &rnode, &cnode, 3431 CTLFLAG_READWRITE, CTLTYPE_INT, 3432 "debug", SYSCTL_DESCR("Debug Info"), 3433 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3434 != 0) 3435 aprint_error_dev(dev, "could not create sysctl\n"); 3436 3437 if (sysctl_createv(log, 0, &rnode, &cnode, 3438 CTLFLAG_READWRITE, CTLTYPE_INT, 3439 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3440 ixgbe_sysctl_rx_copy_len, 0, 3441 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3442 aprint_error_dev(dev, "could not create sysctl\n"); 3443 3444 if (sysctl_createv(log, 0, &rnode, &cnode, 3445 CTLFLAG_READONLY, CTLTYPE_INT, 3446 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3447 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3448 aprint_error_dev(dev, "could not create sysctl\n"); 3449 3450 if (sysctl_createv(log, 0, &rnode, &cnode, 3451 CTLFLAG_READONLY, CTLTYPE_INT, 3452 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3453 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3454 aprint_error_dev(dev, "could not create sysctl\n"); 3455 3456 if (sysctl_createv(log, 0, &rnode, &cnode, 3457 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3458 SYSCTL_DESCR("max number of RX packets to process"), 3459 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3460 CTL_EOL) != 0) 3461 aprint_error_dev(dev, "could not create sysctl\n"); 3462 3463 if (sysctl_createv(log, 0, &rnode, &cnode, 3464 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3465 SYSCTL_DESCR("max number of TX packets to process"), 3466 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3467 CTL_EOL) != 0) 3468 aprint_error_dev(dev, "could not create sysctl\n"); 3469 3470 if (sysctl_createv(log, 0, &rnode, &cnode, 3471 CTLFLAG_READONLY, CTLTYPE_INT, 3472 "num_queues", SYSCTL_DESCR("Number of queues"), 3473 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3474 aprint_error_dev(dev, "could not create sysctl\n"); 3475 3476 /* Sysctls for all devices */ 3477 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3478 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3479 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3480 CTL_EOL) != 0) 3481 aprint_error_dev(dev, "could not create sysctl\n"); 3482 3483 sc->enable_aim = ixgbe_enable_aim; 3484 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3485 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3486 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3487 aprint_error_dev(dev, "could not create sysctl\n"); 3488 3489 if (sysctl_createv(log, 0, &rnode, &cnode, 3490 CTLFLAG_READWRITE, CTLTYPE_INT, 3491 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3492 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3493 CTL_EOL) != 0) 3494 aprint_error_dev(dev, "could not create sysctl\n"); 3495 3496 /* 3497 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3498 * it causesflip-flopping softint/workqueue mode in one deferred 3499 * processing. Therefore, preempt_disable()/preempt_enable() are 3500 * required in ixgbe_sched_handle_que() to avoid 3501 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3502 * I think changing "que->txrx_use_workqueue" in interrupt handler 3503 * is lighter than doing preempt_disable()/preempt_enable() in every 3504 * ixgbe_sched_handle_que(). 3505 */ 3506 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3507 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3508 CTLTYPE_BOOL, "txrx_workqueue", 3509 SYSCTL_DESCR("Use workqueue for packet processing"), 3510 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3511 CTL_EOL) != 0) 3512 aprint_error_dev(dev, "could not create sysctl\n"); 3513 3514 #ifdef IXGBE_DEBUG 3515 /* testing sysctls (for all devices) */ 3516 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3517 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3518 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3519 CTL_EOL) != 0) 3520 aprint_error_dev(dev, "could not create sysctl\n"); 3521 3522 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3523 CTLTYPE_STRING, "print_rss_config", 3524 SYSCTL_DESCR("Prints RSS Configuration"), 3525 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3526 CTL_EOL) != 0) 3527 aprint_error_dev(dev, "could not create sysctl\n"); 3528 #endif 3529 /* for X550 series devices */ 3530 if (hw->mac.type >= ixgbe_mac_X550) 3531 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3532 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3533 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3534 CTL_EOL) != 0) 3535 aprint_error_dev(dev, "could not create sysctl\n"); 3536 3537 /* for WoL-capable devices */ 3538 if (sc->wol_support) { 3539 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3540 CTLTYPE_BOOL, "wol_enable", 3541 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3542 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3543 CTL_EOL) != 0) 3544 aprint_error_dev(dev, "could not create sysctl\n"); 3545 3546 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3547 CTLTYPE_INT, "wufc", 3548 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3549 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3550 CTL_EOL) != 0) 3551 aprint_error_dev(dev, "could not create sysctl\n"); 3552 } 3553 3554 /* for X552/X557-AT devices */ 3555 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3556 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3557 const struct sysctlnode *phy_node; 3558 3559 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3560 "phy", SYSCTL_DESCR("External PHY sysctls"), 3561 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3562 aprint_error_dev(dev, "could not create sysctl\n"); 3563 return; 3564 } 3565 3566 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3567 CTLTYPE_INT, "temp", 3568 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3569 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3570 CTL_EOL) != 0) 3571 aprint_error_dev(dev, "could not create sysctl\n"); 3572 3573 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3574 CTLTYPE_INT, "overtemp_occurred", 3575 SYSCTL_DESCR( 3576 "External PHY High Temperature Event Occurred"), 3577 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3578 CTL_CREATE, CTL_EOL) != 0) 3579 aprint_error_dev(dev, "could not create sysctl\n"); 3580 } 3581 3582 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3583 && (hw->phy.type == ixgbe_phy_fw)) 3584 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3585 CTLTYPE_BOOL, "force_10_100_autonego", 3586 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3587 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3588 CTL_CREATE, CTL_EOL) != 0) 3589 aprint_error_dev(dev, "could not create sysctl\n"); 3590 3591 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3592 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3593 CTLTYPE_INT, "eee_state", 3594 SYSCTL_DESCR("EEE Power Save State"), 3595 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3596 CTL_EOL) != 0) 3597 aprint_error_dev(dev, "could not create sysctl\n"); 3598 } 3599 } /* ixgbe_add_device_sysctls */ 3600 3601 /************************************************************************ 3602 * ixgbe_allocate_pci_resources 3603 ************************************************************************/ 3604 static int 3605 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3606 const struct pci_attach_args *pa) 3607 { 3608 pcireg_t memtype, csr; 3609 device_t dev = sc->dev; 3610 bus_addr_t addr; 3611 int flags; 3612 3613 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3614 switch (memtype) { 3615 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3616 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3617 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3618 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3619 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3620 goto map_err; 3621 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3622 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3623 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3624 } 3625 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3626 sc->osdep.mem_size, flags, 3627 &sc->osdep.mem_bus_space_handle) != 0) { 3628 map_err: 3629 sc->osdep.mem_size = 0; 3630 aprint_error_dev(dev, "unable to map BAR0\n"); 3631 return ENXIO; 3632 } 3633 /* 3634 * Enable address decoding for memory range in case BIOS or 3635 * UEFI don't set it. 3636 */ 3637 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3638 PCI_COMMAND_STATUS_REG); 3639 csr |= PCI_COMMAND_MEM_ENABLE; 3640 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3641 csr); 3642 break; 3643 default: 3644 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3645 return ENXIO; 3646 } 3647 3648 return (0); 3649 } /* ixgbe_allocate_pci_resources */ 3650 3651 static void 3652 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3653 { 3654 struct ix_queue *que = sc->queues; 3655 struct tx_ring *txr = sc->tx_rings; 3656 int i; 3657 3658 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3659 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3660 if (txr->txr_si != NULL) 3661 softint_disestablish(txr->txr_si); 3662 } 3663 if (que->que_si != NULL) 3664 softint_disestablish(que->que_si); 3665 } 3666 if (sc->txr_wq != NULL) 3667 workqueue_destroy(sc->txr_wq); 3668 if (sc->txr_wq_enqueued != NULL) 3669 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3670 if (sc->que_wq != NULL) 3671 workqueue_destroy(sc->que_wq); 3672 3673 if (sc->admin_wq != NULL) { 3674 workqueue_destroy(sc->admin_wq); 3675 sc->admin_wq = NULL; 3676 } 3677 if (sc->timer_wq != NULL) { 3678 workqueue_destroy(sc->timer_wq); 3679 sc->timer_wq = NULL; 3680 } 3681 if (sc->recovery_mode_timer_wq != NULL) { 3682 /* 3683 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3684 * the recovery_mode_timer workqueue, so call it here. 3685 */ 3686 workqueue_wait(sc->recovery_mode_timer_wq, 3687 &sc->recovery_mode_timer_wc); 3688 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3689 workqueue_destroy(sc->recovery_mode_timer_wq); 3690 sc->recovery_mode_timer_wq = NULL; 3691 } 3692 } /* ixgbe_free_deferred_handlers */ 3693 3694 /************************************************************************ 3695 * ixgbe_detach - Device removal routine 3696 * 3697 * Called when the driver is being removed. 3698 * Stops the adapter and deallocates all the resources 3699 * that were allocated for driver operation. 3700 * 3701 * return 0 on success, positive on failure 3702 ************************************************************************/ 3703 static int 3704 ixgbe_detach(device_t dev, int flags) 3705 { 3706 struct ixgbe_softc *sc = device_private(dev); 3707 struct rx_ring *rxr = sc->rx_rings; 3708 struct tx_ring *txr = sc->tx_rings; 3709 struct ixgbe_hw *hw = &sc->hw; 3710 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3711 u32 ctrl_ext; 3712 int i; 3713 3714 INIT_DEBUGOUT("ixgbe_detach: begin"); 3715 if (sc->osdep.attached == false) 3716 return 0; 3717 3718 if (ixgbe_pci_iov_detach(dev) != 0) { 3719 device_printf(dev, "SR-IOV in use; detach first.\n"); 3720 return (EBUSY); 3721 } 3722 3723 if (VLAN_ATTACHED(&sc->osdep.ec) && 3724 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3725 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3726 return (EBUSY); 3727 } 3728 3729 ether_ifdetach(sc->ifp); 3730 3731 sc->osdep.detaching = true; 3732 /* 3733 * Stop the interface. ixgbe_setup_low_power_mode() calls 3734 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3735 * directly. 3736 */ 3737 ixgbe_setup_low_power_mode(sc); 3738 3739 callout_halt(&sc->timer, NULL); 3740 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3741 callout_halt(&sc->recovery_mode_timer, NULL); 3742 3743 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3744 atomic_store_relaxed(&sc->admin_pending, 0); 3745 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3746 atomic_store_relaxed(&sc->timer_pending, 0); 3747 3748 pmf_device_deregister(dev); 3749 3750 ixgbe_free_deferred_handlers(sc); 3751 3752 /* let hardware know driver is unloading */ 3753 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3754 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3755 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3756 3757 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3758 netmap_detach(sc->ifp); 3759 3760 ixgbe_free_pci_resources(sc); 3761 #if 0 /* XXX the NetBSD port is probably missing something here */ 3762 bus_generic_detach(dev); 3763 #endif 3764 if_detach(sc->ifp); 3765 ifmedia_fini(&sc->media); 3766 if_percpuq_destroy(sc->ipq); 3767 3768 sysctl_teardown(&sc->sysctllog); 3769 evcnt_detach(&sc->efbig_tx_dma_setup); 3770 evcnt_detach(&sc->mbuf_defrag_failed); 3771 evcnt_detach(&sc->efbig2_tx_dma_setup); 3772 evcnt_detach(&sc->einval_tx_dma_setup); 3773 evcnt_detach(&sc->other_tx_dma_setup); 3774 evcnt_detach(&sc->eagain_tx_dma_setup); 3775 evcnt_detach(&sc->enomem_tx_dma_setup); 3776 evcnt_detach(&sc->watchdog_events); 3777 evcnt_detach(&sc->tso_err); 3778 evcnt_detach(&sc->admin_irqev); 3779 evcnt_detach(&sc->link_workev); 3780 evcnt_detach(&sc->mod_workev); 3781 evcnt_detach(&sc->msf_workev); 3782 evcnt_detach(&sc->phy_workev); 3783 3784 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3785 if (i < __arraycount(stats->mpc)) { 3786 evcnt_detach(&stats->mpc[i]); 3787 if (hw->mac.type == ixgbe_mac_82598EB) 3788 evcnt_detach(&stats->rnbc[i]); 3789 } 3790 if (i < __arraycount(stats->pxontxc)) { 3791 evcnt_detach(&stats->pxontxc[i]); 3792 evcnt_detach(&stats->pxonrxc[i]); 3793 evcnt_detach(&stats->pxofftxc[i]); 3794 evcnt_detach(&stats->pxoffrxc[i]); 3795 if (hw->mac.type >= ixgbe_mac_82599EB) 3796 evcnt_detach(&stats->pxon2offc[i]); 3797 } 3798 } 3799 3800 txr = sc->tx_rings; 3801 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3802 evcnt_detach(&sc->queues[i].irqs); 3803 evcnt_detach(&sc->queues[i].handleq); 3804 evcnt_detach(&sc->queues[i].req); 3805 evcnt_detach(&txr->total_packets); 3806 #ifndef IXGBE_LEGACY_TX 3807 evcnt_detach(&txr->pcq_drops); 3808 #endif 3809 evcnt_detach(&txr->no_desc_avail); 3810 evcnt_detach(&txr->tso_tx); 3811 3812 if (i < __arraycount(stats->qprc)) { 3813 evcnt_detach(&stats->qprc[i]); 3814 evcnt_detach(&stats->qptc[i]); 3815 evcnt_detach(&stats->qbrc[i]); 3816 evcnt_detach(&stats->qbtc[i]); 3817 if (hw->mac.type >= ixgbe_mac_82599EB) 3818 evcnt_detach(&stats->qprdc[i]); 3819 } 3820 3821 evcnt_detach(&rxr->rx_packets); 3822 evcnt_detach(&rxr->rx_bytes); 3823 evcnt_detach(&rxr->rx_copies); 3824 evcnt_detach(&rxr->no_mbuf); 3825 evcnt_detach(&rxr->rx_discarded); 3826 } 3827 evcnt_detach(&stats->ipcs); 3828 evcnt_detach(&stats->l4cs); 3829 evcnt_detach(&stats->ipcs_bad); 3830 evcnt_detach(&stats->l4cs_bad); 3831 evcnt_detach(&stats->intzero); 3832 evcnt_detach(&stats->legint); 3833 evcnt_detach(&stats->crcerrs); 3834 evcnt_detach(&stats->illerrc); 3835 evcnt_detach(&stats->errbc); 3836 evcnt_detach(&stats->mspdc); 3837 if (hw->mac.type >= ixgbe_mac_X550) 3838 evcnt_detach(&stats->mbsdc); 3839 evcnt_detach(&stats->mpctotal); 3840 evcnt_detach(&stats->mlfc); 3841 evcnt_detach(&stats->mrfc); 3842 if (hw->mac.type == ixgbe_mac_X550EM_a) 3843 evcnt_detach(&stats->link_dn_cnt); 3844 evcnt_detach(&stats->rlec); 3845 evcnt_detach(&stats->lxontxc); 3846 evcnt_detach(&stats->lxonrxc); 3847 evcnt_detach(&stats->lxofftxc); 3848 evcnt_detach(&stats->lxoffrxc); 3849 3850 /* Packet Reception Stats */ 3851 evcnt_detach(&stats->tor); 3852 evcnt_detach(&stats->gorc); 3853 evcnt_detach(&stats->tpr); 3854 evcnt_detach(&stats->gprc); 3855 evcnt_detach(&stats->mprc); 3856 evcnt_detach(&stats->bprc); 3857 evcnt_detach(&stats->prc64); 3858 evcnt_detach(&stats->prc127); 3859 evcnt_detach(&stats->prc255); 3860 evcnt_detach(&stats->prc511); 3861 evcnt_detach(&stats->prc1023); 3862 evcnt_detach(&stats->prc1522); 3863 evcnt_detach(&stats->ruc); 3864 evcnt_detach(&stats->rfc); 3865 evcnt_detach(&stats->roc); 3866 evcnt_detach(&stats->rjc); 3867 evcnt_detach(&stats->mngprc); 3868 evcnt_detach(&stats->mngpdc); 3869 evcnt_detach(&stats->xec); 3870 3871 /* Packet Transmission Stats */ 3872 evcnt_detach(&stats->gotc); 3873 evcnt_detach(&stats->tpt); 3874 evcnt_detach(&stats->gptc); 3875 evcnt_detach(&stats->bptc); 3876 evcnt_detach(&stats->mptc); 3877 evcnt_detach(&stats->mngptc); 3878 evcnt_detach(&stats->ptc64); 3879 evcnt_detach(&stats->ptc127); 3880 evcnt_detach(&stats->ptc255); 3881 evcnt_detach(&stats->ptc511); 3882 evcnt_detach(&stats->ptc1023); 3883 evcnt_detach(&stats->ptc1522); 3884 3885 ixgbe_free_queues(sc); 3886 free(sc->mta, M_DEVBUF); 3887 3888 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3889 IXGBE_CORE_LOCK_DESTROY(sc); 3890 3891 return (0); 3892 } /* ixgbe_detach */ 3893 3894 /************************************************************************ 3895 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3896 * 3897 * Prepare the adapter/port for LPLU and/or WoL 3898 ************************************************************************/ 3899 static int 3900 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3901 { 3902 struct ixgbe_hw *hw = &sc->hw; 3903 device_t dev = sc->dev; 3904 struct ifnet *ifp = sc->ifp; 3905 s32 error = 0; 3906 3907 /* Limit power management flow to X550EM baseT */ 3908 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3909 hw->phy.ops.enter_lplu) { 3910 /* X550EM baseT adapters need a special LPLU flow */ 3911 hw->phy.reset_disable = true; 3912 ixgbe_ifstop(ifp, 1); 3913 error = hw->phy.ops.enter_lplu(hw); 3914 if (error) 3915 device_printf(dev, 3916 "Error entering LPLU: %d\n", error); 3917 hw->phy.reset_disable = false; 3918 } else { 3919 /* Just stop for other adapters */ 3920 ixgbe_ifstop(ifp, 1); 3921 } 3922 3923 IXGBE_CORE_LOCK(sc); 3924 3925 if (!hw->wol_enabled) { 3926 ixgbe_set_phy_power(hw, FALSE); 3927 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3928 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3929 } else { 3930 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3931 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3932 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3933 3934 /* 3935 * Clear Wake Up Status register to prevent any previous wakeup 3936 * events from waking us up immediately after we suspend. 3937 */ 3938 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3939 3940 /* 3941 * Program the Wakeup Filter Control register with user filter 3942 * settings 3943 */ 3944 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3945 3946 /* Enable wakeups and power management in Wakeup Control */ 3947 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3948 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3949 } 3950 3951 IXGBE_CORE_UNLOCK(sc); 3952 3953 return error; 3954 } /* ixgbe_setup_low_power_mode */ 3955 3956 /************************************************************************ 3957 * ixgbe_shutdown - Shutdown entry point 3958 ************************************************************************/ 3959 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3960 static int 3961 ixgbe_shutdown(device_t dev) 3962 { 3963 struct ixgbe_softc *sc = device_private(dev); 3964 int error = 0; 3965 3966 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3967 3968 error = ixgbe_setup_low_power_mode(sc); 3969 3970 return (error); 3971 } /* ixgbe_shutdown */ 3972 #endif 3973 3974 /************************************************************************ 3975 * ixgbe_suspend 3976 * 3977 * From D0 to D3 3978 ************************************************************************/ 3979 static bool 3980 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3981 { 3982 struct ixgbe_softc *sc = device_private(dev); 3983 int error = 0; 3984 3985 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3986 3987 error = ixgbe_setup_low_power_mode(sc); 3988 3989 return (error); 3990 } /* ixgbe_suspend */ 3991 3992 /************************************************************************ 3993 * ixgbe_resume 3994 * 3995 * From D3 to D0 3996 ************************************************************************/ 3997 static bool 3998 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 3999 { 4000 struct ixgbe_softc *sc = device_private(dev); 4001 struct ifnet *ifp = sc->ifp; 4002 struct ixgbe_hw *hw = &sc->hw; 4003 u32 wus; 4004 4005 INIT_DEBUGOUT("ixgbe_resume: begin"); 4006 4007 IXGBE_CORE_LOCK(sc); 4008 4009 /* Read & clear WUS register */ 4010 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4011 if (wus) 4012 device_printf(dev, "Woken up by (WUS): %#010x\n", 4013 IXGBE_READ_REG(hw, IXGBE_WUS)); 4014 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4015 /* And clear WUFC until next low-power transition */ 4016 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4017 4018 /* 4019 * Required after D3->D0 transition; 4020 * will re-advertise all previous advertised speeds 4021 */ 4022 if (ifp->if_flags & IFF_UP) 4023 ixgbe_init_locked(sc); 4024 4025 IXGBE_CORE_UNLOCK(sc); 4026 4027 return true; 4028 } /* ixgbe_resume */ 4029 4030 /* 4031 * Set the various hardware offload abilities. 4032 * 4033 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4034 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4035 * mbuf offload flags the driver will understand. 4036 */ 4037 static void 4038 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4039 { 4040 /* XXX */ 4041 } 4042 4043 /************************************************************************ 4044 * ixgbe_init_locked - Init entry point 4045 * 4046 * Used in two ways: It is used by the stack as an init 4047 * entry point in network interface structure. It is also 4048 * used by the driver as a hw/sw initialization routine to 4049 * get to a consistent state. 4050 * 4051 * return 0 on success, positive on failure 4052 ************************************************************************/ 4053 static void 4054 ixgbe_init_locked(struct ixgbe_softc *sc) 4055 { 4056 struct ifnet *ifp = sc->ifp; 4057 device_t dev = sc->dev; 4058 struct ixgbe_hw *hw = &sc->hw; 4059 struct ix_queue *que; 4060 struct tx_ring *txr; 4061 struct rx_ring *rxr; 4062 u32 txdctl, mhadd; 4063 u32 rxdctl, rxctrl; 4064 u32 ctrl_ext; 4065 bool unsupported_sfp = false; 4066 int i, j, error; 4067 4068 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4069 4070 KASSERT(mutex_owned(&sc->core_mtx)); 4071 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4072 4073 hw->need_unsupported_sfp_recovery = false; 4074 hw->adapter_stopped = FALSE; 4075 ixgbe_stop_adapter(hw); 4076 callout_stop(&sc->timer); 4077 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4078 callout_stop(&sc->recovery_mode_timer); 4079 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4080 que->disabled_count = 0; 4081 4082 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4083 sc->max_frame_size = 4084 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4085 4086 /* Queue indices may change with IOV mode */ 4087 ixgbe_align_all_queue_indices(sc); 4088 4089 /* reprogram the RAR[0] in case user changed it. */ 4090 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4091 4092 /* Get the latest mac address, User can use a LAA */ 4093 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4094 IXGBE_ETH_LENGTH_OF_ADDRESS); 4095 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4096 hw->addr_ctrl.rar_used_count = 1; 4097 4098 /* Set hardware offload abilities from ifnet flags */ 4099 ixgbe_set_if_hwassist(sc); 4100 4101 /* Prepare transmit descriptors and buffers */ 4102 if (ixgbe_setup_transmit_structures(sc)) { 4103 device_printf(dev, "Could not setup transmit structures\n"); 4104 ixgbe_stop_locked(sc); 4105 return; 4106 } 4107 4108 ixgbe_init_hw(hw); 4109 4110 ixgbe_initialize_iov(sc); 4111 4112 ixgbe_initialize_transmit_units(sc); 4113 4114 /* Setup Multicast table */ 4115 ixgbe_set_rxfilter(sc); 4116 4117 /* Use fixed buffer size, even for jumbo frames */ 4118 sc->rx_mbuf_sz = MCLBYTES; 4119 4120 /* Prepare receive descriptors and buffers */ 4121 error = ixgbe_setup_receive_structures(sc); 4122 if (error) { 4123 device_printf(dev, 4124 "Could not setup receive structures (err = %d)\n", error); 4125 ixgbe_stop_locked(sc); 4126 return; 4127 } 4128 4129 /* Configure RX settings */ 4130 ixgbe_initialize_receive_units(sc); 4131 4132 /* Initialize variable holding task enqueue requests interrupts */ 4133 sc->task_requests = 0; 4134 4135 /* Enable SDP & MSI-X interrupts based on adapter */ 4136 ixgbe_config_gpie(sc); 4137 4138 /* Set MTU size */ 4139 if (ifp->if_mtu > ETHERMTU) { 4140 /* aka IXGBE_MAXFRS on 82599 and newer */ 4141 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4142 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4143 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4144 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4145 } 4146 4147 /* Now enable all the queues */ 4148 for (i = 0; i < sc->num_queues; i++) { 4149 txr = &sc->tx_rings[i]; 4150 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4151 txdctl |= IXGBE_TXDCTL_ENABLE; 4152 /* Set WTHRESH to 8, burst writeback */ 4153 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4154 /* 4155 * When the internal queue falls below PTHRESH (32), 4156 * start prefetching as long as there are at least 4157 * HTHRESH (1) buffers ready. The values are taken 4158 * from the Intel linux driver 3.8.21. 4159 * Prefetching enables tx line rate even with 1 queue. 4160 */ 4161 txdctl |= (32 << 0) | (1 << 8); 4162 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4163 } 4164 4165 for (i = 0; i < sc->num_queues; i++) { 4166 rxr = &sc->rx_rings[i]; 4167 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4168 if (hw->mac.type == ixgbe_mac_82598EB) { 4169 /* 4170 * PTHRESH = 21 4171 * HTHRESH = 4 4172 * WTHRESH = 8 4173 */ 4174 rxdctl &= ~0x3FFFFF; 4175 rxdctl |= 0x080420; 4176 } 4177 rxdctl |= IXGBE_RXDCTL_ENABLE; 4178 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4179 for (j = 0; j < 10; j++) { 4180 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4181 IXGBE_RXDCTL_ENABLE) 4182 break; 4183 else 4184 msec_delay(1); 4185 } 4186 IXGBE_WRITE_BARRIER(hw); 4187 4188 /* 4189 * In netmap mode, we must preserve the buffers made 4190 * available to userspace before the if_init() 4191 * (this is true by default on the TX side, because 4192 * init makes all buffers available to userspace). 4193 * 4194 * netmap_reset() and the device specific routines 4195 * (e.g. ixgbe_setup_receive_rings()) map these 4196 * buffers at the end of the NIC ring, so here we 4197 * must set the RDT (tail) register to make sure 4198 * they are not overwritten. 4199 * 4200 * In this driver the NIC ring starts at RDH = 0, 4201 * RDT points to the last slot available for reception (?), 4202 * so RDT = num_rx_desc - 1 means the whole ring is available. 4203 */ 4204 #ifdef DEV_NETMAP 4205 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4206 (ifp->if_capenable & IFCAP_NETMAP)) { 4207 struct netmap_adapter *na = NA(sc->ifp); 4208 struct netmap_kring *kring = na->rx_rings[i]; 4209 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4210 4211 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4212 } else 4213 #endif /* DEV_NETMAP */ 4214 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4215 sc->num_rx_desc - 1); 4216 } 4217 4218 /* Enable Receive engine */ 4219 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4220 if (hw->mac.type == ixgbe_mac_82598EB) 4221 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4222 rxctrl |= IXGBE_RXCTRL_RXEN; 4223 ixgbe_enable_rx_dma(hw, rxctrl); 4224 4225 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4226 atomic_store_relaxed(&sc->timer_pending, 0); 4227 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4228 callout_reset(&sc->recovery_mode_timer, hz, 4229 ixgbe_recovery_mode_timer, sc); 4230 4231 /* Set up MSI/MSI-X routing */ 4232 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4233 ixgbe_configure_ivars(sc); 4234 /* Set up auto-mask */ 4235 if (hw->mac.type == ixgbe_mac_82598EB) 4236 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4237 else { 4238 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4239 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4240 } 4241 } else { /* Simple settings for Legacy/MSI */ 4242 ixgbe_set_ivar(sc, 0, 0, 0); 4243 ixgbe_set_ivar(sc, 0, 0, 1); 4244 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4245 } 4246 4247 ixgbe_init_fdir(sc); 4248 4249 /* 4250 * Check on any SFP devices that 4251 * need to be kick-started 4252 */ 4253 if (hw->phy.type == ixgbe_phy_none) { 4254 error = hw->phy.ops.identify(hw); 4255 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4256 unsupported_sfp = true; 4257 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4258 unsupported_sfp = true; 4259 4260 if (unsupported_sfp) 4261 device_printf(dev, 4262 "Unsupported SFP+ module type was detected.\n"); 4263 4264 /* Set moderation on the Link interrupt */ 4265 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4266 4267 /* Enable EEE power saving */ 4268 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4269 hw->mac.ops.setup_eee(hw, 4270 sc->feat_en & IXGBE_FEATURE_EEE); 4271 4272 /* Enable power to the phy. */ 4273 if (!unsupported_sfp) { 4274 ixgbe_set_phy_power(hw, TRUE); 4275 4276 /* Config/Enable Link */ 4277 ixgbe_config_link(sc); 4278 } 4279 4280 /* Hardware Packet Buffer & Flow Control setup */ 4281 ixgbe_config_delay_values(sc); 4282 4283 /* Initialize the FC settings */ 4284 ixgbe_start_hw(hw); 4285 4286 /* Set up VLAN support and filter */ 4287 ixgbe_setup_vlan_hw_support(sc); 4288 4289 /* Setup DMA Coalescing */ 4290 ixgbe_config_dmac(sc); 4291 4292 /* OK to schedule workqueues. */ 4293 sc->schedule_wqs_ok = true; 4294 4295 /* Enable the use of the MBX by the VF's */ 4296 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4297 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4298 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4299 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4300 } 4301 4302 /* Update saved flags. See ixgbe_ifflags_cb() */ 4303 sc->if_flags = ifp->if_flags; 4304 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4305 4306 /* Inform the stack we're ready */ 4307 ifp->if_flags |= IFF_RUNNING; 4308 4309 /* And now turn on interrupts */ 4310 ixgbe_enable_intr(sc); 4311 4312 return; 4313 } /* ixgbe_init_locked */ 4314 4315 /************************************************************************ 4316 * ixgbe_init 4317 ************************************************************************/ 4318 static int 4319 ixgbe_init(struct ifnet *ifp) 4320 { 4321 struct ixgbe_softc *sc = ifp->if_softc; 4322 4323 IXGBE_CORE_LOCK(sc); 4324 ixgbe_init_locked(sc); 4325 IXGBE_CORE_UNLOCK(sc); 4326 4327 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4328 } /* ixgbe_init */ 4329 4330 /************************************************************************ 4331 * ixgbe_set_ivar 4332 * 4333 * Setup the correct IVAR register for a particular MSI-X interrupt 4334 * (yes this is all very magic and confusing :) 4335 * - entry is the register array entry 4336 * - vector is the MSI-X vector for this queue 4337 * - type is RX/TX/MISC 4338 ************************************************************************/ 4339 static void 4340 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4341 { 4342 struct ixgbe_hw *hw = &sc->hw; 4343 u32 ivar, index; 4344 4345 vector |= IXGBE_IVAR_ALLOC_VAL; 4346 4347 switch (hw->mac.type) { 4348 case ixgbe_mac_82598EB: 4349 if (type == -1) 4350 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4351 else 4352 entry += (type * 64); 4353 index = (entry >> 2) & 0x1F; 4354 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4355 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4356 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4357 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4358 break; 4359 case ixgbe_mac_82599EB: 4360 case ixgbe_mac_X540: 4361 case ixgbe_mac_X550: 4362 case ixgbe_mac_X550EM_x: 4363 case ixgbe_mac_X550EM_a: 4364 if (type == -1) { /* MISC IVAR */ 4365 index = (entry & 1) * 8; 4366 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4367 ivar &= ~(0xffUL << index); 4368 ivar |= ((u32)vector << index); 4369 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4370 } else { /* RX/TX IVARS */ 4371 index = (16 * (entry & 1)) + (8 * type); 4372 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4373 ivar &= ~(0xffUL << index); 4374 ivar |= ((u32)vector << index); 4375 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4376 } 4377 break; 4378 default: 4379 break; 4380 } 4381 } /* ixgbe_set_ivar */ 4382 4383 /************************************************************************ 4384 * ixgbe_configure_ivars 4385 ************************************************************************/ 4386 static void 4387 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4388 { 4389 struct ix_queue *que = sc->queues; 4390 u32 newitr; 4391 4392 if (ixgbe_max_interrupt_rate > 0) 4393 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 4394 else { 4395 /* 4396 * Disable DMA coalescing if interrupt moderation is 4397 * disabled. 4398 */ 4399 sc->dmac = 0; 4400 newitr = 0; 4401 } 4402 4403 for (int i = 0; i < sc->num_queues; i++, que++) { 4404 struct rx_ring *rxr = &sc->rx_rings[i]; 4405 struct tx_ring *txr = &sc->tx_rings[i]; 4406 /* First the RX queue entry */ 4407 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4408 /* ... and the TX */ 4409 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4410 /* Set an Initial EITR value */ 4411 ixgbe_eitr_write(sc, que->msix, newitr); 4412 /* 4413 * To eliminate influence of the previous state. 4414 * At this point, Tx/Rx interrupt handler 4415 * (ixgbe_msix_que()) cannot be called, so both 4416 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4417 */ 4418 que->eitr_setting = 0; 4419 } 4420 4421 /* For the Link interrupt */ 4422 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4423 } /* ixgbe_configure_ivars */ 4424 4425 /************************************************************************ 4426 * ixgbe_config_gpie 4427 ************************************************************************/ 4428 static void 4429 ixgbe_config_gpie(struct ixgbe_softc *sc) 4430 { 4431 struct ixgbe_hw *hw = &sc->hw; 4432 u32 gpie; 4433 4434 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4435 4436 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4437 /* Enable Enhanced MSI-X mode */ 4438 gpie |= IXGBE_GPIE_MSIX_MODE 4439 | IXGBE_GPIE_EIAME 4440 | IXGBE_GPIE_PBA_SUPPORT 4441 | IXGBE_GPIE_OCD; 4442 } 4443 4444 /* Fan Failure Interrupt */ 4445 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4446 gpie |= IXGBE_SDP1_GPIEN; 4447 4448 /* Thermal Sensor Interrupt */ 4449 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4450 gpie |= IXGBE_SDP0_GPIEN_X540; 4451 4452 /* Link detection */ 4453 switch (hw->mac.type) { 4454 case ixgbe_mac_82599EB: 4455 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4456 break; 4457 case ixgbe_mac_X550EM_x: 4458 case ixgbe_mac_X550EM_a: 4459 gpie |= IXGBE_SDP0_GPIEN_X540; 4460 break; 4461 default: 4462 break; 4463 } 4464 4465 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4466 4467 } /* ixgbe_config_gpie */ 4468 4469 /************************************************************************ 4470 * ixgbe_config_delay_values 4471 * 4472 * Requires sc->max_frame_size to be set. 4473 ************************************************************************/ 4474 static void 4475 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4476 { 4477 struct ixgbe_hw *hw = &sc->hw; 4478 u32 rxpb, frame, size, tmp; 4479 4480 frame = sc->max_frame_size; 4481 4482 /* Calculate High Water */ 4483 switch (hw->mac.type) { 4484 case ixgbe_mac_X540: 4485 case ixgbe_mac_X550: 4486 case ixgbe_mac_X550EM_x: 4487 case ixgbe_mac_X550EM_a: 4488 tmp = IXGBE_DV_X540(frame, frame); 4489 break; 4490 default: 4491 tmp = IXGBE_DV(frame, frame); 4492 break; 4493 } 4494 size = IXGBE_BT2KB(tmp); 4495 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4496 hw->fc.high_water[0] = rxpb - size; 4497 4498 /* Now calculate Low Water */ 4499 switch (hw->mac.type) { 4500 case ixgbe_mac_X540: 4501 case ixgbe_mac_X550: 4502 case ixgbe_mac_X550EM_x: 4503 case ixgbe_mac_X550EM_a: 4504 tmp = IXGBE_LOW_DV_X540(frame); 4505 break; 4506 default: 4507 tmp = IXGBE_LOW_DV(frame); 4508 break; 4509 } 4510 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4511 4512 hw->fc.pause_time = IXGBE_FC_PAUSE; 4513 hw->fc.send_xon = TRUE; 4514 } /* ixgbe_config_delay_values */ 4515 4516 /************************************************************************ 4517 * ixgbe_set_rxfilter - Multicast Update 4518 * 4519 * Called whenever multicast address list is updated. 4520 ************************************************************************/ 4521 static void 4522 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4523 { 4524 struct ixgbe_mc_addr *mta; 4525 struct ifnet *ifp = sc->ifp; 4526 u8 *update_ptr; 4527 int mcnt = 0; 4528 u32 fctrl; 4529 struct ethercom *ec = &sc->osdep.ec; 4530 struct ether_multi *enm; 4531 struct ether_multistep step; 4532 4533 KASSERT(mutex_owned(&sc->core_mtx)); 4534 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4535 4536 mta = sc->mta; 4537 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4538 4539 ETHER_LOCK(ec); 4540 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4541 ETHER_FIRST_MULTI(step, ec, enm); 4542 while (enm != NULL) { 4543 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4544 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4545 ETHER_ADDR_LEN) != 0)) { 4546 ec->ec_flags |= ETHER_F_ALLMULTI; 4547 break; 4548 } 4549 bcopy(enm->enm_addrlo, 4550 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4551 mta[mcnt].vmdq = sc->pool; 4552 mcnt++; 4553 ETHER_NEXT_MULTI(step, enm); 4554 } 4555 4556 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4557 if (ifp->if_flags & IFF_PROMISC) 4558 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4559 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4560 fctrl |= IXGBE_FCTRL_MPE; 4561 fctrl &= ~IXGBE_FCTRL_UPE; 4562 } else 4563 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4564 4565 /* Update multicast filter entries only when it's not ALLMULTI */ 4566 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4567 ETHER_UNLOCK(ec); 4568 update_ptr = (u8 *)mta; 4569 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4570 ixgbe_mc_array_itr, TRUE); 4571 } else 4572 ETHER_UNLOCK(ec); 4573 4574 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4575 } /* ixgbe_set_rxfilter */ 4576 4577 /************************************************************************ 4578 * ixgbe_mc_array_itr 4579 * 4580 * An iterator function needed by the multicast shared code. 4581 * It feeds the shared code routine the addresses in the 4582 * array of ixgbe_set_rxfilter() one by one. 4583 ************************************************************************/ 4584 static u8 * 4585 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4586 { 4587 struct ixgbe_mc_addr *mta; 4588 4589 mta = (struct ixgbe_mc_addr *)*update_ptr; 4590 *vmdq = mta->vmdq; 4591 4592 *update_ptr = (u8*)(mta + 1); 4593 4594 return (mta->addr); 4595 } /* ixgbe_mc_array_itr */ 4596 4597 /************************************************************************ 4598 * ixgbe_local_timer - Timer routine 4599 * 4600 * Checks for link status, updates statistics, 4601 * and runs the watchdog check. 4602 ************************************************************************/ 4603 static void 4604 ixgbe_local_timer(void *arg) 4605 { 4606 struct ixgbe_softc *sc = arg; 4607 4608 if (sc->schedule_wqs_ok) { 4609 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4610 workqueue_enqueue(sc->timer_wq, 4611 &sc->timer_wc, NULL); 4612 } 4613 } 4614 4615 static void 4616 ixgbe_handle_timer(struct work *wk, void *context) 4617 { 4618 struct ixgbe_softc *sc = context; 4619 struct ixgbe_hw *hw = &sc->hw; 4620 device_t dev = sc->dev; 4621 struct ix_queue *que = sc->queues; 4622 u64 queues = 0; 4623 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4624 int hung = 0; 4625 int i; 4626 4627 IXGBE_CORE_LOCK(sc); 4628 4629 /* Check for pluggable optics */ 4630 if (ixgbe_is_sfp(hw)) { 4631 bool sched_mod_task = false; 4632 4633 if (hw->mac.type == ixgbe_mac_82598EB) { 4634 /* 4635 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4636 * any GPIO(SDP). So just schedule TASK_MOD. 4637 */ 4638 sched_mod_task = true; 4639 } else { 4640 bool was_full, is_full; 4641 4642 was_full = 4643 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4644 is_full = ixgbe_sfp_cage_full(hw); 4645 4646 /* Do probe if cage state changed */ 4647 if (was_full ^ is_full) 4648 sched_mod_task = true; 4649 } 4650 if (sched_mod_task) { 4651 mutex_enter(&sc->admin_mtx); 4652 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4653 ixgbe_schedule_admin_tasklet(sc); 4654 mutex_exit(&sc->admin_mtx); 4655 } 4656 } 4657 4658 ixgbe_update_link_status(sc); 4659 ixgbe_update_stats_counters(sc); 4660 4661 /* Update some event counters */ 4662 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4663 que = sc->queues; 4664 for (i = 0; i < sc->num_queues; i++, que++) { 4665 struct tx_ring *txr = que->txr; 4666 4667 v0 += txr->q_efbig_tx_dma_setup; 4668 v1 += txr->q_mbuf_defrag_failed; 4669 v2 += txr->q_efbig2_tx_dma_setup; 4670 v3 += txr->q_einval_tx_dma_setup; 4671 v4 += txr->q_other_tx_dma_setup; 4672 v5 += txr->q_eagain_tx_dma_setup; 4673 v6 += txr->q_enomem_tx_dma_setup; 4674 v7 += txr->q_tso_err; 4675 } 4676 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4677 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4678 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4679 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4680 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4681 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4682 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4683 IXGBE_EVC_STORE(&sc->tso_err, v7); 4684 4685 /* 4686 * Check the TX queues status 4687 * - mark hung queues so we don't schedule on them 4688 * - watchdog only if all queues show hung 4689 */ 4690 que = sc->queues; 4691 for (i = 0; i < sc->num_queues; i++, que++) { 4692 /* Keep track of queues with work for soft irq */ 4693 if (que->txr->busy) 4694 queues |= 1ULL << que->me; 4695 /* 4696 * Each time txeof runs without cleaning, but there 4697 * are uncleaned descriptors it increments busy. If 4698 * we get to the MAX we declare it hung. 4699 */ 4700 if (que->busy == IXGBE_QUEUE_HUNG) { 4701 ++hung; 4702 /* Mark the queue as inactive */ 4703 sc->active_queues &= ~(1ULL << que->me); 4704 continue; 4705 } else { 4706 /* Check if we've come back from hung */ 4707 if ((sc->active_queues & (1ULL << que->me)) == 0) 4708 sc->active_queues |= 1ULL << que->me; 4709 } 4710 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4711 device_printf(dev, 4712 "Warning queue %d appears to be hung!\n", i); 4713 que->txr->busy = IXGBE_QUEUE_HUNG; 4714 ++hung; 4715 } 4716 } 4717 4718 /* Only truly watchdog if all queues show hung */ 4719 if (hung == sc->num_queues) 4720 goto watchdog; 4721 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4722 else if (queues != 0) { /* Force an IRQ on queues with work */ 4723 que = sc->queues; 4724 for (i = 0; i < sc->num_queues; i++, que++) { 4725 mutex_enter(&que->dc_mtx); 4726 if (que->disabled_count == 0) 4727 ixgbe_rearm_queues(sc, 4728 queues & ((u64)1 << i)); 4729 mutex_exit(&que->dc_mtx); 4730 } 4731 } 4732 #endif 4733 4734 atomic_store_relaxed(&sc->timer_pending, 0); 4735 IXGBE_CORE_UNLOCK(sc); 4736 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4737 return; 4738 4739 watchdog: 4740 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4741 sc->ifp->if_flags &= ~IFF_RUNNING; 4742 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4743 ixgbe_init_locked(sc); 4744 IXGBE_CORE_UNLOCK(sc); 4745 } /* ixgbe_handle_timer */ 4746 4747 /************************************************************************ 4748 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4749 ************************************************************************/ 4750 static void 4751 ixgbe_recovery_mode_timer(void *arg) 4752 { 4753 struct ixgbe_softc *sc = arg; 4754 4755 if (__predict_true(sc->osdep.detaching == false)) { 4756 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4757 0, 1) == 0) { 4758 workqueue_enqueue(sc->recovery_mode_timer_wq, 4759 &sc->recovery_mode_timer_wc, NULL); 4760 } 4761 } 4762 } 4763 4764 static void 4765 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4766 { 4767 struct ixgbe_softc *sc = context; 4768 struct ixgbe_hw *hw = &sc->hw; 4769 4770 IXGBE_CORE_LOCK(sc); 4771 if (ixgbe_fw_recovery_mode(hw)) { 4772 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4773 /* Firmware error detected, entering recovery mode */ 4774 device_printf(sc->dev, 4775 "Firmware recovery mode detected. Limiting " 4776 "functionality. Refer to the Intel(R) Ethernet " 4777 "Adapters and Devices User Guide for details on " 4778 "firmware recovery mode.\n"); 4779 4780 if (hw->adapter_stopped == FALSE) 4781 ixgbe_stop_locked(sc); 4782 } 4783 } else 4784 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4785 4786 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4787 callout_reset(&sc->recovery_mode_timer, hz, 4788 ixgbe_recovery_mode_timer, sc); 4789 IXGBE_CORE_UNLOCK(sc); 4790 } /* ixgbe_handle_recovery_mode_timer */ 4791 4792 /************************************************************************ 4793 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4794 * bool int_en: true if it's called when the interrupt is enabled. 4795 ************************************************************************/ 4796 static void 4797 ixgbe_handle_mod(void *context, bool int_en) 4798 { 4799 struct ixgbe_softc *sc = context; 4800 struct ixgbe_hw *hw = &sc->hw; 4801 device_t dev = sc->dev; 4802 enum ixgbe_sfp_type last_sfp_type; 4803 u32 err; 4804 bool last_unsupported_sfp_recovery; 4805 4806 KASSERT(mutex_owned(&sc->core_mtx)); 4807 4808 last_sfp_type = hw->phy.sfp_type; 4809 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4810 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4811 if (sc->hw.need_crosstalk_fix) { 4812 if ((hw->mac.type != ixgbe_mac_82598EB) && 4813 !ixgbe_sfp_cage_full(hw)) 4814 goto out; 4815 } 4816 4817 err = hw->phy.ops.identify_sfp(hw); 4818 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4819 if (last_unsupported_sfp_recovery == false) 4820 device_printf(dev, 4821 "Unsupported SFP+ module type was detected.\n"); 4822 goto out; 4823 } 4824 4825 if (hw->need_unsupported_sfp_recovery) { 4826 device_printf(dev, "Recovering from unsupported SFP\n"); 4827 /* 4828 * We could recover the status by calling setup_sfp(), 4829 * setup_link() and some others. It's complex and might not 4830 * work correctly on some unknown cases. To avoid such type of 4831 * problem, call ixgbe_init_locked(). It's simple and safe 4832 * approach. 4833 */ 4834 ixgbe_init_locked(sc); 4835 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4836 (hw->phy.sfp_type != last_sfp_type)) { 4837 /* A module is inserted and changed. */ 4838 4839 if (hw->mac.type == ixgbe_mac_82598EB) 4840 err = hw->phy.ops.reset(hw); 4841 else { 4842 err = hw->mac.ops.setup_sfp(hw); 4843 hw->phy.sfp_setup_needed = FALSE; 4844 } 4845 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4846 device_printf(dev, 4847 "Setup failure - unsupported SFP+ module type.\n"); 4848 goto out; 4849 } 4850 } 4851 4852 out: 4853 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4854 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4855 4856 /* Adjust media types shown in ifconfig */ 4857 IXGBE_CORE_UNLOCK(sc); 4858 ifmedia_removeall(&sc->media); 4859 ixgbe_add_media_types(sc); 4860 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4861 IXGBE_CORE_LOCK(sc); 4862 4863 /* 4864 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4865 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4866 * flap because the function calls setup_link(). 4867 */ 4868 if (hw->mac.type != ixgbe_mac_82598EB) { 4869 mutex_enter(&sc->admin_mtx); 4870 if (int_en) 4871 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4872 else 4873 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4874 mutex_exit(&sc->admin_mtx); 4875 } 4876 4877 /* 4878 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4879 * the workqueue now. 4880 */ 4881 } /* ixgbe_handle_mod */ 4882 4883 4884 /************************************************************************ 4885 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4886 ************************************************************************/ 4887 static void 4888 ixgbe_handle_msf(void *context) 4889 { 4890 struct ixgbe_softc *sc = context; 4891 struct ixgbe_hw *hw = &sc->hw; 4892 u32 autoneg; 4893 bool negotiate; 4894 4895 KASSERT(mutex_owned(&sc->core_mtx)); 4896 4897 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4898 4899 autoneg = hw->phy.autoneg_advertised; 4900 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4901 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4902 if (hw->mac.ops.setup_link) 4903 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4904 } /* ixgbe_handle_msf */ 4905 4906 /************************************************************************ 4907 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4908 ************************************************************************/ 4909 static void 4910 ixgbe_handle_phy(void *context) 4911 { 4912 struct ixgbe_softc *sc = context; 4913 struct ixgbe_hw *hw = &sc->hw; 4914 int error; 4915 4916 KASSERT(mutex_owned(&sc->core_mtx)); 4917 4918 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4919 error = hw->phy.ops.handle_lasi(hw); 4920 if (error == IXGBE_ERR_OVERTEMP) 4921 device_printf(sc->dev, 4922 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4923 " PHY will downshift to lower power state!\n"); 4924 else if (error) 4925 device_printf(sc->dev, 4926 "Error handling LASI interrupt: %d\n", error); 4927 } /* ixgbe_handle_phy */ 4928 4929 static void 4930 ixgbe_handle_admin(struct work *wk, void *context) 4931 { 4932 struct ixgbe_softc *sc = context; 4933 struct ifnet *ifp = sc->ifp; 4934 struct ixgbe_hw *hw = &sc->hw; 4935 u32 task_requests; 4936 u32 eims_enable = 0; 4937 4938 mutex_enter(&sc->admin_mtx); 4939 sc->admin_pending = 0; 4940 task_requests = sc->task_requests; 4941 sc->task_requests = 0; 4942 mutex_exit(&sc->admin_mtx); 4943 4944 /* 4945 * Hold the IFNET_LOCK across this entire call. This will 4946 * prevent additional changes to sc->phy_layer 4947 * and serialize calls to this tasklet. We cannot hold the 4948 * CORE_LOCK while calling into the ifmedia functions as 4949 * they call ifmedia_lock() and the lock is CORE_LOCK. 4950 */ 4951 IFNET_LOCK(ifp); 4952 IXGBE_CORE_LOCK(sc); 4953 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4954 ixgbe_handle_link(sc); 4955 eims_enable |= IXGBE_EIMS_LSC; 4956 } 4957 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4958 ixgbe_handle_mod(sc, false); 4959 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4960 ixgbe_handle_mod(sc, true); 4961 if (hw->mac.type >= ixgbe_mac_X540) 4962 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4963 else 4964 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4965 } 4966 if ((task_requests 4967 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4968 ixgbe_handle_msf(sc); 4969 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4970 (hw->mac.type == ixgbe_mac_82599EB)) 4971 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4972 } 4973 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4974 ixgbe_handle_phy(sc); 4975 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4976 } 4977 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4978 ixgbe_reinit_fdir(sc); 4979 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4980 } 4981 #if 0 /* notyet */ 4982 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4983 ixgbe_handle_mbx(sc); 4984 eims_enable |= IXGBE_EIMS_MAILBOX; 4985 } 4986 #endif 4987 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 4988 4989 IXGBE_CORE_UNLOCK(sc); 4990 IFNET_UNLOCK(ifp); 4991 } /* ixgbe_handle_admin */ 4992 4993 static void 4994 ixgbe_ifstop(struct ifnet *ifp, int disable) 4995 { 4996 struct ixgbe_softc *sc = ifp->if_softc; 4997 4998 IXGBE_CORE_LOCK(sc); 4999 ixgbe_stop_locked(sc); 5000 IXGBE_CORE_UNLOCK(sc); 5001 5002 workqueue_wait(sc->timer_wq, &sc->timer_wc); 5003 atomic_store_relaxed(&sc->timer_pending, 0); 5004 } 5005 5006 /************************************************************************ 5007 * ixgbe_stop_locked - Stop the hardware 5008 * 5009 * Disables all traffic on the adapter by issuing a 5010 * global reset on the MAC and deallocates TX/RX buffers. 5011 ************************************************************************/ 5012 static void 5013 ixgbe_stop_locked(void *arg) 5014 { 5015 struct ifnet *ifp; 5016 struct ixgbe_softc *sc = arg; 5017 struct ixgbe_hw *hw = &sc->hw; 5018 5019 ifp = sc->ifp; 5020 5021 KASSERT(mutex_owned(&sc->core_mtx)); 5022 5023 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5024 ixgbe_disable_intr(sc); 5025 callout_stop(&sc->timer); 5026 5027 /* Don't schedule workqueues. */ 5028 sc->schedule_wqs_ok = false; 5029 5030 /* Let the stack know...*/ 5031 ifp->if_flags &= ~IFF_RUNNING; 5032 5033 ixgbe_reset_hw(hw); 5034 hw->adapter_stopped = FALSE; 5035 ixgbe_stop_adapter(hw); 5036 if (hw->mac.type == ixgbe_mac_82599EB) 5037 ixgbe_stop_mac_link_on_d3_82599(hw); 5038 /* Turn off the laser - noop with no optics */ 5039 ixgbe_disable_tx_laser(hw); 5040 5041 /* Update the stack */ 5042 sc->link_up = FALSE; 5043 ixgbe_update_link_status(sc); 5044 5045 /* reprogram the RAR[0] in case user changed it. */ 5046 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5047 5048 return; 5049 } /* ixgbe_stop_locked */ 5050 5051 /************************************************************************ 5052 * ixgbe_update_link_status - Update OS on link state 5053 * 5054 * Note: Only updates the OS on the cached link state. 5055 * The real check of the hardware only happens with 5056 * a link interrupt. 5057 ************************************************************************/ 5058 static void 5059 ixgbe_update_link_status(struct ixgbe_softc *sc) 5060 { 5061 struct ifnet *ifp = sc->ifp; 5062 device_t dev = sc->dev; 5063 struct ixgbe_hw *hw = &sc->hw; 5064 5065 KASSERT(mutex_owned(&sc->core_mtx)); 5066 5067 if (sc->link_up) { 5068 if (sc->link_active != LINK_STATE_UP) { 5069 /* 5070 * To eliminate influence of the previous state 5071 * in the same way as ixgbe_init_locked(). 5072 */ 5073 struct ix_queue *que = sc->queues; 5074 for (int i = 0; i < sc->num_queues; i++, que++) 5075 que->eitr_setting = 0; 5076 5077 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL){ 5078 /* 5079 * Discard count for both MAC Local Fault and 5080 * Remote Fault because those registers are 5081 * valid only when the link speed is up and 5082 * 10Gbps. 5083 */ 5084 IXGBE_READ_REG(hw, IXGBE_MLFC); 5085 IXGBE_READ_REG(hw, IXGBE_MRFC); 5086 } 5087 5088 if (bootverbose) { 5089 const char *bpsmsg; 5090 5091 switch (sc->link_speed) { 5092 case IXGBE_LINK_SPEED_10GB_FULL: 5093 bpsmsg = "10 Gbps"; 5094 break; 5095 case IXGBE_LINK_SPEED_5GB_FULL: 5096 bpsmsg = "5 Gbps"; 5097 break; 5098 case IXGBE_LINK_SPEED_2_5GB_FULL: 5099 bpsmsg = "2.5 Gbps"; 5100 break; 5101 case IXGBE_LINK_SPEED_1GB_FULL: 5102 bpsmsg = "1 Gbps"; 5103 break; 5104 case IXGBE_LINK_SPEED_100_FULL: 5105 bpsmsg = "100 Mbps"; 5106 break; 5107 case IXGBE_LINK_SPEED_10_FULL: 5108 bpsmsg = "10 Mbps"; 5109 break; 5110 default: 5111 bpsmsg = "unknown speed"; 5112 break; 5113 } 5114 device_printf(dev, "Link is up %s %s \n", 5115 bpsmsg, "Full Duplex"); 5116 } 5117 sc->link_active = LINK_STATE_UP; 5118 /* Update any Flow Control changes */ 5119 ixgbe_fc_enable(&sc->hw); 5120 /* Update DMA coalescing config */ 5121 ixgbe_config_dmac(sc); 5122 if_link_state_change(ifp, LINK_STATE_UP); 5123 5124 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5125 ixgbe_ping_all_vfs(sc); 5126 } 5127 } else { 5128 /* 5129 * Do it when link active changes to DOWN. i.e. 5130 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5131 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5132 */ 5133 if (sc->link_active != LINK_STATE_DOWN) { 5134 if (bootverbose) 5135 device_printf(dev, "Link is Down\n"); 5136 if_link_state_change(ifp, LINK_STATE_DOWN); 5137 sc->link_active = LINK_STATE_DOWN; 5138 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5139 ixgbe_ping_all_vfs(sc); 5140 ixgbe_drain_all(sc); 5141 } 5142 } 5143 } /* ixgbe_update_link_status */ 5144 5145 /************************************************************************ 5146 * ixgbe_config_dmac - Configure DMA Coalescing 5147 ************************************************************************/ 5148 static void 5149 ixgbe_config_dmac(struct ixgbe_softc *sc) 5150 { 5151 struct ixgbe_hw *hw = &sc->hw; 5152 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5153 5154 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5155 return; 5156 5157 if (dcfg->watchdog_timer ^ sc->dmac || 5158 dcfg->link_speed ^ sc->link_speed) { 5159 dcfg->watchdog_timer = sc->dmac; 5160 dcfg->fcoe_en = false; 5161 dcfg->link_speed = sc->link_speed; 5162 dcfg->num_tcs = 1; 5163 5164 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5165 dcfg->watchdog_timer, dcfg->link_speed); 5166 5167 hw->mac.ops.dmac_config(hw); 5168 } 5169 } /* ixgbe_config_dmac */ 5170 5171 /************************************************************************ 5172 * ixgbe_enable_intr 5173 ************************************************************************/ 5174 static void 5175 ixgbe_enable_intr(struct ixgbe_softc *sc) 5176 { 5177 struct ixgbe_hw *hw = &sc->hw; 5178 struct ix_queue *que = sc->queues; 5179 u32 mask, fwsm; 5180 5181 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5182 5183 switch (sc->hw.mac.type) { 5184 case ixgbe_mac_82599EB: 5185 mask |= IXGBE_EIMS_ECC; 5186 /* Temperature sensor on some adapters */ 5187 mask |= IXGBE_EIMS_GPI_SDP0; 5188 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5189 mask |= IXGBE_EIMS_GPI_SDP1; 5190 mask |= IXGBE_EIMS_GPI_SDP2; 5191 break; 5192 case ixgbe_mac_X540: 5193 /* Detect if Thermal Sensor is enabled */ 5194 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5195 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5196 mask |= IXGBE_EIMS_TS; 5197 mask |= IXGBE_EIMS_ECC; 5198 break; 5199 case ixgbe_mac_X550: 5200 /* MAC thermal sensor is automatically enabled */ 5201 mask |= IXGBE_EIMS_TS; 5202 mask |= IXGBE_EIMS_ECC; 5203 break; 5204 case ixgbe_mac_X550EM_x: 5205 case ixgbe_mac_X550EM_a: 5206 /* Some devices use SDP0 for important information */ 5207 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5208 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5209 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5210 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5211 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5212 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5213 mask |= IXGBE_EICR_GPI_SDP0_X540; 5214 mask |= IXGBE_EIMS_ECC; 5215 break; 5216 default: 5217 break; 5218 } 5219 5220 /* Enable Fan Failure detection */ 5221 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5222 mask |= IXGBE_EIMS_GPI_SDP1; 5223 /* Enable SR-IOV */ 5224 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5225 mask |= IXGBE_EIMS_MAILBOX; 5226 /* Enable Flow Director */ 5227 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5228 mask |= IXGBE_EIMS_FLOW_DIR; 5229 5230 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5231 5232 /* With MSI-X we use auto clear */ 5233 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5234 /* 5235 * We use auto clear for RTX_QUEUE only. Don't use other 5236 * interrupts (e.g. link interrupt). BTW, we don't use 5237 * TCP_TIMER interrupt itself. 5238 */ 5239 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5240 } 5241 5242 /* 5243 * Now enable all queues, this is done separately to 5244 * allow for handling the extended (beyond 32) MSI-X 5245 * vectors that can be used by 82599 5246 */ 5247 for (int i = 0; i < sc->num_queues; i++, que++) 5248 ixgbe_enable_queue(sc, que->msix); 5249 5250 IXGBE_WRITE_FLUSH(hw); 5251 5252 } /* ixgbe_enable_intr */ 5253 5254 /************************************************************************ 5255 * ixgbe_disable_intr_internal 5256 ************************************************************************/ 5257 static void 5258 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5259 { 5260 struct ix_queue *que = sc->queues; 5261 5262 /* disable interrupts other than queues */ 5263 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5264 5265 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5266 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5267 5268 for (int i = 0; i < sc->num_queues; i++, que++) 5269 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5270 5271 IXGBE_WRITE_FLUSH(&sc->hw); 5272 5273 } /* ixgbe_do_disable_intr_internal */ 5274 5275 /************************************************************************ 5276 * ixgbe_disable_intr 5277 ************************************************************************/ 5278 static void 5279 ixgbe_disable_intr(struct ixgbe_softc *sc) 5280 { 5281 5282 ixgbe_disable_intr_internal(sc, true); 5283 } /* ixgbe_disable_intr */ 5284 5285 /************************************************************************ 5286 * ixgbe_ensure_disabled_intr 5287 ************************************************************************/ 5288 void 5289 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5290 { 5291 5292 ixgbe_disable_intr_internal(sc, false); 5293 } /* ixgbe_ensure_disabled_intr */ 5294 5295 /************************************************************************ 5296 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5297 ************************************************************************/ 5298 static int 5299 ixgbe_legacy_irq(void *arg) 5300 { 5301 struct ix_queue *que = arg; 5302 struct ixgbe_softc *sc = que->sc; 5303 struct ixgbe_hw *hw = &sc->hw; 5304 struct ifnet *ifp = sc->ifp; 5305 struct tx_ring *txr = sc->tx_rings; 5306 u32 eicr; 5307 u32 eims_orig; 5308 u32 eims_enable = 0; 5309 u32 eims_disable = 0; 5310 5311 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5312 /* 5313 * Silicon errata #26 on 82598. Disable all interrupts before reading 5314 * EICR. 5315 */ 5316 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5317 5318 /* Read and clear EICR */ 5319 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5320 5321 if (eicr == 0) { 5322 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5323 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5324 return 0; 5325 } 5326 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5327 5328 /* Queue (0) intr */ 5329 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5330 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5331 IXGBE_EVC_ADD(&que->irqs, 1); 5332 5333 /* 5334 * The same as ixgbe_msix_que() about 5335 * "que->txrx_use_workqueue". 5336 */ 5337 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5338 5339 IXGBE_TX_LOCK(txr); 5340 ixgbe_txeof(txr); 5341 #ifdef notyet 5342 if (!ixgbe_ring_empty(ifp, txr->br)) 5343 ixgbe_start_locked(ifp, txr); 5344 #endif 5345 IXGBE_TX_UNLOCK(txr); 5346 5347 IXGBE_EVC_ADD(&que->req, 1); 5348 ixgbe_sched_handle_que(sc, que); 5349 /* Disable queue 0 interrupt */ 5350 eims_disable |= 1UL << 0; 5351 } else 5352 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5353 5354 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5355 5356 /* Re-enable some interrupts */ 5357 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5358 (eims_orig & ~eims_disable) | eims_enable); 5359 5360 return 1; 5361 } /* ixgbe_legacy_irq */ 5362 5363 /************************************************************************ 5364 * ixgbe_free_pciintr_resources 5365 ************************************************************************/ 5366 static void 5367 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5368 { 5369 struct ix_queue *que = sc->queues; 5370 int rid; 5371 5372 /* 5373 * Release all msix queue resources: 5374 */ 5375 for (int i = 0; i < sc->num_queues; i++, que++) { 5376 if (que->res != NULL) { 5377 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5378 sc->osdep.ihs[i] = NULL; 5379 } 5380 } 5381 5382 /* Clean the Legacy or Link interrupt last */ 5383 if (sc->vector) /* we are doing MSIX */ 5384 rid = sc->vector; 5385 else 5386 rid = 0; 5387 5388 if (sc->osdep.ihs[rid] != NULL) { 5389 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5390 sc->osdep.ihs[rid] = NULL; 5391 } 5392 5393 if (sc->osdep.intrs != NULL) { 5394 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5395 sc->osdep.nintrs); 5396 sc->osdep.intrs = NULL; 5397 } 5398 } /* ixgbe_free_pciintr_resources */ 5399 5400 /************************************************************************ 5401 * ixgbe_free_pci_resources 5402 ************************************************************************/ 5403 static void 5404 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5405 { 5406 5407 ixgbe_free_pciintr_resources(sc); 5408 5409 if (sc->osdep.mem_size != 0) { 5410 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5411 sc->osdep.mem_bus_space_handle, 5412 sc->osdep.mem_size); 5413 } 5414 } /* ixgbe_free_pci_resources */ 5415 5416 /************************************************************************ 5417 * ixgbe_sysctl_flowcntl 5418 * 5419 * SYSCTL wrapper around setting Flow Control 5420 ************************************************************************/ 5421 static int 5422 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5423 { 5424 struct sysctlnode node = *rnode; 5425 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5426 int error, fc; 5427 5428 if (ixgbe_fw_recovery_mode_swflag(sc)) 5429 return (EPERM); 5430 5431 fc = sc->hw.fc.current_mode; 5432 node.sysctl_data = &fc; 5433 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5434 if (error != 0 || newp == NULL) 5435 return error; 5436 5437 /* Don't bother if it's not changed */ 5438 if (fc == sc->hw.fc.current_mode) 5439 return (0); 5440 5441 return ixgbe_set_flowcntl(sc, fc); 5442 } /* ixgbe_sysctl_flowcntl */ 5443 5444 /************************************************************************ 5445 * ixgbe_set_flowcntl - Set flow control 5446 * 5447 * Flow control values: 5448 * 0 - off 5449 * 1 - rx pause 5450 * 2 - tx pause 5451 * 3 - full 5452 ************************************************************************/ 5453 static int 5454 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5455 { 5456 switch (fc) { 5457 case ixgbe_fc_rx_pause: 5458 case ixgbe_fc_tx_pause: 5459 case ixgbe_fc_full: 5460 sc->hw.fc.requested_mode = fc; 5461 if (sc->num_queues > 1) 5462 ixgbe_disable_rx_drop(sc); 5463 break; 5464 case ixgbe_fc_none: 5465 sc->hw.fc.requested_mode = ixgbe_fc_none; 5466 if (sc->num_queues > 1) 5467 ixgbe_enable_rx_drop(sc); 5468 break; 5469 default: 5470 return (EINVAL); 5471 } 5472 5473 #if 0 /* XXX NetBSD */ 5474 /* Don't autoneg if forcing a value */ 5475 sc->hw.fc.disable_fc_autoneg = TRUE; 5476 #endif 5477 ixgbe_fc_enable(&sc->hw); 5478 5479 return (0); 5480 } /* ixgbe_set_flowcntl */ 5481 5482 /************************************************************************ 5483 * ixgbe_enable_rx_drop 5484 * 5485 * Enable the hardware to drop packets when the buffer is 5486 * full. This is useful with multiqueue, so that no single 5487 * queue being full stalls the entire RX engine. We only 5488 * enable this when Multiqueue is enabled AND Flow Control 5489 * is disabled. 5490 ************************************************************************/ 5491 static void 5492 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5493 { 5494 struct ixgbe_hw *hw = &sc->hw; 5495 struct rx_ring *rxr; 5496 u32 srrctl; 5497 5498 for (int i = 0; i < sc->num_queues; i++) { 5499 rxr = &sc->rx_rings[i]; 5500 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5501 srrctl |= IXGBE_SRRCTL_DROP_EN; 5502 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5503 } 5504 5505 /* enable drop for each vf */ 5506 for (int i = 0; i < sc->num_vfs; i++) { 5507 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5508 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5509 IXGBE_QDE_ENABLE)); 5510 } 5511 } /* ixgbe_enable_rx_drop */ 5512 5513 /************************************************************************ 5514 * ixgbe_disable_rx_drop 5515 ************************************************************************/ 5516 static void 5517 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5518 { 5519 struct ixgbe_hw *hw = &sc->hw; 5520 struct rx_ring *rxr; 5521 u32 srrctl; 5522 5523 for (int i = 0; i < sc->num_queues; i++) { 5524 rxr = &sc->rx_rings[i]; 5525 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5526 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5527 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5528 } 5529 5530 /* disable drop for each vf */ 5531 for (int i = 0; i < sc->num_vfs; i++) { 5532 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5533 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5534 } 5535 } /* ixgbe_disable_rx_drop */ 5536 5537 /************************************************************************ 5538 * ixgbe_sysctl_advertise 5539 * 5540 * SYSCTL wrapper around setting advertised speed 5541 ************************************************************************/ 5542 static int 5543 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5544 { 5545 struct sysctlnode node = *rnode; 5546 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5547 int error = 0, advertise; 5548 5549 if (ixgbe_fw_recovery_mode_swflag(sc)) 5550 return (EPERM); 5551 5552 advertise = sc->advertise; 5553 node.sysctl_data = &advertise; 5554 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5555 if (error != 0 || newp == NULL) 5556 return error; 5557 5558 return ixgbe_set_advertise(sc, advertise); 5559 } /* ixgbe_sysctl_advertise */ 5560 5561 /************************************************************************ 5562 * ixgbe_set_advertise - Control advertised link speed 5563 * 5564 * Flags: 5565 * 0x00 - Default (all capable link speed) 5566 * 0x1 - advertise 100 Mb 5567 * 0x2 - advertise 1G 5568 * 0x4 - advertise 10G 5569 * 0x8 - advertise 10 Mb (yes, Mb) 5570 * 0x10 - advertise 2.5G 5571 * 0x20 - advertise 5G 5572 ************************************************************************/ 5573 static int 5574 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5575 { 5576 device_t dev; 5577 struct ixgbe_hw *hw; 5578 ixgbe_link_speed speed = 0; 5579 ixgbe_link_speed link_caps = 0; 5580 s32 err = IXGBE_NOT_IMPLEMENTED; 5581 bool negotiate = FALSE; 5582 5583 /* Checks to validate new value */ 5584 if (sc->advertise == advertise) /* no change */ 5585 return (0); 5586 5587 dev = sc->dev; 5588 hw = &sc->hw; 5589 5590 /* No speed changes for backplane media */ 5591 if (hw->phy.media_type == ixgbe_media_type_backplane) 5592 return (ENODEV); 5593 5594 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5595 (hw->phy.multispeed_fiber))) { 5596 device_printf(dev, 5597 "Advertised speed can only be set on copper or " 5598 "multispeed fiber media types.\n"); 5599 return (EINVAL); 5600 } 5601 5602 if (advertise < 0x0 || advertise > 0x3f) { 5603 device_printf(dev, "Invalid advertised speed; " 5604 "valid modes are 0x0 through 0x3f\n"); 5605 return (EINVAL); 5606 } 5607 5608 if (hw->mac.ops.get_link_capabilities) { 5609 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5610 &negotiate); 5611 if (err != IXGBE_SUCCESS) { 5612 device_printf(dev, "Unable to determine supported " 5613 "advertise speeds\n"); 5614 return (ENODEV); 5615 } 5616 } 5617 5618 /* Set new value and report new advertised mode */ 5619 if (advertise & 0x1) { 5620 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5621 device_printf(dev, "Interface does not support 100Mb " 5622 "advertised speed\n"); 5623 return (EINVAL); 5624 } 5625 speed |= IXGBE_LINK_SPEED_100_FULL; 5626 } 5627 if (advertise & 0x2) { 5628 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5629 device_printf(dev, "Interface does not support 1Gb " 5630 "advertised speed\n"); 5631 return (EINVAL); 5632 } 5633 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5634 } 5635 if (advertise & 0x4) { 5636 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5637 device_printf(dev, "Interface does not support 10Gb " 5638 "advertised speed\n"); 5639 return (EINVAL); 5640 } 5641 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5642 } 5643 if (advertise & 0x8) { 5644 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5645 device_printf(dev, "Interface does not support 10Mb " 5646 "advertised speed\n"); 5647 return (EINVAL); 5648 } 5649 speed |= IXGBE_LINK_SPEED_10_FULL; 5650 } 5651 if (advertise & 0x10) { 5652 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5653 device_printf(dev, "Interface does not support 2.5Gb " 5654 "advertised speed\n"); 5655 return (EINVAL); 5656 } 5657 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5658 } 5659 if (advertise & 0x20) { 5660 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5661 device_printf(dev, "Interface does not support 5Gb " 5662 "advertised speed\n"); 5663 return (EINVAL); 5664 } 5665 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5666 } 5667 if (advertise == 0) 5668 speed = link_caps; /* All capable link speed */ 5669 5670 hw->mac.autotry_restart = TRUE; 5671 hw->mac.ops.setup_link(hw, speed, TRUE); 5672 sc->advertise = advertise; 5673 5674 return (0); 5675 } /* ixgbe_set_advertise */ 5676 5677 /************************************************************************ 5678 * ixgbe_get_default_advertise - Get default advertised speed settings 5679 * 5680 * Formatted for sysctl usage. 5681 * Flags: 5682 * 0x1 - advertise 100 Mb 5683 * 0x2 - advertise 1G 5684 * 0x4 - advertise 10G 5685 * 0x8 - advertise 10 Mb (yes, Mb) 5686 * 0x10 - advertise 2.5G 5687 * 0x20 - advertise 5G 5688 ************************************************************************/ 5689 static int 5690 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5691 { 5692 struct ixgbe_hw *hw = &sc->hw; 5693 int speed; 5694 ixgbe_link_speed link_caps = 0; 5695 s32 err; 5696 bool negotiate = FALSE; 5697 5698 /* 5699 * Advertised speed means nothing unless it's copper or 5700 * multi-speed fiber 5701 */ 5702 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5703 !(hw->phy.multispeed_fiber)) 5704 return (0); 5705 5706 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5707 if (err != IXGBE_SUCCESS) 5708 return (0); 5709 5710 speed = 5711 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5712 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5713 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5714 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5715 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5716 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5717 5718 return speed; 5719 } /* ixgbe_get_default_advertise */ 5720 5721 /************************************************************************ 5722 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5723 * 5724 * Control values: 5725 * 0/1 - off / on (use default value of 1000) 5726 * 5727 * Legal timer values are: 5728 * 50,100,250,500,1000,2000,5000,10000 5729 * 5730 * Turning off interrupt moderation will also turn this off. 5731 ************************************************************************/ 5732 static int 5733 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5734 { 5735 struct sysctlnode node = *rnode; 5736 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5737 struct ifnet *ifp = sc->ifp; 5738 int error; 5739 int newval; 5740 5741 if (ixgbe_fw_recovery_mode_swflag(sc)) 5742 return (EPERM); 5743 5744 newval = sc->dmac; 5745 node.sysctl_data = &newval; 5746 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5747 if ((error) || (newp == NULL)) 5748 return (error); 5749 5750 switch (newval) { 5751 case 0: 5752 /* Disabled */ 5753 sc->dmac = 0; 5754 break; 5755 case 1: 5756 /* Enable and use default */ 5757 sc->dmac = 1000; 5758 break; 5759 case 50: 5760 case 100: 5761 case 250: 5762 case 500: 5763 case 1000: 5764 case 2000: 5765 case 5000: 5766 case 10000: 5767 /* Legal values - allow */ 5768 sc->dmac = newval; 5769 break; 5770 default: 5771 /* Do nothing, illegal value */ 5772 return (EINVAL); 5773 } 5774 5775 /* Re-initialize hardware if it's already running */ 5776 if (ifp->if_flags & IFF_RUNNING) 5777 if_init(ifp); 5778 5779 return (0); 5780 } 5781 5782 #ifdef IXGBE_DEBUG 5783 /************************************************************************ 5784 * ixgbe_sysctl_power_state 5785 * 5786 * Sysctl to test power states 5787 * Values: 5788 * 0 - set device to D0 5789 * 3 - set device to D3 5790 * (none) - get current device power state 5791 ************************************************************************/ 5792 static int 5793 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5794 { 5795 #ifdef notyet 5796 struct sysctlnode node = *rnode; 5797 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5798 device_t dev = sc->dev; 5799 int curr_ps, new_ps, error = 0; 5800 5801 if (ixgbe_fw_recovery_mode_swflag(sc)) 5802 return (EPERM); 5803 5804 curr_ps = new_ps = pci_get_powerstate(dev); 5805 5806 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5807 if ((error) || (req->newp == NULL)) 5808 return (error); 5809 5810 if (new_ps == curr_ps) 5811 return (0); 5812 5813 if (new_ps == 3 && curr_ps == 0) 5814 error = DEVICE_SUSPEND(dev); 5815 else if (new_ps == 0 && curr_ps == 3) 5816 error = DEVICE_RESUME(dev); 5817 else 5818 return (EINVAL); 5819 5820 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5821 5822 return (error); 5823 #else 5824 return 0; 5825 #endif 5826 } /* ixgbe_sysctl_power_state */ 5827 #endif 5828 5829 /************************************************************************ 5830 * ixgbe_sysctl_wol_enable 5831 * 5832 * Sysctl to enable/disable the WoL capability, 5833 * if supported by the adapter. 5834 * 5835 * Values: 5836 * 0 - disabled 5837 * 1 - enabled 5838 ************************************************************************/ 5839 static int 5840 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5841 { 5842 struct sysctlnode node = *rnode; 5843 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5844 struct ixgbe_hw *hw = &sc->hw; 5845 bool new_wol_enabled; 5846 int error = 0; 5847 5848 /* 5849 * It's not required to check recovery mode because this function never 5850 * touches hardware. 5851 */ 5852 new_wol_enabled = hw->wol_enabled; 5853 node.sysctl_data = &new_wol_enabled; 5854 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5855 if ((error) || (newp == NULL)) 5856 return (error); 5857 if (new_wol_enabled == hw->wol_enabled) 5858 return (0); 5859 5860 if (new_wol_enabled && !sc->wol_support) 5861 return (ENODEV); 5862 else 5863 hw->wol_enabled = new_wol_enabled; 5864 5865 return (0); 5866 } /* ixgbe_sysctl_wol_enable */ 5867 5868 /************************************************************************ 5869 * ixgbe_sysctl_wufc - Wake Up Filter Control 5870 * 5871 * Sysctl to enable/disable the types of packets that the 5872 * adapter will wake up on upon receipt. 5873 * Flags: 5874 * 0x1 - Link Status Change 5875 * 0x2 - Magic Packet 5876 * 0x4 - Direct Exact 5877 * 0x8 - Directed Multicast 5878 * 0x10 - Broadcast 5879 * 0x20 - ARP/IPv4 Request Packet 5880 * 0x40 - Direct IPv4 Packet 5881 * 0x80 - Direct IPv6 Packet 5882 * 5883 * Settings not listed above will cause the sysctl to return an error. 5884 ************************************************************************/ 5885 static int 5886 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5887 { 5888 struct sysctlnode node = *rnode; 5889 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5890 int error = 0; 5891 u32 new_wufc; 5892 5893 /* 5894 * It's not required to check recovery mode because this function never 5895 * touches hardware. 5896 */ 5897 new_wufc = sc->wufc; 5898 node.sysctl_data = &new_wufc; 5899 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5900 if ((error) || (newp == NULL)) 5901 return (error); 5902 if (new_wufc == sc->wufc) 5903 return (0); 5904 5905 if (new_wufc & 0xffffff00) 5906 return (EINVAL); 5907 5908 new_wufc &= 0xff; 5909 new_wufc |= (0xffffff & sc->wufc); 5910 sc->wufc = new_wufc; 5911 5912 return (0); 5913 } /* ixgbe_sysctl_wufc */ 5914 5915 #ifdef IXGBE_DEBUG 5916 /************************************************************************ 5917 * ixgbe_sysctl_print_rss_config 5918 ************************************************************************/ 5919 static int 5920 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5921 { 5922 #ifdef notyet 5923 struct sysctlnode node = *rnode; 5924 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5925 struct ixgbe_hw *hw = &sc->hw; 5926 device_t dev = sc->dev; 5927 struct sbuf *buf; 5928 int error = 0, reta_size; 5929 u32 reg; 5930 5931 if (ixgbe_fw_recovery_mode_swflag(sc)) 5932 return (EPERM); 5933 5934 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5935 if (!buf) { 5936 device_printf(dev, "Could not allocate sbuf for output.\n"); 5937 return (ENOMEM); 5938 } 5939 5940 // TODO: use sbufs to make a string to print out 5941 /* Set multiplier for RETA setup and table size based on MAC */ 5942 switch (sc->hw.mac.type) { 5943 case ixgbe_mac_X550: 5944 case ixgbe_mac_X550EM_x: 5945 case ixgbe_mac_X550EM_a: 5946 reta_size = 128; 5947 break; 5948 default: 5949 reta_size = 32; 5950 break; 5951 } 5952 5953 /* Print out the redirection table */ 5954 sbuf_cat(buf, "\n"); 5955 for (int i = 0; i < reta_size; i++) { 5956 if (i < 32) { 5957 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5958 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5959 } else { 5960 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5961 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5962 } 5963 } 5964 5965 // TODO: print more config 5966 5967 error = sbuf_finish(buf); 5968 if (error) 5969 device_printf(dev, "Error finishing sbuf: %d\n", error); 5970 5971 sbuf_delete(buf); 5972 #endif 5973 return (0); 5974 } /* ixgbe_sysctl_print_rss_config */ 5975 #endif /* IXGBE_DEBUG */ 5976 5977 /************************************************************************ 5978 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5979 * 5980 * For X552/X557-AT devices using an external PHY 5981 ************************************************************************/ 5982 static int 5983 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5984 { 5985 struct sysctlnode node = *rnode; 5986 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5987 struct ixgbe_hw *hw = &sc->hw; 5988 int val; 5989 u16 reg; 5990 int error; 5991 5992 if (ixgbe_fw_recovery_mode_swflag(sc)) 5993 return (EPERM); 5994 5995 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 5996 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 5997 device_printf(sc->dev, 5998 "Device has no supported external thermal sensor.\n"); 5999 return (ENODEV); 6000 } 6001 6002 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6003 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6004 device_printf(sc->dev, 6005 "Error reading from PHY's current temperature register\n"); 6006 return (EAGAIN); 6007 } 6008 6009 node.sysctl_data = &val; 6010 6011 /* Shift temp for output */ 6012 val = reg >> 8; 6013 6014 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6015 if ((error) || (newp == NULL)) 6016 return (error); 6017 6018 return (0); 6019 } /* ixgbe_sysctl_phy_temp */ 6020 6021 /************************************************************************ 6022 * ixgbe_sysctl_phy_overtemp_occurred 6023 * 6024 * Reports (directly from the PHY) whether the current PHY 6025 * temperature is over the overtemp threshold. 6026 ************************************************************************/ 6027 static int 6028 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6029 { 6030 struct sysctlnode node = *rnode; 6031 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6032 struct ixgbe_hw *hw = &sc->hw; 6033 int val, error; 6034 u16 reg; 6035 6036 if (ixgbe_fw_recovery_mode_swflag(sc)) 6037 return (EPERM); 6038 6039 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6040 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)){ 6041 device_printf(sc->dev, 6042 "Device has no supported external thermal sensor.\n"); 6043 return (ENODEV); 6044 } 6045 6046 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6047 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6048 device_printf(sc->dev, 6049 "Error reading from PHY's temperature status register\n"); 6050 return (EAGAIN); 6051 } 6052 6053 node.sysctl_data = &val; 6054 6055 /* Get occurrence bit */ 6056 val = !!(reg & 0x4000); 6057 6058 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6059 if ((error) || (newp == NULL)) 6060 return (error); 6061 6062 return (0); 6063 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6064 6065 /************************************************************************ 6066 * ixgbe_sysctl_eee_state 6067 * 6068 * Sysctl to set EEE power saving feature 6069 * Values: 6070 * 0 - disable EEE 6071 * 1 - enable EEE 6072 * (none) - get current device EEE state 6073 ************************************************************************/ 6074 static int 6075 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6076 { 6077 struct sysctlnode node = *rnode; 6078 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6079 struct ifnet *ifp = sc->ifp; 6080 device_t dev = sc->dev; 6081 int curr_eee, new_eee, error = 0; 6082 s32 retval; 6083 6084 if (ixgbe_fw_recovery_mode_swflag(sc)) 6085 return (EPERM); 6086 6087 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6088 node.sysctl_data = &new_eee; 6089 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6090 if ((error) || (newp == NULL)) 6091 return (error); 6092 6093 /* Nothing to do */ 6094 if (new_eee == curr_eee) 6095 return (0); 6096 6097 /* Not supported */ 6098 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6099 return (EINVAL); 6100 6101 /* Bounds checking */ 6102 if ((new_eee < 0) || (new_eee > 1)) 6103 return (EINVAL); 6104 6105 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6106 if (retval) { 6107 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6108 return (EINVAL); 6109 } 6110 6111 /* Restart auto-neg */ 6112 if_init(ifp); 6113 6114 device_printf(dev, "New EEE state: %d\n", new_eee); 6115 6116 /* Cache new value */ 6117 if (new_eee) 6118 sc->feat_en |= IXGBE_FEATURE_EEE; 6119 else 6120 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6121 6122 return (error); 6123 } /* ixgbe_sysctl_eee_state */ 6124 6125 #define PRINTQS(sc, regname) \ 6126 do { \ 6127 struct ixgbe_hw *_hw = &(sc)->hw; \ 6128 int _i; \ 6129 \ 6130 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6131 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6132 printf((_i == 0) ? "\t" : " "); \ 6133 printf("%08x", IXGBE_READ_REG(_hw, \ 6134 IXGBE_##regname(_i))); \ 6135 } \ 6136 printf("\n"); \ 6137 } while (0) 6138 6139 /************************************************************************ 6140 * ixgbe_print_debug_info 6141 * 6142 * Called only when em_display_debug_stats is enabled. 6143 * Provides a way to take a look at important statistics 6144 * maintained by the driver and hardware. 6145 ************************************************************************/ 6146 static void 6147 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6148 { 6149 device_t dev = sc->dev; 6150 struct ixgbe_hw *hw = &sc->hw; 6151 int table_size; 6152 int i; 6153 6154 switch (sc->hw.mac.type) { 6155 case ixgbe_mac_X550: 6156 case ixgbe_mac_X550EM_x: 6157 case ixgbe_mac_X550EM_a: 6158 table_size = 128; 6159 break; 6160 default: 6161 table_size = 32; 6162 break; 6163 } 6164 6165 device_printf(dev, "[E]RETA:\n"); 6166 for (i = 0; i < table_size; i++) { 6167 if (i < 32) 6168 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6169 IXGBE_RETA(i))); 6170 else 6171 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6172 IXGBE_ERETA(i - 32))); 6173 } 6174 6175 device_printf(dev, "queue:"); 6176 for (i = 0; i < sc->num_queues; i++) { 6177 printf((i == 0) ? "\t" : " "); 6178 printf("%8d", i); 6179 } 6180 printf("\n"); 6181 PRINTQS(sc, RDBAL); 6182 PRINTQS(sc, RDBAH); 6183 PRINTQS(sc, RDLEN); 6184 PRINTQS(sc, SRRCTL); 6185 PRINTQS(sc, RDH); 6186 PRINTQS(sc, RDT); 6187 PRINTQS(sc, RXDCTL); 6188 6189 device_printf(dev, "RQSMR:"); 6190 for (i = 0; i < sc->num_queues / 4; i++) { 6191 printf((i == 0) ? "\t" : " "); 6192 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6193 } 6194 printf("\n"); 6195 6196 device_printf(dev, "disabled_count:"); 6197 for (i = 0; i < sc->num_queues; i++) { 6198 printf((i == 0) ? "\t" : " "); 6199 printf("%8d", sc->queues[i].disabled_count); 6200 } 6201 printf("\n"); 6202 6203 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6204 if (hw->mac.type != ixgbe_mac_82598EB) { 6205 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6206 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6207 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6208 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6209 } 6210 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6211 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6212 } /* ixgbe_print_debug_info */ 6213 6214 /************************************************************************ 6215 * ixgbe_sysctl_debug 6216 ************************************************************************/ 6217 static int 6218 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6219 { 6220 struct sysctlnode node = *rnode; 6221 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6222 int error, result = 0; 6223 6224 if (ixgbe_fw_recovery_mode_swflag(sc)) 6225 return (EPERM); 6226 6227 node.sysctl_data = &result; 6228 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6229 6230 if (error || newp == NULL) 6231 return error; 6232 6233 if (result == 1) 6234 ixgbe_print_debug_info(sc); 6235 6236 return 0; 6237 } /* ixgbe_sysctl_debug */ 6238 6239 /************************************************************************ 6240 * ixgbe_sysctl_rx_copy_len 6241 ************************************************************************/ 6242 static int 6243 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6244 { 6245 struct sysctlnode node = *rnode; 6246 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6247 int error; 6248 int result = sc->rx_copy_len; 6249 6250 node.sysctl_data = &result; 6251 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6252 6253 if (error || newp == NULL) 6254 return error; 6255 6256 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6257 return EINVAL; 6258 6259 sc->rx_copy_len = result; 6260 6261 return 0; 6262 } /* ixgbe_sysctl_rx_copy_len */ 6263 6264 /************************************************************************ 6265 * ixgbe_sysctl_tx_process_limit 6266 ************************************************************************/ 6267 static int 6268 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6269 { 6270 struct sysctlnode node = *rnode; 6271 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6272 int error; 6273 int result = sc->tx_process_limit; 6274 6275 node.sysctl_data = &result; 6276 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6277 6278 if (error || newp == NULL) 6279 return error; 6280 6281 if ((result <= 0) || (result > sc->num_tx_desc)) 6282 return EINVAL; 6283 6284 sc->tx_process_limit = result; 6285 6286 return 0; 6287 } /* ixgbe_sysctl_tx_process_limit */ 6288 6289 /************************************************************************ 6290 * ixgbe_sysctl_rx_process_limit 6291 ************************************************************************/ 6292 static int 6293 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6294 { 6295 struct sysctlnode node = *rnode; 6296 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6297 int error; 6298 int result = sc->rx_process_limit; 6299 6300 node.sysctl_data = &result; 6301 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6302 6303 if (error || newp == NULL) 6304 return error; 6305 6306 if ((result <= 0) || (result > sc->num_rx_desc)) 6307 return EINVAL; 6308 6309 sc->rx_process_limit = result; 6310 6311 return 0; 6312 } /* ixgbe_sysctl_rx_process_limit */ 6313 6314 /************************************************************************ 6315 * ixgbe_init_device_features 6316 ************************************************************************/ 6317 static void 6318 ixgbe_init_device_features(struct ixgbe_softc *sc) 6319 { 6320 sc->feat_cap = IXGBE_FEATURE_NETMAP 6321 | IXGBE_FEATURE_RSS 6322 | IXGBE_FEATURE_MSI 6323 | IXGBE_FEATURE_MSIX 6324 | IXGBE_FEATURE_LEGACY_IRQ 6325 | IXGBE_FEATURE_LEGACY_TX; 6326 6327 /* Set capabilities first... */ 6328 switch (sc->hw.mac.type) { 6329 case ixgbe_mac_82598EB: 6330 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6331 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6332 break; 6333 case ixgbe_mac_X540: 6334 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6335 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6336 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6337 (sc->hw.bus.func == 0)) 6338 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6339 break; 6340 case ixgbe_mac_X550: 6341 /* 6342 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6343 * NVM Image version. 6344 */ 6345 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6346 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6347 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6348 break; 6349 case ixgbe_mac_X550EM_x: 6350 /* 6351 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6352 * NVM Image version. 6353 */ 6354 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6355 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6356 break; 6357 case ixgbe_mac_X550EM_a: 6358 /* 6359 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6360 * NVM Image version. 6361 */ 6362 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6363 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6364 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6365 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6366 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6367 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6368 sc->feat_cap |= IXGBE_FEATURE_EEE; 6369 } 6370 break; 6371 case ixgbe_mac_82599EB: 6372 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6373 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6374 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6375 (sc->hw.bus.func == 0)) 6376 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6377 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6378 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6379 break; 6380 default: 6381 break; 6382 } 6383 6384 /* Enabled by default... */ 6385 /* Fan failure detection */ 6386 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6387 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6388 /* Netmap */ 6389 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6390 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6391 /* EEE */ 6392 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6393 sc->feat_en |= IXGBE_FEATURE_EEE; 6394 /* Thermal Sensor */ 6395 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6396 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6397 /* 6398 * Recovery mode: 6399 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6400 * NVM Image version. 6401 */ 6402 6403 /* Enabled via global sysctl... */ 6404 /* Flow Director */ 6405 if (ixgbe_enable_fdir) { 6406 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6407 sc->feat_en |= IXGBE_FEATURE_FDIR; 6408 else 6409 device_printf(sc->dev, "Device does not support " 6410 "Flow Director. Leaving disabled."); 6411 } 6412 /* Legacy (single queue) transmit */ 6413 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6414 ixgbe_enable_legacy_tx) 6415 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6416 /* 6417 * Message Signal Interrupts - Extended (MSI-X) 6418 * Normal MSI is only enabled if MSI-X calls fail. 6419 */ 6420 if (!ixgbe_enable_msix) 6421 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6422 /* Receive-Side Scaling (RSS) */ 6423 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6424 sc->feat_en |= IXGBE_FEATURE_RSS; 6425 6426 /* Disable features with unmet dependencies... */ 6427 /* No MSI-X */ 6428 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6429 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6430 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6431 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6432 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6433 } 6434 } /* ixgbe_init_device_features */ 6435 6436 /************************************************************************ 6437 * ixgbe_probe - Device identification routine 6438 * 6439 * Determines if the driver should be loaded on 6440 * adapter based on its PCI vendor/device ID. 6441 * 6442 * return BUS_PROBE_DEFAULT on success, positive on failure 6443 ************************************************************************/ 6444 static int 6445 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6446 { 6447 const struct pci_attach_args *pa = aux; 6448 6449 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6450 } 6451 6452 static const ixgbe_vendor_info_t * 6453 ixgbe_lookup(const struct pci_attach_args *pa) 6454 { 6455 const ixgbe_vendor_info_t *ent; 6456 pcireg_t subid; 6457 6458 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6459 6460 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6461 return NULL; 6462 6463 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6464 6465 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6466 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6467 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6468 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6469 (ent->subvendor_id == 0)) && 6470 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6471 (ent->subdevice_id == 0))) { 6472 return ent; 6473 } 6474 } 6475 return NULL; 6476 } 6477 6478 static int 6479 ixgbe_ifflags_cb(struct ethercom *ec) 6480 { 6481 struct ifnet *ifp = &ec->ec_if; 6482 struct ixgbe_softc *sc = ifp->if_softc; 6483 u_short change; 6484 int rv = 0; 6485 6486 IXGBE_CORE_LOCK(sc); 6487 6488 change = ifp->if_flags ^ sc->if_flags; 6489 if (change != 0) 6490 sc->if_flags = ifp->if_flags; 6491 6492 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6493 rv = ENETRESET; 6494 goto out; 6495 } else if ((change & IFF_PROMISC) != 0) 6496 ixgbe_set_rxfilter(sc); 6497 6498 /* Check for ec_capenable. */ 6499 change = ec->ec_capenable ^ sc->ec_capenable; 6500 sc->ec_capenable = ec->ec_capenable; 6501 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6502 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6503 rv = ENETRESET; 6504 goto out; 6505 } 6506 6507 /* 6508 * Special handling is not required for ETHERCAP_VLAN_MTU. 6509 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6510 */ 6511 6512 /* Set up VLAN support and filter */ 6513 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6514 ixgbe_setup_vlan_hw_support(sc); 6515 6516 out: 6517 IXGBE_CORE_UNLOCK(sc); 6518 6519 return rv; 6520 } 6521 6522 /************************************************************************ 6523 * ixgbe_ioctl - Ioctl entry point 6524 * 6525 * Called when the user wants to configure the interface. 6526 * 6527 * return 0 on success, positive on failure 6528 ************************************************************************/ 6529 static int 6530 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6531 { 6532 struct ixgbe_softc *sc = ifp->if_softc; 6533 struct ixgbe_hw *hw = &sc->hw; 6534 struct ifcapreq *ifcr = data; 6535 struct ifreq *ifr = data; 6536 int error = 0; 6537 int l4csum_en; 6538 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6539 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6540 6541 if (ixgbe_fw_recovery_mode_swflag(sc)) 6542 return (EPERM); 6543 6544 switch (command) { 6545 case SIOCSIFFLAGS: 6546 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6547 break; 6548 case SIOCADDMULTI: 6549 case SIOCDELMULTI: 6550 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6551 break; 6552 case SIOCSIFMEDIA: 6553 case SIOCGIFMEDIA: 6554 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6555 break; 6556 case SIOCSIFCAP: 6557 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6558 break; 6559 case SIOCSIFMTU: 6560 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6561 break; 6562 #ifdef __NetBSD__ 6563 case SIOCINITIFADDR: 6564 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6565 break; 6566 case SIOCGIFFLAGS: 6567 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6568 break; 6569 case SIOCGIFAFLAG_IN: 6570 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6571 break; 6572 case SIOCGIFADDR: 6573 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6574 break; 6575 case SIOCGIFMTU: 6576 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6577 break; 6578 case SIOCGIFCAP: 6579 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6580 break; 6581 case SIOCGETHERCAP: 6582 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6583 break; 6584 case SIOCGLIFADDR: 6585 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6586 break; 6587 case SIOCZIFDATA: 6588 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6589 hw->mac.ops.clear_hw_cntrs(hw); 6590 ixgbe_clear_evcnt(sc); 6591 break; 6592 case SIOCAIFADDR: 6593 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6594 break; 6595 #endif 6596 default: 6597 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6598 break; 6599 } 6600 6601 switch (command) { 6602 case SIOCGI2C: 6603 { 6604 struct ixgbe_i2c_req i2c; 6605 6606 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6607 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6608 if (error != 0) 6609 break; 6610 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6611 error = EINVAL; 6612 break; 6613 } 6614 if (i2c.len > sizeof(i2c.data)) { 6615 error = EINVAL; 6616 break; 6617 } 6618 6619 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6620 i2c.dev_addr, i2c.data); 6621 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6622 break; 6623 } 6624 case SIOCSIFCAP: 6625 /* Layer-4 Rx checksum offload has to be turned on and 6626 * off as a unit. 6627 */ 6628 l4csum_en = ifcr->ifcr_capenable & l4csum; 6629 if (l4csum_en != l4csum && l4csum_en != 0) 6630 return EINVAL; 6631 /*FALLTHROUGH*/ 6632 case SIOCADDMULTI: 6633 case SIOCDELMULTI: 6634 case SIOCSIFFLAGS: 6635 case SIOCSIFMTU: 6636 default: 6637 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6638 return error; 6639 if ((ifp->if_flags & IFF_RUNNING) == 0) 6640 ; 6641 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6642 IXGBE_CORE_LOCK(sc); 6643 if ((ifp->if_flags & IFF_RUNNING) != 0) 6644 ixgbe_init_locked(sc); 6645 ixgbe_recalculate_max_frame(sc); 6646 IXGBE_CORE_UNLOCK(sc); 6647 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6648 /* 6649 * Multicast list has changed; set the hardware filter 6650 * accordingly. 6651 */ 6652 IXGBE_CORE_LOCK(sc); 6653 ixgbe_disable_intr(sc); 6654 ixgbe_set_rxfilter(sc); 6655 ixgbe_enable_intr(sc); 6656 IXGBE_CORE_UNLOCK(sc); 6657 } 6658 return 0; 6659 } 6660 6661 return error; 6662 } /* ixgbe_ioctl */ 6663 6664 /************************************************************************ 6665 * ixgbe_check_fan_failure 6666 ************************************************************************/ 6667 static int 6668 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6669 { 6670 u32 mask; 6671 6672 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6673 IXGBE_ESDP_SDP1; 6674 6675 if ((reg & mask) == 0) 6676 return IXGBE_SUCCESS; 6677 6678 /* 6679 * Use ratecheck() just in case interrupt occur frequently. 6680 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6681 * an red LED on the board turned on and link never up until 6682 * power off. 6683 */ 6684 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6685 device_printf(sc->dev, 6686 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6687 6688 return IXGBE_ERR_FAN_FAILURE; 6689 } /* ixgbe_check_fan_failure */ 6690 6691 /************************************************************************ 6692 * ixgbe_handle_que 6693 ************************************************************************/ 6694 static void 6695 ixgbe_handle_que(void *context) 6696 { 6697 struct ix_queue *que = context; 6698 struct ixgbe_softc *sc = que->sc; 6699 struct tx_ring *txr = que->txr; 6700 struct ifnet *ifp = sc->ifp; 6701 bool more = false; 6702 6703 IXGBE_EVC_ADD(&que->handleq, 1); 6704 6705 if (ifp->if_flags & IFF_RUNNING) { 6706 IXGBE_TX_LOCK(txr); 6707 more = ixgbe_txeof(txr); 6708 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6709 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6710 ixgbe_mq_start_locked(ifp, txr); 6711 /* Only for queue 0 */ 6712 /* NetBSD still needs this for CBQ */ 6713 if ((&sc->queues[0] == que) 6714 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6715 ixgbe_legacy_start_locked(ifp, txr); 6716 IXGBE_TX_UNLOCK(txr); 6717 more |= ixgbe_rxeof(que); 6718 } 6719 6720 if (more) { 6721 IXGBE_EVC_ADD(&que->req, 1); 6722 ixgbe_sched_handle_que(sc, que); 6723 } else if (que->res != NULL) { 6724 /* MSIX: Re-enable this interrupt */ 6725 ixgbe_enable_queue(sc, que->msix); 6726 } else { 6727 /* INTx or MSI */ 6728 ixgbe_enable_queue(sc, 0); 6729 } 6730 6731 return; 6732 } /* ixgbe_handle_que */ 6733 6734 /************************************************************************ 6735 * ixgbe_handle_que_work 6736 ************************************************************************/ 6737 static void 6738 ixgbe_handle_que_work(struct work *wk, void *context) 6739 { 6740 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6741 6742 /* 6743 * "enqueued flag" is not required here. 6744 * See ixgbe_msix_que(). 6745 */ 6746 ixgbe_handle_que(que); 6747 } 6748 6749 /************************************************************************ 6750 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6751 ************************************************************************/ 6752 static int 6753 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6754 const struct pci_attach_args *pa) 6755 { 6756 device_t dev = sc->dev; 6757 struct ix_queue *que = sc->queues; 6758 struct tx_ring *txr = sc->tx_rings; 6759 int counts[PCI_INTR_TYPE_SIZE]; 6760 pci_intr_type_t intr_type, max_type; 6761 char intrbuf[PCI_INTRSTR_LEN]; 6762 char wqname[MAXCOMLEN]; 6763 const char *intrstr = NULL; 6764 int defertx_error = 0, error; 6765 6766 /* We allocate a single interrupt resource */ 6767 max_type = PCI_INTR_TYPE_MSI; 6768 counts[PCI_INTR_TYPE_MSIX] = 0; 6769 counts[PCI_INTR_TYPE_MSI] = 6770 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6771 /* Check not feat_en but feat_cap to fallback to INTx */ 6772 counts[PCI_INTR_TYPE_INTX] = 6773 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6774 6775 alloc_retry: 6776 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6777 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6778 return ENXIO; 6779 } 6780 sc->osdep.nintrs = 1; 6781 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6782 intrbuf, sizeof(intrbuf)); 6783 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6784 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6785 device_xname(dev)); 6786 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6787 if (sc->osdep.ihs[0] == NULL) { 6788 aprint_error_dev(dev,"unable to establish %s\n", 6789 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6790 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6791 sc->osdep.intrs = NULL; 6792 switch (intr_type) { 6793 case PCI_INTR_TYPE_MSI: 6794 /* The next try is for INTx: Disable MSI */ 6795 max_type = PCI_INTR_TYPE_INTX; 6796 counts[PCI_INTR_TYPE_INTX] = 1; 6797 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6798 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6799 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6800 goto alloc_retry; 6801 } else 6802 break; 6803 case PCI_INTR_TYPE_INTX: 6804 default: 6805 /* See below */ 6806 break; 6807 } 6808 } 6809 if (intr_type == PCI_INTR_TYPE_INTX) { 6810 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6811 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6812 } 6813 if (sc->osdep.ihs[0] == NULL) { 6814 aprint_error_dev(dev, 6815 "couldn't establish interrupt%s%s\n", 6816 intrstr ? " at " : "", intrstr ? intrstr : ""); 6817 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6818 sc->osdep.intrs = NULL; 6819 return ENXIO; 6820 } 6821 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6822 /* 6823 * Try allocating a fast interrupt and the associated deferred 6824 * processing contexts. 6825 */ 6826 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6827 txr->txr_si = 6828 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6829 ixgbe_deferred_mq_start, txr); 6830 6831 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6832 device_xname(dev)); 6833 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6834 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6835 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6836 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6837 } 6838 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6839 ixgbe_handle_que, que); 6840 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6841 error = workqueue_create(&sc->que_wq, wqname, 6842 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6843 IXGBE_WORKQUEUE_FLAGS); 6844 6845 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6846 && ((txr->txr_si == NULL) || defertx_error != 0)) 6847 || (que->que_si == NULL) || error != 0) { 6848 aprint_error_dev(dev, 6849 "could not establish software interrupts\n"); 6850 6851 return ENXIO; 6852 } 6853 /* For simplicity in the handlers */ 6854 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6855 6856 return (0); 6857 } /* ixgbe_allocate_legacy */ 6858 6859 /************************************************************************ 6860 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6861 ************************************************************************/ 6862 static int 6863 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6864 { 6865 device_t dev = sc->dev; 6866 struct ix_queue *que = sc->queues; 6867 struct tx_ring *txr = sc->tx_rings; 6868 pci_chipset_tag_t pc; 6869 char intrbuf[PCI_INTRSTR_LEN]; 6870 char intr_xname[32]; 6871 char wqname[MAXCOMLEN]; 6872 const char *intrstr = NULL; 6873 int error, vector = 0; 6874 int cpu_id = 0; 6875 kcpuset_t *affinity; 6876 #ifdef RSS 6877 unsigned int rss_buckets = 0; 6878 kcpuset_t cpu_mask; 6879 #endif 6880 6881 pc = sc->osdep.pc; 6882 #ifdef RSS 6883 /* 6884 * If we're doing RSS, the number of queues needs to 6885 * match the number of RSS buckets that are configured. 6886 * 6887 * + If there's more queues than RSS buckets, we'll end 6888 * up with queues that get no traffic. 6889 * 6890 * + If there's more RSS buckets than queues, we'll end 6891 * up having multiple RSS buckets map to the same queue, 6892 * so there'll be some contention. 6893 */ 6894 rss_buckets = rss_getnumbuckets(); 6895 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6896 (sc->num_queues != rss_buckets)) { 6897 device_printf(dev, 6898 "%s: number of queues (%d) != number of RSS buckets (%d)" 6899 "; performance will be impacted.\n", 6900 __func__, sc->num_queues, rss_buckets); 6901 } 6902 #endif 6903 6904 sc->osdep.nintrs = sc->num_queues + 1; 6905 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6906 sc->osdep.nintrs) != 0) { 6907 aprint_error_dev(dev, 6908 "failed to allocate MSI-X interrupt\n"); 6909 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6910 return (ENXIO); 6911 } 6912 6913 kcpuset_create(&affinity, false); 6914 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6915 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6916 device_xname(dev), i); 6917 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6918 sizeof(intrbuf)); 6919 #ifdef IXGBE_MPSAFE 6920 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6921 true); 6922 #endif 6923 /* Set the handler function */ 6924 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6925 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6926 intr_xname); 6927 if (que->res == NULL) { 6928 aprint_error_dev(dev, 6929 "Failed to register QUE handler\n"); 6930 error = ENXIO; 6931 goto err_out; 6932 } 6933 que->msix = vector; 6934 sc->active_queues |= 1ULL << que->msix; 6935 6936 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6937 #ifdef RSS 6938 /* 6939 * The queue ID is used as the RSS layer bucket ID. 6940 * We look up the queue ID -> RSS CPU ID and select 6941 * that. 6942 */ 6943 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6944 CPU_SETOF(cpu_id, &cpu_mask); 6945 #endif 6946 } else { 6947 /* 6948 * Bind the MSI-X vector, and thus the 6949 * rings to the corresponding CPU. 6950 * 6951 * This just happens to match the default RSS 6952 * round-robin bucket -> queue -> CPU allocation. 6953 */ 6954 if (sc->num_queues > 1) 6955 cpu_id = i; 6956 } 6957 /* Round-robin affinity */ 6958 kcpuset_zero(affinity); 6959 kcpuset_set(affinity, cpu_id % ncpu); 6960 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6961 NULL); 6962 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6963 intrstr); 6964 if (error == 0) { 6965 #if 1 /* def IXGBE_DEBUG */ 6966 #ifdef RSS 6967 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6968 cpu_id % ncpu); 6969 #else 6970 aprint_normal(", bound queue %d to cpu %d", i, 6971 cpu_id % ncpu); 6972 #endif 6973 #endif /* IXGBE_DEBUG */ 6974 } 6975 aprint_normal("\n"); 6976 6977 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6978 txr->txr_si = softint_establish( 6979 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6980 ixgbe_deferred_mq_start, txr); 6981 if (txr->txr_si == NULL) { 6982 aprint_error_dev(dev, 6983 "couldn't establish software interrupt\n"); 6984 error = ENXIO; 6985 goto err_out; 6986 } 6987 } 6988 que->que_si 6989 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6990 ixgbe_handle_que, que); 6991 if (que->que_si == NULL) { 6992 aprint_error_dev(dev, 6993 "couldn't establish software interrupt\n"); 6994 error = ENXIO; 6995 goto err_out; 6996 } 6997 } 6998 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 6999 error = workqueue_create(&sc->txr_wq, wqname, 7000 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7001 IXGBE_WORKQUEUE_FLAGS); 7002 if (error) { 7003 aprint_error_dev(dev, 7004 "couldn't create workqueue for deferred Tx\n"); 7005 goto err_out; 7006 } 7007 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 7008 7009 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7010 error = workqueue_create(&sc->que_wq, wqname, 7011 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7012 IXGBE_WORKQUEUE_FLAGS); 7013 if (error) { 7014 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7015 goto err_out; 7016 } 7017 7018 /* and Link */ 7019 cpu_id++; 7020 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7021 sc->vector = vector; 7022 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7023 sizeof(intrbuf)); 7024 #ifdef IXGBE_MPSAFE 7025 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, 7026 true); 7027 #endif 7028 /* Set the link handler function */ 7029 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7030 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7031 intr_xname); 7032 if (sc->osdep.ihs[vector] == NULL) { 7033 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7034 error = ENXIO; 7035 goto err_out; 7036 } 7037 /* Round-robin affinity */ 7038 kcpuset_zero(affinity); 7039 kcpuset_set(affinity, cpu_id % ncpu); 7040 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7041 NULL); 7042 7043 aprint_normal_dev(dev, 7044 "for link, interrupting at %s", intrstr); 7045 if (error == 0) 7046 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7047 else 7048 aprint_normal("\n"); 7049 7050 kcpuset_destroy(affinity); 7051 aprint_normal_dev(dev, 7052 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7053 7054 return (0); 7055 7056 err_out: 7057 kcpuset_destroy(affinity); 7058 ixgbe_free_deferred_handlers(sc); 7059 ixgbe_free_pciintr_resources(sc); 7060 return (error); 7061 } /* ixgbe_allocate_msix */ 7062 7063 /************************************************************************ 7064 * ixgbe_configure_interrupts 7065 * 7066 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7067 * This will also depend on user settings. 7068 ************************************************************************/ 7069 static int 7070 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7071 { 7072 device_t dev = sc->dev; 7073 struct ixgbe_mac_info *mac = &sc->hw.mac; 7074 int want, queues, msgs; 7075 7076 /* Default to 1 queue if MSI-X setup fails */ 7077 sc->num_queues = 1; 7078 7079 /* Override by tuneable */ 7080 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7081 goto msi; 7082 7083 /* 7084 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7085 * interrupt slot. 7086 */ 7087 if (ncpu == 1) 7088 goto msi; 7089 7090 /* First try MSI-X */ 7091 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7092 msgs = MIN(msgs, IXG_MAX_NINTR); 7093 if (msgs < 2) 7094 goto msi; 7095 7096 sc->feat_en |= IXGBE_FEATURE_MSIX; 7097 7098 /* Figure out a reasonable auto config value */ 7099 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7100 7101 #ifdef RSS 7102 /* If we're doing RSS, clamp at the number of RSS buckets */ 7103 if (sc->feat_en & IXGBE_FEATURE_RSS) 7104 queues = uimin(queues, rss_getnumbuckets()); 7105 #endif 7106 if (ixgbe_num_queues > queues) { 7107 aprint_error_dev(sc->dev, 7108 "ixgbe_num_queues (%d) is too large, " 7109 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7110 ixgbe_num_queues = queues; 7111 } 7112 7113 if (ixgbe_num_queues != 0) 7114 queues = ixgbe_num_queues; 7115 else 7116 queues = uimin(queues, 7117 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7118 7119 /* reflect correct sysctl value */ 7120 ixgbe_num_queues = queues; 7121 7122 /* 7123 * Want one vector (RX/TX pair) per queue 7124 * plus an additional for Link. 7125 */ 7126 want = queues + 1; 7127 if (msgs >= want) 7128 msgs = want; 7129 else { 7130 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7131 "%d vectors but %d queues wanted!\n", msgs, want); 7132 goto msi; 7133 } 7134 sc->num_queues = queues; 7135 sc->feat_en |= IXGBE_FEATURE_MSIX; 7136 return (0); 7137 7138 /* 7139 * MSI-X allocation failed or provided us with 7140 * less vectors than needed. Free MSI-X resources 7141 * and we'll try enabling MSI. 7142 */ 7143 msi: 7144 /* Without MSI-X, some features are no longer supported */ 7145 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7146 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7147 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7148 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7149 7150 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7151 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7152 if (msgs > 1) 7153 msgs = 1; 7154 if (msgs != 0) { 7155 msgs = 1; 7156 sc->feat_en |= IXGBE_FEATURE_MSI; 7157 return (0); 7158 } 7159 7160 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7161 aprint_error_dev(dev, 7162 "Device does not support legacy interrupts.\n"); 7163 return 1; 7164 } 7165 7166 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7167 7168 return (0); 7169 } /* ixgbe_configure_interrupts */ 7170 7171 7172 /************************************************************************ 7173 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7174 * 7175 * Done outside of interrupt context since the driver might sleep 7176 ************************************************************************/ 7177 static void 7178 ixgbe_handle_link(void *context) 7179 { 7180 struct ixgbe_softc *sc = context; 7181 struct ixgbe_hw *hw = &sc->hw; 7182 7183 KASSERT(mutex_owned(&sc->core_mtx)); 7184 7185 IXGBE_EVC_ADD(&sc->link_workev, 1); 7186 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7187 ixgbe_update_link_status(sc); 7188 7189 /* Re-enable link interrupts */ 7190 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7191 } /* ixgbe_handle_link */ 7192 7193 #if 0 7194 /************************************************************************ 7195 * ixgbe_rearm_queues 7196 ************************************************************************/ 7197 static __inline void 7198 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7199 { 7200 u32 mask; 7201 7202 switch (sc->hw.mac.type) { 7203 case ixgbe_mac_82598EB: 7204 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7205 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7206 break; 7207 case ixgbe_mac_82599EB: 7208 case ixgbe_mac_X540: 7209 case ixgbe_mac_X550: 7210 case ixgbe_mac_X550EM_x: 7211 case ixgbe_mac_X550EM_a: 7212 mask = (queues & 0xFFFFFFFF); 7213 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7214 mask = (queues >> 32); 7215 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7216 break; 7217 default: 7218 break; 7219 } 7220 } /* ixgbe_rearm_queues */ 7221 #endif 7222
Indexes created Tue Sep 30 07:10:03 GMT 2025