ixgbe.c revision 1.343
1 /* $NetBSD: ixgbe.c,v 1.343 2023/10/12 08:06:13 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.343 2023/10/12 08:06:13 msaitoh Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus with a max of 8. This 362 * can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = DEFAULT_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = DEFAULT_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_MPSAFE 1 416 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 417 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 418 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 419 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 420 #else 421 #define IXGBE_CALLOUT_FLAGS 0 422 #define IXGBE_SOFTINT_FLAGS 0 423 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 424 #define IXGBE_TASKLET_WQ_FLAGS 0 425 #endif 426 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 427 428 /* Interval between reports of errors */ 429 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 430 431 /************************************************************************ 432 * ixgbe_initialize_rss_mapping 433 ************************************************************************/ 434 static void 435 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 436 { 437 struct ixgbe_hw *hw = &sc->hw; 438 u32 reta = 0, mrqc, rss_key[10]; 439 int queue_id, table_size, index_mult; 440 int i, j; 441 u32 rss_hash_config; 442 443 /* force use default RSS key. */ 444 #ifdef __NetBSD__ 445 rss_getkey((uint8_t *) &rss_key); 446 #else 447 if (sc->feat_en & IXGBE_FEATURE_RSS) { 448 /* Fetch the configured RSS key */ 449 rss_getkey((uint8_t *) &rss_key); 450 } else { 451 /* set up random bits */ 452 cprng_fast(&rss_key, sizeof(rss_key)); 453 } 454 #endif 455 456 /* Set multiplier for RETA setup and table size based on MAC */ 457 index_mult = 0x1; 458 table_size = 128; 459 switch (sc->hw.mac.type) { 460 case ixgbe_mac_82598EB: 461 index_mult = 0x11; 462 break; 463 case ixgbe_mac_X550: 464 case ixgbe_mac_X550EM_x: 465 case ixgbe_mac_X550EM_a: 466 table_size = 512; 467 break; 468 default: 469 break; 470 } 471 472 /* Set up the redirection table */ 473 for (i = 0, j = 0; i < table_size; i++, j++) { 474 if (j == sc->num_queues) 475 j = 0; 476 477 if (sc->feat_en & IXGBE_FEATURE_RSS) { 478 /* 479 * Fetch the RSS bucket id for the given indirection 480 * entry. Cap it at the number of configured buckets 481 * (which is num_queues.) 482 */ 483 queue_id = rss_get_indirection_to_bucket(i); 484 queue_id = queue_id % sc->num_queues; 485 } else 486 queue_id = (j * index_mult); 487 488 /* 489 * The low 8 bits are for hash value (n+0); 490 * The next 8 bits are for hash value (n+1), etc. 491 */ 492 reta = reta >> 8; 493 reta = reta | (((uint32_t) queue_id) << 24); 494 if ((i & 3) == 3) { 495 if (i < 128) 496 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 497 else 498 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 499 reta); 500 reta = 0; 501 } 502 } 503 504 /* Now fill our hash function seeds */ 505 for (i = 0; i < 10; i++) 506 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 507 508 /* Perform hash on these packet types */ 509 if (sc->feat_en & IXGBE_FEATURE_RSS) 510 rss_hash_config = rss_gethashconfig(); 511 else { 512 /* 513 * Disable UDP - IP fragments aren't currently being handled 514 * and so we end up with a mix of 2-tuple and 4-tuple 515 * traffic. 516 */ 517 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 518 | RSS_HASHTYPE_RSS_TCP_IPV4 519 | RSS_HASHTYPE_RSS_IPV6 520 | RSS_HASHTYPE_RSS_TCP_IPV6 521 | RSS_HASHTYPE_RSS_IPV6_EX 522 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 523 } 524 525 mrqc = IXGBE_MRQC_RSSEN; 526 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 527 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 528 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 529 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 530 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 531 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 532 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 533 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 534 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 535 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 536 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 537 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 538 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 539 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 540 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 541 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 542 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 543 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 544 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 545 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 546 } /* ixgbe_initialize_rss_mapping */ 547 548 /************************************************************************ 549 * ixgbe_initialize_receive_units - Setup receive registers and features. 550 ************************************************************************/ 551 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 552 553 static void 554 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 555 { 556 struct rx_ring *rxr = sc->rx_rings; 557 struct ixgbe_hw *hw = &sc->hw; 558 struct ifnet *ifp = sc->ifp; 559 int i, j; 560 u32 bufsz, fctrl, srrctl, rxcsum; 561 u32 hlreg; 562 563 /* 564 * Make sure receives are disabled while 565 * setting up the descriptor ring 566 */ 567 ixgbe_disable_rx(hw); 568 569 /* Enable broadcasts */ 570 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 571 fctrl |= IXGBE_FCTRL_BAM; 572 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 573 fctrl |= IXGBE_FCTRL_DPF; 574 fctrl |= IXGBE_FCTRL_PMCF; 575 } 576 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 577 578 /* Set for Jumbo Frames? */ 579 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 580 if (ifp->if_mtu > ETHERMTU) 581 hlreg |= IXGBE_HLREG0_JUMBOEN; 582 else 583 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 584 585 #ifdef DEV_NETMAP 586 /* CRC stripping is conditional in Netmap */ 587 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 588 (ifp->if_capenable & IFCAP_NETMAP) && 589 !ix_crcstrip) 590 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 591 else 592 #endif /* DEV_NETMAP */ 593 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 594 595 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 596 597 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 598 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 599 600 for (i = 0; i < sc->num_queues; i++, rxr++) { 601 u64 rdba = rxr->rxdma.dma_paddr; 602 u32 reg; 603 int regnum = i / 4; /* 1 register per 4 queues */ 604 int regshift = i % 4; /* 4 bits per 1 queue */ 605 j = rxr->me; 606 607 /* Setup the Base and Length of the Rx Descriptor Ring */ 608 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 609 (rdba & 0x00000000ffffffffULL)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 611 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 612 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 613 614 /* Set up the SRRCTL register */ 615 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 616 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 617 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 618 srrctl |= bufsz; 619 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 620 621 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 622 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 623 reg &= ~(0x000000ffUL << (regshift * 8)); 624 reg |= i << (regshift * 8); 625 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 626 627 /* 628 * Set DROP_EN iff we have no flow control and >1 queue. 629 * Note that srrctl was cleared shortly before during reset, 630 * so we do not need to clear the bit, but do it just in case 631 * this code is moved elsewhere. 632 */ 633 if ((sc->num_queues > 1) && 634 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 635 srrctl |= IXGBE_SRRCTL_DROP_EN; 636 else 637 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 638 639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 640 641 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 642 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 643 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 644 645 /* Set the driver rx tail address */ 646 rxr->tail = IXGBE_RDT(rxr->me); 647 } 648 649 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 650 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 651 | IXGBE_PSRTYPE_UDPHDR 652 | IXGBE_PSRTYPE_IPV4HDR 653 | IXGBE_PSRTYPE_IPV6HDR; 654 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 655 } 656 657 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 658 659 ixgbe_initialize_rss_mapping(sc); 660 661 if (sc->num_queues > 1) { 662 /* RSS and RX IPP Checksum are mutually exclusive */ 663 rxcsum |= IXGBE_RXCSUM_PCSD; 664 } 665 666 if (ifp->if_capenable & IFCAP_RXCSUM) 667 rxcsum |= IXGBE_RXCSUM_PCSD; 668 669 /* This is useful for calculating UDP/IP fragment checksums */ 670 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 671 rxcsum |= IXGBE_RXCSUM_IPPCSE; 672 673 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 674 675 } /* ixgbe_initialize_receive_units */ 676 677 /************************************************************************ 678 * ixgbe_initialize_transmit_units - Enable transmit units. 679 ************************************************************************/ 680 static void 681 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 682 { 683 struct tx_ring *txr = sc->tx_rings; 684 struct ixgbe_hw *hw = &sc->hw; 685 int i; 686 687 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 688 689 /* Setup the Base and Length of the Tx Descriptor Ring */ 690 for (i = 0; i < sc->num_queues; i++, txr++) { 691 u64 tdba = txr->txdma.dma_paddr; 692 u32 txctrl = 0; 693 u32 tqsmreg, reg; 694 int regnum = i / 4; /* 1 register per 4 queues */ 695 int regshift = i % 4; /* 4 bits per 1 queue */ 696 int j = txr->me; 697 698 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 699 (tdba & 0x00000000ffffffffULL)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 701 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 702 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 703 704 /* 705 * Set TQSMR (Transmit Queue Statistic Mapping) register. 706 * Register location is different between 82598 and others. 707 */ 708 if (sc->hw.mac.type == ixgbe_mac_82598EB) 709 tqsmreg = IXGBE_TQSMR(regnum); 710 else 711 tqsmreg = IXGBE_TQSM(regnum); 712 reg = IXGBE_READ_REG(hw, tqsmreg); 713 reg &= ~(0x000000ffUL << (regshift * 8)); 714 reg |= i << (regshift * 8); 715 IXGBE_WRITE_REG(hw, tqsmreg, reg); 716 717 /* Setup the HW Tx Head and Tail descriptor pointers */ 718 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 719 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 720 721 /* Cache the tail address */ 722 txr->tail = IXGBE_TDT(j); 723 724 txr->txr_no_space = false; 725 726 /* Disable Head Writeback */ 727 /* 728 * Note: for X550 series devices, these registers are actually 729 * prefixed with TPH_ instead of DCA_, but the addresses and 730 * fields remain the same. 731 */ 732 switch (hw->mac.type) { 733 case ixgbe_mac_82598EB: 734 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 735 break; 736 default: 737 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 738 break; 739 } 740 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 741 switch (hw->mac.type) { 742 case ixgbe_mac_82598EB: 743 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 744 break; 745 default: 746 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 747 break; 748 } 749 750 } 751 752 if (hw->mac.type != ixgbe_mac_82598EB) { 753 u32 dmatxctl, rttdcs; 754 755 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 756 dmatxctl |= IXGBE_DMATXCTL_TE; 757 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 758 /* Disable arbiter to set MTQC */ 759 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 760 rttdcs |= IXGBE_RTTDCS_ARBDIS; 761 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 762 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 763 ixgbe_get_mtqc(sc->iov_mode)); 764 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 765 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 766 } 767 } /* ixgbe_initialize_transmit_units */ 768 769 static void 770 ixgbe_quirks(struct ixgbe_softc *sc) 771 { 772 device_t dev = sc->dev; 773 struct ixgbe_hw *hw = &sc->hw; 774 const char *vendor, *product; 775 776 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 777 /* 778 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 779 * MA10-ST0. 780 */ 781 vendor = pmf_get_platform("system-vendor"); 782 product = pmf_get_platform("system-product"); 783 784 if ((vendor == NULL) || (product == NULL)) 785 return; 786 787 if ((strcmp(vendor, "GIGABYTE") == 0) && 788 (strcmp(product, "MA10-ST0") == 0)) { 789 aprint_verbose_dev(dev, 790 "Enable SFP+ MOD_ABS inverse quirk\n"); 791 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 792 } 793 } 794 } 795 796 /************************************************************************ 797 * ixgbe_attach - Device initialization routine 798 * 799 * Called when the driver is being loaded. 800 * Identifies the type of hardware, allocates all resources 801 * and initializes the hardware. 802 * 803 * return 0 on success, positive on failure 804 ************************************************************************/ 805 static void 806 ixgbe_attach(device_t parent, device_t dev, void *aux) 807 { 808 struct ixgbe_softc *sc; 809 struct ixgbe_hw *hw; 810 int error = -1; 811 u32 ctrl_ext; 812 u16 high, low, nvmreg, dev_caps; 813 pcireg_t id, subid; 814 const ixgbe_vendor_info_t *ent; 815 struct pci_attach_args *pa = aux; 816 bool unsupported_sfp = false; 817 const char *str; 818 char wqname[MAXCOMLEN]; 819 char buf[256]; 820 821 INIT_DEBUGOUT("ixgbe_attach: begin"); 822 823 /* Allocate, clear, and link in our adapter structure */ 824 sc = device_private(dev); 825 sc->hw.back = sc; 826 sc->dev = dev; 827 hw = &sc->hw; 828 sc->osdep.pc = pa->pa_pc; 829 sc->osdep.tag = pa->pa_tag; 830 if (pci_dma64_available(pa)) 831 sc->osdep.dmat = pa->pa_dmat64; 832 else 833 sc->osdep.dmat = pa->pa_dmat; 834 sc->osdep.attached = false; 835 sc->osdep.detaching = false; 836 837 ent = ixgbe_lookup(pa); 838 839 KASSERT(ent != NULL); 840 841 aprint_normal(": %s, Version - %s\n", 842 ixgbe_strings[ent->index], ixgbe_driver_version); 843 844 /* Core Lock Init */ 845 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 846 847 /* Set up the timer callout and workqueue */ 848 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 849 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 850 error = workqueue_create(&sc->timer_wq, wqname, 851 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 852 IXGBE_TASKLET_WQ_FLAGS); 853 if (error) { 854 aprint_error_dev(dev, 855 "could not create timer workqueue (%d)\n", error); 856 goto err_out; 857 } 858 859 /* Determine hardware revision */ 860 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 861 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 862 863 hw->vendor_id = PCI_VENDOR(id); 864 hw->device_id = PCI_PRODUCT(id); 865 hw->revision_id = 866 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 867 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 868 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 869 870 /* Set quirk flags */ 871 ixgbe_quirks(sc); 872 873 /* 874 * Make sure BUSMASTER is set 875 */ 876 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 877 878 /* Do base PCI setup - map BAR0 */ 879 if (ixgbe_allocate_pci_resources(sc, pa)) { 880 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 881 error = ENXIO; 882 goto err_out; 883 } 884 885 /* let hardware know driver is loaded */ 886 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 887 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 888 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 889 890 /* 891 * Initialize the shared code 892 */ 893 if (ixgbe_init_shared_code(hw) != 0) { 894 aprint_error_dev(dev, 895 "Unable to initialize the shared code\n"); 896 error = ENXIO; 897 goto err_out; 898 } 899 900 switch (hw->mac.type) { 901 case ixgbe_mac_82598EB: 902 str = "82598EB"; 903 break; 904 case ixgbe_mac_82599EB: 905 str = "82599EB"; 906 break; 907 case ixgbe_mac_X540: 908 str = "X540"; 909 break; 910 case ixgbe_mac_X550: 911 str = "X550"; 912 break; 913 case ixgbe_mac_X550EM_x: 914 str = "X550EM X"; 915 break; 916 case ixgbe_mac_X550EM_a: 917 str = "X550EM A"; 918 break; 919 default: 920 str = "Unknown"; 921 break; 922 } 923 aprint_normal_dev(dev, "device %s\n", str); 924 925 hw->allow_unsupported_sfp = allow_unsupported_sfp; 926 927 /* Pick up the 82599 settings */ 928 if (hw->mac.type != ixgbe_mac_82598EB) 929 hw->phy.smart_speed = ixgbe_smart_speed; 930 931 /* Set the right number of segments */ 932 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 933 sc->num_segs = IXGBE_SCATTER_DEFAULT; 934 935 /* Ensure SW/FW semaphore is free */ 936 ixgbe_init_swfw_semaphore(hw); 937 938 hw->mac.ops.set_lan_id(hw); 939 ixgbe_init_device_features(sc); 940 941 if (ixgbe_configure_interrupts(sc)) { 942 error = ENXIO; 943 goto err_out; 944 } 945 946 /* Allocate multicast array memory. */ 947 sc->mta = malloc(sizeof(*sc->mta) * 948 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 949 950 /* Enable WoL (if supported) */ 951 ixgbe_check_wol_support(sc); 952 953 /* Register for VLAN events */ 954 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 955 956 /* Verify adapter fan is still functional (if applicable) */ 957 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 958 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 959 ixgbe_check_fan_failure(sc, esdp, FALSE); 960 } 961 962 /* Set an initial default flow control value */ 963 hw->fc.requested_mode = ixgbe_flow_control; 964 965 /* Do descriptor calc and sanity checks */ 966 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 967 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 968 aprint_error_dev(dev, "Invalid TX ring size (%d). " 969 "It must be between %d and %d, " 970 "inclusive, and must be a multiple of %zu. " 971 "Using default value of %d instead.\n", 972 ixgbe_txd, MIN_TXD, MAX_TXD, 973 DBA_ALIGN / sizeof(union ixgbe_adv_tx_desc), 974 DEFAULT_TXD); 975 sc->num_tx_desc = DEFAULT_TXD; 976 } else 977 sc->num_tx_desc = ixgbe_txd; 978 979 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 980 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 981 aprint_error_dev(dev, "Invalid RX ring size (%d). " 982 "It must be between %d and %d, " 983 "inclusive, and must be a multiple of %zu. " 984 "Using default value of %d instead.\n", 985 ixgbe_rxd, MIN_RXD, MAX_RXD, 986 DBA_ALIGN / sizeof(union ixgbe_adv_rx_desc), 987 DEFAULT_RXD); 988 sc->num_rx_desc = DEFAULT_RXD; 989 } else 990 sc->num_rx_desc = ixgbe_rxd; 991 992 /* Sysctls for limiting the amount of work done in the taskqueues */ 993 sc->rx_process_limit 994 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 995 ? ixgbe_rx_process_limit : sc->num_rx_desc; 996 sc->tx_process_limit 997 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 998 ? ixgbe_tx_process_limit : sc->num_tx_desc; 999 1000 /* Set default high limit of copying mbuf in rxeof */ 1001 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 1002 1003 /* Allocate our TX/RX Queues */ 1004 if (ixgbe_allocate_queues(sc)) { 1005 error = ENOMEM; 1006 goto err_out; 1007 } 1008 1009 hw->phy.reset_if_overtemp = TRUE; 1010 error = ixgbe_reset_hw(hw); 1011 hw->phy.reset_if_overtemp = FALSE; 1012 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1013 error = IXGBE_SUCCESS; 1014 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1015 aprint_error_dev(dev, 1016 "Unsupported SFP+ module type was detected.\n"); 1017 unsupported_sfp = true; 1018 error = IXGBE_SUCCESS; 1019 } else if (error) { 1020 aprint_error_dev(dev, 1021 "Hardware initialization failed(error = %d)\n", error); 1022 error = EIO; 1023 goto err_late; 1024 } 1025 1026 /* Make sure we have a good EEPROM before we read from it */ 1027 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1028 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1029 error = EIO; 1030 goto err_late; 1031 } 1032 1033 aprint_normal("%s:", device_xname(dev)); 1034 /* NVM Image Version */ 1035 high = low = 0; 1036 switch (hw->mac.type) { 1037 case ixgbe_mac_82598EB: 1038 /* 1039 * Print version from the dev starter version (0x29). The 1040 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1041 */ 1042 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1043 if (nvmreg == 0xffff) 1044 break; 1045 high = (nvmreg >> 12) & 0x0f; 1046 low = (nvmreg >> 4) & 0xff; 1047 id = nvmreg & 0x0f; 1048 /* 1049 * The following output might not be correct. Some 82598 cards 1050 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1051 */ 1052 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1053 break; 1054 case ixgbe_mac_X540: 1055 case ixgbe_mac_X550EM_a: 1056 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1057 if (nvmreg == 0xffff) 1058 break; 1059 high = (nvmreg >> 12) & 0x0f; 1060 low = (nvmreg >> 4) & 0xff; 1061 id = nvmreg & 0x0f; 1062 aprint_normal(" NVM Image Version %u.", high); 1063 if (hw->mac.type == ixgbe_mac_X540) 1064 str = "%x"; 1065 else 1066 str = "%02x"; 1067 aprint_normal(str, low); 1068 aprint_normal(" ID 0x%x,", id); 1069 break; 1070 case ixgbe_mac_X550EM_x: 1071 case ixgbe_mac_X550: 1072 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1073 if (nvmreg == 0xffff) 1074 break; 1075 high = (nvmreg >> 12) & 0x0f; 1076 low = nvmreg & 0xff; 1077 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1078 break; 1079 default: 1080 break; 1081 } 1082 hw->eeprom.nvm_image_ver_high = high; 1083 hw->eeprom.nvm_image_ver_low = low; 1084 1085 /* PHY firmware revision */ 1086 switch (hw->mac.type) { 1087 case ixgbe_mac_X540: 1088 case ixgbe_mac_X550: 1089 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1090 if (nvmreg == 0xffff) 1091 break; 1092 high = (nvmreg >> 12) & 0x0f; 1093 low = (nvmreg >> 4) & 0xff; 1094 id = nvmreg & 0x000f; 1095 aprint_normal(" PHY FW Revision %u.", high); 1096 if (hw->mac.type == ixgbe_mac_X540) 1097 str = "%x"; 1098 else 1099 str = "%02x"; 1100 aprint_normal(str, low); 1101 aprint_normal(" ID 0x%x,", id); 1102 break; 1103 default: 1104 break; 1105 } 1106 1107 /* NVM Map version & OEM NVM Image version */ 1108 switch (hw->mac.type) { 1109 case ixgbe_mac_X550: 1110 case ixgbe_mac_X550EM_x: 1111 case ixgbe_mac_X550EM_a: 1112 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1113 if (nvmreg != 0xffff) { 1114 high = (nvmreg >> 12) & 0x0f; 1115 low = nvmreg & 0x00ff; 1116 aprint_normal(" NVM Map version %u.%02x,", high, low); 1117 } 1118 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1119 if (nvmreg != 0xffff) { 1120 high = (nvmreg >> 12) & 0x0f; 1121 low = nvmreg & 0x00ff; 1122 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1123 low); 1124 } 1125 break; 1126 default: 1127 break; 1128 } 1129 1130 /* Print the ETrackID */ 1131 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1132 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1133 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1134 1135 /* Printed Board Assembly number */ 1136 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1137 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1138 1139 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1140 error = ixgbe_allocate_msix(sc, pa); 1141 if (error) { 1142 /* Free allocated queue structures first */ 1143 ixgbe_free_queues(sc); 1144 1145 /* Fallback to legacy interrupt */ 1146 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1147 sc->feat_en |= IXGBE_FEATURE_MSI; 1148 sc->num_queues = 1; 1149 1150 /* Allocate our TX/RX Queues again */ 1151 if (ixgbe_allocate_queues(sc)) { 1152 error = ENOMEM; 1153 goto err_out; 1154 } 1155 } 1156 } 1157 1158 /* Recovery mode */ 1159 switch (sc->hw.mac.type) { 1160 case ixgbe_mac_X550: 1161 case ixgbe_mac_X550EM_x: 1162 case ixgbe_mac_X550EM_a: 1163 /* >= 2.00 */ 1164 if (hw->eeprom.nvm_image_ver_high >= 2) { 1165 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1166 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1167 } 1168 break; 1169 default: 1170 break; 1171 } 1172 1173 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1174 error = ixgbe_allocate_legacy(sc, pa); 1175 if (error) 1176 goto err_late; 1177 1178 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1179 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1180 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1181 error = workqueue_create(&sc->admin_wq, wqname, 1182 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1183 IXGBE_TASKLET_WQ_FLAGS); 1184 if (error) { 1185 aprint_error_dev(dev, 1186 "could not create admin workqueue (%d)\n", error); 1187 goto err_out; 1188 } 1189 1190 error = ixgbe_start_hw(hw); 1191 switch (error) { 1192 case IXGBE_ERR_EEPROM_VERSION: 1193 aprint_error_dev(dev, 1194 "This device is a pre-production adapter/" 1195 "LOM. Please be aware there may be issues associated " 1196 "with your hardware.\nIf you are experiencing problems " 1197 "please contact your Intel or hardware representative " 1198 "who provided you with this hardware.\n"); 1199 break; 1200 default: 1201 break; 1202 } 1203 1204 /* Setup OS specific network interface */ 1205 if (ixgbe_setup_interface(dev, sc) != 0) 1206 goto err_late; 1207 1208 /* 1209 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1210 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1211 */ 1212 if (hw->phy.media_type == ixgbe_media_type_copper) { 1213 uint16_t id1, id2; 1214 int oui, model, rev; 1215 char descr[MII_MAX_DESCR_LEN]; 1216 1217 id1 = hw->phy.id >> 16; 1218 id2 = hw->phy.id & 0xffff; 1219 oui = MII_OUI(id1, id2); 1220 model = MII_MODEL(id2); 1221 rev = MII_REV(id2); 1222 mii_get_descr(descr, sizeof(descr), oui, model); 1223 if (descr[0]) 1224 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1225 descr, rev); 1226 else 1227 aprint_normal_dev(dev, 1228 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1229 oui, model, rev); 1230 } 1231 1232 /* Enable EEE power saving */ 1233 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1234 hw->mac.ops.setup_eee(hw, 1235 sc->feat_en & IXGBE_FEATURE_EEE); 1236 1237 /* Enable power to the phy. */ 1238 if (!unsupported_sfp) { 1239 /* Enable the optics for 82599 SFP+ fiber */ 1240 ixgbe_enable_tx_laser(hw); 1241 1242 /* 1243 * XXX Currently, ixgbe_set_phy_power() supports only copper 1244 * PHY, so it's not required to test with !unsupported_sfp. 1245 */ 1246 ixgbe_set_phy_power(hw, TRUE); 1247 } 1248 1249 /* Initialize statistics */ 1250 ixgbe_update_stats_counters(sc); 1251 1252 /* Check PCIE slot type/speed/width */ 1253 ixgbe_get_slot_info(sc); 1254 1255 /* 1256 * Do time init and sysctl init here, but 1257 * only on the first port of a bypass adapter. 1258 */ 1259 ixgbe_bypass_init(sc); 1260 1261 /* Set an initial dmac value */ 1262 sc->dmac = 0; 1263 /* Set initial advertised speeds (if applicable) */ 1264 sc->advertise = ixgbe_get_default_advertise(sc); 1265 1266 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1267 ixgbe_define_iov_schemas(dev, &error); 1268 1269 /* Add sysctls */ 1270 ixgbe_add_device_sysctls(sc); 1271 ixgbe_add_hw_stats(sc); 1272 1273 /* For Netmap */ 1274 sc->init_locked = ixgbe_init_locked; 1275 sc->stop_locked = ixgbe_stop_locked; 1276 1277 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1278 ixgbe_netmap_attach(sc); 1279 1280 /* Print some flags */ 1281 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1282 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1283 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1284 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1285 if (ixgbe_get_device_caps(hw, &dev_caps) == 0) { 1286 snprintb(buf, sizeof(buf), IXGBE_DEVICE_CAPS_FLAGS, dev_caps); 1287 aprint_verbose_dev(dev, "device cap %s\n", buf); 1288 } 1289 1290 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1291 pmf_class_network_register(dev, sc->ifp); 1292 else 1293 aprint_error_dev(dev, "couldn't establish power handler\n"); 1294 1295 /* Init recovery mode timer and state variable */ 1296 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1297 sc->recovery_mode = 0; 1298 1299 /* Set up the timer callout */ 1300 callout_init(&sc->recovery_mode_timer, 1301 IXGBE_CALLOUT_FLAGS); 1302 snprintf(wqname, sizeof(wqname), "%s-recovery", 1303 device_xname(dev)); 1304 error = workqueue_create(&sc->recovery_mode_timer_wq, 1305 wqname, ixgbe_handle_recovery_mode_timer, sc, 1306 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1307 if (error) { 1308 aprint_error_dev(dev, "could not create " 1309 "recovery_mode_timer workqueue (%d)\n", error); 1310 goto err_out; 1311 } 1312 1313 /* Start the task */ 1314 callout_reset(&sc->recovery_mode_timer, hz, 1315 ixgbe_recovery_mode_timer, sc); 1316 } 1317 1318 INIT_DEBUGOUT("ixgbe_attach: end"); 1319 sc->osdep.attached = true; 1320 1321 return; 1322 1323 err_late: 1324 ixgbe_free_queues(sc); 1325 err_out: 1326 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1327 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1328 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1329 ixgbe_free_deferred_handlers(sc); 1330 ixgbe_free_pci_resources(sc); 1331 if (sc->mta != NULL) 1332 free(sc->mta, M_DEVBUF); 1333 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1334 IXGBE_CORE_LOCK_DESTROY(sc); 1335 1336 return; 1337 } /* ixgbe_attach */ 1338 1339 /************************************************************************ 1340 * ixgbe_check_wol_support 1341 * 1342 * Checks whether the adapter's ports are capable of 1343 * Wake On LAN by reading the adapter's NVM. 1344 * 1345 * Sets each port's hw->wol_enabled value depending 1346 * on the value read here. 1347 ************************************************************************/ 1348 static void 1349 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1350 { 1351 struct ixgbe_hw *hw = &sc->hw; 1352 u16 dev_caps = 0; 1353 1354 /* Find out WoL support for port */ 1355 sc->wol_support = hw->wol_enabled = 0; 1356 ixgbe_get_device_caps(hw, &dev_caps); 1357 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1358 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1359 hw->bus.func == 0)) 1360 sc->wol_support = hw->wol_enabled = 1; 1361 1362 /* Save initial wake up filter configuration */ 1363 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1364 1365 return; 1366 } /* ixgbe_check_wol_support */ 1367 1368 /************************************************************************ 1369 * ixgbe_setup_interface 1370 * 1371 * Setup networking device structure and register an interface. 1372 ************************************************************************/ 1373 static int 1374 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1375 { 1376 struct ethercom *ec = &sc->osdep.ec; 1377 struct ifnet *ifp; 1378 1379 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1380 1381 ifp = sc->ifp = &ec->ec_if; 1382 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1383 ifp->if_baudrate = IF_Gbps(10); 1384 ifp->if_init = ixgbe_init; 1385 ifp->if_stop = ixgbe_ifstop; 1386 ifp->if_softc = sc; 1387 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1388 #ifdef IXGBE_MPSAFE 1389 ifp->if_extflags = IFEF_MPSAFE; 1390 #endif 1391 ifp->if_ioctl = ixgbe_ioctl; 1392 #if __FreeBSD_version >= 1100045 1393 /* TSO parameters */ 1394 ifp->if_hw_tsomax = 65518; 1395 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1396 ifp->if_hw_tsomaxsegsize = 2048; 1397 #endif 1398 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1399 #if 0 1400 ixgbe_start_locked = ixgbe_legacy_start_locked; 1401 #endif 1402 } else { 1403 ifp->if_transmit = ixgbe_mq_start; 1404 #if 0 1405 ixgbe_start_locked = ixgbe_mq_start_locked; 1406 #endif 1407 } 1408 ifp->if_start = ixgbe_legacy_start; 1409 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1410 IFQ_SET_READY(&ifp->if_snd); 1411 1412 if_initialize(ifp); 1413 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1414 ether_ifattach(ifp, sc->hw.mac.addr); 1415 aprint_normal_dev(dev, "Ethernet address %s\n", 1416 ether_sprintf(sc->hw.mac.addr)); 1417 /* 1418 * We use per TX queue softint, so if_deferred_start_init() isn't 1419 * used. 1420 */ 1421 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1422 1423 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1424 1425 /* 1426 * Tell the upper layer(s) we support long frames. 1427 */ 1428 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1429 1430 /* Set capability flags */ 1431 ifp->if_capabilities |= IFCAP_RXCSUM 1432 | IFCAP_TXCSUM 1433 | IFCAP_TSOv4 1434 | IFCAP_TSOv6; 1435 ifp->if_capenable = 0; 1436 1437 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1438 | ETHERCAP_VLAN_HWCSUM 1439 | ETHERCAP_JUMBO_MTU 1440 | ETHERCAP_VLAN_MTU; 1441 1442 /* Enable the above capabilities by default */ 1443 ec->ec_capenable = ec->ec_capabilities; 1444 1445 /* 1446 * Don't turn this on by default, if vlans are 1447 * created on another pseudo device (eg. lagg) 1448 * then vlan events are not passed thru, breaking 1449 * operation, but with HW FILTER off it works. If 1450 * using vlans directly on the ixgbe driver you can 1451 * enable this and get full hardware tag filtering. 1452 */ 1453 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1454 1455 /* 1456 * Specify the media types supported by this adapter and register 1457 * callbacks to update media and link information 1458 */ 1459 ec->ec_ifmedia = &sc->media; 1460 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1461 ixgbe_media_status, &sc->core_mtx); 1462 1463 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1464 ixgbe_add_media_types(sc); 1465 1466 /* Set autoselect media by default */ 1467 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1468 1469 if_register(ifp); 1470 1471 return (0); 1472 } /* ixgbe_setup_interface */ 1473 1474 /************************************************************************ 1475 * ixgbe_add_media_types 1476 ************************************************************************/ 1477 static void 1478 ixgbe_add_media_types(struct ixgbe_softc *sc) 1479 { 1480 struct ixgbe_hw *hw = &sc->hw; 1481 u64 layer; 1482 1483 layer = sc->phy_layer; 1484 1485 #define ADD(mm, dd) \ 1486 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1487 1488 ADD(IFM_NONE, 0); 1489 1490 /* Media types with matching NetBSD media defines */ 1491 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1492 ADD(IFM_10G_T | IFM_FDX, 0); 1493 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1494 ADD(IFM_1000_T | IFM_FDX, 0); 1495 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1496 ADD(IFM_100_TX | IFM_FDX, 0); 1497 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1498 ADD(IFM_10_T | IFM_FDX, 0); 1499 1500 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1501 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1502 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1503 1504 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1505 ADD(IFM_10G_LR | IFM_FDX, 0); 1506 if (hw->phy.multispeed_fiber) 1507 ADD(IFM_1000_LX | IFM_FDX, 0); 1508 } 1509 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1510 ADD(IFM_10G_SR | IFM_FDX, 0); 1511 if (hw->phy.multispeed_fiber) 1512 ADD(IFM_1000_SX | IFM_FDX, 0); 1513 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1514 ADD(IFM_1000_SX | IFM_FDX, 0); 1515 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1516 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1517 1518 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1519 ADD(IFM_10G_KR | IFM_FDX, 0); 1520 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1521 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1522 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1523 ADD(IFM_1000_KX | IFM_FDX, 0); 1524 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1525 ADD(IFM_2500_KX | IFM_FDX, 0); 1526 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1527 ADD(IFM_2500_T | IFM_FDX, 0); 1528 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1529 ADD(IFM_5000_T | IFM_FDX, 0); 1530 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1531 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1532 /* XXX no ifmedia_set? */ 1533 1534 ADD(IFM_AUTO, 0); 1535 1536 #undef ADD 1537 } /* ixgbe_add_media_types */ 1538 1539 /************************************************************************ 1540 * ixgbe_is_sfp 1541 ************************************************************************/ 1542 static inline bool 1543 ixgbe_is_sfp(struct ixgbe_hw *hw) 1544 { 1545 switch (hw->mac.type) { 1546 case ixgbe_mac_82598EB: 1547 if (hw->phy.type == ixgbe_phy_nl) 1548 return (TRUE); 1549 return (FALSE); 1550 case ixgbe_mac_82599EB: 1551 case ixgbe_mac_X550EM_x: 1552 case ixgbe_mac_X550EM_a: 1553 switch (hw->mac.ops.get_media_type(hw)) { 1554 case ixgbe_media_type_fiber: 1555 case ixgbe_media_type_fiber_qsfp: 1556 return (TRUE); 1557 default: 1558 return (FALSE); 1559 } 1560 default: 1561 return (FALSE); 1562 } 1563 } /* ixgbe_is_sfp */ 1564 1565 static void 1566 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1567 { 1568 1569 KASSERT(mutex_owned(&sc->admin_mtx)); 1570 1571 if (__predict_true(sc->osdep.detaching == false)) { 1572 if (sc->admin_pending == 0) 1573 workqueue_enqueue(sc->admin_wq, 1574 &sc->admin_wc, NULL); 1575 sc->admin_pending = 1; 1576 } 1577 } 1578 1579 /************************************************************************ 1580 * ixgbe_config_link 1581 ************************************************************************/ 1582 static void 1583 ixgbe_config_link(struct ixgbe_softc *sc) 1584 { 1585 struct ixgbe_hw *hw = &sc->hw; 1586 u32 autoneg, err = 0; 1587 u32 task_requests = 0; 1588 bool sfp, negotiate = false; 1589 1590 sfp = ixgbe_is_sfp(hw); 1591 1592 if (sfp) { 1593 if (hw->phy.multispeed_fiber) { 1594 ixgbe_enable_tx_laser(hw); 1595 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1596 } 1597 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1598 1599 mutex_enter(&sc->admin_mtx); 1600 sc->task_requests |= task_requests; 1601 ixgbe_schedule_admin_tasklet(sc); 1602 mutex_exit(&sc->admin_mtx); 1603 } else { 1604 struct ifmedia *ifm = &sc->media; 1605 1606 if (hw->mac.ops.check_link) 1607 err = ixgbe_check_link(hw, &sc->link_speed, 1608 &sc->link_up, FALSE); 1609 if (err) 1610 return; 1611 1612 /* 1613 * Check if it's the first call. If it's the first call, 1614 * get value for auto negotiation. 1615 */ 1616 autoneg = hw->phy.autoneg_advertised; 1617 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1618 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1619 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1620 &negotiate); 1621 if (err) 1622 return; 1623 if (hw->mac.ops.setup_link) 1624 err = hw->mac.ops.setup_link(hw, autoneg, 1625 sc->link_up); 1626 } 1627 } /* ixgbe_config_link */ 1628 1629 /************************************************************************ 1630 * ixgbe_update_stats_counters - Update board statistics counters. 1631 ************************************************************************/ 1632 static void 1633 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1634 { 1635 struct ifnet *ifp = sc->ifp; 1636 struct ixgbe_hw *hw = &sc->hw; 1637 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1638 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1639 u64 total, total_missed_rx = 0; 1640 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1641 unsigned int queue_counters; 1642 int i; 1643 1644 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1645 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1646 1647 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1648 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1649 if (hw->mac.type >= ixgbe_mac_X550) 1650 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1651 1652 /* 16 registers exist */ 1653 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1654 for (i = 0; i < queue_counters; i++) { 1655 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1656 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1657 if (hw->mac.type >= ixgbe_mac_82599EB) { 1658 IXGBE_EVC_ADD(&stats->qbrc[i], 1659 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1660 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1661 IXGBE_EVC_ADD(&stats->qbtc[i], 1662 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1663 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1664 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRDC(i), qprdc[i]); 1665 } else { 1666 /* 82598 */ 1667 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1668 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1669 } 1670 } 1671 1672 /* 8 registers exist */ 1673 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1674 uint32_t mp; 1675 1676 /* MPC */ 1677 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1678 /* global total per queue */ 1679 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1680 /* running comprehensive total for stats display */ 1681 total_missed_rx += mp; 1682 1683 if (hw->mac.type == ixgbe_mac_82598EB) 1684 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1685 1686 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1687 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1688 if (hw->mac.type >= ixgbe_mac_82599EB) { 1689 IXGBE_EVC_REGADD(hw, stats, 1690 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1691 IXGBE_EVC_REGADD(hw, stats, 1692 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1693 IXGBE_EVC_REGADD(hw, stats, 1694 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1695 } else { 1696 IXGBE_EVC_REGADD(hw, stats, 1697 IXGBE_PXONRXC(i), pxonrxc[i]); 1698 IXGBE_EVC_REGADD(hw, stats, 1699 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1700 } 1701 } 1702 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1703 1704 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1705 if ((sc->link_active == LINK_STATE_UP) 1706 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1707 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1708 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1709 } 1710 if (hw->mac.type == ixgbe_mac_X550EM_a) 1711 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1712 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1713 1714 /* Hardware workaround, gprc counts missed packets */ 1715 IXGBE_EVC_ADD(&stats->gprc, 1716 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1717 1718 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1719 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1720 total = lxontxc + lxofftxc; 1721 1722 if (hw->mac.type != ixgbe_mac_82598EB) { 1723 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1724 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1725 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1726 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1727 - total * ETHER_MIN_LEN); 1728 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1729 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1730 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1731 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1732 } else { 1733 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1734 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1735 /* 82598 only has a counter in the high register */ 1736 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1737 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1738 - total * ETHER_MIN_LEN); 1739 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1740 } 1741 1742 /* 1743 * Workaround: mprc hardware is incorrectly counting 1744 * broadcasts, so for now we subtract those. 1745 */ 1746 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1747 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1748 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1749 1750 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1751 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1752 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1753 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1754 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1755 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1756 1757 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1758 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1759 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1760 1761 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1762 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1763 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1764 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1765 1766 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1767 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1768 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1769 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1770 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1771 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1772 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1773 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1774 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1775 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1776 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1777 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1778 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1779 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1780 /* Only read FCOE on 82599 */ 1781 if (hw->mac.type != ixgbe_mac_82598EB) { 1782 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1783 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1784 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1785 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1786 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1787 } 1788 1789 /* 1790 * Fill out the OS statistics structure. Only RX errors are required 1791 * here because all TX counters are incremented in the TX path and 1792 * normal RX counters are prepared in ether_input(). 1793 */ 1794 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1795 if_statadd_ref(nsr, if_iqdrops, total_missed_rx); 1796 1797 /* 1798 * Aggregate following types of errors as RX errors: 1799 * - CRC error count, 1800 * - illegal byte error count, 1801 * - length error count, 1802 * - undersized packets count, 1803 * - fragmented packets count, 1804 * - oversized packets count, 1805 * - jabber count. 1806 */ 1807 if_statadd_ref(nsr, if_ierrors, 1808 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1809 1810 IF_STAT_PUTREF(ifp); 1811 } /* ixgbe_update_stats_counters */ 1812 1813 /************************************************************************ 1814 * ixgbe_add_hw_stats 1815 * 1816 * Add sysctl variables, one per statistic, to the system. 1817 ************************************************************************/ 1818 static void 1819 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1820 { 1821 device_t dev = sc->dev; 1822 const struct sysctlnode *rnode, *cnode; 1823 struct sysctllog **log = &sc->sysctllog; 1824 struct tx_ring *txr = sc->tx_rings; 1825 struct rx_ring *rxr = sc->rx_rings; 1826 struct ixgbe_hw *hw = &sc->hw; 1827 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1828 const char *xname = device_xname(dev); 1829 int i; 1830 1831 /* Driver Statistics */ 1832 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1833 NULL, xname, "Driver tx dma soft fail EFBIG"); 1834 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1835 NULL, xname, "m_defrag() failed"); 1836 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1837 NULL, xname, "Driver tx dma hard fail EFBIG"); 1838 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1839 NULL, xname, "Driver tx dma hard fail EINVAL"); 1840 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1841 NULL, xname, "Driver tx dma hard fail other"); 1842 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1843 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1844 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1845 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1846 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1847 NULL, xname, "Watchdog timeouts"); 1848 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1849 NULL, xname, "TSO errors"); 1850 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1851 NULL, xname, "Admin MSI-X IRQ Handled"); 1852 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1853 NULL, xname, "Link event"); 1854 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1855 NULL, xname, "SFP+ module event"); 1856 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1857 NULL, xname, "Multispeed event"); 1858 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1859 NULL, xname, "External PHY event"); 1860 1861 /* Max number of traffic class is 8 */ 1862 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1863 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1864 snprintf(sc->tcs[i].evnamebuf, 1865 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1866 if (i < __arraycount(stats->mpc)) { 1867 evcnt_attach_dynamic(&stats->mpc[i], 1868 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1869 "RX Missed Packet Count"); 1870 if (hw->mac.type == ixgbe_mac_82598EB) 1871 evcnt_attach_dynamic(&stats->rnbc[i], 1872 EVCNT_TYPE_MISC, NULL, 1873 sc->tcs[i].evnamebuf, 1874 "Receive No Buffers"); 1875 } 1876 if (i < __arraycount(stats->pxontxc)) { 1877 evcnt_attach_dynamic(&stats->pxontxc[i], 1878 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1879 "Priority XON Transmitted"); 1880 evcnt_attach_dynamic(&stats->pxofftxc[i], 1881 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1882 "Priority XOFF Transmitted"); 1883 if (hw->mac.type >= ixgbe_mac_82599EB) 1884 evcnt_attach_dynamic(&stats->pxon2offc[i], 1885 EVCNT_TYPE_MISC, NULL, 1886 sc->tcs[i].evnamebuf, 1887 "Priority XON to XOFF"); 1888 evcnt_attach_dynamic(&stats->pxonrxc[i], 1889 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1890 "Priority XON Received"); 1891 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1892 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1893 "Priority XOFF Received"); 1894 } 1895 } 1896 1897 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1898 #ifdef LRO 1899 struct lro_ctrl *lro = &rxr->lro; 1900 #endif 1901 1902 snprintf(sc->queues[i].evnamebuf, 1903 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1904 snprintf(sc->queues[i].namebuf, 1905 sizeof(sc->queues[i].namebuf), "q%d", i); 1906 1907 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1908 aprint_error_dev(dev, 1909 "could not create sysctl root\n"); 1910 break; 1911 } 1912 1913 if (sysctl_createv(log, 0, &rnode, &rnode, 1914 0, CTLTYPE_NODE, 1915 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1916 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1917 break; 1918 1919 if (sysctl_createv(log, 0, &rnode, &cnode, 1920 CTLFLAG_READWRITE, CTLTYPE_INT, 1921 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1922 ixgbe_sysctl_interrupt_rate_handler, 0, 1923 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1924 break; 1925 1926 if (sysctl_createv(log, 0, &rnode, &cnode, 1927 CTLFLAG_READONLY, CTLTYPE_INT, 1928 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1929 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1930 0, CTL_CREATE, CTL_EOL) != 0) 1931 break; 1932 1933 if (sysctl_createv(log, 0, &rnode, &cnode, 1934 CTLFLAG_READONLY, CTLTYPE_INT, 1935 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1936 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1937 0, CTL_CREATE, CTL_EOL) != 0) 1938 break; 1939 1940 if (sysctl_createv(log, 0, &rnode, &cnode, 1941 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1942 SYSCTL_DESCR("Receive Descriptor next to check"), 1943 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1944 CTL_CREATE, CTL_EOL) != 0) 1945 break; 1946 1947 if (sysctl_createv(log, 0, &rnode, &cnode, 1948 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1949 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1950 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1951 CTL_CREATE, CTL_EOL) != 0) 1952 break; 1953 1954 if (sysctl_createv(log, 0, &rnode, &cnode, 1955 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1956 SYSCTL_DESCR("Receive Descriptor Head"), 1957 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1958 CTL_CREATE, CTL_EOL) != 0) 1959 break; 1960 1961 if (sysctl_createv(log, 0, &rnode, &cnode, 1962 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1963 SYSCTL_DESCR("Receive Descriptor Tail"), 1964 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1965 CTL_CREATE, CTL_EOL) != 0) 1966 break; 1967 1968 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1969 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1970 evcnt_attach_dynamic(&sc->queues[i].handleq, 1971 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1972 "Handled queue in softint"); 1973 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1974 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1975 if (i < __arraycount(stats->qbtc)) 1976 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1977 NULL, sc->queues[i].evnamebuf, 1978 "Queue Bytes Transmitted (reg)"); 1979 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1980 NULL, sc->queues[i].evnamebuf, 1981 "Queue Packets Transmitted (soft)"); 1982 if (i < __arraycount(stats->qptc)) 1983 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1984 NULL, sc->queues[i].evnamebuf, 1985 "Queue Packets Transmitted (reg)"); 1986 #ifndef IXGBE_LEGACY_TX 1987 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1988 NULL, sc->queues[i].evnamebuf, 1989 "Packets dropped in pcq"); 1990 #endif 1991 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1992 NULL, sc->queues[i].evnamebuf, 1993 "TX Queue No Descriptor Available"); 1994 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 1995 NULL, sc->queues[i].evnamebuf, "TSO"); 1996 1997 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 1998 NULL, sc->queues[i].evnamebuf, 1999 "Queue Bytes Received (soft)"); 2000 if (i < __arraycount(stats->qbrc)) 2001 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 2002 NULL, sc->queues[i].evnamebuf, 2003 "Queue Bytes Received (reg)"); 2004 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 2005 NULL, sc->queues[i].evnamebuf, 2006 "Queue Packets Received (soft)"); 2007 if (i < __arraycount(stats->qprc)) 2008 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 2009 NULL, sc->queues[i].evnamebuf, 2010 "Queue Packets Received (reg)"); 2011 if ((i < __arraycount(stats->qprdc)) && 2012 (hw->mac.type >= ixgbe_mac_82599EB)) 2013 evcnt_attach_dynamic(&stats->qprdc[i], 2014 EVCNT_TYPE_MISC, NULL, 2015 sc->queues[i].evnamebuf, 2016 "Queue Packets Received Drop"); 2017 2018 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2019 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2020 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2021 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2022 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2023 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2024 #ifdef LRO 2025 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2026 CTLFLAG_RD, &lro->lro_queued, 0, 2027 "LRO Queued"); 2028 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2029 CTLFLAG_RD, &lro->lro_flushed, 0, 2030 "LRO Flushed"); 2031 #endif /* LRO */ 2032 } 2033 2034 /* MAC stats get their own sub node */ 2035 2036 snprintf(stats->namebuf, 2037 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2038 2039 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2040 stats->namebuf, "rx csum offload - IP"); 2041 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2042 stats->namebuf, "rx csum offload - L4"); 2043 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2044 stats->namebuf, "rx csum offload - IP bad"); 2045 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2046 stats->namebuf, "rx csum offload - L4 bad"); 2047 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2048 stats->namebuf, "Interrupt conditions zero"); 2049 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2050 stats->namebuf, "Legacy interrupts"); 2051 2052 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2053 stats->namebuf, "CRC Errors"); 2054 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2055 stats->namebuf, "Illegal Byte Errors"); 2056 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2057 stats->namebuf, "Byte Errors"); 2058 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2059 stats->namebuf, "MAC Short Packets Discarded"); 2060 if (hw->mac.type >= ixgbe_mac_X550) 2061 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2062 stats->namebuf, "Bad SFD"); 2063 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2064 stats->namebuf, "Total Packets Missed"); 2065 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2066 stats->namebuf, "MAC Local Faults"); 2067 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2068 stats->namebuf, "MAC Remote Faults"); 2069 if (hw->mac.type == ixgbe_mac_X550EM_a) 2070 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2071 NULL, stats->namebuf, "Link down event in the MAC"); 2072 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2073 stats->namebuf, "Receive Length Errors"); 2074 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2075 stats->namebuf, "Link XON Transmitted"); 2076 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2077 stats->namebuf, "Link XOFF Transmitted"); 2078 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2079 stats->namebuf, "Link XON Received"); 2080 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2081 stats->namebuf, "Link XOFF Received"); 2082 2083 /* Packet Reception Stats */ 2084 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2085 stats->namebuf, "Total Octets Received"); 2086 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2087 stats->namebuf, "Good Octets Received"); 2088 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2089 stats->namebuf, "Total Packets Received"); 2090 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2091 stats->namebuf, "Good Packets Received"); 2092 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2093 stats->namebuf, "Multicast Packets Received"); 2094 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2095 stats->namebuf, "Broadcast Packets Received"); 2096 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2097 stats->namebuf, "64 byte frames received "); 2098 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2099 stats->namebuf, "65-127 byte frames received"); 2100 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2101 stats->namebuf, "128-255 byte frames received"); 2102 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2103 stats->namebuf, "256-511 byte frames received"); 2104 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2105 stats->namebuf, "512-1023 byte frames received"); 2106 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2107 stats->namebuf, "1023-1522 byte frames received"); 2108 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2109 stats->namebuf, "Receive Undersized"); 2110 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2111 stats->namebuf, "Fragmented Packets Received "); 2112 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2113 stats->namebuf, "Oversized Packets Received"); 2114 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2115 stats->namebuf, "Received Jabber"); 2116 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2117 stats->namebuf, "Management Packets Received"); 2118 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2119 stats->namebuf, "Management Packets Dropped"); 2120 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2121 stats->namebuf, "Checksum Errors"); 2122 2123 /* Packet Transmission Stats */ 2124 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2125 stats->namebuf, "Good Octets Transmitted"); 2126 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2127 stats->namebuf, "Total Packets Transmitted"); 2128 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2129 stats->namebuf, "Good Packets Transmitted"); 2130 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2131 stats->namebuf, "Broadcast Packets Transmitted"); 2132 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2133 stats->namebuf, "Multicast Packets Transmitted"); 2134 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2135 stats->namebuf, "Management Packets Transmitted"); 2136 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2137 stats->namebuf, "64 byte frames transmitted "); 2138 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2139 stats->namebuf, "65-127 byte frames transmitted"); 2140 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2141 stats->namebuf, "128-255 byte frames transmitted"); 2142 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2143 stats->namebuf, "256-511 byte frames transmitted"); 2144 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2145 stats->namebuf, "512-1023 byte frames transmitted"); 2146 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2147 stats->namebuf, "1024-1522 byte frames transmitted"); 2148 } /* ixgbe_add_hw_stats */ 2149 2150 static void 2151 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2152 { 2153 struct tx_ring *txr = sc->tx_rings; 2154 struct rx_ring *rxr = sc->rx_rings; 2155 struct ixgbe_hw *hw = &sc->hw; 2156 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2157 int i; 2158 2159 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2160 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2161 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2162 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2163 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2164 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2165 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2166 IXGBE_EVC_STORE(&sc->tso_err, 0); 2167 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2168 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2169 IXGBE_EVC_STORE(&sc->link_workev, 0); 2170 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2171 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2172 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2173 2174 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2175 if (i < __arraycount(stats->mpc)) { 2176 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2177 if (hw->mac.type == ixgbe_mac_82598EB) 2178 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2179 } 2180 if (i < __arraycount(stats->pxontxc)) { 2181 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2182 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2183 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2184 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2185 if (hw->mac.type >= ixgbe_mac_82599EB) 2186 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2187 } 2188 } 2189 2190 txr = sc->tx_rings; 2191 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2192 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2193 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2194 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2195 IXGBE_EVC_STORE(&txr->total_packets, 0); 2196 #ifndef IXGBE_LEGACY_TX 2197 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2198 #endif 2199 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2200 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2201 txr->q_efbig_tx_dma_setup = 0; 2202 txr->q_mbuf_defrag_failed = 0; 2203 txr->q_efbig2_tx_dma_setup = 0; 2204 txr->q_einval_tx_dma_setup = 0; 2205 txr->q_other_tx_dma_setup = 0; 2206 txr->q_eagain_tx_dma_setup = 0; 2207 txr->q_enomem_tx_dma_setup = 0; 2208 txr->q_tso_err = 0; 2209 2210 if (i < __arraycount(stats->qprc)) { 2211 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2212 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2213 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2214 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2215 if (hw->mac.type >= ixgbe_mac_82599EB) 2216 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2217 } 2218 2219 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2220 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2221 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2222 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2223 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2224 } 2225 IXGBE_EVC_STORE(&stats->ipcs, 0); 2226 IXGBE_EVC_STORE(&stats->l4cs, 0); 2227 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2228 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2229 IXGBE_EVC_STORE(&stats->intzero, 0); 2230 IXGBE_EVC_STORE(&stats->legint, 0); 2231 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2232 IXGBE_EVC_STORE(&stats->illerrc, 0); 2233 IXGBE_EVC_STORE(&stats->errbc, 0); 2234 IXGBE_EVC_STORE(&stats->mspdc, 0); 2235 if (hw->mac.type >= ixgbe_mac_X550) 2236 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2237 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2238 IXGBE_EVC_STORE(&stats->mlfc, 0); 2239 IXGBE_EVC_STORE(&stats->mrfc, 0); 2240 if (hw->mac.type == ixgbe_mac_X550EM_a) 2241 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2242 IXGBE_EVC_STORE(&stats->rlec, 0); 2243 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2244 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2245 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2246 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2247 2248 /* Packet Reception Stats */ 2249 IXGBE_EVC_STORE(&stats->tor, 0); 2250 IXGBE_EVC_STORE(&stats->gorc, 0); 2251 IXGBE_EVC_STORE(&stats->tpr, 0); 2252 IXGBE_EVC_STORE(&stats->gprc, 0); 2253 IXGBE_EVC_STORE(&stats->mprc, 0); 2254 IXGBE_EVC_STORE(&stats->bprc, 0); 2255 IXGBE_EVC_STORE(&stats->prc64, 0); 2256 IXGBE_EVC_STORE(&stats->prc127, 0); 2257 IXGBE_EVC_STORE(&stats->prc255, 0); 2258 IXGBE_EVC_STORE(&stats->prc511, 0); 2259 IXGBE_EVC_STORE(&stats->prc1023, 0); 2260 IXGBE_EVC_STORE(&stats->prc1522, 0); 2261 IXGBE_EVC_STORE(&stats->ruc, 0); 2262 IXGBE_EVC_STORE(&stats->rfc, 0); 2263 IXGBE_EVC_STORE(&stats->roc, 0); 2264 IXGBE_EVC_STORE(&stats->rjc, 0); 2265 IXGBE_EVC_STORE(&stats->mngprc, 0); 2266 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2267 IXGBE_EVC_STORE(&stats->xec, 0); 2268 2269 /* Packet Transmission Stats */ 2270 IXGBE_EVC_STORE(&stats->gotc, 0); 2271 IXGBE_EVC_STORE(&stats->tpt, 0); 2272 IXGBE_EVC_STORE(&stats->gptc, 0); 2273 IXGBE_EVC_STORE(&stats->bptc, 0); 2274 IXGBE_EVC_STORE(&stats->mptc, 0); 2275 IXGBE_EVC_STORE(&stats->mngptc, 0); 2276 IXGBE_EVC_STORE(&stats->ptc64, 0); 2277 IXGBE_EVC_STORE(&stats->ptc127, 0); 2278 IXGBE_EVC_STORE(&stats->ptc255, 0); 2279 IXGBE_EVC_STORE(&stats->ptc511, 0); 2280 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2281 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2282 } 2283 2284 /************************************************************************ 2285 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2286 * 2287 * Retrieves the TDH value from the hardware 2288 ************************************************************************/ 2289 static int 2290 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2291 { 2292 struct sysctlnode node = *rnode; 2293 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2294 struct ixgbe_softc *sc; 2295 uint32_t val; 2296 2297 if (!txr) 2298 return (0); 2299 2300 sc = txr->sc; 2301 if (ixgbe_fw_recovery_mode_swflag(sc)) 2302 return (EPERM); 2303 2304 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2305 node.sysctl_data = &val; 2306 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2307 } /* ixgbe_sysctl_tdh_handler */ 2308 2309 /************************************************************************ 2310 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2311 * 2312 * Retrieves the TDT value from the hardware 2313 ************************************************************************/ 2314 static int 2315 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2316 { 2317 struct sysctlnode node = *rnode; 2318 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2319 struct ixgbe_softc *sc; 2320 uint32_t val; 2321 2322 if (!txr) 2323 return (0); 2324 2325 sc = txr->sc; 2326 if (ixgbe_fw_recovery_mode_swflag(sc)) 2327 return (EPERM); 2328 2329 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2330 node.sysctl_data = &val; 2331 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2332 } /* ixgbe_sysctl_tdt_handler */ 2333 2334 /************************************************************************ 2335 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2336 * handler function 2337 * 2338 * Retrieves the next_to_check value 2339 ************************************************************************/ 2340 static int 2341 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2342 { 2343 struct sysctlnode node = *rnode; 2344 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2345 struct ixgbe_softc *sc; 2346 uint32_t val; 2347 2348 if (!rxr) 2349 return (0); 2350 2351 sc = rxr->sc; 2352 if (ixgbe_fw_recovery_mode_swflag(sc)) 2353 return (EPERM); 2354 2355 val = rxr->next_to_check; 2356 node.sysctl_data = &val; 2357 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2358 } /* ixgbe_sysctl_next_to_check_handler */ 2359 2360 /************************************************************************ 2361 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2362 * handler function 2363 * 2364 * Retrieves the next_to_refresh value 2365 ************************************************************************/ 2366 static int 2367 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2368 { 2369 struct sysctlnode node = *rnode; 2370 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2371 struct ixgbe_softc *sc; 2372 uint32_t val; 2373 2374 if (!rxr) 2375 return (0); 2376 2377 sc = rxr->sc; 2378 if (ixgbe_fw_recovery_mode_swflag(sc)) 2379 return (EPERM); 2380 2381 val = rxr->next_to_refresh; 2382 node.sysctl_data = &val; 2383 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2384 } /* ixgbe_sysctl_next_to_refresh_handler */ 2385 2386 /************************************************************************ 2387 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2388 * 2389 * Retrieves the RDH value from the hardware 2390 ************************************************************************/ 2391 static int 2392 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2393 { 2394 struct sysctlnode node = *rnode; 2395 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2396 struct ixgbe_softc *sc; 2397 uint32_t val; 2398 2399 if (!rxr) 2400 return (0); 2401 2402 sc = rxr->sc; 2403 if (ixgbe_fw_recovery_mode_swflag(sc)) 2404 return (EPERM); 2405 2406 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2407 node.sysctl_data = &val; 2408 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2409 } /* ixgbe_sysctl_rdh_handler */ 2410 2411 /************************************************************************ 2412 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2413 * 2414 * Retrieves the RDT value from the hardware 2415 ************************************************************************/ 2416 static int 2417 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2418 { 2419 struct sysctlnode node = *rnode; 2420 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2421 struct ixgbe_softc *sc; 2422 uint32_t val; 2423 2424 if (!rxr) 2425 return (0); 2426 2427 sc = rxr->sc; 2428 if (ixgbe_fw_recovery_mode_swflag(sc)) 2429 return (EPERM); 2430 2431 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2432 node.sysctl_data = &val; 2433 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2434 } /* ixgbe_sysctl_rdt_handler */ 2435 2436 static int 2437 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2438 { 2439 struct ifnet *ifp = &ec->ec_if; 2440 struct ixgbe_softc *sc = ifp->if_softc; 2441 int rv; 2442 2443 if (set) 2444 rv = ixgbe_register_vlan(sc, vid); 2445 else 2446 rv = ixgbe_unregister_vlan(sc, vid); 2447 2448 if (rv != 0) 2449 return rv; 2450 2451 /* 2452 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2453 * or 0 to 1. 2454 */ 2455 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2456 ixgbe_setup_vlan_hw_tagging(sc); 2457 2458 return rv; 2459 } 2460 2461 /************************************************************************ 2462 * ixgbe_register_vlan 2463 * 2464 * Run via vlan config EVENT, it enables us to use the 2465 * HW Filter table since we can get the vlan id. This 2466 * just creates the entry in the soft version of the 2467 * VFTA, init will repopulate the real table. 2468 ************************************************************************/ 2469 static int 2470 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2471 { 2472 u16 index, bit; 2473 int error; 2474 2475 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2476 return EINVAL; 2477 2478 IXGBE_CORE_LOCK(sc); 2479 index = (vtag >> 5) & 0x7F; 2480 bit = vtag & 0x1F; 2481 sc->shadow_vfta[index] |= ((u32)1 << bit); 2482 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2483 true); 2484 IXGBE_CORE_UNLOCK(sc); 2485 if (error != 0) 2486 error = EACCES; 2487 2488 return error; 2489 } /* ixgbe_register_vlan */ 2490 2491 /************************************************************************ 2492 * ixgbe_unregister_vlan 2493 * 2494 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2495 ************************************************************************/ 2496 static int 2497 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2498 { 2499 u16 index, bit; 2500 int error; 2501 2502 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2503 return EINVAL; 2504 2505 IXGBE_CORE_LOCK(sc); 2506 index = (vtag >> 5) & 0x7F; 2507 bit = vtag & 0x1F; 2508 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2509 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2510 true); 2511 IXGBE_CORE_UNLOCK(sc); 2512 if (error != 0) 2513 error = EACCES; 2514 2515 return error; 2516 } /* ixgbe_unregister_vlan */ 2517 2518 static void 2519 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2520 { 2521 struct ethercom *ec = &sc->osdep.ec; 2522 struct ixgbe_hw *hw = &sc->hw; 2523 struct rx_ring *rxr; 2524 u32 ctrl; 2525 int i; 2526 bool hwtagging; 2527 2528 /* Enable HW tagging only if any vlan is attached */ 2529 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2530 && VLAN_ATTACHED(ec); 2531 2532 /* Setup the queues for vlans */ 2533 for (i = 0; i < sc->num_queues; i++) { 2534 rxr = &sc->rx_rings[i]; 2535 /* 2536 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2537 */ 2538 if (hw->mac.type != ixgbe_mac_82598EB) { 2539 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2540 if (hwtagging) 2541 ctrl |= IXGBE_RXDCTL_VME; 2542 else 2543 ctrl &= ~IXGBE_RXDCTL_VME; 2544 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2545 } 2546 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2547 } 2548 2549 /* VLAN hw tagging for 82598 */ 2550 if (hw->mac.type == ixgbe_mac_82598EB) { 2551 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2552 if (hwtagging) 2553 ctrl |= IXGBE_VLNCTRL_VME; 2554 else 2555 ctrl &= ~IXGBE_VLNCTRL_VME; 2556 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2557 } 2558 } /* ixgbe_setup_vlan_hw_tagging */ 2559 2560 static void 2561 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2562 { 2563 struct ethercom *ec = &sc->osdep.ec; 2564 struct ixgbe_hw *hw = &sc->hw; 2565 int i; 2566 u32 ctrl; 2567 struct vlanid_list *vlanidp; 2568 2569 /* 2570 * This function is called from both if_init and ifflags_cb() 2571 * on NetBSD. 2572 */ 2573 2574 /* 2575 * Part 1: 2576 * Setup VLAN HW tagging 2577 */ 2578 ixgbe_setup_vlan_hw_tagging(sc); 2579 2580 /* 2581 * Part 2: 2582 * Setup VLAN HW filter 2583 */ 2584 /* Cleanup shadow_vfta */ 2585 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2586 sc->shadow_vfta[i] = 0; 2587 /* Generate shadow_vfta from ec_vids */ 2588 ETHER_LOCK(ec); 2589 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2590 uint32_t idx; 2591 2592 idx = vlanidp->vid / 32; 2593 KASSERT(idx < IXGBE_VFTA_SIZE); 2594 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2595 } 2596 ETHER_UNLOCK(ec); 2597 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2598 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2599 2600 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2601 /* Enable the Filter Table if enabled */ 2602 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2603 ctrl |= IXGBE_VLNCTRL_VFE; 2604 else 2605 ctrl &= ~IXGBE_VLNCTRL_VFE; 2606 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2607 } /* ixgbe_setup_vlan_hw_support */ 2608 2609 /************************************************************************ 2610 * ixgbe_get_slot_info 2611 * 2612 * Get the width and transaction speed of 2613 * the slot this adapter is plugged into. 2614 ************************************************************************/ 2615 static void 2616 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2617 { 2618 device_t dev = sc->dev; 2619 struct ixgbe_hw *hw = &sc->hw; 2620 u32 offset; 2621 u16 link; 2622 int bus_info_valid = TRUE; 2623 2624 /* Some devices are behind an internal bridge */ 2625 switch (hw->device_id) { 2626 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2627 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2628 goto get_parent_info; 2629 default: 2630 break; 2631 } 2632 2633 ixgbe_get_bus_info(hw); 2634 2635 /* 2636 * Some devices don't use PCI-E, but there is no need 2637 * to display "Unknown" for bus speed and width. 2638 */ 2639 switch (hw->mac.type) { 2640 case ixgbe_mac_X550EM_x: 2641 case ixgbe_mac_X550EM_a: 2642 return; 2643 default: 2644 goto display; 2645 } 2646 2647 get_parent_info: 2648 /* 2649 * For the Quad port adapter we need to parse back 2650 * up the PCI tree to find the speed of the expansion 2651 * slot into which this adapter is plugged. A bit more work. 2652 */ 2653 dev = device_parent(device_parent(dev)); 2654 #if 0 2655 #ifdef IXGBE_DEBUG 2656 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2657 pci_get_slot(dev), pci_get_function(dev)); 2658 #endif 2659 dev = device_parent(device_parent(dev)); 2660 #ifdef IXGBE_DEBUG 2661 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2662 pci_get_slot(dev), pci_get_function(dev)); 2663 #endif 2664 #endif 2665 /* Now get the PCI Express Capabilities offset */ 2666 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2667 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2668 /* 2669 * Hmm...can't get PCI-Express capabilities. 2670 * Falling back to default method. 2671 */ 2672 bus_info_valid = FALSE; 2673 ixgbe_get_bus_info(hw); 2674 goto display; 2675 } 2676 /* ...and read the Link Status Register */ 2677 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2678 offset + PCIE_LCSR) >> 16; 2679 ixgbe_set_pci_config_data_generic(hw, link); 2680 2681 display: 2682 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2683 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2684 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2685 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2686 "Unknown"), 2687 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2688 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2689 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2690 "Unknown")); 2691 2692 if (bus_info_valid) { 2693 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2694 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2695 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2696 device_printf(dev, "PCI-Express bandwidth available" 2697 " for this card\n is not sufficient for" 2698 " optimal performance.\n"); 2699 device_printf(dev, "For optimal performance a x8 " 2700 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2701 } 2702 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2703 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2704 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2705 device_printf(dev, "PCI-Express bandwidth available" 2706 " for this card\n is not sufficient for" 2707 " optimal performance.\n"); 2708 device_printf(dev, "For optimal performance a x8 " 2709 "PCIE Gen3 slot is required.\n"); 2710 } 2711 } else 2712 device_printf(dev, 2713 "Unable to determine slot speed/width. The speed/width " 2714 "reported are that of the internal switch.\n"); 2715 2716 return; 2717 } /* ixgbe_get_slot_info */ 2718 2719 /************************************************************************ 2720 * ixgbe_enable_queue - Queue Interrupt Enabler 2721 ************************************************************************/ 2722 static inline void 2723 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2724 { 2725 struct ixgbe_hw *hw = &sc->hw; 2726 struct ix_queue *que = &sc->queues[vector]; 2727 u64 queue = 1ULL << vector; 2728 u32 mask; 2729 2730 mutex_enter(&que->dc_mtx); 2731 if (que->disabled_count > 0 && --que->disabled_count > 0) 2732 goto out; 2733 2734 if (hw->mac.type == ixgbe_mac_82598EB) { 2735 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2736 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2737 } else { 2738 mask = (queue & 0xFFFFFFFF); 2739 if (mask) 2740 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2741 mask = (queue >> 32); 2742 if (mask) 2743 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2744 } 2745 out: 2746 mutex_exit(&que->dc_mtx); 2747 } /* ixgbe_enable_queue */ 2748 2749 /************************************************************************ 2750 * ixgbe_disable_queue_internal 2751 ************************************************************************/ 2752 static inline void 2753 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2754 { 2755 struct ixgbe_hw *hw = &sc->hw; 2756 struct ix_queue *que = &sc->queues[vector]; 2757 u64 queue = 1ULL << vector; 2758 u32 mask; 2759 2760 mutex_enter(&que->dc_mtx); 2761 2762 if (que->disabled_count > 0) { 2763 if (nestok) 2764 que->disabled_count++; 2765 goto out; 2766 } 2767 que->disabled_count++; 2768 2769 if (hw->mac.type == ixgbe_mac_82598EB) { 2770 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2771 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2772 } else { 2773 mask = (queue & 0xFFFFFFFF); 2774 if (mask) 2775 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2776 mask = (queue >> 32); 2777 if (mask) 2778 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2779 } 2780 out: 2781 mutex_exit(&que->dc_mtx); 2782 } /* ixgbe_disable_queue_internal */ 2783 2784 /************************************************************************ 2785 * ixgbe_disable_queue 2786 ************************************************************************/ 2787 static inline void 2788 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2789 { 2790 2791 ixgbe_disable_queue_internal(sc, vector, true); 2792 } /* ixgbe_disable_queue */ 2793 2794 /************************************************************************ 2795 * ixgbe_sched_handle_que - schedule deferred packet processing 2796 ************************************************************************/ 2797 static inline void 2798 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2799 { 2800 2801 if (que->txrx_use_workqueue) { 2802 /* 2803 * sc->que_wq is bound to each CPU instead of 2804 * each NIC queue to reduce workqueue kthread. As we 2805 * should consider about interrupt affinity in this 2806 * function, the workqueue kthread must be WQ_PERCPU. 2807 * If create WQ_PERCPU workqueue kthread for each NIC 2808 * queue, that number of created workqueue kthread is 2809 * (number of used NIC queue) * (number of CPUs) = 2810 * (number of CPUs) ^ 2 most often. 2811 * 2812 * The same NIC queue's interrupts are avoided by 2813 * masking the queue's interrupt. And different 2814 * NIC queue's interrupts use different struct work 2815 * (que->wq_cookie). So, "enqueued flag" to avoid 2816 * twice workqueue_enqueue() is not required . 2817 */ 2818 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2819 } else 2820 softint_schedule(que->que_si); 2821 } 2822 2823 /************************************************************************ 2824 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2825 ************************************************************************/ 2826 static int 2827 ixgbe_msix_que(void *arg) 2828 { 2829 struct ix_queue *que = arg; 2830 struct ixgbe_softc *sc = que->sc; 2831 struct ifnet *ifp = sc->ifp; 2832 struct tx_ring *txr = que->txr; 2833 struct rx_ring *rxr = que->rxr; 2834 u32 newitr = 0; 2835 2836 /* Protect against spurious interrupts */ 2837 if ((ifp->if_flags & IFF_RUNNING) == 0) 2838 return 0; 2839 2840 ixgbe_disable_queue(sc, que->msix); 2841 IXGBE_EVC_ADD(&que->irqs, 1); 2842 2843 /* 2844 * Don't change "que->txrx_use_workqueue" from this point to avoid 2845 * flip-flopping softint/workqueue mode in one deferred processing. 2846 */ 2847 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2848 2849 IXGBE_TX_LOCK(txr); 2850 ixgbe_txeof(txr); 2851 IXGBE_TX_UNLOCK(txr); 2852 2853 /* Do AIM now? */ 2854 2855 if (sc->enable_aim == false) 2856 goto no_calc; 2857 /* 2858 * Do Adaptive Interrupt Moderation: 2859 * - Write out last calculated setting 2860 * - Calculate based on average size over 2861 * the last interval. 2862 */ 2863 if (que->eitr_setting) 2864 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2865 2866 que->eitr_setting = 0; 2867 2868 /* Idle, do nothing */ 2869 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2870 goto no_calc; 2871 2872 if ((txr->bytes) && (txr->packets)) 2873 newitr = txr->bytes/txr->packets; 2874 if ((rxr->bytes) && (rxr->packets)) 2875 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2876 newitr += 24; /* account for hardware frame, crc */ 2877 2878 /* set an upper boundary */ 2879 newitr = uimin(newitr, 3000); 2880 2881 /* Be nice to the mid range */ 2882 if ((newitr > 300) && (newitr < 1200)) 2883 newitr = (newitr / 3); 2884 else 2885 newitr = (newitr / 2); 2886 2887 /* 2888 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2889 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2890 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2891 * on 1G and higher. 2892 */ 2893 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2894 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2895 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2896 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2897 2898 /* save for next interrupt */ 2899 que->eitr_setting = newitr; 2900 2901 /* Reset state */ 2902 txr->bytes = 0; 2903 txr->packets = 0; 2904 rxr->bytes = 0; 2905 rxr->packets = 0; 2906 2907 no_calc: 2908 ixgbe_sched_handle_que(sc, que); 2909 2910 return 1; 2911 } /* ixgbe_msix_que */ 2912 2913 /************************************************************************ 2914 * ixgbe_media_status - Media Ioctl callback 2915 * 2916 * Called whenever the user queries the status of 2917 * the interface using ifconfig. 2918 ************************************************************************/ 2919 static void 2920 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2921 { 2922 struct ixgbe_softc *sc = ifp->if_softc; 2923 struct ixgbe_hw *hw = &sc->hw; 2924 int layer; 2925 2926 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2927 ixgbe_update_link_status(sc); 2928 2929 ifmr->ifm_status = IFM_AVALID; 2930 ifmr->ifm_active = IFM_ETHER; 2931 2932 if (sc->link_active != LINK_STATE_UP) { 2933 ifmr->ifm_active |= IFM_NONE; 2934 return; 2935 } 2936 2937 ifmr->ifm_status |= IFM_ACTIVE; 2938 layer = sc->phy_layer; 2939 2940 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2941 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2942 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2943 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2944 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2945 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2946 switch (sc->link_speed) { 2947 case IXGBE_LINK_SPEED_10GB_FULL: 2948 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2949 break; 2950 case IXGBE_LINK_SPEED_5GB_FULL: 2951 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2952 break; 2953 case IXGBE_LINK_SPEED_2_5GB_FULL: 2954 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2955 break; 2956 case IXGBE_LINK_SPEED_1GB_FULL: 2957 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2958 break; 2959 case IXGBE_LINK_SPEED_100_FULL: 2960 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2961 break; 2962 case IXGBE_LINK_SPEED_10_FULL: 2963 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2964 break; 2965 } 2966 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2967 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2968 switch (sc->link_speed) { 2969 case IXGBE_LINK_SPEED_10GB_FULL: 2970 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2971 break; 2972 } 2973 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2974 switch (sc->link_speed) { 2975 case IXGBE_LINK_SPEED_10GB_FULL: 2976 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2977 break; 2978 case IXGBE_LINK_SPEED_1GB_FULL: 2979 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2980 break; 2981 } 2982 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2983 switch (sc->link_speed) { 2984 case IXGBE_LINK_SPEED_10GB_FULL: 2985 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2986 break; 2987 case IXGBE_LINK_SPEED_1GB_FULL: 2988 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2989 break; 2990 } 2991 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2992 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2993 switch (sc->link_speed) { 2994 case IXGBE_LINK_SPEED_10GB_FULL: 2995 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2996 break; 2997 case IXGBE_LINK_SPEED_1GB_FULL: 2998 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 2999 break; 3000 } 3001 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 3002 switch (sc->link_speed) { 3003 case IXGBE_LINK_SPEED_10GB_FULL: 3004 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3005 break; 3006 } 3007 /* 3008 * XXX: These need to use the proper media types once 3009 * they're added. 3010 */ 3011 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3012 switch (sc->link_speed) { 3013 case IXGBE_LINK_SPEED_10GB_FULL: 3014 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3015 break; 3016 case IXGBE_LINK_SPEED_2_5GB_FULL: 3017 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3018 break; 3019 case IXGBE_LINK_SPEED_1GB_FULL: 3020 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3021 break; 3022 } 3023 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3024 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3025 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3026 switch (sc->link_speed) { 3027 case IXGBE_LINK_SPEED_10GB_FULL: 3028 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3029 break; 3030 case IXGBE_LINK_SPEED_2_5GB_FULL: 3031 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3032 break; 3033 case IXGBE_LINK_SPEED_1GB_FULL: 3034 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3035 break; 3036 } 3037 3038 /* If nothing is recognized... */ 3039 #if 0 3040 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3041 ifmr->ifm_active |= IFM_UNKNOWN; 3042 #endif 3043 3044 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3045 3046 /* Display current flow control setting used on link */ 3047 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3048 hw->fc.current_mode == ixgbe_fc_full) 3049 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3050 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3051 hw->fc.current_mode == ixgbe_fc_full) 3052 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3053 3054 return; 3055 } /* ixgbe_media_status */ 3056 3057 /************************************************************************ 3058 * ixgbe_media_change - Media Ioctl callback 3059 * 3060 * Called when the user changes speed/duplex using 3061 * media/mediopt option with ifconfig. 3062 ************************************************************************/ 3063 static int 3064 ixgbe_media_change(struct ifnet *ifp) 3065 { 3066 struct ixgbe_softc *sc = ifp->if_softc; 3067 struct ifmedia *ifm = &sc->media; 3068 struct ixgbe_hw *hw = &sc->hw; 3069 ixgbe_link_speed speed = 0; 3070 ixgbe_link_speed link_caps = 0; 3071 bool negotiate = false; 3072 s32 err = IXGBE_NOT_IMPLEMENTED; 3073 3074 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3075 3076 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3077 return (EINVAL); 3078 3079 if (hw->phy.media_type == ixgbe_media_type_backplane) 3080 return (EPERM); 3081 3082 /* 3083 * We don't actually need to check against the supported 3084 * media types of the adapter; ifmedia will take care of 3085 * that for us. 3086 */ 3087 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3088 case IFM_AUTO: 3089 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3090 &negotiate); 3091 if (err != IXGBE_SUCCESS) { 3092 device_printf(sc->dev, "Unable to determine " 3093 "supported advertise speeds\n"); 3094 return (ENODEV); 3095 } 3096 speed |= link_caps; 3097 break; 3098 case IFM_10G_T: 3099 case IFM_10G_LRM: 3100 case IFM_10G_LR: 3101 case IFM_10G_TWINAX: 3102 case IFM_10G_SR: 3103 case IFM_10G_CX4: 3104 case IFM_10G_KR: 3105 case IFM_10G_KX4: 3106 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3107 break; 3108 case IFM_5000_T: 3109 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3110 break; 3111 case IFM_2500_T: 3112 case IFM_2500_KX: 3113 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3114 break; 3115 case IFM_1000_T: 3116 case IFM_1000_LX: 3117 case IFM_1000_SX: 3118 case IFM_1000_KX: 3119 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3120 break; 3121 case IFM_100_TX: 3122 speed |= IXGBE_LINK_SPEED_100_FULL; 3123 break; 3124 case IFM_10_T: 3125 speed |= IXGBE_LINK_SPEED_10_FULL; 3126 break; 3127 case IFM_NONE: 3128 break; 3129 default: 3130 goto invalid; 3131 } 3132 3133 hw->mac.autotry_restart = TRUE; 3134 hw->mac.ops.setup_link(hw, speed, TRUE); 3135 sc->advertise = 0; 3136 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3137 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3138 sc->advertise |= 1 << 2; 3139 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3140 sc->advertise |= 1 << 1; 3141 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3142 sc->advertise |= 1 << 0; 3143 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3144 sc->advertise |= 1 << 3; 3145 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3146 sc->advertise |= 1 << 4; 3147 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3148 sc->advertise |= 1 << 5; 3149 } 3150 3151 return (0); 3152 3153 invalid: 3154 device_printf(sc->dev, "Invalid media type!\n"); 3155 3156 return (EINVAL); 3157 } /* ixgbe_media_change */ 3158 3159 /************************************************************************ 3160 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3161 ************************************************************************/ 3162 static int 3163 ixgbe_msix_admin(void *arg) 3164 { 3165 struct ixgbe_softc *sc = arg; 3166 struct ixgbe_hw *hw = &sc->hw; 3167 u32 eicr; 3168 u32 eims_orig; 3169 u32 eims_disable = 0; 3170 3171 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3172 3173 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3174 /* Pause other interrupts */ 3175 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3176 3177 /* 3178 * First get the cause. 3179 * 3180 * The specifications of 82598, 82599, X540 and X550 say EICS register 3181 * is write only. However, Linux says it is a workaround for silicon 3182 * errata to read EICS instead of EICR to get interrupt cause. 3183 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3184 */ 3185 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3186 /* Be sure the queue bits are not cleared */ 3187 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3188 /* Clear all OTHER interrupts with write */ 3189 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3190 3191 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3192 3193 /* Re-enable some OTHER interrupts */ 3194 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3195 3196 return 1; 3197 } /* ixgbe_msix_admin */ 3198 3199 static void 3200 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3201 { 3202 struct ixgbe_hw *hw = &sc->hw; 3203 u32 task_requests = 0; 3204 s32 retval; 3205 3206 /* Link status change */ 3207 if (eicr & IXGBE_EICR_LSC) { 3208 task_requests |= IXGBE_REQUEST_TASK_LSC; 3209 *eims_disable |= IXGBE_EIMS_LSC; 3210 } 3211 3212 if (ixgbe_is_sfp(hw)) { 3213 u32 eicr_mask; 3214 3215 /* Pluggable optics-related interrupt */ 3216 if (hw->mac.type >= ixgbe_mac_X540) 3217 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3218 else 3219 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3220 3221 /* 3222 * An interrupt might not arrive when a module is inserted. 3223 * When an link status change interrupt occurred and the driver 3224 * still regard SFP as unplugged, issue the module softint 3225 * and then issue LSC interrupt. 3226 */ 3227 if ((eicr & eicr_mask) 3228 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3229 && (eicr & IXGBE_EICR_LSC))) { 3230 task_requests |= IXGBE_REQUEST_TASK_MOD; 3231 *eims_disable |= IXGBE_EIMS_LSC; 3232 } 3233 3234 if ((hw->mac.type == ixgbe_mac_82599EB) && 3235 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3236 task_requests |= IXGBE_REQUEST_TASK_MSF; 3237 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3238 } 3239 } 3240 3241 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3242 #ifdef IXGBE_FDIR 3243 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3244 (eicr & IXGBE_EICR_FLOW_DIR)) { 3245 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3246 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3247 /* Disable the interrupt */ 3248 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3249 } 3250 } 3251 #endif 3252 3253 if (eicr & IXGBE_EICR_ECC) { 3254 if (ratecheck(&sc->lasterr_time, 3255 &ixgbe_errlog_intrvl)) 3256 device_printf(sc->dev, 3257 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3258 } 3259 3260 /* Check for over temp condition */ 3261 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3262 switch (sc->hw.mac.type) { 3263 case ixgbe_mac_X550EM_a: 3264 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3265 break; 3266 retval = hw->phy.ops.check_overtemp(hw); 3267 if (retval != IXGBE_ERR_OVERTEMP) 3268 break; 3269 if (ratecheck(&sc->lasterr_time, 3270 &ixgbe_errlog_intrvl)) { 3271 device_printf(sc->dev, 3272 "CRITICAL: OVER TEMP!! " 3273 "PHY IS SHUT DOWN!!\n"); 3274 device_printf(sc->dev, 3275 "System shutdown required!\n"); 3276 } 3277 break; 3278 default: 3279 if (!(eicr & IXGBE_EICR_TS)) 3280 break; 3281 retval = hw->phy.ops.check_overtemp(hw); 3282 if (retval != IXGBE_ERR_OVERTEMP) 3283 break; 3284 if (ratecheck(&sc->lasterr_time, 3285 &ixgbe_errlog_intrvl)) { 3286 device_printf(sc->dev, 3287 "CRITICAL: OVER TEMP!! " 3288 "PHY IS SHUT DOWN!!\n"); 3289 device_printf(sc->dev, 3290 "System shutdown required!\n"); 3291 } 3292 break; 3293 } 3294 } 3295 3296 /* Check for VF message */ 3297 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3298 (eicr & IXGBE_EICR_MAILBOX)) { 3299 task_requests |= IXGBE_REQUEST_TASK_MBX; 3300 *eims_disable |= IXGBE_EIMS_MAILBOX; 3301 } 3302 } 3303 3304 /* Check for fan failure */ 3305 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3306 ixgbe_check_fan_failure(sc, eicr, true); 3307 3308 /* External PHY interrupt */ 3309 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3310 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3311 task_requests |= IXGBE_REQUEST_TASK_PHY; 3312 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3313 } 3314 3315 if (task_requests != 0) { 3316 mutex_enter(&sc->admin_mtx); 3317 sc->task_requests |= task_requests; 3318 ixgbe_schedule_admin_tasklet(sc); 3319 mutex_exit(&sc->admin_mtx); 3320 } 3321 } 3322 3323 static void 3324 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3325 { 3326 3327 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3328 itr |= itr << 16; 3329 else 3330 itr |= IXGBE_EITR_CNT_WDIS; 3331 3332 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3333 } 3334 3335 3336 /************************************************************************ 3337 * ixgbe_sysctl_interrupt_rate_handler 3338 ************************************************************************/ 3339 static int 3340 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3341 { 3342 struct sysctlnode node = *rnode; 3343 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3344 struct ixgbe_softc *sc; 3345 uint32_t reg, usec, rate; 3346 int error; 3347 3348 if (que == NULL) 3349 return 0; 3350 3351 sc = que->sc; 3352 if (ixgbe_fw_recovery_mode_swflag(sc)) 3353 return (EPERM); 3354 3355 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3356 usec = ((reg & 0x0FF8) >> 3); 3357 if (usec > 0) 3358 rate = 500000 / usec; 3359 else 3360 rate = 0; 3361 node.sysctl_data = &rate; 3362 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3363 if (error || newp == NULL) 3364 return error; 3365 reg &= ~0xfff; /* default, no limitation */ 3366 if (rate > 0 && rate < 500000) { 3367 if (rate < 1000) 3368 rate = 1000; 3369 reg |= ((4000000 / rate) & 0xff8); 3370 /* 3371 * When RSC is used, ITR interval must be larger than 3372 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3373 * The minimum value is always greater than 2us on 100M 3374 * (and 10M?(not documented)), but it's not on 1G and higher. 3375 */ 3376 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3377 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3378 if ((sc->num_queues > 1) 3379 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3380 return EINVAL; 3381 } 3382 sc->max_interrupt_rate = rate; 3383 } else 3384 sc->max_interrupt_rate = 0; 3385 ixgbe_eitr_write(sc, que->msix, reg); 3386 3387 return (0); 3388 } /* ixgbe_sysctl_interrupt_rate_handler */ 3389 3390 const struct sysctlnode * 3391 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3392 { 3393 const char *dvname; 3394 struct sysctllog **log; 3395 int rc; 3396 const struct sysctlnode *rnode; 3397 3398 if (sc->sysctltop != NULL) 3399 return sc->sysctltop; 3400 3401 log = &sc->sysctllog; 3402 dvname = device_xname(sc->dev); 3403 3404 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3405 0, CTLTYPE_NODE, dvname, 3406 SYSCTL_DESCR("ixgbe information and settings"), 3407 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3408 goto err; 3409 3410 return rnode; 3411 err: 3412 device_printf(sc->dev, 3413 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3414 return NULL; 3415 } 3416 3417 /************************************************************************ 3418 * ixgbe_add_device_sysctls 3419 ************************************************************************/ 3420 static void 3421 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3422 { 3423 device_t dev = sc->dev; 3424 struct ixgbe_hw *hw = &sc->hw; 3425 struct sysctllog **log; 3426 const struct sysctlnode *rnode, *cnode; 3427 3428 log = &sc->sysctllog; 3429 3430 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3431 aprint_error_dev(dev, "could not create sysctl root\n"); 3432 return; 3433 } 3434 3435 if (sysctl_createv(log, 0, &rnode, &cnode, 3436 CTLFLAG_READWRITE, CTLTYPE_INT, 3437 "debug", SYSCTL_DESCR("Debug Info"), 3438 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3439 != 0) 3440 aprint_error_dev(dev, "could not create sysctl\n"); 3441 3442 if (sysctl_createv(log, 0, &rnode, &cnode, 3443 CTLFLAG_READWRITE, CTLTYPE_INT, 3444 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3445 ixgbe_sysctl_rx_copy_len, 0, 3446 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3447 aprint_error_dev(dev, "could not create sysctl\n"); 3448 3449 if (sysctl_createv(log, 0, &rnode, &cnode, 3450 CTLFLAG_READONLY, CTLTYPE_INT, 3451 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3452 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3453 aprint_error_dev(dev, "could not create sysctl\n"); 3454 3455 if (sysctl_createv(log, 0, &rnode, &cnode, 3456 CTLFLAG_READONLY, CTLTYPE_INT, 3457 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3458 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3459 aprint_error_dev(dev, "could not create sysctl\n"); 3460 3461 if (sysctl_createv(log, 0, &rnode, &cnode, 3462 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3463 SYSCTL_DESCR("max number of RX packets to process"), 3464 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3465 CTL_EOL) != 0) 3466 aprint_error_dev(dev, "could not create sysctl\n"); 3467 3468 if (sysctl_createv(log, 0, &rnode, &cnode, 3469 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3470 SYSCTL_DESCR("max number of TX packets to process"), 3471 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3472 CTL_EOL) != 0) 3473 aprint_error_dev(dev, "could not create sysctl\n"); 3474 3475 if (sysctl_createv(log, 0, &rnode, &cnode, 3476 CTLFLAG_READONLY, CTLTYPE_INT, 3477 "num_queues", SYSCTL_DESCR("Number of queues"), 3478 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3479 aprint_error_dev(dev, "could not create sysctl\n"); 3480 3481 /* Sysctls for all devices */ 3482 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3483 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3484 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3485 CTL_EOL) != 0) 3486 aprint_error_dev(dev, "could not create sysctl\n"); 3487 3488 sc->enable_aim = ixgbe_enable_aim; 3489 sc->max_interrupt_rate = ixgbe_max_interrupt_rate; 3490 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3491 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3492 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3493 aprint_error_dev(dev, "could not create sysctl\n"); 3494 3495 if (sysctl_createv(log, 0, &rnode, &cnode, 3496 CTLFLAG_READWRITE, CTLTYPE_INT, 3497 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3498 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3499 CTL_EOL) != 0) 3500 aprint_error_dev(dev, "could not create sysctl\n"); 3501 3502 /* 3503 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3504 * it causesflip-flopping softint/workqueue mode in one deferred 3505 * processing. Therefore, preempt_disable()/preempt_enable() are 3506 * required in ixgbe_sched_handle_que() to avoid 3507 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3508 * I think changing "que->txrx_use_workqueue" in interrupt handler 3509 * is lighter than doing preempt_disable()/preempt_enable() in every 3510 * ixgbe_sched_handle_que(). 3511 */ 3512 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3513 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3514 CTLTYPE_BOOL, "txrx_workqueue", 3515 SYSCTL_DESCR("Use workqueue for packet processing"), 3516 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3517 CTL_EOL) != 0) 3518 aprint_error_dev(dev, "could not create sysctl\n"); 3519 3520 #ifdef IXGBE_DEBUG 3521 /* testing sysctls (for all devices) */ 3522 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3523 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3524 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3525 CTL_EOL) != 0) 3526 aprint_error_dev(dev, "could not create sysctl\n"); 3527 3528 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3529 CTLTYPE_STRING, "print_rss_config", 3530 SYSCTL_DESCR("Prints RSS Configuration"), 3531 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3532 CTL_EOL) != 0) 3533 aprint_error_dev(dev, "could not create sysctl\n"); 3534 #endif 3535 /* for X550 series devices */ 3536 if (hw->mac.type >= ixgbe_mac_X550) 3537 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3538 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3539 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3540 CTL_EOL) != 0) 3541 aprint_error_dev(dev, "could not create sysctl\n"); 3542 3543 /* for WoL-capable devices */ 3544 if (sc->wol_support) { 3545 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3546 CTLTYPE_BOOL, "wol_enable", 3547 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3548 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3549 CTL_EOL) != 0) 3550 aprint_error_dev(dev, "could not create sysctl\n"); 3551 3552 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3553 CTLTYPE_INT, "wufc", 3554 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3555 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3556 CTL_EOL) != 0) 3557 aprint_error_dev(dev, "could not create sysctl\n"); 3558 } 3559 3560 /* for X552/X557-AT devices */ 3561 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3562 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3563 const struct sysctlnode *phy_node; 3564 3565 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3566 "phy", SYSCTL_DESCR("External PHY sysctls"), 3567 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3568 aprint_error_dev(dev, "could not create sysctl\n"); 3569 return; 3570 } 3571 3572 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3573 CTLTYPE_INT, "temp", 3574 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3575 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3576 CTL_EOL) != 0) 3577 aprint_error_dev(dev, "could not create sysctl\n"); 3578 3579 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3580 CTLTYPE_INT, "overtemp_occurred", 3581 SYSCTL_DESCR( 3582 "External PHY High Temperature Event Occurred"), 3583 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3584 CTL_CREATE, CTL_EOL) != 0) 3585 aprint_error_dev(dev, "could not create sysctl\n"); 3586 } 3587 3588 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3589 && (hw->phy.type == ixgbe_phy_fw)) 3590 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3591 CTLTYPE_BOOL, "force_10_100_autonego", 3592 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3593 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3594 CTL_CREATE, CTL_EOL) != 0) 3595 aprint_error_dev(dev, "could not create sysctl\n"); 3596 3597 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3598 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3599 CTLTYPE_INT, "eee_state", 3600 SYSCTL_DESCR("EEE Power Save State"), 3601 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3602 CTL_EOL) != 0) 3603 aprint_error_dev(dev, "could not create sysctl\n"); 3604 } 3605 } /* ixgbe_add_device_sysctls */ 3606 3607 /************************************************************************ 3608 * ixgbe_allocate_pci_resources 3609 ************************************************************************/ 3610 static int 3611 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3612 const struct pci_attach_args *pa) 3613 { 3614 pcireg_t memtype, csr; 3615 device_t dev = sc->dev; 3616 bus_addr_t addr; 3617 int flags; 3618 3619 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3620 switch (memtype) { 3621 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3622 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3623 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3624 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3625 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3626 goto map_err; 3627 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3628 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3629 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3630 } 3631 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3632 sc->osdep.mem_size, flags, 3633 &sc->osdep.mem_bus_space_handle) != 0) { 3634 map_err: 3635 sc->osdep.mem_size = 0; 3636 aprint_error_dev(dev, "unable to map BAR0\n"); 3637 return ENXIO; 3638 } 3639 /* 3640 * Enable address decoding for memory range in case BIOS or 3641 * UEFI don't set it. 3642 */ 3643 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3644 PCI_COMMAND_STATUS_REG); 3645 csr |= PCI_COMMAND_MEM_ENABLE; 3646 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3647 csr); 3648 break; 3649 default: 3650 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3651 return ENXIO; 3652 } 3653 3654 return (0); 3655 } /* ixgbe_allocate_pci_resources */ 3656 3657 static void 3658 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3659 { 3660 struct ix_queue *que = sc->queues; 3661 struct tx_ring *txr = sc->tx_rings; 3662 int i; 3663 3664 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3665 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3666 if (txr->txr_si != NULL) 3667 softint_disestablish(txr->txr_si); 3668 } 3669 if (que->que_si != NULL) 3670 softint_disestablish(que->que_si); 3671 } 3672 if (sc->txr_wq != NULL) 3673 workqueue_destroy(sc->txr_wq); 3674 if (sc->txr_wq_enqueued != NULL) 3675 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3676 if (sc->que_wq != NULL) 3677 workqueue_destroy(sc->que_wq); 3678 3679 if (sc->admin_wq != NULL) { 3680 workqueue_destroy(sc->admin_wq); 3681 sc->admin_wq = NULL; 3682 } 3683 if (sc->timer_wq != NULL) { 3684 workqueue_destroy(sc->timer_wq); 3685 sc->timer_wq = NULL; 3686 } 3687 if (sc->recovery_mode_timer_wq != NULL) { 3688 /* 3689 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3690 * the recovery_mode_timer workqueue, so call it here. 3691 */ 3692 workqueue_wait(sc->recovery_mode_timer_wq, 3693 &sc->recovery_mode_timer_wc); 3694 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3695 workqueue_destroy(sc->recovery_mode_timer_wq); 3696 sc->recovery_mode_timer_wq = NULL; 3697 } 3698 } /* ixgbe_free_deferred_handlers */ 3699 3700 /************************************************************************ 3701 * ixgbe_detach - Device removal routine 3702 * 3703 * Called when the driver is being removed. 3704 * Stops the adapter and deallocates all the resources 3705 * that were allocated for driver operation. 3706 * 3707 * return 0 on success, positive on failure 3708 ************************************************************************/ 3709 static int 3710 ixgbe_detach(device_t dev, int flags) 3711 { 3712 struct ixgbe_softc *sc = device_private(dev); 3713 struct rx_ring *rxr = sc->rx_rings; 3714 struct tx_ring *txr = sc->tx_rings; 3715 struct ixgbe_hw *hw = &sc->hw; 3716 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3717 u32 ctrl_ext; 3718 int i; 3719 3720 INIT_DEBUGOUT("ixgbe_detach: begin"); 3721 if (sc->osdep.attached == false) 3722 return 0; 3723 3724 if (ixgbe_pci_iov_detach(dev) != 0) { 3725 device_printf(dev, "SR-IOV in use; detach first.\n"); 3726 return (EBUSY); 3727 } 3728 3729 if (VLAN_ATTACHED(&sc->osdep.ec) && 3730 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3731 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3732 return (EBUSY); 3733 } 3734 3735 ether_ifdetach(sc->ifp); 3736 3737 sc->osdep.detaching = true; 3738 /* 3739 * Stop the interface. ixgbe_setup_low_power_mode() calls 3740 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3741 * directly. 3742 */ 3743 ixgbe_setup_low_power_mode(sc); 3744 3745 callout_halt(&sc->timer, NULL); 3746 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3747 callout_halt(&sc->recovery_mode_timer, NULL); 3748 3749 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3750 atomic_store_relaxed(&sc->admin_pending, 0); 3751 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3752 atomic_store_relaxed(&sc->timer_pending, 0); 3753 3754 pmf_device_deregister(dev); 3755 3756 ixgbe_free_deferred_handlers(sc); 3757 3758 /* let hardware know driver is unloading */ 3759 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3760 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3761 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3762 3763 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3764 netmap_detach(sc->ifp); 3765 3766 ixgbe_free_pci_resources(sc); 3767 #if 0 /* XXX the NetBSD port is probably missing something here */ 3768 bus_generic_detach(dev); 3769 #endif 3770 if_detach(sc->ifp); 3771 ifmedia_fini(&sc->media); 3772 if_percpuq_destroy(sc->ipq); 3773 3774 sysctl_teardown(&sc->sysctllog); 3775 evcnt_detach(&sc->efbig_tx_dma_setup); 3776 evcnt_detach(&sc->mbuf_defrag_failed); 3777 evcnt_detach(&sc->efbig2_tx_dma_setup); 3778 evcnt_detach(&sc->einval_tx_dma_setup); 3779 evcnt_detach(&sc->other_tx_dma_setup); 3780 evcnt_detach(&sc->eagain_tx_dma_setup); 3781 evcnt_detach(&sc->enomem_tx_dma_setup); 3782 evcnt_detach(&sc->watchdog_events); 3783 evcnt_detach(&sc->tso_err); 3784 evcnt_detach(&sc->admin_irqev); 3785 evcnt_detach(&sc->link_workev); 3786 evcnt_detach(&sc->mod_workev); 3787 evcnt_detach(&sc->msf_workev); 3788 evcnt_detach(&sc->phy_workev); 3789 3790 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3791 if (i < __arraycount(stats->mpc)) { 3792 evcnt_detach(&stats->mpc[i]); 3793 if (hw->mac.type == ixgbe_mac_82598EB) 3794 evcnt_detach(&stats->rnbc[i]); 3795 } 3796 if (i < __arraycount(stats->pxontxc)) { 3797 evcnt_detach(&stats->pxontxc[i]); 3798 evcnt_detach(&stats->pxonrxc[i]); 3799 evcnt_detach(&stats->pxofftxc[i]); 3800 evcnt_detach(&stats->pxoffrxc[i]); 3801 if (hw->mac.type >= ixgbe_mac_82599EB) 3802 evcnt_detach(&stats->pxon2offc[i]); 3803 } 3804 } 3805 3806 txr = sc->tx_rings; 3807 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3808 evcnt_detach(&sc->queues[i].irqs); 3809 evcnt_detach(&sc->queues[i].handleq); 3810 evcnt_detach(&sc->queues[i].req); 3811 evcnt_detach(&txr->total_packets); 3812 #ifndef IXGBE_LEGACY_TX 3813 evcnt_detach(&txr->pcq_drops); 3814 #endif 3815 evcnt_detach(&txr->no_desc_avail); 3816 evcnt_detach(&txr->tso_tx); 3817 3818 if (i < __arraycount(stats->qprc)) { 3819 evcnt_detach(&stats->qprc[i]); 3820 evcnt_detach(&stats->qptc[i]); 3821 evcnt_detach(&stats->qbrc[i]); 3822 evcnt_detach(&stats->qbtc[i]); 3823 if (hw->mac.type >= ixgbe_mac_82599EB) 3824 evcnt_detach(&stats->qprdc[i]); 3825 } 3826 3827 evcnt_detach(&rxr->rx_packets); 3828 evcnt_detach(&rxr->rx_bytes); 3829 evcnt_detach(&rxr->rx_copies); 3830 evcnt_detach(&rxr->no_mbuf); 3831 evcnt_detach(&rxr->rx_discarded); 3832 } 3833 evcnt_detach(&stats->ipcs); 3834 evcnt_detach(&stats->l4cs); 3835 evcnt_detach(&stats->ipcs_bad); 3836 evcnt_detach(&stats->l4cs_bad); 3837 evcnt_detach(&stats->intzero); 3838 evcnt_detach(&stats->legint); 3839 evcnt_detach(&stats->crcerrs); 3840 evcnt_detach(&stats->illerrc); 3841 evcnt_detach(&stats->errbc); 3842 evcnt_detach(&stats->mspdc); 3843 if (hw->mac.type >= ixgbe_mac_X550) 3844 evcnt_detach(&stats->mbsdc); 3845 evcnt_detach(&stats->mpctotal); 3846 evcnt_detach(&stats->mlfc); 3847 evcnt_detach(&stats->mrfc); 3848 if (hw->mac.type == ixgbe_mac_X550EM_a) 3849 evcnt_detach(&stats->link_dn_cnt); 3850 evcnt_detach(&stats->rlec); 3851 evcnt_detach(&stats->lxontxc); 3852 evcnt_detach(&stats->lxonrxc); 3853 evcnt_detach(&stats->lxofftxc); 3854 evcnt_detach(&stats->lxoffrxc); 3855 3856 /* Packet Reception Stats */ 3857 evcnt_detach(&stats->tor); 3858 evcnt_detach(&stats->gorc); 3859 evcnt_detach(&stats->tpr); 3860 evcnt_detach(&stats->gprc); 3861 evcnt_detach(&stats->mprc); 3862 evcnt_detach(&stats->bprc); 3863 evcnt_detach(&stats->prc64); 3864 evcnt_detach(&stats->prc127); 3865 evcnt_detach(&stats->prc255); 3866 evcnt_detach(&stats->prc511); 3867 evcnt_detach(&stats->prc1023); 3868 evcnt_detach(&stats->prc1522); 3869 evcnt_detach(&stats->ruc); 3870 evcnt_detach(&stats->rfc); 3871 evcnt_detach(&stats->roc); 3872 evcnt_detach(&stats->rjc); 3873 evcnt_detach(&stats->mngprc); 3874 evcnt_detach(&stats->mngpdc); 3875 evcnt_detach(&stats->xec); 3876 3877 /* Packet Transmission Stats */ 3878 evcnt_detach(&stats->gotc); 3879 evcnt_detach(&stats->tpt); 3880 evcnt_detach(&stats->gptc); 3881 evcnt_detach(&stats->bptc); 3882 evcnt_detach(&stats->mptc); 3883 evcnt_detach(&stats->mngptc); 3884 evcnt_detach(&stats->ptc64); 3885 evcnt_detach(&stats->ptc127); 3886 evcnt_detach(&stats->ptc255); 3887 evcnt_detach(&stats->ptc511); 3888 evcnt_detach(&stats->ptc1023); 3889 evcnt_detach(&stats->ptc1522); 3890 3891 ixgbe_free_queues(sc); 3892 free(sc->mta, M_DEVBUF); 3893 3894 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3895 IXGBE_CORE_LOCK_DESTROY(sc); 3896 3897 return (0); 3898 } /* ixgbe_detach */ 3899 3900 /************************************************************************ 3901 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3902 * 3903 * Prepare the adapter/port for LPLU and/or WoL 3904 ************************************************************************/ 3905 static int 3906 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3907 { 3908 struct ixgbe_hw *hw = &sc->hw; 3909 device_t dev = sc->dev; 3910 struct ifnet *ifp = sc->ifp; 3911 s32 error = 0; 3912 3913 /* Limit power management flow to X550EM baseT */ 3914 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3915 hw->phy.ops.enter_lplu) { 3916 /* X550EM baseT adapters need a special LPLU flow */ 3917 hw->phy.reset_disable = true; 3918 ixgbe_ifstop(ifp, 1); 3919 error = hw->phy.ops.enter_lplu(hw); 3920 if (error) 3921 device_printf(dev, 3922 "Error entering LPLU: %d\n", error); 3923 hw->phy.reset_disable = false; 3924 } else { 3925 /* Just stop for other adapters */ 3926 ixgbe_ifstop(ifp, 1); 3927 } 3928 3929 IXGBE_CORE_LOCK(sc); 3930 3931 if (!hw->wol_enabled) { 3932 ixgbe_set_phy_power(hw, FALSE); 3933 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3934 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3935 } else { 3936 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3937 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3938 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3939 3940 /* 3941 * Clear Wake Up Status register to prevent any previous wakeup 3942 * events from waking us up immediately after we suspend. 3943 */ 3944 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3945 3946 /* 3947 * Program the Wakeup Filter Control register with user filter 3948 * settings 3949 */ 3950 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3951 3952 /* Enable wakeups and power management in Wakeup Control */ 3953 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3954 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3955 } 3956 3957 IXGBE_CORE_UNLOCK(sc); 3958 3959 return error; 3960 } /* ixgbe_setup_low_power_mode */ 3961 3962 /************************************************************************ 3963 * ixgbe_shutdown - Shutdown entry point 3964 ************************************************************************/ 3965 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3966 static int 3967 ixgbe_shutdown(device_t dev) 3968 { 3969 struct ixgbe_softc *sc = device_private(dev); 3970 int error = 0; 3971 3972 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3973 3974 error = ixgbe_setup_low_power_mode(sc); 3975 3976 return (error); 3977 } /* ixgbe_shutdown */ 3978 #endif 3979 3980 /************************************************************************ 3981 * ixgbe_suspend 3982 * 3983 * From D0 to D3 3984 ************************************************************************/ 3985 static bool 3986 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3987 { 3988 struct ixgbe_softc *sc = device_private(dev); 3989 int error = 0; 3990 3991 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3992 3993 error = ixgbe_setup_low_power_mode(sc); 3994 3995 return (error); 3996 } /* ixgbe_suspend */ 3997 3998 /************************************************************************ 3999 * ixgbe_resume 4000 * 4001 * From D3 to D0 4002 ************************************************************************/ 4003 static bool 4004 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 4005 { 4006 struct ixgbe_softc *sc = device_private(dev); 4007 struct ifnet *ifp = sc->ifp; 4008 struct ixgbe_hw *hw = &sc->hw; 4009 u32 wus; 4010 4011 INIT_DEBUGOUT("ixgbe_resume: begin"); 4012 4013 IXGBE_CORE_LOCK(sc); 4014 4015 /* Read & clear WUS register */ 4016 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4017 if (wus) 4018 device_printf(dev, "Woken up by (WUS): %#010x\n", 4019 IXGBE_READ_REG(hw, IXGBE_WUS)); 4020 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4021 /* And clear WUFC until next low-power transition */ 4022 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4023 4024 /* 4025 * Required after D3->D0 transition; 4026 * will re-advertise all previous advertised speeds 4027 */ 4028 if (ifp->if_flags & IFF_UP) 4029 ixgbe_init_locked(sc); 4030 4031 IXGBE_CORE_UNLOCK(sc); 4032 4033 return true; 4034 } /* ixgbe_resume */ 4035 4036 /* 4037 * Set the various hardware offload abilities. 4038 * 4039 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4040 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4041 * mbuf offload flags the driver will understand. 4042 */ 4043 static void 4044 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4045 { 4046 /* XXX */ 4047 } 4048 4049 /************************************************************************ 4050 * ixgbe_init_locked - Init entry point 4051 * 4052 * Used in two ways: It is used by the stack as an init 4053 * entry point in network interface structure. It is also 4054 * used by the driver as a hw/sw initialization routine to 4055 * get to a consistent state. 4056 * 4057 * return 0 on success, positive on failure 4058 ************************************************************************/ 4059 static void 4060 ixgbe_init_locked(struct ixgbe_softc *sc) 4061 { 4062 struct ifnet *ifp = sc->ifp; 4063 device_t dev = sc->dev; 4064 struct ixgbe_hw *hw = &sc->hw; 4065 struct ix_queue *que; 4066 struct tx_ring *txr; 4067 struct rx_ring *rxr; 4068 u32 txdctl, mhadd; 4069 u32 rxdctl, rxctrl; 4070 u32 ctrl_ext; 4071 bool unsupported_sfp = false; 4072 int i, j, error; 4073 4074 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4075 4076 KASSERT(mutex_owned(&sc->core_mtx)); 4077 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4078 4079 hw->need_unsupported_sfp_recovery = false; 4080 hw->adapter_stopped = FALSE; 4081 ixgbe_stop_adapter(hw); 4082 callout_stop(&sc->timer); 4083 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4084 callout_stop(&sc->recovery_mode_timer); 4085 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4086 que->disabled_count = 0; 4087 4088 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4089 sc->max_frame_size = 4090 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4091 4092 /* Queue indices may change with IOV mode */ 4093 ixgbe_align_all_queue_indices(sc); 4094 4095 /* reprogram the RAR[0] in case user changed it. */ 4096 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4097 4098 /* Get the latest mac address, User can use a LAA */ 4099 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4100 IXGBE_ETH_LENGTH_OF_ADDRESS); 4101 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4102 hw->addr_ctrl.rar_used_count = 1; 4103 4104 /* Set hardware offload abilities from ifnet flags */ 4105 ixgbe_set_if_hwassist(sc); 4106 4107 /* Prepare transmit descriptors and buffers */ 4108 if (ixgbe_setup_transmit_structures(sc)) { 4109 device_printf(dev, "Could not setup transmit structures\n"); 4110 ixgbe_stop_locked(sc); 4111 return; 4112 } 4113 4114 ixgbe_init_hw(hw); 4115 4116 ixgbe_initialize_iov(sc); 4117 4118 ixgbe_initialize_transmit_units(sc); 4119 4120 /* Setup Multicast table */ 4121 ixgbe_set_rxfilter(sc); 4122 4123 /* Use fixed buffer size, even for jumbo frames */ 4124 sc->rx_mbuf_sz = MCLBYTES; 4125 4126 /* Prepare receive descriptors and buffers */ 4127 error = ixgbe_setup_receive_structures(sc); 4128 if (error) { 4129 device_printf(dev, 4130 "Could not setup receive structures (err = %d)\n", error); 4131 ixgbe_stop_locked(sc); 4132 return; 4133 } 4134 4135 /* Configure RX settings */ 4136 ixgbe_initialize_receive_units(sc); 4137 4138 /* Initialize variable holding task enqueue requests interrupts */ 4139 sc->task_requests = 0; 4140 4141 /* Enable SDP & MSI-X interrupts based on adapter */ 4142 ixgbe_config_gpie(sc); 4143 4144 /* Set MTU size */ 4145 if (ifp->if_mtu > ETHERMTU) { 4146 /* aka IXGBE_MAXFRS on 82599 and newer */ 4147 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4148 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4149 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4150 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4151 } 4152 4153 /* Now enable all the queues */ 4154 for (i = 0; i < sc->num_queues; i++) { 4155 txr = &sc->tx_rings[i]; 4156 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4157 txdctl |= IXGBE_TXDCTL_ENABLE; 4158 /* Set WTHRESH to 8, burst writeback */ 4159 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4160 /* 4161 * When the internal queue falls below PTHRESH (32), 4162 * start prefetching as long as there are at least 4163 * HTHRESH (1) buffers ready. The values are taken 4164 * from the Intel linux driver 3.8.21. 4165 * Prefetching enables tx line rate even with 1 queue. 4166 */ 4167 txdctl |= (32 << 0) | (1 << 8); 4168 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4169 } 4170 4171 for (i = 0; i < sc->num_queues; i++) { 4172 rxr = &sc->rx_rings[i]; 4173 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4174 if (hw->mac.type == ixgbe_mac_82598EB) { 4175 /* 4176 * PTHRESH = 21 4177 * HTHRESH = 4 4178 * WTHRESH = 8 4179 */ 4180 rxdctl &= ~0x3FFFFF; 4181 rxdctl |= 0x080420; 4182 } 4183 rxdctl |= IXGBE_RXDCTL_ENABLE; 4184 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4185 for (j = 0; j < 10; j++) { 4186 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4187 IXGBE_RXDCTL_ENABLE) 4188 break; 4189 else 4190 msec_delay(1); 4191 } 4192 IXGBE_WRITE_BARRIER(hw); 4193 4194 /* 4195 * In netmap mode, we must preserve the buffers made 4196 * available to userspace before the if_init() 4197 * (this is true by default on the TX side, because 4198 * init makes all buffers available to userspace). 4199 * 4200 * netmap_reset() and the device specific routines 4201 * (e.g. ixgbe_setup_receive_rings()) map these 4202 * buffers at the end of the NIC ring, so here we 4203 * must set the RDT (tail) register to make sure 4204 * they are not overwritten. 4205 * 4206 * In this driver the NIC ring starts at RDH = 0, 4207 * RDT points to the last slot available for reception (?), 4208 * so RDT = num_rx_desc - 1 means the whole ring is available. 4209 */ 4210 #ifdef DEV_NETMAP 4211 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4212 (ifp->if_capenable & IFCAP_NETMAP)) { 4213 struct netmap_adapter *na = NA(sc->ifp); 4214 struct netmap_kring *kring = na->rx_rings[i]; 4215 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4216 4217 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4218 } else 4219 #endif /* DEV_NETMAP */ 4220 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4221 sc->num_rx_desc - 1); 4222 } 4223 4224 /* Enable Receive engine */ 4225 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4226 if (hw->mac.type == ixgbe_mac_82598EB) 4227 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4228 rxctrl |= IXGBE_RXCTRL_RXEN; 4229 ixgbe_enable_rx_dma(hw, rxctrl); 4230 4231 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4232 atomic_store_relaxed(&sc->timer_pending, 0); 4233 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4234 callout_reset(&sc->recovery_mode_timer, hz, 4235 ixgbe_recovery_mode_timer, sc); 4236 4237 /* Set up MSI/MSI-X routing */ 4238 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4239 ixgbe_configure_ivars(sc); 4240 /* Set up auto-mask */ 4241 if (hw->mac.type == ixgbe_mac_82598EB) 4242 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4243 else { 4244 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4245 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4246 } 4247 } else { /* Simple settings for Legacy/MSI */ 4248 ixgbe_set_ivar(sc, 0, 0, 0); 4249 ixgbe_set_ivar(sc, 0, 0, 1); 4250 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4251 } 4252 4253 ixgbe_init_fdir(sc); 4254 4255 /* 4256 * Check on any SFP devices that 4257 * need to be kick-started 4258 */ 4259 if (hw->phy.type == ixgbe_phy_none) { 4260 error = hw->phy.ops.identify(hw); 4261 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4262 unsupported_sfp = true; 4263 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4264 unsupported_sfp = true; 4265 4266 if (unsupported_sfp) 4267 device_printf(dev, 4268 "Unsupported SFP+ module type was detected.\n"); 4269 4270 /* Set moderation on the Link interrupt */ 4271 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4272 4273 /* Enable EEE power saving */ 4274 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4275 hw->mac.ops.setup_eee(hw, 4276 sc->feat_en & IXGBE_FEATURE_EEE); 4277 4278 /* Enable power to the phy. */ 4279 if (!unsupported_sfp) { 4280 ixgbe_set_phy_power(hw, TRUE); 4281 4282 /* Config/Enable Link */ 4283 ixgbe_config_link(sc); 4284 } 4285 4286 /* Hardware Packet Buffer & Flow Control setup */ 4287 ixgbe_config_delay_values(sc); 4288 4289 /* Initialize the FC settings */ 4290 ixgbe_start_hw(hw); 4291 4292 /* Set up VLAN support and filter */ 4293 ixgbe_setup_vlan_hw_support(sc); 4294 4295 /* Setup DMA Coalescing */ 4296 ixgbe_config_dmac(sc); 4297 4298 /* OK to schedule workqueues. */ 4299 sc->schedule_wqs_ok = true; 4300 4301 /* Enable the use of the MBX by the VF's */ 4302 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4303 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4304 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4305 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4306 } 4307 4308 /* Update saved flags. See ixgbe_ifflags_cb() */ 4309 sc->if_flags = ifp->if_flags; 4310 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4311 4312 /* Inform the stack we're ready */ 4313 ifp->if_flags |= IFF_RUNNING; 4314 4315 /* And now turn on interrupts */ 4316 ixgbe_enable_intr(sc); 4317 4318 return; 4319 } /* ixgbe_init_locked */ 4320 4321 /************************************************************************ 4322 * ixgbe_init 4323 ************************************************************************/ 4324 static int 4325 ixgbe_init(struct ifnet *ifp) 4326 { 4327 struct ixgbe_softc *sc = ifp->if_softc; 4328 4329 IXGBE_CORE_LOCK(sc); 4330 ixgbe_init_locked(sc); 4331 IXGBE_CORE_UNLOCK(sc); 4332 4333 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4334 } /* ixgbe_init */ 4335 4336 /************************************************************************ 4337 * ixgbe_set_ivar 4338 * 4339 * Setup the correct IVAR register for a particular MSI-X interrupt 4340 * (yes this is all very magic and confusing :) 4341 * - entry is the register array entry 4342 * - vector is the MSI-X vector for this queue 4343 * - type is RX/TX/MISC 4344 ************************************************************************/ 4345 static void 4346 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4347 { 4348 struct ixgbe_hw *hw = &sc->hw; 4349 u32 ivar, index; 4350 4351 vector |= IXGBE_IVAR_ALLOC_VAL; 4352 4353 switch (hw->mac.type) { 4354 case ixgbe_mac_82598EB: 4355 if (type == -1) 4356 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4357 else 4358 entry += (type * 64); 4359 index = (entry >> 2) & 0x1F; 4360 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4361 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4362 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4363 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4364 break; 4365 case ixgbe_mac_82599EB: 4366 case ixgbe_mac_X540: 4367 case ixgbe_mac_X550: 4368 case ixgbe_mac_X550EM_x: 4369 case ixgbe_mac_X550EM_a: 4370 if (type == -1) { /* MISC IVAR */ 4371 index = (entry & 1) * 8; 4372 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4373 ivar &= ~(0xffUL << index); 4374 ivar |= ((u32)vector << index); 4375 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4376 } else { /* RX/TX IVARS */ 4377 index = (16 * (entry & 1)) + (8 * type); 4378 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4379 ivar &= ~(0xffUL << index); 4380 ivar |= ((u32)vector << index); 4381 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4382 } 4383 break; 4384 default: 4385 break; 4386 } 4387 } /* ixgbe_set_ivar */ 4388 4389 /************************************************************************ 4390 * ixgbe_configure_ivars 4391 ************************************************************************/ 4392 static void 4393 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4394 { 4395 struct ix_queue *que = sc->queues; 4396 u32 newitr; 4397 4398 if (sc->max_interrupt_rate > 0) 4399 newitr = (4000000 / sc->max_interrupt_rate) & 0x0FF8; 4400 else { 4401 /* 4402 * Disable DMA coalescing if interrupt moderation is 4403 * disabled. 4404 */ 4405 sc->dmac = 0; 4406 newitr = 0; 4407 } 4408 4409 for (int i = 0; i < sc->num_queues; i++, que++) { 4410 struct rx_ring *rxr = &sc->rx_rings[i]; 4411 struct tx_ring *txr = &sc->tx_rings[i]; 4412 /* First the RX queue entry */ 4413 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4414 /* ... and the TX */ 4415 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4416 /* Set an Initial EITR value */ 4417 ixgbe_eitr_write(sc, que->msix, newitr); 4418 /* 4419 * To eliminate influence of the previous state. 4420 * At this point, Tx/Rx interrupt handler 4421 * (ixgbe_msix_que()) cannot be called, so both 4422 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4423 */ 4424 que->eitr_setting = 0; 4425 } 4426 4427 /* For the Link interrupt */ 4428 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4429 } /* ixgbe_configure_ivars */ 4430 4431 /************************************************************************ 4432 * ixgbe_config_gpie 4433 ************************************************************************/ 4434 static void 4435 ixgbe_config_gpie(struct ixgbe_softc *sc) 4436 { 4437 struct ixgbe_hw *hw = &sc->hw; 4438 u32 gpie; 4439 4440 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4441 4442 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4443 /* Enable Enhanced MSI-X mode */ 4444 gpie |= IXGBE_GPIE_MSIX_MODE 4445 | IXGBE_GPIE_EIAME 4446 | IXGBE_GPIE_PBA_SUPPORT 4447 | IXGBE_GPIE_OCD; 4448 } 4449 4450 /* Fan Failure Interrupt */ 4451 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4452 gpie |= IXGBE_SDP1_GPIEN; 4453 4454 /* Thermal Sensor Interrupt */ 4455 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4456 gpie |= IXGBE_SDP0_GPIEN_X540; 4457 4458 /* Link detection */ 4459 switch (hw->mac.type) { 4460 case ixgbe_mac_82599EB: 4461 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4462 break; 4463 case ixgbe_mac_X550EM_x: 4464 case ixgbe_mac_X550EM_a: 4465 gpie |= IXGBE_SDP0_GPIEN_X540; 4466 break; 4467 default: 4468 break; 4469 } 4470 4471 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4472 4473 } /* ixgbe_config_gpie */ 4474 4475 /************************************************************************ 4476 * ixgbe_config_delay_values 4477 * 4478 * Requires sc->max_frame_size to be set. 4479 ************************************************************************/ 4480 static void 4481 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4482 { 4483 struct ixgbe_hw *hw = &sc->hw; 4484 u32 rxpb, frame, size, tmp; 4485 4486 frame = sc->max_frame_size; 4487 4488 /* Calculate High Water */ 4489 switch (hw->mac.type) { 4490 case ixgbe_mac_X540: 4491 case ixgbe_mac_X550: 4492 case ixgbe_mac_X550EM_x: 4493 case ixgbe_mac_X550EM_a: 4494 tmp = IXGBE_DV_X540(frame, frame); 4495 break; 4496 default: 4497 tmp = IXGBE_DV(frame, frame); 4498 break; 4499 } 4500 size = IXGBE_BT2KB(tmp); 4501 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4502 hw->fc.high_water[0] = rxpb - size; 4503 4504 /* Now calculate Low Water */ 4505 switch (hw->mac.type) { 4506 case ixgbe_mac_X540: 4507 case ixgbe_mac_X550: 4508 case ixgbe_mac_X550EM_x: 4509 case ixgbe_mac_X550EM_a: 4510 tmp = IXGBE_LOW_DV_X540(frame); 4511 break; 4512 default: 4513 tmp = IXGBE_LOW_DV(frame); 4514 break; 4515 } 4516 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4517 4518 hw->fc.pause_time = IXGBE_FC_PAUSE; 4519 hw->fc.send_xon = TRUE; 4520 } /* ixgbe_config_delay_values */ 4521 4522 /************************************************************************ 4523 * ixgbe_set_rxfilter - Multicast Update 4524 * 4525 * Called whenever multicast address list is updated. 4526 ************************************************************************/ 4527 static void 4528 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4529 { 4530 struct ixgbe_mc_addr *mta; 4531 struct ifnet *ifp = sc->ifp; 4532 u8 *update_ptr; 4533 int mcnt = 0; 4534 u32 fctrl; 4535 struct ethercom *ec = &sc->osdep.ec; 4536 struct ether_multi *enm; 4537 struct ether_multistep step; 4538 4539 KASSERT(mutex_owned(&sc->core_mtx)); 4540 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4541 4542 mta = sc->mta; 4543 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4544 4545 ETHER_LOCK(ec); 4546 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4547 ETHER_FIRST_MULTI(step, ec, enm); 4548 while (enm != NULL) { 4549 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4550 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4551 ETHER_ADDR_LEN) != 0)) { 4552 ec->ec_flags |= ETHER_F_ALLMULTI; 4553 break; 4554 } 4555 bcopy(enm->enm_addrlo, 4556 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4557 mta[mcnt].vmdq = sc->pool; 4558 mcnt++; 4559 ETHER_NEXT_MULTI(step, enm); 4560 } 4561 4562 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4563 if (ifp->if_flags & IFF_PROMISC) 4564 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4565 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4566 fctrl |= IXGBE_FCTRL_MPE; 4567 fctrl &= ~IXGBE_FCTRL_UPE; 4568 } else 4569 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4570 4571 /* Update multicast filter entries only when it's not ALLMULTI */ 4572 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4573 ETHER_UNLOCK(ec); 4574 update_ptr = (u8 *)mta; 4575 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4576 ixgbe_mc_array_itr, TRUE); 4577 } else 4578 ETHER_UNLOCK(ec); 4579 4580 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4581 } /* ixgbe_set_rxfilter */ 4582 4583 /************************************************************************ 4584 * ixgbe_mc_array_itr 4585 * 4586 * An iterator function needed by the multicast shared code. 4587 * It feeds the shared code routine the addresses in the 4588 * array of ixgbe_set_rxfilter() one by one. 4589 ************************************************************************/ 4590 static u8 * 4591 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4592 { 4593 struct ixgbe_mc_addr *mta; 4594 4595 mta = (struct ixgbe_mc_addr *)*update_ptr; 4596 *vmdq = mta->vmdq; 4597 4598 *update_ptr = (u8*)(mta + 1); 4599 4600 return (mta->addr); 4601 } /* ixgbe_mc_array_itr */ 4602 4603 /************************************************************************ 4604 * ixgbe_local_timer - Timer routine 4605 * 4606 * Checks for link status, updates statistics, 4607 * and runs the watchdog check. 4608 ************************************************************************/ 4609 static void 4610 ixgbe_local_timer(void *arg) 4611 { 4612 struct ixgbe_softc *sc = arg; 4613 4614 if (sc->schedule_wqs_ok) { 4615 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4616 workqueue_enqueue(sc->timer_wq, 4617 &sc->timer_wc, NULL); 4618 } 4619 } 4620 4621 static void 4622 ixgbe_handle_timer(struct work *wk, void *context) 4623 { 4624 struct ixgbe_softc *sc = context; 4625 struct ixgbe_hw *hw = &sc->hw; 4626 device_t dev = sc->dev; 4627 struct ix_queue *que = sc->queues; 4628 u64 queues = 0; 4629 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4630 int hung = 0; 4631 int i; 4632 4633 IXGBE_CORE_LOCK(sc); 4634 4635 /* Check for pluggable optics */ 4636 if (ixgbe_is_sfp(hw)) { 4637 bool sched_mod_task = false; 4638 4639 if (hw->mac.type == ixgbe_mac_82598EB) { 4640 /* 4641 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4642 * any GPIO(SDP). So just schedule TASK_MOD. 4643 */ 4644 sched_mod_task = true; 4645 } else { 4646 bool was_full, is_full; 4647 4648 was_full = 4649 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4650 is_full = ixgbe_sfp_cage_full(hw); 4651 4652 /* Do probe if cage state changed */ 4653 if (was_full ^ is_full) 4654 sched_mod_task = true; 4655 } 4656 if (sched_mod_task) { 4657 mutex_enter(&sc->admin_mtx); 4658 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4659 ixgbe_schedule_admin_tasklet(sc); 4660 mutex_exit(&sc->admin_mtx); 4661 } 4662 } 4663 4664 ixgbe_update_link_status(sc); 4665 ixgbe_update_stats_counters(sc); 4666 4667 /* Update some event counters */ 4668 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4669 que = sc->queues; 4670 for (i = 0; i < sc->num_queues; i++, que++) { 4671 struct tx_ring *txr = que->txr; 4672 4673 v0 += txr->q_efbig_tx_dma_setup; 4674 v1 += txr->q_mbuf_defrag_failed; 4675 v2 += txr->q_efbig2_tx_dma_setup; 4676 v3 += txr->q_einval_tx_dma_setup; 4677 v4 += txr->q_other_tx_dma_setup; 4678 v5 += txr->q_eagain_tx_dma_setup; 4679 v6 += txr->q_enomem_tx_dma_setup; 4680 v7 += txr->q_tso_err; 4681 } 4682 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4683 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4684 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4685 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4686 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4687 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4688 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4689 IXGBE_EVC_STORE(&sc->tso_err, v7); 4690 4691 /* 4692 * Check the TX queues status 4693 * - mark hung queues so we don't schedule on them 4694 * - watchdog only if all queues show hung 4695 */ 4696 que = sc->queues; 4697 for (i = 0; i < sc->num_queues; i++, que++) { 4698 /* Keep track of queues with work for soft irq */ 4699 if (que->txr->busy) 4700 queues |= 1ULL << que->me; 4701 /* 4702 * Each time txeof runs without cleaning, but there 4703 * are uncleaned descriptors it increments busy. If 4704 * we get to the MAX we declare it hung. 4705 */ 4706 if (que->busy == IXGBE_QUEUE_HUNG) { 4707 ++hung; 4708 /* Mark the queue as inactive */ 4709 sc->active_queues &= ~(1ULL << que->me); 4710 continue; 4711 } else { 4712 /* Check if we've come back from hung */ 4713 if ((sc->active_queues & (1ULL << que->me)) == 0) 4714 sc->active_queues |= 1ULL << que->me; 4715 } 4716 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4717 device_printf(dev, 4718 "Warning queue %d appears to be hung!\n", i); 4719 que->txr->busy = IXGBE_QUEUE_HUNG; 4720 ++hung; 4721 } 4722 } 4723 4724 /* Only truly watchdog if all queues show hung */ 4725 if (hung == sc->num_queues) 4726 goto watchdog; 4727 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4728 else if (queues != 0) { /* Force an IRQ on queues with work */ 4729 que = sc->queues; 4730 for (i = 0; i < sc->num_queues; i++, que++) { 4731 mutex_enter(&que->dc_mtx); 4732 if (que->disabled_count == 0) 4733 ixgbe_rearm_queues(sc, 4734 queues & ((u64)1 << i)); 4735 mutex_exit(&que->dc_mtx); 4736 } 4737 } 4738 #endif 4739 4740 atomic_store_relaxed(&sc->timer_pending, 0); 4741 IXGBE_CORE_UNLOCK(sc); 4742 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4743 return; 4744 4745 watchdog: 4746 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4747 sc->ifp->if_flags &= ~IFF_RUNNING; 4748 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4749 ixgbe_init_locked(sc); 4750 IXGBE_CORE_UNLOCK(sc); 4751 } /* ixgbe_handle_timer */ 4752 4753 /************************************************************************ 4754 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4755 ************************************************************************/ 4756 static void 4757 ixgbe_recovery_mode_timer(void *arg) 4758 { 4759 struct ixgbe_softc *sc = arg; 4760 4761 if (__predict_true(sc->osdep.detaching == false)) { 4762 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4763 0, 1) == 0) { 4764 workqueue_enqueue(sc->recovery_mode_timer_wq, 4765 &sc->recovery_mode_timer_wc, NULL); 4766 } 4767 } 4768 } 4769 4770 static void 4771 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4772 { 4773 struct ixgbe_softc *sc = context; 4774 struct ixgbe_hw *hw = &sc->hw; 4775 4776 IXGBE_CORE_LOCK(sc); 4777 if (ixgbe_fw_recovery_mode(hw)) { 4778 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4779 /* Firmware error detected, entering recovery mode */ 4780 device_printf(sc->dev, 4781 "Firmware recovery mode detected. Limiting " 4782 "functionality. Refer to the Intel(R) Ethernet " 4783 "Adapters and Devices User Guide for details on " 4784 "firmware recovery mode.\n"); 4785 4786 if (hw->adapter_stopped == FALSE) 4787 ixgbe_stop_locked(sc); 4788 } 4789 } else 4790 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4791 4792 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4793 callout_reset(&sc->recovery_mode_timer, hz, 4794 ixgbe_recovery_mode_timer, sc); 4795 IXGBE_CORE_UNLOCK(sc); 4796 } /* ixgbe_handle_recovery_mode_timer */ 4797 4798 /************************************************************************ 4799 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4800 * bool int_en: true if it's called when the interrupt is enabled. 4801 ************************************************************************/ 4802 static void 4803 ixgbe_handle_mod(void *context, bool int_en) 4804 { 4805 struct ixgbe_softc *sc = context; 4806 struct ixgbe_hw *hw = &sc->hw; 4807 device_t dev = sc->dev; 4808 enum ixgbe_sfp_type last_sfp_type; 4809 u32 err; 4810 bool last_unsupported_sfp_recovery; 4811 4812 KASSERT(mutex_owned(&sc->core_mtx)); 4813 4814 last_sfp_type = hw->phy.sfp_type; 4815 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4816 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4817 if (sc->hw.need_crosstalk_fix) { 4818 if ((hw->mac.type != ixgbe_mac_82598EB) && 4819 !ixgbe_sfp_cage_full(hw)) 4820 goto out; 4821 } 4822 4823 err = hw->phy.ops.identify_sfp(hw); 4824 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4825 if (last_unsupported_sfp_recovery == false) 4826 device_printf(dev, 4827 "Unsupported SFP+ module type was detected.\n"); 4828 goto out; 4829 } 4830 4831 if (hw->need_unsupported_sfp_recovery) { 4832 device_printf(dev, "Recovering from unsupported SFP\n"); 4833 /* 4834 * We could recover the status by calling setup_sfp(), 4835 * setup_link() and some others. It's complex and might not 4836 * work correctly on some unknown cases. To avoid such type of 4837 * problem, call ixgbe_init_locked(). It's simple and safe 4838 * approach. 4839 */ 4840 ixgbe_init_locked(sc); 4841 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4842 (hw->phy.sfp_type != last_sfp_type)) { 4843 /* A module is inserted and changed. */ 4844 4845 if (hw->mac.type == ixgbe_mac_82598EB) 4846 err = hw->phy.ops.reset(hw); 4847 else { 4848 err = hw->mac.ops.setup_sfp(hw); 4849 hw->phy.sfp_setup_needed = FALSE; 4850 } 4851 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4852 device_printf(dev, 4853 "Setup failure - unsupported SFP+ module type.\n"); 4854 goto out; 4855 } 4856 } 4857 4858 out: 4859 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4860 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4861 4862 /* Adjust media types shown in ifconfig */ 4863 IXGBE_CORE_UNLOCK(sc); 4864 ifmedia_removeall(&sc->media); 4865 ixgbe_add_media_types(sc); 4866 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4867 IXGBE_CORE_LOCK(sc); 4868 4869 /* 4870 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4871 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4872 * flap because the function calls setup_link(). 4873 */ 4874 if (hw->mac.type != ixgbe_mac_82598EB) { 4875 mutex_enter(&sc->admin_mtx); 4876 if (int_en) 4877 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4878 else 4879 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4880 mutex_exit(&sc->admin_mtx); 4881 } 4882 4883 /* 4884 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4885 * the workqueue now. 4886 */ 4887 } /* ixgbe_handle_mod */ 4888 4889 4890 /************************************************************************ 4891 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4892 ************************************************************************/ 4893 static void 4894 ixgbe_handle_msf(void *context) 4895 { 4896 struct ixgbe_softc *sc = context; 4897 struct ixgbe_hw *hw = &sc->hw; 4898 u32 autoneg; 4899 bool negotiate; 4900 4901 KASSERT(mutex_owned(&sc->core_mtx)); 4902 4903 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4904 4905 autoneg = hw->phy.autoneg_advertised; 4906 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4907 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4908 if (hw->mac.ops.setup_link) 4909 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4910 } /* ixgbe_handle_msf */ 4911 4912 /************************************************************************ 4913 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4914 ************************************************************************/ 4915 static void 4916 ixgbe_handle_phy(void *context) 4917 { 4918 struct ixgbe_softc *sc = context; 4919 struct ixgbe_hw *hw = &sc->hw; 4920 int error; 4921 4922 KASSERT(mutex_owned(&sc->core_mtx)); 4923 4924 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4925 error = hw->phy.ops.handle_lasi(hw); 4926 if (error == IXGBE_ERR_OVERTEMP) 4927 device_printf(sc->dev, 4928 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4929 " PHY will downshift to lower power state!\n"); 4930 else if (error) 4931 device_printf(sc->dev, 4932 "Error handling LASI interrupt: %d\n", error); 4933 } /* ixgbe_handle_phy */ 4934 4935 static void 4936 ixgbe_handle_admin(struct work *wk, void *context) 4937 { 4938 struct ixgbe_softc *sc = context; 4939 struct ifnet *ifp = sc->ifp; 4940 struct ixgbe_hw *hw = &sc->hw; 4941 u32 task_requests; 4942 u32 eims_enable = 0; 4943 4944 mutex_enter(&sc->admin_mtx); 4945 sc->admin_pending = 0; 4946 task_requests = sc->task_requests; 4947 sc->task_requests = 0; 4948 mutex_exit(&sc->admin_mtx); 4949 4950 /* 4951 * Hold the IFNET_LOCK across this entire call. This will 4952 * prevent additional changes to sc->phy_layer 4953 * and serialize calls to this tasklet. We cannot hold the 4954 * CORE_LOCK while calling into the ifmedia functions as 4955 * they call ifmedia_lock() and the lock is CORE_LOCK. 4956 */ 4957 IFNET_LOCK(ifp); 4958 IXGBE_CORE_LOCK(sc); 4959 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4960 ixgbe_handle_link(sc); 4961 eims_enable |= IXGBE_EIMS_LSC; 4962 } 4963 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4964 ixgbe_handle_mod(sc, false); 4965 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4966 ixgbe_handle_mod(sc, true); 4967 if (hw->mac.type >= ixgbe_mac_X540) 4968 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4969 else 4970 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4971 } 4972 if ((task_requests 4973 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4974 ixgbe_handle_msf(sc); 4975 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4976 (hw->mac.type == ixgbe_mac_82599EB)) 4977 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4978 } 4979 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4980 ixgbe_handle_phy(sc); 4981 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4982 } 4983 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4984 ixgbe_reinit_fdir(sc); 4985 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4986 } 4987 #if 0 /* notyet */ 4988 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4989 ixgbe_handle_mbx(sc); 4990 eims_enable |= IXGBE_EIMS_MAILBOX; 4991 } 4992 #endif 4993 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 4994 4995 IXGBE_CORE_UNLOCK(sc); 4996 IFNET_UNLOCK(ifp); 4997 } /* ixgbe_handle_admin */ 4998 4999 static void 5000 ixgbe_ifstop(struct ifnet *ifp, int disable) 5001 { 5002 struct ixgbe_softc *sc = ifp->if_softc; 5003 5004 IXGBE_CORE_LOCK(sc); 5005 ixgbe_stop_locked(sc); 5006 IXGBE_CORE_UNLOCK(sc); 5007 5008 workqueue_wait(sc->timer_wq, &sc->timer_wc); 5009 atomic_store_relaxed(&sc->timer_pending, 0); 5010 } 5011 5012 /************************************************************************ 5013 * ixgbe_stop_locked - Stop the hardware 5014 * 5015 * Disables all traffic on the adapter by issuing a 5016 * global reset on the MAC and deallocates TX/RX buffers. 5017 ************************************************************************/ 5018 static void 5019 ixgbe_stop_locked(void *arg) 5020 { 5021 struct ifnet *ifp; 5022 struct ixgbe_softc *sc = arg; 5023 struct ixgbe_hw *hw = &sc->hw; 5024 5025 ifp = sc->ifp; 5026 5027 KASSERT(mutex_owned(&sc->core_mtx)); 5028 5029 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5030 ixgbe_disable_intr(sc); 5031 callout_stop(&sc->timer); 5032 5033 /* Don't schedule workqueues. */ 5034 sc->schedule_wqs_ok = false; 5035 5036 /* Let the stack know...*/ 5037 ifp->if_flags &= ~IFF_RUNNING; 5038 5039 ixgbe_reset_hw(hw); 5040 hw->adapter_stopped = FALSE; 5041 ixgbe_stop_adapter(hw); 5042 if (hw->mac.type == ixgbe_mac_82599EB) 5043 ixgbe_stop_mac_link_on_d3_82599(hw); 5044 /* Turn off the laser - noop with no optics */ 5045 ixgbe_disable_tx_laser(hw); 5046 5047 /* Update the stack */ 5048 sc->link_up = FALSE; 5049 ixgbe_update_link_status(sc); 5050 5051 /* reprogram the RAR[0] in case user changed it. */ 5052 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5053 5054 return; 5055 } /* ixgbe_stop_locked */ 5056 5057 /************************************************************************ 5058 * ixgbe_update_link_status - Update OS on link state 5059 * 5060 * Note: Only updates the OS on the cached link state. 5061 * The real check of the hardware only happens with 5062 * a link interrupt. 5063 ************************************************************************/ 5064 static void 5065 ixgbe_update_link_status(struct ixgbe_softc *sc) 5066 { 5067 struct ifnet *ifp = sc->ifp; 5068 device_t dev = sc->dev; 5069 struct ixgbe_hw *hw = &sc->hw; 5070 5071 KASSERT(mutex_owned(&sc->core_mtx)); 5072 5073 if (sc->link_up) { 5074 if (sc->link_active != LINK_STATE_UP) { 5075 /* 5076 * To eliminate influence of the previous state 5077 * in the same way as ixgbe_init_locked(). 5078 */ 5079 struct ix_queue *que = sc->queues; 5080 for (int i = 0; i < sc->num_queues; i++, que++) 5081 que->eitr_setting = 0; 5082 5083 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL){ 5084 /* 5085 * Discard count for both MAC Local Fault and 5086 * Remote Fault because those registers are 5087 * valid only when the link speed is up and 5088 * 10Gbps. 5089 */ 5090 IXGBE_READ_REG(hw, IXGBE_MLFC); 5091 IXGBE_READ_REG(hw, IXGBE_MRFC); 5092 } 5093 5094 if (bootverbose) { 5095 const char *bpsmsg; 5096 5097 switch (sc->link_speed) { 5098 case IXGBE_LINK_SPEED_10GB_FULL: 5099 bpsmsg = "10 Gbps"; 5100 break; 5101 case IXGBE_LINK_SPEED_5GB_FULL: 5102 bpsmsg = "5 Gbps"; 5103 break; 5104 case IXGBE_LINK_SPEED_2_5GB_FULL: 5105 bpsmsg = "2.5 Gbps"; 5106 break; 5107 case IXGBE_LINK_SPEED_1GB_FULL: 5108 bpsmsg = "1 Gbps"; 5109 break; 5110 case IXGBE_LINK_SPEED_100_FULL: 5111 bpsmsg = "100 Mbps"; 5112 break; 5113 case IXGBE_LINK_SPEED_10_FULL: 5114 bpsmsg = "10 Mbps"; 5115 break; 5116 default: 5117 bpsmsg = "unknown speed"; 5118 break; 5119 } 5120 device_printf(dev, "Link is up %s %s \n", 5121 bpsmsg, "Full Duplex"); 5122 } 5123 sc->link_active = LINK_STATE_UP; 5124 /* Update any Flow Control changes */ 5125 ixgbe_fc_enable(&sc->hw); 5126 /* Update DMA coalescing config */ 5127 ixgbe_config_dmac(sc); 5128 if_link_state_change(ifp, LINK_STATE_UP); 5129 5130 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5131 ixgbe_ping_all_vfs(sc); 5132 } 5133 } else { 5134 /* 5135 * Do it when link active changes to DOWN. i.e. 5136 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5137 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5138 */ 5139 if (sc->link_active != LINK_STATE_DOWN) { 5140 if (bootverbose) 5141 device_printf(dev, "Link is Down\n"); 5142 if_link_state_change(ifp, LINK_STATE_DOWN); 5143 sc->link_active = LINK_STATE_DOWN; 5144 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5145 ixgbe_ping_all_vfs(sc); 5146 ixgbe_drain_all(sc); 5147 } 5148 } 5149 } /* ixgbe_update_link_status */ 5150 5151 /************************************************************************ 5152 * ixgbe_config_dmac - Configure DMA Coalescing 5153 ************************************************************************/ 5154 static void 5155 ixgbe_config_dmac(struct ixgbe_softc *sc) 5156 { 5157 struct ixgbe_hw *hw = &sc->hw; 5158 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5159 5160 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5161 return; 5162 5163 if (dcfg->watchdog_timer ^ sc->dmac || 5164 dcfg->link_speed ^ sc->link_speed) { 5165 dcfg->watchdog_timer = sc->dmac; 5166 dcfg->fcoe_en = false; 5167 dcfg->link_speed = sc->link_speed; 5168 dcfg->num_tcs = 1; 5169 5170 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5171 dcfg->watchdog_timer, dcfg->link_speed); 5172 5173 hw->mac.ops.dmac_config(hw); 5174 } 5175 } /* ixgbe_config_dmac */ 5176 5177 /************************************************************************ 5178 * ixgbe_enable_intr 5179 ************************************************************************/ 5180 static void 5181 ixgbe_enable_intr(struct ixgbe_softc *sc) 5182 { 5183 struct ixgbe_hw *hw = &sc->hw; 5184 struct ix_queue *que = sc->queues; 5185 u32 mask, fwsm; 5186 5187 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5188 5189 switch (sc->hw.mac.type) { 5190 case ixgbe_mac_82599EB: 5191 mask |= IXGBE_EIMS_ECC; 5192 /* Temperature sensor on some adapters */ 5193 mask |= IXGBE_EIMS_GPI_SDP0; 5194 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5195 mask |= IXGBE_EIMS_GPI_SDP1; 5196 mask |= IXGBE_EIMS_GPI_SDP2; 5197 break; 5198 case ixgbe_mac_X540: 5199 /* Detect if Thermal Sensor is enabled */ 5200 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5201 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5202 mask |= IXGBE_EIMS_TS; 5203 mask |= IXGBE_EIMS_ECC; 5204 break; 5205 case ixgbe_mac_X550: 5206 /* MAC thermal sensor is automatically enabled */ 5207 mask |= IXGBE_EIMS_TS; 5208 mask |= IXGBE_EIMS_ECC; 5209 break; 5210 case ixgbe_mac_X550EM_x: 5211 case ixgbe_mac_X550EM_a: 5212 /* Some devices use SDP0 for important information */ 5213 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5214 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5215 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5216 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5217 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5218 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5219 mask |= IXGBE_EICR_GPI_SDP0_X540; 5220 mask |= IXGBE_EIMS_ECC; 5221 break; 5222 default: 5223 break; 5224 } 5225 5226 /* Enable Fan Failure detection */ 5227 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5228 mask |= IXGBE_EIMS_GPI_SDP1; 5229 /* Enable SR-IOV */ 5230 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5231 mask |= IXGBE_EIMS_MAILBOX; 5232 /* Enable Flow Director */ 5233 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5234 mask |= IXGBE_EIMS_FLOW_DIR; 5235 5236 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5237 5238 /* With MSI-X we use auto clear */ 5239 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5240 /* 5241 * We use auto clear for RTX_QUEUE only. Don't use other 5242 * interrupts (e.g. link interrupt). BTW, we don't use 5243 * TCP_TIMER interrupt itself. 5244 */ 5245 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5246 } 5247 5248 /* 5249 * Now enable all queues, this is done separately to 5250 * allow for handling the extended (beyond 32) MSI-X 5251 * vectors that can be used by 82599 5252 */ 5253 for (int i = 0; i < sc->num_queues; i++, que++) 5254 ixgbe_enable_queue(sc, que->msix); 5255 5256 IXGBE_WRITE_FLUSH(hw); 5257 5258 } /* ixgbe_enable_intr */ 5259 5260 /************************************************************************ 5261 * ixgbe_disable_intr_internal 5262 ************************************************************************/ 5263 static void 5264 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5265 { 5266 struct ix_queue *que = sc->queues; 5267 5268 /* disable interrupts other than queues */ 5269 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5270 5271 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5272 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5273 5274 for (int i = 0; i < sc->num_queues; i++, que++) 5275 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5276 5277 IXGBE_WRITE_FLUSH(&sc->hw); 5278 5279 } /* ixgbe_do_disable_intr_internal */ 5280 5281 /************************************************************************ 5282 * ixgbe_disable_intr 5283 ************************************************************************/ 5284 static void 5285 ixgbe_disable_intr(struct ixgbe_softc *sc) 5286 { 5287 5288 ixgbe_disable_intr_internal(sc, true); 5289 } /* ixgbe_disable_intr */ 5290 5291 /************************************************************************ 5292 * ixgbe_ensure_disabled_intr 5293 ************************************************************************/ 5294 void 5295 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5296 { 5297 5298 ixgbe_disable_intr_internal(sc, false); 5299 } /* ixgbe_ensure_disabled_intr */ 5300 5301 /************************************************************************ 5302 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5303 ************************************************************************/ 5304 static int 5305 ixgbe_legacy_irq(void *arg) 5306 { 5307 struct ix_queue *que = arg; 5308 struct ixgbe_softc *sc = que->sc; 5309 struct ixgbe_hw *hw = &sc->hw; 5310 struct ifnet *ifp = sc->ifp; 5311 struct tx_ring *txr = sc->tx_rings; 5312 u32 eicr; 5313 u32 eims_orig; 5314 u32 eims_enable = 0; 5315 u32 eims_disable = 0; 5316 5317 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5318 /* 5319 * Silicon errata #26 on 82598. Disable all interrupts before reading 5320 * EICR. 5321 */ 5322 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5323 5324 /* Read and clear EICR */ 5325 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5326 5327 if (eicr == 0) { 5328 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5329 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5330 return 0; 5331 } 5332 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5333 5334 /* Queue (0) intr */ 5335 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5336 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5337 IXGBE_EVC_ADD(&que->irqs, 1); 5338 5339 /* 5340 * The same as ixgbe_msix_que() about 5341 * "que->txrx_use_workqueue". 5342 */ 5343 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5344 5345 IXGBE_TX_LOCK(txr); 5346 ixgbe_txeof(txr); 5347 #ifdef notyet 5348 if (!ixgbe_ring_empty(ifp, txr->br)) 5349 ixgbe_start_locked(ifp, txr); 5350 #endif 5351 IXGBE_TX_UNLOCK(txr); 5352 5353 IXGBE_EVC_ADD(&que->req, 1); 5354 ixgbe_sched_handle_que(sc, que); 5355 /* Disable queue 0 interrupt */ 5356 eims_disable |= 1UL << 0; 5357 } else 5358 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5359 5360 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5361 5362 /* Re-enable some interrupts */ 5363 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5364 (eims_orig & ~eims_disable) | eims_enable); 5365 5366 return 1; 5367 } /* ixgbe_legacy_irq */ 5368 5369 /************************************************************************ 5370 * ixgbe_free_pciintr_resources 5371 ************************************************************************/ 5372 static void 5373 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5374 { 5375 struct ix_queue *que = sc->queues; 5376 int rid; 5377 5378 /* 5379 * Release all msix queue resources: 5380 */ 5381 for (int i = 0; i < sc->num_queues; i++, que++) { 5382 if (que->res != NULL) { 5383 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5384 sc->osdep.ihs[i] = NULL; 5385 } 5386 } 5387 5388 /* Clean the Legacy or Link interrupt last */ 5389 if (sc->vector) /* we are doing MSIX */ 5390 rid = sc->vector; 5391 else 5392 rid = 0; 5393 5394 if (sc->osdep.ihs[rid] != NULL) { 5395 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5396 sc->osdep.ihs[rid] = NULL; 5397 } 5398 5399 if (sc->osdep.intrs != NULL) { 5400 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5401 sc->osdep.nintrs); 5402 sc->osdep.intrs = NULL; 5403 } 5404 } /* ixgbe_free_pciintr_resources */ 5405 5406 /************************************************************************ 5407 * ixgbe_free_pci_resources 5408 ************************************************************************/ 5409 static void 5410 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5411 { 5412 5413 ixgbe_free_pciintr_resources(sc); 5414 5415 if (sc->osdep.mem_size != 0) { 5416 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5417 sc->osdep.mem_bus_space_handle, 5418 sc->osdep.mem_size); 5419 } 5420 } /* ixgbe_free_pci_resources */ 5421 5422 /************************************************************************ 5423 * ixgbe_sysctl_flowcntl 5424 * 5425 * SYSCTL wrapper around setting Flow Control 5426 ************************************************************************/ 5427 static int 5428 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5429 { 5430 struct sysctlnode node = *rnode; 5431 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5432 int error, fc; 5433 5434 if (ixgbe_fw_recovery_mode_swflag(sc)) 5435 return (EPERM); 5436 5437 fc = sc->hw.fc.current_mode; 5438 node.sysctl_data = &fc; 5439 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5440 if (error != 0 || newp == NULL) 5441 return error; 5442 5443 /* Don't bother if it's not changed */ 5444 if (fc == sc->hw.fc.current_mode) 5445 return (0); 5446 5447 return ixgbe_set_flowcntl(sc, fc); 5448 } /* ixgbe_sysctl_flowcntl */ 5449 5450 /************************************************************************ 5451 * ixgbe_set_flowcntl - Set flow control 5452 * 5453 * Flow control values: 5454 * 0 - off 5455 * 1 - rx pause 5456 * 2 - tx pause 5457 * 3 - full 5458 ************************************************************************/ 5459 static int 5460 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5461 { 5462 switch (fc) { 5463 case ixgbe_fc_rx_pause: 5464 case ixgbe_fc_tx_pause: 5465 case ixgbe_fc_full: 5466 sc->hw.fc.requested_mode = fc; 5467 if (sc->num_queues > 1) 5468 ixgbe_disable_rx_drop(sc); 5469 break; 5470 case ixgbe_fc_none: 5471 sc->hw.fc.requested_mode = ixgbe_fc_none; 5472 if (sc->num_queues > 1) 5473 ixgbe_enable_rx_drop(sc); 5474 break; 5475 default: 5476 return (EINVAL); 5477 } 5478 5479 #if 0 /* XXX NetBSD */ 5480 /* Don't autoneg if forcing a value */ 5481 sc->hw.fc.disable_fc_autoneg = TRUE; 5482 #endif 5483 ixgbe_fc_enable(&sc->hw); 5484 5485 return (0); 5486 } /* ixgbe_set_flowcntl */ 5487 5488 /************************************************************************ 5489 * ixgbe_enable_rx_drop 5490 * 5491 * Enable the hardware to drop packets when the buffer is 5492 * full. This is useful with multiqueue, so that no single 5493 * queue being full stalls the entire RX engine. We only 5494 * enable this when Multiqueue is enabled AND Flow Control 5495 * is disabled. 5496 ************************************************************************/ 5497 static void 5498 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5499 { 5500 struct ixgbe_hw *hw = &sc->hw; 5501 struct rx_ring *rxr; 5502 u32 srrctl; 5503 5504 for (int i = 0; i < sc->num_queues; i++) { 5505 rxr = &sc->rx_rings[i]; 5506 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5507 srrctl |= IXGBE_SRRCTL_DROP_EN; 5508 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5509 } 5510 5511 /* enable drop for each vf */ 5512 for (int i = 0; i < sc->num_vfs; i++) { 5513 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5514 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5515 IXGBE_QDE_ENABLE)); 5516 } 5517 } /* ixgbe_enable_rx_drop */ 5518 5519 /************************************************************************ 5520 * ixgbe_disable_rx_drop 5521 ************************************************************************/ 5522 static void 5523 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5524 { 5525 struct ixgbe_hw *hw = &sc->hw; 5526 struct rx_ring *rxr; 5527 u32 srrctl; 5528 5529 for (int i = 0; i < sc->num_queues; i++) { 5530 rxr = &sc->rx_rings[i]; 5531 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5532 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5533 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5534 } 5535 5536 /* disable drop for each vf */ 5537 for (int i = 0; i < sc->num_vfs; i++) { 5538 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5539 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5540 } 5541 } /* ixgbe_disable_rx_drop */ 5542 5543 /************************************************************************ 5544 * ixgbe_sysctl_advertise 5545 * 5546 * SYSCTL wrapper around setting advertised speed 5547 ************************************************************************/ 5548 static int 5549 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5550 { 5551 struct sysctlnode node = *rnode; 5552 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5553 int error = 0, advertise; 5554 5555 if (ixgbe_fw_recovery_mode_swflag(sc)) 5556 return (EPERM); 5557 5558 advertise = sc->advertise; 5559 node.sysctl_data = &advertise; 5560 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5561 if (error != 0 || newp == NULL) 5562 return error; 5563 5564 return ixgbe_set_advertise(sc, advertise); 5565 } /* ixgbe_sysctl_advertise */ 5566 5567 /************************************************************************ 5568 * ixgbe_set_advertise - Control advertised link speed 5569 * 5570 * Flags: 5571 * 0x00 - Default (all capable link speed) 5572 * 0x1 - advertise 100 Mb 5573 * 0x2 - advertise 1G 5574 * 0x4 - advertise 10G 5575 * 0x8 - advertise 10 Mb (yes, Mb) 5576 * 0x10 - advertise 2.5G 5577 * 0x20 - advertise 5G 5578 ************************************************************************/ 5579 static int 5580 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5581 { 5582 device_t dev; 5583 struct ixgbe_hw *hw; 5584 ixgbe_link_speed speed = 0; 5585 ixgbe_link_speed link_caps = 0; 5586 s32 err = IXGBE_NOT_IMPLEMENTED; 5587 bool negotiate = FALSE; 5588 5589 /* Checks to validate new value */ 5590 if (sc->advertise == advertise) /* no change */ 5591 return (0); 5592 5593 dev = sc->dev; 5594 hw = &sc->hw; 5595 5596 /* No speed changes for backplane media */ 5597 if (hw->phy.media_type == ixgbe_media_type_backplane) 5598 return (ENODEV); 5599 5600 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5601 (hw->phy.multispeed_fiber))) { 5602 device_printf(dev, 5603 "Advertised speed can only be set on copper or " 5604 "multispeed fiber media types.\n"); 5605 return (EINVAL); 5606 } 5607 5608 if (advertise < 0x0 || advertise > 0x3f) { 5609 device_printf(dev, "Invalid advertised speed; " 5610 "valid modes are 0x0 through 0x3f\n"); 5611 return (EINVAL); 5612 } 5613 5614 if (hw->mac.ops.get_link_capabilities) { 5615 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5616 &negotiate); 5617 if (err != IXGBE_SUCCESS) { 5618 device_printf(dev, "Unable to determine supported " 5619 "advertise speeds\n"); 5620 return (ENODEV); 5621 } 5622 } 5623 5624 /* Set new value and report new advertised mode */ 5625 if (advertise & 0x1) { 5626 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5627 device_printf(dev, "Interface does not support 100Mb " 5628 "advertised speed\n"); 5629 return (EINVAL); 5630 } 5631 speed |= IXGBE_LINK_SPEED_100_FULL; 5632 } 5633 if (advertise & 0x2) { 5634 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5635 device_printf(dev, "Interface does not support 1Gb " 5636 "advertised speed\n"); 5637 return (EINVAL); 5638 } 5639 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5640 } 5641 if (advertise & 0x4) { 5642 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5643 device_printf(dev, "Interface does not support 10Gb " 5644 "advertised speed\n"); 5645 return (EINVAL); 5646 } 5647 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5648 } 5649 if (advertise & 0x8) { 5650 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5651 device_printf(dev, "Interface does not support 10Mb " 5652 "advertised speed\n"); 5653 return (EINVAL); 5654 } 5655 speed |= IXGBE_LINK_SPEED_10_FULL; 5656 } 5657 if (advertise & 0x10) { 5658 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5659 device_printf(dev, "Interface does not support 2.5Gb " 5660 "advertised speed\n"); 5661 return (EINVAL); 5662 } 5663 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5664 } 5665 if (advertise & 0x20) { 5666 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5667 device_printf(dev, "Interface does not support 5Gb " 5668 "advertised speed\n"); 5669 return (EINVAL); 5670 } 5671 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5672 } 5673 if (advertise == 0) 5674 speed = link_caps; /* All capable link speed */ 5675 5676 hw->mac.autotry_restart = TRUE; 5677 hw->mac.ops.setup_link(hw, speed, TRUE); 5678 sc->advertise = advertise; 5679 5680 return (0); 5681 } /* ixgbe_set_advertise */ 5682 5683 /************************************************************************ 5684 * ixgbe_get_default_advertise - Get default advertised speed settings 5685 * 5686 * Formatted for sysctl usage. 5687 * Flags: 5688 * 0x1 - advertise 100 Mb 5689 * 0x2 - advertise 1G 5690 * 0x4 - advertise 10G 5691 * 0x8 - advertise 10 Mb (yes, Mb) 5692 * 0x10 - advertise 2.5G 5693 * 0x20 - advertise 5G 5694 ************************************************************************/ 5695 static int 5696 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5697 { 5698 struct ixgbe_hw *hw = &sc->hw; 5699 int speed; 5700 ixgbe_link_speed link_caps = 0; 5701 s32 err; 5702 bool negotiate = FALSE; 5703 5704 /* 5705 * Advertised speed means nothing unless it's copper or 5706 * multi-speed fiber 5707 */ 5708 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5709 !(hw->phy.multispeed_fiber)) 5710 return (0); 5711 5712 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5713 if (err != IXGBE_SUCCESS) 5714 return (0); 5715 5716 speed = 5717 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5718 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5719 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5720 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5721 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5722 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5723 5724 return speed; 5725 } /* ixgbe_get_default_advertise */ 5726 5727 /************************************************************************ 5728 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5729 * 5730 * Control values: 5731 * 0/1 - off / on (use default value of 1000) 5732 * 5733 * Legal timer values are: 5734 * 50,100,250,500,1000,2000,5000,10000 5735 * 5736 * Turning off interrupt moderation will also turn this off. 5737 ************************************************************************/ 5738 static int 5739 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5740 { 5741 struct sysctlnode node = *rnode; 5742 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5743 struct ifnet *ifp = sc->ifp; 5744 int error; 5745 int newval; 5746 5747 if (ixgbe_fw_recovery_mode_swflag(sc)) 5748 return (EPERM); 5749 5750 newval = sc->dmac; 5751 node.sysctl_data = &newval; 5752 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5753 if ((error) || (newp == NULL)) 5754 return (error); 5755 5756 switch (newval) { 5757 case 0: 5758 /* Disabled */ 5759 sc->dmac = 0; 5760 break; 5761 case 1: 5762 /* Enable and use default */ 5763 sc->dmac = 1000; 5764 break; 5765 case 50: 5766 case 100: 5767 case 250: 5768 case 500: 5769 case 1000: 5770 case 2000: 5771 case 5000: 5772 case 10000: 5773 /* Legal values - allow */ 5774 sc->dmac = newval; 5775 break; 5776 default: 5777 /* Do nothing, illegal value */ 5778 return (EINVAL); 5779 } 5780 5781 /* Re-initialize hardware if it's already running */ 5782 if (ifp->if_flags & IFF_RUNNING) 5783 if_init(ifp); 5784 5785 return (0); 5786 } 5787 5788 #ifdef IXGBE_DEBUG 5789 /************************************************************************ 5790 * ixgbe_sysctl_power_state 5791 * 5792 * Sysctl to test power states 5793 * Values: 5794 * 0 - set device to D0 5795 * 3 - set device to D3 5796 * (none) - get current device power state 5797 ************************************************************************/ 5798 static int 5799 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5800 { 5801 #ifdef notyet 5802 struct sysctlnode node = *rnode; 5803 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5804 device_t dev = sc->dev; 5805 int curr_ps, new_ps, error = 0; 5806 5807 if (ixgbe_fw_recovery_mode_swflag(sc)) 5808 return (EPERM); 5809 5810 curr_ps = new_ps = pci_get_powerstate(dev); 5811 5812 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5813 if ((error) || (req->newp == NULL)) 5814 return (error); 5815 5816 if (new_ps == curr_ps) 5817 return (0); 5818 5819 if (new_ps == 3 && curr_ps == 0) 5820 error = DEVICE_SUSPEND(dev); 5821 else if (new_ps == 0 && curr_ps == 3) 5822 error = DEVICE_RESUME(dev); 5823 else 5824 return (EINVAL); 5825 5826 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5827 5828 return (error); 5829 #else 5830 return 0; 5831 #endif 5832 } /* ixgbe_sysctl_power_state */ 5833 #endif 5834 5835 /************************************************************************ 5836 * ixgbe_sysctl_wol_enable 5837 * 5838 * Sysctl to enable/disable the WoL capability, 5839 * if supported by the adapter. 5840 * 5841 * Values: 5842 * 0 - disabled 5843 * 1 - enabled 5844 ************************************************************************/ 5845 static int 5846 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5847 { 5848 struct sysctlnode node = *rnode; 5849 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5850 struct ixgbe_hw *hw = &sc->hw; 5851 bool new_wol_enabled; 5852 int error = 0; 5853 5854 /* 5855 * It's not required to check recovery mode because this function never 5856 * touches hardware. 5857 */ 5858 new_wol_enabled = hw->wol_enabled; 5859 node.sysctl_data = &new_wol_enabled; 5860 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5861 if ((error) || (newp == NULL)) 5862 return (error); 5863 if (new_wol_enabled == hw->wol_enabled) 5864 return (0); 5865 5866 if (new_wol_enabled && !sc->wol_support) 5867 return (ENODEV); 5868 else 5869 hw->wol_enabled = new_wol_enabled; 5870 5871 return (0); 5872 } /* ixgbe_sysctl_wol_enable */ 5873 5874 /************************************************************************ 5875 * ixgbe_sysctl_wufc - Wake Up Filter Control 5876 * 5877 * Sysctl to enable/disable the types of packets that the 5878 * adapter will wake up on upon receipt. 5879 * Flags: 5880 * 0x1 - Link Status Change 5881 * 0x2 - Magic Packet 5882 * 0x4 - Direct Exact 5883 * 0x8 - Directed Multicast 5884 * 0x10 - Broadcast 5885 * 0x20 - ARP/IPv4 Request Packet 5886 * 0x40 - Direct IPv4 Packet 5887 * 0x80 - Direct IPv6 Packet 5888 * 5889 * Settings not listed above will cause the sysctl to return an error. 5890 ************************************************************************/ 5891 static int 5892 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5893 { 5894 struct sysctlnode node = *rnode; 5895 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5896 int error = 0; 5897 u32 new_wufc; 5898 5899 /* 5900 * It's not required to check recovery mode because this function never 5901 * touches hardware. 5902 */ 5903 new_wufc = sc->wufc; 5904 node.sysctl_data = &new_wufc; 5905 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5906 if ((error) || (newp == NULL)) 5907 return (error); 5908 if (new_wufc == sc->wufc) 5909 return (0); 5910 5911 if (new_wufc & 0xffffff00) 5912 return (EINVAL); 5913 5914 new_wufc &= 0xff; 5915 new_wufc |= (0xffffff & sc->wufc); 5916 sc->wufc = new_wufc; 5917 5918 return (0); 5919 } /* ixgbe_sysctl_wufc */ 5920 5921 #ifdef IXGBE_DEBUG 5922 /************************************************************************ 5923 * ixgbe_sysctl_print_rss_config 5924 ************************************************************************/ 5925 static int 5926 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5927 { 5928 #ifdef notyet 5929 struct sysctlnode node = *rnode; 5930 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5931 struct ixgbe_hw *hw = &sc->hw; 5932 device_t dev = sc->dev; 5933 struct sbuf *buf; 5934 int error = 0, reta_size; 5935 u32 reg; 5936 5937 if (ixgbe_fw_recovery_mode_swflag(sc)) 5938 return (EPERM); 5939 5940 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5941 if (!buf) { 5942 device_printf(dev, "Could not allocate sbuf for output.\n"); 5943 return (ENOMEM); 5944 } 5945 5946 // TODO: use sbufs to make a string to print out 5947 /* Set multiplier for RETA setup and table size based on MAC */ 5948 switch (sc->hw.mac.type) { 5949 case ixgbe_mac_X550: 5950 case ixgbe_mac_X550EM_x: 5951 case ixgbe_mac_X550EM_a: 5952 reta_size = 128; 5953 break; 5954 default: 5955 reta_size = 32; 5956 break; 5957 } 5958 5959 /* Print out the redirection table */ 5960 sbuf_cat(buf, "\n"); 5961 for (int i = 0; i < reta_size; i++) { 5962 if (i < 32) { 5963 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5964 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5965 } else { 5966 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5967 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5968 } 5969 } 5970 5971 // TODO: print more config 5972 5973 error = sbuf_finish(buf); 5974 if (error) 5975 device_printf(dev, "Error finishing sbuf: %d\n", error); 5976 5977 sbuf_delete(buf); 5978 #endif 5979 return (0); 5980 } /* ixgbe_sysctl_print_rss_config */ 5981 #endif /* IXGBE_DEBUG */ 5982 5983 /************************************************************************ 5984 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5985 * 5986 * For X552/X557-AT devices using an external PHY 5987 ************************************************************************/ 5988 static int 5989 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5990 { 5991 struct sysctlnode node = *rnode; 5992 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5993 struct ixgbe_hw *hw = &sc->hw; 5994 int val; 5995 u16 reg; 5996 int error; 5997 5998 if (ixgbe_fw_recovery_mode_swflag(sc)) 5999 return (EPERM); 6000 6001 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6002 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6003 device_printf(sc->dev, 6004 "Device has no supported external thermal sensor.\n"); 6005 return (ENODEV); 6006 } 6007 6008 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6009 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6010 device_printf(sc->dev, 6011 "Error reading from PHY's current temperature register\n"); 6012 return (EAGAIN); 6013 } 6014 6015 node.sysctl_data = &val; 6016 6017 /* Shift temp for output */ 6018 val = reg >> 8; 6019 6020 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6021 if ((error) || (newp == NULL)) 6022 return (error); 6023 6024 return (0); 6025 } /* ixgbe_sysctl_phy_temp */ 6026 6027 /************************************************************************ 6028 * ixgbe_sysctl_phy_overtemp_occurred 6029 * 6030 * Reports (directly from the PHY) whether the current PHY 6031 * temperature is over the overtemp threshold. 6032 ************************************************************************/ 6033 static int 6034 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6035 { 6036 struct sysctlnode node = *rnode; 6037 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6038 struct ixgbe_hw *hw = &sc->hw; 6039 int val, error; 6040 u16 reg; 6041 6042 if (ixgbe_fw_recovery_mode_swflag(sc)) 6043 return (EPERM); 6044 6045 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6046 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)){ 6047 device_printf(sc->dev, 6048 "Device has no supported external thermal sensor.\n"); 6049 return (ENODEV); 6050 } 6051 6052 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6053 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6054 device_printf(sc->dev, 6055 "Error reading from PHY's temperature status register\n"); 6056 return (EAGAIN); 6057 } 6058 6059 node.sysctl_data = &val; 6060 6061 /* Get occurrence bit */ 6062 val = !!(reg & 0x4000); 6063 6064 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6065 if ((error) || (newp == NULL)) 6066 return (error); 6067 6068 return (0); 6069 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6070 6071 /************************************************************************ 6072 * ixgbe_sysctl_eee_state 6073 * 6074 * Sysctl to set EEE power saving feature 6075 * Values: 6076 * 0 - disable EEE 6077 * 1 - enable EEE 6078 * (none) - get current device EEE state 6079 ************************************************************************/ 6080 static int 6081 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6082 { 6083 struct sysctlnode node = *rnode; 6084 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6085 struct ifnet *ifp = sc->ifp; 6086 device_t dev = sc->dev; 6087 int curr_eee, new_eee, error = 0; 6088 s32 retval; 6089 6090 if (ixgbe_fw_recovery_mode_swflag(sc)) 6091 return (EPERM); 6092 6093 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6094 node.sysctl_data = &new_eee; 6095 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6096 if ((error) || (newp == NULL)) 6097 return (error); 6098 6099 /* Nothing to do */ 6100 if (new_eee == curr_eee) 6101 return (0); 6102 6103 /* Not supported */ 6104 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6105 return (EINVAL); 6106 6107 /* Bounds checking */ 6108 if ((new_eee < 0) || (new_eee > 1)) 6109 return (EINVAL); 6110 6111 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6112 if (retval) { 6113 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6114 return (EINVAL); 6115 } 6116 6117 /* Restart auto-neg */ 6118 if_init(ifp); 6119 6120 device_printf(dev, "New EEE state: %d\n", new_eee); 6121 6122 /* Cache new value */ 6123 if (new_eee) 6124 sc->feat_en |= IXGBE_FEATURE_EEE; 6125 else 6126 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6127 6128 return (error); 6129 } /* ixgbe_sysctl_eee_state */ 6130 6131 #define PRINTQS(sc, regname) \ 6132 do { \ 6133 struct ixgbe_hw *_hw = &(sc)->hw; \ 6134 int _i; \ 6135 \ 6136 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6137 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6138 printf((_i == 0) ? "\t" : " "); \ 6139 printf("%08x", IXGBE_READ_REG(_hw, \ 6140 IXGBE_##regname(_i))); \ 6141 } \ 6142 printf("\n"); \ 6143 } while (0) 6144 6145 /************************************************************************ 6146 * ixgbe_print_debug_info 6147 * 6148 * Called only when em_display_debug_stats is enabled. 6149 * Provides a way to take a look at important statistics 6150 * maintained by the driver and hardware. 6151 ************************************************************************/ 6152 static void 6153 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6154 { 6155 device_t dev = sc->dev; 6156 struct ixgbe_hw *hw = &sc->hw; 6157 int table_size; 6158 int i; 6159 6160 switch (sc->hw.mac.type) { 6161 case ixgbe_mac_X550: 6162 case ixgbe_mac_X550EM_x: 6163 case ixgbe_mac_X550EM_a: 6164 table_size = 128; 6165 break; 6166 default: 6167 table_size = 32; 6168 break; 6169 } 6170 6171 device_printf(dev, "[E]RETA:\n"); 6172 for (i = 0; i < table_size; i++) { 6173 if (i < 32) 6174 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6175 IXGBE_RETA(i))); 6176 else 6177 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6178 IXGBE_ERETA(i - 32))); 6179 } 6180 6181 device_printf(dev, "queue:"); 6182 for (i = 0; i < sc->num_queues; i++) { 6183 printf((i == 0) ? "\t" : " "); 6184 printf("%8d", i); 6185 } 6186 printf("\n"); 6187 PRINTQS(sc, RDBAL); 6188 PRINTQS(sc, RDBAH); 6189 PRINTQS(sc, RDLEN); 6190 PRINTQS(sc, SRRCTL); 6191 PRINTQS(sc, RDH); 6192 PRINTQS(sc, RDT); 6193 PRINTQS(sc, RXDCTL); 6194 6195 device_printf(dev, "RQSMR:"); 6196 for (i = 0; i < sc->num_queues / 4; i++) { 6197 printf((i == 0) ? "\t" : " "); 6198 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6199 } 6200 printf("\n"); 6201 6202 device_printf(dev, "disabled_count:"); 6203 for (i = 0; i < sc->num_queues; i++) { 6204 printf((i == 0) ? "\t" : " "); 6205 printf("%8d", sc->queues[i].disabled_count); 6206 } 6207 printf("\n"); 6208 6209 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6210 if (hw->mac.type != ixgbe_mac_82598EB) { 6211 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6212 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6213 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6214 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6215 } 6216 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6217 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6218 } /* ixgbe_print_debug_info */ 6219 6220 /************************************************************************ 6221 * ixgbe_sysctl_debug 6222 ************************************************************************/ 6223 static int 6224 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6225 { 6226 struct sysctlnode node = *rnode; 6227 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6228 int error, result = 0; 6229 6230 if (ixgbe_fw_recovery_mode_swflag(sc)) 6231 return (EPERM); 6232 6233 node.sysctl_data = &result; 6234 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6235 6236 if (error || newp == NULL) 6237 return error; 6238 6239 if (result == 1) 6240 ixgbe_print_debug_info(sc); 6241 6242 return 0; 6243 } /* ixgbe_sysctl_debug */ 6244 6245 /************************************************************************ 6246 * ixgbe_sysctl_rx_copy_len 6247 ************************************************************************/ 6248 static int 6249 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6250 { 6251 struct sysctlnode node = *rnode; 6252 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6253 int error; 6254 int result = sc->rx_copy_len; 6255 6256 node.sysctl_data = &result; 6257 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6258 6259 if (error || newp == NULL) 6260 return error; 6261 6262 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6263 return EINVAL; 6264 6265 sc->rx_copy_len = result; 6266 6267 return 0; 6268 } /* ixgbe_sysctl_rx_copy_len */ 6269 6270 /************************************************************************ 6271 * ixgbe_sysctl_tx_process_limit 6272 ************************************************************************/ 6273 static int 6274 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6275 { 6276 struct sysctlnode node = *rnode; 6277 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6278 int error; 6279 int result = sc->tx_process_limit; 6280 6281 node.sysctl_data = &result; 6282 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6283 6284 if (error || newp == NULL) 6285 return error; 6286 6287 if ((result <= 0) || (result > sc->num_tx_desc)) 6288 return EINVAL; 6289 6290 sc->tx_process_limit = result; 6291 6292 return 0; 6293 } /* ixgbe_sysctl_tx_process_limit */ 6294 6295 /************************************************************************ 6296 * ixgbe_sysctl_rx_process_limit 6297 ************************************************************************/ 6298 static int 6299 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6300 { 6301 struct sysctlnode node = *rnode; 6302 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6303 int error; 6304 int result = sc->rx_process_limit; 6305 6306 node.sysctl_data = &result; 6307 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6308 6309 if (error || newp == NULL) 6310 return error; 6311 6312 if ((result <= 0) || (result > sc->num_rx_desc)) 6313 return EINVAL; 6314 6315 sc->rx_process_limit = result; 6316 6317 return 0; 6318 } /* ixgbe_sysctl_rx_process_limit */ 6319 6320 /************************************************************************ 6321 * ixgbe_init_device_features 6322 ************************************************************************/ 6323 static void 6324 ixgbe_init_device_features(struct ixgbe_softc *sc) 6325 { 6326 sc->feat_cap = IXGBE_FEATURE_NETMAP 6327 | IXGBE_FEATURE_RSS 6328 | IXGBE_FEATURE_MSI 6329 | IXGBE_FEATURE_MSIX 6330 | IXGBE_FEATURE_LEGACY_IRQ 6331 | IXGBE_FEATURE_LEGACY_TX; 6332 6333 /* Set capabilities first... */ 6334 switch (sc->hw.mac.type) { 6335 case ixgbe_mac_82598EB: 6336 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6337 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6338 break; 6339 case ixgbe_mac_X540: 6340 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6341 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6342 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6343 (sc->hw.bus.func == 0)) 6344 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6345 break; 6346 case ixgbe_mac_X550: 6347 /* 6348 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6349 * NVM Image version. 6350 */ 6351 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6352 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6353 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6354 break; 6355 case ixgbe_mac_X550EM_x: 6356 /* 6357 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6358 * NVM Image version. 6359 */ 6360 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6361 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6362 break; 6363 case ixgbe_mac_X550EM_a: 6364 /* 6365 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6366 * NVM Image version. 6367 */ 6368 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6369 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6370 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6371 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6372 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6373 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6374 sc->feat_cap |= IXGBE_FEATURE_EEE; 6375 } 6376 break; 6377 case ixgbe_mac_82599EB: 6378 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6379 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6380 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6381 (sc->hw.bus.func == 0)) 6382 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6383 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6384 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6385 break; 6386 default: 6387 break; 6388 } 6389 6390 /* Enabled by default... */ 6391 /* Fan failure detection */ 6392 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6393 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6394 /* Netmap */ 6395 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6396 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6397 /* EEE */ 6398 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6399 sc->feat_en |= IXGBE_FEATURE_EEE; 6400 /* Thermal Sensor */ 6401 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6402 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6403 /* 6404 * Recovery mode: 6405 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6406 * NVM Image version. 6407 */ 6408 6409 /* Enabled via global sysctl... */ 6410 /* Flow Director */ 6411 if (ixgbe_enable_fdir) { 6412 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6413 sc->feat_en |= IXGBE_FEATURE_FDIR; 6414 else 6415 device_printf(sc->dev, "Device does not support " 6416 "Flow Director. Leaving disabled."); 6417 } 6418 /* Legacy (single queue) transmit */ 6419 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6420 ixgbe_enable_legacy_tx) 6421 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6422 /* 6423 * Message Signal Interrupts - Extended (MSI-X) 6424 * Normal MSI is only enabled if MSI-X calls fail. 6425 */ 6426 if (!ixgbe_enable_msix) 6427 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6428 /* Receive-Side Scaling (RSS) */ 6429 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6430 sc->feat_en |= IXGBE_FEATURE_RSS; 6431 6432 /* Disable features with unmet dependencies... */ 6433 /* No MSI-X */ 6434 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6435 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6436 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6437 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6438 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6439 } 6440 } /* ixgbe_init_device_features */ 6441 6442 /************************************************************************ 6443 * ixgbe_probe - Device identification routine 6444 * 6445 * Determines if the driver should be loaded on 6446 * adapter based on its PCI vendor/device ID. 6447 * 6448 * return BUS_PROBE_DEFAULT on success, positive on failure 6449 ************************************************************************/ 6450 static int 6451 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6452 { 6453 const struct pci_attach_args *pa = aux; 6454 6455 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6456 } 6457 6458 static const ixgbe_vendor_info_t * 6459 ixgbe_lookup(const struct pci_attach_args *pa) 6460 { 6461 const ixgbe_vendor_info_t *ent; 6462 pcireg_t subid; 6463 6464 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6465 6466 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6467 return NULL; 6468 6469 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6470 6471 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6472 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6473 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6474 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6475 (ent->subvendor_id == 0)) && 6476 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6477 (ent->subdevice_id == 0))) { 6478 return ent; 6479 } 6480 } 6481 return NULL; 6482 } 6483 6484 static int 6485 ixgbe_ifflags_cb(struct ethercom *ec) 6486 { 6487 struct ifnet *ifp = &ec->ec_if; 6488 struct ixgbe_softc *sc = ifp->if_softc; 6489 u_short change; 6490 int rv = 0; 6491 6492 IXGBE_CORE_LOCK(sc); 6493 6494 change = ifp->if_flags ^ sc->if_flags; 6495 if (change != 0) 6496 sc->if_flags = ifp->if_flags; 6497 6498 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6499 rv = ENETRESET; 6500 goto out; 6501 } else if ((change & IFF_PROMISC) != 0) 6502 ixgbe_set_rxfilter(sc); 6503 6504 /* Check for ec_capenable. */ 6505 change = ec->ec_capenable ^ sc->ec_capenable; 6506 sc->ec_capenable = ec->ec_capenable; 6507 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6508 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6509 rv = ENETRESET; 6510 goto out; 6511 } 6512 6513 /* 6514 * Special handling is not required for ETHERCAP_VLAN_MTU. 6515 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6516 */ 6517 6518 /* Set up VLAN support and filter */ 6519 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6520 ixgbe_setup_vlan_hw_support(sc); 6521 6522 out: 6523 IXGBE_CORE_UNLOCK(sc); 6524 6525 return rv; 6526 } 6527 6528 /************************************************************************ 6529 * ixgbe_ioctl - Ioctl entry point 6530 * 6531 * Called when the user wants to configure the interface. 6532 * 6533 * return 0 on success, positive on failure 6534 ************************************************************************/ 6535 static int 6536 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6537 { 6538 struct ixgbe_softc *sc = ifp->if_softc; 6539 struct ixgbe_hw *hw = &sc->hw; 6540 struct ifcapreq *ifcr = data; 6541 struct ifreq *ifr = data; 6542 int error = 0; 6543 int l4csum_en; 6544 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6545 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6546 6547 if (ixgbe_fw_recovery_mode_swflag(sc)) 6548 return (EPERM); 6549 6550 switch (command) { 6551 case SIOCSIFFLAGS: 6552 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6553 break; 6554 case SIOCADDMULTI: 6555 case SIOCDELMULTI: 6556 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6557 break; 6558 case SIOCSIFMEDIA: 6559 case SIOCGIFMEDIA: 6560 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6561 break; 6562 case SIOCSIFCAP: 6563 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6564 break; 6565 case SIOCSIFMTU: 6566 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6567 break; 6568 #ifdef __NetBSD__ 6569 case SIOCINITIFADDR: 6570 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6571 break; 6572 case SIOCGIFFLAGS: 6573 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6574 break; 6575 case SIOCGIFAFLAG_IN: 6576 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6577 break; 6578 case SIOCGIFADDR: 6579 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6580 break; 6581 case SIOCGIFMTU: 6582 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6583 break; 6584 case SIOCGIFCAP: 6585 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6586 break; 6587 case SIOCGETHERCAP: 6588 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6589 break; 6590 case SIOCGLIFADDR: 6591 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6592 break; 6593 case SIOCZIFDATA: 6594 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6595 hw->mac.ops.clear_hw_cntrs(hw); 6596 ixgbe_clear_evcnt(sc); 6597 break; 6598 case SIOCAIFADDR: 6599 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6600 break; 6601 #endif 6602 default: 6603 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6604 break; 6605 } 6606 6607 switch (command) { 6608 case SIOCGI2C: 6609 { 6610 struct ixgbe_i2c_req i2c; 6611 6612 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6613 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6614 if (error != 0) 6615 break; 6616 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6617 error = EINVAL; 6618 break; 6619 } 6620 if (i2c.len > sizeof(i2c.data)) { 6621 error = EINVAL; 6622 break; 6623 } 6624 6625 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6626 i2c.dev_addr, i2c.data); 6627 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6628 break; 6629 } 6630 case SIOCSIFCAP: 6631 /* Layer-4 Rx checksum offload has to be turned on and 6632 * off as a unit. 6633 */ 6634 l4csum_en = ifcr->ifcr_capenable & l4csum; 6635 if (l4csum_en != l4csum && l4csum_en != 0) 6636 return EINVAL; 6637 /*FALLTHROUGH*/ 6638 case SIOCADDMULTI: 6639 case SIOCDELMULTI: 6640 case SIOCSIFFLAGS: 6641 case SIOCSIFMTU: 6642 default: 6643 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6644 return error; 6645 if ((ifp->if_flags & IFF_RUNNING) == 0) 6646 ; 6647 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6648 IXGBE_CORE_LOCK(sc); 6649 if ((ifp->if_flags & IFF_RUNNING) != 0) 6650 ixgbe_init_locked(sc); 6651 ixgbe_recalculate_max_frame(sc); 6652 IXGBE_CORE_UNLOCK(sc); 6653 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6654 /* 6655 * Multicast list has changed; set the hardware filter 6656 * accordingly. 6657 */ 6658 IXGBE_CORE_LOCK(sc); 6659 ixgbe_disable_intr(sc); 6660 ixgbe_set_rxfilter(sc); 6661 ixgbe_enable_intr(sc); 6662 IXGBE_CORE_UNLOCK(sc); 6663 } 6664 return 0; 6665 } 6666 6667 return error; 6668 } /* ixgbe_ioctl */ 6669 6670 /************************************************************************ 6671 * ixgbe_check_fan_failure 6672 ************************************************************************/ 6673 static int 6674 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6675 { 6676 u32 mask; 6677 6678 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6679 IXGBE_ESDP_SDP1; 6680 6681 if ((reg & mask) == 0) 6682 return IXGBE_SUCCESS; 6683 6684 /* 6685 * Use ratecheck() just in case interrupt occur frequently. 6686 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6687 * an red LED on the board turned on and link never up until 6688 * power off. 6689 */ 6690 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6691 device_printf(sc->dev, 6692 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6693 6694 return IXGBE_ERR_FAN_FAILURE; 6695 } /* ixgbe_check_fan_failure */ 6696 6697 /************************************************************************ 6698 * ixgbe_handle_que 6699 ************************************************************************/ 6700 static void 6701 ixgbe_handle_que(void *context) 6702 { 6703 struct ix_queue *que = context; 6704 struct ixgbe_softc *sc = que->sc; 6705 struct tx_ring *txr = que->txr; 6706 struct ifnet *ifp = sc->ifp; 6707 bool more = false; 6708 6709 IXGBE_EVC_ADD(&que->handleq, 1); 6710 6711 if (ifp->if_flags & IFF_RUNNING) { 6712 IXGBE_TX_LOCK(txr); 6713 more = ixgbe_txeof(txr); 6714 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6715 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6716 ixgbe_mq_start_locked(ifp, txr); 6717 /* Only for queue 0 */ 6718 /* NetBSD still needs this for CBQ */ 6719 if ((&sc->queues[0] == que) 6720 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6721 ixgbe_legacy_start_locked(ifp, txr); 6722 IXGBE_TX_UNLOCK(txr); 6723 more |= ixgbe_rxeof(que); 6724 } 6725 6726 if (more) { 6727 IXGBE_EVC_ADD(&que->req, 1); 6728 ixgbe_sched_handle_que(sc, que); 6729 } else if (que->res != NULL) { 6730 /* MSIX: Re-enable this interrupt */ 6731 ixgbe_enable_queue(sc, que->msix); 6732 } else { 6733 /* INTx or MSI */ 6734 ixgbe_enable_queue(sc, 0); 6735 } 6736 6737 return; 6738 } /* ixgbe_handle_que */ 6739 6740 /************************************************************************ 6741 * ixgbe_handle_que_work 6742 ************************************************************************/ 6743 static void 6744 ixgbe_handle_que_work(struct work *wk, void *context) 6745 { 6746 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6747 6748 /* 6749 * "enqueued flag" is not required here. 6750 * See ixgbe_msix_que(). 6751 */ 6752 ixgbe_handle_que(que); 6753 } 6754 6755 /************************************************************************ 6756 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6757 ************************************************************************/ 6758 static int 6759 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6760 const struct pci_attach_args *pa) 6761 { 6762 device_t dev = sc->dev; 6763 struct ix_queue *que = sc->queues; 6764 struct tx_ring *txr = sc->tx_rings; 6765 int counts[PCI_INTR_TYPE_SIZE]; 6766 pci_intr_type_t intr_type, max_type; 6767 char intrbuf[PCI_INTRSTR_LEN]; 6768 char wqname[MAXCOMLEN]; 6769 const char *intrstr = NULL; 6770 int defertx_error = 0, error; 6771 6772 /* We allocate a single interrupt resource */ 6773 max_type = PCI_INTR_TYPE_MSI; 6774 counts[PCI_INTR_TYPE_MSIX] = 0; 6775 counts[PCI_INTR_TYPE_MSI] = 6776 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6777 /* Check not feat_en but feat_cap to fallback to INTx */ 6778 counts[PCI_INTR_TYPE_INTX] = 6779 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6780 6781 alloc_retry: 6782 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6783 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6784 return ENXIO; 6785 } 6786 sc->osdep.nintrs = 1; 6787 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6788 intrbuf, sizeof(intrbuf)); 6789 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6790 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6791 device_xname(dev)); 6792 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6793 if (sc->osdep.ihs[0] == NULL) { 6794 aprint_error_dev(dev,"unable to establish %s\n", 6795 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6796 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6797 sc->osdep.intrs = NULL; 6798 switch (intr_type) { 6799 case PCI_INTR_TYPE_MSI: 6800 /* The next try is for INTx: Disable MSI */ 6801 max_type = PCI_INTR_TYPE_INTX; 6802 counts[PCI_INTR_TYPE_INTX] = 1; 6803 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6804 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6805 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6806 goto alloc_retry; 6807 } else 6808 break; 6809 case PCI_INTR_TYPE_INTX: 6810 default: 6811 /* See below */ 6812 break; 6813 } 6814 } 6815 if (intr_type == PCI_INTR_TYPE_INTX) { 6816 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6817 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6818 } 6819 if (sc->osdep.ihs[0] == NULL) { 6820 aprint_error_dev(dev, 6821 "couldn't establish interrupt%s%s\n", 6822 intrstr ? " at " : "", intrstr ? intrstr : ""); 6823 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6824 sc->osdep.intrs = NULL; 6825 return ENXIO; 6826 } 6827 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6828 /* 6829 * Try allocating a fast interrupt and the associated deferred 6830 * processing contexts. 6831 */ 6832 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6833 txr->txr_si = 6834 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6835 ixgbe_deferred_mq_start, txr); 6836 6837 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6838 device_xname(dev)); 6839 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6840 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6841 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6842 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6843 } 6844 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6845 ixgbe_handle_que, que); 6846 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6847 error = workqueue_create(&sc->que_wq, wqname, 6848 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6849 IXGBE_WORKQUEUE_FLAGS); 6850 6851 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6852 && ((txr->txr_si == NULL) || defertx_error != 0)) 6853 || (que->que_si == NULL) || error != 0) { 6854 aprint_error_dev(dev, 6855 "could not establish software interrupts\n"); 6856 6857 return ENXIO; 6858 } 6859 /* For simplicity in the handlers */ 6860 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6861 6862 return (0); 6863 } /* ixgbe_allocate_legacy */ 6864 6865 /************************************************************************ 6866 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6867 ************************************************************************/ 6868 static int 6869 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6870 { 6871 device_t dev = sc->dev; 6872 struct ix_queue *que = sc->queues; 6873 struct tx_ring *txr = sc->tx_rings; 6874 pci_chipset_tag_t pc; 6875 char intrbuf[PCI_INTRSTR_LEN]; 6876 char intr_xname[32]; 6877 char wqname[MAXCOMLEN]; 6878 const char *intrstr = NULL; 6879 int error, vector = 0; 6880 int cpu_id = 0; 6881 kcpuset_t *affinity; 6882 #ifdef RSS 6883 unsigned int rss_buckets = 0; 6884 kcpuset_t cpu_mask; 6885 #endif 6886 6887 pc = sc->osdep.pc; 6888 #ifdef RSS 6889 /* 6890 * If we're doing RSS, the number of queues needs to 6891 * match the number of RSS buckets that are configured. 6892 * 6893 * + If there's more queues than RSS buckets, we'll end 6894 * up with queues that get no traffic. 6895 * 6896 * + If there's more RSS buckets than queues, we'll end 6897 * up having multiple RSS buckets map to the same queue, 6898 * so there'll be some contention. 6899 */ 6900 rss_buckets = rss_getnumbuckets(); 6901 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6902 (sc->num_queues != rss_buckets)) { 6903 device_printf(dev, 6904 "%s: number of queues (%d) != number of RSS buckets (%d)" 6905 "; performance will be impacted.\n", 6906 __func__, sc->num_queues, rss_buckets); 6907 } 6908 #endif 6909 6910 sc->osdep.nintrs = sc->num_queues + 1; 6911 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6912 sc->osdep.nintrs) != 0) { 6913 aprint_error_dev(dev, 6914 "failed to allocate MSI-X interrupt\n"); 6915 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6916 return (ENXIO); 6917 } 6918 6919 kcpuset_create(&affinity, false); 6920 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6921 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6922 device_xname(dev), i); 6923 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6924 sizeof(intrbuf)); 6925 #ifdef IXGBE_MPSAFE 6926 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6927 true); 6928 #endif 6929 /* Set the handler function */ 6930 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6931 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6932 intr_xname); 6933 if (que->res == NULL) { 6934 aprint_error_dev(dev, 6935 "Failed to register QUE handler\n"); 6936 error = ENXIO; 6937 goto err_out; 6938 } 6939 que->msix = vector; 6940 sc->active_queues |= 1ULL << que->msix; 6941 6942 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6943 #ifdef RSS 6944 /* 6945 * The queue ID is used as the RSS layer bucket ID. 6946 * We look up the queue ID -> RSS CPU ID and select 6947 * that. 6948 */ 6949 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6950 CPU_SETOF(cpu_id, &cpu_mask); 6951 #endif 6952 } else { 6953 /* 6954 * Bind the MSI-X vector, and thus the 6955 * rings to the corresponding CPU. 6956 * 6957 * This just happens to match the default RSS 6958 * round-robin bucket -> queue -> CPU allocation. 6959 */ 6960 if (sc->num_queues > 1) 6961 cpu_id = i; 6962 } 6963 /* Round-robin affinity */ 6964 kcpuset_zero(affinity); 6965 kcpuset_set(affinity, cpu_id % ncpu); 6966 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6967 NULL); 6968 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6969 intrstr); 6970 if (error == 0) { 6971 #if 1 /* def IXGBE_DEBUG */ 6972 #ifdef RSS 6973 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6974 cpu_id % ncpu); 6975 #else 6976 aprint_normal(", bound queue %d to cpu %d", i, 6977 cpu_id % ncpu); 6978 #endif 6979 #endif /* IXGBE_DEBUG */ 6980 } 6981 aprint_normal("\n"); 6982 6983 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6984 txr->txr_si = softint_establish( 6985 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6986 ixgbe_deferred_mq_start, txr); 6987 if (txr->txr_si == NULL) { 6988 aprint_error_dev(dev, 6989 "couldn't establish software interrupt\n"); 6990 error = ENXIO; 6991 goto err_out; 6992 } 6993 } 6994 que->que_si 6995 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6996 ixgbe_handle_que, que); 6997 if (que->que_si == NULL) { 6998 aprint_error_dev(dev, 6999 "couldn't establish software interrupt\n"); 7000 error = ENXIO; 7001 goto err_out; 7002 } 7003 } 7004 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 7005 error = workqueue_create(&sc->txr_wq, wqname, 7006 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7007 IXGBE_WORKQUEUE_FLAGS); 7008 if (error) { 7009 aprint_error_dev(dev, 7010 "couldn't create workqueue for deferred Tx\n"); 7011 goto err_out; 7012 } 7013 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 7014 7015 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7016 error = workqueue_create(&sc->que_wq, wqname, 7017 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7018 IXGBE_WORKQUEUE_FLAGS); 7019 if (error) { 7020 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7021 goto err_out; 7022 } 7023 7024 /* and Link */ 7025 cpu_id++; 7026 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7027 sc->vector = vector; 7028 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7029 sizeof(intrbuf)); 7030 #ifdef IXGBE_MPSAFE 7031 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, 7032 true); 7033 #endif 7034 /* Set the link handler function */ 7035 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7036 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7037 intr_xname); 7038 if (sc->osdep.ihs[vector] == NULL) { 7039 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7040 error = ENXIO; 7041 goto err_out; 7042 } 7043 /* Round-robin affinity */ 7044 kcpuset_zero(affinity); 7045 kcpuset_set(affinity, cpu_id % ncpu); 7046 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7047 NULL); 7048 7049 aprint_normal_dev(dev, 7050 "for link, interrupting at %s", intrstr); 7051 if (error == 0) 7052 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7053 else 7054 aprint_normal("\n"); 7055 7056 kcpuset_destroy(affinity); 7057 aprint_normal_dev(dev, 7058 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7059 7060 return (0); 7061 7062 err_out: 7063 kcpuset_destroy(affinity); 7064 ixgbe_free_deferred_handlers(sc); 7065 ixgbe_free_pciintr_resources(sc); 7066 return (error); 7067 } /* ixgbe_allocate_msix */ 7068 7069 /************************************************************************ 7070 * ixgbe_configure_interrupts 7071 * 7072 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7073 * This will also depend on user settings. 7074 ************************************************************************/ 7075 static int 7076 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7077 { 7078 device_t dev = sc->dev; 7079 struct ixgbe_mac_info *mac = &sc->hw.mac; 7080 int want, queues, msgs; 7081 7082 /* Default to 1 queue if MSI-X setup fails */ 7083 sc->num_queues = 1; 7084 7085 /* Override by tuneable */ 7086 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7087 goto msi; 7088 7089 /* 7090 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7091 * interrupt slot. 7092 */ 7093 if (ncpu == 1) 7094 goto msi; 7095 7096 /* First try MSI-X */ 7097 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7098 msgs = MIN(msgs, IXG_MAX_NINTR); 7099 if (msgs < 2) 7100 goto msi; 7101 7102 sc->feat_en |= IXGBE_FEATURE_MSIX; 7103 7104 /* Figure out a reasonable auto config value */ 7105 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7106 7107 #ifdef RSS 7108 /* If we're doing RSS, clamp at the number of RSS buckets */ 7109 if (sc->feat_en & IXGBE_FEATURE_RSS) 7110 queues = uimin(queues, rss_getnumbuckets()); 7111 #endif 7112 if (ixgbe_num_queues > queues) { 7113 aprint_error_dev(sc->dev, 7114 "ixgbe_num_queues (%d) is too large, " 7115 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7116 ixgbe_num_queues = queues; 7117 } 7118 7119 if (ixgbe_num_queues != 0) 7120 queues = ixgbe_num_queues; 7121 else 7122 queues = uimin(queues, 7123 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7124 7125 /* 7126 * Want one vector (RX/TX pair) per queue 7127 * plus an additional for Link. 7128 */ 7129 want = queues + 1; 7130 if (msgs >= want) 7131 msgs = want; 7132 else { 7133 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7134 "%d vectors but %d queues wanted!\n", msgs, want); 7135 goto msi; 7136 } 7137 sc->num_queues = queues; 7138 sc->feat_en |= IXGBE_FEATURE_MSIX; 7139 return (0); 7140 7141 /* 7142 * MSI-X allocation failed or provided us with 7143 * less vectors than needed. Free MSI-X resources 7144 * and we'll try enabling MSI. 7145 */ 7146 msi: 7147 /* Without MSI-X, some features are no longer supported */ 7148 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7149 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7150 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7151 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7152 7153 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7154 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7155 if (msgs > 1) 7156 msgs = 1; 7157 if (msgs != 0) { 7158 msgs = 1; 7159 sc->feat_en |= IXGBE_FEATURE_MSI; 7160 return (0); 7161 } 7162 7163 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7164 aprint_error_dev(dev, 7165 "Device does not support legacy interrupts.\n"); 7166 return 1; 7167 } 7168 7169 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7170 7171 return (0); 7172 } /* ixgbe_configure_interrupts */ 7173 7174 7175 /************************************************************************ 7176 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7177 * 7178 * Done outside of interrupt context since the driver might sleep 7179 ************************************************************************/ 7180 static void 7181 ixgbe_handle_link(void *context) 7182 { 7183 struct ixgbe_softc *sc = context; 7184 struct ixgbe_hw *hw = &sc->hw; 7185 7186 KASSERT(mutex_owned(&sc->core_mtx)); 7187 7188 IXGBE_EVC_ADD(&sc->link_workev, 1); 7189 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7190 ixgbe_update_link_status(sc); 7191 7192 /* Re-enable link interrupts */ 7193 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7194 } /* ixgbe_handle_link */ 7195 7196 #if 0 7197 /************************************************************************ 7198 * ixgbe_rearm_queues 7199 ************************************************************************/ 7200 static __inline void 7201 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7202 { 7203 u32 mask; 7204 7205 switch (sc->hw.mac.type) { 7206 case ixgbe_mac_82598EB: 7207 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7208 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7209 break; 7210 case ixgbe_mac_82599EB: 7211 case ixgbe_mac_X540: 7212 case ixgbe_mac_X550: 7213 case ixgbe_mac_X550EM_x: 7214 case ixgbe_mac_X550EM_a: 7215 mask = (queues & 0xFFFFFFFF); 7216 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7217 mask = (queues >> 32); 7218 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7219 break; 7220 default: 7221 break; 7222 } 7223 } /* ixgbe_rearm_queues */ 7224 #endif 7225
Indexes created Tue Sep 30 07:10:03 GMT 2025