ixgbe.c revision 1.347
1 /* $NetBSD: ixgbe.c,v 1.347 2023/11/02 09:40:47 yamaguchi Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.347 2023/11/02 09:40:47 yamaguchi Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus with a max of 8. This 362 * can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = DEFAULT_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = DEFAULT_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_MPSAFE 1 416 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 417 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 418 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 419 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 420 #else 421 #define IXGBE_CALLOUT_FLAGS 0 422 #define IXGBE_SOFTINT_FLAGS 0 423 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 424 #define IXGBE_TASKLET_WQ_FLAGS 0 425 #endif 426 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 427 428 /* Interval between reports of errors */ 429 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 430 431 /************************************************************************ 432 * ixgbe_initialize_rss_mapping 433 ************************************************************************/ 434 static void 435 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 436 { 437 struct ixgbe_hw *hw = &sc->hw; 438 u32 reta = 0, mrqc, rss_key[10]; 439 int queue_id, table_size, index_mult; 440 int i, j; 441 u32 rss_hash_config; 442 443 /* force use default RSS key. */ 444 #ifdef __NetBSD__ 445 rss_getkey((uint8_t *) &rss_key); 446 #else 447 if (sc->feat_en & IXGBE_FEATURE_RSS) { 448 /* Fetch the configured RSS key */ 449 rss_getkey((uint8_t *) &rss_key); 450 } else { 451 /* set up random bits */ 452 cprng_fast(&rss_key, sizeof(rss_key)); 453 } 454 #endif 455 456 /* Set multiplier for RETA setup and table size based on MAC */ 457 index_mult = 0x1; 458 table_size = 128; 459 switch (sc->hw.mac.type) { 460 case ixgbe_mac_82598EB: 461 index_mult = 0x11; 462 break; 463 case ixgbe_mac_X550: 464 case ixgbe_mac_X550EM_x: 465 case ixgbe_mac_X550EM_a: 466 table_size = 512; 467 break; 468 default: 469 break; 470 } 471 472 /* Set up the redirection table */ 473 for (i = 0, j = 0; i < table_size; i++, j++) { 474 if (j == sc->num_queues) 475 j = 0; 476 477 if (sc->feat_en & IXGBE_FEATURE_RSS) { 478 /* 479 * Fetch the RSS bucket id for the given indirection 480 * entry. Cap it at the number of configured buckets 481 * (which is num_queues.) 482 */ 483 queue_id = rss_get_indirection_to_bucket(i); 484 queue_id = queue_id % sc->num_queues; 485 } else 486 queue_id = (j * index_mult); 487 488 /* 489 * The low 8 bits are for hash value (n+0); 490 * The next 8 bits are for hash value (n+1), etc. 491 */ 492 reta = reta >> 8; 493 reta = reta | (((uint32_t) queue_id) << 24); 494 if ((i & 3) == 3) { 495 if (i < 128) 496 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 497 else 498 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 499 reta); 500 reta = 0; 501 } 502 } 503 504 /* Now fill our hash function seeds */ 505 for (i = 0; i < 10; i++) 506 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 507 508 /* Perform hash on these packet types */ 509 if (sc->feat_en & IXGBE_FEATURE_RSS) 510 rss_hash_config = rss_gethashconfig(); 511 else { 512 /* 513 * Disable UDP - IP fragments aren't currently being handled 514 * and so we end up with a mix of 2-tuple and 4-tuple 515 * traffic. 516 */ 517 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 518 | RSS_HASHTYPE_RSS_TCP_IPV4 519 | RSS_HASHTYPE_RSS_IPV6 520 | RSS_HASHTYPE_RSS_TCP_IPV6 521 | RSS_HASHTYPE_RSS_IPV6_EX 522 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 523 } 524 525 mrqc = IXGBE_MRQC_RSSEN; 526 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 527 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 528 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 529 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 530 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 531 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 532 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 533 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 534 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 535 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 536 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 537 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 538 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 539 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 540 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 541 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 542 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 543 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 544 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 545 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 546 } /* ixgbe_initialize_rss_mapping */ 547 548 /************************************************************************ 549 * ixgbe_initialize_receive_units - Setup receive registers and features. 550 ************************************************************************/ 551 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 552 553 static void 554 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 555 { 556 struct rx_ring *rxr = sc->rx_rings; 557 struct ixgbe_hw *hw = &sc->hw; 558 struct ifnet *ifp = sc->ifp; 559 int i, j; 560 u32 bufsz, fctrl, srrctl, rxcsum; 561 u32 hlreg; 562 563 /* 564 * Make sure receives are disabled while 565 * setting up the descriptor ring 566 */ 567 ixgbe_disable_rx(hw); 568 569 /* Enable broadcasts */ 570 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 571 fctrl |= IXGBE_FCTRL_BAM; 572 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 573 fctrl |= IXGBE_FCTRL_DPF; 574 fctrl |= IXGBE_FCTRL_PMCF; 575 } 576 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 577 578 /* Set for Jumbo Frames? */ 579 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 580 if (ifp->if_mtu > ETHERMTU) 581 hlreg |= IXGBE_HLREG0_JUMBOEN; 582 else 583 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 584 585 #ifdef DEV_NETMAP 586 /* CRC stripping is conditional in Netmap */ 587 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 588 (ifp->if_capenable & IFCAP_NETMAP) && 589 !ix_crcstrip) 590 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 591 else 592 #endif /* DEV_NETMAP */ 593 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 594 595 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 596 597 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 598 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 599 600 for (i = 0; i < sc->num_queues; i++, rxr++) { 601 u64 rdba = rxr->rxdma.dma_paddr; 602 u32 reg; 603 int regnum = i / 4; /* 1 register per 4 queues */ 604 int regshift = i % 4; /* 4 bits per 1 queue */ 605 j = rxr->me; 606 607 /* Setup the Base and Length of the Rx Descriptor Ring */ 608 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 609 (rdba & 0x00000000ffffffffULL)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 611 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 612 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 613 614 /* Set up the SRRCTL register */ 615 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 616 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 617 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 618 srrctl |= bufsz; 619 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 620 621 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 622 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 623 reg &= ~(0x000000ffUL << (regshift * 8)); 624 reg |= i << (regshift * 8); 625 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 626 627 /* 628 * Set DROP_EN iff we have no flow control and >1 queue. 629 * Note that srrctl was cleared shortly before during reset, 630 * so we do not need to clear the bit, but do it just in case 631 * this code is moved elsewhere. 632 */ 633 if ((sc->num_queues > 1) && 634 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 635 srrctl |= IXGBE_SRRCTL_DROP_EN; 636 else 637 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 638 639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 640 641 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 642 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 643 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 644 645 /* Set the driver rx tail address */ 646 rxr->tail = IXGBE_RDT(rxr->me); 647 } 648 649 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 650 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 651 | IXGBE_PSRTYPE_UDPHDR 652 | IXGBE_PSRTYPE_IPV4HDR 653 | IXGBE_PSRTYPE_IPV6HDR; 654 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 655 } 656 657 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 658 659 ixgbe_initialize_rss_mapping(sc); 660 661 if (sc->num_queues > 1) { 662 /* RSS and RX IPP Checksum are mutually exclusive */ 663 rxcsum |= IXGBE_RXCSUM_PCSD; 664 } 665 666 if (ifp->if_capenable & IFCAP_RXCSUM) 667 rxcsum |= IXGBE_RXCSUM_PCSD; 668 669 /* This is useful for calculating UDP/IP fragment checksums */ 670 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 671 rxcsum |= IXGBE_RXCSUM_IPPCSE; 672 673 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 674 675 } /* ixgbe_initialize_receive_units */ 676 677 /************************************************************************ 678 * ixgbe_initialize_transmit_units - Enable transmit units. 679 ************************************************************************/ 680 static void 681 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 682 { 683 struct tx_ring *txr = sc->tx_rings; 684 struct ixgbe_hw *hw = &sc->hw; 685 int i; 686 687 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 688 689 /* Setup the Base and Length of the Tx Descriptor Ring */ 690 for (i = 0; i < sc->num_queues; i++, txr++) { 691 u64 tdba = txr->txdma.dma_paddr; 692 u32 txctrl = 0; 693 u32 tqsmreg, reg; 694 int regnum = i / 4; /* 1 register per 4 queues */ 695 int regshift = i % 4; /* 4 bits per 1 queue */ 696 int j = txr->me; 697 698 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 699 (tdba & 0x00000000ffffffffULL)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 701 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 702 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 703 704 /* 705 * Set TQSMR (Transmit Queue Statistic Mapping) register. 706 * Register location is different between 82598 and others. 707 */ 708 if (sc->hw.mac.type == ixgbe_mac_82598EB) 709 tqsmreg = IXGBE_TQSMR(regnum); 710 else 711 tqsmreg = IXGBE_TQSM(regnum); 712 reg = IXGBE_READ_REG(hw, tqsmreg); 713 reg &= ~(0x000000ffUL << (regshift * 8)); 714 reg |= i << (regshift * 8); 715 IXGBE_WRITE_REG(hw, tqsmreg, reg); 716 717 /* Setup the HW Tx Head and Tail descriptor pointers */ 718 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 719 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 720 721 /* Cache the tail address */ 722 txr->tail = IXGBE_TDT(j); 723 724 txr->txr_no_space = false; 725 726 /* Disable relax ordering */ 727 /* 728 * Note: for X550 series devices, these registers are actually 729 * prefixed with TPH_ instead of DCA_, but the addresses and 730 * fields remain the same. 731 */ 732 switch (hw->mac.type) { 733 case ixgbe_mac_82598EB: 734 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 735 break; 736 default: 737 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 738 break; 739 } 740 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 741 switch (hw->mac.type) { 742 case ixgbe_mac_82598EB: 743 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 744 break; 745 default: 746 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 747 break; 748 } 749 750 } 751 752 if (hw->mac.type != ixgbe_mac_82598EB) { 753 u32 dmatxctl, rttdcs; 754 755 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 756 dmatxctl |= IXGBE_DMATXCTL_TE; 757 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 758 /* Disable arbiter to set MTQC */ 759 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 760 rttdcs |= IXGBE_RTTDCS_ARBDIS; 761 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 762 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 763 ixgbe_get_mtqc(sc->iov_mode)); 764 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 765 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 766 } 767 } /* ixgbe_initialize_transmit_units */ 768 769 static void 770 ixgbe_quirks(struct ixgbe_softc *sc) 771 { 772 device_t dev = sc->dev; 773 struct ixgbe_hw *hw = &sc->hw; 774 const char *vendor, *product; 775 776 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 777 /* 778 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 779 * MA10-ST0. 780 */ 781 vendor = pmf_get_platform("system-vendor"); 782 product = pmf_get_platform("system-product"); 783 784 if ((vendor == NULL) || (product == NULL)) 785 return; 786 787 if ((strcmp(vendor, "GIGABYTE") == 0) && 788 (strcmp(product, "MA10-ST0") == 0)) { 789 aprint_verbose_dev(dev, 790 "Enable SFP+ MOD_ABS inverse quirk\n"); 791 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 792 } 793 } 794 } 795 796 /************************************************************************ 797 * ixgbe_attach - Device initialization routine 798 * 799 * Called when the driver is being loaded. 800 * Identifies the type of hardware, allocates all resources 801 * and initializes the hardware. 802 * 803 * return 0 on success, positive on failure 804 ************************************************************************/ 805 static void 806 ixgbe_attach(device_t parent, device_t dev, void *aux) 807 { 808 struct ixgbe_softc *sc; 809 struct ixgbe_hw *hw; 810 int error = -1; 811 u32 ctrl_ext; 812 u16 high, low, nvmreg, dev_caps; 813 pcireg_t id, subid; 814 const ixgbe_vendor_info_t *ent; 815 struct pci_attach_args *pa = aux; 816 bool unsupported_sfp = false; 817 const char *str; 818 char wqname[MAXCOMLEN]; 819 char buf[256]; 820 821 INIT_DEBUGOUT("ixgbe_attach: begin"); 822 823 /* Allocate, clear, and link in our adapter structure */ 824 sc = device_private(dev); 825 sc->hw.back = sc; 826 sc->dev = dev; 827 hw = &sc->hw; 828 sc->osdep.pc = pa->pa_pc; 829 sc->osdep.tag = pa->pa_tag; 830 if (pci_dma64_available(pa)) 831 sc->osdep.dmat = pa->pa_dmat64; 832 else 833 sc->osdep.dmat = pa->pa_dmat; 834 sc->osdep.attached = false; 835 sc->osdep.detaching = false; 836 837 ent = ixgbe_lookup(pa); 838 839 KASSERT(ent != NULL); 840 841 aprint_normal(": %s, Version - %s\n", 842 ixgbe_strings[ent->index], ixgbe_driver_version); 843 844 /* Core Lock Init */ 845 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 846 847 /* Set up the timer callout and workqueue */ 848 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 849 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 850 error = workqueue_create(&sc->timer_wq, wqname, 851 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 852 IXGBE_TASKLET_WQ_FLAGS); 853 if (error) { 854 aprint_error_dev(dev, 855 "could not create timer workqueue (%d)\n", error); 856 goto err_out; 857 } 858 859 /* Determine hardware revision */ 860 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 861 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 862 863 hw->vendor_id = PCI_VENDOR(id); 864 hw->device_id = PCI_PRODUCT(id); 865 hw->revision_id = 866 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 867 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 868 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 869 870 /* Set quirk flags */ 871 ixgbe_quirks(sc); 872 873 /* 874 * Make sure BUSMASTER is set 875 */ 876 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 877 878 /* Do base PCI setup - map BAR0 */ 879 if (ixgbe_allocate_pci_resources(sc, pa)) { 880 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 881 error = ENXIO; 882 goto err_out; 883 } 884 885 /* let hardware know driver is loaded */ 886 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 887 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 888 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 889 890 /* 891 * Initialize the shared code 892 */ 893 if (ixgbe_init_shared_code(hw) != 0) { 894 aprint_error_dev(dev, 895 "Unable to initialize the shared code\n"); 896 error = ENXIO; 897 goto err_out; 898 } 899 900 switch (hw->mac.type) { 901 case ixgbe_mac_82598EB: 902 str = "82598EB"; 903 break; 904 case ixgbe_mac_82599EB: 905 str = "82599EB"; 906 break; 907 case ixgbe_mac_X540: 908 str = "X540"; 909 break; 910 case ixgbe_mac_X550: 911 str = "X550"; 912 break; 913 case ixgbe_mac_X550EM_x: 914 str = "X550EM X"; 915 break; 916 case ixgbe_mac_X550EM_a: 917 str = "X550EM A"; 918 break; 919 default: 920 str = "Unknown"; 921 break; 922 } 923 aprint_normal_dev(dev, "device %s\n", str); 924 925 hw->allow_unsupported_sfp = allow_unsupported_sfp; 926 927 /* Pick up the 82599 settings */ 928 if (hw->mac.type != ixgbe_mac_82598EB) 929 hw->phy.smart_speed = ixgbe_smart_speed; 930 931 /* Set the right number of segments */ 932 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 933 sc->num_segs = IXGBE_SCATTER_DEFAULT; 934 935 /* Ensure SW/FW semaphore is free */ 936 ixgbe_init_swfw_semaphore(hw); 937 938 hw->mac.ops.set_lan_id(hw); 939 ixgbe_init_device_features(sc); 940 941 if (ixgbe_configure_interrupts(sc)) { 942 error = ENXIO; 943 goto err_out; 944 } 945 946 /* Allocate multicast array memory. */ 947 sc->mta = malloc(sizeof(*sc->mta) * 948 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 949 950 /* Enable WoL (if supported) */ 951 ixgbe_check_wol_support(sc); 952 953 /* Register for VLAN events */ 954 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 955 956 /* Verify adapter fan is still functional (if applicable) */ 957 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 958 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 959 ixgbe_check_fan_failure(sc, esdp, FALSE); 960 } 961 962 /* Set an initial default flow control value */ 963 hw->fc.requested_mode = ixgbe_flow_control; 964 965 /* Do descriptor calc and sanity checks */ 966 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 967 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 968 aprint_error_dev(dev, "Invalid TX ring size (%d). " 969 "It must be between %d and %d, " 970 "inclusive, and must be a multiple of %zu. " 971 "Using default value of %d instead.\n", 972 ixgbe_txd, MIN_TXD, MAX_TXD, 973 DBA_ALIGN / sizeof(union ixgbe_adv_tx_desc), 974 DEFAULT_TXD); 975 sc->num_tx_desc = DEFAULT_TXD; 976 } else 977 sc->num_tx_desc = ixgbe_txd; 978 979 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 980 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 981 aprint_error_dev(dev, "Invalid RX ring size (%d). " 982 "It must be between %d and %d, " 983 "inclusive, and must be a multiple of %zu. " 984 "Using default value of %d instead.\n", 985 ixgbe_rxd, MIN_RXD, MAX_RXD, 986 DBA_ALIGN / sizeof(union ixgbe_adv_rx_desc), 987 DEFAULT_RXD); 988 sc->num_rx_desc = DEFAULT_RXD; 989 } else 990 sc->num_rx_desc = ixgbe_rxd; 991 992 /* Sysctls for limiting the amount of work done in the taskqueues */ 993 sc->rx_process_limit 994 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 995 ? ixgbe_rx_process_limit : sc->num_rx_desc; 996 sc->tx_process_limit 997 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 998 ? ixgbe_tx_process_limit : sc->num_tx_desc; 999 1000 /* Set default high limit of copying mbuf in rxeof */ 1001 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 1002 1003 /* Allocate our TX/RX Queues */ 1004 if (ixgbe_allocate_queues(sc)) { 1005 error = ENOMEM; 1006 goto err_out; 1007 } 1008 1009 hw->phy.reset_if_overtemp = TRUE; 1010 error = ixgbe_reset_hw(hw); 1011 hw->phy.reset_if_overtemp = FALSE; 1012 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1013 error = IXGBE_SUCCESS; 1014 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1015 aprint_error_dev(dev, 1016 "Unsupported SFP+ module type was detected.\n"); 1017 unsupported_sfp = true; 1018 error = IXGBE_SUCCESS; 1019 } else if (error) { 1020 aprint_error_dev(dev, 1021 "Hardware initialization failed(error = %d)\n", error); 1022 error = EIO; 1023 goto err_late; 1024 } 1025 1026 /* Make sure we have a good EEPROM before we read from it */ 1027 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1028 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1029 error = EIO; 1030 goto err_late; 1031 } 1032 1033 aprint_normal("%s:", device_xname(dev)); 1034 /* NVM Image Version */ 1035 high = low = 0; 1036 switch (hw->mac.type) { 1037 case ixgbe_mac_82598EB: 1038 /* 1039 * Print version from the dev starter version (0x29). The 1040 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1041 */ 1042 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1043 if (nvmreg == 0xffff) 1044 break; 1045 high = (nvmreg >> 12) & 0x0f; 1046 low = (nvmreg >> 4) & 0xff; 1047 id = nvmreg & 0x0f; 1048 /* 1049 * The following output might not be correct. Some 82598 cards 1050 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1051 */ 1052 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1053 break; 1054 case ixgbe_mac_X540: 1055 case ixgbe_mac_X550EM_a: 1056 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1057 if (nvmreg == 0xffff) 1058 break; 1059 high = (nvmreg >> 12) & 0x0f; 1060 low = (nvmreg >> 4) & 0xff; 1061 id = nvmreg & 0x0f; 1062 aprint_normal(" NVM Image Version %u.", high); 1063 if (hw->mac.type == ixgbe_mac_X540) 1064 str = "%x"; 1065 else 1066 str = "%02x"; 1067 aprint_normal(str, low); 1068 aprint_normal(" ID 0x%x,", id); 1069 break; 1070 case ixgbe_mac_X550EM_x: 1071 case ixgbe_mac_X550: 1072 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1073 if (nvmreg == 0xffff) 1074 break; 1075 high = (nvmreg >> 12) & 0x0f; 1076 low = nvmreg & 0xff; 1077 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1078 break; 1079 default: 1080 break; 1081 } 1082 hw->eeprom.nvm_image_ver_high = high; 1083 hw->eeprom.nvm_image_ver_low = low; 1084 1085 /* PHY firmware revision */ 1086 switch (hw->mac.type) { 1087 case ixgbe_mac_X540: 1088 case ixgbe_mac_X550: 1089 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1090 if (nvmreg == 0xffff) 1091 break; 1092 high = (nvmreg >> 12) & 0x0f; 1093 low = (nvmreg >> 4) & 0xff; 1094 id = nvmreg & 0x000f; 1095 aprint_normal(" PHY FW Revision %u.", high); 1096 if (hw->mac.type == ixgbe_mac_X540) 1097 str = "%x"; 1098 else 1099 str = "%02x"; 1100 aprint_normal(str, low); 1101 aprint_normal(" ID 0x%x,", id); 1102 break; 1103 default: 1104 break; 1105 } 1106 1107 /* NVM Map version & OEM NVM Image version */ 1108 switch (hw->mac.type) { 1109 case ixgbe_mac_X550: 1110 case ixgbe_mac_X550EM_x: 1111 case ixgbe_mac_X550EM_a: 1112 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1113 if (nvmreg != 0xffff) { 1114 high = (nvmreg >> 12) & 0x0f; 1115 low = nvmreg & 0x00ff; 1116 aprint_normal(" NVM Map version %u.%02x,", high, low); 1117 } 1118 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1119 if (nvmreg != 0xffff) { 1120 high = (nvmreg >> 12) & 0x0f; 1121 low = nvmreg & 0x00ff; 1122 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1123 low); 1124 } 1125 break; 1126 default: 1127 break; 1128 } 1129 1130 /* Print the ETrackID */ 1131 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1132 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1133 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1134 1135 /* Printed Board Assembly number */ 1136 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1137 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1138 1139 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1140 error = ixgbe_allocate_msix(sc, pa); 1141 if (error) { 1142 /* Free allocated queue structures first */ 1143 ixgbe_free_queues(sc); 1144 1145 /* Fallback to legacy interrupt */ 1146 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1147 sc->feat_en |= IXGBE_FEATURE_MSI; 1148 sc->num_queues = 1; 1149 1150 /* Allocate our TX/RX Queues again */ 1151 if (ixgbe_allocate_queues(sc)) { 1152 error = ENOMEM; 1153 goto err_out; 1154 } 1155 } 1156 } 1157 1158 /* Recovery mode */ 1159 switch (sc->hw.mac.type) { 1160 case ixgbe_mac_X550: 1161 case ixgbe_mac_X550EM_x: 1162 case ixgbe_mac_X550EM_a: 1163 /* >= 2.00 */ 1164 if (hw->eeprom.nvm_image_ver_high >= 2) { 1165 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1166 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1167 } 1168 break; 1169 default: 1170 break; 1171 } 1172 1173 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1174 error = ixgbe_allocate_legacy(sc, pa); 1175 if (error) 1176 goto err_late; 1177 1178 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1179 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1180 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1181 error = workqueue_create(&sc->admin_wq, wqname, 1182 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1183 IXGBE_TASKLET_WQ_FLAGS); 1184 if (error) { 1185 aprint_error_dev(dev, 1186 "could not create admin workqueue (%d)\n", error); 1187 goto err_out; 1188 } 1189 1190 error = ixgbe_start_hw(hw); 1191 switch (error) { 1192 case IXGBE_ERR_EEPROM_VERSION: 1193 aprint_error_dev(dev, 1194 "This device is a pre-production adapter/" 1195 "LOM. Please be aware there may be issues associated " 1196 "with your hardware.\nIf you are experiencing problems " 1197 "please contact your Intel or hardware representative " 1198 "who provided you with this hardware.\n"); 1199 break; 1200 default: 1201 break; 1202 } 1203 1204 /* Setup OS specific network interface */ 1205 if (ixgbe_setup_interface(dev, sc) != 0) 1206 goto err_late; 1207 1208 /* 1209 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1210 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1211 */ 1212 if (hw->phy.media_type == ixgbe_media_type_copper) { 1213 uint16_t id1, id2; 1214 int oui, model, rev; 1215 char descr[MII_MAX_DESCR_LEN]; 1216 1217 id1 = hw->phy.id >> 16; 1218 id2 = hw->phy.id & 0xffff; 1219 oui = MII_OUI(id1, id2); 1220 model = MII_MODEL(id2); 1221 rev = MII_REV(id2); 1222 mii_get_descr(descr, sizeof(descr), oui, model); 1223 if (descr[0]) 1224 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1225 descr, rev); 1226 else 1227 aprint_normal_dev(dev, 1228 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1229 oui, model, rev); 1230 } 1231 1232 /* Enable EEE power saving */ 1233 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1234 hw->mac.ops.setup_eee(hw, 1235 sc->feat_en & IXGBE_FEATURE_EEE); 1236 1237 /* Enable power to the phy. */ 1238 if (!unsupported_sfp) { 1239 /* Enable the optics for 82599 SFP+ fiber */ 1240 ixgbe_enable_tx_laser(hw); 1241 1242 /* 1243 * XXX Currently, ixgbe_set_phy_power() supports only copper 1244 * PHY, so it's not required to test with !unsupported_sfp. 1245 */ 1246 ixgbe_set_phy_power(hw, TRUE); 1247 } 1248 1249 /* Initialize statistics */ 1250 ixgbe_update_stats_counters(sc); 1251 1252 /* Check PCIE slot type/speed/width */ 1253 ixgbe_get_slot_info(sc); 1254 1255 /* 1256 * Do time init and sysctl init here, but 1257 * only on the first port of a bypass adapter. 1258 */ 1259 ixgbe_bypass_init(sc); 1260 1261 /* Set an initial dmac value */ 1262 sc->dmac = 0; 1263 /* Set initial advertised speeds (if applicable) */ 1264 sc->advertise = ixgbe_get_default_advertise(sc); 1265 1266 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1267 ixgbe_define_iov_schemas(dev, &error); 1268 1269 /* Add sysctls */ 1270 ixgbe_add_device_sysctls(sc); 1271 ixgbe_add_hw_stats(sc); 1272 1273 /* For Netmap */ 1274 sc->init_locked = ixgbe_init_locked; 1275 sc->stop_locked = ixgbe_stop_locked; 1276 1277 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1278 ixgbe_netmap_attach(sc); 1279 1280 /* Print some flags */ 1281 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1282 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1283 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1284 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1285 if (ixgbe_get_device_caps(hw, &dev_caps) == 0) { 1286 snprintb(buf, sizeof(buf), IXGBE_DEVICE_CAPS_FLAGS, dev_caps); 1287 aprint_verbose_dev(dev, "device cap %s\n", buf); 1288 } 1289 1290 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1291 pmf_class_network_register(dev, sc->ifp); 1292 else 1293 aprint_error_dev(dev, "couldn't establish power handler\n"); 1294 1295 /* Init recovery mode timer and state variable */ 1296 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1297 sc->recovery_mode = 0; 1298 1299 /* Set up the timer callout */ 1300 callout_init(&sc->recovery_mode_timer, 1301 IXGBE_CALLOUT_FLAGS); 1302 snprintf(wqname, sizeof(wqname), "%s-recovery", 1303 device_xname(dev)); 1304 error = workqueue_create(&sc->recovery_mode_timer_wq, 1305 wqname, ixgbe_handle_recovery_mode_timer, sc, 1306 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1307 if (error) { 1308 aprint_error_dev(dev, "could not create " 1309 "recovery_mode_timer workqueue (%d)\n", error); 1310 goto err_out; 1311 } 1312 1313 /* Start the task */ 1314 callout_reset(&sc->recovery_mode_timer, hz, 1315 ixgbe_recovery_mode_timer, sc); 1316 } 1317 1318 INIT_DEBUGOUT("ixgbe_attach: end"); 1319 sc->osdep.attached = true; 1320 1321 return; 1322 1323 err_late: 1324 ixgbe_free_queues(sc); 1325 err_out: 1326 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1327 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1328 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1329 ixgbe_free_deferred_handlers(sc); 1330 ixgbe_free_pci_resources(sc); 1331 if (sc->mta != NULL) 1332 free(sc->mta, M_DEVBUF); 1333 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1334 IXGBE_CORE_LOCK_DESTROY(sc); 1335 1336 return; 1337 } /* ixgbe_attach */ 1338 1339 /************************************************************************ 1340 * ixgbe_check_wol_support 1341 * 1342 * Checks whether the adapter's ports are capable of 1343 * Wake On LAN by reading the adapter's NVM. 1344 * 1345 * Sets each port's hw->wol_enabled value depending 1346 * on the value read here. 1347 ************************************************************************/ 1348 static void 1349 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1350 { 1351 struct ixgbe_hw *hw = &sc->hw; 1352 u16 dev_caps = 0; 1353 1354 /* Find out WoL support for port */ 1355 sc->wol_support = hw->wol_enabled = 0; 1356 ixgbe_get_device_caps(hw, &dev_caps); 1357 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1358 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1359 hw->bus.func == 0)) 1360 sc->wol_support = hw->wol_enabled = 1; 1361 1362 /* Save initial wake up filter configuration */ 1363 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1364 1365 return; 1366 } /* ixgbe_check_wol_support */ 1367 1368 /************************************************************************ 1369 * ixgbe_setup_interface 1370 * 1371 * Setup networking device structure and register an interface. 1372 ************************************************************************/ 1373 static int 1374 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1375 { 1376 struct ethercom *ec = &sc->osdep.ec; 1377 struct ifnet *ifp; 1378 1379 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1380 1381 ifp = sc->ifp = &ec->ec_if; 1382 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1383 ifp->if_baudrate = IF_Gbps(10); 1384 ifp->if_init = ixgbe_init; 1385 ifp->if_stop = ixgbe_ifstop; 1386 ifp->if_softc = sc; 1387 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1388 #ifdef IXGBE_MPSAFE 1389 ifp->if_extflags = IFEF_MPSAFE; 1390 #endif 1391 ifp->if_ioctl = ixgbe_ioctl; 1392 #if __FreeBSD_version >= 1100045 1393 /* TSO parameters */ 1394 ifp->if_hw_tsomax = 65518; 1395 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1396 ifp->if_hw_tsomaxsegsize = 2048; 1397 #endif 1398 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1399 #if 0 1400 ixgbe_start_locked = ixgbe_legacy_start_locked; 1401 #endif 1402 } else { 1403 ifp->if_transmit = ixgbe_mq_start; 1404 #if 0 1405 ixgbe_start_locked = ixgbe_mq_start_locked; 1406 #endif 1407 } 1408 ifp->if_start = ixgbe_legacy_start; 1409 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1410 IFQ_SET_READY(&ifp->if_snd); 1411 1412 if_initialize(ifp); 1413 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1414 /* 1415 * We use per TX queue softint, so if_deferred_start_init() isn't 1416 * used. 1417 */ 1418 1419 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1420 1421 /* 1422 * Tell the upper layer(s) we support long frames. 1423 */ 1424 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1425 1426 /* Set capability flags */ 1427 ifp->if_capabilities |= IFCAP_RXCSUM 1428 | IFCAP_TXCSUM 1429 | IFCAP_TSOv4 1430 | IFCAP_TSOv6; 1431 ifp->if_capenable = 0; 1432 1433 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1434 | ETHERCAP_VLAN_HWCSUM 1435 | ETHERCAP_JUMBO_MTU 1436 | ETHERCAP_VLAN_MTU; 1437 1438 /* Enable the above capabilities by default */ 1439 ec->ec_capenable = ec->ec_capabilities; 1440 1441 ether_ifattach(ifp, sc->hw.mac.addr); 1442 aprint_normal_dev(dev, "Ethernet address %s\n", 1443 ether_sprintf(sc->hw.mac.addr)); 1444 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1445 1446 /* 1447 * Don't turn this on by default, if vlans are 1448 * created on another pseudo device (eg. lagg) 1449 * then vlan events are not passed thru, breaking 1450 * operation, but with HW FILTER off it works. If 1451 * using vlans directly on the ixgbe driver you can 1452 * enable this and get full hardware tag filtering. 1453 */ 1454 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1455 1456 /* 1457 * Specify the media types supported by this adapter and register 1458 * callbacks to update media and link information 1459 */ 1460 ec->ec_ifmedia = &sc->media; 1461 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1462 ixgbe_media_status, &sc->core_mtx); 1463 1464 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1465 ixgbe_add_media_types(sc); 1466 1467 /* Set autoselect media by default */ 1468 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1469 1470 if_register(ifp); 1471 1472 return (0); 1473 } /* ixgbe_setup_interface */ 1474 1475 /************************************************************************ 1476 * ixgbe_add_media_types 1477 ************************************************************************/ 1478 static void 1479 ixgbe_add_media_types(struct ixgbe_softc *sc) 1480 { 1481 struct ixgbe_hw *hw = &sc->hw; 1482 u64 layer; 1483 1484 layer = sc->phy_layer; 1485 1486 #define ADD(mm, dd) \ 1487 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1488 1489 ADD(IFM_NONE, 0); 1490 1491 /* Media types with matching NetBSD media defines */ 1492 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1493 ADD(IFM_10G_T | IFM_FDX, 0); 1494 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1495 ADD(IFM_1000_T | IFM_FDX, 0); 1496 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1497 ADD(IFM_100_TX | IFM_FDX, 0); 1498 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1499 ADD(IFM_10_T | IFM_FDX, 0); 1500 1501 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1502 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1503 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1504 1505 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1506 ADD(IFM_10G_LR | IFM_FDX, 0); 1507 if (hw->phy.multispeed_fiber) 1508 ADD(IFM_1000_LX | IFM_FDX, 0); 1509 } 1510 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1511 ADD(IFM_10G_SR | IFM_FDX, 0); 1512 if (hw->phy.multispeed_fiber) 1513 ADD(IFM_1000_SX | IFM_FDX, 0); 1514 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1515 ADD(IFM_1000_SX | IFM_FDX, 0); 1516 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1517 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1518 1519 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1520 ADD(IFM_10G_KR | IFM_FDX, 0); 1521 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1522 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1523 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1524 ADD(IFM_1000_KX | IFM_FDX, 0); 1525 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1526 ADD(IFM_2500_KX | IFM_FDX, 0); 1527 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1528 ADD(IFM_2500_T | IFM_FDX, 0); 1529 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1530 ADD(IFM_5000_T | IFM_FDX, 0); 1531 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1532 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1533 /* XXX no ifmedia_set? */ 1534 1535 ADD(IFM_AUTO, 0); 1536 1537 #undef ADD 1538 } /* ixgbe_add_media_types */ 1539 1540 /************************************************************************ 1541 * ixgbe_is_sfp 1542 ************************************************************************/ 1543 static inline bool 1544 ixgbe_is_sfp(struct ixgbe_hw *hw) 1545 { 1546 switch (hw->mac.type) { 1547 case ixgbe_mac_82598EB: 1548 if (hw->phy.type == ixgbe_phy_nl) 1549 return (TRUE); 1550 return (FALSE); 1551 case ixgbe_mac_82599EB: 1552 case ixgbe_mac_X550EM_x: 1553 case ixgbe_mac_X550EM_a: 1554 switch (hw->mac.ops.get_media_type(hw)) { 1555 case ixgbe_media_type_fiber: 1556 case ixgbe_media_type_fiber_qsfp: 1557 return (TRUE); 1558 default: 1559 return (FALSE); 1560 } 1561 default: 1562 return (FALSE); 1563 } 1564 } /* ixgbe_is_sfp */ 1565 1566 static void 1567 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1568 { 1569 1570 KASSERT(mutex_owned(&sc->admin_mtx)); 1571 1572 if (__predict_true(sc->osdep.detaching == false)) { 1573 if (sc->admin_pending == 0) 1574 workqueue_enqueue(sc->admin_wq, 1575 &sc->admin_wc, NULL); 1576 sc->admin_pending = 1; 1577 } 1578 } 1579 1580 /************************************************************************ 1581 * ixgbe_config_link 1582 ************************************************************************/ 1583 static void 1584 ixgbe_config_link(struct ixgbe_softc *sc) 1585 { 1586 struct ixgbe_hw *hw = &sc->hw; 1587 u32 autoneg, err = 0; 1588 u32 task_requests = 0; 1589 bool sfp, negotiate = false; 1590 1591 sfp = ixgbe_is_sfp(hw); 1592 1593 if (sfp) { 1594 if (hw->phy.multispeed_fiber) { 1595 ixgbe_enable_tx_laser(hw); 1596 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1597 } 1598 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1599 1600 mutex_enter(&sc->admin_mtx); 1601 sc->task_requests |= task_requests; 1602 ixgbe_schedule_admin_tasklet(sc); 1603 mutex_exit(&sc->admin_mtx); 1604 } else { 1605 struct ifmedia *ifm = &sc->media; 1606 1607 if (hw->mac.ops.check_link) 1608 err = ixgbe_check_link(hw, &sc->link_speed, 1609 &sc->link_up, FALSE); 1610 if (err) 1611 return; 1612 1613 /* 1614 * Check if it's the first call. If it's the first call, 1615 * get value for auto negotiation. 1616 */ 1617 autoneg = hw->phy.autoneg_advertised; 1618 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1619 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1620 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1621 &negotiate); 1622 if (err) 1623 return; 1624 if (hw->mac.ops.setup_link) 1625 err = hw->mac.ops.setup_link(hw, autoneg, 1626 sc->link_up); 1627 } 1628 } /* ixgbe_config_link */ 1629 1630 /************************************************************************ 1631 * ixgbe_update_stats_counters - Update board statistics counters. 1632 ************************************************************************/ 1633 static void 1634 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1635 { 1636 struct ifnet *ifp = sc->ifp; 1637 struct ixgbe_hw *hw = &sc->hw; 1638 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1639 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1640 u64 total, total_missed_rx = 0; 1641 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1642 unsigned int queue_counters; 1643 int i; 1644 1645 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1646 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1647 1648 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1649 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1650 if (hw->mac.type >= ixgbe_mac_X550) 1651 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1652 1653 /* 16 registers exist */ 1654 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1655 for (i = 0; i < queue_counters; i++) { 1656 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1657 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1658 if (hw->mac.type >= ixgbe_mac_82599EB) { 1659 IXGBE_EVC_ADD(&stats->qbrc[i], 1660 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1661 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1662 IXGBE_EVC_ADD(&stats->qbtc[i], 1663 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1664 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1665 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRDC(i), qprdc[i]); 1666 } else { 1667 /* 82598 */ 1668 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1669 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1670 } 1671 } 1672 1673 /* 8 registers exist */ 1674 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1675 uint32_t mp; 1676 1677 /* MPC */ 1678 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1679 /* global total per queue */ 1680 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1681 /* running comprehensive total for stats display */ 1682 total_missed_rx += mp; 1683 1684 if (hw->mac.type == ixgbe_mac_82598EB) 1685 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1686 1687 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1688 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1689 if (hw->mac.type >= ixgbe_mac_82599EB) { 1690 IXGBE_EVC_REGADD(hw, stats, 1691 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1692 IXGBE_EVC_REGADD(hw, stats, 1693 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1694 IXGBE_EVC_REGADD(hw, stats, 1695 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1696 } else { 1697 IXGBE_EVC_REGADD(hw, stats, 1698 IXGBE_PXONRXC(i), pxonrxc[i]); 1699 IXGBE_EVC_REGADD(hw, stats, 1700 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1701 } 1702 } 1703 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1704 1705 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1706 if ((sc->link_active == LINK_STATE_UP) 1707 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1708 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1709 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1710 } 1711 if (hw->mac.type == ixgbe_mac_X550EM_a) 1712 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1713 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1714 1715 /* Hardware workaround, gprc counts missed packets */ 1716 IXGBE_EVC_ADD(&stats->gprc, 1717 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1718 1719 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1720 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1721 total = lxontxc + lxofftxc; 1722 1723 if (hw->mac.type != ixgbe_mac_82598EB) { 1724 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1725 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1726 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1727 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1728 - total * ETHER_MIN_LEN); 1729 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1730 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1731 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1732 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1733 } else { 1734 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1735 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1736 /* 82598 only has a counter in the high register */ 1737 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1738 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1739 - total * ETHER_MIN_LEN); 1740 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1741 } 1742 1743 /* 1744 * Workaround: mprc hardware is incorrectly counting 1745 * broadcasts, so for now we subtract those. 1746 */ 1747 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1748 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1749 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1750 1751 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1752 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1753 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1754 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1755 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1756 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1757 1758 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1759 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1760 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1761 1762 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1763 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1764 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1765 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1766 1767 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1768 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1769 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1770 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1771 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1772 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1773 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1774 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1775 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1776 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1777 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1778 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1779 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1780 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1781 /* Only read FCOE on 82599 */ 1782 if (hw->mac.type != ixgbe_mac_82598EB) { 1783 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1784 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1785 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1786 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1787 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1788 } 1789 1790 /* 1791 * Fill out the OS statistics structure. Only RX errors are required 1792 * here because all TX counters are incremented in the TX path and 1793 * normal RX counters are prepared in ether_input(). 1794 */ 1795 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1796 if_statadd_ref(nsr, if_iqdrops, total_missed_rx); 1797 1798 /* 1799 * Aggregate following types of errors as RX errors: 1800 * - CRC error count, 1801 * - illegal byte error count, 1802 * - length error count, 1803 * - undersized packets count, 1804 * - fragmented packets count, 1805 * - oversized packets count, 1806 * - jabber count. 1807 */ 1808 if_statadd_ref(nsr, if_ierrors, 1809 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1810 1811 IF_STAT_PUTREF(ifp); 1812 } /* ixgbe_update_stats_counters */ 1813 1814 /************************************************************************ 1815 * ixgbe_add_hw_stats 1816 * 1817 * Add sysctl variables, one per statistic, to the system. 1818 ************************************************************************/ 1819 static void 1820 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1821 { 1822 device_t dev = sc->dev; 1823 const struct sysctlnode *rnode, *cnode; 1824 struct sysctllog **log = &sc->sysctllog; 1825 struct tx_ring *txr = sc->tx_rings; 1826 struct rx_ring *rxr = sc->rx_rings; 1827 struct ixgbe_hw *hw = &sc->hw; 1828 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1829 const char *xname = device_xname(dev); 1830 int i; 1831 1832 /* Driver Statistics */ 1833 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1834 NULL, xname, "Driver tx dma soft fail EFBIG"); 1835 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1836 NULL, xname, "m_defrag() failed"); 1837 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1838 NULL, xname, "Driver tx dma hard fail EFBIG"); 1839 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1840 NULL, xname, "Driver tx dma hard fail EINVAL"); 1841 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1842 NULL, xname, "Driver tx dma hard fail other"); 1843 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1844 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1845 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1846 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1847 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1848 NULL, xname, "Watchdog timeouts"); 1849 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1850 NULL, xname, "TSO errors"); 1851 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1852 NULL, xname, "Admin MSI-X IRQ Handled"); 1853 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1854 NULL, xname, "Link event"); 1855 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1856 NULL, xname, "SFP+ module event"); 1857 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1858 NULL, xname, "Multispeed event"); 1859 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1860 NULL, xname, "External PHY event"); 1861 1862 /* Max number of traffic class is 8 */ 1863 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1864 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1865 snprintf(sc->tcs[i].evnamebuf, 1866 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1867 if (i < __arraycount(stats->mpc)) { 1868 evcnt_attach_dynamic(&stats->mpc[i], 1869 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1870 "RX Missed Packet Count"); 1871 if (hw->mac.type == ixgbe_mac_82598EB) 1872 evcnt_attach_dynamic(&stats->rnbc[i], 1873 EVCNT_TYPE_MISC, NULL, 1874 sc->tcs[i].evnamebuf, 1875 "Receive No Buffers"); 1876 } 1877 if (i < __arraycount(stats->pxontxc)) { 1878 evcnt_attach_dynamic(&stats->pxontxc[i], 1879 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1880 "Priority XON Transmitted"); 1881 evcnt_attach_dynamic(&stats->pxofftxc[i], 1882 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1883 "Priority XOFF Transmitted"); 1884 if (hw->mac.type >= ixgbe_mac_82599EB) 1885 evcnt_attach_dynamic(&stats->pxon2offc[i], 1886 EVCNT_TYPE_MISC, NULL, 1887 sc->tcs[i].evnamebuf, 1888 "Priority XON to XOFF"); 1889 evcnt_attach_dynamic(&stats->pxonrxc[i], 1890 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1891 "Priority XON Received"); 1892 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1893 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1894 "Priority XOFF Received"); 1895 } 1896 } 1897 1898 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1899 #ifdef LRO 1900 struct lro_ctrl *lro = &rxr->lro; 1901 #endif 1902 1903 snprintf(sc->queues[i].evnamebuf, 1904 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1905 snprintf(sc->queues[i].namebuf, 1906 sizeof(sc->queues[i].namebuf), "q%d", i); 1907 1908 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1909 aprint_error_dev(dev, 1910 "could not create sysctl root\n"); 1911 break; 1912 } 1913 1914 if (sysctl_createv(log, 0, &rnode, &rnode, 1915 0, CTLTYPE_NODE, 1916 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1917 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1918 break; 1919 1920 if (sysctl_createv(log, 0, &rnode, &cnode, 1921 CTLFLAG_READWRITE, CTLTYPE_INT, 1922 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1923 ixgbe_sysctl_interrupt_rate_handler, 0, 1924 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1925 break; 1926 1927 if (sysctl_createv(log, 0, &rnode, &cnode, 1928 CTLFLAG_READONLY, CTLTYPE_INT, 1929 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1930 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1931 0, CTL_CREATE, CTL_EOL) != 0) 1932 break; 1933 1934 if (sysctl_createv(log, 0, &rnode, &cnode, 1935 CTLFLAG_READONLY, CTLTYPE_INT, 1936 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1937 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1938 0, CTL_CREATE, CTL_EOL) != 0) 1939 break; 1940 1941 if (sysctl_createv(log, 0, &rnode, &cnode, 1942 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1943 SYSCTL_DESCR("Receive Descriptor next to check"), 1944 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1945 CTL_CREATE, CTL_EOL) != 0) 1946 break; 1947 1948 if (sysctl_createv(log, 0, &rnode, &cnode, 1949 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1950 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1951 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1952 CTL_CREATE, CTL_EOL) != 0) 1953 break; 1954 1955 if (sysctl_createv(log, 0, &rnode, &cnode, 1956 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1957 SYSCTL_DESCR("Receive Descriptor Head"), 1958 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1959 CTL_CREATE, CTL_EOL) != 0) 1960 break; 1961 1962 if (sysctl_createv(log, 0, &rnode, &cnode, 1963 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1964 SYSCTL_DESCR("Receive Descriptor Tail"), 1965 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1966 CTL_CREATE, CTL_EOL) != 0) 1967 break; 1968 1969 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1970 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1971 evcnt_attach_dynamic(&sc->queues[i].handleq, 1972 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1973 "Handled queue in softint"); 1974 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1975 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1976 if (i < __arraycount(stats->qbtc)) 1977 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1978 NULL, sc->queues[i].evnamebuf, 1979 "Queue Bytes Transmitted (reg)"); 1980 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1981 NULL, sc->queues[i].evnamebuf, 1982 "Queue Packets Transmitted (soft)"); 1983 if (i < __arraycount(stats->qptc)) 1984 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1985 NULL, sc->queues[i].evnamebuf, 1986 "Queue Packets Transmitted (reg)"); 1987 #ifndef IXGBE_LEGACY_TX 1988 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1989 NULL, sc->queues[i].evnamebuf, 1990 "Packets dropped in pcq"); 1991 #endif 1992 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1993 NULL, sc->queues[i].evnamebuf, 1994 "TX Queue No Descriptor Available"); 1995 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 1996 NULL, sc->queues[i].evnamebuf, "TSO"); 1997 1998 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 1999 NULL, sc->queues[i].evnamebuf, 2000 "Queue Bytes Received (soft)"); 2001 if (i < __arraycount(stats->qbrc)) 2002 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 2003 NULL, sc->queues[i].evnamebuf, 2004 "Queue Bytes Received (reg)"); 2005 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 2006 NULL, sc->queues[i].evnamebuf, 2007 "Queue Packets Received (soft)"); 2008 if (i < __arraycount(stats->qprc)) 2009 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 2010 NULL, sc->queues[i].evnamebuf, 2011 "Queue Packets Received (reg)"); 2012 if ((i < __arraycount(stats->qprdc)) && 2013 (hw->mac.type >= ixgbe_mac_82599EB)) 2014 evcnt_attach_dynamic(&stats->qprdc[i], 2015 EVCNT_TYPE_MISC, NULL, 2016 sc->queues[i].evnamebuf, 2017 "Queue Packets Received Drop"); 2018 2019 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2020 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2021 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2022 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2023 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2024 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2025 #ifdef LRO 2026 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2027 CTLFLAG_RD, &lro->lro_queued, 0, 2028 "LRO Queued"); 2029 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2030 CTLFLAG_RD, &lro->lro_flushed, 0, 2031 "LRO Flushed"); 2032 #endif /* LRO */ 2033 } 2034 2035 /* MAC stats get their own sub node */ 2036 2037 snprintf(stats->namebuf, 2038 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2039 2040 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2041 stats->namebuf, "rx csum offload - IP"); 2042 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2043 stats->namebuf, "rx csum offload - L4"); 2044 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2045 stats->namebuf, "rx csum offload - IP bad"); 2046 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2047 stats->namebuf, "rx csum offload - L4 bad"); 2048 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2049 stats->namebuf, "Interrupt conditions zero"); 2050 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2051 stats->namebuf, "Legacy interrupts"); 2052 2053 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2054 stats->namebuf, "CRC Errors"); 2055 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2056 stats->namebuf, "Illegal Byte Errors"); 2057 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2058 stats->namebuf, "Byte Errors"); 2059 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2060 stats->namebuf, "MAC Short Packets Discarded"); 2061 if (hw->mac.type >= ixgbe_mac_X550) 2062 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2063 stats->namebuf, "Bad SFD"); 2064 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2065 stats->namebuf, "Total Packets Missed"); 2066 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2067 stats->namebuf, "MAC Local Faults"); 2068 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2069 stats->namebuf, "MAC Remote Faults"); 2070 if (hw->mac.type == ixgbe_mac_X550EM_a) 2071 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2072 NULL, stats->namebuf, "Link down event in the MAC"); 2073 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2074 stats->namebuf, "Receive Length Errors"); 2075 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2076 stats->namebuf, "Link XON Transmitted"); 2077 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2078 stats->namebuf, "Link XOFF Transmitted"); 2079 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2080 stats->namebuf, "Link XON Received"); 2081 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2082 stats->namebuf, "Link XOFF Received"); 2083 2084 /* Packet Reception Stats */ 2085 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2086 stats->namebuf, "Total Octets Received"); 2087 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2088 stats->namebuf, "Good Octets Received"); 2089 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2090 stats->namebuf, "Total Packets Received"); 2091 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2092 stats->namebuf, "Good Packets Received"); 2093 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2094 stats->namebuf, "Multicast Packets Received"); 2095 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2096 stats->namebuf, "Broadcast Packets Received"); 2097 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2098 stats->namebuf, "64 byte frames received "); 2099 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2100 stats->namebuf, "65-127 byte frames received"); 2101 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2102 stats->namebuf, "128-255 byte frames received"); 2103 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2104 stats->namebuf, "256-511 byte frames received"); 2105 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2106 stats->namebuf, "512-1023 byte frames received"); 2107 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2108 stats->namebuf, "1023-1522 byte frames received"); 2109 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2110 stats->namebuf, "Receive Undersized"); 2111 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2112 stats->namebuf, "Fragmented Packets Received "); 2113 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2114 stats->namebuf, "Oversized Packets Received"); 2115 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2116 stats->namebuf, "Received Jabber"); 2117 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2118 stats->namebuf, "Management Packets Received"); 2119 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2120 stats->namebuf, "Management Packets Dropped"); 2121 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2122 stats->namebuf, "Checksum Errors"); 2123 2124 /* Packet Transmission Stats */ 2125 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2126 stats->namebuf, "Good Octets Transmitted"); 2127 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2128 stats->namebuf, "Total Packets Transmitted"); 2129 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2130 stats->namebuf, "Good Packets Transmitted"); 2131 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2132 stats->namebuf, "Broadcast Packets Transmitted"); 2133 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2134 stats->namebuf, "Multicast Packets Transmitted"); 2135 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2136 stats->namebuf, "Management Packets Transmitted"); 2137 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2138 stats->namebuf, "64 byte frames transmitted "); 2139 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2140 stats->namebuf, "65-127 byte frames transmitted"); 2141 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2142 stats->namebuf, "128-255 byte frames transmitted"); 2143 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2144 stats->namebuf, "256-511 byte frames transmitted"); 2145 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2146 stats->namebuf, "512-1023 byte frames transmitted"); 2147 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2148 stats->namebuf, "1024-1522 byte frames transmitted"); 2149 } /* ixgbe_add_hw_stats */ 2150 2151 static void 2152 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2153 { 2154 struct tx_ring *txr = sc->tx_rings; 2155 struct rx_ring *rxr = sc->rx_rings; 2156 struct ixgbe_hw *hw = &sc->hw; 2157 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2158 int i; 2159 2160 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2161 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2162 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2163 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2164 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2165 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2166 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2167 IXGBE_EVC_STORE(&sc->tso_err, 0); 2168 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2169 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2170 IXGBE_EVC_STORE(&sc->link_workev, 0); 2171 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2172 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2173 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2174 2175 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2176 if (i < __arraycount(stats->mpc)) { 2177 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2178 if (hw->mac.type == ixgbe_mac_82598EB) 2179 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2180 } 2181 if (i < __arraycount(stats->pxontxc)) { 2182 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2183 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2184 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2185 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2186 if (hw->mac.type >= ixgbe_mac_82599EB) 2187 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2188 } 2189 } 2190 2191 txr = sc->tx_rings; 2192 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2193 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2194 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2195 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2196 IXGBE_EVC_STORE(&txr->total_packets, 0); 2197 #ifndef IXGBE_LEGACY_TX 2198 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2199 #endif 2200 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2201 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2202 txr->q_efbig_tx_dma_setup = 0; 2203 txr->q_mbuf_defrag_failed = 0; 2204 txr->q_efbig2_tx_dma_setup = 0; 2205 txr->q_einval_tx_dma_setup = 0; 2206 txr->q_other_tx_dma_setup = 0; 2207 txr->q_eagain_tx_dma_setup = 0; 2208 txr->q_enomem_tx_dma_setup = 0; 2209 txr->q_tso_err = 0; 2210 2211 if (i < __arraycount(stats->qprc)) { 2212 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2213 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2214 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2215 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2216 if (hw->mac.type >= ixgbe_mac_82599EB) 2217 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2218 } 2219 2220 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2221 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2222 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2223 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2224 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2225 } 2226 IXGBE_EVC_STORE(&stats->ipcs, 0); 2227 IXGBE_EVC_STORE(&stats->l4cs, 0); 2228 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2229 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2230 IXGBE_EVC_STORE(&stats->intzero, 0); 2231 IXGBE_EVC_STORE(&stats->legint, 0); 2232 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2233 IXGBE_EVC_STORE(&stats->illerrc, 0); 2234 IXGBE_EVC_STORE(&stats->errbc, 0); 2235 IXGBE_EVC_STORE(&stats->mspdc, 0); 2236 if (hw->mac.type >= ixgbe_mac_X550) 2237 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2238 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2239 IXGBE_EVC_STORE(&stats->mlfc, 0); 2240 IXGBE_EVC_STORE(&stats->mrfc, 0); 2241 if (hw->mac.type == ixgbe_mac_X550EM_a) 2242 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2243 IXGBE_EVC_STORE(&stats->rlec, 0); 2244 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2245 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2246 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2247 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2248 2249 /* Packet Reception Stats */ 2250 IXGBE_EVC_STORE(&stats->tor, 0); 2251 IXGBE_EVC_STORE(&stats->gorc, 0); 2252 IXGBE_EVC_STORE(&stats->tpr, 0); 2253 IXGBE_EVC_STORE(&stats->gprc, 0); 2254 IXGBE_EVC_STORE(&stats->mprc, 0); 2255 IXGBE_EVC_STORE(&stats->bprc, 0); 2256 IXGBE_EVC_STORE(&stats->prc64, 0); 2257 IXGBE_EVC_STORE(&stats->prc127, 0); 2258 IXGBE_EVC_STORE(&stats->prc255, 0); 2259 IXGBE_EVC_STORE(&stats->prc511, 0); 2260 IXGBE_EVC_STORE(&stats->prc1023, 0); 2261 IXGBE_EVC_STORE(&stats->prc1522, 0); 2262 IXGBE_EVC_STORE(&stats->ruc, 0); 2263 IXGBE_EVC_STORE(&stats->rfc, 0); 2264 IXGBE_EVC_STORE(&stats->roc, 0); 2265 IXGBE_EVC_STORE(&stats->rjc, 0); 2266 IXGBE_EVC_STORE(&stats->mngprc, 0); 2267 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2268 IXGBE_EVC_STORE(&stats->xec, 0); 2269 2270 /* Packet Transmission Stats */ 2271 IXGBE_EVC_STORE(&stats->gotc, 0); 2272 IXGBE_EVC_STORE(&stats->tpt, 0); 2273 IXGBE_EVC_STORE(&stats->gptc, 0); 2274 IXGBE_EVC_STORE(&stats->bptc, 0); 2275 IXGBE_EVC_STORE(&stats->mptc, 0); 2276 IXGBE_EVC_STORE(&stats->mngptc, 0); 2277 IXGBE_EVC_STORE(&stats->ptc64, 0); 2278 IXGBE_EVC_STORE(&stats->ptc127, 0); 2279 IXGBE_EVC_STORE(&stats->ptc255, 0); 2280 IXGBE_EVC_STORE(&stats->ptc511, 0); 2281 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2282 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2283 } 2284 2285 /************************************************************************ 2286 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2287 * 2288 * Retrieves the TDH value from the hardware 2289 ************************************************************************/ 2290 static int 2291 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2292 { 2293 struct sysctlnode node = *rnode; 2294 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2295 struct ixgbe_softc *sc; 2296 uint32_t val; 2297 2298 if (!txr) 2299 return (0); 2300 2301 sc = txr->sc; 2302 if (ixgbe_fw_recovery_mode_swflag(sc)) 2303 return (EPERM); 2304 2305 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2306 node.sysctl_data = &val; 2307 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2308 } /* ixgbe_sysctl_tdh_handler */ 2309 2310 /************************************************************************ 2311 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2312 * 2313 * Retrieves the TDT value from the hardware 2314 ************************************************************************/ 2315 static int 2316 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2317 { 2318 struct sysctlnode node = *rnode; 2319 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2320 struct ixgbe_softc *sc; 2321 uint32_t val; 2322 2323 if (!txr) 2324 return (0); 2325 2326 sc = txr->sc; 2327 if (ixgbe_fw_recovery_mode_swflag(sc)) 2328 return (EPERM); 2329 2330 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2331 node.sysctl_data = &val; 2332 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2333 } /* ixgbe_sysctl_tdt_handler */ 2334 2335 /************************************************************************ 2336 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2337 * handler function 2338 * 2339 * Retrieves the next_to_check value 2340 ************************************************************************/ 2341 static int 2342 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2343 { 2344 struct sysctlnode node = *rnode; 2345 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2346 struct ixgbe_softc *sc; 2347 uint32_t val; 2348 2349 if (!rxr) 2350 return (0); 2351 2352 sc = rxr->sc; 2353 if (ixgbe_fw_recovery_mode_swflag(sc)) 2354 return (EPERM); 2355 2356 val = rxr->next_to_check; 2357 node.sysctl_data = &val; 2358 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2359 } /* ixgbe_sysctl_next_to_check_handler */ 2360 2361 /************************************************************************ 2362 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2363 * handler function 2364 * 2365 * Retrieves the next_to_refresh value 2366 ************************************************************************/ 2367 static int 2368 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2369 { 2370 struct sysctlnode node = *rnode; 2371 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2372 struct ixgbe_softc *sc; 2373 uint32_t val; 2374 2375 if (!rxr) 2376 return (0); 2377 2378 sc = rxr->sc; 2379 if (ixgbe_fw_recovery_mode_swflag(sc)) 2380 return (EPERM); 2381 2382 val = rxr->next_to_refresh; 2383 node.sysctl_data = &val; 2384 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2385 } /* ixgbe_sysctl_next_to_refresh_handler */ 2386 2387 /************************************************************************ 2388 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2389 * 2390 * Retrieves the RDH value from the hardware 2391 ************************************************************************/ 2392 static int 2393 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2394 { 2395 struct sysctlnode node = *rnode; 2396 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2397 struct ixgbe_softc *sc; 2398 uint32_t val; 2399 2400 if (!rxr) 2401 return (0); 2402 2403 sc = rxr->sc; 2404 if (ixgbe_fw_recovery_mode_swflag(sc)) 2405 return (EPERM); 2406 2407 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2408 node.sysctl_data = &val; 2409 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2410 } /* ixgbe_sysctl_rdh_handler */ 2411 2412 /************************************************************************ 2413 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2414 * 2415 * Retrieves the RDT value from the hardware 2416 ************************************************************************/ 2417 static int 2418 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2419 { 2420 struct sysctlnode node = *rnode; 2421 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2422 struct ixgbe_softc *sc; 2423 uint32_t val; 2424 2425 if (!rxr) 2426 return (0); 2427 2428 sc = rxr->sc; 2429 if (ixgbe_fw_recovery_mode_swflag(sc)) 2430 return (EPERM); 2431 2432 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2433 node.sysctl_data = &val; 2434 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2435 } /* ixgbe_sysctl_rdt_handler */ 2436 2437 static int 2438 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2439 { 2440 struct ifnet *ifp = &ec->ec_if; 2441 struct ixgbe_softc *sc = ifp->if_softc; 2442 int rv; 2443 2444 if (set) 2445 rv = ixgbe_register_vlan(sc, vid); 2446 else 2447 rv = ixgbe_unregister_vlan(sc, vid); 2448 2449 if (rv != 0) 2450 return rv; 2451 2452 /* 2453 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2454 * or 0 to 1. 2455 */ 2456 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2457 ixgbe_setup_vlan_hw_tagging(sc); 2458 2459 return rv; 2460 } 2461 2462 /************************************************************************ 2463 * ixgbe_register_vlan 2464 * 2465 * Run via vlan config EVENT, it enables us to use the 2466 * HW Filter table since we can get the vlan id. This 2467 * just creates the entry in the soft version of the 2468 * VFTA, init will repopulate the real table. 2469 ************************************************************************/ 2470 static int 2471 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2472 { 2473 u16 index, bit; 2474 int error; 2475 2476 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2477 return EINVAL; 2478 2479 IXGBE_CORE_LOCK(sc); 2480 index = (vtag >> 5) & 0x7F; 2481 bit = vtag & 0x1F; 2482 sc->shadow_vfta[index] |= ((u32)1 << bit); 2483 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2484 true); 2485 IXGBE_CORE_UNLOCK(sc); 2486 if (error != 0) 2487 error = EACCES; 2488 2489 return error; 2490 } /* ixgbe_register_vlan */ 2491 2492 /************************************************************************ 2493 * ixgbe_unregister_vlan 2494 * 2495 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2496 ************************************************************************/ 2497 static int 2498 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2499 { 2500 u16 index, bit; 2501 int error; 2502 2503 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2504 return EINVAL; 2505 2506 IXGBE_CORE_LOCK(sc); 2507 index = (vtag >> 5) & 0x7F; 2508 bit = vtag & 0x1F; 2509 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2510 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2511 true); 2512 IXGBE_CORE_UNLOCK(sc); 2513 if (error != 0) 2514 error = EACCES; 2515 2516 return error; 2517 } /* ixgbe_unregister_vlan */ 2518 2519 static void 2520 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2521 { 2522 struct ethercom *ec = &sc->osdep.ec; 2523 struct ixgbe_hw *hw = &sc->hw; 2524 struct rx_ring *rxr; 2525 u32 ctrl; 2526 int i; 2527 bool hwtagging; 2528 2529 /* Enable HW tagging only if any vlan is attached */ 2530 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2531 && VLAN_ATTACHED(ec); 2532 2533 /* Setup the queues for vlans */ 2534 for (i = 0; i < sc->num_queues; i++) { 2535 rxr = &sc->rx_rings[i]; 2536 /* 2537 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2538 */ 2539 if (hw->mac.type != ixgbe_mac_82598EB) { 2540 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2541 if (hwtagging) 2542 ctrl |= IXGBE_RXDCTL_VME; 2543 else 2544 ctrl &= ~IXGBE_RXDCTL_VME; 2545 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2546 } 2547 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2548 } 2549 2550 /* VLAN hw tagging for 82598 */ 2551 if (hw->mac.type == ixgbe_mac_82598EB) { 2552 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2553 if (hwtagging) 2554 ctrl |= IXGBE_VLNCTRL_VME; 2555 else 2556 ctrl &= ~IXGBE_VLNCTRL_VME; 2557 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2558 } 2559 } /* ixgbe_setup_vlan_hw_tagging */ 2560 2561 static void 2562 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2563 { 2564 struct ethercom *ec = &sc->osdep.ec; 2565 struct ixgbe_hw *hw = &sc->hw; 2566 int i; 2567 u32 ctrl; 2568 struct vlanid_list *vlanidp; 2569 2570 /* 2571 * This function is called from both if_init and ifflags_cb() 2572 * on NetBSD. 2573 */ 2574 2575 /* 2576 * Part 1: 2577 * Setup VLAN HW tagging 2578 */ 2579 ixgbe_setup_vlan_hw_tagging(sc); 2580 2581 /* 2582 * Part 2: 2583 * Setup VLAN HW filter 2584 */ 2585 /* Cleanup shadow_vfta */ 2586 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2587 sc->shadow_vfta[i] = 0; 2588 /* Generate shadow_vfta from ec_vids */ 2589 ETHER_LOCK(ec); 2590 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2591 uint32_t idx; 2592 2593 idx = vlanidp->vid / 32; 2594 KASSERT(idx < IXGBE_VFTA_SIZE); 2595 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2596 } 2597 ETHER_UNLOCK(ec); 2598 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2599 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2600 2601 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2602 /* Enable the Filter Table if enabled */ 2603 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2604 ctrl |= IXGBE_VLNCTRL_VFE; 2605 else 2606 ctrl &= ~IXGBE_VLNCTRL_VFE; 2607 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2608 } /* ixgbe_setup_vlan_hw_support */ 2609 2610 /************************************************************************ 2611 * ixgbe_get_slot_info 2612 * 2613 * Get the width and transaction speed of 2614 * the slot this adapter is plugged into. 2615 ************************************************************************/ 2616 static void 2617 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2618 { 2619 device_t dev = sc->dev; 2620 struct ixgbe_hw *hw = &sc->hw; 2621 u32 offset; 2622 u16 link; 2623 int bus_info_valid = TRUE; 2624 2625 /* Some devices are behind an internal bridge */ 2626 switch (hw->device_id) { 2627 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2628 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2629 goto get_parent_info; 2630 default: 2631 break; 2632 } 2633 2634 ixgbe_get_bus_info(hw); 2635 2636 /* 2637 * Some devices don't use PCI-E, but there is no need 2638 * to display "Unknown" for bus speed and width. 2639 */ 2640 switch (hw->mac.type) { 2641 case ixgbe_mac_X550EM_x: 2642 case ixgbe_mac_X550EM_a: 2643 return; 2644 default: 2645 goto display; 2646 } 2647 2648 get_parent_info: 2649 /* 2650 * For the Quad port adapter we need to parse back 2651 * up the PCI tree to find the speed of the expansion 2652 * slot into which this adapter is plugged. A bit more work. 2653 */ 2654 dev = device_parent(device_parent(dev)); 2655 #if 0 2656 #ifdef IXGBE_DEBUG 2657 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2658 pci_get_slot(dev), pci_get_function(dev)); 2659 #endif 2660 dev = device_parent(device_parent(dev)); 2661 #ifdef IXGBE_DEBUG 2662 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2663 pci_get_slot(dev), pci_get_function(dev)); 2664 #endif 2665 #endif 2666 /* Now get the PCI Express Capabilities offset */ 2667 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2668 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2669 /* 2670 * Hmm...can't get PCI-Express capabilities. 2671 * Falling back to default method. 2672 */ 2673 bus_info_valid = FALSE; 2674 ixgbe_get_bus_info(hw); 2675 goto display; 2676 } 2677 /* ...and read the Link Status Register */ 2678 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2679 offset + PCIE_LCSR) >> 16; 2680 ixgbe_set_pci_config_data_generic(hw, link); 2681 2682 display: 2683 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2684 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2685 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2686 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2687 "Unknown"), 2688 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2689 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2690 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2691 "Unknown")); 2692 2693 if (bus_info_valid) { 2694 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2695 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2696 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2697 device_printf(dev, "PCI-Express bandwidth available" 2698 " for this card\n is not sufficient for" 2699 " optimal performance.\n"); 2700 device_printf(dev, "For optimal performance a x8 " 2701 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2702 } 2703 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2704 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2705 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2706 device_printf(dev, "PCI-Express bandwidth available" 2707 " for this card\n is not sufficient for" 2708 " optimal performance.\n"); 2709 device_printf(dev, "For optimal performance a x8 " 2710 "PCIE Gen3 slot is required.\n"); 2711 } 2712 } else 2713 device_printf(dev, 2714 "Unable to determine slot speed/width. The speed/width " 2715 "reported are that of the internal switch.\n"); 2716 2717 return; 2718 } /* ixgbe_get_slot_info */ 2719 2720 /************************************************************************ 2721 * ixgbe_enable_queue - Queue Interrupt Enabler 2722 ************************************************************************/ 2723 static inline void 2724 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2725 { 2726 struct ixgbe_hw *hw = &sc->hw; 2727 struct ix_queue *que = &sc->queues[vector]; 2728 u64 queue = 1ULL << vector; 2729 u32 mask; 2730 2731 mutex_enter(&que->dc_mtx); 2732 if (que->disabled_count > 0 && --que->disabled_count > 0) 2733 goto out; 2734 2735 if (hw->mac.type == ixgbe_mac_82598EB) { 2736 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2737 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2738 } else { 2739 mask = (queue & 0xFFFFFFFF); 2740 if (mask) 2741 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2742 mask = (queue >> 32); 2743 if (mask) 2744 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2745 } 2746 out: 2747 mutex_exit(&que->dc_mtx); 2748 } /* ixgbe_enable_queue */ 2749 2750 /************************************************************************ 2751 * ixgbe_disable_queue_internal 2752 ************************************************************************/ 2753 static inline void 2754 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2755 { 2756 struct ixgbe_hw *hw = &sc->hw; 2757 struct ix_queue *que = &sc->queues[vector]; 2758 u64 queue = 1ULL << vector; 2759 u32 mask; 2760 2761 mutex_enter(&que->dc_mtx); 2762 2763 if (que->disabled_count > 0) { 2764 if (nestok) 2765 que->disabled_count++; 2766 goto out; 2767 } 2768 que->disabled_count++; 2769 2770 if (hw->mac.type == ixgbe_mac_82598EB) { 2771 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2772 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2773 } else { 2774 mask = (queue & 0xFFFFFFFF); 2775 if (mask) 2776 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2777 mask = (queue >> 32); 2778 if (mask) 2779 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2780 } 2781 out: 2782 mutex_exit(&que->dc_mtx); 2783 } /* ixgbe_disable_queue_internal */ 2784 2785 /************************************************************************ 2786 * ixgbe_disable_queue 2787 ************************************************************************/ 2788 static inline void 2789 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2790 { 2791 2792 ixgbe_disable_queue_internal(sc, vector, true); 2793 } /* ixgbe_disable_queue */ 2794 2795 /************************************************************************ 2796 * ixgbe_sched_handle_que - schedule deferred packet processing 2797 ************************************************************************/ 2798 static inline void 2799 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2800 { 2801 2802 if (que->txrx_use_workqueue) { 2803 /* 2804 * sc->que_wq is bound to each CPU instead of 2805 * each NIC queue to reduce workqueue kthread. As we 2806 * should consider about interrupt affinity in this 2807 * function, the workqueue kthread must be WQ_PERCPU. 2808 * If create WQ_PERCPU workqueue kthread for each NIC 2809 * queue, that number of created workqueue kthread is 2810 * (number of used NIC queue) * (number of CPUs) = 2811 * (number of CPUs) ^ 2 most often. 2812 * 2813 * The same NIC queue's interrupts are avoided by 2814 * masking the queue's interrupt. And different 2815 * NIC queue's interrupts use different struct work 2816 * (que->wq_cookie). So, "enqueued flag" to avoid 2817 * twice workqueue_enqueue() is not required . 2818 */ 2819 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2820 } else 2821 softint_schedule(que->que_si); 2822 } 2823 2824 /************************************************************************ 2825 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2826 ************************************************************************/ 2827 static int 2828 ixgbe_msix_que(void *arg) 2829 { 2830 struct ix_queue *que = arg; 2831 struct ixgbe_softc *sc = que->sc; 2832 struct ifnet *ifp = sc->ifp; 2833 struct tx_ring *txr = que->txr; 2834 struct rx_ring *rxr = que->rxr; 2835 u32 newitr = 0; 2836 2837 /* Protect against spurious interrupts */ 2838 if ((ifp->if_flags & IFF_RUNNING) == 0) 2839 return 0; 2840 2841 ixgbe_disable_queue(sc, que->msix); 2842 IXGBE_EVC_ADD(&que->irqs, 1); 2843 2844 /* 2845 * Don't change "que->txrx_use_workqueue" from this point to avoid 2846 * flip-flopping softint/workqueue mode in one deferred processing. 2847 */ 2848 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2849 2850 IXGBE_TX_LOCK(txr); 2851 ixgbe_txeof(txr); 2852 IXGBE_TX_UNLOCK(txr); 2853 2854 /* Do AIM now? */ 2855 2856 if (sc->enable_aim == false) 2857 goto no_calc; 2858 /* 2859 * Do Adaptive Interrupt Moderation: 2860 * - Write out last calculated setting 2861 * - Calculate based on average size over 2862 * the last interval. 2863 */ 2864 if (que->eitr_setting) 2865 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2866 2867 que->eitr_setting = 0; 2868 2869 /* Idle, do nothing */ 2870 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2871 goto no_calc; 2872 2873 if ((txr->bytes) && (txr->packets)) 2874 newitr = txr->bytes/txr->packets; 2875 if ((rxr->bytes) && (rxr->packets)) 2876 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2877 newitr += 24; /* account for hardware frame, crc */ 2878 2879 /* set an upper boundary */ 2880 newitr = uimin(newitr, 3000); 2881 2882 /* Be nice to the mid range */ 2883 if ((newitr > 300) && (newitr < 1200)) 2884 newitr = (newitr / 3); 2885 else 2886 newitr = (newitr / 2); 2887 2888 /* 2889 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2890 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2891 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2892 * on 1G and higher. 2893 */ 2894 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2895 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2896 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2897 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2898 2899 /* save for next interrupt */ 2900 que->eitr_setting = newitr; 2901 2902 /* Reset state */ 2903 txr->bytes = 0; 2904 txr->packets = 0; 2905 rxr->bytes = 0; 2906 rxr->packets = 0; 2907 2908 no_calc: 2909 ixgbe_sched_handle_que(sc, que); 2910 2911 return 1; 2912 } /* ixgbe_msix_que */ 2913 2914 /************************************************************************ 2915 * ixgbe_media_status - Media Ioctl callback 2916 * 2917 * Called whenever the user queries the status of 2918 * the interface using ifconfig. 2919 ************************************************************************/ 2920 static void 2921 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2922 { 2923 struct ixgbe_softc *sc = ifp->if_softc; 2924 struct ixgbe_hw *hw = &sc->hw; 2925 int layer; 2926 2927 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2928 ixgbe_update_link_status(sc); 2929 2930 ifmr->ifm_status = IFM_AVALID; 2931 ifmr->ifm_active = IFM_ETHER; 2932 2933 if (sc->link_active != LINK_STATE_UP) { 2934 ifmr->ifm_active |= IFM_NONE; 2935 return; 2936 } 2937 2938 ifmr->ifm_status |= IFM_ACTIVE; 2939 layer = sc->phy_layer; 2940 2941 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2942 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2943 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2944 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2945 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2946 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2947 switch (sc->link_speed) { 2948 case IXGBE_LINK_SPEED_10GB_FULL: 2949 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2950 break; 2951 case IXGBE_LINK_SPEED_5GB_FULL: 2952 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2953 break; 2954 case IXGBE_LINK_SPEED_2_5GB_FULL: 2955 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2956 break; 2957 case IXGBE_LINK_SPEED_1GB_FULL: 2958 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2959 break; 2960 case IXGBE_LINK_SPEED_100_FULL: 2961 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2962 break; 2963 case IXGBE_LINK_SPEED_10_FULL: 2964 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2965 break; 2966 } 2967 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2968 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2969 switch (sc->link_speed) { 2970 case IXGBE_LINK_SPEED_10GB_FULL: 2971 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2972 break; 2973 } 2974 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2975 switch (sc->link_speed) { 2976 case IXGBE_LINK_SPEED_10GB_FULL: 2977 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2978 break; 2979 case IXGBE_LINK_SPEED_1GB_FULL: 2980 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2981 break; 2982 } 2983 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2984 switch (sc->link_speed) { 2985 case IXGBE_LINK_SPEED_10GB_FULL: 2986 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2987 break; 2988 case IXGBE_LINK_SPEED_1GB_FULL: 2989 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2990 break; 2991 } 2992 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2993 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2994 switch (sc->link_speed) { 2995 case IXGBE_LINK_SPEED_10GB_FULL: 2996 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2997 break; 2998 case IXGBE_LINK_SPEED_1GB_FULL: 2999 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 3000 break; 3001 } 3002 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 3003 switch (sc->link_speed) { 3004 case IXGBE_LINK_SPEED_10GB_FULL: 3005 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3006 break; 3007 } 3008 /* 3009 * XXX: These need to use the proper media types once 3010 * they're added. 3011 */ 3012 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3013 switch (sc->link_speed) { 3014 case IXGBE_LINK_SPEED_10GB_FULL: 3015 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3016 break; 3017 case IXGBE_LINK_SPEED_2_5GB_FULL: 3018 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3019 break; 3020 case IXGBE_LINK_SPEED_1GB_FULL: 3021 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3022 break; 3023 } 3024 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3025 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3026 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3027 switch (sc->link_speed) { 3028 case IXGBE_LINK_SPEED_10GB_FULL: 3029 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3030 break; 3031 case IXGBE_LINK_SPEED_2_5GB_FULL: 3032 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3033 break; 3034 case IXGBE_LINK_SPEED_1GB_FULL: 3035 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3036 break; 3037 } 3038 3039 /* If nothing is recognized... */ 3040 #if 0 3041 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3042 ifmr->ifm_active |= IFM_UNKNOWN; 3043 #endif 3044 3045 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3046 3047 /* Display current flow control setting used on link */ 3048 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3049 hw->fc.current_mode == ixgbe_fc_full) 3050 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3051 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3052 hw->fc.current_mode == ixgbe_fc_full) 3053 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3054 3055 return; 3056 } /* ixgbe_media_status */ 3057 3058 /************************************************************************ 3059 * ixgbe_media_change - Media Ioctl callback 3060 * 3061 * Called when the user changes speed/duplex using 3062 * media/mediopt option with ifconfig. 3063 ************************************************************************/ 3064 static int 3065 ixgbe_media_change(struct ifnet *ifp) 3066 { 3067 struct ixgbe_softc *sc = ifp->if_softc; 3068 struct ifmedia *ifm = &sc->media; 3069 struct ixgbe_hw *hw = &sc->hw; 3070 ixgbe_link_speed speed = 0; 3071 ixgbe_link_speed link_caps = 0; 3072 bool negotiate = false; 3073 s32 err = IXGBE_NOT_IMPLEMENTED; 3074 3075 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3076 3077 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3078 return (EINVAL); 3079 3080 if (hw->phy.media_type == ixgbe_media_type_backplane) 3081 return (EPERM); 3082 3083 /* 3084 * We don't actually need to check against the supported 3085 * media types of the adapter; ifmedia will take care of 3086 * that for us. 3087 */ 3088 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3089 case IFM_AUTO: 3090 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3091 &negotiate); 3092 if (err != IXGBE_SUCCESS) { 3093 device_printf(sc->dev, "Unable to determine " 3094 "supported advertise speeds\n"); 3095 return (ENODEV); 3096 } 3097 speed |= link_caps; 3098 break; 3099 case IFM_10G_T: 3100 case IFM_10G_LRM: 3101 case IFM_10G_LR: 3102 case IFM_10G_TWINAX: 3103 case IFM_10G_SR: 3104 case IFM_10G_CX4: 3105 case IFM_10G_KR: 3106 case IFM_10G_KX4: 3107 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3108 break; 3109 case IFM_5000_T: 3110 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3111 break; 3112 case IFM_2500_T: 3113 case IFM_2500_KX: 3114 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3115 break; 3116 case IFM_1000_T: 3117 case IFM_1000_LX: 3118 case IFM_1000_SX: 3119 case IFM_1000_KX: 3120 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3121 break; 3122 case IFM_100_TX: 3123 speed |= IXGBE_LINK_SPEED_100_FULL; 3124 break; 3125 case IFM_10_T: 3126 speed |= IXGBE_LINK_SPEED_10_FULL; 3127 break; 3128 case IFM_NONE: 3129 break; 3130 default: 3131 goto invalid; 3132 } 3133 3134 hw->mac.autotry_restart = TRUE; 3135 hw->mac.ops.setup_link(hw, speed, TRUE); 3136 sc->advertise = 0; 3137 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3138 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3139 sc->advertise |= 1 << 2; 3140 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3141 sc->advertise |= 1 << 1; 3142 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3143 sc->advertise |= 1 << 0; 3144 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3145 sc->advertise |= 1 << 3; 3146 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3147 sc->advertise |= 1 << 4; 3148 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3149 sc->advertise |= 1 << 5; 3150 } 3151 3152 return (0); 3153 3154 invalid: 3155 device_printf(sc->dev, "Invalid media type!\n"); 3156 3157 return (EINVAL); 3158 } /* ixgbe_media_change */ 3159 3160 /************************************************************************ 3161 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3162 ************************************************************************/ 3163 static int 3164 ixgbe_msix_admin(void *arg) 3165 { 3166 struct ixgbe_softc *sc = arg; 3167 struct ixgbe_hw *hw = &sc->hw; 3168 u32 eicr; 3169 u32 eims_orig; 3170 u32 eims_disable = 0; 3171 3172 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3173 3174 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3175 /* Pause other interrupts */ 3176 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3177 3178 /* 3179 * First get the cause. 3180 * 3181 * The specifications of 82598, 82599, X540 and X550 say EICS register 3182 * is write only. However, Linux says it is a workaround for silicon 3183 * errata to read EICS instead of EICR to get interrupt cause. 3184 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3185 */ 3186 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3187 /* Be sure the queue bits are not cleared */ 3188 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3189 /* Clear all OTHER interrupts with write */ 3190 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3191 3192 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3193 3194 /* Re-enable some OTHER interrupts */ 3195 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3196 3197 return 1; 3198 } /* ixgbe_msix_admin */ 3199 3200 static void 3201 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3202 { 3203 struct ixgbe_hw *hw = &sc->hw; 3204 u32 task_requests = 0; 3205 s32 retval; 3206 3207 /* Link status change */ 3208 if (eicr & IXGBE_EICR_LSC) { 3209 task_requests |= IXGBE_REQUEST_TASK_LSC; 3210 *eims_disable |= IXGBE_EIMS_LSC; 3211 } 3212 3213 if (ixgbe_is_sfp(hw)) { 3214 u32 eicr_mask; 3215 3216 /* Pluggable optics-related interrupt */ 3217 if (hw->mac.type >= ixgbe_mac_X540) 3218 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3219 else 3220 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3221 3222 /* 3223 * An interrupt might not arrive when a module is inserted. 3224 * When an link status change interrupt occurred and the driver 3225 * still regard SFP as unplugged, issue the module softint 3226 * and then issue LSC interrupt. 3227 */ 3228 if ((eicr & eicr_mask) 3229 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3230 && (eicr & IXGBE_EICR_LSC))) { 3231 task_requests |= IXGBE_REQUEST_TASK_MOD; 3232 *eims_disable |= IXGBE_EIMS_LSC; 3233 } 3234 3235 if ((hw->mac.type == ixgbe_mac_82599EB) && 3236 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3237 task_requests |= IXGBE_REQUEST_TASK_MSF; 3238 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3239 } 3240 } 3241 3242 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3243 #ifdef IXGBE_FDIR 3244 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3245 (eicr & IXGBE_EICR_FLOW_DIR)) { 3246 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3247 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3248 /* Disable the interrupt */ 3249 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3250 } 3251 } 3252 #endif 3253 3254 if (eicr & IXGBE_EICR_ECC) { 3255 if (ratecheck(&sc->lasterr_time, 3256 &ixgbe_errlog_intrvl)) 3257 device_printf(sc->dev, 3258 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3259 } 3260 3261 /* Check for over temp condition */ 3262 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3263 switch (sc->hw.mac.type) { 3264 case ixgbe_mac_X550EM_a: 3265 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3266 break; 3267 retval = hw->phy.ops.check_overtemp(hw); 3268 if (retval != IXGBE_ERR_OVERTEMP) 3269 break; 3270 if (ratecheck(&sc->lasterr_time, 3271 &ixgbe_errlog_intrvl)) { 3272 device_printf(sc->dev, 3273 "CRITICAL: OVER TEMP!! " 3274 "PHY IS SHUT DOWN!!\n"); 3275 device_printf(sc->dev, 3276 "System shutdown required!\n"); 3277 } 3278 break; 3279 default: 3280 if (!(eicr & IXGBE_EICR_TS)) 3281 break; 3282 retval = hw->phy.ops.check_overtemp(hw); 3283 if (retval != IXGBE_ERR_OVERTEMP) 3284 break; 3285 if (ratecheck(&sc->lasterr_time, 3286 &ixgbe_errlog_intrvl)) { 3287 device_printf(sc->dev, 3288 "CRITICAL: OVER TEMP!! " 3289 "PHY IS SHUT DOWN!!\n"); 3290 device_printf(sc->dev, 3291 "System shutdown required!\n"); 3292 } 3293 break; 3294 } 3295 } 3296 3297 /* Check for VF message */ 3298 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3299 (eicr & IXGBE_EICR_MAILBOX)) { 3300 task_requests |= IXGBE_REQUEST_TASK_MBX; 3301 *eims_disable |= IXGBE_EIMS_MAILBOX; 3302 } 3303 } 3304 3305 /* Check for fan failure */ 3306 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3307 ixgbe_check_fan_failure(sc, eicr, true); 3308 3309 /* External PHY interrupt */ 3310 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3311 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3312 task_requests |= IXGBE_REQUEST_TASK_PHY; 3313 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3314 } 3315 3316 if (task_requests != 0) { 3317 mutex_enter(&sc->admin_mtx); 3318 sc->task_requests |= task_requests; 3319 ixgbe_schedule_admin_tasklet(sc); 3320 mutex_exit(&sc->admin_mtx); 3321 } 3322 } 3323 3324 static void 3325 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3326 { 3327 3328 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3329 itr |= itr << 16; 3330 else 3331 itr |= IXGBE_EITR_CNT_WDIS; 3332 3333 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3334 } 3335 3336 3337 /************************************************************************ 3338 * ixgbe_sysctl_interrupt_rate_handler 3339 ************************************************************************/ 3340 static int 3341 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3342 { 3343 struct sysctlnode node = *rnode; 3344 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3345 struct ixgbe_softc *sc; 3346 uint32_t reg, usec, rate; 3347 int error; 3348 3349 if (que == NULL) 3350 return 0; 3351 3352 sc = que->sc; 3353 if (ixgbe_fw_recovery_mode_swflag(sc)) 3354 return (EPERM); 3355 3356 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3357 usec = ((reg & 0x0FF8) >> 3); 3358 if (usec > 0) 3359 rate = 500000 / usec; 3360 else 3361 rate = 0; 3362 node.sysctl_data = &rate; 3363 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3364 if (error || newp == NULL) 3365 return error; 3366 reg &= ~0xfff; /* default, no limitation */ 3367 if (rate > 0 && rate < 500000) { 3368 if (rate < 1000) 3369 rate = 1000; 3370 reg |= ((4000000 / rate) & 0xff8); 3371 /* 3372 * When RSC is used, ITR interval must be larger than 3373 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3374 * The minimum value is always greater than 2us on 100M 3375 * (and 10M?(not documented)), but it's not on 1G and higher. 3376 */ 3377 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3378 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3379 if ((sc->num_queues > 1) 3380 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3381 return EINVAL; 3382 } 3383 sc->max_interrupt_rate = rate; 3384 } else 3385 sc->max_interrupt_rate = 0; 3386 ixgbe_eitr_write(sc, que->msix, reg); 3387 3388 return (0); 3389 } /* ixgbe_sysctl_interrupt_rate_handler */ 3390 3391 const struct sysctlnode * 3392 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3393 { 3394 const char *dvname; 3395 struct sysctllog **log; 3396 int rc; 3397 const struct sysctlnode *rnode; 3398 3399 if (sc->sysctltop != NULL) 3400 return sc->sysctltop; 3401 3402 log = &sc->sysctllog; 3403 dvname = device_xname(sc->dev); 3404 3405 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3406 0, CTLTYPE_NODE, dvname, 3407 SYSCTL_DESCR("ixgbe information and settings"), 3408 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3409 goto err; 3410 3411 return rnode; 3412 err: 3413 device_printf(sc->dev, 3414 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3415 return NULL; 3416 } 3417 3418 /************************************************************************ 3419 * ixgbe_add_device_sysctls 3420 ************************************************************************/ 3421 static void 3422 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3423 { 3424 device_t dev = sc->dev; 3425 struct ixgbe_hw *hw = &sc->hw; 3426 struct sysctllog **log; 3427 const struct sysctlnode *rnode, *cnode; 3428 3429 log = &sc->sysctllog; 3430 3431 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3432 aprint_error_dev(dev, "could not create sysctl root\n"); 3433 return; 3434 } 3435 3436 if (sysctl_createv(log, 0, &rnode, &cnode, 3437 CTLFLAG_READWRITE, CTLTYPE_INT, 3438 "debug", SYSCTL_DESCR("Debug Info"), 3439 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3440 != 0) 3441 aprint_error_dev(dev, "could not create sysctl\n"); 3442 3443 if (sysctl_createv(log, 0, &rnode, &cnode, 3444 CTLFLAG_READWRITE, CTLTYPE_INT, 3445 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3446 ixgbe_sysctl_rx_copy_len, 0, 3447 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3448 aprint_error_dev(dev, "could not create sysctl\n"); 3449 3450 if (sysctl_createv(log, 0, &rnode, &cnode, 3451 CTLFLAG_READONLY, CTLTYPE_INT, 3452 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3453 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3454 aprint_error_dev(dev, "could not create sysctl\n"); 3455 3456 if (sysctl_createv(log, 0, &rnode, &cnode, 3457 CTLFLAG_READONLY, CTLTYPE_INT, 3458 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3459 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3460 aprint_error_dev(dev, "could not create sysctl\n"); 3461 3462 if (sysctl_createv(log, 0, &rnode, &cnode, 3463 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3464 SYSCTL_DESCR("max number of RX packets to process"), 3465 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3466 CTL_EOL) != 0) 3467 aprint_error_dev(dev, "could not create sysctl\n"); 3468 3469 if (sysctl_createv(log, 0, &rnode, &cnode, 3470 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3471 SYSCTL_DESCR("max number of TX packets to process"), 3472 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3473 CTL_EOL) != 0) 3474 aprint_error_dev(dev, "could not create sysctl\n"); 3475 3476 if (sysctl_createv(log, 0, &rnode, &cnode, 3477 CTLFLAG_READONLY, CTLTYPE_INT, 3478 "num_queues", SYSCTL_DESCR("Number of queues"), 3479 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3480 aprint_error_dev(dev, "could not create sysctl\n"); 3481 3482 /* Sysctls for all devices */ 3483 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3484 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3485 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3486 CTL_EOL) != 0) 3487 aprint_error_dev(dev, "could not create sysctl\n"); 3488 3489 sc->enable_aim = ixgbe_enable_aim; 3490 sc->max_interrupt_rate = ixgbe_max_interrupt_rate; 3491 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3492 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3493 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3494 aprint_error_dev(dev, "could not create sysctl\n"); 3495 3496 if (sysctl_createv(log, 0, &rnode, &cnode, 3497 CTLFLAG_READWRITE, CTLTYPE_INT, 3498 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3499 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3500 CTL_EOL) != 0) 3501 aprint_error_dev(dev, "could not create sysctl\n"); 3502 3503 /* 3504 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3505 * it causesflip-flopping softint/workqueue mode in one deferred 3506 * processing. Therefore, preempt_disable()/preempt_enable() are 3507 * required in ixgbe_sched_handle_que() to avoid 3508 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3509 * I think changing "que->txrx_use_workqueue" in interrupt handler 3510 * is lighter than doing preempt_disable()/preempt_enable() in every 3511 * ixgbe_sched_handle_que(). 3512 */ 3513 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3514 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3515 CTLTYPE_BOOL, "txrx_workqueue", 3516 SYSCTL_DESCR("Use workqueue for packet processing"), 3517 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3518 CTL_EOL) != 0) 3519 aprint_error_dev(dev, "could not create sysctl\n"); 3520 3521 #ifdef IXGBE_DEBUG 3522 /* testing sysctls (for all devices) */ 3523 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3524 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3525 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3526 CTL_EOL) != 0) 3527 aprint_error_dev(dev, "could not create sysctl\n"); 3528 3529 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3530 CTLTYPE_STRING, "print_rss_config", 3531 SYSCTL_DESCR("Prints RSS Configuration"), 3532 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3533 CTL_EOL) != 0) 3534 aprint_error_dev(dev, "could not create sysctl\n"); 3535 #endif 3536 /* for X550 series devices */ 3537 if (hw->mac.type >= ixgbe_mac_X550) 3538 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3539 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3540 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3541 CTL_EOL) != 0) 3542 aprint_error_dev(dev, "could not create sysctl\n"); 3543 3544 /* for WoL-capable devices */ 3545 if (sc->wol_support) { 3546 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3547 CTLTYPE_BOOL, "wol_enable", 3548 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3549 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3550 CTL_EOL) != 0) 3551 aprint_error_dev(dev, "could not create sysctl\n"); 3552 3553 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3554 CTLTYPE_INT, "wufc", 3555 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3556 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3557 CTL_EOL) != 0) 3558 aprint_error_dev(dev, "could not create sysctl\n"); 3559 } 3560 3561 /* for X552/X557-AT devices */ 3562 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3563 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3564 const struct sysctlnode *phy_node; 3565 3566 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3567 "phy", SYSCTL_DESCR("External PHY sysctls"), 3568 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3569 aprint_error_dev(dev, "could not create sysctl\n"); 3570 return; 3571 } 3572 3573 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3574 CTLTYPE_INT, "temp", 3575 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3576 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3577 CTL_EOL) != 0) 3578 aprint_error_dev(dev, "could not create sysctl\n"); 3579 3580 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3581 CTLTYPE_INT, "overtemp_occurred", 3582 SYSCTL_DESCR( 3583 "External PHY High Temperature Event Occurred"), 3584 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3585 CTL_CREATE, CTL_EOL) != 0) 3586 aprint_error_dev(dev, "could not create sysctl\n"); 3587 } 3588 3589 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3590 && (hw->phy.type == ixgbe_phy_fw)) 3591 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3592 CTLTYPE_BOOL, "force_10_100_autonego", 3593 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3594 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3595 CTL_CREATE, CTL_EOL) != 0) 3596 aprint_error_dev(dev, "could not create sysctl\n"); 3597 3598 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3599 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3600 CTLTYPE_INT, "eee_state", 3601 SYSCTL_DESCR("EEE Power Save State"), 3602 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3603 CTL_EOL) != 0) 3604 aprint_error_dev(dev, "could not create sysctl\n"); 3605 } 3606 } /* ixgbe_add_device_sysctls */ 3607 3608 /************************************************************************ 3609 * ixgbe_allocate_pci_resources 3610 ************************************************************************/ 3611 static int 3612 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3613 const struct pci_attach_args *pa) 3614 { 3615 pcireg_t memtype, csr; 3616 device_t dev = sc->dev; 3617 bus_addr_t addr; 3618 int flags; 3619 3620 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3621 switch (memtype) { 3622 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3623 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3624 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3625 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3626 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3627 goto map_err; 3628 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3629 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3630 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3631 } 3632 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3633 sc->osdep.mem_size, flags, 3634 &sc->osdep.mem_bus_space_handle) != 0) { 3635 map_err: 3636 sc->osdep.mem_size = 0; 3637 aprint_error_dev(dev, "unable to map BAR0\n"); 3638 return ENXIO; 3639 } 3640 /* 3641 * Enable address decoding for memory range in case BIOS or 3642 * UEFI don't set it. 3643 */ 3644 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3645 PCI_COMMAND_STATUS_REG); 3646 csr |= PCI_COMMAND_MEM_ENABLE; 3647 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3648 csr); 3649 break; 3650 default: 3651 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3652 return ENXIO; 3653 } 3654 3655 return (0); 3656 } /* ixgbe_allocate_pci_resources */ 3657 3658 static void 3659 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3660 { 3661 struct ix_queue *que = sc->queues; 3662 struct tx_ring *txr = sc->tx_rings; 3663 int i; 3664 3665 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3666 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3667 if (txr->txr_si != NULL) 3668 softint_disestablish(txr->txr_si); 3669 } 3670 if (que->que_si != NULL) 3671 softint_disestablish(que->que_si); 3672 } 3673 if (sc->txr_wq != NULL) 3674 workqueue_destroy(sc->txr_wq); 3675 if (sc->txr_wq_enqueued != NULL) 3676 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3677 if (sc->que_wq != NULL) 3678 workqueue_destroy(sc->que_wq); 3679 3680 if (sc->admin_wq != NULL) { 3681 workqueue_destroy(sc->admin_wq); 3682 sc->admin_wq = NULL; 3683 } 3684 if (sc->timer_wq != NULL) { 3685 workqueue_destroy(sc->timer_wq); 3686 sc->timer_wq = NULL; 3687 } 3688 if (sc->recovery_mode_timer_wq != NULL) { 3689 /* 3690 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3691 * the recovery_mode_timer workqueue, so call it here. 3692 */ 3693 workqueue_wait(sc->recovery_mode_timer_wq, 3694 &sc->recovery_mode_timer_wc); 3695 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3696 workqueue_destroy(sc->recovery_mode_timer_wq); 3697 sc->recovery_mode_timer_wq = NULL; 3698 } 3699 } /* ixgbe_free_deferred_handlers */ 3700 3701 /************************************************************************ 3702 * ixgbe_detach - Device removal routine 3703 * 3704 * Called when the driver is being removed. 3705 * Stops the adapter and deallocates all the resources 3706 * that were allocated for driver operation. 3707 * 3708 * return 0 on success, positive on failure 3709 ************************************************************************/ 3710 static int 3711 ixgbe_detach(device_t dev, int flags) 3712 { 3713 struct ixgbe_softc *sc = device_private(dev); 3714 struct rx_ring *rxr = sc->rx_rings; 3715 struct tx_ring *txr = sc->tx_rings; 3716 struct ixgbe_hw *hw = &sc->hw; 3717 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3718 u32 ctrl_ext; 3719 int i; 3720 3721 INIT_DEBUGOUT("ixgbe_detach: begin"); 3722 if (sc->osdep.attached == false) 3723 return 0; 3724 3725 if (ixgbe_pci_iov_detach(dev) != 0) { 3726 device_printf(dev, "SR-IOV in use; detach first.\n"); 3727 return (EBUSY); 3728 } 3729 3730 if (VLAN_ATTACHED(&sc->osdep.ec) && 3731 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3732 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3733 return (EBUSY); 3734 } 3735 3736 ether_ifdetach(sc->ifp); 3737 3738 sc->osdep.detaching = true; 3739 /* 3740 * Stop the interface. ixgbe_setup_low_power_mode() calls 3741 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3742 * directly. 3743 */ 3744 ixgbe_setup_low_power_mode(sc); 3745 3746 callout_halt(&sc->timer, NULL); 3747 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3748 callout_halt(&sc->recovery_mode_timer, NULL); 3749 3750 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3751 atomic_store_relaxed(&sc->admin_pending, 0); 3752 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3753 atomic_store_relaxed(&sc->timer_pending, 0); 3754 3755 pmf_device_deregister(dev); 3756 3757 ixgbe_free_deferred_handlers(sc); 3758 3759 /* let hardware know driver is unloading */ 3760 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3761 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3762 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3763 3764 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3765 netmap_detach(sc->ifp); 3766 3767 ixgbe_free_pci_resources(sc); 3768 #if 0 /* XXX the NetBSD port is probably missing something here */ 3769 bus_generic_detach(dev); 3770 #endif 3771 if_detach(sc->ifp); 3772 ifmedia_fini(&sc->media); 3773 if_percpuq_destroy(sc->ipq); 3774 3775 sysctl_teardown(&sc->sysctllog); 3776 evcnt_detach(&sc->efbig_tx_dma_setup); 3777 evcnt_detach(&sc->mbuf_defrag_failed); 3778 evcnt_detach(&sc->efbig2_tx_dma_setup); 3779 evcnt_detach(&sc->einval_tx_dma_setup); 3780 evcnt_detach(&sc->other_tx_dma_setup); 3781 evcnt_detach(&sc->eagain_tx_dma_setup); 3782 evcnt_detach(&sc->enomem_tx_dma_setup); 3783 evcnt_detach(&sc->watchdog_events); 3784 evcnt_detach(&sc->tso_err); 3785 evcnt_detach(&sc->admin_irqev); 3786 evcnt_detach(&sc->link_workev); 3787 evcnt_detach(&sc->mod_workev); 3788 evcnt_detach(&sc->msf_workev); 3789 evcnt_detach(&sc->phy_workev); 3790 3791 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3792 if (i < __arraycount(stats->mpc)) { 3793 evcnt_detach(&stats->mpc[i]); 3794 if (hw->mac.type == ixgbe_mac_82598EB) 3795 evcnt_detach(&stats->rnbc[i]); 3796 } 3797 if (i < __arraycount(stats->pxontxc)) { 3798 evcnt_detach(&stats->pxontxc[i]); 3799 evcnt_detach(&stats->pxonrxc[i]); 3800 evcnt_detach(&stats->pxofftxc[i]); 3801 evcnt_detach(&stats->pxoffrxc[i]); 3802 if (hw->mac.type >= ixgbe_mac_82599EB) 3803 evcnt_detach(&stats->pxon2offc[i]); 3804 } 3805 } 3806 3807 txr = sc->tx_rings; 3808 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3809 evcnt_detach(&sc->queues[i].irqs); 3810 evcnt_detach(&sc->queues[i].handleq); 3811 evcnt_detach(&sc->queues[i].req); 3812 evcnt_detach(&txr->total_packets); 3813 #ifndef IXGBE_LEGACY_TX 3814 evcnt_detach(&txr->pcq_drops); 3815 #endif 3816 evcnt_detach(&txr->no_desc_avail); 3817 evcnt_detach(&txr->tso_tx); 3818 3819 if (i < __arraycount(stats->qprc)) { 3820 evcnt_detach(&stats->qprc[i]); 3821 evcnt_detach(&stats->qptc[i]); 3822 evcnt_detach(&stats->qbrc[i]); 3823 evcnt_detach(&stats->qbtc[i]); 3824 if (hw->mac.type >= ixgbe_mac_82599EB) 3825 evcnt_detach(&stats->qprdc[i]); 3826 } 3827 3828 evcnt_detach(&rxr->rx_packets); 3829 evcnt_detach(&rxr->rx_bytes); 3830 evcnt_detach(&rxr->rx_copies); 3831 evcnt_detach(&rxr->no_mbuf); 3832 evcnt_detach(&rxr->rx_discarded); 3833 } 3834 evcnt_detach(&stats->ipcs); 3835 evcnt_detach(&stats->l4cs); 3836 evcnt_detach(&stats->ipcs_bad); 3837 evcnt_detach(&stats->l4cs_bad); 3838 evcnt_detach(&stats->intzero); 3839 evcnt_detach(&stats->legint); 3840 evcnt_detach(&stats->crcerrs); 3841 evcnt_detach(&stats->illerrc); 3842 evcnt_detach(&stats->errbc); 3843 evcnt_detach(&stats->mspdc); 3844 if (hw->mac.type >= ixgbe_mac_X550) 3845 evcnt_detach(&stats->mbsdc); 3846 evcnt_detach(&stats->mpctotal); 3847 evcnt_detach(&stats->mlfc); 3848 evcnt_detach(&stats->mrfc); 3849 if (hw->mac.type == ixgbe_mac_X550EM_a) 3850 evcnt_detach(&stats->link_dn_cnt); 3851 evcnt_detach(&stats->rlec); 3852 evcnt_detach(&stats->lxontxc); 3853 evcnt_detach(&stats->lxonrxc); 3854 evcnt_detach(&stats->lxofftxc); 3855 evcnt_detach(&stats->lxoffrxc); 3856 3857 /* Packet Reception Stats */ 3858 evcnt_detach(&stats->tor); 3859 evcnt_detach(&stats->gorc); 3860 evcnt_detach(&stats->tpr); 3861 evcnt_detach(&stats->gprc); 3862 evcnt_detach(&stats->mprc); 3863 evcnt_detach(&stats->bprc); 3864 evcnt_detach(&stats->prc64); 3865 evcnt_detach(&stats->prc127); 3866 evcnt_detach(&stats->prc255); 3867 evcnt_detach(&stats->prc511); 3868 evcnt_detach(&stats->prc1023); 3869 evcnt_detach(&stats->prc1522); 3870 evcnt_detach(&stats->ruc); 3871 evcnt_detach(&stats->rfc); 3872 evcnt_detach(&stats->roc); 3873 evcnt_detach(&stats->rjc); 3874 evcnt_detach(&stats->mngprc); 3875 evcnt_detach(&stats->mngpdc); 3876 evcnt_detach(&stats->xec); 3877 3878 /* Packet Transmission Stats */ 3879 evcnt_detach(&stats->gotc); 3880 evcnt_detach(&stats->tpt); 3881 evcnt_detach(&stats->gptc); 3882 evcnt_detach(&stats->bptc); 3883 evcnt_detach(&stats->mptc); 3884 evcnt_detach(&stats->mngptc); 3885 evcnt_detach(&stats->ptc64); 3886 evcnt_detach(&stats->ptc127); 3887 evcnt_detach(&stats->ptc255); 3888 evcnt_detach(&stats->ptc511); 3889 evcnt_detach(&stats->ptc1023); 3890 evcnt_detach(&stats->ptc1522); 3891 3892 ixgbe_free_queues(sc); 3893 free(sc->mta, M_DEVBUF); 3894 3895 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3896 IXGBE_CORE_LOCK_DESTROY(sc); 3897 3898 return (0); 3899 } /* ixgbe_detach */ 3900 3901 /************************************************************************ 3902 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3903 * 3904 * Prepare the adapter/port for LPLU and/or WoL 3905 ************************************************************************/ 3906 static int 3907 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3908 { 3909 struct ixgbe_hw *hw = &sc->hw; 3910 device_t dev = sc->dev; 3911 struct ifnet *ifp = sc->ifp; 3912 s32 error = 0; 3913 3914 /* Limit power management flow to X550EM baseT */ 3915 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3916 hw->phy.ops.enter_lplu) { 3917 /* X550EM baseT adapters need a special LPLU flow */ 3918 hw->phy.reset_disable = true; 3919 ixgbe_ifstop(ifp, 1); 3920 error = hw->phy.ops.enter_lplu(hw); 3921 if (error) 3922 device_printf(dev, 3923 "Error entering LPLU: %d\n", error); 3924 hw->phy.reset_disable = false; 3925 } else { 3926 /* Just stop for other adapters */ 3927 ixgbe_ifstop(ifp, 1); 3928 } 3929 3930 IXGBE_CORE_LOCK(sc); 3931 3932 if (!hw->wol_enabled) { 3933 ixgbe_set_phy_power(hw, FALSE); 3934 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3935 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3936 } else { 3937 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3938 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3939 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3940 3941 /* 3942 * Clear Wake Up Status register to prevent any previous wakeup 3943 * events from waking us up immediately after we suspend. 3944 */ 3945 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3946 3947 /* 3948 * Program the Wakeup Filter Control register with user filter 3949 * settings 3950 */ 3951 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3952 3953 /* Enable wakeups and power management in Wakeup Control */ 3954 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3955 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3956 } 3957 3958 IXGBE_CORE_UNLOCK(sc); 3959 3960 return error; 3961 } /* ixgbe_setup_low_power_mode */ 3962 3963 /************************************************************************ 3964 * ixgbe_shutdown - Shutdown entry point 3965 ************************************************************************/ 3966 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3967 static int 3968 ixgbe_shutdown(device_t dev) 3969 { 3970 struct ixgbe_softc *sc = device_private(dev); 3971 int error = 0; 3972 3973 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3974 3975 error = ixgbe_setup_low_power_mode(sc); 3976 3977 return (error); 3978 } /* ixgbe_shutdown */ 3979 #endif 3980 3981 /************************************************************************ 3982 * ixgbe_suspend 3983 * 3984 * From D0 to D3 3985 ************************************************************************/ 3986 static bool 3987 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3988 { 3989 struct ixgbe_softc *sc = device_private(dev); 3990 int error = 0; 3991 3992 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3993 3994 error = ixgbe_setup_low_power_mode(sc); 3995 3996 return (error); 3997 } /* ixgbe_suspend */ 3998 3999 /************************************************************************ 4000 * ixgbe_resume 4001 * 4002 * From D3 to D0 4003 ************************************************************************/ 4004 static bool 4005 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 4006 { 4007 struct ixgbe_softc *sc = device_private(dev); 4008 struct ifnet *ifp = sc->ifp; 4009 struct ixgbe_hw *hw = &sc->hw; 4010 u32 wus; 4011 4012 INIT_DEBUGOUT("ixgbe_resume: begin"); 4013 4014 IXGBE_CORE_LOCK(sc); 4015 4016 /* Read & clear WUS register */ 4017 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4018 if (wus) 4019 device_printf(dev, "Woken up by (WUS): %#010x\n", 4020 IXGBE_READ_REG(hw, IXGBE_WUS)); 4021 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4022 /* And clear WUFC until next low-power transition */ 4023 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4024 4025 /* 4026 * Required after D3->D0 transition; 4027 * will re-advertise all previous advertised speeds 4028 */ 4029 if (ifp->if_flags & IFF_UP) 4030 ixgbe_init_locked(sc); 4031 4032 IXGBE_CORE_UNLOCK(sc); 4033 4034 return true; 4035 } /* ixgbe_resume */ 4036 4037 /* 4038 * Set the various hardware offload abilities. 4039 * 4040 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4041 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4042 * mbuf offload flags the driver will understand. 4043 */ 4044 static void 4045 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4046 { 4047 /* XXX */ 4048 } 4049 4050 /************************************************************************ 4051 * ixgbe_init_locked - Init entry point 4052 * 4053 * Used in two ways: It is used by the stack as an init 4054 * entry point in network interface structure. It is also 4055 * used by the driver as a hw/sw initialization routine to 4056 * get to a consistent state. 4057 * 4058 * return 0 on success, positive on failure 4059 ************************************************************************/ 4060 static void 4061 ixgbe_init_locked(struct ixgbe_softc *sc) 4062 { 4063 struct ifnet *ifp = sc->ifp; 4064 device_t dev = sc->dev; 4065 struct ixgbe_hw *hw = &sc->hw; 4066 struct ix_queue *que; 4067 struct tx_ring *txr; 4068 struct rx_ring *rxr; 4069 u32 txdctl, mhadd; 4070 u32 rxdctl, rxctrl; 4071 u32 ctrl_ext; 4072 bool unsupported_sfp = false; 4073 int i, j, error; 4074 4075 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4076 4077 KASSERT(mutex_owned(&sc->core_mtx)); 4078 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4079 4080 hw->need_unsupported_sfp_recovery = false; 4081 hw->adapter_stopped = FALSE; 4082 ixgbe_stop_adapter(hw); 4083 callout_stop(&sc->timer); 4084 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4085 callout_stop(&sc->recovery_mode_timer); 4086 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4087 que->disabled_count = 0; 4088 4089 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4090 sc->max_frame_size = 4091 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4092 4093 /* Queue indices may change with IOV mode */ 4094 ixgbe_align_all_queue_indices(sc); 4095 4096 /* reprogram the RAR[0] in case user changed it. */ 4097 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4098 4099 /* Get the latest mac address, User can use a LAA */ 4100 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4101 IXGBE_ETH_LENGTH_OF_ADDRESS); 4102 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4103 hw->addr_ctrl.rar_used_count = 1; 4104 4105 /* Set hardware offload abilities from ifnet flags */ 4106 ixgbe_set_if_hwassist(sc); 4107 4108 /* Prepare transmit descriptors and buffers */ 4109 if (ixgbe_setup_transmit_structures(sc)) { 4110 device_printf(dev, "Could not setup transmit structures\n"); 4111 ixgbe_stop_locked(sc); 4112 return; 4113 } 4114 4115 ixgbe_init_hw(hw); 4116 4117 ixgbe_initialize_iov(sc); 4118 4119 ixgbe_initialize_transmit_units(sc); 4120 4121 /* Setup Multicast table */ 4122 ixgbe_set_rxfilter(sc); 4123 4124 /* Use fixed buffer size, even for jumbo frames */ 4125 sc->rx_mbuf_sz = MCLBYTES; 4126 4127 /* Prepare receive descriptors and buffers */ 4128 error = ixgbe_setup_receive_structures(sc); 4129 if (error) { 4130 device_printf(dev, 4131 "Could not setup receive structures (err = %d)\n", error); 4132 ixgbe_stop_locked(sc); 4133 return; 4134 } 4135 4136 /* Configure RX settings */ 4137 ixgbe_initialize_receive_units(sc); 4138 4139 /* Initialize variable holding task enqueue requests interrupts */ 4140 sc->task_requests = 0; 4141 4142 /* Enable SDP & MSI-X interrupts based on adapter */ 4143 ixgbe_config_gpie(sc); 4144 4145 /* Set MTU size */ 4146 if (ifp->if_mtu > ETHERMTU) { 4147 /* aka IXGBE_MAXFRS on 82599 and newer */ 4148 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4149 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4150 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4151 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4152 } 4153 4154 /* Now enable all the queues */ 4155 for (i = 0; i < sc->num_queues; i++) { 4156 txr = &sc->tx_rings[i]; 4157 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4158 txdctl |= IXGBE_TXDCTL_ENABLE; 4159 /* Set WTHRESH to 8, burst writeback */ 4160 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4161 /* 4162 * When the internal queue falls below PTHRESH (32), 4163 * start prefetching as long as there are at least 4164 * HTHRESH (1) buffers ready. The values are taken 4165 * from the Intel linux driver 3.8.21. 4166 * Prefetching enables tx line rate even with 1 queue. 4167 */ 4168 txdctl |= (32 << 0) | (1 << 8); 4169 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4170 } 4171 4172 for (i = 0; i < sc->num_queues; i++) { 4173 rxr = &sc->rx_rings[i]; 4174 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4175 if (hw->mac.type == ixgbe_mac_82598EB) { 4176 /* 4177 * PTHRESH = 21 4178 * HTHRESH = 4 4179 * WTHRESH = 8 4180 */ 4181 rxdctl &= ~0x3FFFFF; 4182 rxdctl |= 0x080420; 4183 } 4184 rxdctl |= IXGBE_RXDCTL_ENABLE; 4185 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4186 for (j = 0; j < 10; j++) { 4187 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4188 IXGBE_RXDCTL_ENABLE) 4189 break; 4190 else 4191 msec_delay(1); 4192 } 4193 IXGBE_WRITE_BARRIER(hw); 4194 4195 /* 4196 * In netmap mode, we must preserve the buffers made 4197 * available to userspace before the if_init() 4198 * (this is true by default on the TX side, because 4199 * init makes all buffers available to userspace). 4200 * 4201 * netmap_reset() and the device specific routines 4202 * (e.g. ixgbe_setup_receive_rings()) map these 4203 * buffers at the end of the NIC ring, so here we 4204 * must set the RDT (tail) register to make sure 4205 * they are not overwritten. 4206 * 4207 * In this driver the NIC ring starts at RDH = 0, 4208 * RDT points to the last slot available for reception (?), 4209 * so RDT = num_rx_desc - 1 means the whole ring is available. 4210 */ 4211 #ifdef DEV_NETMAP 4212 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4213 (ifp->if_capenable & IFCAP_NETMAP)) { 4214 struct netmap_adapter *na = NA(sc->ifp); 4215 struct netmap_kring *kring = na->rx_rings[i]; 4216 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4217 4218 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4219 } else 4220 #endif /* DEV_NETMAP */ 4221 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4222 sc->num_rx_desc - 1); 4223 } 4224 4225 /* Enable Receive engine */ 4226 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4227 if (hw->mac.type == ixgbe_mac_82598EB) 4228 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4229 rxctrl |= IXGBE_RXCTRL_RXEN; 4230 ixgbe_enable_rx_dma(hw, rxctrl); 4231 4232 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4233 atomic_store_relaxed(&sc->timer_pending, 0); 4234 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4235 callout_reset(&sc->recovery_mode_timer, hz, 4236 ixgbe_recovery_mode_timer, sc); 4237 4238 /* Set up MSI/MSI-X routing */ 4239 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4240 ixgbe_configure_ivars(sc); 4241 /* Set up auto-mask */ 4242 if (hw->mac.type == ixgbe_mac_82598EB) 4243 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4244 else { 4245 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4246 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4247 } 4248 } else { /* Simple settings for Legacy/MSI */ 4249 ixgbe_set_ivar(sc, 0, 0, 0); 4250 ixgbe_set_ivar(sc, 0, 0, 1); 4251 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4252 } 4253 4254 ixgbe_init_fdir(sc); 4255 4256 /* 4257 * Check on any SFP devices that 4258 * need to be kick-started 4259 */ 4260 if (hw->phy.type == ixgbe_phy_none) { 4261 error = hw->phy.ops.identify(hw); 4262 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4263 unsupported_sfp = true; 4264 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4265 unsupported_sfp = true; 4266 4267 if (unsupported_sfp) 4268 device_printf(dev, 4269 "Unsupported SFP+ module type was detected.\n"); 4270 4271 /* Set moderation on the Link interrupt */ 4272 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4273 4274 /* Enable EEE power saving */ 4275 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4276 hw->mac.ops.setup_eee(hw, 4277 sc->feat_en & IXGBE_FEATURE_EEE); 4278 4279 /* Enable power to the phy. */ 4280 if (!unsupported_sfp) { 4281 ixgbe_set_phy_power(hw, TRUE); 4282 4283 /* Config/Enable Link */ 4284 ixgbe_config_link(sc); 4285 } 4286 4287 /* Hardware Packet Buffer & Flow Control setup */ 4288 ixgbe_config_delay_values(sc); 4289 4290 /* Initialize the FC settings */ 4291 ixgbe_start_hw(hw); 4292 4293 /* Set up VLAN support and filter */ 4294 ixgbe_setup_vlan_hw_support(sc); 4295 4296 /* Setup DMA Coalescing */ 4297 ixgbe_config_dmac(sc); 4298 4299 /* OK to schedule workqueues. */ 4300 sc->schedule_wqs_ok = true; 4301 4302 /* Enable the use of the MBX by the VF's */ 4303 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4304 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4305 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4306 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4307 } 4308 4309 /* Update saved flags. See ixgbe_ifflags_cb() */ 4310 sc->if_flags = ifp->if_flags; 4311 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4312 4313 /* Inform the stack we're ready */ 4314 ifp->if_flags |= IFF_RUNNING; 4315 4316 /* And now turn on interrupts */ 4317 ixgbe_enable_intr(sc); 4318 4319 return; 4320 } /* ixgbe_init_locked */ 4321 4322 /************************************************************************ 4323 * ixgbe_init 4324 ************************************************************************/ 4325 static int 4326 ixgbe_init(struct ifnet *ifp) 4327 { 4328 struct ixgbe_softc *sc = ifp->if_softc; 4329 4330 IXGBE_CORE_LOCK(sc); 4331 ixgbe_init_locked(sc); 4332 IXGBE_CORE_UNLOCK(sc); 4333 4334 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4335 } /* ixgbe_init */ 4336 4337 /************************************************************************ 4338 * ixgbe_set_ivar 4339 * 4340 * Setup the correct IVAR register for a particular MSI-X interrupt 4341 * (yes this is all very magic and confusing :) 4342 * - entry is the register array entry 4343 * - vector is the MSI-X vector for this queue 4344 * - type is RX/TX/MISC 4345 ************************************************************************/ 4346 static void 4347 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4348 { 4349 struct ixgbe_hw *hw = &sc->hw; 4350 u32 ivar, index; 4351 4352 vector |= IXGBE_IVAR_ALLOC_VAL; 4353 4354 switch (hw->mac.type) { 4355 case ixgbe_mac_82598EB: 4356 if (type == -1) 4357 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4358 else 4359 entry += (type * 64); 4360 index = (entry >> 2) & 0x1F; 4361 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4362 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4363 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4364 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4365 break; 4366 case ixgbe_mac_82599EB: 4367 case ixgbe_mac_X540: 4368 case ixgbe_mac_X550: 4369 case ixgbe_mac_X550EM_x: 4370 case ixgbe_mac_X550EM_a: 4371 if (type == -1) { /* MISC IVAR */ 4372 index = (entry & 1) * 8; 4373 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4374 ivar &= ~(0xffUL << index); 4375 ivar |= ((u32)vector << index); 4376 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4377 } else { /* RX/TX IVARS */ 4378 index = (16 * (entry & 1)) + (8 * type); 4379 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4380 ivar &= ~(0xffUL << index); 4381 ivar |= ((u32)vector << index); 4382 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4383 } 4384 break; 4385 default: 4386 break; 4387 } 4388 } /* ixgbe_set_ivar */ 4389 4390 /************************************************************************ 4391 * ixgbe_configure_ivars 4392 ************************************************************************/ 4393 static void 4394 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4395 { 4396 struct ix_queue *que = sc->queues; 4397 u32 newitr; 4398 4399 if (sc->max_interrupt_rate > 0) 4400 newitr = (4000000 / sc->max_interrupt_rate) & 0x0FF8; 4401 else { 4402 /* 4403 * Disable DMA coalescing if interrupt moderation is 4404 * disabled. 4405 */ 4406 sc->dmac = 0; 4407 newitr = 0; 4408 } 4409 4410 for (int i = 0; i < sc->num_queues; i++, que++) { 4411 struct rx_ring *rxr = &sc->rx_rings[i]; 4412 struct tx_ring *txr = &sc->tx_rings[i]; 4413 /* First the RX queue entry */ 4414 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4415 /* ... and the TX */ 4416 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4417 /* Set an Initial EITR value */ 4418 ixgbe_eitr_write(sc, que->msix, newitr); 4419 /* 4420 * To eliminate influence of the previous state. 4421 * At this point, Tx/Rx interrupt handler 4422 * (ixgbe_msix_que()) cannot be called, so both 4423 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4424 */ 4425 que->eitr_setting = 0; 4426 } 4427 4428 /* For the Link interrupt */ 4429 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4430 } /* ixgbe_configure_ivars */ 4431 4432 /************************************************************************ 4433 * ixgbe_config_gpie 4434 ************************************************************************/ 4435 static void 4436 ixgbe_config_gpie(struct ixgbe_softc *sc) 4437 { 4438 struct ixgbe_hw *hw = &sc->hw; 4439 u32 gpie; 4440 4441 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4442 4443 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4444 /* Enable Enhanced MSI-X mode */ 4445 gpie |= IXGBE_GPIE_MSIX_MODE 4446 | IXGBE_GPIE_EIAME 4447 | IXGBE_GPIE_PBA_SUPPORT 4448 | IXGBE_GPIE_OCD; 4449 } 4450 4451 /* Fan Failure Interrupt */ 4452 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4453 gpie |= IXGBE_SDP1_GPIEN; 4454 4455 /* Thermal Sensor Interrupt */ 4456 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4457 gpie |= IXGBE_SDP0_GPIEN_X540; 4458 4459 /* Link detection */ 4460 switch (hw->mac.type) { 4461 case ixgbe_mac_82599EB: 4462 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4463 break; 4464 case ixgbe_mac_X550EM_x: 4465 case ixgbe_mac_X550EM_a: 4466 gpie |= IXGBE_SDP0_GPIEN_X540; 4467 break; 4468 default: 4469 break; 4470 } 4471 4472 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4473 4474 } /* ixgbe_config_gpie */ 4475 4476 /************************************************************************ 4477 * ixgbe_config_delay_values 4478 * 4479 * Requires sc->max_frame_size to be set. 4480 ************************************************************************/ 4481 static void 4482 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4483 { 4484 struct ixgbe_hw *hw = &sc->hw; 4485 u32 rxpb, frame, size, tmp; 4486 4487 frame = sc->max_frame_size; 4488 4489 /* Calculate High Water */ 4490 switch (hw->mac.type) { 4491 case ixgbe_mac_X540: 4492 case ixgbe_mac_X550: 4493 case ixgbe_mac_X550EM_x: 4494 case ixgbe_mac_X550EM_a: 4495 tmp = IXGBE_DV_X540(frame, frame); 4496 break; 4497 default: 4498 tmp = IXGBE_DV(frame, frame); 4499 break; 4500 } 4501 size = IXGBE_BT2KB(tmp); 4502 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4503 hw->fc.high_water[0] = rxpb - size; 4504 4505 /* Now calculate Low Water */ 4506 switch (hw->mac.type) { 4507 case ixgbe_mac_X540: 4508 case ixgbe_mac_X550: 4509 case ixgbe_mac_X550EM_x: 4510 case ixgbe_mac_X550EM_a: 4511 tmp = IXGBE_LOW_DV_X540(frame); 4512 break; 4513 default: 4514 tmp = IXGBE_LOW_DV(frame); 4515 break; 4516 } 4517 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4518 4519 hw->fc.pause_time = IXGBE_FC_PAUSE; 4520 hw->fc.send_xon = TRUE; 4521 } /* ixgbe_config_delay_values */ 4522 4523 /************************************************************************ 4524 * ixgbe_set_rxfilter - Multicast Update 4525 * 4526 * Called whenever multicast address list is updated. 4527 ************************************************************************/ 4528 static void 4529 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4530 { 4531 struct ixgbe_mc_addr *mta; 4532 struct ifnet *ifp = sc->ifp; 4533 u8 *update_ptr; 4534 int mcnt = 0; 4535 u32 fctrl; 4536 struct ethercom *ec = &sc->osdep.ec; 4537 struct ether_multi *enm; 4538 struct ether_multistep step; 4539 4540 KASSERT(mutex_owned(&sc->core_mtx)); 4541 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4542 4543 mta = sc->mta; 4544 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4545 4546 ETHER_LOCK(ec); 4547 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4548 ETHER_FIRST_MULTI(step, ec, enm); 4549 while (enm != NULL) { 4550 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4551 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4552 ETHER_ADDR_LEN) != 0)) { 4553 ec->ec_flags |= ETHER_F_ALLMULTI; 4554 break; 4555 } 4556 bcopy(enm->enm_addrlo, 4557 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4558 mta[mcnt].vmdq = sc->pool; 4559 mcnt++; 4560 ETHER_NEXT_MULTI(step, enm); 4561 } 4562 4563 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4564 if (ifp->if_flags & IFF_PROMISC) 4565 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4566 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4567 fctrl |= IXGBE_FCTRL_MPE; 4568 fctrl &= ~IXGBE_FCTRL_UPE; 4569 } else 4570 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4571 4572 /* Update multicast filter entries only when it's not ALLMULTI */ 4573 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4574 ETHER_UNLOCK(ec); 4575 update_ptr = (u8 *)mta; 4576 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4577 ixgbe_mc_array_itr, TRUE); 4578 } else 4579 ETHER_UNLOCK(ec); 4580 4581 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4582 } /* ixgbe_set_rxfilter */ 4583 4584 /************************************************************************ 4585 * ixgbe_mc_array_itr 4586 * 4587 * An iterator function needed by the multicast shared code. 4588 * It feeds the shared code routine the addresses in the 4589 * array of ixgbe_set_rxfilter() one by one. 4590 ************************************************************************/ 4591 static u8 * 4592 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4593 { 4594 struct ixgbe_mc_addr *mta; 4595 4596 mta = (struct ixgbe_mc_addr *)*update_ptr; 4597 *vmdq = mta->vmdq; 4598 4599 *update_ptr = (u8*)(mta + 1); 4600 4601 return (mta->addr); 4602 } /* ixgbe_mc_array_itr */ 4603 4604 /************************************************************************ 4605 * ixgbe_local_timer - Timer routine 4606 * 4607 * Checks for link status, updates statistics, 4608 * and runs the watchdog check. 4609 ************************************************************************/ 4610 static void 4611 ixgbe_local_timer(void *arg) 4612 { 4613 struct ixgbe_softc *sc = arg; 4614 4615 if (sc->schedule_wqs_ok) { 4616 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4617 workqueue_enqueue(sc->timer_wq, 4618 &sc->timer_wc, NULL); 4619 } 4620 } 4621 4622 static void 4623 ixgbe_handle_timer(struct work *wk, void *context) 4624 { 4625 struct ixgbe_softc *sc = context; 4626 struct ixgbe_hw *hw = &sc->hw; 4627 device_t dev = sc->dev; 4628 struct ix_queue *que = sc->queues; 4629 u64 queues = 0; 4630 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4631 int hung = 0; 4632 int i; 4633 4634 IXGBE_CORE_LOCK(sc); 4635 4636 /* Check for pluggable optics */ 4637 if (ixgbe_is_sfp(hw)) { 4638 bool sched_mod_task = false; 4639 4640 if (hw->mac.type == ixgbe_mac_82598EB) { 4641 /* 4642 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4643 * any GPIO(SDP). So just schedule TASK_MOD. 4644 */ 4645 sched_mod_task = true; 4646 } else { 4647 bool was_full, is_full; 4648 4649 was_full = 4650 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4651 is_full = ixgbe_sfp_cage_full(hw); 4652 4653 /* Do probe if cage state changed */ 4654 if (was_full ^ is_full) 4655 sched_mod_task = true; 4656 } 4657 if (sched_mod_task) { 4658 mutex_enter(&sc->admin_mtx); 4659 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4660 ixgbe_schedule_admin_tasklet(sc); 4661 mutex_exit(&sc->admin_mtx); 4662 } 4663 } 4664 4665 ixgbe_update_link_status(sc); 4666 ixgbe_update_stats_counters(sc); 4667 4668 /* Update some event counters */ 4669 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4670 que = sc->queues; 4671 for (i = 0; i < sc->num_queues; i++, que++) { 4672 struct tx_ring *txr = que->txr; 4673 4674 v0 += txr->q_efbig_tx_dma_setup; 4675 v1 += txr->q_mbuf_defrag_failed; 4676 v2 += txr->q_efbig2_tx_dma_setup; 4677 v3 += txr->q_einval_tx_dma_setup; 4678 v4 += txr->q_other_tx_dma_setup; 4679 v5 += txr->q_eagain_tx_dma_setup; 4680 v6 += txr->q_enomem_tx_dma_setup; 4681 v7 += txr->q_tso_err; 4682 } 4683 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4684 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4685 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4686 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4687 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4688 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4689 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4690 IXGBE_EVC_STORE(&sc->tso_err, v7); 4691 4692 /* 4693 * Check the TX queues status 4694 * - mark hung queues so we don't schedule on them 4695 * - watchdog only if all queues show hung 4696 */ 4697 que = sc->queues; 4698 for (i = 0; i < sc->num_queues; i++, que++) { 4699 /* Keep track of queues with work for soft irq */ 4700 if (que->txr->busy) 4701 queues |= 1ULL << que->me; 4702 /* 4703 * Each time txeof runs without cleaning, but there 4704 * are uncleaned descriptors it increments busy. If 4705 * we get to the MAX we declare it hung. 4706 */ 4707 if (que->busy == IXGBE_QUEUE_HUNG) { 4708 ++hung; 4709 /* Mark the queue as inactive */ 4710 sc->active_queues &= ~(1ULL << que->me); 4711 continue; 4712 } else { 4713 /* Check if we've come back from hung */ 4714 if ((sc->active_queues & (1ULL << que->me)) == 0) 4715 sc->active_queues |= 1ULL << que->me; 4716 } 4717 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4718 device_printf(dev, 4719 "Warning queue %d appears to be hung!\n", i); 4720 que->txr->busy = IXGBE_QUEUE_HUNG; 4721 ++hung; 4722 } 4723 } 4724 4725 /* Only truly watchdog if all queues show hung */ 4726 if (hung == sc->num_queues) 4727 goto watchdog; 4728 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4729 else if (queues != 0) { /* Force an IRQ on queues with work */ 4730 que = sc->queues; 4731 for (i = 0; i < sc->num_queues; i++, que++) { 4732 mutex_enter(&que->dc_mtx); 4733 if (que->disabled_count == 0) 4734 ixgbe_rearm_queues(sc, 4735 queues & ((u64)1 << i)); 4736 mutex_exit(&que->dc_mtx); 4737 } 4738 } 4739 #endif 4740 4741 atomic_store_relaxed(&sc->timer_pending, 0); 4742 IXGBE_CORE_UNLOCK(sc); 4743 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4744 return; 4745 4746 watchdog: 4747 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4748 sc->ifp->if_flags &= ~IFF_RUNNING; 4749 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4750 ixgbe_init_locked(sc); 4751 IXGBE_CORE_UNLOCK(sc); 4752 } /* ixgbe_handle_timer */ 4753 4754 /************************************************************************ 4755 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4756 ************************************************************************/ 4757 static void 4758 ixgbe_recovery_mode_timer(void *arg) 4759 { 4760 struct ixgbe_softc *sc = arg; 4761 4762 if (__predict_true(sc->osdep.detaching == false)) { 4763 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4764 0, 1) == 0) { 4765 workqueue_enqueue(sc->recovery_mode_timer_wq, 4766 &sc->recovery_mode_timer_wc, NULL); 4767 } 4768 } 4769 } 4770 4771 static void 4772 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4773 { 4774 struct ixgbe_softc *sc = context; 4775 struct ixgbe_hw *hw = &sc->hw; 4776 4777 IXGBE_CORE_LOCK(sc); 4778 if (ixgbe_fw_recovery_mode(hw)) { 4779 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4780 /* Firmware error detected, entering recovery mode */ 4781 device_printf(sc->dev, 4782 "Firmware recovery mode detected. Limiting " 4783 "functionality. Refer to the Intel(R) Ethernet " 4784 "Adapters and Devices User Guide for details on " 4785 "firmware recovery mode.\n"); 4786 4787 if (hw->adapter_stopped == FALSE) 4788 ixgbe_stop_locked(sc); 4789 } 4790 } else 4791 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4792 4793 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4794 callout_reset(&sc->recovery_mode_timer, hz, 4795 ixgbe_recovery_mode_timer, sc); 4796 IXGBE_CORE_UNLOCK(sc); 4797 } /* ixgbe_handle_recovery_mode_timer */ 4798 4799 /************************************************************************ 4800 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4801 * bool int_en: true if it's called when the interrupt is enabled. 4802 ************************************************************************/ 4803 static void 4804 ixgbe_handle_mod(void *context, bool int_en) 4805 { 4806 struct ixgbe_softc *sc = context; 4807 struct ixgbe_hw *hw = &sc->hw; 4808 device_t dev = sc->dev; 4809 enum ixgbe_sfp_type last_sfp_type; 4810 u32 err; 4811 bool last_unsupported_sfp_recovery; 4812 4813 KASSERT(mutex_owned(&sc->core_mtx)); 4814 4815 last_sfp_type = hw->phy.sfp_type; 4816 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4817 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4818 if (sc->hw.need_crosstalk_fix) { 4819 if ((hw->mac.type != ixgbe_mac_82598EB) && 4820 !ixgbe_sfp_cage_full(hw)) 4821 goto out; 4822 } 4823 4824 err = hw->phy.ops.identify_sfp(hw); 4825 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4826 if (last_unsupported_sfp_recovery == false) 4827 device_printf(dev, 4828 "Unsupported SFP+ module type was detected.\n"); 4829 goto out; 4830 } 4831 4832 if (hw->need_unsupported_sfp_recovery) { 4833 device_printf(dev, "Recovering from unsupported SFP\n"); 4834 /* 4835 * We could recover the status by calling setup_sfp(), 4836 * setup_link() and some others. It's complex and might not 4837 * work correctly on some unknown cases. To avoid such type of 4838 * problem, call ixgbe_init_locked(). It's simple and safe 4839 * approach. 4840 */ 4841 ixgbe_init_locked(sc); 4842 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4843 (hw->phy.sfp_type != last_sfp_type)) { 4844 /* A module is inserted and changed. */ 4845 4846 if (hw->mac.type == ixgbe_mac_82598EB) 4847 err = hw->phy.ops.reset(hw); 4848 else { 4849 err = hw->mac.ops.setup_sfp(hw); 4850 hw->phy.sfp_setup_needed = FALSE; 4851 } 4852 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4853 device_printf(dev, 4854 "Setup failure - unsupported SFP+ module type.\n"); 4855 goto out; 4856 } 4857 } 4858 4859 out: 4860 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4861 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4862 4863 /* Adjust media types shown in ifconfig */ 4864 IXGBE_CORE_UNLOCK(sc); 4865 ifmedia_removeall(&sc->media); 4866 ixgbe_add_media_types(sc); 4867 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4868 IXGBE_CORE_LOCK(sc); 4869 4870 /* 4871 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4872 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4873 * flap because the function calls setup_link(). 4874 */ 4875 if (hw->mac.type != ixgbe_mac_82598EB) { 4876 mutex_enter(&sc->admin_mtx); 4877 if (int_en) 4878 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4879 else 4880 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4881 mutex_exit(&sc->admin_mtx); 4882 } 4883 4884 /* 4885 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4886 * the workqueue now. 4887 */ 4888 } /* ixgbe_handle_mod */ 4889 4890 4891 /************************************************************************ 4892 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4893 ************************************************************************/ 4894 static void 4895 ixgbe_handle_msf(void *context) 4896 { 4897 struct ixgbe_softc *sc = context; 4898 struct ixgbe_hw *hw = &sc->hw; 4899 u32 autoneg; 4900 bool negotiate; 4901 4902 KASSERT(mutex_owned(&sc->core_mtx)); 4903 4904 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4905 4906 autoneg = hw->phy.autoneg_advertised; 4907 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4908 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4909 if (hw->mac.ops.setup_link) 4910 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4911 } /* ixgbe_handle_msf */ 4912 4913 /************************************************************************ 4914 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4915 ************************************************************************/ 4916 static void 4917 ixgbe_handle_phy(void *context) 4918 { 4919 struct ixgbe_softc *sc = context; 4920 struct ixgbe_hw *hw = &sc->hw; 4921 int error; 4922 4923 KASSERT(mutex_owned(&sc->core_mtx)); 4924 4925 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4926 error = hw->phy.ops.handle_lasi(hw); 4927 if (error == IXGBE_ERR_OVERTEMP) 4928 device_printf(sc->dev, 4929 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4930 " PHY will downshift to lower power state!\n"); 4931 else if (error) 4932 device_printf(sc->dev, 4933 "Error handling LASI interrupt: %d\n", error); 4934 } /* ixgbe_handle_phy */ 4935 4936 static void 4937 ixgbe_handle_admin(struct work *wk, void *context) 4938 { 4939 struct ixgbe_softc *sc = context; 4940 struct ifnet *ifp = sc->ifp; 4941 struct ixgbe_hw *hw = &sc->hw; 4942 u32 task_requests; 4943 u32 eims_enable = 0; 4944 4945 mutex_enter(&sc->admin_mtx); 4946 sc->admin_pending = 0; 4947 task_requests = sc->task_requests; 4948 sc->task_requests = 0; 4949 mutex_exit(&sc->admin_mtx); 4950 4951 /* 4952 * Hold the IFNET_LOCK across this entire call. This will 4953 * prevent additional changes to sc->phy_layer 4954 * and serialize calls to this tasklet. We cannot hold the 4955 * CORE_LOCK while calling into the ifmedia functions as 4956 * they call ifmedia_lock() and the lock is CORE_LOCK. 4957 */ 4958 IFNET_LOCK(ifp); 4959 IXGBE_CORE_LOCK(sc); 4960 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4961 ixgbe_handle_link(sc); 4962 eims_enable |= IXGBE_EIMS_LSC; 4963 } 4964 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4965 ixgbe_handle_mod(sc, false); 4966 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4967 ixgbe_handle_mod(sc, true); 4968 if (hw->mac.type >= ixgbe_mac_X540) 4969 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4970 else 4971 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4972 } 4973 if ((task_requests 4974 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4975 ixgbe_handle_msf(sc); 4976 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4977 (hw->mac.type == ixgbe_mac_82599EB)) 4978 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4979 } 4980 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4981 ixgbe_handle_phy(sc); 4982 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4983 } 4984 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4985 ixgbe_reinit_fdir(sc); 4986 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4987 } 4988 #if 0 /* notyet */ 4989 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4990 ixgbe_handle_mbx(sc); 4991 eims_enable |= IXGBE_EIMS_MAILBOX; 4992 } 4993 #endif 4994 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 4995 4996 IXGBE_CORE_UNLOCK(sc); 4997 IFNET_UNLOCK(ifp); 4998 } /* ixgbe_handle_admin */ 4999 5000 static void 5001 ixgbe_ifstop(struct ifnet *ifp, int disable) 5002 { 5003 struct ixgbe_softc *sc = ifp->if_softc; 5004 5005 IXGBE_CORE_LOCK(sc); 5006 ixgbe_stop_locked(sc); 5007 IXGBE_CORE_UNLOCK(sc); 5008 5009 workqueue_wait(sc->timer_wq, &sc->timer_wc); 5010 atomic_store_relaxed(&sc->timer_pending, 0); 5011 } 5012 5013 /************************************************************************ 5014 * ixgbe_stop_locked - Stop the hardware 5015 * 5016 * Disables all traffic on the adapter by issuing a 5017 * global reset on the MAC and deallocates TX/RX buffers. 5018 ************************************************************************/ 5019 static void 5020 ixgbe_stop_locked(void *arg) 5021 { 5022 struct ifnet *ifp; 5023 struct ixgbe_softc *sc = arg; 5024 struct ixgbe_hw *hw = &sc->hw; 5025 5026 ifp = sc->ifp; 5027 5028 KASSERT(mutex_owned(&sc->core_mtx)); 5029 5030 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5031 ixgbe_disable_intr(sc); 5032 callout_stop(&sc->timer); 5033 5034 /* Don't schedule workqueues. */ 5035 sc->schedule_wqs_ok = false; 5036 5037 /* Let the stack know...*/ 5038 ifp->if_flags &= ~IFF_RUNNING; 5039 5040 ixgbe_reset_hw(hw); 5041 hw->adapter_stopped = FALSE; 5042 ixgbe_stop_adapter(hw); 5043 if (hw->mac.type == ixgbe_mac_82599EB) 5044 ixgbe_stop_mac_link_on_d3_82599(hw); 5045 /* Turn off the laser - noop with no optics */ 5046 ixgbe_disable_tx_laser(hw); 5047 5048 /* Update the stack */ 5049 sc->link_up = FALSE; 5050 ixgbe_update_link_status(sc); 5051 5052 /* reprogram the RAR[0] in case user changed it. */ 5053 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5054 5055 return; 5056 } /* ixgbe_stop_locked */ 5057 5058 /************************************************************************ 5059 * ixgbe_update_link_status - Update OS on link state 5060 * 5061 * Note: Only updates the OS on the cached link state. 5062 * The real check of the hardware only happens with 5063 * a link interrupt. 5064 ************************************************************************/ 5065 static void 5066 ixgbe_update_link_status(struct ixgbe_softc *sc) 5067 { 5068 struct ifnet *ifp = sc->ifp; 5069 device_t dev = sc->dev; 5070 struct ixgbe_hw *hw = &sc->hw; 5071 5072 KASSERT(mutex_owned(&sc->core_mtx)); 5073 5074 if (sc->link_up) { 5075 if (sc->link_active != LINK_STATE_UP) { 5076 /* 5077 * To eliminate influence of the previous state 5078 * in the same way as ixgbe_init_locked(). 5079 */ 5080 struct ix_queue *que = sc->queues; 5081 for (int i = 0; i < sc->num_queues; i++, que++) 5082 que->eitr_setting = 0; 5083 5084 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL) { 5085 /* 5086 * Discard count for both MAC Local Fault and 5087 * Remote Fault because those registers are 5088 * valid only when the link speed is up and 5089 * 10Gbps. 5090 */ 5091 IXGBE_READ_REG(hw, IXGBE_MLFC); 5092 IXGBE_READ_REG(hw, IXGBE_MRFC); 5093 } 5094 5095 if (bootverbose) { 5096 const char *bpsmsg; 5097 5098 switch (sc->link_speed) { 5099 case IXGBE_LINK_SPEED_10GB_FULL: 5100 bpsmsg = "10 Gbps"; 5101 break; 5102 case IXGBE_LINK_SPEED_5GB_FULL: 5103 bpsmsg = "5 Gbps"; 5104 break; 5105 case IXGBE_LINK_SPEED_2_5GB_FULL: 5106 bpsmsg = "2.5 Gbps"; 5107 break; 5108 case IXGBE_LINK_SPEED_1GB_FULL: 5109 bpsmsg = "1 Gbps"; 5110 break; 5111 case IXGBE_LINK_SPEED_100_FULL: 5112 bpsmsg = "100 Mbps"; 5113 break; 5114 case IXGBE_LINK_SPEED_10_FULL: 5115 bpsmsg = "10 Mbps"; 5116 break; 5117 default: 5118 bpsmsg = "unknown speed"; 5119 break; 5120 } 5121 device_printf(dev, "Link is up %s %s \n", 5122 bpsmsg, "Full Duplex"); 5123 } 5124 sc->link_active = LINK_STATE_UP; 5125 /* Update any Flow Control changes */ 5126 ixgbe_fc_enable(&sc->hw); 5127 /* Update DMA coalescing config */ 5128 ixgbe_config_dmac(sc); 5129 if_link_state_change(ifp, LINK_STATE_UP); 5130 5131 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5132 ixgbe_ping_all_vfs(sc); 5133 } 5134 } else { 5135 /* 5136 * Do it when link active changes to DOWN. i.e. 5137 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5138 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5139 */ 5140 if (sc->link_active != LINK_STATE_DOWN) { 5141 if (bootverbose) 5142 device_printf(dev, "Link is Down\n"); 5143 if_link_state_change(ifp, LINK_STATE_DOWN); 5144 sc->link_active = LINK_STATE_DOWN; 5145 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5146 ixgbe_ping_all_vfs(sc); 5147 ixgbe_drain_all(sc); 5148 } 5149 } 5150 } /* ixgbe_update_link_status */ 5151 5152 /************************************************************************ 5153 * ixgbe_config_dmac - Configure DMA Coalescing 5154 ************************************************************************/ 5155 static void 5156 ixgbe_config_dmac(struct ixgbe_softc *sc) 5157 { 5158 struct ixgbe_hw *hw = &sc->hw; 5159 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5160 5161 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5162 return; 5163 5164 if (dcfg->watchdog_timer ^ sc->dmac || 5165 dcfg->link_speed ^ sc->link_speed) { 5166 dcfg->watchdog_timer = sc->dmac; 5167 dcfg->fcoe_en = false; 5168 dcfg->link_speed = sc->link_speed; 5169 dcfg->num_tcs = 1; 5170 5171 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5172 dcfg->watchdog_timer, dcfg->link_speed); 5173 5174 hw->mac.ops.dmac_config(hw); 5175 } 5176 } /* ixgbe_config_dmac */ 5177 5178 /************************************************************************ 5179 * ixgbe_enable_intr 5180 ************************************************************************/ 5181 static void 5182 ixgbe_enable_intr(struct ixgbe_softc *sc) 5183 { 5184 struct ixgbe_hw *hw = &sc->hw; 5185 struct ix_queue *que = sc->queues; 5186 u32 mask, fwsm; 5187 5188 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5189 5190 switch (sc->hw.mac.type) { 5191 case ixgbe_mac_82599EB: 5192 mask |= IXGBE_EIMS_ECC; 5193 /* Temperature sensor on some adapters */ 5194 mask |= IXGBE_EIMS_GPI_SDP0; 5195 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5196 mask |= IXGBE_EIMS_GPI_SDP1; 5197 mask |= IXGBE_EIMS_GPI_SDP2; 5198 break; 5199 case ixgbe_mac_X540: 5200 /* Detect if Thermal Sensor is enabled */ 5201 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5202 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5203 mask |= IXGBE_EIMS_TS; 5204 mask |= IXGBE_EIMS_ECC; 5205 break; 5206 case ixgbe_mac_X550: 5207 /* MAC thermal sensor is automatically enabled */ 5208 mask |= IXGBE_EIMS_TS; 5209 mask |= IXGBE_EIMS_ECC; 5210 break; 5211 case ixgbe_mac_X550EM_x: 5212 case ixgbe_mac_X550EM_a: 5213 /* Some devices use SDP0 for important information */ 5214 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5215 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5216 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5217 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5218 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5219 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5220 mask |= IXGBE_EICR_GPI_SDP0_X540; 5221 mask |= IXGBE_EIMS_ECC; 5222 break; 5223 default: 5224 break; 5225 } 5226 5227 /* Enable Fan Failure detection */ 5228 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5229 mask |= IXGBE_EIMS_GPI_SDP1; 5230 /* Enable SR-IOV */ 5231 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5232 mask |= IXGBE_EIMS_MAILBOX; 5233 /* Enable Flow Director */ 5234 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5235 mask |= IXGBE_EIMS_FLOW_DIR; 5236 5237 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5238 5239 /* With MSI-X we use auto clear */ 5240 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5241 /* 5242 * We use auto clear for RTX_QUEUE only. Don't use other 5243 * interrupts (e.g. link interrupt). BTW, we don't use 5244 * TCP_TIMER interrupt itself. 5245 */ 5246 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5247 } 5248 5249 /* 5250 * Now enable all queues, this is done separately to 5251 * allow for handling the extended (beyond 32) MSI-X 5252 * vectors that can be used by 82599 5253 */ 5254 for (int i = 0; i < sc->num_queues; i++, que++) 5255 ixgbe_enable_queue(sc, que->msix); 5256 5257 IXGBE_WRITE_FLUSH(hw); 5258 5259 } /* ixgbe_enable_intr */ 5260 5261 /************************************************************************ 5262 * ixgbe_disable_intr_internal 5263 ************************************************************************/ 5264 static void 5265 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5266 { 5267 struct ix_queue *que = sc->queues; 5268 5269 /* disable interrupts other than queues */ 5270 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5271 5272 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5273 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5274 5275 for (int i = 0; i < sc->num_queues; i++, que++) 5276 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5277 5278 IXGBE_WRITE_FLUSH(&sc->hw); 5279 5280 } /* ixgbe_do_disable_intr_internal */ 5281 5282 /************************************************************************ 5283 * ixgbe_disable_intr 5284 ************************************************************************/ 5285 static void 5286 ixgbe_disable_intr(struct ixgbe_softc *sc) 5287 { 5288 5289 ixgbe_disable_intr_internal(sc, true); 5290 } /* ixgbe_disable_intr */ 5291 5292 /************************************************************************ 5293 * ixgbe_ensure_disabled_intr 5294 ************************************************************************/ 5295 void 5296 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5297 { 5298 5299 ixgbe_disable_intr_internal(sc, false); 5300 } /* ixgbe_ensure_disabled_intr */ 5301 5302 /************************************************************************ 5303 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5304 ************************************************************************/ 5305 static int 5306 ixgbe_legacy_irq(void *arg) 5307 { 5308 struct ix_queue *que = arg; 5309 struct ixgbe_softc *sc = que->sc; 5310 struct ixgbe_hw *hw = &sc->hw; 5311 struct ifnet *ifp = sc->ifp; 5312 struct tx_ring *txr = sc->tx_rings; 5313 u32 eicr; 5314 u32 eims_orig; 5315 u32 eims_enable = 0; 5316 u32 eims_disable = 0; 5317 5318 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5319 /* 5320 * Silicon errata #26 on 82598. Disable all interrupts before reading 5321 * EICR. 5322 */ 5323 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5324 5325 /* Read and clear EICR */ 5326 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5327 5328 if (eicr == 0) { 5329 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5330 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5331 return 0; 5332 } 5333 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5334 5335 /* Queue (0) intr */ 5336 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5337 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5338 IXGBE_EVC_ADD(&que->irqs, 1); 5339 5340 /* 5341 * The same as ixgbe_msix_que() about 5342 * "que->txrx_use_workqueue". 5343 */ 5344 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5345 5346 IXGBE_TX_LOCK(txr); 5347 ixgbe_txeof(txr); 5348 #ifdef notyet 5349 if (!ixgbe_ring_empty(ifp, txr->br)) 5350 ixgbe_start_locked(ifp, txr); 5351 #endif 5352 IXGBE_TX_UNLOCK(txr); 5353 5354 IXGBE_EVC_ADD(&que->req, 1); 5355 ixgbe_sched_handle_que(sc, que); 5356 /* Disable queue 0 interrupt */ 5357 eims_disable |= 1UL << 0; 5358 } else 5359 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5360 5361 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5362 5363 /* Re-enable some interrupts */ 5364 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5365 (eims_orig & ~eims_disable) | eims_enable); 5366 5367 return 1; 5368 } /* ixgbe_legacy_irq */ 5369 5370 /************************************************************************ 5371 * ixgbe_free_pciintr_resources 5372 ************************************************************************/ 5373 static void 5374 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5375 { 5376 struct ix_queue *que = sc->queues; 5377 int rid; 5378 5379 /* 5380 * Release all msix queue resources: 5381 */ 5382 for (int i = 0; i < sc->num_queues; i++, que++) { 5383 if (que->res != NULL) { 5384 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5385 sc->osdep.ihs[i] = NULL; 5386 } 5387 } 5388 5389 /* Clean the Legacy or Link interrupt last */ 5390 if (sc->vector) /* we are doing MSIX */ 5391 rid = sc->vector; 5392 else 5393 rid = 0; 5394 5395 if (sc->osdep.ihs[rid] != NULL) { 5396 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5397 sc->osdep.ihs[rid] = NULL; 5398 } 5399 5400 if (sc->osdep.intrs != NULL) { 5401 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5402 sc->osdep.nintrs); 5403 sc->osdep.intrs = NULL; 5404 } 5405 } /* ixgbe_free_pciintr_resources */ 5406 5407 /************************************************************************ 5408 * ixgbe_free_pci_resources 5409 ************************************************************************/ 5410 static void 5411 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5412 { 5413 5414 ixgbe_free_pciintr_resources(sc); 5415 5416 if (sc->osdep.mem_size != 0) { 5417 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5418 sc->osdep.mem_bus_space_handle, 5419 sc->osdep.mem_size); 5420 } 5421 } /* ixgbe_free_pci_resources */ 5422 5423 /************************************************************************ 5424 * ixgbe_sysctl_flowcntl 5425 * 5426 * SYSCTL wrapper around setting Flow Control 5427 ************************************************************************/ 5428 static int 5429 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5430 { 5431 struct sysctlnode node = *rnode; 5432 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5433 int error, fc; 5434 5435 if (ixgbe_fw_recovery_mode_swflag(sc)) 5436 return (EPERM); 5437 5438 fc = sc->hw.fc.current_mode; 5439 node.sysctl_data = &fc; 5440 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5441 if (error != 0 || newp == NULL) 5442 return error; 5443 5444 /* Don't bother if it's not changed */ 5445 if (fc == sc->hw.fc.current_mode) 5446 return (0); 5447 5448 return ixgbe_set_flowcntl(sc, fc); 5449 } /* ixgbe_sysctl_flowcntl */ 5450 5451 /************************************************************************ 5452 * ixgbe_set_flowcntl - Set flow control 5453 * 5454 * Flow control values: 5455 * 0 - off 5456 * 1 - rx pause 5457 * 2 - tx pause 5458 * 3 - full 5459 ************************************************************************/ 5460 static int 5461 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5462 { 5463 switch (fc) { 5464 case ixgbe_fc_rx_pause: 5465 case ixgbe_fc_tx_pause: 5466 case ixgbe_fc_full: 5467 sc->hw.fc.requested_mode = fc; 5468 if (sc->num_queues > 1) 5469 ixgbe_disable_rx_drop(sc); 5470 break; 5471 case ixgbe_fc_none: 5472 sc->hw.fc.requested_mode = ixgbe_fc_none; 5473 if (sc->num_queues > 1) 5474 ixgbe_enable_rx_drop(sc); 5475 break; 5476 default: 5477 return (EINVAL); 5478 } 5479 5480 #if 0 /* XXX NetBSD */ 5481 /* Don't autoneg if forcing a value */ 5482 sc->hw.fc.disable_fc_autoneg = TRUE; 5483 #endif 5484 ixgbe_fc_enable(&sc->hw); 5485 5486 return (0); 5487 } /* ixgbe_set_flowcntl */ 5488 5489 /************************************************************************ 5490 * ixgbe_enable_rx_drop 5491 * 5492 * Enable the hardware to drop packets when the buffer is 5493 * full. This is useful with multiqueue, so that no single 5494 * queue being full stalls the entire RX engine. We only 5495 * enable this when Multiqueue is enabled AND Flow Control 5496 * is disabled. 5497 ************************************************************************/ 5498 static void 5499 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5500 { 5501 struct ixgbe_hw *hw = &sc->hw; 5502 struct rx_ring *rxr; 5503 u32 srrctl; 5504 5505 for (int i = 0; i < sc->num_queues; i++) { 5506 rxr = &sc->rx_rings[i]; 5507 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5508 srrctl |= IXGBE_SRRCTL_DROP_EN; 5509 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5510 } 5511 5512 /* enable drop for each vf */ 5513 for (int i = 0; i < sc->num_vfs; i++) { 5514 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5515 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5516 IXGBE_QDE_ENABLE)); 5517 } 5518 } /* ixgbe_enable_rx_drop */ 5519 5520 /************************************************************************ 5521 * ixgbe_disable_rx_drop 5522 ************************************************************************/ 5523 static void 5524 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5525 { 5526 struct ixgbe_hw *hw = &sc->hw; 5527 struct rx_ring *rxr; 5528 u32 srrctl; 5529 5530 for (int i = 0; i < sc->num_queues; i++) { 5531 rxr = &sc->rx_rings[i]; 5532 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5533 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5534 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5535 } 5536 5537 /* disable drop for each vf */ 5538 for (int i = 0; i < sc->num_vfs; i++) { 5539 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5540 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5541 } 5542 } /* ixgbe_disable_rx_drop */ 5543 5544 /************************************************************************ 5545 * ixgbe_sysctl_advertise 5546 * 5547 * SYSCTL wrapper around setting advertised speed 5548 ************************************************************************/ 5549 static int 5550 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5551 { 5552 struct sysctlnode node = *rnode; 5553 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5554 int error = 0, advertise; 5555 5556 if (ixgbe_fw_recovery_mode_swflag(sc)) 5557 return (EPERM); 5558 5559 advertise = sc->advertise; 5560 node.sysctl_data = &advertise; 5561 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5562 if (error != 0 || newp == NULL) 5563 return error; 5564 5565 return ixgbe_set_advertise(sc, advertise); 5566 } /* ixgbe_sysctl_advertise */ 5567 5568 /************************************************************************ 5569 * ixgbe_set_advertise - Control advertised link speed 5570 * 5571 * Flags: 5572 * 0x00 - Default (all capable link speed) 5573 * 0x1 - advertise 100 Mb 5574 * 0x2 - advertise 1G 5575 * 0x4 - advertise 10G 5576 * 0x8 - advertise 10 Mb (yes, Mb) 5577 * 0x10 - advertise 2.5G 5578 * 0x20 - advertise 5G 5579 ************************************************************************/ 5580 static int 5581 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5582 { 5583 device_t dev; 5584 struct ixgbe_hw *hw; 5585 ixgbe_link_speed speed = 0; 5586 ixgbe_link_speed link_caps = 0; 5587 s32 err = IXGBE_NOT_IMPLEMENTED; 5588 bool negotiate = FALSE; 5589 5590 /* Checks to validate new value */ 5591 if (sc->advertise == advertise) /* no change */ 5592 return (0); 5593 5594 dev = sc->dev; 5595 hw = &sc->hw; 5596 5597 /* No speed changes for backplane media */ 5598 if (hw->phy.media_type == ixgbe_media_type_backplane) 5599 return (ENODEV); 5600 5601 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5602 (hw->phy.multispeed_fiber))) { 5603 device_printf(dev, 5604 "Advertised speed can only be set on copper or " 5605 "multispeed fiber media types.\n"); 5606 return (EINVAL); 5607 } 5608 5609 if (advertise < 0x0 || advertise > 0x3f) { 5610 device_printf(dev, "Invalid advertised speed; " 5611 "valid modes are 0x0 through 0x3f\n"); 5612 return (EINVAL); 5613 } 5614 5615 if (hw->mac.ops.get_link_capabilities) { 5616 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5617 &negotiate); 5618 if (err != IXGBE_SUCCESS) { 5619 device_printf(dev, "Unable to determine supported " 5620 "advertise speeds\n"); 5621 return (ENODEV); 5622 } 5623 } 5624 5625 /* Set new value and report new advertised mode */ 5626 if (advertise & 0x1) { 5627 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5628 device_printf(dev, "Interface does not support 100Mb " 5629 "advertised speed\n"); 5630 return (EINVAL); 5631 } 5632 speed |= IXGBE_LINK_SPEED_100_FULL; 5633 } 5634 if (advertise & 0x2) { 5635 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5636 device_printf(dev, "Interface does not support 1Gb " 5637 "advertised speed\n"); 5638 return (EINVAL); 5639 } 5640 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5641 } 5642 if (advertise & 0x4) { 5643 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5644 device_printf(dev, "Interface does not support 10Gb " 5645 "advertised speed\n"); 5646 return (EINVAL); 5647 } 5648 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5649 } 5650 if (advertise & 0x8) { 5651 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5652 device_printf(dev, "Interface does not support 10Mb " 5653 "advertised speed\n"); 5654 return (EINVAL); 5655 } 5656 speed |= IXGBE_LINK_SPEED_10_FULL; 5657 } 5658 if (advertise & 0x10) { 5659 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5660 device_printf(dev, "Interface does not support 2.5Gb " 5661 "advertised speed\n"); 5662 return (EINVAL); 5663 } 5664 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5665 } 5666 if (advertise & 0x20) { 5667 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5668 device_printf(dev, "Interface does not support 5Gb " 5669 "advertised speed\n"); 5670 return (EINVAL); 5671 } 5672 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5673 } 5674 if (advertise == 0) 5675 speed = link_caps; /* All capable link speed */ 5676 5677 hw->mac.autotry_restart = TRUE; 5678 hw->mac.ops.setup_link(hw, speed, TRUE); 5679 sc->advertise = advertise; 5680 5681 return (0); 5682 } /* ixgbe_set_advertise */ 5683 5684 /************************************************************************ 5685 * ixgbe_get_default_advertise - Get default advertised speed settings 5686 * 5687 * Formatted for sysctl usage. 5688 * Flags: 5689 * 0x1 - advertise 100 Mb 5690 * 0x2 - advertise 1G 5691 * 0x4 - advertise 10G 5692 * 0x8 - advertise 10 Mb (yes, Mb) 5693 * 0x10 - advertise 2.5G 5694 * 0x20 - advertise 5G 5695 ************************************************************************/ 5696 static int 5697 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5698 { 5699 struct ixgbe_hw *hw = &sc->hw; 5700 int speed; 5701 ixgbe_link_speed link_caps = 0; 5702 s32 err; 5703 bool negotiate = FALSE; 5704 5705 /* 5706 * Advertised speed means nothing unless it's copper or 5707 * multi-speed fiber 5708 */ 5709 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5710 !(hw->phy.multispeed_fiber)) 5711 return (0); 5712 5713 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5714 if (err != IXGBE_SUCCESS) 5715 return (0); 5716 5717 speed = 5718 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5719 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5720 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5721 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5722 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5723 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5724 5725 return speed; 5726 } /* ixgbe_get_default_advertise */ 5727 5728 /************************************************************************ 5729 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5730 * 5731 * Control values: 5732 * 0/1 - off / on (use default value of 1000) 5733 * 5734 * Legal timer values are: 5735 * 50,100,250,500,1000,2000,5000,10000 5736 * 5737 * Turning off interrupt moderation will also turn this off. 5738 ************************************************************************/ 5739 static int 5740 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5741 { 5742 struct sysctlnode node = *rnode; 5743 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5744 struct ifnet *ifp = sc->ifp; 5745 int error; 5746 int newval; 5747 5748 if (ixgbe_fw_recovery_mode_swflag(sc)) 5749 return (EPERM); 5750 5751 newval = sc->dmac; 5752 node.sysctl_data = &newval; 5753 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5754 if ((error) || (newp == NULL)) 5755 return (error); 5756 5757 switch (newval) { 5758 case 0: 5759 /* Disabled */ 5760 sc->dmac = 0; 5761 break; 5762 case 1: 5763 /* Enable and use default */ 5764 sc->dmac = 1000; 5765 break; 5766 case 50: 5767 case 100: 5768 case 250: 5769 case 500: 5770 case 1000: 5771 case 2000: 5772 case 5000: 5773 case 10000: 5774 /* Legal values - allow */ 5775 sc->dmac = newval; 5776 break; 5777 default: 5778 /* Do nothing, illegal value */ 5779 return (EINVAL); 5780 } 5781 5782 /* Re-initialize hardware if it's already running */ 5783 if (ifp->if_flags & IFF_RUNNING) 5784 if_init(ifp); 5785 5786 return (0); 5787 } 5788 5789 #ifdef IXGBE_DEBUG 5790 /************************************************************************ 5791 * ixgbe_sysctl_power_state 5792 * 5793 * Sysctl to test power states 5794 * Values: 5795 * 0 - set device to D0 5796 * 3 - set device to D3 5797 * (none) - get current device power state 5798 ************************************************************************/ 5799 static int 5800 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5801 { 5802 #ifdef notyet 5803 struct sysctlnode node = *rnode; 5804 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5805 device_t dev = sc->dev; 5806 int curr_ps, new_ps, error = 0; 5807 5808 if (ixgbe_fw_recovery_mode_swflag(sc)) 5809 return (EPERM); 5810 5811 curr_ps = new_ps = pci_get_powerstate(dev); 5812 5813 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5814 if ((error) || (req->newp == NULL)) 5815 return (error); 5816 5817 if (new_ps == curr_ps) 5818 return (0); 5819 5820 if (new_ps == 3 && curr_ps == 0) 5821 error = DEVICE_SUSPEND(dev); 5822 else if (new_ps == 0 && curr_ps == 3) 5823 error = DEVICE_RESUME(dev); 5824 else 5825 return (EINVAL); 5826 5827 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5828 5829 return (error); 5830 #else 5831 return 0; 5832 #endif 5833 } /* ixgbe_sysctl_power_state */ 5834 #endif 5835 5836 /************************************************************************ 5837 * ixgbe_sysctl_wol_enable 5838 * 5839 * Sysctl to enable/disable the WoL capability, 5840 * if supported by the adapter. 5841 * 5842 * Values: 5843 * 0 - disabled 5844 * 1 - enabled 5845 ************************************************************************/ 5846 static int 5847 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5848 { 5849 struct sysctlnode node = *rnode; 5850 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5851 struct ixgbe_hw *hw = &sc->hw; 5852 bool new_wol_enabled; 5853 int error = 0; 5854 5855 /* 5856 * It's not required to check recovery mode because this function never 5857 * touches hardware. 5858 */ 5859 new_wol_enabled = hw->wol_enabled; 5860 node.sysctl_data = &new_wol_enabled; 5861 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5862 if ((error) || (newp == NULL)) 5863 return (error); 5864 if (new_wol_enabled == hw->wol_enabled) 5865 return (0); 5866 5867 if (new_wol_enabled && !sc->wol_support) 5868 return (ENODEV); 5869 else 5870 hw->wol_enabled = new_wol_enabled; 5871 5872 return (0); 5873 } /* ixgbe_sysctl_wol_enable */ 5874 5875 /************************************************************************ 5876 * ixgbe_sysctl_wufc - Wake Up Filter Control 5877 * 5878 * Sysctl to enable/disable the types of packets that the 5879 * adapter will wake up on upon receipt. 5880 * Flags: 5881 * 0x1 - Link Status Change 5882 * 0x2 - Magic Packet 5883 * 0x4 - Direct Exact 5884 * 0x8 - Directed Multicast 5885 * 0x10 - Broadcast 5886 * 0x20 - ARP/IPv4 Request Packet 5887 * 0x40 - Direct IPv4 Packet 5888 * 0x80 - Direct IPv6 Packet 5889 * 5890 * Settings not listed above will cause the sysctl to return an error. 5891 ************************************************************************/ 5892 static int 5893 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5894 { 5895 struct sysctlnode node = *rnode; 5896 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5897 int error = 0; 5898 u32 new_wufc; 5899 5900 /* 5901 * It's not required to check recovery mode because this function never 5902 * touches hardware. 5903 */ 5904 new_wufc = sc->wufc; 5905 node.sysctl_data = &new_wufc; 5906 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5907 if ((error) || (newp == NULL)) 5908 return (error); 5909 if (new_wufc == sc->wufc) 5910 return (0); 5911 5912 if (new_wufc & 0xffffff00) 5913 return (EINVAL); 5914 5915 new_wufc &= 0xff; 5916 new_wufc |= (0xffffff & sc->wufc); 5917 sc->wufc = new_wufc; 5918 5919 return (0); 5920 } /* ixgbe_sysctl_wufc */ 5921 5922 #ifdef IXGBE_DEBUG 5923 /************************************************************************ 5924 * ixgbe_sysctl_print_rss_config 5925 ************************************************************************/ 5926 static int 5927 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5928 { 5929 #ifdef notyet 5930 struct sysctlnode node = *rnode; 5931 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5932 struct ixgbe_hw *hw = &sc->hw; 5933 device_t dev = sc->dev; 5934 struct sbuf *buf; 5935 int error = 0, reta_size; 5936 u32 reg; 5937 5938 if (ixgbe_fw_recovery_mode_swflag(sc)) 5939 return (EPERM); 5940 5941 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5942 if (!buf) { 5943 device_printf(dev, "Could not allocate sbuf for output.\n"); 5944 return (ENOMEM); 5945 } 5946 5947 // TODO: use sbufs to make a string to print out 5948 /* Set multiplier for RETA setup and table size based on MAC */ 5949 switch (sc->hw.mac.type) { 5950 case ixgbe_mac_X550: 5951 case ixgbe_mac_X550EM_x: 5952 case ixgbe_mac_X550EM_a: 5953 reta_size = 128; 5954 break; 5955 default: 5956 reta_size = 32; 5957 break; 5958 } 5959 5960 /* Print out the redirection table */ 5961 sbuf_cat(buf, "\n"); 5962 for (int i = 0; i < reta_size; i++) { 5963 if (i < 32) { 5964 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5965 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5966 } else { 5967 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5968 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5969 } 5970 } 5971 5972 // TODO: print more config 5973 5974 error = sbuf_finish(buf); 5975 if (error) 5976 device_printf(dev, "Error finishing sbuf: %d\n", error); 5977 5978 sbuf_delete(buf); 5979 #endif 5980 return (0); 5981 } /* ixgbe_sysctl_print_rss_config */ 5982 #endif /* IXGBE_DEBUG */ 5983 5984 /************************************************************************ 5985 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5986 * 5987 * For X552/X557-AT devices using an external PHY 5988 ************************************************************************/ 5989 static int 5990 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5991 { 5992 struct sysctlnode node = *rnode; 5993 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5994 struct ixgbe_hw *hw = &sc->hw; 5995 int val; 5996 u16 reg; 5997 int error; 5998 5999 if (ixgbe_fw_recovery_mode_swflag(sc)) 6000 return (EPERM); 6001 6002 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6003 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6004 device_printf(sc->dev, 6005 "Device has no supported external thermal sensor.\n"); 6006 return (ENODEV); 6007 } 6008 6009 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6010 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6011 device_printf(sc->dev, 6012 "Error reading from PHY's current temperature register\n"); 6013 return (EAGAIN); 6014 } 6015 6016 node.sysctl_data = &val; 6017 6018 /* Shift temp for output */ 6019 val = reg >> 8; 6020 6021 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6022 if ((error) || (newp == NULL)) 6023 return (error); 6024 6025 return (0); 6026 } /* ixgbe_sysctl_phy_temp */ 6027 6028 /************************************************************************ 6029 * ixgbe_sysctl_phy_overtemp_occurred 6030 * 6031 * Reports (directly from the PHY) whether the current PHY 6032 * temperature is over the overtemp threshold. 6033 ************************************************************************/ 6034 static int 6035 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6036 { 6037 struct sysctlnode node = *rnode; 6038 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6039 struct ixgbe_hw *hw = &sc->hw; 6040 int val, error; 6041 u16 reg; 6042 6043 if (ixgbe_fw_recovery_mode_swflag(sc)) 6044 return (EPERM); 6045 6046 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6047 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6048 device_printf(sc->dev, 6049 "Device has no supported external thermal sensor.\n"); 6050 return (ENODEV); 6051 } 6052 6053 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6054 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6055 device_printf(sc->dev, 6056 "Error reading from PHY's temperature status register\n"); 6057 return (EAGAIN); 6058 } 6059 6060 node.sysctl_data = &val; 6061 6062 /* Get occurrence bit */ 6063 val = !!(reg & 0x4000); 6064 6065 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6066 if ((error) || (newp == NULL)) 6067 return (error); 6068 6069 return (0); 6070 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6071 6072 /************************************************************************ 6073 * ixgbe_sysctl_eee_state 6074 * 6075 * Sysctl to set EEE power saving feature 6076 * Values: 6077 * 0 - disable EEE 6078 * 1 - enable EEE 6079 * (none) - get current device EEE state 6080 ************************************************************************/ 6081 static int 6082 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6083 { 6084 struct sysctlnode node = *rnode; 6085 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6086 struct ifnet *ifp = sc->ifp; 6087 device_t dev = sc->dev; 6088 int curr_eee, new_eee, error = 0; 6089 s32 retval; 6090 6091 if (ixgbe_fw_recovery_mode_swflag(sc)) 6092 return (EPERM); 6093 6094 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6095 node.sysctl_data = &new_eee; 6096 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6097 if ((error) || (newp == NULL)) 6098 return (error); 6099 6100 /* Nothing to do */ 6101 if (new_eee == curr_eee) 6102 return (0); 6103 6104 /* Not supported */ 6105 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6106 return (EINVAL); 6107 6108 /* Bounds checking */ 6109 if ((new_eee < 0) || (new_eee > 1)) 6110 return (EINVAL); 6111 6112 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6113 if (retval) { 6114 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6115 return (EINVAL); 6116 } 6117 6118 /* Restart auto-neg */ 6119 if_init(ifp); 6120 6121 device_printf(dev, "New EEE state: %d\n", new_eee); 6122 6123 /* Cache new value */ 6124 if (new_eee) 6125 sc->feat_en |= IXGBE_FEATURE_EEE; 6126 else 6127 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6128 6129 return (error); 6130 } /* ixgbe_sysctl_eee_state */ 6131 6132 #define PRINTQS(sc, regname) \ 6133 do { \ 6134 struct ixgbe_hw *_hw = &(sc)->hw; \ 6135 int _i; \ 6136 \ 6137 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6138 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6139 printf((_i == 0) ? "\t" : " "); \ 6140 printf("%08x", IXGBE_READ_REG(_hw, \ 6141 IXGBE_##regname(_i))); \ 6142 } \ 6143 printf("\n"); \ 6144 } while (0) 6145 6146 /************************************************************************ 6147 * ixgbe_print_debug_info 6148 * 6149 * Called only when em_display_debug_stats is enabled. 6150 * Provides a way to take a look at important statistics 6151 * maintained by the driver and hardware. 6152 ************************************************************************/ 6153 static void 6154 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6155 { 6156 device_t dev = sc->dev; 6157 struct ixgbe_hw *hw = &sc->hw; 6158 int table_size; 6159 int i; 6160 6161 switch (sc->hw.mac.type) { 6162 case ixgbe_mac_X550: 6163 case ixgbe_mac_X550EM_x: 6164 case ixgbe_mac_X550EM_a: 6165 table_size = 128; 6166 break; 6167 default: 6168 table_size = 32; 6169 break; 6170 } 6171 6172 device_printf(dev, "[E]RETA:\n"); 6173 for (i = 0; i < table_size; i++) { 6174 if (i < 32) 6175 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6176 IXGBE_RETA(i))); 6177 else 6178 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6179 IXGBE_ERETA(i - 32))); 6180 } 6181 6182 device_printf(dev, "queue:"); 6183 for (i = 0; i < sc->num_queues; i++) { 6184 printf((i == 0) ? "\t" : " "); 6185 printf("%8d", i); 6186 } 6187 printf("\n"); 6188 PRINTQS(sc, RDBAL); 6189 PRINTQS(sc, RDBAH); 6190 PRINTQS(sc, RDLEN); 6191 PRINTQS(sc, SRRCTL); 6192 PRINTQS(sc, RDH); 6193 PRINTQS(sc, RDT); 6194 PRINTQS(sc, RXDCTL); 6195 6196 device_printf(dev, "RQSMR:"); 6197 for (i = 0; i < sc->num_queues / 4; i++) { 6198 printf((i == 0) ? "\t" : " "); 6199 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6200 } 6201 printf("\n"); 6202 6203 device_printf(dev, "disabled_count:"); 6204 for (i = 0; i < sc->num_queues; i++) { 6205 printf((i == 0) ? "\t" : " "); 6206 printf("%8d", sc->queues[i].disabled_count); 6207 } 6208 printf("\n"); 6209 6210 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6211 if (hw->mac.type != ixgbe_mac_82598EB) { 6212 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6213 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6214 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6215 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6216 } 6217 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6218 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6219 } /* ixgbe_print_debug_info */ 6220 6221 /************************************************************************ 6222 * ixgbe_sysctl_debug 6223 ************************************************************************/ 6224 static int 6225 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6226 { 6227 struct sysctlnode node = *rnode; 6228 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6229 int error, result = 0; 6230 6231 if (ixgbe_fw_recovery_mode_swflag(sc)) 6232 return (EPERM); 6233 6234 node.sysctl_data = &result; 6235 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6236 6237 if (error || newp == NULL) 6238 return error; 6239 6240 if (result == 1) 6241 ixgbe_print_debug_info(sc); 6242 6243 return 0; 6244 } /* ixgbe_sysctl_debug */ 6245 6246 /************************************************************************ 6247 * ixgbe_sysctl_rx_copy_len 6248 ************************************************************************/ 6249 static int 6250 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6251 { 6252 struct sysctlnode node = *rnode; 6253 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6254 int error; 6255 int result = sc->rx_copy_len; 6256 6257 node.sysctl_data = &result; 6258 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6259 6260 if (error || newp == NULL) 6261 return error; 6262 6263 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6264 return EINVAL; 6265 6266 sc->rx_copy_len = result; 6267 6268 return 0; 6269 } /* ixgbe_sysctl_rx_copy_len */ 6270 6271 /************************************************************************ 6272 * ixgbe_sysctl_tx_process_limit 6273 ************************************************************************/ 6274 static int 6275 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6276 { 6277 struct sysctlnode node = *rnode; 6278 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6279 int error; 6280 int result = sc->tx_process_limit; 6281 6282 node.sysctl_data = &result; 6283 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6284 6285 if (error || newp == NULL) 6286 return error; 6287 6288 if ((result <= 0) || (result > sc->num_tx_desc)) 6289 return EINVAL; 6290 6291 sc->tx_process_limit = result; 6292 6293 return 0; 6294 } /* ixgbe_sysctl_tx_process_limit */ 6295 6296 /************************************************************************ 6297 * ixgbe_sysctl_rx_process_limit 6298 ************************************************************************/ 6299 static int 6300 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6301 { 6302 struct sysctlnode node = *rnode; 6303 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6304 int error; 6305 int result = sc->rx_process_limit; 6306 6307 node.sysctl_data = &result; 6308 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6309 6310 if (error || newp == NULL) 6311 return error; 6312 6313 if ((result <= 0) || (result > sc->num_rx_desc)) 6314 return EINVAL; 6315 6316 sc->rx_process_limit = result; 6317 6318 return 0; 6319 } /* ixgbe_sysctl_rx_process_limit */ 6320 6321 /************************************************************************ 6322 * ixgbe_init_device_features 6323 ************************************************************************/ 6324 static void 6325 ixgbe_init_device_features(struct ixgbe_softc *sc) 6326 { 6327 sc->feat_cap = IXGBE_FEATURE_NETMAP 6328 | IXGBE_FEATURE_RSS 6329 | IXGBE_FEATURE_MSI 6330 | IXGBE_FEATURE_MSIX 6331 | IXGBE_FEATURE_LEGACY_IRQ 6332 | IXGBE_FEATURE_LEGACY_TX; 6333 6334 /* Set capabilities first... */ 6335 switch (sc->hw.mac.type) { 6336 case ixgbe_mac_82598EB: 6337 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6338 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6339 break; 6340 case ixgbe_mac_X540: 6341 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6342 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6343 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6344 (sc->hw.bus.func == 0)) 6345 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6346 break; 6347 case ixgbe_mac_X550: 6348 /* 6349 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6350 * NVM Image version. 6351 */ 6352 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6353 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6354 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6355 break; 6356 case ixgbe_mac_X550EM_x: 6357 /* 6358 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6359 * NVM Image version. 6360 */ 6361 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6362 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6363 break; 6364 case ixgbe_mac_X550EM_a: 6365 /* 6366 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6367 * NVM Image version. 6368 */ 6369 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6370 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6371 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6372 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6373 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6374 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6375 sc->feat_cap |= IXGBE_FEATURE_EEE; 6376 } 6377 break; 6378 case ixgbe_mac_82599EB: 6379 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6380 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6381 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6382 (sc->hw.bus.func == 0)) 6383 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6384 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6385 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6386 break; 6387 default: 6388 break; 6389 } 6390 6391 /* Enabled by default... */ 6392 /* Fan failure detection */ 6393 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6394 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6395 /* Netmap */ 6396 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6397 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6398 /* EEE */ 6399 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6400 sc->feat_en |= IXGBE_FEATURE_EEE; 6401 /* Thermal Sensor */ 6402 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6403 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6404 /* 6405 * Recovery mode: 6406 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6407 * NVM Image version. 6408 */ 6409 6410 /* Enabled via global sysctl... */ 6411 /* Flow Director */ 6412 if (ixgbe_enable_fdir) { 6413 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6414 sc->feat_en |= IXGBE_FEATURE_FDIR; 6415 else 6416 device_printf(sc->dev, "Device does not support " 6417 "Flow Director. Leaving disabled."); 6418 } 6419 /* Legacy (single queue) transmit */ 6420 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6421 ixgbe_enable_legacy_tx) 6422 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6423 /* 6424 * Message Signal Interrupts - Extended (MSI-X) 6425 * Normal MSI is only enabled if MSI-X calls fail. 6426 */ 6427 if (!ixgbe_enable_msix) 6428 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6429 /* Receive-Side Scaling (RSS) */ 6430 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6431 sc->feat_en |= IXGBE_FEATURE_RSS; 6432 6433 /* Disable features with unmet dependencies... */ 6434 /* No MSI-X */ 6435 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6436 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6437 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6438 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6439 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6440 } 6441 } /* ixgbe_init_device_features */ 6442 6443 /************************************************************************ 6444 * ixgbe_probe - Device identification routine 6445 * 6446 * Determines if the driver should be loaded on 6447 * adapter based on its PCI vendor/device ID. 6448 * 6449 * return BUS_PROBE_DEFAULT on success, positive on failure 6450 ************************************************************************/ 6451 static int 6452 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6453 { 6454 const struct pci_attach_args *pa = aux; 6455 6456 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6457 } 6458 6459 static const ixgbe_vendor_info_t * 6460 ixgbe_lookup(const struct pci_attach_args *pa) 6461 { 6462 const ixgbe_vendor_info_t *ent; 6463 pcireg_t subid; 6464 6465 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6466 6467 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6468 return NULL; 6469 6470 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6471 6472 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6473 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6474 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6475 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6476 (ent->subvendor_id == 0)) && 6477 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6478 (ent->subdevice_id == 0))) { 6479 return ent; 6480 } 6481 } 6482 return NULL; 6483 } 6484 6485 static int 6486 ixgbe_ifflags_cb(struct ethercom *ec) 6487 { 6488 struct ifnet *ifp = &ec->ec_if; 6489 struct ixgbe_softc *sc = ifp->if_softc; 6490 u_short change; 6491 int rv = 0; 6492 6493 IXGBE_CORE_LOCK(sc); 6494 6495 change = ifp->if_flags ^ sc->if_flags; 6496 if (change != 0) 6497 sc->if_flags = ifp->if_flags; 6498 6499 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6500 rv = ENETRESET; 6501 goto out; 6502 } else if ((change & IFF_PROMISC) != 0) 6503 ixgbe_set_rxfilter(sc); 6504 6505 /* Check for ec_capenable. */ 6506 change = ec->ec_capenable ^ sc->ec_capenable; 6507 sc->ec_capenable = ec->ec_capenable; 6508 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6509 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6510 rv = ENETRESET; 6511 goto out; 6512 } 6513 6514 /* 6515 * Special handling is not required for ETHERCAP_VLAN_MTU. 6516 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6517 */ 6518 6519 /* Set up VLAN support and filter */ 6520 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6521 ixgbe_setup_vlan_hw_support(sc); 6522 6523 out: 6524 IXGBE_CORE_UNLOCK(sc); 6525 6526 return rv; 6527 } 6528 6529 /************************************************************************ 6530 * ixgbe_ioctl - Ioctl entry point 6531 * 6532 * Called when the user wants to configure the interface. 6533 * 6534 * return 0 on success, positive on failure 6535 ************************************************************************/ 6536 static int 6537 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6538 { 6539 struct ixgbe_softc *sc = ifp->if_softc; 6540 struct ixgbe_hw *hw = &sc->hw; 6541 struct ifcapreq *ifcr = data; 6542 struct ifreq *ifr = data; 6543 int error = 0; 6544 int l4csum_en; 6545 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6546 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6547 6548 if (ixgbe_fw_recovery_mode_swflag(sc)) 6549 return (EPERM); 6550 6551 switch (command) { 6552 case SIOCSIFFLAGS: 6553 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6554 break; 6555 case SIOCADDMULTI: 6556 case SIOCDELMULTI: 6557 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6558 break; 6559 case SIOCSIFMEDIA: 6560 case SIOCGIFMEDIA: 6561 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6562 break; 6563 case SIOCSIFCAP: 6564 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6565 break; 6566 case SIOCSIFMTU: 6567 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6568 break; 6569 #ifdef __NetBSD__ 6570 case SIOCINITIFADDR: 6571 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6572 break; 6573 case SIOCGIFFLAGS: 6574 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6575 break; 6576 case SIOCGIFAFLAG_IN: 6577 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6578 break; 6579 case SIOCGIFADDR: 6580 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6581 break; 6582 case SIOCGIFMTU: 6583 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6584 break; 6585 case SIOCGIFCAP: 6586 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6587 break; 6588 case SIOCGETHERCAP: 6589 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6590 break; 6591 case SIOCGLIFADDR: 6592 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6593 break; 6594 case SIOCZIFDATA: 6595 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6596 hw->mac.ops.clear_hw_cntrs(hw); 6597 ixgbe_clear_evcnt(sc); 6598 break; 6599 case SIOCAIFADDR: 6600 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6601 break; 6602 #endif 6603 default: 6604 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6605 break; 6606 } 6607 6608 switch (command) { 6609 case SIOCGI2C: 6610 { 6611 struct ixgbe_i2c_req i2c; 6612 6613 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6614 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6615 if (error != 0) 6616 break; 6617 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6618 error = EINVAL; 6619 break; 6620 } 6621 if (i2c.len > sizeof(i2c.data)) { 6622 error = EINVAL; 6623 break; 6624 } 6625 6626 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6627 i2c.dev_addr, i2c.data); 6628 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6629 break; 6630 } 6631 case SIOCSIFCAP: 6632 /* Layer-4 Rx checksum offload has to be turned on and 6633 * off as a unit. 6634 */ 6635 l4csum_en = ifcr->ifcr_capenable & l4csum; 6636 if (l4csum_en != l4csum && l4csum_en != 0) 6637 return EINVAL; 6638 /*FALLTHROUGH*/ 6639 case SIOCADDMULTI: 6640 case SIOCDELMULTI: 6641 case SIOCSIFFLAGS: 6642 case SIOCSIFMTU: 6643 default: 6644 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6645 return error; 6646 if ((ifp->if_flags & IFF_RUNNING) == 0) 6647 ; 6648 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6649 IXGBE_CORE_LOCK(sc); 6650 if ((ifp->if_flags & IFF_RUNNING) != 0) 6651 ixgbe_init_locked(sc); 6652 ixgbe_recalculate_max_frame(sc); 6653 IXGBE_CORE_UNLOCK(sc); 6654 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6655 /* 6656 * Multicast list has changed; set the hardware filter 6657 * accordingly. 6658 */ 6659 IXGBE_CORE_LOCK(sc); 6660 ixgbe_disable_intr(sc); 6661 ixgbe_set_rxfilter(sc); 6662 ixgbe_enable_intr(sc); 6663 IXGBE_CORE_UNLOCK(sc); 6664 } 6665 return 0; 6666 } 6667 6668 return error; 6669 } /* ixgbe_ioctl */ 6670 6671 /************************************************************************ 6672 * ixgbe_check_fan_failure 6673 ************************************************************************/ 6674 static int 6675 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6676 { 6677 u32 mask; 6678 6679 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6680 IXGBE_ESDP_SDP1; 6681 6682 if ((reg & mask) == 0) 6683 return IXGBE_SUCCESS; 6684 6685 /* 6686 * Use ratecheck() just in case interrupt occur frequently. 6687 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6688 * an red LED on the board turned on and link never up until 6689 * power off. 6690 */ 6691 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6692 device_printf(sc->dev, 6693 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6694 6695 return IXGBE_ERR_FAN_FAILURE; 6696 } /* ixgbe_check_fan_failure */ 6697 6698 /************************************************************************ 6699 * ixgbe_handle_que 6700 ************************************************************************/ 6701 static void 6702 ixgbe_handle_que(void *context) 6703 { 6704 struct ix_queue *que = context; 6705 struct ixgbe_softc *sc = que->sc; 6706 struct tx_ring *txr = que->txr; 6707 struct ifnet *ifp = sc->ifp; 6708 bool more = false; 6709 6710 IXGBE_EVC_ADD(&que->handleq, 1); 6711 6712 if (ifp->if_flags & IFF_RUNNING) { 6713 IXGBE_TX_LOCK(txr); 6714 more = ixgbe_txeof(txr); 6715 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6716 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6717 ixgbe_mq_start_locked(ifp, txr); 6718 /* Only for queue 0 */ 6719 /* NetBSD still needs this for CBQ */ 6720 if ((&sc->queues[0] == que) 6721 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6722 ixgbe_legacy_start_locked(ifp, txr); 6723 IXGBE_TX_UNLOCK(txr); 6724 more |= ixgbe_rxeof(que); 6725 } 6726 6727 if (more) { 6728 IXGBE_EVC_ADD(&que->req, 1); 6729 ixgbe_sched_handle_que(sc, que); 6730 } else if (que->res != NULL) { 6731 /* MSIX: Re-enable this interrupt */ 6732 ixgbe_enable_queue(sc, que->msix); 6733 } else { 6734 /* INTx or MSI */ 6735 ixgbe_enable_queue(sc, 0); 6736 } 6737 6738 return; 6739 } /* ixgbe_handle_que */ 6740 6741 /************************************************************************ 6742 * ixgbe_handle_que_work 6743 ************************************************************************/ 6744 static void 6745 ixgbe_handle_que_work(struct work *wk, void *context) 6746 { 6747 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6748 6749 /* 6750 * "enqueued flag" is not required here. 6751 * See ixgbe_msix_que(). 6752 */ 6753 ixgbe_handle_que(que); 6754 } 6755 6756 /************************************************************************ 6757 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6758 ************************************************************************/ 6759 static int 6760 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6761 const struct pci_attach_args *pa) 6762 { 6763 device_t dev = sc->dev; 6764 struct ix_queue *que = sc->queues; 6765 struct tx_ring *txr = sc->tx_rings; 6766 int counts[PCI_INTR_TYPE_SIZE]; 6767 pci_intr_type_t intr_type, max_type; 6768 char intrbuf[PCI_INTRSTR_LEN]; 6769 char wqname[MAXCOMLEN]; 6770 const char *intrstr = NULL; 6771 int defertx_error = 0, error; 6772 6773 /* We allocate a single interrupt resource */ 6774 max_type = PCI_INTR_TYPE_MSI; 6775 counts[PCI_INTR_TYPE_MSIX] = 0; 6776 counts[PCI_INTR_TYPE_MSI] = 6777 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6778 /* Check not feat_en but feat_cap to fallback to INTx */ 6779 counts[PCI_INTR_TYPE_INTX] = 6780 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6781 6782 alloc_retry: 6783 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6784 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6785 return ENXIO; 6786 } 6787 sc->osdep.nintrs = 1; 6788 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6789 intrbuf, sizeof(intrbuf)); 6790 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6791 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6792 device_xname(dev)); 6793 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6794 if (sc->osdep.ihs[0] == NULL) { 6795 aprint_error_dev(dev,"unable to establish %s\n", 6796 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6797 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6798 sc->osdep.intrs = NULL; 6799 switch (intr_type) { 6800 case PCI_INTR_TYPE_MSI: 6801 /* The next try is for INTx: Disable MSI */ 6802 max_type = PCI_INTR_TYPE_INTX; 6803 counts[PCI_INTR_TYPE_INTX] = 1; 6804 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6805 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6806 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6807 goto alloc_retry; 6808 } else 6809 break; 6810 case PCI_INTR_TYPE_INTX: 6811 default: 6812 /* See below */ 6813 break; 6814 } 6815 } 6816 if (intr_type == PCI_INTR_TYPE_INTX) { 6817 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6818 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6819 } 6820 if (sc->osdep.ihs[0] == NULL) { 6821 aprint_error_dev(dev, 6822 "couldn't establish interrupt%s%s\n", 6823 intrstr ? " at " : "", intrstr ? intrstr : ""); 6824 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6825 sc->osdep.intrs = NULL; 6826 return ENXIO; 6827 } 6828 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6829 /* 6830 * Try allocating a fast interrupt and the associated deferred 6831 * processing contexts. 6832 */ 6833 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6834 txr->txr_si = 6835 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6836 ixgbe_deferred_mq_start, txr); 6837 6838 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6839 device_xname(dev)); 6840 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6841 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6842 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6843 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6844 } 6845 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6846 ixgbe_handle_que, que); 6847 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6848 error = workqueue_create(&sc->que_wq, wqname, 6849 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6850 IXGBE_WORKQUEUE_FLAGS); 6851 6852 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6853 && ((txr->txr_si == NULL) || defertx_error != 0)) 6854 || (que->que_si == NULL) || error != 0) { 6855 aprint_error_dev(dev, 6856 "could not establish software interrupts\n"); 6857 6858 return ENXIO; 6859 } 6860 /* For simplicity in the handlers */ 6861 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6862 6863 return (0); 6864 } /* ixgbe_allocate_legacy */ 6865 6866 /************************************************************************ 6867 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6868 ************************************************************************/ 6869 static int 6870 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6871 { 6872 device_t dev = sc->dev; 6873 struct ix_queue *que = sc->queues; 6874 struct tx_ring *txr = sc->tx_rings; 6875 pci_chipset_tag_t pc; 6876 char intrbuf[PCI_INTRSTR_LEN]; 6877 char intr_xname[32]; 6878 char wqname[MAXCOMLEN]; 6879 const char *intrstr = NULL; 6880 int error, vector = 0; 6881 int cpu_id = 0; 6882 kcpuset_t *affinity; 6883 #ifdef RSS 6884 unsigned int rss_buckets = 0; 6885 kcpuset_t cpu_mask; 6886 #endif 6887 6888 pc = sc->osdep.pc; 6889 #ifdef RSS 6890 /* 6891 * If we're doing RSS, the number of queues needs to 6892 * match the number of RSS buckets that are configured. 6893 * 6894 * + If there's more queues than RSS buckets, we'll end 6895 * up with queues that get no traffic. 6896 * 6897 * + If there's more RSS buckets than queues, we'll end 6898 * up having multiple RSS buckets map to the same queue, 6899 * so there'll be some contention. 6900 */ 6901 rss_buckets = rss_getnumbuckets(); 6902 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6903 (sc->num_queues != rss_buckets)) { 6904 device_printf(dev, 6905 "%s: number of queues (%d) != number of RSS buckets (%d)" 6906 "; performance will be impacted.\n", 6907 __func__, sc->num_queues, rss_buckets); 6908 } 6909 #endif 6910 6911 sc->osdep.nintrs = sc->num_queues + 1; 6912 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6913 sc->osdep.nintrs) != 0) { 6914 aprint_error_dev(dev, 6915 "failed to allocate MSI-X interrupt\n"); 6916 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6917 return (ENXIO); 6918 } 6919 6920 kcpuset_create(&affinity, false); 6921 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6922 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6923 device_xname(dev), i); 6924 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6925 sizeof(intrbuf)); 6926 #ifdef IXGBE_MPSAFE 6927 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6928 true); 6929 #endif 6930 /* Set the handler function */ 6931 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6932 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6933 intr_xname); 6934 if (que->res == NULL) { 6935 aprint_error_dev(dev, 6936 "Failed to register QUE handler\n"); 6937 error = ENXIO; 6938 goto err_out; 6939 } 6940 que->msix = vector; 6941 sc->active_queues |= 1ULL << que->msix; 6942 6943 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6944 #ifdef RSS 6945 /* 6946 * The queue ID is used as the RSS layer bucket ID. 6947 * We look up the queue ID -> RSS CPU ID and select 6948 * that. 6949 */ 6950 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6951 CPU_SETOF(cpu_id, &cpu_mask); 6952 #endif 6953 } else { 6954 /* 6955 * Bind the MSI-X vector, and thus the 6956 * rings to the corresponding CPU. 6957 * 6958 * This just happens to match the default RSS 6959 * round-robin bucket -> queue -> CPU allocation. 6960 */ 6961 if (sc->num_queues > 1) 6962 cpu_id = i; 6963 } 6964 /* Round-robin affinity */ 6965 kcpuset_zero(affinity); 6966 kcpuset_set(affinity, cpu_id % ncpu); 6967 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6968 NULL); 6969 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6970 intrstr); 6971 if (error == 0) { 6972 #if 1 /* def IXGBE_DEBUG */ 6973 #ifdef RSS 6974 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6975 cpu_id % ncpu); 6976 #else 6977 aprint_normal(", bound queue %d to cpu %d", i, 6978 cpu_id % ncpu); 6979 #endif 6980 #endif /* IXGBE_DEBUG */ 6981 } 6982 aprint_normal("\n"); 6983 6984 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6985 txr->txr_si = softint_establish( 6986 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6987 ixgbe_deferred_mq_start, txr); 6988 if (txr->txr_si == NULL) { 6989 aprint_error_dev(dev, 6990 "couldn't establish software interrupt\n"); 6991 error = ENXIO; 6992 goto err_out; 6993 } 6994 } 6995 que->que_si 6996 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6997 ixgbe_handle_que, que); 6998 if (que->que_si == NULL) { 6999 aprint_error_dev(dev, 7000 "couldn't establish software interrupt\n"); 7001 error = ENXIO; 7002 goto err_out; 7003 } 7004 } 7005 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 7006 error = workqueue_create(&sc->txr_wq, wqname, 7007 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7008 IXGBE_WORKQUEUE_FLAGS); 7009 if (error) { 7010 aprint_error_dev(dev, 7011 "couldn't create workqueue for deferred Tx\n"); 7012 goto err_out; 7013 } 7014 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 7015 7016 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7017 error = workqueue_create(&sc->que_wq, wqname, 7018 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7019 IXGBE_WORKQUEUE_FLAGS); 7020 if (error) { 7021 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7022 goto err_out; 7023 } 7024 7025 /* and Link */ 7026 cpu_id++; 7027 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7028 sc->vector = vector; 7029 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7030 sizeof(intrbuf)); 7031 #ifdef IXGBE_MPSAFE 7032 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, 7033 true); 7034 #endif 7035 /* Set the link handler function */ 7036 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7037 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7038 intr_xname); 7039 if (sc->osdep.ihs[vector] == NULL) { 7040 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7041 error = ENXIO; 7042 goto err_out; 7043 } 7044 /* Round-robin affinity */ 7045 kcpuset_zero(affinity); 7046 kcpuset_set(affinity, cpu_id % ncpu); 7047 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7048 NULL); 7049 7050 aprint_normal_dev(dev, 7051 "for link, interrupting at %s", intrstr); 7052 if (error == 0) 7053 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7054 else 7055 aprint_normal("\n"); 7056 7057 kcpuset_destroy(affinity); 7058 aprint_normal_dev(dev, 7059 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7060 7061 return (0); 7062 7063 err_out: 7064 kcpuset_destroy(affinity); 7065 ixgbe_free_deferred_handlers(sc); 7066 ixgbe_free_pciintr_resources(sc); 7067 return (error); 7068 } /* ixgbe_allocate_msix */ 7069 7070 /************************************************************************ 7071 * ixgbe_configure_interrupts 7072 * 7073 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7074 * This will also depend on user settings. 7075 ************************************************************************/ 7076 static int 7077 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7078 { 7079 device_t dev = sc->dev; 7080 struct ixgbe_mac_info *mac = &sc->hw.mac; 7081 int want, queues, msgs; 7082 7083 /* Default to 1 queue if MSI-X setup fails */ 7084 sc->num_queues = 1; 7085 7086 /* Override by tuneable */ 7087 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7088 goto msi; 7089 7090 /* 7091 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7092 * interrupt slot. 7093 */ 7094 if (ncpu == 1) 7095 goto msi; 7096 7097 /* First try MSI-X */ 7098 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7099 msgs = MIN(msgs, IXG_MAX_NINTR); 7100 if (msgs < 2) 7101 goto msi; 7102 7103 sc->feat_en |= IXGBE_FEATURE_MSIX; 7104 7105 /* Figure out a reasonable auto config value */ 7106 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7107 7108 #ifdef RSS 7109 /* If we're doing RSS, clamp at the number of RSS buckets */ 7110 if (sc->feat_en & IXGBE_FEATURE_RSS) 7111 queues = uimin(queues, rss_getnumbuckets()); 7112 #endif 7113 if (ixgbe_num_queues > queues) { 7114 aprint_error_dev(sc->dev, 7115 "ixgbe_num_queues (%d) is too large, " 7116 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7117 ixgbe_num_queues = queues; 7118 } 7119 7120 if (ixgbe_num_queues != 0) 7121 queues = ixgbe_num_queues; 7122 else 7123 queues = uimin(queues, 7124 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7125 7126 /* 7127 * Want one vector (RX/TX pair) per queue 7128 * plus an additional for Link. 7129 */ 7130 want = queues + 1; 7131 if (msgs >= want) 7132 msgs = want; 7133 else { 7134 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7135 "%d vectors but %d queues wanted!\n", msgs, want); 7136 goto msi; 7137 } 7138 sc->num_queues = queues; 7139 sc->feat_en |= IXGBE_FEATURE_MSIX; 7140 return (0); 7141 7142 /* 7143 * MSI-X allocation failed or provided us with 7144 * less vectors than needed. Free MSI-X resources 7145 * and we'll try enabling MSI. 7146 */ 7147 msi: 7148 /* Without MSI-X, some features are no longer supported */ 7149 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7150 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7151 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7152 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7153 7154 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7155 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7156 if (msgs > 1) 7157 msgs = 1; 7158 if (msgs != 0) { 7159 msgs = 1; 7160 sc->feat_en |= IXGBE_FEATURE_MSI; 7161 return (0); 7162 } 7163 7164 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7165 aprint_error_dev(dev, 7166 "Device does not support legacy interrupts.\n"); 7167 return 1; 7168 } 7169 7170 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7171 7172 return (0); 7173 } /* ixgbe_configure_interrupts */ 7174 7175 7176 /************************************************************************ 7177 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7178 * 7179 * Done outside of interrupt context since the driver might sleep 7180 ************************************************************************/ 7181 static void 7182 ixgbe_handle_link(void *context) 7183 { 7184 struct ixgbe_softc *sc = context; 7185 struct ixgbe_hw *hw = &sc->hw; 7186 7187 KASSERT(mutex_owned(&sc->core_mtx)); 7188 7189 IXGBE_EVC_ADD(&sc->link_workev, 1); 7190 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7191 ixgbe_update_link_status(sc); 7192 7193 /* Re-enable link interrupts */ 7194 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7195 } /* ixgbe_handle_link */ 7196 7197 #if 0 7198 /************************************************************************ 7199 * ixgbe_rearm_queues 7200 ************************************************************************/ 7201 static __inline void 7202 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7203 { 7204 u32 mask; 7205 7206 switch (sc->hw.mac.type) { 7207 case ixgbe_mac_82598EB: 7208 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7209 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7210 break; 7211 case ixgbe_mac_82599EB: 7212 case ixgbe_mac_X540: 7213 case ixgbe_mac_X550: 7214 case ixgbe_mac_X550EM_x: 7215 case ixgbe_mac_X550EM_a: 7216 mask = (queues & 0xFFFFFFFF); 7217 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7218 mask = (queues >> 32); 7219 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7220 break; 7221 default: 7222 break; 7223 } 7224 } /* ixgbe_rearm_queues */ 7225 #endif 7226
Indexes created Tue Sep 30 11:09:46 GMT 2025