ixgbe.c revision 1.350
1 /* $NetBSD: ixgbe.c,v 1.350 2024/05/13 03:15:33 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.350 2024/05/13 03:15:33 msaitoh Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus and number of MSI-X vectors. 362 * This can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = DEFAULT_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = DEFAULT_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_MPSAFE 1 416 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 417 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 418 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 419 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 420 #else 421 #define IXGBE_CALLOUT_FLAGS 0 422 #define IXGBE_SOFTINT_FLAGS 0 423 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 424 #define IXGBE_TASKLET_WQ_FLAGS 0 425 #endif 426 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 427 428 /* Interval between reports of errors */ 429 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 430 431 /************************************************************************ 432 * ixgbe_initialize_rss_mapping 433 ************************************************************************/ 434 static void 435 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 436 { 437 struct ixgbe_hw *hw = &sc->hw; 438 u32 reta = 0, mrqc, rss_key[10]; 439 int queue_id, table_size, index_mult; 440 int i, j; 441 u32 rss_hash_config; 442 443 /* force use default RSS key. */ 444 #ifdef __NetBSD__ 445 rss_getkey((uint8_t *) &rss_key); 446 #else 447 if (sc->feat_en & IXGBE_FEATURE_RSS) { 448 /* Fetch the configured RSS key */ 449 rss_getkey((uint8_t *) &rss_key); 450 } else { 451 /* set up random bits */ 452 cprng_fast(&rss_key, sizeof(rss_key)); 453 } 454 #endif 455 456 /* Set multiplier for RETA setup and table size based on MAC */ 457 index_mult = 0x1; 458 table_size = 128; 459 switch (sc->hw.mac.type) { 460 case ixgbe_mac_82598EB: 461 index_mult = 0x11; 462 break; 463 case ixgbe_mac_X550: 464 case ixgbe_mac_X550EM_x: 465 case ixgbe_mac_X550EM_a: 466 table_size = 512; 467 break; 468 default: 469 break; 470 } 471 472 /* Set up the redirection table */ 473 for (i = 0, j = 0; i < table_size; i++, j++) { 474 if (j == sc->num_queues) 475 j = 0; 476 477 if (sc->feat_en & IXGBE_FEATURE_RSS) { 478 /* 479 * Fetch the RSS bucket id for the given indirection 480 * entry. Cap it at the number of configured buckets 481 * (which is num_queues.) 482 */ 483 queue_id = rss_get_indirection_to_bucket(i); 484 queue_id = queue_id % sc->num_queues; 485 } else 486 queue_id = (j * index_mult); 487 488 /* 489 * The low 8 bits are for hash value (n+0); 490 * The next 8 bits are for hash value (n+1), etc. 491 */ 492 reta = reta >> 8; 493 reta = reta | (((uint32_t) queue_id) << 24); 494 if ((i & 3) == 3) { 495 if (i < 128) 496 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 497 else 498 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 499 reta); 500 reta = 0; 501 } 502 } 503 504 /* Now fill our hash function seeds */ 505 for (i = 0; i < 10; i++) 506 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 507 508 /* Perform hash on these packet types */ 509 if (sc->feat_en & IXGBE_FEATURE_RSS) 510 rss_hash_config = rss_gethashconfig(); 511 else { 512 /* 513 * Disable UDP - IP fragments aren't currently being handled 514 * and so we end up with a mix of 2-tuple and 4-tuple 515 * traffic. 516 */ 517 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 518 | RSS_HASHTYPE_RSS_TCP_IPV4 519 | RSS_HASHTYPE_RSS_IPV6 520 | RSS_HASHTYPE_RSS_TCP_IPV6 521 | RSS_HASHTYPE_RSS_IPV6_EX 522 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 523 } 524 525 mrqc = IXGBE_MRQC_RSSEN; 526 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 527 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 528 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 529 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 530 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 531 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 532 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 533 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 534 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 535 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 536 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 537 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 538 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 539 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 540 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 541 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 542 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 543 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 544 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 545 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 546 } /* ixgbe_initialize_rss_mapping */ 547 548 /************************************************************************ 549 * ixgbe_initialize_receive_units - Setup receive registers and features. 550 ************************************************************************/ 551 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 552 553 static void 554 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 555 { 556 struct rx_ring *rxr = sc->rx_rings; 557 struct ixgbe_hw *hw = &sc->hw; 558 struct ifnet *ifp = sc->ifp; 559 int i, j; 560 u32 bufsz, fctrl, srrctl, rxcsum; 561 u32 hlreg; 562 563 /* 564 * Make sure receives are disabled while 565 * setting up the descriptor ring 566 */ 567 ixgbe_disable_rx(hw); 568 569 /* Enable broadcasts */ 570 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 571 fctrl |= IXGBE_FCTRL_BAM; 572 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 573 fctrl |= IXGBE_FCTRL_DPF; 574 fctrl |= IXGBE_FCTRL_PMCF; 575 } 576 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 577 578 /* Set for Jumbo Frames? */ 579 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 580 if (ifp->if_mtu > ETHERMTU) 581 hlreg |= IXGBE_HLREG0_JUMBOEN; 582 else 583 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 584 585 #ifdef DEV_NETMAP 586 /* CRC stripping is conditional in Netmap */ 587 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 588 (ifp->if_capenable & IFCAP_NETMAP) && 589 !ix_crcstrip) 590 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 591 else 592 #endif /* DEV_NETMAP */ 593 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 594 595 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 596 597 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 598 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 599 600 for (i = 0; i < sc->num_queues; i++, rxr++) { 601 u64 rdba = rxr->rxdma.dma_paddr; 602 u32 reg; 603 int regnum = i / 4; /* 1 register per 4 queues */ 604 int regshift = i % 4; /* 4 bits per 1 queue */ 605 j = rxr->me; 606 607 /* Setup the Base and Length of the Rx Descriptor Ring */ 608 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 609 (rdba & 0x00000000ffffffffULL)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 611 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 612 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 613 614 /* Set up the SRRCTL register */ 615 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 616 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 617 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 618 srrctl |= bufsz; 619 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 620 621 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 622 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 623 reg &= ~(0x000000ffUL << (regshift * 8)); 624 reg |= i << (regshift * 8); 625 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 626 627 /* 628 * Set DROP_EN iff we have no flow control and >1 queue. 629 * Note that srrctl was cleared shortly before during reset, 630 * so we do not need to clear the bit, but do it just in case 631 * this code is moved elsewhere. 632 */ 633 if ((sc->num_queues > 1) && 634 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 635 srrctl |= IXGBE_SRRCTL_DROP_EN; 636 else 637 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 638 639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 640 641 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 642 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 643 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 644 645 /* Set the driver rx tail address */ 646 rxr->tail = IXGBE_RDT(rxr->me); 647 } 648 649 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 650 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 651 | IXGBE_PSRTYPE_UDPHDR 652 | IXGBE_PSRTYPE_IPV4HDR 653 | IXGBE_PSRTYPE_IPV6HDR; 654 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 655 } 656 657 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 658 659 ixgbe_initialize_rss_mapping(sc); 660 661 if (sc->num_queues > 1) { 662 /* RSS and RX IPP Checksum are mutually exclusive */ 663 rxcsum |= IXGBE_RXCSUM_PCSD; 664 } 665 666 if (ifp->if_capenable & IFCAP_RXCSUM) 667 rxcsum |= IXGBE_RXCSUM_PCSD; 668 669 /* This is useful for calculating UDP/IP fragment checksums */ 670 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 671 rxcsum |= IXGBE_RXCSUM_IPPCSE; 672 673 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 674 675 } /* ixgbe_initialize_receive_units */ 676 677 /************************************************************************ 678 * ixgbe_initialize_transmit_units - Enable transmit units. 679 ************************************************************************/ 680 static void 681 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 682 { 683 struct tx_ring *txr = sc->tx_rings; 684 struct ixgbe_hw *hw = &sc->hw; 685 int i; 686 687 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 688 689 /* Setup the Base and Length of the Tx Descriptor Ring */ 690 for (i = 0; i < sc->num_queues; i++, txr++) { 691 u64 tdba = txr->txdma.dma_paddr; 692 u32 txctrl = 0; 693 u32 tqsmreg, reg; 694 int regnum = i / 4; /* 1 register per 4 queues */ 695 int regshift = i % 4; /* 4 bits per 1 queue */ 696 int j = txr->me; 697 698 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 699 (tdba & 0x00000000ffffffffULL)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 701 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 702 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 703 704 /* 705 * Set TQSMR (Transmit Queue Statistic Mapping) register. 706 * Register location is different between 82598 and others. 707 */ 708 if (sc->hw.mac.type == ixgbe_mac_82598EB) 709 tqsmreg = IXGBE_TQSMR(regnum); 710 else 711 tqsmreg = IXGBE_TQSM(regnum); 712 reg = IXGBE_READ_REG(hw, tqsmreg); 713 reg &= ~(0x000000ffUL << (regshift * 8)); 714 reg |= i << (regshift * 8); 715 IXGBE_WRITE_REG(hw, tqsmreg, reg); 716 717 /* Setup the HW Tx Head and Tail descriptor pointers */ 718 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 719 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 720 721 /* Cache the tail address */ 722 txr->tail = IXGBE_TDT(j); 723 724 txr->txr_no_space = false; 725 726 /* Disable relax ordering */ 727 /* 728 * Note: for X550 series devices, these registers are actually 729 * prefixed with TPH_ instead of DCA_, but the addresses and 730 * fields remain the same. 731 */ 732 switch (hw->mac.type) { 733 case ixgbe_mac_82598EB: 734 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 735 break; 736 default: 737 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 738 break; 739 } 740 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 741 switch (hw->mac.type) { 742 case ixgbe_mac_82598EB: 743 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 744 break; 745 default: 746 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 747 break; 748 } 749 750 } 751 752 if (hw->mac.type != ixgbe_mac_82598EB) { 753 u32 dmatxctl, rttdcs; 754 755 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 756 dmatxctl |= IXGBE_DMATXCTL_TE; 757 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 758 /* Disable arbiter to set MTQC */ 759 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 760 rttdcs |= IXGBE_RTTDCS_ARBDIS; 761 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 762 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 763 ixgbe_get_mtqc(sc->iov_mode)); 764 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 765 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 766 } 767 } /* ixgbe_initialize_transmit_units */ 768 769 static void 770 ixgbe_quirks(struct ixgbe_softc *sc) 771 { 772 device_t dev = sc->dev; 773 struct ixgbe_hw *hw = &sc->hw; 774 const char *vendor, *product; 775 776 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 777 /* 778 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 779 * MA10-ST0. 780 */ 781 vendor = pmf_get_platform("system-vendor"); 782 product = pmf_get_platform("system-product"); 783 784 if ((vendor == NULL) || (product == NULL)) 785 return; 786 787 if ((strcmp(vendor, "GIGABYTE") == 0) && 788 (strcmp(product, "MA10-ST0") == 0)) { 789 aprint_verbose_dev(dev, 790 "Enable SFP+ MOD_ABS inverse quirk\n"); 791 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 792 } 793 } 794 } 795 796 /************************************************************************ 797 * ixgbe_attach - Device initialization routine 798 * 799 * Called when the driver is being loaded. 800 * Identifies the type of hardware, allocates all resources 801 * and initializes the hardware. 802 * 803 * return 0 on success, positive on failure 804 ************************************************************************/ 805 static void 806 ixgbe_attach(device_t parent, device_t dev, void *aux) 807 { 808 struct ixgbe_softc *sc; 809 struct ixgbe_hw *hw; 810 int error = -1; 811 u32 ctrl_ext; 812 u16 high, low, nvmreg, dev_caps; 813 pcireg_t id, subid; 814 const ixgbe_vendor_info_t *ent; 815 struct pci_attach_args *pa = aux; 816 bool unsupported_sfp = false; 817 const char *str; 818 char wqname[MAXCOMLEN]; 819 char buf[256]; 820 821 INIT_DEBUGOUT("ixgbe_attach: begin"); 822 823 /* Allocate, clear, and link in our adapter structure */ 824 sc = device_private(dev); 825 sc->hw.back = sc; 826 sc->dev = dev; 827 hw = &sc->hw; 828 sc->osdep.pc = pa->pa_pc; 829 sc->osdep.tag = pa->pa_tag; 830 if (pci_dma64_available(pa)) 831 sc->osdep.dmat = pa->pa_dmat64; 832 else 833 sc->osdep.dmat = pa->pa_dmat; 834 sc->osdep.attached = false; 835 sc->osdep.detaching = false; 836 837 ent = ixgbe_lookup(pa); 838 839 KASSERT(ent != NULL); 840 841 aprint_normal(": %s, Version - %s\n", 842 ixgbe_strings[ent->index], ixgbe_driver_version); 843 844 /* Core Lock Init */ 845 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 846 847 /* Set up the timer callout and workqueue */ 848 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 849 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 850 error = workqueue_create(&sc->timer_wq, wqname, 851 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 852 IXGBE_TASKLET_WQ_FLAGS); 853 if (error) { 854 aprint_error_dev(dev, 855 "could not create timer workqueue (%d)\n", error); 856 goto err_out; 857 } 858 859 /* Determine hardware revision */ 860 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 861 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 862 863 hw->vendor_id = PCI_VENDOR(id); 864 hw->device_id = PCI_PRODUCT(id); 865 hw->revision_id = 866 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 867 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 868 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 869 870 /* Set quirk flags */ 871 ixgbe_quirks(sc); 872 873 /* 874 * Make sure BUSMASTER is set 875 */ 876 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 877 878 /* Do base PCI setup - map BAR0 */ 879 if (ixgbe_allocate_pci_resources(sc, pa)) { 880 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 881 error = ENXIO; 882 goto err_out; 883 } 884 885 /* let hardware know driver is loaded */ 886 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 887 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 888 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 889 890 /* 891 * Initialize the shared code 892 */ 893 if (ixgbe_init_shared_code(hw) != 0) { 894 aprint_error_dev(dev, 895 "Unable to initialize the shared code\n"); 896 error = ENXIO; 897 goto err_out; 898 } 899 900 switch (hw->mac.type) { 901 case ixgbe_mac_82598EB: 902 str = "82598EB"; 903 break; 904 case ixgbe_mac_82599EB: 905 str = "82599EB"; 906 break; 907 case ixgbe_mac_X540: 908 str = "X540"; 909 break; 910 case ixgbe_mac_X550: 911 str = "X550"; 912 break; 913 case ixgbe_mac_X550EM_x: 914 str = "X550EM X"; 915 break; 916 case ixgbe_mac_X550EM_a: 917 str = "X550EM A"; 918 break; 919 default: 920 str = "Unknown"; 921 break; 922 } 923 aprint_normal_dev(dev, "device %s\n", str); 924 925 hw->allow_unsupported_sfp = allow_unsupported_sfp; 926 927 /* Pick up the 82599 settings */ 928 if (hw->mac.type != ixgbe_mac_82598EB) 929 hw->phy.smart_speed = ixgbe_smart_speed; 930 931 /* Set the right number of segments */ 932 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 933 sc->num_segs = IXGBE_SCATTER_DEFAULT; 934 935 /* Ensure SW/FW semaphore is free */ 936 ixgbe_init_swfw_semaphore(hw); 937 938 hw->mac.ops.set_lan_id(hw); 939 ixgbe_init_device_features(sc); 940 941 if (ixgbe_configure_interrupts(sc)) { 942 error = ENXIO; 943 goto err_out; 944 } 945 946 /* Allocate multicast array memory. */ 947 sc->mta = malloc(sizeof(*sc->mta) * 948 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 949 950 /* Enable WoL (if supported) */ 951 ixgbe_check_wol_support(sc); 952 953 /* Register for VLAN events */ 954 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 955 956 /* Verify adapter fan is still functional (if applicable) */ 957 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 958 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 959 ixgbe_check_fan_failure(sc, esdp, FALSE); 960 } 961 962 /* Set an initial default flow control value */ 963 hw->fc.requested_mode = ixgbe_flow_control; 964 965 /* Do descriptor calc and sanity checks */ 966 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 967 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 968 aprint_error_dev(dev, "Invalid TX ring size (%d). " 969 "It must be between %d and %d, " 970 "inclusive, and must be a multiple of %zu. " 971 "Using default value of %d instead.\n", 972 ixgbe_txd, MIN_TXD, MAX_TXD, 973 DBA_ALIGN / sizeof(union ixgbe_adv_tx_desc), 974 DEFAULT_TXD); 975 sc->num_tx_desc = DEFAULT_TXD; 976 } else 977 sc->num_tx_desc = ixgbe_txd; 978 979 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 980 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 981 aprint_error_dev(dev, "Invalid RX ring size (%d). " 982 "It must be between %d and %d, " 983 "inclusive, and must be a multiple of %zu. " 984 "Using default value of %d instead.\n", 985 ixgbe_rxd, MIN_RXD, MAX_RXD, 986 DBA_ALIGN / sizeof(union ixgbe_adv_rx_desc), 987 DEFAULT_RXD); 988 sc->num_rx_desc = DEFAULT_RXD; 989 } else 990 sc->num_rx_desc = ixgbe_rxd; 991 992 /* Sysctls for limiting the amount of work done in the taskqueues */ 993 sc->rx_process_limit 994 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 995 ? ixgbe_rx_process_limit : sc->num_rx_desc; 996 sc->tx_process_limit 997 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 998 ? ixgbe_tx_process_limit : sc->num_tx_desc; 999 1000 /* Set default high limit of copying mbuf in rxeof */ 1001 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 1002 1003 /* Allocate our TX/RX Queues */ 1004 if (ixgbe_allocate_queues(sc)) { 1005 error = ENOMEM; 1006 goto err_out; 1007 } 1008 1009 hw->phy.reset_if_overtemp = TRUE; 1010 error = ixgbe_reset_hw(hw); 1011 hw->phy.reset_if_overtemp = FALSE; 1012 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1013 error = IXGBE_SUCCESS; 1014 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1015 aprint_error_dev(dev, 1016 "Unsupported SFP+ module type was detected.\n"); 1017 unsupported_sfp = true; 1018 error = IXGBE_SUCCESS; 1019 } else if (error) { 1020 aprint_error_dev(dev, 1021 "Hardware initialization failed(error = %d)\n", error); 1022 error = EIO; 1023 goto err_late; 1024 } 1025 1026 /* Make sure we have a good EEPROM before we read from it */ 1027 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1028 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1029 error = EIO; 1030 goto err_late; 1031 } 1032 1033 aprint_normal("%s:", device_xname(dev)); 1034 /* NVM Image Version */ 1035 high = low = 0; 1036 switch (hw->mac.type) { 1037 case ixgbe_mac_82598EB: 1038 /* 1039 * Print version from the dev starter version (0x29). The 1040 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1041 */ 1042 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1043 if (nvmreg == 0xffff) 1044 break; 1045 high = (nvmreg >> 12) & 0x0f; 1046 low = (nvmreg >> 4) & 0xff; 1047 id = nvmreg & 0x0f; 1048 /* 1049 * The following output might not be correct. Some 82598 cards 1050 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1051 */ 1052 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1053 break; 1054 case ixgbe_mac_X540: 1055 case ixgbe_mac_X550EM_a: 1056 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1057 if (nvmreg == 0xffff) 1058 break; 1059 high = (nvmreg >> 12) & 0x0f; 1060 low = (nvmreg >> 4) & 0xff; 1061 id = nvmreg & 0x0f; 1062 aprint_normal(" NVM Image Version %u.", high); 1063 if (hw->mac.type == ixgbe_mac_X540) 1064 str = "%x"; 1065 else 1066 str = "%02x"; 1067 aprint_normal(str, low); 1068 aprint_normal(" ID 0x%x,", id); 1069 break; 1070 case ixgbe_mac_X550EM_x: 1071 case ixgbe_mac_X550: 1072 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1073 if (nvmreg == 0xffff) 1074 break; 1075 high = (nvmreg >> 12) & 0x0f; 1076 low = nvmreg & 0xff; 1077 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1078 break; 1079 default: 1080 break; 1081 } 1082 hw->eeprom.nvm_image_ver_high = high; 1083 hw->eeprom.nvm_image_ver_low = low; 1084 1085 /* PHY firmware revision */ 1086 switch (hw->mac.type) { 1087 case ixgbe_mac_X540: 1088 case ixgbe_mac_X550: 1089 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1090 if (nvmreg == 0xffff) 1091 break; 1092 high = (nvmreg >> 12) & 0x0f; 1093 low = (nvmreg >> 4) & 0xff; 1094 id = nvmreg & 0x000f; 1095 aprint_normal(" PHY FW Revision %u.", high); 1096 if (hw->mac.type == ixgbe_mac_X540) 1097 str = "%x"; 1098 else 1099 str = "%02x"; 1100 aprint_normal(str, low); 1101 aprint_normal(" ID 0x%x,", id); 1102 break; 1103 default: 1104 break; 1105 } 1106 1107 /* NVM Map version & OEM NVM Image version */ 1108 switch (hw->mac.type) { 1109 case ixgbe_mac_X550: 1110 case ixgbe_mac_X550EM_x: 1111 case ixgbe_mac_X550EM_a: 1112 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1113 if (nvmreg != 0xffff) { 1114 high = (nvmreg >> 12) & 0x0f; 1115 low = nvmreg & 0x00ff; 1116 aprint_normal(" NVM Map version %u.%02x,", high, low); 1117 } 1118 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1119 if (nvmreg != 0xffff) { 1120 high = (nvmreg >> 12) & 0x0f; 1121 low = nvmreg & 0x00ff; 1122 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1123 low); 1124 } 1125 break; 1126 default: 1127 break; 1128 } 1129 1130 /* Print the ETrackID */ 1131 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1132 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1133 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1134 1135 /* Printed Board Assembly number */ 1136 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1137 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1138 1139 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1140 error = ixgbe_allocate_msix(sc, pa); 1141 if (error) { 1142 /* Free allocated queue structures first */ 1143 ixgbe_free_queues(sc); 1144 1145 /* Fallback to legacy interrupt */ 1146 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1147 sc->feat_en |= IXGBE_FEATURE_MSI; 1148 sc->num_queues = 1; 1149 1150 /* Allocate our TX/RX Queues again */ 1151 if (ixgbe_allocate_queues(sc)) { 1152 error = ENOMEM; 1153 goto err_out; 1154 } 1155 } 1156 } 1157 1158 /* Recovery mode */ 1159 switch (sc->hw.mac.type) { 1160 case ixgbe_mac_X550: 1161 case ixgbe_mac_X550EM_x: 1162 case ixgbe_mac_X550EM_a: 1163 /* >= 2.00 */ 1164 if (hw->eeprom.nvm_image_ver_high >= 2) { 1165 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1166 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1167 } 1168 break; 1169 default: 1170 break; 1171 } 1172 1173 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1174 error = ixgbe_allocate_legacy(sc, pa); 1175 if (error) 1176 goto err_late; 1177 1178 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1179 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1180 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1181 error = workqueue_create(&sc->admin_wq, wqname, 1182 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1183 IXGBE_TASKLET_WQ_FLAGS); 1184 if (error) { 1185 aprint_error_dev(dev, 1186 "could not create admin workqueue (%d)\n", error); 1187 goto err_out; 1188 } 1189 1190 error = ixgbe_start_hw(hw); 1191 switch (error) { 1192 case IXGBE_ERR_EEPROM_VERSION: 1193 aprint_error_dev(dev, 1194 "This device is a pre-production adapter/" 1195 "LOM. Please be aware there may be issues associated " 1196 "with your hardware.\nIf you are experiencing problems " 1197 "please contact your Intel or hardware representative " 1198 "who provided you with this hardware.\n"); 1199 break; 1200 default: 1201 break; 1202 } 1203 1204 /* Setup OS specific network interface */ 1205 if (ixgbe_setup_interface(dev, sc) != 0) 1206 goto err_late; 1207 1208 /* 1209 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1210 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1211 */ 1212 if (hw->phy.media_type == ixgbe_media_type_copper) { 1213 uint16_t id1, id2; 1214 int oui, model, rev; 1215 char descr[MII_MAX_DESCR_LEN]; 1216 1217 id1 = hw->phy.id >> 16; 1218 id2 = hw->phy.id & 0xffff; 1219 oui = MII_OUI(id1, id2); 1220 model = MII_MODEL(id2); 1221 rev = MII_REV(id2); 1222 mii_get_descr(descr, sizeof(descr), oui, model); 1223 if (descr[0]) 1224 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1225 descr, rev); 1226 else 1227 aprint_normal_dev(dev, 1228 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1229 oui, model, rev); 1230 } 1231 1232 /* Enable EEE power saving */ 1233 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1234 hw->mac.ops.setup_eee(hw, 1235 sc->feat_en & IXGBE_FEATURE_EEE); 1236 1237 /* Enable power to the phy. */ 1238 if (!unsupported_sfp) { 1239 /* Enable the optics for 82599 SFP+ fiber */ 1240 ixgbe_enable_tx_laser(hw); 1241 1242 /* 1243 * XXX Currently, ixgbe_set_phy_power() supports only copper 1244 * PHY, so it's not required to test with !unsupported_sfp. 1245 */ 1246 ixgbe_set_phy_power(hw, TRUE); 1247 } 1248 1249 /* Initialize statistics */ 1250 ixgbe_update_stats_counters(sc); 1251 1252 /* Check PCIE slot type/speed/width */ 1253 ixgbe_get_slot_info(sc); 1254 1255 /* 1256 * Do time init and sysctl init here, but 1257 * only on the first port of a bypass adapter. 1258 */ 1259 ixgbe_bypass_init(sc); 1260 1261 /* Set an initial dmac value */ 1262 sc->dmac = 0; 1263 /* Set initial advertised speeds (if applicable) */ 1264 sc->advertise = ixgbe_get_default_advertise(sc); 1265 1266 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1267 ixgbe_define_iov_schemas(dev, &error); 1268 1269 /* Add sysctls */ 1270 ixgbe_add_device_sysctls(sc); 1271 ixgbe_add_hw_stats(sc); 1272 1273 /* For Netmap */ 1274 sc->init_locked = ixgbe_init_locked; 1275 sc->stop_locked = ixgbe_stop_locked; 1276 1277 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1278 ixgbe_netmap_attach(sc); 1279 1280 /* Print some flags */ 1281 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1282 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1283 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1284 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1285 if (ixgbe_get_device_caps(hw, &dev_caps) == 0) { 1286 snprintb(buf, sizeof(buf), IXGBE_DEVICE_CAPS_FLAGS, dev_caps); 1287 aprint_verbose_dev(dev, "device cap %s\n", buf); 1288 } 1289 1290 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1291 pmf_class_network_register(dev, sc->ifp); 1292 else 1293 aprint_error_dev(dev, "couldn't establish power handler\n"); 1294 1295 /* Init recovery mode timer and state variable */ 1296 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1297 sc->recovery_mode = 0; 1298 1299 /* Set up the timer callout */ 1300 callout_init(&sc->recovery_mode_timer, 1301 IXGBE_CALLOUT_FLAGS); 1302 snprintf(wqname, sizeof(wqname), "%s-recovery", 1303 device_xname(dev)); 1304 error = workqueue_create(&sc->recovery_mode_timer_wq, 1305 wqname, ixgbe_handle_recovery_mode_timer, sc, 1306 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1307 if (error) { 1308 aprint_error_dev(dev, "could not create " 1309 "recovery_mode_timer workqueue (%d)\n", error); 1310 goto err_out; 1311 } 1312 1313 /* Start the task */ 1314 callout_reset(&sc->recovery_mode_timer, hz, 1315 ixgbe_recovery_mode_timer, sc); 1316 } 1317 1318 INIT_DEBUGOUT("ixgbe_attach: end"); 1319 sc->osdep.attached = true; 1320 1321 return; 1322 1323 err_late: 1324 ixgbe_free_queues(sc); 1325 err_out: 1326 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1327 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1328 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1329 ixgbe_free_deferred_handlers(sc); 1330 ixgbe_free_pci_resources(sc); 1331 if (sc->mta != NULL) 1332 free(sc->mta, M_DEVBUF); 1333 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1334 IXGBE_CORE_LOCK_DESTROY(sc); 1335 1336 return; 1337 } /* ixgbe_attach */ 1338 1339 /************************************************************************ 1340 * ixgbe_check_wol_support 1341 * 1342 * Checks whether the adapter's ports are capable of 1343 * Wake On LAN by reading the adapter's NVM. 1344 * 1345 * Sets each port's hw->wol_enabled value depending 1346 * on the value read here. 1347 ************************************************************************/ 1348 static void 1349 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1350 { 1351 struct ixgbe_hw *hw = &sc->hw; 1352 u16 dev_caps = 0; 1353 1354 /* Find out WoL support for port */ 1355 sc->wol_support = hw->wol_enabled = 0; 1356 ixgbe_get_device_caps(hw, &dev_caps); 1357 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1358 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1359 hw->bus.func == 0)) 1360 sc->wol_support = hw->wol_enabled = 1; 1361 1362 /* Save initial wake up filter configuration */ 1363 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1364 1365 return; 1366 } /* ixgbe_check_wol_support */ 1367 1368 /************************************************************************ 1369 * ixgbe_setup_interface 1370 * 1371 * Setup networking device structure and register an interface. 1372 ************************************************************************/ 1373 static int 1374 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1375 { 1376 struct ethercom *ec = &sc->osdep.ec; 1377 struct ifnet *ifp; 1378 1379 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1380 1381 ifp = sc->ifp = &ec->ec_if; 1382 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1383 ifp->if_baudrate = IF_Gbps(10); 1384 ifp->if_init = ixgbe_init; 1385 ifp->if_stop = ixgbe_ifstop; 1386 ifp->if_softc = sc; 1387 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1388 #ifdef IXGBE_MPSAFE 1389 ifp->if_extflags = IFEF_MPSAFE; 1390 #endif 1391 ifp->if_ioctl = ixgbe_ioctl; 1392 #if __FreeBSD_version >= 1100045 1393 /* TSO parameters */ 1394 ifp->if_hw_tsomax = 65518; 1395 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1396 ifp->if_hw_tsomaxsegsize = 2048; 1397 #endif 1398 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1399 #if 0 1400 ixgbe_start_locked = ixgbe_legacy_start_locked; 1401 #endif 1402 } else { 1403 ifp->if_transmit = ixgbe_mq_start; 1404 #if 0 1405 ixgbe_start_locked = ixgbe_mq_start_locked; 1406 #endif 1407 } 1408 ifp->if_start = ixgbe_legacy_start; 1409 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1410 IFQ_SET_READY(&ifp->if_snd); 1411 1412 if_initialize(ifp); 1413 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1414 /* 1415 * We use per TX queue softint, so if_deferred_start_init() isn't 1416 * used. 1417 */ 1418 1419 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1420 1421 /* 1422 * Tell the upper layer(s) we support long frames. 1423 */ 1424 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1425 1426 /* Set capability flags */ 1427 ifp->if_capabilities |= IFCAP_RXCSUM 1428 | IFCAP_TXCSUM 1429 | IFCAP_TSOv4 1430 | IFCAP_TSOv6; 1431 ifp->if_capenable = 0; 1432 1433 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1434 | ETHERCAP_VLAN_HWCSUM 1435 | ETHERCAP_JUMBO_MTU 1436 | ETHERCAP_VLAN_MTU; 1437 1438 /* Enable the above capabilities by default */ 1439 ec->ec_capenable = ec->ec_capabilities; 1440 1441 ether_ifattach(ifp, sc->hw.mac.addr); 1442 aprint_normal_dev(dev, "Ethernet address %s\n", 1443 ether_sprintf(sc->hw.mac.addr)); 1444 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1445 1446 /* 1447 * Don't turn this on by default, if vlans are 1448 * created on another pseudo device (eg. lagg) 1449 * then vlan events are not passed thru, breaking 1450 * operation, but with HW FILTER off it works. If 1451 * using vlans directly on the ixgbe driver you can 1452 * enable this and get full hardware tag filtering. 1453 */ 1454 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1455 1456 /* 1457 * Specify the media types supported by this adapter and register 1458 * callbacks to update media and link information 1459 */ 1460 ec->ec_ifmedia = &sc->media; 1461 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1462 ixgbe_media_status, &sc->core_mtx); 1463 1464 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1465 ixgbe_add_media_types(sc); 1466 1467 /* Set autoselect media by default */ 1468 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1469 1470 if_register(ifp); 1471 1472 return (0); 1473 } /* ixgbe_setup_interface */ 1474 1475 /************************************************************************ 1476 * ixgbe_add_media_types 1477 ************************************************************************/ 1478 static void 1479 ixgbe_add_media_types(struct ixgbe_softc *sc) 1480 { 1481 struct ixgbe_hw *hw = &sc->hw; 1482 u64 layer; 1483 1484 layer = sc->phy_layer; 1485 1486 #define ADD(mm, dd) \ 1487 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1488 1489 ADD(IFM_NONE, 0); 1490 1491 /* Media types with matching NetBSD media defines */ 1492 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1493 ADD(IFM_10G_T | IFM_FDX, 0); 1494 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1495 ADD(IFM_1000_T | IFM_FDX, 0); 1496 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1497 ADD(IFM_100_TX | IFM_FDX, 0); 1498 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1499 ADD(IFM_10_T | IFM_FDX, 0); 1500 1501 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1502 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1503 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1504 1505 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1506 ADD(IFM_10G_LR | IFM_FDX, 0); 1507 if (hw->phy.multispeed_fiber) 1508 ADD(IFM_1000_LX | IFM_FDX, 0); 1509 } 1510 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1511 ADD(IFM_10G_SR | IFM_FDX, 0); 1512 if (hw->phy.multispeed_fiber) 1513 ADD(IFM_1000_SX | IFM_FDX, 0); 1514 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1515 ADD(IFM_1000_SX | IFM_FDX, 0); 1516 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1517 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1518 1519 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1520 ADD(IFM_10G_KR | IFM_FDX, 0); 1521 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1522 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1523 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1524 ADD(IFM_1000_KX | IFM_FDX, 0); 1525 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1526 ADD(IFM_2500_KX | IFM_FDX, 0); 1527 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1528 ADD(IFM_2500_T | IFM_FDX, 0); 1529 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1530 ADD(IFM_5000_T | IFM_FDX, 0); 1531 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1532 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1533 /* XXX no ifmedia_set? */ 1534 1535 ADD(IFM_AUTO, 0); 1536 1537 #undef ADD 1538 } /* ixgbe_add_media_types */ 1539 1540 /************************************************************************ 1541 * ixgbe_is_sfp 1542 ************************************************************************/ 1543 static inline bool 1544 ixgbe_is_sfp(struct ixgbe_hw *hw) 1545 { 1546 switch (hw->mac.type) { 1547 case ixgbe_mac_82598EB: 1548 if (hw->phy.type == ixgbe_phy_nl) 1549 return (TRUE); 1550 return (FALSE); 1551 case ixgbe_mac_82599EB: 1552 case ixgbe_mac_X550EM_x: 1553 case ixgbe_mac_X550EM_a: 1554 switch (hw->mac.ops.get_media_type(hw)) { 1555 case ixgbe_media_type_fiber: 1556 case ixgbe_media_type_fiber_qsfp: 1557 return (TRUE); 1558 default: 1559 return (FALSE); 1560 } 1561 default: 1562 return (FALSE); 1563 } 1564 } /* ixgbe_is_sfp */ 1565 1566 static void 1567 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1568 { 1569 1570 KASSERT(mutex_owned(&sc->admin_mtx)); 1571 1572 if (__predict_true(sc->osdep.detaching == false)) { 1573 if (sc->admin_pending == 0) 1574 workqueue_enqueue(sc->admin_wq, 1575 &sc->admin_wc, NULL); 1576 sc->admin_pending = 1; 1577 } 1578 } 1579 1580 /************************************************************************ 1581 * ixgbe_config_link 1582 ************************************************************************/ 1583 static void 1584 ixgbe_config_link(struct ixgbe_softc *sc) 1585 { 1586 struct ixgbe_hw *hw = &sc->hw; 1587 u32 autoneg, err = 0; 1588 u32 task_requests = 0; 1589 bool sfp, negotiate = false; 1590 1591 sfp = ixgbe_is_sfp(hw); 1592 1593 if (sfp) { 1594 if (hw->phy.multispeed_fiber) { 1595 ixgbe_enable_tx_laser(hw); 1596 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1597 } 1598 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1599 1600 mutex_enter(&sc->admin_mtx); 1601 sc->task_requests |= task_requests; 1602 ixgbe_schedule_admin_tasklet(sc); 1603 mutex_exit(&sc->admin_mtx); 1604 } else { 1605 struct ifmedia *ifm = &sc->media; 1606 1607 if (hw->mac.ops.check_link) 1608 err = ixgbe_check_link(hw, &sc->link_speed, 1609 &sc->link_up, FALSE); 1610 if (err) 1611 return; 1612 1613 /* 1614 * Check if it's the first call. If it's the first call, 1615 * get value for auto negotiation. 1616 */ 1617 autoneg = hw->phy.autoneg_advertised; 1618 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1619 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1620 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1621 &negotiate); 1622 if (err) 1623 return; 1624 if (hw->mac.ops.setup_link) 1625 err = hw->mac.ops.setup_link(hw, autoneg, 1626 sc->link_up); 1627 } 1628 } /* ixgbe_config_link */ 1629 1630 /************************************************************************ 1631 * ixgbe_update_stats_counters - Update board statistics counters. 1632 ************************************************************************/ 1633 static void 1634 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1635 { 1636 struct ifnet *ifp = sc->ifp; 1637 struct ixgbe_hw *hw = &sc->hw; 1638 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1639 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1640 u64 total, total_missed_rx = 0, total_qprdc = 0; 1641 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1642 unsigned int queue_counters; 1643 int i; 1644 1645 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1646 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1647 1648 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1649 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1650 if (hw->mac.type >= ixgbe_mac_X550) 1651 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1652 1653 /* 16 registers exist */ 1654 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1655 for (i = 0; i < queue_counters; i++) { 1656 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1657 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1658 if (hw->mac.type >= ixgbe_mac_82599EB) { 1659 uint32_t qprdc; 1660 1661 IXGBE_EVC_ADD(&stats->qbrc[i], 1662 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1663 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1664 IXGBE_EVC_ADD(&stats->qbtc[i], 1665 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1666 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1667 /* QPRDC will be added to iqdrops. */ 1668 qprdc = IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1669 IXGBE_EVC_ADD(&stats->qprdc[i], qprdc); 1670 total_qprdc += qprdc; 1671 } else { 1672 /* 82598 */ 1673 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1674 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1675 } 1676 } 1677 1678 /* 8 registers exist */ 1679 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1680 uint32_t mp; 1681 1682 /* MPC */ 1683 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1684 /* global total per queue */ 1685 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1686 /* running comprehensive total for stats display */ 1687 total_missed_rx += mp; 1688 1689 if (hw->mac.type == ixgbe_mac_82598EB) 1690 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1691 1692 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1693 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1694 if (hw->mac.type >= ixgbe_mac_82599EB) { 1695 IXGBE_EVC_REGADD(hw, stats, 1696 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1697 IXGBE_EVC_REGADD(hw, stats, 1698 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1699 IXGBE_EVC_REGADD(hw, stats, 1700 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1701 } else { 1702 IXGBE_EVC_REGADD(hw, stats, 1703 IXGBE_PXONRXC(i), pxonrxc[i]); 1704 IXGBE_EVC_REGADD(hw, stats, 1705 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1706 } 1707 } 1708 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1709 1710 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1711 if ((sc->link_active == LINK_STATE_UP) 1712 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1713 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1714 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1715 } 1716 if (hw->mac.type == ixgbe_mac_X550EM_a) 1717 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1718 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1719 1720 /* Hardware workaround, gprc counts missed packets */ 1721 IXGBE_EVC_ADD(&stats->gprc, 1722 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1723 1724 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1725 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1726 total = lxontxc + lxofftxc; 1727 1728 if (hw->mac.type != ixgbe_mac_82598EB) { 1729 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1730 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1731 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1732 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1733 - total * ETHER_MIN_LEN); 1734 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1735 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1736 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1737 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1738 } else { 1739 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1740 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1741 /* 82598 only has a counter in the high register */ 1742 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1743 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1744 - total * ETHER_MIN_LEN); 1745 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1746 } 1747 1748 /* 1749 * Workaround: mprc hardware is incorrectly counting 1750 * broadcasts, so for now we subtract those. 1751 */ 1752 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1753 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1754 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1755 1756 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1757 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1758 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1759 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1760 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1761 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1762 1763 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1764 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1765 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1766 1767 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1768 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1769 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1770 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1771 1772 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1773 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1774 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1775 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1776 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1777 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1778 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1779 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1780 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1781 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1782 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1783 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1784 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1785 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1786 /* Only read FCOE on 82599 */ 1787 if (hw->mac.type != ixgbe_mac_82598EB) { 1788 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1789 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1790 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1791 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1792 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1793 } 1794 1795 /* 1796 * Fill out the OS statistics structure. Only RX errors are required 1797 * here because all TX counters are incremented in the TX path and 1798 * normal RX counters are prepared in ether_input(). 1799 */ 1800 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1801 if_statadd_ref(nsr, if_iqdrops, total_missed_rx + total_qprdc); 1802 1803 /* 1804 * Aggregate following types of errors as RX errors: 1805 * - CRC error count, 1806 * - illegal byte error count, 1807 * - length error count, 1808 * - undersized packets count, 1809 * - fragmented packets count, 1810 * - oversized packets count, 1811 * - jabber count. 1812 */ 1813 if_statadd_ref(nsr, if_ierrors, 1814 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1815 1816 IF_STAT_PUTREF(ifp); 1817 } /* ixgbe_update_stats_counters */ 1818 1819 /************************************************************************ 1820 * ixgbe_add_hw_stats 1821 * 1822 * Add sysctl variables, one per statistic, to the system. 1823 ************************************************************************/ 1824 static void 1825 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1826 { 1827 device_t dev = sc->dev; 1828 const struct sysctlnode *rnode, *cnode; 1829 struct sysctllog **log = &sc->sysctllog; 1830 struct tx_ring *txr = sc->tx_rings; 1831 struct rx_ring *rxr = sc->rx_rings; 1832 struct ixgbe_hw *hw = &sc->hw; 1833 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1834 const char *xname = device_xname(dev); 1835 int i; 1836 1837 /* Driver Statistics */ 1838 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1839 NULL, xname, "Driver tx dma soft fail EFBIG"); 1840 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1841 NULL, xname, "m_defrag() failed"); 1842 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1843 NULL, xname, "Driver tx dma hard fail EFBIG"); 1844 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1845 NULL, xname, "Driver tx dma hard fail EINVAL"); 1846 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1847 NULL, xname, "Driver tx dma hard fail other"); 1848 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1849 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1850 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1851 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1852 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1853 NULL, xname, "Watchdog timeouts"); 1854 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1855 NULL, xname, "TSO errors"); 1856 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1857 NULL, xname, "Admin MSI-X IRQ Handled"); 1858 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1859 NULL, xname, "Link event"); 1860 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1861 NULL, xname, "SFP+ module event"); 1862 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1863 NULL, xname, "Multispeed event"); 1864 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1865 NULL, xname, "External PHY event"); 1866 1867 /* Max number of traffic class is 8 */ 1868 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1869 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1870 snprintf(sc->tcs[i].evnamebuf, 1871 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1872 if (i < __arraycount(stats->mpc)) { 1873 evcnt_attach_dynamic(&stats->mpc[i], 1874 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1875 "RX Missed Packet Count"); 1876 if (hw->mac.type == ixgbe_mac_82598EB) 1877 evcnt_attach_dynamic(&stats->rnbc[i], 1878 EVCNT_TYPE_MISC, NULL, 1879 sc->tcs[i].evnamebuf, 1880 "Receive No Buffers"); 1881 } 1882 if (i < __arraycount(stats->pxontxc)) { 1883 evcnt_attach_dynamic(&stats->pxontxc[i], 1884 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1885 "Priority XON Transmitted"); 1886 evcnt_attach_dynamic(&stats->pxofftxc[i], 1887 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1888 "Priority XOFF Transmitted"); 1889 if (hw->mac.type >= ixgbe_mac_82599EB) 1890 evcnt_attach_dynamic(&stats->pxon2offc[i], 1891 EVCNT_TYPE_MISC, NULL, 1892 sc->tcs[i].evnamebuf, 1893 "Priority XON to XOFF"); 1894 evcnt_attach_dynamic(&stats->pxonrxc[i], 1895 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1896 "Priority XON Received"); 1897 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1898 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1899 "Priority XOFF Received"); 1900 } 1901 } 1902 1903 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1904 #ifdef LRO 1905 struct lro_ctrl *lro = &rxr->lro; 1906 #endif 1907 1908 snprintf(sc->queues[i].evnamebuf, 1909 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1910 snprintf(sc->queues[i].namebuf, 1911 sizeof(sc->queues[i].namebuf), "q%d", i); 1912 1913 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1914 aprint_error_dev(dev, 1915 "could not create sysctl root\n"); 1916 break; 1917 } 1918 1919 if (sysctl_createv(log, 0, &rnode, &rnode, 1920 0, CTLTYPE_NODE, 1921 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1922 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1923 break; 1924 1925 if (sysctl_createv(log, 0, &rnode, &cnode, 1926 CTLFLAG_READWRITE, CTLTYPE_INT, 1927 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1928 ixgbe_sysctl_interrupt_rate_handler, 0, 1929 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1930 break; 1931 1932 if (sysctl_createv(log, 0, &rnode, &cnode, 1933 CTLFLAG_READONLY, CTLTYPE_INT, 1934 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1935 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1936 0, CTL_CREATE, CTL_EOL) != 0) 1937 break; 1938 1939 if (sysctl_createv(log, 0, &rnode, &cnode, 1940 CTLFLAG_READONLY, CTLTYPE_INT, 1941 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1942 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1943 0, CTL_CREATE, CTL_EOL) != 0) 1944 break; 1945 1946 if (sysctl_createv(log, 0, &rnode, &cnode, 1947 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1948 SYSCTL_DESCR("Receive Descriptor next to check"), 1949 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1950 CTL_CREATE, CTL_EOL) != 0) 1951 break; 1952 1953 if (sysctl_createv(log, 0, &rnode, &cnode, 1954 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1955 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1956 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1957 CTL_CREATE, CTL_EOL) != 0) 1958 break; 1959 1960 if (sysctl_createv(log, 0, &rnode, &cnode, 1961 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1962 SYSCTL_DESCR("Receive Descriptor Head"), 1963 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1964 CTL_CREATE, CTL_EOL) != 0) 1965 break; 1966 1967 if (sysctl_createv(log, 0, &rnode, &cnode, 1968 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1969 SYSCTL_DESCR("Receive Descriptor Tail"), 1970 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1971 CTL_CREATE, CTL_EOL) != 0) 1972 break; 1973 1974 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1975 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1976 evcnt_attach_dynamic(&sc->queues[i].handleq, 1977 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1978 "Handled queue in softint"); 1979 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1980 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1981 if (i < __arraycount(stats->qbtc)) 1982 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1983 NULL, sc->queues[i].evnamebuf, 1984 "Queue Bytes Transmitted (reg)"); 1985 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1986 NULL, sc->queues[i].evnamebuf, 1987 "Queue Packets Transmitted (soft)"); 1988 if (i < __arraycount(stats->qptc)) 1989 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1990 NULL, sc->queues[i].evnamebuf, 1991 "Queue Packets Transmitted (reg)"); 1992 #ifndef IXGBE_LEGACY_TX 1993 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1994 NULL, sc->queues[i].evnamebuf, 1995 "Packets dropped in pcq"); 1996 #endif 1997 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1998 NULL, sc->queues[i].evnamebuf, 1999 "TX Queue No Descriptor Available"); 2000 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 2001 NULL, sc->queues[i].evnamebuf, "TSO"); 2002 2003 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 2004 NULL, sc->queues[i].evnamebuf, 2005 "Queue Bytes Received (soft)"); 2006 if (i < __arraycount(stats->qbrc)) 2007 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 2008 NULL, sc->queues[i].evnamebuf, 2009 "Queue Bytes Received (reg)"); 2010 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 2011 NULL, sc->queues[i].evnamebuf, 2012 "Queue Packets Received (soft)"); 2013 if (i < __arraycount(stats->qprc)) 2014 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 2015 NULL, sc->queues[i].evnamebuf, 2016 "Queue Packets Received (reg)"); 2017 if ((i < __arraycount(stats->qprdc)) && 2018 (hw->mac.type >= ixgbe_mac_82599EB)) 2019 evcnt_attach_dynamic(&stats->qprdc[i], 2020 EVCNT_TYPE_MISC, NULL, 2021 sc->queues[i].evnamebuf, 2022 "Queue Packets Received Drop"); 2023 2024 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2025 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2026 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2027 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2028 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2029 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2030 #ifdef LRO 2031 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2032 CTLFLAG_RD, &lro->lro_queued, 0, 2033 "LRO Queued"); 2034 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2035 CTLFLAG_RD, &lro->lro_flushed, 0, 2036 "LRO Flushed"); 2037 #endif /* LRO */ 2038 } 2039 2040 /* MAC stats get their own sub node */ 2041 2042 snprintf(stats->namebuf, 2043 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2044 2045 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2046 stats->namebuf, "rx csum offload - IP"); 2047 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2048 stats->namebuf, "rx csum offload - L4"); 2049 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2050 stats->namebuf, "rx csum offload - IP bad"); 2051 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2052 stats->namebuf, "rx csum offload - L4 bad"); 2053 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2054 stats->namebuf, "Interrupt conditions zero"); 2055 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2056 stats->namebuf, "Legacy interrupts"); 2057 2058 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2059 stats->namebuf, "CRC Errors"); 2060 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2061 stats->namebuf, "Illegal Byte Errors"); 2062 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2063 stats->namebuf, "Byte Errors"); 2064 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2065 stats->namebuf, "MAC Short Packets Discarded"); 2066 if (hw->mac.type >= ixgbe_mac_X550) 2067 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2068 stats->namebuf, "Bad SFD"); 2069 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2070 stats->namebuf, "Total Packets Missed"); 2071 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2072 stats->namebuf, "MAC Local Faults"); 2073 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2074 stats->namebuf, "MAC Remote Faults"); 2075 if (hw->mac.type == ixgbe_mac_X550EM_a) 2076 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2077 NULL, stats->namebuf, "Link down event in the MAC"); 2078 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2079 stats->namebuf, "Receive Length Errors"); 2080 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2081 stats->namebuf, "Link XON Transmitted"); 2082 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2083 stats->namebuf, "Link XOFF Transmitted"); 2084 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2085 stats->namebuf, "Link XON Received"); 2086 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2087 stats->namebuf, "Link XOFF Received"); 2088 2089 /* Packet Reception Stats */ 2090 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2091 stats->namebuf, "Total Octets Received"); 2092 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2093 stats->namebuf, "Good Octets Received"); 2094 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2095 stats->namebuf, "Total Packets Received"); 2096 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2097 stats->namebuf, "Good Packets Received"); 2098 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2099 stats->namebuf, "Multicast Packets Received"); 2100 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2101 stats->namebuf, "Broadcast Packets Received"); 2102 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2103 stats->namebuf, "64 byte frames received "); 2104 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2105 stats->namebuf, "65-127 byte frames received"); 2106 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2107 stats->namebuf, "128-255 byte frames received"); 2108 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2109 stats->namebuf, "256-511 byte frames received"); 2110 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2111 stats->namebuf, "512-1023 byte frames received"); 2112 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2113 stats->namebuf, "1023-1522 byte frames received"); 2114 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2115 stats->namebuf, "Receive Undersized"); 2116 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2117 stats->namebuf, "Fragmented Packets Received "); 2118 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2119 stats->namebuf, "Oversized Packets Received"); 2120 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2121 stats->namebuf, "Received Jabber"); 2122 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2123 stats->namebuf, "Management Packets Received"); 2124 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2125 stats->namebuf, "Management Packets Dropped"); 2126 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2127 stats->namebuf, "Checksum Errors"); 2128 2129 /* Packet Transmission Stats */ 2130 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2131 stats->namebuf, "Good Octets Transmitted"); 2132 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2133 stats->namebuf, "Total Packets Transmitted"); 2134 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2135 stats->namebuf, "Good Packets Transmitted"); 2136 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2137 stats->namebuf, "Broadcast Packets Transmitted"); 2138 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2139 stats->namebuf, "Multicast Packets Transmitted"); 2140 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2141 stats->namebuf, "Management Packets Transmitted"); 2142 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2143 stats->namebuf, "64 byte frames transmitted "); 2144 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2145 stats->namebuf, "65-127 byte frames transmitted"); 2146 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2147 stats->namebuf, "128-255 byte frames transmitted"); 2148 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2149 stats->namebuf, "256-511 byte frames transmitted"); 2150 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2151 stats->namebuf, "512-1023 byte frames transmitted"); 2152 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2153 stats->namebuf, "1024-1522 byte frames transmitted"); 2154 } /* ixgbe_add_hw_stats */ 2155 2156 static void 2157 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2158 { 2159 struct tx_ring *txr = sc->tx_rings; 2160 struct rx_ring *rxr = sc->rx_rings; 2161 struct ixgbe_hw *hw = &sc->hw; 2162 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2163 int i; 2164 2165 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2166 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2167 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2168 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2169 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2170 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2171 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2172 IXGBE_EVC_STORE(&sc->tso_err, 0); 2173 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2174 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2175 IXGBE_EVC_STORE(&sc->link_workev, 0); 2176 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2177 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2178 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2179 2180 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2181 if (i < __arraycount(stats->mpc)) { 2182 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2183 if (hw->mac.type == ixgbe_mac_82598EB) 2184 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2185 } 2186 if (i < __arraycount(stats->pxontxc)) { 2187 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2188 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2189 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2190 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2191 if (hw->mac.type >= ixgbe_mac_82599EB) 2192 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2193 } 2194 } 2195 2196 txr = sc->tx_rings; 2197 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2198 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2199 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2200 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2201 IXGBE_EVC_STORE(&txr->total_packets, 0); 2202 #ifndef IXGBE_LEGACY_TX 2203 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2204 #endif 2205 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2206 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2207 txr->q_efbig_tx_dma_setup = 0; 2208 txr->q_mbuf_defrag_failed = 0; 2209 txr->q_efbig2_tx_dma_setup = 0; 2210 txr->q_einval_tx_dma_setup = 0; 2211 txr->q_other_tx_dma_setup = 0; 2212 txr->q_eagain_tx_dma_setup = 0; 2213 txr->q_enomem_tx_dma_setup = 0; 2214 txr->q_tso_err = 0; 2215 2216 if (i < __arraycount(stats->qprc)) { 2217 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2218 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2219 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2220 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2221 if (hw->mac.type >= ixgbe_mac_82599EB) 2222 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2223 } 2224 2225 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2226 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2227 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2228 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2229 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2230 } 2231 IXGBE_EVC_STORE(&stats->ipcs, 0); 2232 IXGBE_EVC_STORE(&stats->l4cs, 0); 2233 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2234 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2235 IXGBE_EVC_STORE(&stats->intzero, 0); 2236 IXGBE_EVC_STORE(&stats->legint, 0); 2237 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2238 IXGBE_EVC_STORE(&stats->illerrc, 0); 2239 IXGBE_EVC_STORE(&stats->errbc, 0); 2240 IXGBE_EVC_STORE(&stats->mspdc, 0); 2241 if (hw->mac.type >= ixgbe_mac_X550) 2242 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2243 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2244 IXGBE_EVC_STORE(&stats->mlfc, 0); 2245 IXGBE_EVC_STORE(&stats->mrfc, 0); 2246 if (hw->mac.type == ixgbe_mac_X550EM_a) 2247 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2248 IXGBE_EVC_STORE(&stats->rlec, 0); 2249 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2250 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2251 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2252 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2253 2254 /* Packet Reception Stats */ 2255 IXGBE_EVC_STORE(&stats->tor, 0); 2256 IXGBE_EVC_STORE(&stats->gorc, 0); 2257 IXGBE_EVC_STORE(&stats->tpr, 0); 2258 IXGBE_EVC_STORE(&stats->gprc, 0); 2259 IXGBE_EVC_STORE(&stats->mprc, 0); 2260 IXGBE_EVC_STORE(&stats->bprc, 0); 2261 IXGBE_EVC_STORE(&stats->prc64, 0); 2262 IXGBE_EVC_STORE(&stats->prc127, 0); 2263 IXGBE_EVC_STORE(&stats->prc255, 0); 2264 IXGBE_EVC_STORE(&stats->prc511, 0); 2265 IXGBE_EVC_STORE(&stats->prc1023, 0); 2266 IXGBE_EVC_STORE(&stats->prc1522, 0); 2267 IXGBE_EVC_STORE(&stats->ruc, 0); 2268 IXGBE_EVC_STORE(&stats->rfc, 0); 2269 IXGBE_EVC_STORE(&stats->roc, 0); 2270 IXGBE_EVC_STORE(&stats->rjc, 0); 2271 IXGBE_EVC_STORE(&stats->mngprc, 0); 2272 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2273 IXGBE_EVC_STORE(&stats->xec, 0); 2274 2275 /* Packet Transmission Stats */ 2276 IXGBE_EVC_STORE(&stats->gotc, 0); 2277 IXGBE_EVC_STORE(&stats->tpt, 0); 2278 IXGBE_EVC_STORE(&stats->gptc, 0); 2279 IXGBE_EVC_STORE(&stats->bptc, 0); 2280 IXGBE_EVC_STORE(&stats->mptc, 0); 2281 IXGBE_EVC_STORE(&stats->mngptc, 0); 2282 IXGBE_EVC_STORE(&stats->ptc64, 0); 2283 IXGBE_EVC_STORE(&stats->ptc127, 0); 2284 IXGBE_EVC_STORE(&stats->ptc255, 0); 2285 IXGBE_EVC_STORE(&stats->ptc511, 0); 2286 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2287 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2288 } 2289 2290 /************************************************************************ 2291 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2292 * 2293 * Retrieves the TDH value from the hardware 2294 ************************************************************************/ 2295 static int 2296 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2297 { 2298 struct sysctlnode node = *rnode; 2299 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2300 struct ixgbe_softc *sc; 2301 uint32_t val; 2302 2303 if (!txr) 2304 return (0); 2305 2306 sc = txr->sc; 2307 if (ixgbe_fw_recovery_mode_swflag(sc)) 2308 return (EPERM); 2309 2310 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2311 node.sysctl_data = &val; 2312 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2313 } /* ixgbe_sysctl_tdh_handler */ 2314 2315 /************************************************************************ 2316 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2317 * 2318 * Retrieves the TDT value from the hardware 2319 ************************************************************************/ 2320 static int 2321 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2322 { 2323 struct sysctlnode node = *rnode; 2324 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2325 struct ixgbe_softc *sc; 2326 uint32_t val; 2327 2328 if (!txr) 2329 return (0); 2330 2331 sc = txr->sc; 2332 if (ixgbe_fw_recovery_mode_swflag(sc)) 2333 return (EPERM); 2334 2335 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2336 node.sysctl_data = &val; 2337 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2338 } /* ixgbe_sysctl_tdt_handler */ 2339 2340 /************************************************************************ 2341 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2342 * handler function 2343 * 2344 * Retrieves the next_to_check value 2345 ************************************************************************/ 2346 static int 2347 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2348 { 2349 struct sysctlnode node = *rnode; 2350 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2351 struct ixgbe_softc *sc; 2352 uint32_t val; 2353 2354 if (!rxr) 2355 return (0); 2356 2357 sc = rxr->sc; 2358 if (ixgbe_fw_recovery_mode_swflag(sc)) 2359 return (EPERM); 2360 2361 val = rxr->next_to_check; 2362 node.sysctl_data = &val; 2363 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2364 } /* ixgbe_sysctl_next_to_check_handler */ 2365 2366 /************************************************************************ 2367 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2368 * handler function 2369 * 2370 * Retrieves the next_to_refresh value 2371 ************************************************************************/ 2372 static int 2373 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2374 { 2375 struct sysctlnode node = *rnode; 2376 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2377 struct ixgbe_softc *sc; 2378 uint32_t val; 2379 2380 if (!rxr) 2381 return (0); 2382 2383 sc = rxr->sc; 2384 if (ixgbe_fw_recovery_mode_swflag(sc)) 2385 return (EPERM); 2386 2387 val = rxr->next_to_refresh; 2388 node.sysctl_data = &val; 2389 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2390 } /* ixgbe_sysctl_next_to_refresh_handler */ 2391 2392 /************************************************************************ 2393 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2394 * 2395 * Retrieves the RDH value from the hardware 2396 ************************************************************************/ 2397 static int 2398 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2399 { 2400 struct sysctlnode node = *rnode; 2401 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2402 struct ixgbe_softc *sc; 2403 uint32_t val; 2404 2405 if (!rxr) 2406 return (0); 2407 2408 sc = rxr->sc; 2409 if (ixgbe_fw_recovery_mode_swflag(sc)) 2410 return (EPERM); 2411 2412 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2413 node.sysctl_data = &val; 2414 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2415 } /* ixgbe_sysctl_rdh_handler */ 2416 2417 /************************************************************************ 2418 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2419 * 2420 * Retrieves the RDT value from the hardware 2421 ************************************************************************/ 2422 static int 2423 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2424 { 2425 struct sysctlnode node = *rnode; 2426 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2427 struct ixgbe_softc *sc; 2428 uint32_t val; 2429 2430 if (!rxr) 2431 return (0); 2432 2433 sc = rxr->sc; 2434 if (ixgbe_fw_recovery_mode_swflag(sc)) 2435 return (EPERM); 2436 2437 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2438 node.sysctl_data = &val; 2439 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2440 } /* ixgbe_sysctl_rdt_handler */ 2441 2442 static int 2443 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2444 { 2445 struct ifnet *ifp = &ec->ec_if; 2446 struct ixgbe_softc *sc = ifp->if_softc; 2447 int rv; 2448 2449 if (set) 2450 rv = ixgbe_register_vlan(sc, vid); 2451 else 2452 rv = ixgbe_unregister_vlan(sc, vid); 2453 2454 if (rv != 0) 2455 return rv; 2456 2457 /* 2458 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2459 * or 0 to 1. 2460 */ 2461 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2462 ixgbe_setup_vlan_hw_tagging(sc); 2463 2464 return rv; 2465 } 2466 2467 /************************************************************************ 2468 * ixgbe_register_vlan 2469 * 2470 * Run via vlan config EVENT, it enables us to use the 2471 * HW Filter table since we can get the vlan id. This 2472 * just creates the entry in the soft version of the 2473 * VFTA, init will repopulate the real table. 2474 ************************************************************************/ 2475 static int 2476 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2477 { 2478 u16 index, bit; 2479 int error; 2480 2481 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2482 return EINVAL; 2483 2484 IXGBE_CORE_LOCK(sc); 2485 index = (vtag >> 5) & 0x7F; 2486 bit = vtag & 0x1F; 2487 sc->shadow_vfta[index] |= ((u32)1 << bit); 2488 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2489 true); 2490 IXGBE_CORE_UNLOCK(sc); 2491 if (error != 0) 2492 error = EACCES; 2493 2494 return error; 2495 } /* ixgbe_register_vlan */ 2496 2497 /************************************************************************ 2498 * ixgbe_unregister_vlan 2499 * 2500 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2501 ************************************************************************/ 2502 static int 2503 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2504 { 2505 u16 index, bit; 2506 int error; 2507 2508 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2509 return EINVAL; 2510 2511 IXGBE_CORE_LOCK(sc); 2512 index = (vtag >> 5) & 0x7F; 2513 bit = vtag & 0x1F; 2514 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2515 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2516 true); 2517 IXGBE_CORE_UNLOCK(sc); 2518 if (error != 0) 2519 error = EACCES; 2520 2521 return error; 2522 } /* ixgbe_unregister_vlan */ 2523 2524 static void 2525 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2526 { 2527 struct ethercom *ec = &sc->osdep.ec; 2528 struct ixgbe_hw *hw = &sc->hw; 2529 struct rx_ring *rxr; 2530 u32 ctrl; 2531 int i; 2532 bool hwtagging; 2533 2534 /* Enable HW tagging only if any vlan is attached */ 2535 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2536 && VLAN_ATTACHED(ec); 2537 2538 /* Setup the queues for vlans */ 2539 for (i = 0; i < sc->num_queues; i++) { 2540 rxr = &sc->rx_rings[i]; 2541 /* 2542 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2543 */ 2544 if (hw->mac.type != ixgbe_mac_82598EB) { 2545 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2546 if (hwtagging) 2547 ctrl |= IXGBE_RXDCTL_VME; 2548 else 2549 ctrl &= ~IXGBE_RXDCTL_VME; 2550 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2551 } 2552 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2553 } 2554 2555 /* VLAN hw tagging for 82598 */ 2556 if (hw->mac.type == ixgbe_mac_82598EB) { 2557 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2558 if (hwtagging) 2559 ctrl |= IXGBE_VLNCTRL_VME; 2560 else 2561 ctrl &= ~IXGBE_VLNCTRL_VME; 2562 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2563 } 2564 } /* ixgbe_setup_vlan_hw_tagging */ 2565 2566 static void 2567 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2568 { 2569 struct ethercom *ec = &sc->osdep.ec; 2570 struct ixgbe_hw *hw = &sc->hw; 2571 int i; 2572 u32 ctrl; 2573 struct vlanid_list *vlanidp; 2574 2575 /* 2576 * This function is called from both if_init and ifflags_cb() 2577 * on NetBSD. 2578 */ 2579 2580 /* 2581 * Part 1: 2582 * Setup VLAN HW tagging 2583 */ 2584 ixgbe_setup_vlan_hw_tagging(sc); 2585 2586 /* 2587 * Part 2: 2588 * Setup VLAN HW filter 2589 */ 2590 /* Cleanup shadow_vfta */ 2591 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2592 sc->shadow_vfta[i] = 0; 2593 /* Generate shadow_vfta from ec_vids */ 2594 ETHER_LOCK(ec); 2595 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2596 uint32_t idx; 2597 2598 idx = vlanidp->vid / 32; 2599 KASSERT(idx < IXGBE_VFTA_SIZE); 2600 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2601 } 2602 ETHER_UNLOCK(ec); 2603 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2604 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2605 2606 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2607 /* Enable the Filter Table if enabled */ 2608 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2609 ctrl |= IXGBE_VLNCTRL_VFE; 2610 else 2611 ctrl &= ~IXGBE_VLNCTRL_VFE; 2612 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2613 } /* ixgbe_setup_vlan_hw_support */ 2614 2615 /************************************************************************ 2616 * ixgbe_get_slot_info 2617 * 2618 * Get the width and transaction speed of 2619 * the slot this adapter is plugged into. 2620 ************************************************************************/ 2621 static void 2622 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2623 { 2624 device_t dev = sc->dev; 2625 struct ixgbe_hw *hw = &sc->hw; 2626 u32 offset; 2627 u16 link; 2628 int bus_info_valid = TRUE; 2629 2630 /* Some devices are behind an internal bridge */ 2631 switch (hw->device_id) { 2632 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2633 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2634 goto get_parent_info; 2635 default: 2636 break; 2637 } 2638 2639 ixgbe_get_bus_info(hw); 2640 2641 /* 2642 * Some devices don't use PCI-E, but there is no need 2643 * to display "Unknown" for bus speed and width. 2644 */ 2645 switch (hw->mac.type) { 2646 case ixgbe_mac_X550EM_x: 2647 case ixgbe_mac_X550EM_a: 2648 return; 2649 default: 2650 goto display; 2651 } 2652 2653 get_parent_info: 2654 /* 2655 * For the Quad port adapter we need to parse back 2656 * up the PCI tree to find the speed of the expansion 2657 * slot into which this adapter is plugged. A bit more work. 2658 */ 2659 dev = device_parent(device_parent(dev)); 2660 #if 0 2661 #ifdef IXGBE_DEBUG 2662 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2663 pci_get_slot(dev), pci_get_function(dev)); 2664 #endif 2665 dev = device_parent(device_parent(dev)); 2666 #ifdef IXGBE_DEBUG 2667 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2668 pci_get_slot(dev), pci_get_function(dev)); 2669 #endif 2670 #endif 2671 /* Now get the PCI Express Capabilities offset */ 2672 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2673 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2674 /* 2675 * Hmm...can't get PCI-Express capabilities. 2676 * Falling back to default method. 2677 */ 2678 bus_info_valid = FALSE; 2679 ixgbe_get_bus_info(hw); 2680 goto display; 2681 } 2682 /* ...and read the Link Status Register */ 2683 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2684 offset + PCIE_LCSR) >> 16; 2685 ixgbe_set_pci_config_data_generic(hw, link); 2686 2687 display: 2688 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2689 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2690 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2691 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2692 "Unknown"), 2693 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2694 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2695 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2696 "Unknown")); 2697 2698 if (bus_info_valid) { 2699 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2700 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2701 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2702 device_printf(dev, "PCI-Express bandwidth available" 2703 " for this card\n is not sufficient for" 2704 " optimal performance.\n"); 2705 device_printf(dev, "For optimal performance a x8 " 2706 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2707 } 2708 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2709 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2710 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2711 device_printf(dev, "PCI-Express bandwidth available" 2712 " for this card\n is not sufficient for" 2713 " optimal performance.\n"); 2714 device_printf(dev, "For optimal performance a x8 " 2715 "PCIE Gen3 slot is required.\n"); 2716 } 2717 } else 2718 device_printf(dev, 2719 "Unable to determine slot speed/width. The speed/width " 2720 "reported are that of the internal switch.\n"); 2721 2722 return; 2723 } /* ixgbe_get_slot_info */ 2724 2725 /************************************************************************ 2726 * ixgbe_enable_queue - Queue Interrupt Enabler 2727 ************************************************************************/ 2728 static inline void 2729 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2730 { 2731 struct ixgbe_hw *hw = &sc->hw; 2732 struct ix_queue *que = &sc->queues[vector]; 2733 u64 queue = 1ULL << vector; 2734 u32 mask; 2735 2736 mutex_enter(&que->dc_mtx); 2737 if (que->disabled_count > 0 && --que->disabled_count > 0) 2738 goto out; 2739 2740 if (hw->mac.type == ixgbe_mac_82598EB) { 2741 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2742 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2743 } else { 2744 mask = (queue & 0xFFFFFFFF); 2745 if (mask) 2746 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2747 mask = (queue >> 32); 2748 if (mask) 2749 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2750 } 2751 out: 2752 mutex_exit(&que->dc_mtx); 2753 } /* ixgbe_enable_queue */ 2754 2755 /************************************************************************ 2756 * ixgbe_disable_queue_internal 2757 ************************************************************************/ 2758 static inline void 2759 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2760 { 2761 struct ixgbe_hw *hw = &sc->hw; 2762 struct ix_queue *que = &sc->queues[vector]; 2763 u64 queue = 1ULL << vector; 2764 u32 mask; 2765 2766 mutex_enter(&que->dc_mtx); 2767 2768 if (que->disabled_count > 0) { 2769 if (nestok) 2770 que->disabled_count++; 2771 goto out; 2772 } 2773 que->disabled_count++; 2774 2775 if (hw->mac.type == ixgbe_mac_82598EB) { 2776 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2777 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2778 } else { 2779 mask = (queue & 0xFFFFFFFF); 2780 if (mask) 2781 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2782 mask = (queue >> 32); 2783 if (mask) 2784 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2785 } 2786 out: 2787 mutex_exit(&que->dc_mtx); 2788 } /* ixgbe_disable_queue_internal */ 2789 2790 /************************************************************************ 2791 * ixgbe_disable_queue 2792 ************************************************************************/ 2793 static inline void 2794 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2795 { 2796 2797 ixgbe_disable_queue_internal(sc, vector, true); 2798 } /* ixgbe_disable_queue */ 2799 2800 /************************************************************************ 2801 * ixgbe_sched_handle_que - schedule deferred packet processing 2802 ************************************************************************/ 2803 static inline void 2804 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2805 { 2806 2807 if (que->txrx_use_workqueue) { 2808 /* 2809 * sc->que_wq is bound to each CPU instead of 2810 * each NIC queue to reduce workqueue kthread. As we 2811 * should consider about interrupt affinity in this 2812 * function, the workqueue kthread must be WQ_PERCPU. 2813 * If create WQ_PERCPU workqueue kthread for each NIC 2814 * queue, that number of created workqueue kthread is 2815 * (number of used NIC queue) * (number of CPUs) = 2816 * (number of CPUs) ^ 2 most often. 2817 * 2818 * The same NIC queue's interrupts are avoided by 2819 * masking the queue's interrupt. And different 2820 * NIC queue's interrupts use different struct work 2821 * (que->wq_cookie). So, "enqueued flag" to avoid 2822 * twice workqueue_enqueue() is not required . 2823 */ 2824 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2825 } else 2826 softint_schedule(que->que_si); 2827 } 2828 2829 /************************************************************************ 2830 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2831 ************************************************************************/ 2832 static int 2833 ixgbe_msix_que(void *arg) 2834 { 2835 struct ix_queue *que = arg; 2836 struct ixgbe_softc *sc = que->sc; 2837 struct ifnet *ifp = sc->ifp; 2838 struct tx_ring *txr = que->txr; 2839 struct rx_ring *rxr = que->rxr; 2840 u32 newitr = 0; 2841 2842 /* Protect against spurious interrupts */ 2843 if ((ifp->if_flags & IFF_RUNNING) == 0) 2844 return 0; 2845 2846 ixgbe_disable_queue(sc, que->msix); 2847 IXGBE_EVC_ADD(&que->irqs, 1); 2848 2849 /* 2850 * Don't change "que->txrx_use_workqueue" from this point to avoid 2851 * flip-flopping softint/workqueue mode in one deferred processing. 2852 */ 2853 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2854 2855 IXGBE_TX_LOCK(txr); 2856 ixgbe_txeof(txr); 2857 IXGBE_TX_UNLOCK(txr); 2858 2859 /* Do AIM now? */ 2860 2861 if (sc->enable_aim == false) 2862 goto no_calc; 2863 /* 2864 * Do Adaptive Interrupt Moderation: 2865 * - Write out last calculated setting 2866 * - Calculate based on average size over 2867 * the last interval. 2868 */ 2869 if (que->eitr_setting) 2870 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2871 2872 que->eitr_setting = 0; 2873 2874 /* Idle, do nothing */ 2875 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2876 goto no_calc; 2877 2878 if ((txr->bytes) && (txr->packets)) 2879 newitr = txr->bytes/txr->packets; 2880 if ((rxr->bytes) && (rxr->packets)) 2881 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2882 newitr += 24; /* account for hardware frame, crc */ 2883 2884 /* set an upper boundary */ 2885 newitr = uimin(newitr, 3000); 2886 2887 /* Be nice to the mid range */ 2888 if ((newitr > 300) && (newitr < 1200)) 2889 newitr = (newitr / 3); 2890 else 2891 newitr = (newitr / 2); 2892 2893 /* 2894 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2895 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2896 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2897 * on 1G and higher. 2898 */ 2899 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2900 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2901 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2902 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2903 2904 /* save for next interrupt */ 2905 que->eitr_setting = newitr; 2906 2907 /* Reset state */ 2908 txr->bytes = 0; 2909 txr->packets = 0; 2910 rxr->bytes = 0; 2911 rxr->packets = 0; 2912 2913 no_calc: 2914 ixgbe_sched_handle_que(sc, que); 2915 2916 return 1; 2917 } /* ixgbe_msix_que */ 2918 2919 /************************************************************************ 2920 * ixgbe_media_status - Media Ioctl callback 2921 * 2922 * Called whenever the user queries the status of 2923 * the interface using ifconfig. 2924 ************************************************************************/ 2925 static void 2926 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2927 { 2928 struct ixgbe_softc *sc = ifp->if_softc; 2929 struct ixgbe_hw *hw = &sc->hw; 2930 int layer; 2931 2932 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2933 ixgbe_update_link_status(sc); 2934 2935 ifmr->ifm_status = IFM_AVALID; 2936 ifmr->ifm_active = IFM_ETHER; 2937 2938 if (sc->link_active != LINK_STATE_UP) { 2939 ifmr->ifm_active |= IFM_NONE; 2940 return; 2941 } 2942 2943 ifmr->ifm_status |= IFM_ACTIVE; 2944 layer = sc->phy_layer; 2945 2946 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2947 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2948 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2949 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2950 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2951 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2952 switch (sc->link_speed) { 2953 case IXGBE_LINK_SPEED_10GB_FULL: 2954 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2955 break; 2956 case IXGBE_LINK_SPEED_5GB_FULL: 2957 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2958 break; 2959 case IXGBE_LINK_SPEED_2_5GB_FULL: 2960 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2961 break; 2962 case IXGBE_LINK_SPEED_1GB_FULL: 2963 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2964 break; 2965 case IXGBE_LINK_SPEED_100_FULL: 2966 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2967 break; 2968 case IXGBE_LINK_SPEED_10_FULL: 2969 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2970 break; 2971 } 2972 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2973 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2974 switch (sc->link_speed) { 2975 case IXGBE_LINK_SPEED_10GB_FULL: 2976 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2977 break; 2978 } 2979 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2980 switch (sc->link_speed) { 2981 case IXGBE_LINK_SPEED_10GB_FULL: 2982 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2983 break; 2984 case IXGBE_LINK_SPEED_1GB_FULL: 2985 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2986 break; 2987 } 2988 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2989 switch (sc->link_speed) { 2990 case IXGBE_LINK_SPEED_10GB_FULL: 2991 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2992 break; 2993 case IXGBE_LINK_SPEED_1GB_FULL: 2994 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2995 break; 2996 } 2997 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2998 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2999 switch (sc->link_speed) { 3000 case IXGBE_LINK_SPEED_10GB_FULL: 3001 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 3002 break; 3003 case IXGBE_LINK_SPEED_1GB_FULL: 3004 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 3005 break; 3006 } 3007 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 3008 switch (sc->link_speed) { 3009 case IXGBE_LINK_SPEED_10GB_FULL: 3010 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3011 break; 3012 } 3013 /* 3014 * XXX: These need to use the proper media types once 3015 * they're added. 3016 */ 3017 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3018 switch (sc->link_speed) { 3019 case IXGBE_LINK_SPEED_10GB_FULL: 3020 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3021 break; 3022 case IXGBE_LINK_SPEED_2_5GB_FULL: 3023 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3024 break; 3025 case IXGBE_LINK_SPEED_1GB_FULL: 3026 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3027 break; 3028 } 3029 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3030 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3031 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3032 switch (sc->link_speed) { 3033 case IXGBE_LINK_SPEED_10GB_FULL: 3034 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3035 break; 3036 case IXGBE_LINK_SPEED_2_5GB_FULL: 3037 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3038 break; 3039 case IXGBE_LINK_SPEED_1GB_FULL: 3040 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3041 break; 3042 } 3043 3044 /* If nothing is recognized... */ 3045 #if 0 3046 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3047 ifmr->ifm_active |= IFM_UNKNOWN; 3048 #endif 3049 3050 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3051 3052 /* Display current flow control setting used on link */ 3053 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3054 hw->fc.current_mode == ixgbe_fc_full) 3055 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3056 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3057 hw->fc.current_mode == ixgbe_fc_full) 3058 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3059 3060 return; 3061 } /* ixgbe_media_status */ 3062 3063 /************************************************************************ 3064 * ixgbe_media_change - Media Ioctl callback 3065 * 3066 * Called when the user changes speed/duplex using 3067 * media/mediopt option with ifconfig. 3068 ************************************************************************/ 3069 static int 3070 ixgbe_media_change(struct ifnet *ifp) 3071 { 3072 struct ixgbe_softc *sc = ifp->if_softc; 3073 struct ifmedia *ifm = &sc->media; 3074 struct ixgbe_hw *hw = &sc->hw; 3075 ixgbe_link_speed speed = 0; 3076 ixgbe_link_speed link_caps = 0; 3077 bool negotiate = false; 3078 s32 err = IXGBE_NOT_IMPLEMENTED; 3079 3080 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3081 3082 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3083 return (EINVAL); 3084 3085 if (hw->phy.media_type == ixgbe_media_type_backplane) 3086 return (EPERM); 3087 3088 /* 3089 * We don't actually need to check against the supported 3090 * media types of the adapter; ifmedia will take care of 3091 * that for us. 3092 */ 3093 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3094 case IFM_AUTO: 3095 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3096 &negotiate); 3097 if (err != IXGBE_SUCCESS) { 3098 device_printf(sc->dev, "Unable to determine " 3099 "supported advertise speeds\n"); 3100 return (ENODEV); 3101 } 3102 speed |= link_caps; 3103 break; 3104 case IFM_10G_T: 3105 case IFM_10G_LRM: 3106 case IFM_10G_LR: 3107 case IFM_10G_TWINAX: 3108 case IFM_10G_SR: 3109 case IFM_10G_CX4: 3110 case IFM_10G_KR: 3111 case IFM_10G_KX4: 3112 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3113 break; 3114 case IFM_5000_T: 3115 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3116 break; 3117 case IFM_2500_T: 3118 case IFM_2500_KX: 3119 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3120 break; 3121 case IFM_1000_T: 3122 case IFM_1000_LX: 3123 case IFM_1000_SX: 3124 case IFM_1000_KX: 3125 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3126 break; 3127 case IFM_100_TX: 3128 speed |= IXGBE_LINK_SPEED_100_FULL; 3129 break; 3130 case IFM_10_T: 3131 speed |= IXGBE_LINK_SPEED_10_FULL; 3132 break; 3133 case IFM_NONE: 3134 break; 3135 default: 3136 goto invalid; 3137 } 3138 3139 hw->mac.autotry_restart = TRUE; 3140 hw->mac.ops.setup_link(hw, speed, TRUE); 3141 sc->advertise = 0; 3142 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3143 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3144 sc->advertise |= 1 << 2; 3145 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3146 sc->advertise |= 1 << 1; 3147 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3148 sc->advertise |= 1 << 0; 3149 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3150 sc->advertise |= 1 << 3; 3151 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3152 sc->advertise |= 1 << 4; 3153 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3154 sc->advertise |= 1 << 5; 3155 } 3156 3157 return (0); 3158 3159 invalid: 3160 device_printf(sc->dev, "Invalid media type!\n"); 3161 3162 return (EINVAL); 3163 } /* ixgbe_media_change */ 3164 3165 /************************************************************************ 3166 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3167 ************************************************************************/ 3168 static int 3169 ixgbe_msix_admin(void *arg) 3170 { 3171 struct ixgbe_softc *sc = arg; 3172 struct ixgbe_hw *hw = &sc->hw; 3173 u32 eicr; 3174 u32 eims_orig; 3175 u32 eims_disable = 0; 3176 3177 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3178 3179 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3180 /* Pause other interrupts */ 3181 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3182 3183 /* 3184 * First get the cause. 3185 * 3186 * The specifications of 82598, 82599, X540 and X550 say EICS register 3187 * is write only. However, Linux says it is a workaround for silicon 3188 * errata to read EICS instead of EICR to get interrupt cause. 3189 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3190 */ 3191 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3192 /* Be sure the queue bits are not cleared */ 3193 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3194 /* Clear all OTHER interrupts with write */ 3195 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3196 3197 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3198 3199 /* Re-enable some OTHER interrupts */ 3200 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3201 3202 return 1; 3203 } /* ixgbe_msix_admin */ 3204 3205 static void 3206 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3207 { 3208 struct ixgbe_hw *hw = &sc->hw; 3209 u32 task_requests = 0; 3210 s32 retval; 3211 3212 /* Link status change */ 3213 if (eicr & IXGBE_EICR_LSC) { 3214 task_requests |= IXGBE_REQUEST_TASK_LSC; 3215 *eims_disable |= IXGBE_EIMS_LSC; 3216 } 3217 3218 if (ixgbe_is_sfp(hw)) { 3219 u32 eicr_mask; 3220 3221 /* Pluggable optics-related interrupt */ 3222 if (hw->mac.type >= ixgbe_mac_X540) 3223 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3224 else 3225 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3226 3227 /* 3228 * An interrupt might not arrive when a module is inserted. 3229 * When an link status change interrupt occurred and the driver 3230 * still regard SFP as unplugged, issue the module softint 3231 * and then issue LSC interrupt. 3232 */ 3233 if ((eicr & eicr_mask) 3234 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3235 && (eicr & IXGBE_EICR_LSC))) { 3236 task_requests |= IXGBE_REQUEST_TASK_MOD; 3237 *eims_disable |= IXGBE_EIMS_LSC; 3238 } 3239 3240 if ((hw->mac.type == ixgbe_mac_82599EB) && 3241 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3242 task_requests |= IXGBE_REQUEST_TASK_MSF; 3243 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3244 } 3245 } 3246 3247 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3248 #ifdef IXGBE_FDIR 3249 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3250 (eicr & IXGBE_EICR_FLOW_DIR)) { 3251 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3252 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3253 /* Disable the interrupt */ 3254 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3255 } 3256 } 3257 #endif 3258 3259 if (eicr & IXGBE_EICR_ECC) { 3260 if (ratecheck(&sc->lasterr_time, 3261 &ixgbe_errlog_intrvl)) 3262 device_printf(sc->dev, 3263 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3264 } 3265 3266 /* Check for over temp condition */ 3267 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3268 switch (sc->hw.mac.type) { 3269 case ixgbe_mac_X550EM_a: 3270 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3271 break; 3272 retval = hw->phy.ops.check_overtemp(hw); 3273 if (retval != IXGBE_ERR_OVERTEMP) 3274 break; 3275 if (ratecheck(&sc->lasterr_time, 3276 &ixgbe_errlog_intrvl)) { 3277 device_printf(sc->dev, 3278 "CRITICAL: OVER TEMP!! " 3279 "PHY IS SHUT DOWN!!\n"); 3280 device_printf(sc->dev, 3281 "System shutdown required!\n"); 3282 } 3283 break; 3284 default: 3285 if (!(eicr & IXGBE_EICR_TS)) 3286 break; 3287 retval = hw->phy.ops.check_overtemp(hw); 3288 if (retval != IXGBE_ERR_OVERTEMP) 3289 break; 3290 if (ratecheck(&sc->lasterr_time, 3291 &ixgbe_errlog_intrvl)) { 3292 device_printf(sc->dev, 3293 "CRITICAL: OVER TEMP!! " 3294 "PHY IS SHUT DOWN!!\n"); 3295 device_printf(sc->dev, 3296 "System shutdown required!\n"); 3297 } 3298 break; 3299 } 3300 } 3301 3302 /* Check for VF message */ 3303 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3304 (eicr & IXGBE_EICR_MAILBOX)) { 3305 task_requests |= IXGBE_REQUEST_TASK_MBX; 3306 *eims_disable |= IXGBE_EIMS_MAILBOX; 3307 } 3308 } 3309 3310 /* Check for fan failure */ 3311 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3312 ixgbe_check_fan_failure(sc, eicr, true); 3313 3314 /* External PHY interrupt */ 3315 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3316 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3317 task_requests |= IXGBE_REQUEST_TASK_PHY; 3318 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3319 } 3320 3321 if (task_requests != 0) { 3322 mutex_enter(&sc->admin_mtx); 3323 sc->task_requests |= task_requests; 3324 ixgbe_schedule_admin_tasklet(sc); 3325 mutex_exit(&sc->admin_mtx); 3326 } 3327 } 3328 3329 static void 3330 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3331 { 3332 3333 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3334 itr |= itr << 16; 3335 else 3336 itr |= IXGBE_EITR_CNT_WDIS; 3337 3338 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3339 } 3340 3341 3342 /************************************************************************ 3343 * ixgbe_sysctl_interrupt_rate_handler 3344 ************************************************************************/ 3345 static int 3346 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3347 { 3348 struct sysctlnode node = *rnode; 3349 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3350 struct ixgbe_softc *sc; 3351 uint32_t reg, usec, rate; 3352 int error; 3353 3354 if (que == NULL) 3355 return 0; 3356 3357 sc = que->sc; 3358 if (ixgbe_fw_recovery_mode_swflag(sc)) 3359 return (EPERM); 3360 3361 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3362 usec = ((reg & 0x0FF8) >> 3); 3363 if (usec > 0) 3364 rate = 500000 / usec; 3365 else 3366 rate = 0; 3367 node.sysctl_data = &rate; 3368 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3369 if (error || newp == NULL) 3370 return error; 3371 reg &= ~0xfff; /* default, no limitation */ 3372 if (rate > 0 && rate < 500000) { 3373 if (rate < 1000) 3374 rate = 1000; 3375 reg |= ((4000000 / rate) & 0xff8); 3376 /* 3377 * When RSC is used, ITR interval must be larger than 3378 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3379 * The minimum value is always greater than 2us on 100M 3380 * (and 10M?(not documented)), but it's not on 1G and higher. 3381 */ 3382 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3383 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3384 if ((sc->num_queues > 1) 3385 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3386 return EINVAL; 3387 } 3388 sc->max_interrupt_rate = rate; 3389 } else 3390 sc->max_interrupt_rate = 0; 3391 ixgbe_eitr_write(sc, que->msix, reg); 3392 3393 return (0); 3394 } /* ixgbe_sysctl_interrupt_rate_handler */ 3395 3396 const struct sysctlnode * 3397 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3398 { 3399 const char *dvname; 3400 struct sysctllog **log; 3401 int rc; 3402 const struct sysctlnode *rnode; 3403 3404 if (sc->sysctltop != NULL) 3405 return sc->sysctltop; 3406 3407 log = &sc->sysctllog; 3408 dvname = device_xname(sc->dev); 3409 3410 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3411 0, CTLTYPE_NODE, dvname, 3412 SYSCTL_DESCR("ixgbe information and settings"), 3413 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3414 goto err; 3415 3416 return rnode; 3417 err: 3418 device_printf(sc->dev, 3419 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3420 return NULL; 3421 } 3422 3423 /************************************************************************ 3424 * ixgbe_add_device_sysctls 3425 ************************************************************************/ 3426 static void 3427 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3428 { 3429 device_t dev = sc->dev; 3430 struct ixgbe_hw *hw = &sc->hw; 3431 struct sysctllog **log; 3432 const struct sysctlnode *rnode, *cnode; 3433 3434 log = &sc->sysctllog; 3435 3436 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3437 aprint_error_dev(dev, "could not create sysctl root\n"); 3438 return; 3439 } 3440 3441 if (sysctl_createv(log, 0, &rnode, &cnode, 3442 CTLFLAG_READWRITE, CTLTYPE_INT, 3443 "debug", SYSCTL_DESCR("Debug Info"), 3444 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3445 != 0) 3446 aprint_error_dev(dev, "could not create sysctl\n"); 3447 3448 if (sysctl_createv(log, 0, &rnode, &cnode, 3449 CTLFLAG_READWRITE, CTLTYPE_INT, 3450 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3451 ixgbe_sysctl_rx_copy_len, 0, 3452 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3453 aprint_error_dev(dev, "could not create sysctl\n"); 3454 3455 if (sysctl_createv(log, 0, &rnode, &cnode, 3456 CTLFLAG_READONLY, CTLTYPE_INT, 3457 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3458 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3459 aprint_error_dev(dev, "could not create sysctl\n"); 3460 3461 if (sysctl_createv(log, 0, &rnode, &cnode, 3462 CTLFLAG_READONLY, CTLTYPE_INT, 3463 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3464 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3465 aprint_error_dev(dev, "could not create sysctl\n"); 3466 3467 if (sysctl_createv(log, 0, &rnode, &cnode, 3468 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3469 SYSCTL_DESCR("max number of RX packets to process"), 3470 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3471 CTL_EOL) != 0) 3472 aprint_error_dev(dev, "could not create sysctl\n"); 3473 3474 if (sysctl_createv(log, 0, &rnode, &cnode, 3475 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3476 SYSCTL_DESCR("max number of TX packets to process"), 3477 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3478 CTL_EOL) != 0) 3479 aprint_error_dev(dev, "could not create sysctl\n"); 3480 3481 if (sysctl_createv(log, 0, &rnode, &cnode, 3482 CTLFLAG_READONLY, CTLTYPE_INT, 3483 "num_queues", SYSCTL_DESCR("Number of queues"), 3484 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3485 aprint_error_dev(dev, "could not create sysctl\n"); 3486 3487 /* Sysctls for all devices */ 3488 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3489 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3490 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3491 CTL_EOL) != 0) 3492 aprint_error_dev(dev, "could not create sysctl\n"); 3493 3494 sc->enable_aim = ixgbe_enable_aim; 3495 sc->max_interrupt_rate = ixgbe_max_interrupt_rate; 3496 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3497 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3498 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3499 aprint_error_dev(dev, "could not create sysctl\n"); 3500 3501 if (sysctl_createv(log, 0, &rnode, &cnode, 3502 CTLFLAG_READWRITE, CTLTYPE_INT, 3503 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3504 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3505 CTL_EOL) != 0) 3506 aprint_error_dev(dev, "could not create sysctl\n"); 3507 3508 /* 3509 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3510 * it causesflip-flopping softint/workqueue mode in one deferred 3511 * processing. Therefore, preempt_disable()/preempt_enable() are 3512 * required in ixgbe_sched_handle_que() to avoid 3513 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3514 * I think changing "que->txrx_use_workqueue" in interrupt handler 3515 * is lighter than doing preempt_disable()/preempt_enable() in every 3516 * ixgbe_sched_handle_que(). 3517 */ 3518 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3519 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3520 CTLTYPE_BOOL, "txrx_workqueue", 3521 SYSCTL_DESCR("Use workqueue for packet processing"), 3522 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3523 CTL_EOL) != 0) 3524 aprint_error_dev(dev, "could not create sysctl\n"); 3525 3526 #ifdef IXGBE_DEBUG 3527 /* testing sysctls (for all devices) */ 3528 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3529 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3530 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3531 CTL_EOL) != 0) 3532 aprint_error_dev(dev, "could not create sysctl\n"); 3533 3534 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3535 CTLTYPE_STRING, "print_rss_config", 3536 SYSCTL_DESCR("Prints RSS Configuration"), 3537 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3538 CTL_EOL) != 0) 3539 aprint_error_dev(dev, "could not create sysctl\n"); 3540 #endif 3541 /* for X550 series devices */ 3542 if (hw->mac.type >= ixgbe_mac_X550) 3543 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3544 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3545 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3546 CTL_EOL) != 0) 3547 aprint_error_dev(dev, "could not create sysctl\n"); 3548 3549 /* for WoL-capable devices */ 3550 if (sc->wol_support) { 3551 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3552 CTLTYPE_BOOL, "wol_enable", 3553 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3554 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3555 CTL_EOL) != 0) 3556 aprint_error_dev(dev, "could not create sysctl\n"); 3557 3558 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3559 CTLTYPE_INT, "wufc", 3560 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3561 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3562 CTL_EOL) != 0) 3563 aprint_error_dev(dev, "could not create sysctl\n"); 3564 } 3565 3566 /* for X552/X557-AT devices */ 3567 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3568 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3569 const struct sysctlnode *phy_node; 3570 3571 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3572 "phy", SYSCTL_DESCR("External PHY sysctls"), 3573 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3574 aprint_error_dev(dev, "could not create sysctl\n"); 3575 return; 3576 } 3577 3578 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3579 CTLTYPE_INT, "temp", 3580 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3581 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3582 CTL_EOL) != 0) 3583 aprint_error_dev(dev, "could not create sysctl\n"); 3584 3585 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3586 CTLTYPE_INT, "overtemp_occurred", 3587 SYSCTL_DESCR( 3588 "External PHY High Temperature Event Occurred"), 3589 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3590 CTL_CREATE, CTL_EOL) != 0) 3591 aprint_error_dev(dev, "could not create sysctl\n"); 3592 } 3593 3594 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3595 && (hw->phy.type == ixgbe_phy_fw)) 3596 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3597 CTLTYPE_BOOL, "force_10_100_autonego", 3598 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3599 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3600 CTL_CREATE, CTL_EOL) != 0) 3601 aprint_error_dev(dev, "could not create sysctl\n"); 3602 3603 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3604 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3605 CTLTYPE_INT, "eee_state", 3606 SYSCTL_DESCR("EEE Power Save State"), 3607 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3608 CTL_EOL) != 0) 3609 aprint_error_dev(dev, "could not create sysctl\n"); 3610 } 3611 } /* ixgbe_add_device_sysctls */ 3612 3613 /************************************************************************ 3614 * ixgbe_allocate_pci_resources 3615 ************************************************************************/ 3616 static int 3617 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3618 const struct pci_attach_args *pa) 3619 { 3620 pcireg_t memtype, csr; 3621 device_t dev = sc->dev; 3622 bus_addr_t addr; 3623 int flags; 3624 3625 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3626 switch (memtype) { 3627 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3628 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3629 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3630 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3631 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3632 goto map_err; 3633 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3634 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3635 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3636 } 3637 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3638 sc->osdep.mem_size, flags, 3639 &sc->osdep.mem_bus_space_handle) != 0) { 3640 map_err: 3641 sc->osdep.mem_size = 0; 3642 aprint_error_dev(dev, "unable to map BAR0\n"); 3643 return ENXIO; 3644 } 3645 /* 3646 * Enable address decoding for memory range in case BIOS or 3647 * UEFI don't set it. 3648 */ 3649 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3650 PCI_COMMAND_STATUS_REG); 3651 csr |= PCI_COMMAND_MEM_ENABLE; 3652 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3653 csr); 3654 break; 3655 default: 3656 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3657 return ENXIO; 3658 } 3659 3660 return (0); 3661 } /* ixgbe_allocate_pci_resources */ 3662 3663 static void 3664 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3665 { 3666 struct ix_queue *que = sc->queues; 3667 struct tx_ring *txr = sc->tx_rings; 3668 int i; 3669 3670 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3671 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3672 if (txr->txr_si != NULL) 3673 softint_disestablish(txr->txr_si); 3674 } 3675 if (que->que_si != NULL) 3676 softint_disestablish(que->que_si); 3677 } 3678 if (sc->txr_wq != NULL) 3679 workqueue_destroy(sc->txr_wq); 3680 if (sc->txr_wq_enqueued != NULL) 3681 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3682 if (sc->que_wq != NULL) 3683 workqueue_destroy(sc->que_wq); 3684 3685 if (sc->admin_wq != NULL) { 3686 workqueue_destroy(sc->admin_wq); 3687 sc->admin_wq = NULL; 3688 } 3689 if (sc->timer_wq != NULL) { 3690 workqueue_destroy(sc->timer_wq); 3691 sc->timer_wq = NULL; 3692 } 3693 if (sc->recovery_mode_timer_wq != NULL) { 3694 /* 3695 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3696 * the recovery_mode_timer workqueue, so call it here. 3697 */ 3698 workqueue_wait(sc->recovery_mode_timer_wq, 3699 &sc->recovery_mode_timer_wc); 3700 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3701 workqueue_destroy(sc->recovery_mode_timer_wq); 3702 sc->recovery_mode_timer_wq = NULL; 3703 } 3704 } /* ixgbe_free_deferred_handlers */ 3705 3706 /************************************************************************ 3707 * ixgbe_detach - Device removal routine 3708 * 3709 * Called when the driver is being removed. 3710 * Stops the adapter and deallocates all the resources 3711 * that were allocated for driver operation. 3712 * 3713 * return 0 on success, positive on failure 3714 ************************************************************************/ 3715 static int 3716 ixgbe_detach(device_t dev, int flags) 3717 { 3718 struct ixgbe_softc *sc = device_private(dev); 3719 struct rx_ring *rxr = sc->rx_rings; 3720 struct tx_ring *txr = sc->tx_rings; 3721 struct ixgbe_hw *hw = &sc->hw; 3722 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3723 u32 ctrl_ext; 3724 int i; 3725 3726 INIT_DEBUGOUT("ixgbe_detach: begin"); 3727 if (sc->osdep.attached == false) 3728 return 0; 3729 3730 if (ixgbe_pci_iov_detach(dev) != 0) { 3731 device_printf(dev, "SR-IOV in use; detach first.\n"); 3732 return (EBUSY); 3733 } 3734 3735 if (VLAN_ATTACHED(&sc->osdep.ec) && 3736 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3737 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3738 return (EBUSY); 3739 } 3740 3741 ether_ifdetach(sc->ifp); 3742 3743 sc->osdep.detaching = true; 3744 /* 3745 * Stop the interface. ixgbe_setup_low_power_mode() calls 3746 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3747 * directly. 3748 */ 3749 ixgbe_setup_low_power_mode(sc); 3750 3751 callout_halt(&sc->timer, NULL); 3752 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3753 callout_halt(&sc->recovery_mode_timer, NULL); 3754 3755 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3756 atomic_store_relaxed(&sc->admin_pending, 0); 3757 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3758 atomic_store_relaxed(&sc->timer_pending, 0); 3759 3760 pmf_device_deregister(dev); 3761 3762 ixgbe_free_deferred_handlers(sc); 3763 3764 /* let hardware know driver is unloading */ 3765 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3766 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3767 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3768 3769 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3770 netmap_detach(sc->ifp); 3771 3772 ixgbe_free_pci_resources(sc); 3773 #if 0 /* XXX the NetBSD port is probably missing something here */ 3774 bus_generic_detach(dev); 3775 #endif 3776 if_detach(sc->ifp); 3777 ifmedia_fini(&sc->media); 3778 if_percpuq_destroy(sc->ipq); 3779 3780 sysctl_teardown(&sc->sysctllog); 3781 evcnt_detach(&sc->efbig_tx_dma_setup); 3782 evcnt_detach(&sc->mbuf_defrag_failed); 3783 evcnt_detach(&sc->efbig2_tx_dma_setup); 3784 evcnt_detach(&sc->einval_tx_dma_setup); 3785 evcnt_detach(&sc->other_tx_dma_setup); 3786 evcnt_detach(&sc->eagain_tx_dma_setup); 3787 evcnt_detach(&sc->enomem_tx_dma_setup); 3788 evcnt_detach(&sc->watchdog_events); 3789 evcnt_detach(&sc->tso_err); 3790 evcnt_detach(&sc->admin_irqev); 3791 evcnt_detach(&sc->link_workev); 3792 evcnt_detach(&sc->mod_workev); 3793 evcnt_detach(&sc->msf_workev); 3794 evcnt_detach(&sc->phy_workev); 3795 3796 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3797 if (i < __arraycount(stats->mpc)) { 3798 evcnt_detach(&stats->mpc[i]); 3799 if (hw->mac.type == ixgbe_mac_82598EB) 3800 evcnt_detach(&stats->rnbc[i]); 3801 } 3802 if (i < __arraycount(stats->pxontxc)) { 3803 evcnt_detach(&stats->pxontxc[i]); 3804 evcnt_detach(&stats->pxonrxc[i]); 3805 evcnt_detach(&stats->pxofftxc[i]); 3806 evcnt_detach(&stats->pxoffrxc[i]); 3807 if (hw->mac.type >= ixgbe_mac_82599EB) 3808 evcnt_detach(&stats->pxon2offc[i]); 3809 } 3810 } 3811 3812 txr = sc->tx_rings; 3813 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3814 evcnt_detach(&sc->queues[i].irqs); 3815 evcnt_detach(&sc->queues[i].handleq); 3816 evcnt_detach(&sc->queues[i].req); 3817 evcnt_detach(&txr->total_packets); 3818 #ifndef IXGBE_LEGACY_TX 3819 evcnt_detach(&txr->pcq_drops); 3820 #endif 3821 evcnt_detach(&txr->no_desc_avail); 3822 evcnt_detach(&txr->tso_tx); 3823 3824 if (i < __arraycount(stats->qprc)) { 3825 evcnt_detach(&stats->qprc[i]); 3826 evcnt_detach(&stats->qptc[i]); 3827 evcnt_detach(&stats->qbrc[i]); 3828 evcnt_detach(&stats->qbtc[i]); 3829 if (hw->mac.type >= ixgbe_mac_82599EB) 3830 evcnt_detach(&stats->qprdc[i]); 3831 } 3832 3833 evcnt_detach(&rxr->rx_packets); 3834 evcnt_detach(&rxr->rx_bytes); 3835 evcnt_detach(&rxr->rx_copies); 3836 evcnt_detach(&rxr->no_mbuf); 3837 evcnt_detach(&rxr->rx_discarded); 3838 } 3839 evcnt_detach(&stats->ipcs); 3840 evcnt_detach(&stats->l4cs); 3841 evcnt_detach(&stats->ipcs_bad); 3842 evcnt_detach(&stats->l4cs_bad); 3843 evcnt_detach(&stats->intzero); 3844 evcnt_detach(&stats->legint); 3845 evcnt_detach(&stats->crcerrs); 3846 evcnt_detach(&stats->illerrc); 3847 evcnt_detach(&stats->errbc); 3848 evcnt_detach(&stats->mspdc); 3849 if (hw->mac.type >= ixgbe_mac_X550) 3850 evcnt_detach(&stats->mbsdc); 3851 evcnt_detach(&stats->mpctotal); 3852 evcnt_detach(&stats->mlfc); 3853 evcnt_detach(&stats->mrfc); 3854 if (hw->mac.type == ixgbe_mac_X550EM_a) 3855 evcnt_detach(&stats->link_dn_cnt); 3856 evcnt_detach(&stats->rlec); 3857 evcnt_detach(&stats->lxontxc); 3858 evcnt_detach(&stats->lxonrxc); 3859 evcnt_detach(&stats->lxofftxc); 3860 evcnt_detach(&stats->lxoffrxc); 3861 3862 /* Packet Reception Stats */ 3863 evcnt_detach(&stats->tor); 3864 evcnt_detach(&stats->gorc); 3865 evcnt_detach(&stats->tpr); 3866 evcnt_detach(&stats->gprc); 3867 evcnt_detach(&stats->mprc); 3868 evcnt_detach(&stats->bprc); 3869 evcnt_detach(&stats->prc64); 3870 evcnt_detach(&stats->prc127); 3871 evcnt_detach(&stats->prc255); 3872 evcnt_detach(&stats->prc511); 3873 evcnt_detach(&stats->prc1023); 3874 evcnt_detach(&stats->prc1522); 3875 evcnt_detach(&stats->ruc); 3876 evcnt_detach(&stats->rfc); 3877 evcnt_detach(&stats->roc); 3878 evcnt_detach(&stats->rjc); 3879 evcnt_detach(&stats->mngprc); 3880 evcnt_detach(&stats->mngpdc); 3881 evcnt_detach(&stats->xec); 3882 3883 /* Packet Transmission Stats */ 3884 evcnt_detach(&stats->gotc); 3885 evcnt_detach(&stats->tpt); 3886 evcnt_detach(&stats->gptc); 3887 evcnt_detach(&stats->bptc); 3888 evcnt_detach(&stats->mptc); 3889 evcnt_detach(&stats->mngptc); 3890 evcnt_detach(&stats->ptc64); 3891 evcnt_detach(&stats->ptc127); 3892 evcnt_detach(&stats->ptc255); 3893 evcnt_detach(&stats->ptc511); 3894 evcnt_detach(&stats->ptc1023); 3895 evcnt_detach(&stats->ptc1522); 3896 3897 ixgbe_free_queues(sc); 3898 free(sc->mta, M_DEVBUF); 3899 3900 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3901 IXGBE_CORE_LOCK_DESTROY(sc); 3902 3903 return (0); 3904 } /* ixgbe_detach */ 3905 3906 /************************************************************************ 3907 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3908 * 3909 * Prepare the adapter/port for LPLU and/or WoL 3910 ************************************************************************/ 3911 static int 3912 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3913 { 3914 struct ixgbe_hw *hw = &sc->hw; 3915 device_t dev = sc->dev; 3916 struct ifnet *ifp = sc->ifp; 3917 s32 error = 0; 3918 3919 /* Limit power management flow to X550EM baseT */ 3920 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3921 hw->phy.ops.enter_lplu) { 3922 /* X550EM baseT adapters need a special LPLU flow */ 3923 hw->phy.reset_disable = true; 3924 ixgbe_ifstop(ifp, 1); 3925 error = hw->phy.ops.enter_lplu(hw); 3926 if (error) 3927 device_printf(dev, 3928 "Error entering LPLU: %d\n", error); 3929 hw->phy.reset_disable = false; 3930 } else { 3931 /* Just stop for other adapters */ 3932 ixgbe_ifstop(ifp, 1); 3933 } 3934 3935 IXGBE_CORE_LOCK(sc); 3936 3937 if (!hw->wol_enabled) { 3938 ixgbe_set_phy_power(hw, FALSE); 3939 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3940 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3941 } else { 3942 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3943 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3944 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3945 3946 /* 3947 * Clear Wake Up Status register to prevent any previous wakeup 3948 * events from waking us up immediately after we suspend. 3949 */ 3950 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3951 3952 /* 3953 * Program the Wakeup Filter Control register with user filter 3954 * settings 3955 */ 3956 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3957 3958 /* Enable wakeups and power management in Wakeup Control */ 3959 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3960 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3961 } 3962 3963 IXGBE_CORE_UNLOCK(sc); 3964 3965 return error; 3966 } /* ixgbe_setup_low_power_mode */ 3967 3968 /************************************************************************ 3969 * ixgbe_shutdown - Shutdown entry point 3970 ************************************************************************/ 3971 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3972 static int 3973 ixgbe_shutdown(device_t dev) 3974 { 3975 struct ixgbe_softc *sc = device_private(dev); 3976 int error = 0; 3977 3978 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3979 3980 error = ixgbe_setup_low_power_mode(sc); 3981 3982 return (error); 3983 } /* ixgbe_shutdown */ 3984 #endif 3985 3986 /************************************************************************ 3987 * ixgbe_suspend 3988 * 3989 * From D0 to D3 3990 ************************************************************************/ 3991 static bool 3992 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3993 { 3994 struct ixgbe_softc *sc = device_private(dev); 3995 int error = 0; 3996 3997 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3998 3999 error = ixgbe_setup_low_power_mode(sc); 4000 4001 return (error); 4002 } /* ixgbe_suspend */ 4003 4004 /************************************************************************ 4005 * ixgbe_resume 4006 * 4007 * From D3 to D0 4008 ************************************************************************/ 4009 static bool 4010 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 4011 { 4012 struct ixgbe_softc *sc = device_private(dev); 4013 struct ifnet *ifp = sc->ifp; 4014 struct ixgbe_hw *hw = &sc->hw; 4015 u32 wus; 4016 4017 INIT_DEBUGOUT("ixgbe_resume: begin"); 4018 4019 IXGBE_CORE_LOCK(sc); 4020 4021 /* Read & clear WUS register */ 4022 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4023 if (wus) 4024 device_printf(dev, "Woken up by (WUS): %#010x\n", 4025 IXGBE_READ_REG(hw, IXGBE_WUS)); 4026 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4027 /* And clear WUFC until next low-power transition */ 4028 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4029 4030 /* 4031 * Required after D3->D0 transition; 4032 * will re-advertise all previous advertised speeds 4033 */ 4034 if (ifp->if_flags & IFF_UP) 4035 ixgbe_init_locked(sc); 4036 4037 IXGBE_CORE_UNLOCK(sc); 4038 4039 return true; 4040 } /* ixgbe_resume */ 4041 4042 /* 4043 * Set the various hardware offload abilities. 4044 * 4045 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4046 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4047 * mbuf offload flags the driver will understand. 4048 */ 4049 static void 4050 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4051 { 4052 /* XXX */ 4053 } 4054 4055 /************************************************************************ 4056 * ixgbe_init_locked - Init entry point 4057 * 4058 * Used in two ways: It is used by the stack as an init 4059 * entry point in network interface structure. It is also 4060 * used by the driver as a hw/sw initialization routine to 4061 * get to a consistent state. 4062 * 4063 * return 0 on success, positive on failure 4064 ************************************************************************/ 4065 static void 4066 ixgbe_init_locked(struct ixgbe_softc *sc) 4067 { 4068 struct ifnet *ifp = sc->ifp; 4069 device_t dev = sc->dev; 4070 struct ixgbe_hw *hw = &sc->hw; 4071 struct ix_queue *que; 4072 struct tx_ring *txr; 4073 struct rx_ring *rxr; 4074 u32 txdctl, mhadd; 4075 u32 rxdctl, rxctrl; 4076 u32 ctrl_ext; 4077 bool unsupported_sfp = false; 4078 int i, j, error; 4079 4080 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4081 4082 KASSERT(mutex_owned(&sc->core_mtx)); 4083 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4084 4085 hw->need_unsupported_sfp_recovery = false; 4086 hw->adapter_stopped = FALSE; 4087 ixgbe_stop_adapter(hw); 4088 callout_stop(&sc->timer); 4089 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4090 callout_stop(&sc->recovery_mode_timer); 4091 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4092 que->disabled_count = 0; 4093 4094 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4095 sc->max_frame_size = 4096 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4097 4098 /* Queue indices may change with IOV mode */ 4099 ixgbe_align_all_queue_indices(sc); 4100 4101 /* reprogram the RAR[0] in case user changed it. */ 4102 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4103 4104 /* Get the latest mac address, User can use a LAA */ 4105 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4106 IXGBE_ETH_LENGTH_OF_ADDRESS); 4107 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4108 hw->addr_ctrl.rar_used_count = 1; 4109 4110 /* Set hardware offload abilities from ifnet flags */ 4111 ixgbe_set_if_hwassist(sc); 4112 4113 /* Prepare transmit descriptors and buffers */ 4114 if (ixgbe_setup_transmit_structures(sc)) { 4115 device_printf(dev, "Could not setup transmit structures\n"); 4116 ixgbe_stop_locked(sc); 4117 return; 4118 } 4119 4120 ixgbe_init_hw(hw); 4121 4122 ixgbe_initialize_iov(sc); 4123 4124 ixgbe_initialize_transmit_units(sc); 4125 4126 /* Setup Multicast table */ 4127 ixgbe_set_rxfilter(sc); 4128 4129 /* Use fixed buffer size, even for jumbo frames */ 4130 sc->rx_mbuf_sz = MCLBYTES; 4131 4132 /* Prepare receive descriptors and buffers */ 4133 error = ixgbe_setup_receive_structures(sc); 4134 if (error) { 4135 device_printf(dev, 4136 "Could not setup receive structures (err = %d)\n", error); 4137 ixgbe_stop_locked(sc); 4138 return; 4139 } 4140 4141 /* Configure RX settings */ 4142 ixgbe_initialize_receive_units(sc); 4143 4144 /* Initialize variable holding task enqueue requests interrupts */ 4145 sc->task_requests = 0; 4146 4147 /* Enable SDP & MSI-X interrupts based on adapter */ 4148 ixgbe_config_gpie(sc); 4149 4150 /* Set MTU size */ 4151 if (ifp->if_mtu > ETHERMTU) { 4152 /* aka IXGBE_MAXFRS on 82599 and newer */ 4153 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4154 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4155 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4156 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4157 } 4158 4159 /* Now enable all the queues */ 4160 for (i = 0; i < sc->num_queues; i++) { 4161 txr = &sc->tx_rings[i]; 4162 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4163 txdctl |= IXGBE_TXDCTL_ENABLE; 4164 /* Set WTHRESH to 8, burst writeback */ 4165 txdctl &= ~IXGBE_TXDCTL_WTHRESH_MASK; 4166 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4167 /* 4168 * When the internal queue falls below PTHRESH (32), 4169 * start prefetching as long as there are at least 4170 * HTHRESH (1) buffers ready. The values are taken 4171 * from the Intel linux driver 3.8.21. 4172 * Prefetching enables tx line rate even with 1 queue. 4173 */ 4174 txdctl |= (32 << 0) | (1 << 8); 4175 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4176 } 4177 4178 for (i = 0; i < sc->num_queues; i++) { 4179 rxr = &sc->rx_rings[i]; 4180 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4181 if (hw->mac.type == ixgbe_mac_82598EB) { 4182 /* 4183 * PTHRESH = 21 4184 * HTHRESH = 4 4185 * WTHRESH = 8 4186 */ 4187 rxdctl &= ~0x3FFFFF; 4188 rxdctl |= 0x080420; 4189 } 4190 rxdctl |= IXGBE_RXDCTL_ENABLE; 4191 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4192 for (j = 0; j < 10; j++) { 4193 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4194 IXGBE_RXDCTL_ENABLE) 4195 break; 4196 else 4197 msec_delay(1); 4198 } 4199 IXGBE_WRITE_BARRIER(hw); 4200 4201 /* 4202 * In netmap mode, we must preserve the buffers made 4203 * available to userspace before the if_init() 4204 * (this is true by default on the TX side, because 4205 * init makes all buffers available to userspace). 4206 * 4207 * netmap_reset() and the device specific routines 4208 * (e.g. ixgbe_setup_receive_rings()) map these 4209 * buffers at the end of the NIC ring, so here we 4210 * must set the RDT (tail) register to make sure 4211 * they are not overwritten. 4212 * 4213 * In this driver the NIC ring starts at RDH = 0, 4214 * RDT points to the last slot available for reception (?), 4215 * so RDT = num_rx_desc - 1 means the whole ring is available. 4216 */ 4217 #ifdef DEV_NETMAP 4218 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4219 (ifp->if_capenable & IFCAP_NETMAP)) { 4220 struct netmap_adapter *na = NA(sc->ifp); 4221 struct netmap_kring *kring = na->rx_rings[i]; 4222 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4223 4224 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4225 } else 4226 #endif /* DEV_NETMAP */ 4227 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4228 sc->num_rx_desc - 1); 4229 } 4230 4231 /* Enable Receive engine */ 4232 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4233 if (hw->mac.type == ixgbe_mac_82598EB) 4234 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4235 rxctrl |= IXGBE_RXCTRL_RXEN; 4236 ixgbe_enable_rx_dma(hw, rxctrl); 4237 4238 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4239 atomic_store_relaxed(&sc->timer_pending, 0); 4240 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4241 callout_reset(&sc->recovery_mode_timer, hz, 4242 ixgbe_recovery_mode_timer, sc); 4243 4244 /* Set up MSI/MSI-X routing */ 4245 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4246 ixgbe_configure_ivars(sc); 4247 /* Set up auto-mask */ 4248 if (hw->mac.type == ixgbe_mac_82598EB) 4249 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4250 else { 4251 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4252 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4253 } 4254 } else { /* Simple settings for Legacy/MSI */ 4255 ixgbe_set_ivar(sc, 0, 0, 0); 4256 ixgbe_set_ivar(sc, 0, 0, 1); 4257 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4258 } 4259 4260 ixgbe_init_fdir(sc); 4261 4262 /* 4263 * Check on any SFP devices that 4264 * need to be kick-started 4265 */ 4266 if (hw->phy.type == ixgbe_phy_none) { 4267 error = hw->phy.ops.identify(hw); 4268 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4269 unsupported_sfp = true; 4270 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4271 unsupported_sfp = true; 4272 4273 if (unsupported_sfp) 4274 device_printf(dev, 4275 "Unsupported SFP+ module type was detected.\n"); 4276 4277 /* Set moderation on the Link interrupt */ 4278 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4279 4280 /* Enable EEE power saving */ 4281 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4282 hw->mac.ops.setup_eee(hw, 4283 sc->feat_en & IXGBE_FEATURE_EEE); 4284 4285 /* Enable power to the phy. */ 4286 if (!unsupported_sfp) { 4287 ixgbe_set_phy_power(hw, TRUE); 4288 4289 /* Config/Enable Link */ 4290 ixgbe_config_link(sc); 4291 } 4292 4293 /* Hardware Packet Buffer & Flow Control setup */ 4294 ixgbe_config_delay_values(sc); 4295 4296 /* Initialize the FC settings */ 4297 ixgbe_start_hw(hw); 4298 4299 /* Set up VLAN support and filter */ 4300 ixgbe_setup_vlan_hw_support(sc); 4301 4302 /* Setup DMA Coalescing */ 4303 ixgbe_config_dmac(sc); 4304 4305 /* OK to schedule workqueues. */ 4306 sc->schedule_wqs_ok = true; 4307 4308 /* Enable the use of the MBX by the VF's */ 4309 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4310 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4311 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4312 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4313 } 4314 4315 /* Update saved flags. See ixgbe_ifflags_cb() */ 4316 sc->if_flags = ifp->if_flags; 4317 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4318 4319 /* Inform the stack we're ready */ 4320 ifp->if_flags |= IFF_RUNNING; 4321 4322 /* And now turn on interrupts */ 4323 ixgbe_enable_intr(sc); 4324 4325 return; 4326 } /* ixgbe_init_locked */ 4327 4328 /************************************************************************ 4329 * ixgbe_init 4330 ************************************************************************/ 4331 static int 4332 ixgbe_init(struct ifnet *ifp) 4333 { 4334 struct ixgbe_softc *sc = ifp->if_softc; 4335 4336 IXGBE_CORE_LOCK(sc); 4337 ixgbe_init_locked(sc); 4338 IXGBE_CORE_UNLOCK(sc); 4339 4340 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4341 } /* ixgbe_init */ 4342 4343 /************************************************************************ 4344 * ixgbe_set_ivar 4345 * 4346 * Setup the correct IVAR register for a particular MSI-X interrupt 4347 * (yes this is all very magic and confusing :) 4348 * - entry is the register array entry 4349 * - vector is the MSI-X vector for this queue 4350 * - type is RX/TX/MISC 4351 ************************************************************************/ 4352 static void 4353 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4354 { 4355 struct ixgbe_hw *hw = &sc->hw; 4356 u32 ivar, index; 4357 4358 vector |= IXGBE_IVAR_ALLOC_VAL; 4359 4360 switch (hw->mac.type) { 4361 case ixgbe_mac_82598EB: 4362 if (type == -1) 4363 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4364 else 4365 entry += (type * 64); 4366 index = (entry >> 2) & 0x1F; 4367 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4368 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4369 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4370 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4371 break; 4372 case ixgbe_mac_82599EB: 4373 case ixgbe_mac_X540: 4374 case ixgbe_mac_X550: 4375 case ixgbe_mac_X550EM_x: 4376 case ixgbe_mac_X550EM_a: 4377 if (type == -1) { /* MISC IVAR */ 4378 index = (entry & 1) * 8; 4379 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4380 ivar &= ~(0xffUL << index); 4381 ivar |= ((u32)vector << index); 4382 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4383 } else { /* RX/TX IVARS */ 4384 index = (16 * (entry & 1)) + (8 * type); 4385 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4386 ivar &= ~(0xffUL << index); 4387 ivar |= ((u32)vector << index); 4388 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4389 } 4390 break; 4391 default: 4392 break; 4393 } 4394 } /* ixgbe_set_ivar */ 4395 4396 /************************************************************************ 4397 * ixgbe_configure_ivars 4398 ************************************************************************/ 4399 static void 4400 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4401 { 4402 struct ix_queue *que = sc->queues; 4403 u32 newitr; 4404 4405 if (sc->max_interrupt_rate > 0) 4406 newitr = (4000000 / sc->max_interrupt_rate) & 0x0FF8; 4407 else { 4408 /* 4409 * Disable DMA coalescing if interrupt moderation is 4410 * disabled. 4411 */ 4412 sc->dmac = 0; 4413 newitr = 0; 4414 } 4415 4416 for (int i = 0; i < sc->num_queues; i++, que++) { 4417 struct rx_ring *rxr = &sc->rx_rings[i]; 4418 struct tx_ring *txr = &sc->tx_rings[i]; 4419 /* First the RX queue entry */ 4420 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4421 /* ... and the TX */ 4422 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4423 /* Set an Initial EITR value */ 4424 ixgbe_eitr_write(sc, que->msix, newitr); 4425 /* 4426 * To eliminate influence of the previous state. 4427 * At this point, Tx/Rx interrupt handler 4428 * (ixgbe_msix_que()) cannot be called, so both 4429 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4430 */ 4431 que->eitr_setting = 0; 4432 } 4433 4434 /* For the Link interrupt */ 4435 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4436 } /* ixgbe_configure_ivars */ 4437 4438 /************************************************************************ 4439 * ixgbe_config_gpie 4440 ************************************************************************/ 4441 static void 4442 ixgbe_config_gpie(struct ixgbe_softc *sc) 4443 { 4444 struct ixgbe_hw *hw = &sc->hw; 4445 u32 gpie; 4446 4447 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4448 4449 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4450 /* Enable Enhanced MSI-X mode */ 4451 gpie |= IXGBE_GPIE_MSIX_MODE 4452 | IXGBE_GPIE_EIAME 4453 | IXGBE_GPIE_PBA_SUPPORT 4454 | IXGBE_GPIE_OCD; 4455 } 4456 4457 /* Fan Failure Interrupt */ 4458 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4459 gpie |= IXGBE_SDP1_GPIEN; 4460 4461 /* Thermal Sensor Interrupt */ 4462 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4463 gpie |= IXGBE_SDP0_GPIEN_X540; 4464 4465 /* Link detection */ 4466 switch (hw->mac.type) { 4467 case ixgbe_mac_82599EB: 4468 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4469 break; 4470 case ixgbe_mac_X550EM_x: 4471 case ixgbe_mac_X550EM_a: 4472 gpie |= IXGBE_SDP0_GPIEN_X540; 4473 break; 4474 default: 4475 break; 4476 } 4477 4478 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4479 4480 } /* ixgbe_config_gpie */ 4481 4482 /************************************************************************ 4483 * ixgbe_config_delay_values 4484 * 4485 * Requires sc->max_frame_size to be set. 4486 ************************************************************************/ 4487 static void 4488 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4489 { 4490 struct ixgbe_hw *hw = &sc->hw; 4491 u32 rxpb, frame, size, tmp; 4492 4493 frame = sc->max_frame_size; 4494 4495 /* Calculate High Water */ 4496 switch (hw->mac.type) { 4497 case ixgbe_mac_X540: 4498 case ixgbe_mac_X550: 4499 case ixgbe_mac_X550EM_x: 4500 case ixgbe_mac_X550EM_a: 4501 tmp = IXGBE_DV_X540(frame, frame); 4502 break; 4503 default: 4504 tmp = IXGBE_DV(frame, frame); 4505 break; 4506 } 4507 size = IXGBE_BT2KB(tmp); 4508 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4509 hw->fc.high_water[0] = rxpb - size; 4510 4511 /* Now calculate Low Water */ 4512 switch (hw->mac.type) { 4513 case ixgbe_mac_X540: 4514 case ixgbe_mac_X550: 4515 case ixgbe_mac_X550EM_x: 4516 case ixgbe_mac_X550EM_a: 4517 tmp = IXGBE_LOW_DV_X540(frame); 4518 break; 4519 default: 4520 tmp = IXGBE_LOW_DV(frame); 4521 break; 4522 } 4523 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4524 4525 hw->fc.pause_time = IXGBE_FC_PAUSE; 4526 hw->fc.send_xon = TRUE; 4527 } /* ixgbe_config_delay_values */ 4528 4529 /************************************************************************ 4530 * ixgbe_set_rxfilter - Multicast Update 4531 * 4532 * Called whenever multicast address list is updated. 4533 ************************************************************************/ 4534 static void 4535 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4536 { 4537 struct ixgbe_mc_addr *mta; 4538 struct ifnet *ifp = sc->ifp; 4539 u8 *update_ptr; 4540 int mcnt = 0; 4541 u32 fctrl; 4542 struct ethercom *ec = &sc->osdep.ec; 4543 struct ether_multi *enm; 4544 struct ether_multistep step; 4545 4546 KASSERT(mutex_owned(&sc->core_mtx)); 4547 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4548 4549 mta = sc->mta; 4550 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4551 4552 ETHER_LOCK(ec); 4553 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4554 ETHER_FIRST_MULTI(step, ec, enm); 4555 while (enm != NULL) { 4556 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4557 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4558 ETHER_ADDR_LEN) != 0)) { 4559 ec->ec_flags |= ETHER_F_ALLMULTI; 4560 break; 4561 } 4562 bcopy(enm->enm_addrlo, 4563 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4564 mta[mcnt].vmdq = sc->pool; 4565 mcnt++; 4566 ETHER_NEXT_MULTI(step, enm); 4567 } 4568 4569 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4570 if (ifp->if_flags & IFF_PROMISC) 4571 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4572 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4573 fctrl |= IXGBE_FCTRL_MPE; 4574 fctrl &= ~IXGBE_FCTRL_UPE; 4575 } else 4576 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4577 4578 /* Update multicast filter entries only when it's not ALLMULTI */ 4579 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4580 ETHER_UNLOCK(ec); 4581 update_ptr = (u8 *)mta; 4582 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4583 ixgbe_mc_array_itr, TRUE); 4584 } else 4585 ETHER_UNLOCK(ec); 4586 4587 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4588 } /* ixgbe_set_rxfilter */ 4589 4590 /************************************************************************ 4591 * ixgbe_mc_array_itr 4592 * 4593 * An iterator function needed by the multicast shared code. 4594 * It feeds the shared code routine the addresses in the 4595 * array of ixgbe_set_rxfilter() one by one. 4596 ************************************************************************/ 4597 static u8 * 4598 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4599 { 4600 struct ixgbe_mc_addr *mta; 4601 4602 mta = (struct ixgbe_mc_addr *)*update_ptr; 4603 *vmdq = mta->vmdq; 4604 4605 *update_ptr = (u8*)(mta + 1); 4606 4607 return (mta->addr); 4608 } /* ixgbe_mc_array_itr */ 4609 4610 /************************************************************************ 4611 * ixgbe_local_timer - Timer routine 4612 * 4613 * Checks for link status, updates statistics, 4614 * and runs the watchdog check. 4615 ************************************************************************/ 4616 static void 4617 ixgbe_local_timer(void *arg) 4618 { 4619 struct ixgbe_softc *sc = arg; 4620 4621 if (sc->schedule_wqs_ok) { 4622 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4623 workqueue_enqueue(sc->timer_wq, 4624 &sc->timer_wc, NULL); 4625 } 4626 } 4627 4628 static void 4629 ixgbe_handle_timer(struct work *wk, void *context) 4630 { 4631 struct ixgbe_softc *sc = context; 4632 struct ixgbe_hw *hw = &sc->hw; 4633 device_t dev = sc->dev; 4634 struct ix_queue *que = sc->queues; 4635 u64 queues = 0; 4636 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4637 int hung = 0; 4638 int i; 4639 4640 IXGBE_CORE_LOCK(sc); 4641 4642 /* Check for pluggable optics */ 4643 if (ixgbe_is_sfp(hw)) { 4644 bool sched_mod_task = false; 4645 4646 if (hw->mac.type == ixgbe_mac_82598EB) { 4647 /* 4648 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4649 * any GPIO(SDP). So just schedule TASK_MOD. 4650 */ 4651 sched_mod_task = true; 4652 } else { 4653 bool was_full, is_full; 4654 4655 was_full = 4656 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4657 is_full = ixgbe_sfp_cage_full(hw); 4658 4659 /* Do probe if cage state changed */ 4660 if (was_full ^ is_full) 4661 sched_mod_task = true; 4662 } 4663 if (sched_mod_task) { 4664 mutex_enter(&sc->admin_mtx); 4665 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4666 ixgbe_schedule_admin_tasklet(sc); 4667 mutex_exit(&sc->admin_mtx); 4668 } 4669 } 4670 4671 ixgbe_update_link_status(sc); 4672 ixgbe_update_stats_counters(sc); 4673 4674 /* Update some event counters */ 4675 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4676 que = sc->queues; 4677 for (i = 0; i < sc->num_queues; i++, que++) { 4678 struct tx_ring *txr = que->txr; 4679 4680 v0 += txr->q_efbig_tx_dma_setup; 4681 v1 += txr->q_mbuf_defrag_failed; 4682 v2 += txr->q_efbig2_tx_dma_setup; 4683 v3 += txr->q_einval_tx_dma_setup; 4684 v4 += txr->q_other_tx_dma_setup; 4685 v5 += txr->q_eagain_tx_dma_setup; 4686 v6 += txr->q_enomem_tx_dma_setup; 4687 v7 += txr->q_tso_err; 4688 } 4689 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4690 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4691 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4692 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4693 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4694 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4695 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4696 IXGBE_EVC_STORE(&sc->tso_err, v7); 4697 4698 /* 4699 * Check the TX queues status 4700 * - mark hung queues so we don't schedule on them 4701 * - watchdog only if all queues show hung 4702 */ 4703 que = sc->queues; 4704 for (i = 0; i < sc->num_queues; i++, que++) { 4705 /* Keep track of queues with work for soft irq */ 4706 if (que->txr->busy) 4707 queues |= 1ULL << que->me; 4708 /* 4709 * Each time txeof runs without cleaning, but there 4710 * are uncleaned descriptors it increments busy. If 4711 * we get to the MAX we declare it hung. 4712 */ 4713 if (que->busy == IXGBE_QUEUE_HUNG) { 4714 ++hung; 4715 /* Mark the queue as inactive */ 4716 sc->active_queues &= ~(1ULL << que->me); 4717 continue; 4718 } else { 4719 /* Check if we've come back from hung */ 4720 if ((sc->active_queues & (1ULL << que->me)) == 0) 4721 sc->active_queues |= 1ULL << que->me; 4722 } 4723 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4724 device_printf(dev, 4725 "Warning queue %d appears to be hung!\n", i); 4726 que->txr->busy = IXGBE_QUEUE_HUNG; 4727 ++hung; 4728 } 4729 } 4730 4731 /* Only truly watchdog if all queues show hung */ 4732 if (hung == sc->num_queues) 4733 goto watchdog; 4734 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4735 else if (queues != 0) { /* Force an IRQ on queues with work */ 4736 que = sc->queues; 4737 for (i = 0; i < sc->num_queues; i++, que++) { 4738 mutex_enter(&que->dc_mtx); 4739 if (que->disabled_count == 0) 4740 ixgbe_rearm_queues(sc, 4741 queues & ((u64)1 << i)); 4742 mutex_exit(&que->dc_mtx); 4743 } 4744 } 4745 #endif 4746 4747 atomic_store_relaxed(&sc->timer_pending, 0); 4748 IXGBE_CORE_UNLOCK(sc); 4749 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4750 return; 4751 4752 watchdog: 4753 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4754 sc->ifp->if_flags &= ~IFF_RUNNING; 4755 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4756 ixgbe_init_locked(sc); 4757 IXGBE_CORE_UNLOCK(sc); 4758 } /* ixgbe_handle_timer */ 4759 4760 /************************************************************************ 4761 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4762 ************************************************************************/ 4763 static void 4764 ixgbe_recovery_mode_timer(void *arg) 4765 { 4766 struct ixgbe_softc *sc = arg; 4767 4768 if (__predict_true(sc->osdep.detaching == false)) { 4769 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4770 0, 1) == 0) { 4771 workqueue_enqueue(sc->recovery_mode_timer_wq, 4772 &sc->recovery_mode_timer_wc, NULL); 4773 } 4774 } 4775 } 4776 4777 static void 4778 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4779 { 4780 struct ixgbe_softc *sc = context; 4781 struct ixgbe_hw *hw = &sc->hw; 4782 4783 IXGBE_CORE_LOCK(sc); 4784 if (ixgbe_fw_recovery_mode(hw)) { 4785 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4786 /* Firmware error detected, entering recovery mode */ 4787 device_printf(sc->dev, 4788 "Firmware recovery mode detected. Limiting " 4789 "functionality. Refer to the Intel(R) Ethernet " 4790 "Adapters and Devices User Guide for details on " 4791 "firmware recovery mode.\n"); 4792 4793 if (hw->adapter_stopped == FALSE) 4794 ixgbe_stop_locked(sc); 4795 } 4796 } else 4797 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4798 4799 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4800 callout_reset(&sc->recovery_mode_timer, hz, 4801 ixgbe_recovery_mode_timer, sc); 4802 IXGBE_CORE_UNLOCK(sc); 4803 } /* ixgbe_handle_recovery_mode_timer */ 4804 4805 /************************************************************************ 4806 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4807 * bool int_en: true if it's called when the interrupt is enabled. 4808 ************************************************************************/ 4809 static void 4810 ixgbe_handle_mod(void *context, bool int_en) 4811 { 4812 struct ixgbe_softc *sc = context; 4813 struct ixgbe_hw *hw = &sc->hw; 4814 device_t dev = sc->dev; 4815 enum ixgbe_sfp_type last_sfp_type; 4816 u32 err; 4817 bool last_unsupported_sfp_recovery; 4818 4819 KASSERT(mutex_owned(&sc->core_mtx)); 4820 4821 last_sfp_type = hw->phy.sfp_type; 4822 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4823 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4824 if (sc->hw.need_crosstalk_fix) { 4825 if ((hw->mac.type != ixgbe_mac_82598EB) && 4826 !ixgbe_sfp_cage_full(hw)) 4827 goto out; 4828 } 4829 4830 err = hw->phy.ops.identify_sfp(hw); 4831 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4832 if (last_unsupported_sfp_recovery == false) 4833 device_printf(dev, 4834 "Unsupported SFP+ module type was detected.\n"); 4835 goto out; 4836 } 4837 4838 if (hw->need_unsupported_sfp_recovery) { 4839 device_printf(dev, "Recovering from unsupported SFP\n"); 4840 /* 4841 * We could recover the status by calling setup_sfp(), 4842 * setup_link() and some others. It's complex and might not 4843 * work correctly on some unknown cases. To avoid such type of 4844 * problem, call ixgbe_init_locked(). It's simple and safe 4845 * approach. 4846 */ 4847 ixgbe_init_locked(sc); 4848 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4849 (hw->phy.sfp_type != last_sfp_type)) { 4850 /* A module is inserted and changed. */ 4851 4852 if (hw->mac.type == ixgbe_mac_82598EB) 4853 err = hw->phy.ops.reset(hw); 4854 else { 4855 err = hw->mac.ops.setup_sfp(hw); 4856 hw->phy.sfp_setup_needed = FALSE; 4857 } 4858 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4859 device_printf(dev, 4860 "Setup failure - unsupported SFP+ module type.\n"); 4861 goto out; 4862 } 4863 } 4864 4865 out: 4866 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4867 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4868 4869 /* Adjust media types shown in ifconfig */ 4870 IXGBE_CORE_UNLOCK(sc); 4871 ifmedia_removeall(&sc->media); 4872 ixgbe_add_media_types(sc); 4873 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4874 IXGBE_CORE_LOCK(sc); 4875 4876 /* 4877 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4878 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4879 * flap because the function calls setup_link(). 4880 */ 4881 if (hw->mac.type != ixgbe_mac_82598EB) { 4882 mutex_enter(&sc->admin_mtx); 4883 if (int_en) 4884 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4885 else 4886 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4887 mutex_exit(&sc->admin_mtx); 4888 } 4889 4890 /* 4891 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4892 * the workqueue now. 4893 */ 4894 } /* ixgbe_handle_mod */ 4895 4896 4897 /************************************************************************ 4898 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4899 ************************************************************************/ 4900 static void 4901 ixgbe_handle_msf(void *context) 4902 { 4903 struct ixgbe_softc *sc = context; 4904 struct ixgbe_hw *hw = &sc->hw; 4905 u32 autoneg; 4906 bool negotiate; 4907 4908 KASSERT(mutex_owned(&sc->core_mtx)); 4909 4910 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4911 4912 autoneg = hw->phy.autoneg_advertised; 4913 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4914 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4915 if (hw->mac.ops.setup_link) 4916 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4917 } /* ixgbe_handle_msf */ 4918 4919 /************************************************************************ 4920 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4921 ************************************************************************/ 4922 static void 4923 ixgbe_handle_phy(void *context) 4924 { 4925 struct ixgbe_softc *sc = context; 4926 struct ixgbe_hw *hw = &sc->hw; 4927 int error; 4928 4929 KASSERT(mutex_owned(&sc->core_mtx)); 4930 4931 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4932 error = hw->phy.ops.handle_lasi(hw); 4933 if (error == IXGBE_ERR_OVERTEMP) 4934 device_printf(sc->dev, 4935 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4936 " PHY will downshift to lower power state!\n"); 4937 else if (error) 4938 device_printf(sc->dev, 4939 "Error handling LASI interrupt: %d\n", error); 4940 } /* ixgbe_handle_phy */ 4941 4942 static void 4943 ixgbe_handle_admin(struct work *wk, void *context) 4944 { 4945 struct ixgbe_softc *sc = context; 4946 struct ifnet *ifp = sc->ifp; 4947 struct ixgbe_hw *hw = &sc->hw; 4948 u32 task_requests; 4949 u32 eims_enable = 0; 4950 4951 mutex_enter(&sc->admin_mtx); 4952 sc->admin_pending = 0; 4953 task_requests = sc->task_requests; 4954 sc->task_requests = 0; 4955 mutex_exit(&sc->admin_mtx); 4956 4957 /* 4958 * Hold the IFNET_LOCK across this entire call. This will 4959 * prevent additional changes to sc->phy_layer 4960 * and serialize calls to this tasklet. We cannot hold the 4961 * CORE_LOCK while calling into the ifmedia functions as 4962 * they call ifmedia_lock() and the lock is CORE_LOCK. 4963 */ 4964 IFNET_LOCK(ifp); 4965 IXGBE_CORE_LOCK(sc); 4966 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4967 ixgbe_handle_link(sc); 4968 eims_enable |= IXGBE_EIMS_LSC; 4969 } 4970 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4971 ixgbe_handle_mod(sc, false); 4972 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4973 ixgbe_handle_mod(sc, true); 4974 if (hw->mac.type >= ixgbe_mac_X540) 4975 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4976 else 4977 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4978 } 4979 if ((task_requests 4980 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4981 ixgbe_handle_msf(sc); 4982 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4983 (hw->mac.type == ixgbe_mac_82599EB)) 4984 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4985 } 4986 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4987 ixgbe_handle_phy(sc); 4988 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4989 } 4990 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4991 ixgbe_reinit_fdir(sc); 4992 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4993 } 4994 #if 0 /* notyet */ 4995 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4996 ixgbe_handle_mbx(sc); 4997 eims_enable |= IXGBE_EIMS_MAILBOX; 4998 } 4999 #endif 5000 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 5001 5002 IXGBE_CORE_UNLOCK(sc); 5003 IFNET_UNLOCK(ifp); 5004 } /* ixgbe_handle_admin */ 5005 5006 static void 5007 ixgbe_ifstop(struct ifnet *ifp, int disable) 5008 { 5009 struct ixgbe_softc *sc = ifp->if_softc; 5010 5011 IXGBE_CORE_LOCK(sc); 5012 ixgbe_stop_locked(sc); 5013 IXGBE_CORE_UNLOCK(sc); 5014 5015 workqueue_wait(sc->timer_wq, &sc->timer_wc); 5016 atomic_store_relaxed(&sc->timer_pending, 0); 5017 } 5018 5019 /************************************************************************ 5020 * ixgbe_stop_locked - Stop the hardware 5021 * 5022 * Disables all traffic on the adapter by issuing a 5023 * global reset on the MAC and deallocates TX/RX buffers. 5024 ************************************************************************/ 5025 static void 5026 ixgbe_stop_locked(void *arg) 5027 { 5028 struct ifnet *ifp; 5029 struct ixgbe_softc *sc = arg; 5030 struct ixgbe_hw *hw = &sc->hw; 5031 5032 ifp = sc->ifp; 5033 5034 KASSERT(mutex_owned(&sc->core_mtx)); 5035 5036 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5037 ixgbe_disable_intr(sc); 5038 callout_stop(&sc->timer); 5039 5040 /* Don't schedule workqueues. */ 5041 sc->schedule_wqs_ok = false; 5042 5043 /* Let the stack know...*/ 5044 ifp->if_flags &= ~IFF_RUNNING; 5045 5046 ixgbe_reset_hw(hw); 5047 hw->adapter_stopped = FALSE; 5048 ixgbe_stop_adapter(hw); 5049 if (hw->mac.type == ixgbe_mac_82599EB) 5050 ixgbe_stop_mac_link_on_d3_82599(hw); 5051 /* Turn off the laser - noop with no optics */ 5052 ixgbe_disable_tx_laser(hw); 5053 5054 /* Update the stack */ 5055 sc->link_up = FALSE; 5056 ixgbe_update_link_status(sc); 5057 5058 /* reprogram the RAR[0] in case user changed it. */ 5059 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5060 5061 return; 5062 } /* ixgbe_stop_locked */ 5063 5064 /************************************************************************ 5065 * ixgbe_update_link_status - Update OS on link state 5066 * 5067 * Note: Only updates the OS on the cached link state. 5068 * The real check of the hardware only happens with 5069 * a link interrupt. 5070 ************************************************************************/ 5071 static void 5072 ixgbe_update_link_status(struct ixgbe_softc *sc) 5073 { 5074 struct ifnet *ifp = sc->ifp; 5075 device_t dev = sc->dev; 5076 struct ixgbe_hw *hw = &sc->hw; 5077 5078 KASSERT(mutex_owned(&sc->core_mtx)); 5079 5080 if (sc->link_up) { 5081 if (sc->link_active != LINK_STATE_UP) { 5082 /* 5083 * To eliminate influence of the previous state 5084 * in the same way as ixgbe_init_locked(). 5085 */ 5086 struct ix_queue *que = sc->queues; 5087 for (int i = 0; i < sc->num_queues; i++, que++) 5088 que->eitr_setting = 0; 5089 5090 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL) { 5091 /* 5092 * Discard count for both MAC Local Fault and 5093 * Remote Fault because those registers are 5094 * valid only when the link speed is up and 5095 * 10Gbps. 5096 */ 5097 IXGBE_READ_REG(hw, IXGBE_MLFC); 5098 IXGBE_READ_REG(hw, IXGBE_MRFC); 5099 } 5100 5101 if (bootverbose) { 5102 const char *bpsmsg; 5103 5104 switch (sc->link_speed) { 5105 case IXGBE_LINK_SPEED_10GB_FULL: 5106 bpsmsg = "10 Gbps"; 5107 break; 5108 case IXGBE_LINK_SPEED_5GB_FULL: 5109 bpsmsg = "5 Gbps"; 5110 break; 5111 case IXGBE_LINK_SPEED_2_5GB_FULL: 5112 bpsmsg = "2.5 Gbps"; 5113 break; 5114 case IXGBE_LINK_SPEED_1GB_FULL: 5115 bpsmsg = "1 Gbps"; 5116 break; 5117 case IXGBE_LINK_SPEED_100_FULL: 5118 bpsmsg = "100 Mbps"; 5119 break; 5120 case IXGBE_LINK_SPEED_10_FULL: 5121 bpsmsg = "10 Mbps"; 5122 break; 5123 default: 5124 bpsmsg = "unknown speed"; 5125 break; 5126 } 5127 device_printf(dev, "Link is up %s %s \n", 5128 bpsmsg, "Full Duplex"); 5129 } 5130 sc->link_active = LINK_STATE_UP; 5131 /* Update any Flow Control changes */ 5132 ixgbe_fc_enable(&sc->hw); 5133 /* Update DMA coalescing config */ 5134 ixgbe_config_dmac(sc); 5135 if_link_state_change(ifp, LINK_STATE_UP); 5136 5137 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5138 ixgbe_ping_all_vfs(sc); 5139 } 5140 } else { 5141 /* 5142 * Do it when link active changes to DOWN. i.e. 5143 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5144 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5145 */ 5146 if (sc->link_active != LINK_STATE_DOWN) { 5147 if (bootverbose) 5148 device_printf(dev, "Link is Down\n"); 5149 if_link_state_change(ifp, LINK_STATE_DOWN); 5150 sc->link_active = LINK_STATE_DOWN; 5151 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5152 ixgbe_ping_all_vfs(sc); 5153 ixgbe_drain_all(sc); 5154 } 5155 } 5156 } /* ixgbe_update_link_status */ 5157 5158 /************************************************************************ 5159 * ixgbe_config_dmac - Configure DMA Coalescing 5160 ************************************************************************/ 5161 static void 5162 ixgbe_config_dmac(struct ixgbe_softc *sc) 5163 { 5164 struct ixgbe_hw *hw = &sc->hw; 5165 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5166 5167 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5168 return; 5169 5170 if (dcfg->watchdog_timer ^ sc->dmac || 5171 dcfg->link_speed ^ sc->link_speed) { 5172 dcfg->watchdog_timer = sc->dmac; 5173 dcfg->fcoe_en = false; 5174 dcfg->link_speed = sc->link_speed; 5175 dcfg->num_tcs = 1; 5176 5177 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5178 dcfg->watchdog_timer, dcfg->link_speed); 5179 5180 hw->mac.ops.dmac_config(hw); 5181 } 5182 } /* ixgbe_config_dmac */ 5183 5184 /************************************************************************ 5185 * ixgbe_enable_intr 5186 ************************************************************************/ 5187 static void 5188 ixgbe_enable_intr(struct ixgbe_softc *sc) 5189 { 5190 struct ixgbe_hw *hw = &sc->hw; 5191 struct ix_queue *que = sc->queues; 5192 u32 mask, fwsm; 5193 5194 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5195 5196 switch (sc->hw.mac.type) { 5197 case ixgbe_mac_82599EB: 5198 mask |= IXGBE_EIMS_ECC; 5199 /* Temperature sensor on some adapters */ 5200 mask |= IXGBE_EIMS_GPI_SDP0; 5201 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5202 mask |= IXGBE_EIMS_GPI_SDP1; 5203 mask |= IXGBE_EIMS_GPI_SDP2; 5204 break; 5205 case ixgbe_mac_X540: 5206 /* Detect if Thermal Sensor is enabled */ 5207 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5208 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5209 mask |= IXGBE_EIMS_TS; 5210 mask |= IXGBE_EIMS_ECC; 5211 break; 5212 case ixgbe_mac_X550: 5213 /* MAC thermal sensor is automatically enabled */ 5214 mask |= IXGBE_EIMS_TS; 5215 mask |= IXGBE_EIMS_ECC; 5216 break; 5217 case ixgbe_mac_X550EM_x: 5218 case ixgbe_mac_X550EM_a: 5219 /* Some devices use SDP0 for important information */ 5220 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5221 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5222 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5223 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5224 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5225 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5226 mask |= IXGBE_EICR_GPI_SDP0_X540; 5227 mask |= IXGBE_EIMS_ECC; 5228 break; 5229 default: 5230 break; 5231 } 5232 5233 /* Enable Fan Failure detection */ 5234 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5235 mask |= IXGBE_EIMS_GPI_SDP1; 5236 /* Enable SR-IOV */ 5237 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5238 mask |= IXGBE_EIMS_MAILBOX; 5239 /* Enable Flow Director */ 5240 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5241 mask |= IXGBE_EIMS_FLOW_DIR; 5242 5243 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5244 5245 /* With MSI-X we use auto clear */ 5246 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5247 /* 5248 * We use auto clear for RTX_QUEUE only. Don't use other 5249 * interrupts (e.g. link interrupt). BTW, we don't use 5250 * TCP_TIMER interrupt itself. 5251 */ 5252 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5253 } 5254 5255 /* 5256 * Now enable all queues, this is done separately to 5257 * allow for handling the extended (beyond 32) MSI-X 5258 * vectors that can be used by 82599 5259 */ 5260 for (int i = 0; i < sc->num_queues; i++, que++) 5261 ixgbe_enable_queue(sc, que->msix); 5262 5263 IXGBE_WRITE_FLUSH(hw); 5264 5265 } /* ixgbe_enable_intr */ 5266 5267 /************************************************************************ 5268 * ixgbe_disable_intr_internal 5269 ************************************************************************/ 5270 static void 5271 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5272 { 5273 struct ix_queue *que = sc->queues; 5274 5275 /* disable interrupts other than queues */ 5276 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5277 5278 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5279 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5280 5281 for (int i = 0; i < sc->num_queues; i++, que++) 5282 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5283 5284 IXGBE_WRITE_FLUSH(&sc->hw); 5285 5286 } /* ixgbe_do_disable_intr_internal */ 5287 5288 /************************************************************************ 5289 * ixgbe_disable_intr 5290 ************************************************************************/ 5291 static void 5292 ixgbe_disable_intr(struct ixgbe_softc *sc) 5293 { 5294 5295 ixgbe_disable_intr_internal(sc, true); 5296 } /* ixgbe_disable_intr */ 5297 5298 /************************************************************************ 5299 * ixgbe_ensure_disabled_intr 5300 ************************************************************************/ 5301 void 5302 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5303 { 5304 5305 ixgbe_disable_intr_internal(sc, false); 5306 } /* ixgbe_ensure_disabled_intr */ 5307 5308 /************************************************************************ 5309 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5310 ************************************************************************/ 5311 static int 5312 ixgbe_legacy_irq(void *arg) 5313 { 5314 struct ix_queue *que = arg; 5315 struct ixgbe_softc *sc = que->sc; 5316 struct ixgbe_hw *hw = &sc->hw; 5317 struct ifnet *ifp = sc->ifp; 5318 struct tx_ring *txr = sc->tx_rings; 5319 u32 eicr; 5320 u32 eims_orig; 5321 u32 eims_enable = 0; 5322 u32 eims_disable = 0; 5323 5324 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5325 /* 5326 * Silicon errata #26 on 82598. Disable all interrupts before reading 5327 * EICR. 5328 */ 5329 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5330 5331 /* Read and clear EICR */ 5332 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5333 5334 if (eicr == 0) { 5335 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5336 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5337 return 0; 5338 } 5339 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5340 5341 /* Queue (0) intr */ 5342 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5343 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5344 IXGBE_EVC_ADD(&que->irqs, 1); 5345 5346 /* 5347 * The same as ixgbe_msix_que() about 5348 * "que->txrx_use_workqueue". 5349 */ 5350 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5351 5352 IXGBE_TX_LOCK(txr); 5353 ixgbe_txeof(txr); 5354 #ifdef notyet 5355 if (!ixgbe_ring_empty(ifp, txr->br)) 5356 ixgbe_start_locked(ifp, txr); 5357 #endif 5358 IXGBE_TX_UNLOCK(txr); 5359 5360 IXGBE_EVC_ADD(&que->req, 1); 5361 ixgbe_sched_handle_que(sc, que); 5362 /* Disable queue 0 interrupt */ 5363 eims_disable |= 1UL << 0; 5364 } else 5365 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5366 5367 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5368 5369 /* Re-enable some interrupts */ 5370 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5371 (eims_orig & ~eims_disable) | eims_enable); 5372 5373 return 1; 5374 } /* ixgbe_legacy_irq */ 5375 5376 /************************************************************************ 5377 * ixgbe_free_pciintr_resources 5378 ************************************************************************/ 5379 static void 5380 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5381 { 5382 struct ix_queue *que = sc->queues; 5383 int rid; 5384 5385 /* 5386 * Release all msix queue resources: 5387 */ 5388 for (int i = 0; i < sc->num_queues; i++, que++) { 5389 if (que->res != NULL) { 5390 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5391 sc->osdep.ihs[i] = NULL; 5392 } 5393 } 5394 5395 /* Clean the Legacy or Link interrupt last */ 5396 if (sc->vector) /* we are doing MSIX */ 5397 rid = sc->vector; 5398 else 5399 rid = 0; 5400 5401 if (sc->osdep.ihs[rid] != NULL) { 5402 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5403 sc->osdep.ihs[rid] = NULL; 5404 } 5405 5406 if (sc->osdep.intrs != NULL) { 5407 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5408 sc->osdep.nintrs); 5409 sc->osdep.intrs = NULL; 5410 } 5411 } /* ixgbe_free_pciintr_resources */ 5412 5413 /************************************************************************ 5414 * ixgbe_free_pci_resources 5415 ************************************************************************/ 5416 static void 5417 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5418 { 5419 5420 ixgbe_free_pciintr_resources(sc); 5421 5422 if (sc->osdep.mem_size != 0) { 5423 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5424 sc->osdep.mem_bus_space_handle, 5425 sc->osdep.mem_size); 5426 } 5427 } /* ixgbe_free_pci_resources */ 5428 5429 /************************************************************************ 5430 * ixgbe_sysctl_flowcntl 5431 * 5432 * SYSCTL wrapper around setting Flow Control 5433 ************************************************************************/ 5434 static int 5435 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5436 { 5437 struct sysctlnode node = *rnode; 5438 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5439 int error, fc; 5440 5441 if (ixgbe_fw_recovery_mode_swflag(sc)) 5442 return (EPERM); 5443 5444 fc = sc->hw.fc.current_mode; 5445 node.sysctl_data = &fc; 5446 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5447 if (error != 0 || newp == NULL) 5448 return error; 5449 5450 /* Don't bother if it's not changed */ 5451 if (fc == sc->hw.fc.current_mode) 5452 return (0); 5453 5454 return ixgbe_set_flowcntl(sc, fc); 5455 } /* ixgbe_sysctl_flowcntl */ 5456 5457 /************************************************************************ 5458 * ixgbe_set_flowcntl - Set flow control 5459 * 5460 * Flow control values: 5461 * 0 - off 5462 * 1 - rx pause 5463 * 2 - tx pause 5464 * 3 - full 5465 ************************************************************************/ 5466 static int 5467 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5468 { 5469 switch (fc) { 5470 case ixgbe_fc_rx_pause: 5471 case ixgbe_fc_tx_pause: 5472 case ixgbe_fc_full: 5473 sc->hw.fc.requested_mode = fc; 5474 if (sc->num_queues > 1) 5475 ixgbe_disable_rx_drop(sc); 5476 break; 5477 case ixgbe_fc_none: 5478 sc->hw.fc.requested_mode = ixgbe_fc_none; 5479 if (sc->num_queues > 1) 5480 ixgbe_enable_rx_drop(sc); 5481 break; 5482 default: 5483 return (EINVAL); 5484 } 5485 5486 #if 0 /* XXX NetBSD */ 5487 /* Don't autoneg if forcing a value */ 5488 sc->hw.fc.disable_fc_autoneg = TRUE; 5489 #endif 5490 ixgbe_fc_enable(&sc->hw); 5491 5492 return (0); 5493 } /* ixgbe_set_flowcntl */ 5494 5495 /************************************************************************ 5496 * ixgbe_enable_rx_drop 5497 * 5498 * Enable the hardware to drop packets when the buffer is 5499 * full. This is useful with multiqueue, so that no single 5500 * queue being full stalls the entire RX engine. We only 5501 * enable this when Multiqueue is enabled AND Flow Control 5502 * is disabled. 5503 ************************************************************************/ 5504 static void 5505 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5506 { 5507 struct ixgbe_hw *hw = &sc->hw; 5508 struct rx_ring *rxr; 5509 u32 srrctl; 5510 5511 for (int i = 0; i < sc->num_queues; i++) { 5512 rxr = &sc->rx_rings[i]; 5513 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5514 srrctl |= IXGBE_SRRCTL_DROP_EN; 5515 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5516 } 5517 5518 /* enable drop for each vf */ 5519 for (int i = 0; i < sc->num_vfs; i++) { 5520 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5521 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5522 IXGBE_QDE_ENABLE)); 5523 } 5524 } /* ixgbe_enable_rx_drop */ 5525 5526 /************************************************************************ 5527 * ixgbe_disable_rx_drop 5528 ************************************************************************/ 5529 static void 5530 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5531 { 5532 struct ixgbe_hw *hw = &sc->hw; 5533 struct rx_ring *rxr; 5534 u32 srrctl; 5535 5536 for (int i = 0; i < sc->num_queues; i++) { 5537 rxr = &sc->rx_rings[i]; 5538 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5539 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5540 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5541 } 5542 5543 /* disable drop for each vf */ 5544 for (int i = 0; i < sc->num_vfs; i++) { 5545 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5546 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5547 } 5548 } /* ixgbe_disable_rx_drop */ 5549 5550 /************************************************************************ 5551 * ixgbe_sysctl_advertise 5552 * 5553 * SYSCTL wrapper around setting advertised speed 5554 ************************************************************************/ 5555 static int 5556 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5557 { 5558 struct sysctlnode node = *rnode; 5559 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5560 int error = 0, advertise; 5561 5562 if (ixgbe_fw_recovery_mode_swflag(sc)) 5563 return (EPERM); 5564 5565 advertise = sc->advertise; 5566 node.sysctl_data = &advertise; 5567 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5568 if (error != 0 || newp == NULL) 5569 return error; 5570 5571 return ixgbe_set_advertise(sc, advertise); 5572 } /* ixgbe_sysctl_advertise */ 5573 5574 /************************************************************************ 5575 * ixgbe_set_advertise - Control advertised link speed 5576 * 5577 * Flags: 5578 * 0x00 - Default (all capable link speed) 5579 * 0x1 - advertise 100 Mb 5580 * 0x2 - advertise 1G 5581 * 0x4 - advertise 10G 5582 * 0x8 - advertise 10 Mb (yes, Mb) 5583 * 0x10 - advertise 2.5G 5584 * 0x20 - advertise 5G 5585 ************************************************************************/ 5586 static int 5587 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5588 { 5589 device_t dev; 5590 struct ixgbe_hw *hw; 5591 ixgbe_link_speed speed = 0; 5592 ixgbe_link_speed link_caps = 0; 5593 s32 err = IXGBE_NOT_IMPLEMENTED; 5594 bool negotiate = FALSE; 5595 5596 /* Checks to validate new value */ 5597 if (sc->advertise == advertise) /* no change */ 5598 return (0); 5599 5600 dev = sc->dev; 5601 hw = &sc->hw; 5602 5603 /* No speed changes for backplane media */ 5604 if (hw->phy.media_type == ixgbe_media_type_backplane) 5605 return (ENODEV); 5606 5607 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5608 (hw->phy.multispeed_fiber))) { 5609 device_printf(dev, 5610 "Advertised speed can only be set on copper or " 5611 "multispeed fiber media types.\n"); 5612 return (EINVAL); 5613 } 5614 5615 if (advertise < 0x0 || advertise > 0x3f) { 5616 device_printf(dev, "Invalid advertised speed; " 5617 "valid modes are 0x0 through 0x3f\n"); 5618 return (EINVAL); 5619 } 5620 5621 if (hw->mac.ops.get_link_capabilities) { 5622 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5623 &negotiate); 5624 if (err != IXGBE_SUCCESS) { 5625 device_printf(dev, "Unable to determine supported " 5626 "advertise speeds\n"); 5627 return (ENODEV); 5628 } 5629 } 5630 5631 /* Set new value and report new advertised mode */ 5632 if (advertise & 0x1) { 5633 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5634 device_printf(dev, "Interface does not support 100Mb " 5635 "advertised speed\n"); 5636 return (EINVAL); 5637 } 5638 speed |= IXGBE_LINK_SPEED_100_FULL; 5639 } 5640 if (advertise & 0x2) { 5641 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5642 device_printf(dev, "Interface does not support 1Gb " 5643 "advertised speed\n"); 5644 return (EINVAL); 5645 } 5646 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5647 } 5648 if (advertise & 0x4) { 5649 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5650 device_printf(dev, "Interface does not support 10Gb " 5651 "advertised speed\n"); 5652 return (EINVAL); 5653 } 5654 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5655 } 5656 if (advertise & 0x8) { 5657 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5658 device_printf(dev, "Interface does not support 10Mb " 5659 "advertised speed\n"); 5660 return (EINVAL); 5661 } 5662 speed |= IXGBE_LINK_SPEED_10_FULL; 5663 } 5664 if (advertise & 0x10) { 5665 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5666 device_printf(dev, "Interface does not support 2.5Gb " 5667 "advertised speed\n"); 5668 return (EINVAL); 5669 } 5670 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5671 } 5672 if (advertise & 0x20) { 5673 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5674 device_printf(dev, "Interface does not support 5Gb " 5675 "advertised speed\n"); 5676 return (EINVAL); 5677 } 5678 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5679 } 5680 if (advertise == 0) 5681 speed = link_caps; /* All capable link speed */ 5682 5683 hw->mac.autotry_restart = TRUE; 5684 hw->mac.ops.setup_link(hw, speed, TRUE); 5685 sc->advertise = advertise; 5686 5687 return (0); 5688 } /* ixgbe_set_advertise */ 5689 5690 /************************************************************************ 5691 * ixgbe_get_default_advertise - Get default advertised speed settings 5692 * 5693 * Formatted for sysctl usage. 5694 * Flags: 5695 * 0x1 - advertise 100 Mb 5696 * 0x2 - advertise 1G 5697 * 0x4 - advertise 10G 5698 * 0x8 - advertise 10 Mb (yes, Mb) 5699 * 0x10 - advertise 2.5G 5700 * 0x20 - advertise 5G 5701 ************************************************************************/ 5702 static int 5703 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5704 { 5705 struct ixgbe_hw *hw = &sc->hw; 5706 int speed; 5707 ixgbe_link_speed link_caps = 0; 5708 s32 err; 5709 bool negotiate = FALSE; 5710 5711 /* 5712 * Advertised speed means nothing unless it's copper or 5713 * multi-speed fiber 5714 */ 5715 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5716 !(hw->phy.multispeed_fiber)) 5717 return (0); 5718 5719 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5720 if (err != IXGBE_SUCCESS) 5721 return (0); 5722 5723 speed = 5724 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5725 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5726 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5727 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5728 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5729 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5730 5731 return speed; 5732 } /* ixgbe_get_default_advertise */ 5733 5734 /************************************************************************ 5735 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5736 * 5737 * Control values: 5738 * 0/1 - off / on (use default value of 1000) 5739 * 5740 * Legal timer values are: 5741 * 50,100,250,500,1000,2000,5000,10000 5742 * 5743 * Turning off interrupt moderation will also turn this off. 5744 ************************************************************************/ 5745 static int 5746 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5747 { 5748 struct sysctlnode node = *rnode; 5749 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5750 struct ifnet *ifp = sc->ifp; 5751 int error; 5752 int newval; 5753 5754 if (ixgbe_fw_recovery_mode_swflag(sc)) 5755 return (EPERM); 5756 5757 newval = sc->dmac; 5758 node.sysctl_data = &newval; 5759 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5760 if ((error) || (newp == NULL)) 5761 return (error); 5762 5763 switch (newval) { 5764 case 0: 5765 /* Disabled */ 5766 sc->dmac = 0; 5767 break; 5768 case 1: 5769 /* Enable and use default */ 5770 sc->dmac = 1000; 5771 break; 5772 case 50: 5773 case 100: 5774 case 250: 5775 case 500: 5776 case 1000: 5777 case 2000: 5778 case 5000: 5779 case 10000: 5780 /* Legal values - allow */ 5781 sc->dmac = newval; 5782 break; 5783 default: 5784 /* Do nothing, illegal value */ 5785 return (EINVAL); 5786 } 5787 5788 /* Re-initialize hardware if it's already running */ 5789 if (ifp->if_flags & IFF_RUNNING) 5790 if_init(ifp); 5791 5792 return (0); 5793 } 5794 5795 #ifdef IXGBE_DEBUG 5796 /************************************************************************ 5797 * ixgbe_sysctl_power_state 5798 * 5799 * Sysctl to test power states 5800 * Values: 5801 * 0 - set device to D0 5802 * 3 - set device to D3 5803 * (none) - get current device power state 5804 ************************************************************************/ 5805 static int 5806 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5807 { 5808 #ifdef notyet 5809 struct sysctlnode node = *rnode; 5810 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5811 device_t dev = sc->dev; 5812 int curr_ps, new_ps, error = 0; 5813 5814 if (ixgbe_fw_recovery_mode_swflag(sc)) 5815 return (EPERM); 5816 5817 curr_ps = new_ps = pci_get_powerstate(dev); 5818 5819 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5820 if ((error) || (req->newp == NULL)) 5821 return (error); 5822 5823 if (new_ps == curr_ps) 5824 return (0); 5825 5826 if (new_ps == 3 && curr_ps == 0) 5827 error = DEVICE_SUSPEND(dev); 5828 else if (new_ps == 0 && curr_ps == 3) 5829 error = DEVICE_RESUME(dev); 5830 else 5831 return (EINVAL); 5832 5833 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5834 5835 return (error); 5836 #else 5837 return 0; 5838 #endif 5839 } /* ixgbe_sysctl_power_state */ 5840 #endif 5841 5842 /************************************************************************ 5843 * ixgbe_sysctl_wol_enable 5844 * 5845 * Sysctl to enable/disable the WoL capability, 5846 * if supported by the adapter. 5847 * 5848 * Values: 5849 * 0 - disabled 5850 * 1 - enabled 5851 ************************************************************************/ 5852 static int 5853 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5854 { 5855 struct sysctlnode node = *rnode; 5856 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5857 struct ixgbe_hw *hw = &sc->hw; 5858 bool new_wol_enabled; 5859 int error = 0; 5860 5861 /* 5862 * It's not required to check recovery mode because this function never 5863 * touches hardware. 5864 */ 5865 new_wol_enabled = hw->wol_enabled; 5866 node.sysctl_data = &new_wol_enabled; 5867 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5868 if ((error) || (newp == NULL)) 5869 return (error); 5870 if (new_wol_enabled == hw->wol_enabled) 5871 return (0); 5872 5873 if (new_wol_enabled && !sc->wol_support) 5874 return (ENODEV); 5875 else 5876 hw->wol_enabled = new_wol_enabled; 5877 5878 return (0); 5879 } /* ixgbe_sysctl_wol_enable */ 5880 5881 /************************************************************************ 5882 * ixgbe_sysctl_wufc - Wake Up Filter Control 5883 * 5884 * Sysctl to enable/disable the types of packets that the 5885 * adapter will wake up on upon receipt. 5886 * Flags: 5887 * 0x1 - Link Status Change 5888 * 0x2 - Magic Packet 5889 * 0x4 - Direct Exact 5890 * 0x8 - Directed Multicast 5891 * 0x10 - Broadcast 5892 * 0x20 - ARP/IPv4 Request Packet 5893 * 0x40 - Direct IPv4 Packet 5894 * 0x80 - Direct IPv6 Packet 5895 * 5896 * Settings not listed above will cause the sysctl to return an error. 5897 ************************************************************************/ 5898 static int 5899 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5900 { 5901 struct sysctlnode node = *rnode; 5902 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5903 int error = 0; 5904 u32 new_wufc; 5905 5906 /* 5907 * It's not required to check recovery mode because this function never 5908 * touches hardware. 5909 */ 5910 new_wufc = sc->wufc; 5911 node.sysctl_data = &new_wufc; 5912 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5913 if ((error) || (newp == NULL)) 5914 return (error); 5915 if (new_wufc == sc->wufc) 5916 return (0); 5917 5918 if (new_wufc & 0xffffff00) 5919 return (EINVAL); 5920 5921 new_wufc &= 0xff; 5922 new_wufc |= (0xffffff & sc->wufc); 5923 sc->wufc = new_wufc; 5924 5925 return (0); 5926 } /* ixgbe_sysctl_wufc */ 5927 5928 #ifdef IXGBE_DEBUG 5929 /************************************************************************ 5930 * ixgbe_sysctl_print_rss_config 5931 ************************************************************************/ 5932 static int 5933 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5934 { 5935 #ifdef notyet 5936 struct sysctlnode node = *rnode; 5937 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5938 struct ixgbe_hw *hw = &sc->hw; 5939 device_t dev = sc->dev; 5940 struct sbuf *buf; 5941 int error = 0, reta_size; 5942 u32 reg; 5943 5944 if (ixgbe_fw_recovery_mode_swflag(sc)) 5945 return (EPERM); 5946 5947 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5948 if (!buf) { 5949 device_printf(dev, "Could not allocate sbuf for output.\n"); 5950 return (ENOMEM); 5951 } 5952 5953 // TODO: use sbufs to make a string to print out 5954 /* Set multiplier for RETA setup and table size based on MAC */ 5955 switch (sc->hw.mac.type) { 5956 case ixgbe_mac_X550: 5957 case ixgbe_mac_X550EM_x: 5958 case ixgbe_mac_X550EM_a: 5959 reta_size = 128; 5960 break; 5961 default: 5962 reta_size = 32; 5963 break; 5964 } 5965 5966 /* Print out the redirection table */ 5967 sbuf_cat(buf, "\n"); 5968 for (int i = 0; i < reta_size; i++) { 5969 if (i < 32) { 5970 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5971 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5972 } else { 5973 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5974 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5975 } 5976 } 5977 5978 // TODO: print more config 5979 5980 error = sbuf_finish(buf); 5981 if (error) 5982 device_printf(dev, "Error finishing sbuf: %d\n", error); 5983 5984 sbuf_delete(buf); 5985 #endif 5986 return (0); 5987 } /* ixgbe_sysctl_print_rss_config */ 5988 #endif /* IXGBE_DEBUG */ 5989 5990 /************************************************************************ 5991 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5992 * 5993 * For X552/X557-AT devices using an external PHY 5994 ************************************************************************/ 5995 static int 5996 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5997 { 5998 struct sysctlnode node = *rnode; 5999 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6000 struct ixgbe_hw *hw = &sc->hw; 6001 int val; 6002 u16 reg; 6003 int error; 6004 6005 if (ixgbe_fw_recovery_mode_swflag(sc)) 6006 return (EPERM); 6007 6008 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6009 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6010 device_printf(sc->dev, 6011 "Device has no supported external thermal sensor.\n"); 6012 return (ENODEV); 6013 } 6014 6015 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6016 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6017 device_printf(sc->dev, 6018 "Error reading from PHY's current temperature register\n"); 6019 return (EAGAIN); 6020 } 6021 6022 node.sysctl_data = &val; 6023 6024 /* Shift temp for output */ 6025 val = reg >> 8; 6026 6027 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6028 if ((error) || (newp == NULL)) 6029 return (error); 6030 6031 return (0); 6032 } /* ixgbe_sysctl_phy_temp */ 6033 6034 /************************************************************************ 6035 * ixgbe_sysctl_phy_overtemp_occurred 6036 * 6037 * Reports (directly from the PHY) whether the current PHY 6038 * temperature is over the overtemp threshold. 6039 ************************************************************************/ 6040 static int 6041 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6042 { 6043 struct sysctlnode node = *rnode; 6044 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6045 struct ixgbe_hw *hw = &sc->hw; 6046 int val, error; 6047 u16 reg; 6048 6049 if (ixgbe_fw_recovery_mode_swflag(sc)) 6050 return (EPERM); 6051 6052 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6053 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6054 device_printf(sc->dev, 6055 "Device has no supported external thermal sensor.\n"); 6056 return (ENODEV); 6057 } 6058 6059 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6060 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6061 device_printf(sc->dev, 6062 "Error reading from PHY's temperature status register\n"); 6063 return (EAGAIN); 6064 } 6065 6066 node.sysctl_data = &val; 6067 6068 /* Get occurrence bit */ 6069 val = !!(reg & 0x4000); 6070 6071 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6072 if ((error) || (newp == NULL)) 6073 return (error); 6074 6075 return (0); 6076 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6077 6078 /************************************************************************ 6079 * ixgbe_sysctl_eee_state 6080 * 6081 * Sysctl to set EEE power saving feature 6082 * Values: 6083 * 0 - disable EEE 6084 * 1 - enable EEE 6085 * (none) - get current device EEE state 6086 ************************************************************************/ 6087 static int 6088 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6089 { 6090 struct sysctlnode node = *rnode; 6091 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6092 struct ifnet *ifp = sc->ifp; 6093 device_t dev = sc->dev; 6094 int curr_eee, new_eee, error = 0; 6095 s32 retval; 6096 6097 if (ixgbe_fw_recovery_mode_swflag(sc)) 6098 return (EPERM); 6099 6100 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6101 node.sysctl_data = &new_eee; 6102 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6103 if ((error) || (newp == NULL)) 6104 return (error); 6105 6106 /* Nothing to do */ 6107 if (new_eee == curr_eee) 6108 return (0); 6109 6110 /* Not supported */ 6111 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6112 return (EINVAL); 6113 6114 /* Bounds checking */ 6115 if ((new_eee < 0) || (new_eee > 1)) 6116 return (EINVAL); 6117 6118 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6119 if (retval) { 6120 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6121 return (EINVAL); 6122 } 6123 6124 /* Restart auto-neg */ 6125 if_init(ifp); 6126 6127 device_printf(dev, "New EEE state: %d\n", new_eee); 6128 6129 /* Cache new value */ 6130 if (new_eee) 6131 sc->feat_en |= IXGBE_FEATURE_EEE; 6132 else 6133 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6134 6135 return (error); 6136 } /* ixgbe_sysctl_eee_state */ 6137 6138 #define PRINTQS(sc, regname) \ 6139 do { \ 6140 struct ixgbe_hw *_hw = &(sc)->hw; \ 6141 int _i; \ 6142 \ 6143 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6144 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6145 printf((_i == 0) ? "\t" : " "); \ 6146 printf("%08x", IXGBE_READ_REG(_hw, \ 6147 IXGBE_##regname(_i))); \ 6148 } \ 6149 printf("\n"); \ 6150 } while (0) 6151 6152 /************************************************************************ 6153 * ixgbe_print_debug_info 6154 * 6155 * Called only when em_display_debug_stats is enabled. 6156 * Provides a way to take a look at important statistics 6157 * maintained by the driver and hardware. 6158 ************************************************************************/ 6159 static void 6160 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6161 { 6162 device_t dev = sc->dev; 6163 struct ixgbe_hw *hw = &sc->hw; 6164 int table_size; 6165 int i; 6166 6167 switch (sc->hw.mac.type) { 6168 case ixgbe_mac_X550: 6169 case ixgbe_mac_X550EM_x: 6170 case ixgbe_mac_X550EM_a: 6171 table_size = 128; 6172 break; 6173 default: 6174 table_size = 32; 6175 break; 6176 } 6177 6178 device_printf(dev, "[E]RETA:\n"); 6179 for (i = 0; i < table_size; i++) { 6180 if (i < 32) 6181 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6182 IXGBE_RETA(i))); 6183 else 6184 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6185 IXGBE_ERETA(i - 32))); 6186 } 6187 6188 device_printf(dev, "queue:"); 6189 for (i = 0; i < sc->num_queues; i++) { 6190 printf((i == 0) ? "\t" : " "); 6191 printf("%8d", i); 6192 } 6193 printf("\n"); 6194 PRINTQS(sc, RDBAL); 6195 PRINTQS(sc, RDBAH); 6196 PRINTQS(sc, RDLEN); 6197 PRINTQS(sc, SRRCTL); 6198 PRINTQS(sc, RDH); 6199 PRINTQS(sc, RDT); 6200 PRINTQS(sc, RXDCTL); 6201 6202 device_printf(dev, "RQSMR:"); 6203 for (i = 0; i < sc->num_queues / 4; i++) { 6204 printf((i == 0) ? "\t" : " "); 6205 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6206 } 6207 printf("\n"); 6208 6209 device_printf(dev, "disabled_count:"); 6210 for (i = 0; i < sc->num_queues; i++) { 6211 printf((i == 0) ? "\t" : " "); 6212 printf("%8d", sc->queues[i].disabled_count); 6213 } 6214 printf("\n"); 6215 6216 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6217 if (hw->mac.type != ixgbe_mac_82598EB) { 6218 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6219 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6220 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6221 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6222 } 6223 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6224 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6225 } /* ixgbe_print_debug_info */ 6226 6227 /************************************************************************ 6228 * ixgbe_sysctl_debug 6229 ************************************************************************/ 6230 static int 6231 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6232 { 6233 struct sysctlnode node = *rnode; 6234 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6235 int error, result = 0; 6236 6237 if (ixgbe_fw_recovery_mode_swflag(sc)) 6238 return (EPERM); 6239 6240 node.sysctl_data = &result; 6241 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6242 6243 if (error || newp == NULL) 6244 return error; 6245 6246 if (result == 1) 6247 ixgbe_print_debug_info(sc); 6248 6249 return 0; 6250 } /* ixgbe_sysctl_debug */ 6251 6252 /************************************************************************ 6253 * ixgbe_sysctl_rx_copy_len 6254 ************************************************************************/ 6255 static int 6256 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6257 { 6258 struct sysctlnode node = *rnode; 6259 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6260 int error; 6261 int result = sc->rx_copy_len; 6262 6263 node.sysctl_data = &result; 6264 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6265 6266 if (error || newp == NULL) 6267 return error; 6268 6269 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6270 return EINVAL; 6271 6272 sc->rx_copy_len = result; 6273 6274 return 0; 6275 } /* ixgbe_sysctl_rx_copy_len */ 6276 6277 /************************************************************************ 6278 * ixgbe_sysctl_tx_process_limit 6279 ************************************************************************/ 6280 static int 6281 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6282 { 6283 struct sysctlnode node = *rnode; 6284 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6285 int error; 6286 int result = sc->tx_process_limit; 6287 6288 node.sysctl_data = &result; 6289 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6290 6291 if (error || newp == NULL) 6292 return error; 6293 6294 if ((result <= 0) || (result > sc->num_tx_desc)) 6295 return EINVAL; 6296 6297 sc->tx_process_limit = result; 6298 6299 return 0; 6300 } /* ixgbe_sysctl_tx_process_limit */ 6301 6302 /************************************************************************ 6303 * ixgbe_sysctl_rx_process_limit 6304 ************************************************************************/ 6305 static int 6306 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6307 { 6308 struct sysctlnode node = *rnode; 6309 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6310 int error; 6311 int result = sc->rx_process_limit; 6312 6313 node.sysctl_data = &result; 6314 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6315 6316 if (error || newp == NULL) 6317 return error; 6318 6319 if ((result <= 0) || (result > sc->num_rx_desc)) 6320 return EINVAL; 6321 6322 sc->rx_process_limit = result; 6323 6324 return 0; 6325 } /* ixgbe_sysctl_rx_process_limit */ 6326 6327 /************************************************************************ 6328 * ixgbe_init_device_features 6329 ************************************************************************/ 6330 static void 6331 ixgbe_init_device_features(struct ixgbe_softc *sc) 6332 { 6333 sc->feat_cap = IXGBE_FEATURE_NETMAP 6334 | IXGBE_FEATURE_RSS 6335 | IXGBE_FEATURE_MSI 6336 | IXGBE_FEATURE_MSIX 6337 | IXGBE_FEATURE_LEGACY_IRQ 6338 | IXGBE_FEATURE_LEGACY_TX; 6339 6340 /* Set capabilities first... */ 6341 switch (sc->hw.mac.type) { 6342 case ixgbe_mac_82598EB: 6343 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6344 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6345 break; 6346 case ixgbe_mac_X540: 6347 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6348 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6349 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6350 (sc->hw.bus.func == 0)) 6351 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6352 break; 6353 case ixgbe_mac_X550: 6354 /* 6355 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6356 * NVM Image version. 6357 */ 6358 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6359 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6360 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6361 break; 6362 case ixgbe_mac_X550EM_x: 6363 /* 6364 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6365 * NVM Image version. 6366 */ 6367 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6368 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6369 break; 6370 case ixgbe_mac_X550EM_a: 6371 /* 6372 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6373 * NVM Image version. 6374 */ 6375 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6376 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6377 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6378 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6379 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6380 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6381 sc->feat_cap |= IXGBE_FEATURE_EEE; 6382 } 6383 break; 6384 case ixgbe_mac_82599EB: 6385 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6386 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6387 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6388 (sc->hw.bus.func == 0)) 6389 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6390 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6391 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6392 break; 6393 default: 6394 break; 6395 } 6396 6397 /* Enabled by default... */ 6398 /* Fan failure detection */ 6399 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6400 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6401 /* Netmap */ 6402 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6403 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6404 /* EEE */ 6405 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6406 sc->feat_en |= IXGBE_FEATURE_EEE; 6407 /* Thermal Sensor */ 6408 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6409 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6410 /* 6411 * Recovery mode: 6412 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6413 * NVM Image version. 6414 */ 6415 6416 /* Enabled via global sysctl... */ 6417 /* Flow Director */ 6418 if (ixgbe_enable_fdir) { 6419 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6420 sc->feat_en |= IXGBE_FEATURE_FDIR; 6421 else 6422 device_printf(sc->dev, "Device does not support " 6423 "Flow Director. Leaving disabled."); 6424 } 6425 /* Legacy (single queue) transmit */ 6426 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6427 ixgbe_enable_legacy_tx) 6428 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6429 /* 6430 * Message Signal Interrupts - Extended (MSI-X) 6431 * Normal MSI is only enabled if MSI-X calls fail. 6432 */ 6433 if (!ixgbe_enable_msix) 6434 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6435 /* Receive-Side Scaling (RSS) */ 6436 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6437 sc->feat_en |= IXGBE_FEATURE_RSS; 6438 6439 /* Disable features with unmet dependencies... */ 6440 /* No MSI-X */ 6441 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6442 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6443 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6444 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6445 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6446 } 6447 } /* ixgbe_init_device_features */ 6448 6449 /************************************************************************ 6450 * ixgbe_probe - Device identification routine 6451 * 6452 * Determines if the driver should be loaded on 6453 * adapter based on its PCI vendor/device ID. 6454 * 6455 * return BUS_PROBE_DEFAULT on success, positive on failure 6456 ************************************************************************/ 6457 static int 6458 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6459 { 6460 const struct pci_attach_args *pa = aux; 6461 6462 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6463 } 6464 6465 static const ixgbe_vendor_info_t * 6466 ixgbe_lookup(const struct pci_attach_args *pa) 6467 { 6468 const ixgbe_vendor_info_t *ent; 6469 pcireg_t subid; 6470 6471 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6472 6473 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6474 return NULL; 6475 6476 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6477 6478 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6479 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6480 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6481 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6482 (ent->subvendor_id == 0)) && 6483 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6484 (ent->subdevice_id == 0))) { 6485 return ent; 6486 } 6487 } 6488 return NULL; 6489 } 6490 6491 static int 6492 ixgbe_ifflags_cb(struct ethercom *ec) 6493 { 6494 struct ifnet *ifp = &ec->ec_if; 6495 struct ixgbe_softc *sc = ifp->if_softc; 6496 u_short change; 6497 int rv = 0; 6498 6499 IXGBE_CORE_LOCK(sc); 6500 6501 change = ifp->if_flags ^ sc->if_flags; 6502 if (change != 0) 6503 sc->if_flags = ifp->if_flags; 6504 6505 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6506 rv = ENETRESET; 6507 goto out; 6508 } else if ((change & IFF_PROMISC) != 0) 6509 ixgbe_set_rxfilter(sc); 6510 6511 /* Check for ec_capenable. */ 6512 change = ec->ec_capenable ^ sc->ec_capenable; 6513 sc->ec_capenable = ec->ec_capenable; 6514 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6515 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6516 rv = ENETRESET; 6517 goto out; 6518 } 6519 6520 /* 6521 * Special handling is not required for ETHERCAP_VLAN_MTU. 6522 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6523 */ 6524 6525 /* Set up VLAN support and filter */ 6526 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6527 ixgbe_setup_vlan_hw_support(sc); 6528 6529 out: 6530 IXGBE_CORE_UNLOCK(sc); 6531 6532 return rv; 6533 } 6534 6535 /************************************************************************ 6536 * ixgbe_ioctl - Ioctl entry point 6537 * 6538 * Called when the user wants to configure the interface. 6539 * 6540 * return 0 on success, positive on failure 6541 ************************************************************************/ 6542 static int 6543 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6544 { 6545 struct ixgbe_softc *sc = ifp->if_softc; 6546 struct ixgbe_hw *hw = &sc->hw; 6547 struct ifcapreq *ifcr = data; 6548 struct ifreq *ifr = data; 6549 int error = 0; 6550 int l4csum_en; 6551 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6552 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6553 6554 if (ixgbe_fw_recovery_mode_swflag(sc)) 6555 return (EPERM); 6556 6557 switch (command) { 6558 case SIOCSIFFLAGS: 6559 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6560 break; 6561 case SIOCADDMULTI: 6562 case SIOCDELMULTI: 6563 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6564 break; 6565 case SIOCSIFMEDIA: 6566 case SIOCGIFMEDIA: 6567 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6568 break; 6569 case SIOCSIFCAP: 6570 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6571 break; 6572 case SIOCSIFMTU: 6573 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6574 break; 6575 #ifdef __NetBSD__ 6576 case SIOCINITIFADDR: 6577 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6578 break; 6579 case SIOCGIFFLAGS: 6580 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6581 break; 6582 case SIOCGIFAFLAG_IN: 6583 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6584 break; 6585 case SIOCGIFADDR: 6586 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6587 break; 6588 case SIOCGIFMTU: 6589 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6590 break; 6591 case SIOCGIFCAP: 6592 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6593 break; 6594 case SIOCGETHERCAP: 6595 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6596 break; 6597 case SIOCGLIFADDR: 6598 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6599 break; 6600 case SIOCZIFDATA: 6601 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6602 hw->mac.ops.clear_hw_cntrs(hw); 6603 ixgbe_clear_evcnt(sc); 6604 break; 6605 case SIOCAIFADDR: 6606 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6607 break; 6608 #endif 6609 default: 6610 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6611 break; 6612 } 6613 6614 switch (command) { 6615 case SIOCGI2C: 6616 { 6617 struct ixgbe_i2c_req i2c; 6618 6619 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6620 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6621 if (error != 0) 6622 break; 6623 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6624 error = EINVAL; 6625 break; 6626 } 6627 if (i2c.len > sizeof(i2c.data)) { 6628 error = EINVAL; 6629 break; 6630 } 6631 6632 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6633 i2c.dev_addr, i2c.data); 6634 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6635 break; 6636 } 6637 case SIOCSIFCAP: 6638 /* Layer-4 Rx checksum offload has to be turned on and 6639 * off as a unit. 6640 */ 6641 l4csum_en = ifcr->ifcr_capenable & l4csum; 6642 if (l4csum_en != l4csum && l4csum_en != 0) 6643 return EINVAL; 6644 /*FALLTHROUGH*/ 6645 case SIOCADDMULTI: 6646 case SIOCDELMULTI: 6647 case SIOCSIFFLAGS: 6648 case SIOCSIFMTU: 6649 default: 6650 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6651 return error; 6652 if ((ifp->if_flags & IFF_RUNNING) == 0) 6653 ; 6654 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6655 IXGBE_CORE_LOCK(sc); 6656 if ((ifp->if_flags & IFF_RUNNING) != 0) 6657 ixgbe_init_locked(sc); 6658 ixgbe_recalculate_max_frame(sc); 6659 IXGBE_CORE_UNLOCK(sc); 6660 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6661 /* 6662 * Multicast list has changed; set the hardware filter 6663 * accordingly. 6664 */ 6665 IXGBE_CORE_LOCK(sc); 6666 ixgbe_disable_intr(sc); 6667 ixgbe_set_rxfilter(sc); 6668 ixgbe_enable_intr(sc); 6669 IXGBE_CORE_UNLOCK(sc); 6670 } 6671 return 0; 6672 } 6673 6674 return error; 6675 } /* ixgbe_ioctl */ 6676 6677 /************************************************************************ 6678 * ixgbe_check_fan_failure 6679 ************************************************************************/ 6680 static int 6681 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6682 { 6683 u32 mask; 6684 6685 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6686 IXGBE_ESDP_SDP1; 6687 6688 if ((reg & mask) == 0) 6689 return IXGBE_SUCCESS; 6690 6691 /* 6692 * Use ratecheck() just in case interrupt occur frequently. 6693 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6694 * an red LED on the board turned on and link never up until 6695 * power off. 6696 */ 6697 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6698 device_printf(sc->dev, 6699 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6700 6701 return IXGBE_ERR_FAN_FAILURE; 6702 } /* ixgbe_check_fan_failure */ 6703 6704 /************************************************************************ 6705 * ixgbe_handle_que 6706 ************************************************************************/ 6707 static void 6708 ixgbe_handle_que(void *context) 6709 { 6710 struct ix_queue *que = context; 6711 struct ixgbe_softc *sc = que->sc; 6712 struct tx_ring *txr = que->txr; 6713 struct ifnet *ifp = sc->ifp; 6714 bool more = false; 6715 6716 IXGBE_EVC_ADD(&que->handleq, 1); 6717 6718 if (ifp->if_flags & IFF_RUNNING) { 6719 IXGBE_TX_LOCK(txr); 6720 more = ixgbe_txeof(txr); 6721 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6722 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6723 ixgbe_mq_start_locked(ifp, txr); 6724 /* Only for queue 0 */ 6725 /* NetBSD still needs this for CBQ */ 6726 if ((&sc->queues[0] == que) 6727 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6728 ixgbe_legacy_start_locked(ifp, txr); 6729 IXGBE_TX_UNLOCK(txr); 6730 more |= ixgbe_rxeof(que); 6731 } 6732 6733 if (more) { 6734 IXGBE_EVC_ADD(&que->req, 1); 6735 ixgbe_sched_handle_que(sc, que); 6736 } else if (que->res != NULL) { 6737 /* MSIX: Re-enable this interrupt */ 6738 ixgbe_enable_queue(sc, que->msix); 6739 } else { 6740 /* INTx or MSI */ 6741 ixgbe_enable_queue(sc, 0); 6742 } 6743 6744 return; 6745 } /* ixgbe_handle_que */ 6746 6747 /************************************************************************ 6748 * ixgbe_handle_que_work 6749 ************************************************************************/ 6750 static void 6751 ixgbe_handle_que_work(struct work *wk, void *context) 6752 { 6753 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6754 6755 /* 6756 * "enqueued flag" is not required here. 6757 * See ixgbe_msix_que(). 6758 */ 6759 ixgbe_handle_que(que); 6760 } 6761 6762 /************************************************************************ 6763 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6764 ************************************************************************/ 6765 static int 6766 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6767 const struct pci_attach_args *pa) 6768 { 6769 device_t dev = sc->dev; 6770 struct ix_queue *que = sc->queues; 6771 struct tx_ring *txr = sc->tx_rings; 6772 int counts[PCI_INTR_TYPE_SIZE]; 6773 pci_intr_type_t intr_type, max_type; 6774 char intrbuf[PCI_INTRSTR_LEN]; 6775 char wqname[MAXCOMLEN]; 6776 const char *intrstr = NULL; 6777 int defertx_error = 0, error; 6778 6779 /* We allocate a single interrupt resource */ 6780 max_type = PCI_INTR_TYPE_MSI; 6781 counts[PCI_INTR_TYPE_MSIX] = 0; 6782 counts[PCI_INTR_TYPE_MSI] = 6783 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6784 /* Check not feat_en but feat_cap to fallback to INTx */ 6785 counts[PCI_INTR_TYPE_INTX] = 6786 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6787 6788 alloc_retry: 6789 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6790 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6791 return ENXIO; 6792 } 6793 sc->osdep.nintrs = 1; 6794 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6795 intrbuf, sizeof(intrbuf)); 6796 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6797 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6798 device_xname(dev)); 6799 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6800 if (sc->osdep.ihs[0] == NULL) { 6801 aprint_error_dev(dev,"unable to establish %s\n", 6802 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6803 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6804 sc->osdep.intrs = NULL; 6805 switch (intr_type) { 6806 case PCI_INTR_TYPE_MSI: 6807 /* The next try is for INTx: Disable MSI */ 6808 max_type = PCI_INTR_TYPE_INTX; 6809 counts[PCI_INTR_TYPE_INTX] = 1; 6810 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6811 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6812 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6813 goto alloc_retry; 6814 } else 6815 break; 6816 case PCI_INTR_TYPE_INTX: 6817 default: 6818 /* See below */ 6819 break; 6820 } 6821 } 6822 if (intr_type == PCI_INTR_TYPE_INTX) { 6823 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6824 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6825 } 6826 if (sc->osdep.ihs[0] == NULL) { 6827 aprint_error_dev(dev, 6828 "couldn't establish interrupt%s%s\n", 6829 intrstr ? " at " : "", intrstr ? intrstr : ""); 6830 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6831 sc->osdep.intrs = NULL; 6832 return ENXIO; 6833 } 6834 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6835 /* 6836 * Try allocating a fast interrupt and the associated deferred 6837 * processing contexts. 6838 */ 6839 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6840 txr->txr_si = 6841 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6842 ixgbe_deferred_mq_start, txr); 6843 6844 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6845 device_xname(dev)); 6846 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6847 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6848 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6849 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6850 } 6851 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6852 ixgbe_handle_que, que); 6853 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6854 error = workqueue_create(&sc->que_wq, wqname, 6855 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6856 IXGBE_WORKQUEUE_FLAGS); 6857 6858 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6859 && ((txr->txr_si == NULL) || defertx_error != 0)) 6860 || (que->que_si == NULL) || error != 0) { 6861 aprint_error_dev(dev, 6862 "could not establish software interrupts\n"); 6863 6864 return ENXIO; 6865 } 6866 /* For simplicity in the handlers */ 6867 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6868 6869 return (0); 6870 } /* ixgbe_allocate_legacy */ 6871 6872 /************************************************************************ 6873 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6874 ************************************************************************/ 6875 static int 6876 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6877 { 6878 device_t dev = sc->dev; 6879 struct ix_queue *que = sc->queues; 6880 struct tx_ring *txr = sc->tx_rings; 6881 pci_chipset_tag_t pc; 6882 char intrbuf[PCI_INTRSTR_LEN]; 6883 char intr_xname[32]; 6884 char wqname[MAXCOMLEN]; 6885 const char *intrstr = NULL; 6886 int error, vector = 0; 6887 int cpu_id = 0; 6888 kcpuset_t *affinity; 6889 #ifdef RSS 6890 unsigned int rss_buckets = 0; 6891 kcpuset_t cpu_mask; 6892 #endif 6893 6894 pc = sc->osdep.pc; 6895 #ifdef RSS 6896 /* 6897 * If we're doing RSS, the number of queues needs to 6898 * match the number of RSS buckets that are configured. 6899 * 6900 * + If there's more queues than RSS buckets, we'll end 6901 * up with queues that get no traffic. 6902 * 6903 * + If there's more RSS buckets than queues, we'll end 6904 * up having multiple RSS buckets map to the same queue, 6905 * so there'll be some contention. 6906 */ 6907 rss_buckets = rss_getnumbuckets(); 6908 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6909 (sc->num_queues != rss_buckets)) { 6910 device_printf(dev, 6911 "%s: number of queues (%d) != number of RSS buckets (%d)" 6912 "; performance will be impacted.\n", 6913 __func__, sc->num_queues, rss_buckets); 6914 } 6915 #endif 6916 6917 sc->osdep.nintrs = sc->num_queues + 1; 6918 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6919 sc->osdep.nintrs) != 0) { 6920 aprint_error_dev(dev, 6921 "failed to allocate MSI-X interrupt\n"); 6922 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6923 return (ENXIO); 6924 } 6925 6926 kcpuset_create(&affinity, false); 6927 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6928 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6929 device_xname(dev), i); 6930 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6931 sizeof(intrbuf)); 6932 #ifdef IXGBE_MPSAFE 6933 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6934 true); 6935 #endif 6936 /* Set the handler function */ 6937 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6938 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6939 intr_xname); 6940 if (que->res == NULL) { 6941 aprint_error_dev(dev, 6942 "Failed to register QUE handler\n"); 6943 error = ENXIO; 6944 goto err_out; 6945 } 6946 que->msix = vector; 6947 sc->active_queues |= 1ULL << que->msix; 6948 6949 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6950 #ifdef RSS 6951 /* 6952 * The queue ID is used as the RSS layer bucket ID. 6953 * We look up the queue ID -> RSS CPU ID and select 6954 * that. 6955 */ 6956 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6957 CPU_SETOF(cpu_id, &cpu_mask); 6958 #endif 6959 } else { 6960 /* 6961 * Bind the MSI-X vector, and thus the 6962 * rings to the corresponding CPU. 6963 * 6964 * This just happens to match the default RSS 6965 * round-robin bucket -> queue -> CPU allocation. 6966 */ 6967 if (sc->num_queues > 1) 6968 cpu_id = i; 6969 } 6970 /* Round-robin affinity */ 6971 kcpuset_zero(affinity); 6972 kcpuset_set(affinity, cpu_id % ncpu); 6973 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6974 NULL); 6975 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6976 intrstr); 6977 if (error == 0) { 6978 #if 1 /* def IXGBE_DEBUG */ 6979 #ifdef RSS 6980 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6981 cpu_id % ncpu); 6982 #else 6983 aprint_normal(", bound queue %d to cpu %d", i, 6984 cpu_id % ncpu); 6985 #endif 6986 #endif /* IXGBE_DEBUG */ 6987 } 6988 aprint_normal("\n"); 6989 6990 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6991 txr->txr_si = softint_establish( 6992 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6993 ixgbe_deferred_mq_start, txr); 6994 if (txr->txr_si == NULL) { 6995 aprint_error_dev(dev, 6996 "couldn't establish software interrupt\n"); 6997 error = ENXIO; 6998 goto err_out; 6999 } 7000 } 7001 que->que_si 7002 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 7003 ixgbe_handle_que, que); 7004 if (que->que_si == NULL) { 7005 aprint_error_dev(dev, 7006 "couldn't establish software interrupt\n"); 7007 error = ENXIO; 7008 goto err_out; 7009 } 7010 } 7011 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 7012 error = workqueue_create(&sc->txr_wq, wqname, 7013 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7014 IXGBE_WORKQUEUE_FLAGS); 7015 if (error) { 7016 aprint_error_dev(dev, 7017 "couldn't create workqueue for deferred Tx\n"); 7018 goto err_out; 7019 } 7020 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 7021 7022 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7023 error = workqueue_create(&sc->que_wq, wqname, 7024 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7025 IXGBE_WORKQUEUE_FLAGS); 7026 if (error) { 7027 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7028 goto err_out; 7029 } 7030 7031 /* and Link */ 7032 cpu_id++; 7033 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7034 sc->vector = vector; 7035 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7036 sizeof(intrbuf)); 7037 #ifdef IXGBE_MPSAFE 7038 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, 7039 true); 7040 #endif 7041 /* Set the link handler function */ 7042 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7043 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7044 intr_xname); 7045 if (sc->osdep.ihs[vector] == NULL) { 7046 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7047 error = ENXIO; 7048 goto err_out; 7049 } 7050 /* Round-robin affinity */ 7051 kcpuset_zero(affinity); 7052 kcpuset_set(affinity, cpu_id % ncpu); 7053 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7054 NULL); 7055 7056 aprint_normal_dev(dev, 7057 "for link, interrupting at %s", intrstr); 7058 if (error == 0) 7059 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7060 else 7061 aprint_normal("\n"); 7062 7063 kcpuset_destroy(affinity); 7064 aprint_normal_dev(dev, 7065 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7066 7067 return (0); 7068 7069 err_out: 7070 kcpuset_destroy(affinity); 7071 ixgbe_free_deferred_handlers(sc); 7072 ixgbe_free_pciintr_resources(sc); 7073 return (error); 7074 } /* ixgbe_allocate_msix */ 7075 7076 /************************************************************************ 7077 * ixgbe_configure_interrupts 7078 * 7079 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7080 * This will also depend on user settings. 7081 ************************************************************************/ 7082 static int 7083 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7084 { 7085 device_t dev = sc->dev; 7086 struct ixgbe_mac_info *mac = &sc->hw.mac; 7087 int want, queues, msgs; 7088 7089 /* Default to 1 queue if MSI-X setup fails */ 7090 sc->num_queues = 1; 7091 7092 /* Override by tuneable */ 7093 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7094 goto msi; 7095 7096 /* 7097 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7098 * interrupt slot. 7099 */ 7100 if (ncpu == 1) 7101 goto msi; 7102 7103 /* First try MSI-X */ 7104 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7105 msgs = MIN(msgs, IXG_MAX_NINTR); 7106 if (msgs < 2) 7107 goto msi; 7108 7109 sc->feat_en |= IXGBE_FEATURE_MSIX; 7110 7111 /* Figure out a reasonable auto config value */ 7112 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7113 7114 #ifdef RSS 7115 /* If we're doing RSS, clamp at the number of RSS buckets */ 7116 if (sc->feat_en & IXGBE_FEATURE_RSS) 7117 queues = uimin(queues, rss_getnumbuckets()); 7118 #endif 7119 if (ixgbe_num_queues > queues) { 7120 aprint_error_dev(sc->dev, 7121 "ixgbe_num_queues (%d) is too large, " 7122 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7123 ixgbe_num_queues = queues; 7124 } 7125 7126 if (ixgbe_num_queues != 0) 7127 queues = ixgbe_num_queues; 7128 else 7129 queues = uimin(queues, 7130 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7131 7132 /* 7133 * Want one vector (RX/TX pair) per queue 7134 * plus an additional for Link. 7135 */ 7136 want = queues + 1; 7137 if (msgs >= want) 7138 msgs = want; 7139 else { 7140 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7141 "%d vectors but %d queues wanted!\n", msgs, want); 7142 goto msi; 7143 } 7144 sc->num_queues = queues; 7145 sc->feat_en |= IXGBE_FEATURE_MSIX; 7146 return (0); 7147 7148 /* 7149 * MSI-X allocation failed or provided us with 7150 * less vectors than needed. Free MSI-X resources 7151 * and we'll try enabling MSI. 7152 */ 7153 msi: 7154 /* Without MSI-X, some features are no longer supported */ 7155 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7156 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7157 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7158 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7159 7160 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7161 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7162 if (msgs > 1) 7163 msgs = 1; 7164 if (msgs != 0) { 7165 msgs = 1; 7166 sc->feat_en |= IXGBE_FEATURE_MSI; 7167 return (0); 7168 } 7169 7170 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7171 aprint_error_dev(dev, 7172 "Device does not support legacy interrupts.\n"); 7173 return 1; 7174 } 7175 7176 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7177 7178 return (0); 7179 } /* ixgbe_configure_interrupts */ 7180 7181 7182 /************************************************************************ 7183 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7184 * 7185 * Done outside of interrupt context since the driver might sleep 7186 ************************************************************************/ 7187 static void 7188 ixgbe_handle_link(void *context) 7189 { 7190 struct ixgbe_softc *sc = context; 7191 struct ixgbe_hw *hw = &sc->hw; 7192 7193 KASSERT(mutex_owned(&sc->core_mtx)); 7194 7195 IXGBE_EVC_ADD(&sc->link_workev, 1); 7196 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7197 ixgbe_update_link_status(sc); 7198 7199 /* Re-enable link interrupts */ 7200 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7201 } /* ixgbe_handle_link */ 7202 7203 #if 0 7204 /************************************************************************ 7205 * ixgbe_rearm_queues 7206 ************************************************************************/ 7207 static __inline void 7208 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7209 { 7210 u32 mask; 7211 7212 switch (sc->hw.mac.type) { 7213 case ixgbe_mac_82598EB: 7214 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7215 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7216 break; 7217 case ixgbe_mac_82599EB: 7218 case ixgbe_mac_X540: 7219 case ixgbe_mac_X550: 7220 case ixgbe_mac_X550EM_x: 7221 case ixgbe_mac_X550EM_a: 7222 mask = (queues & 0xFFFFFFFF); 7223 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7224 mask = (queues >> 32); 7225 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7226 break; 7227 default: 7228 break; 7229 } 7230 } /* ixgbe_rearm_queues */ 7231 #endif 7232
Indexes created Tue Sep 30 11:09:46 GMT 2025