ixgbe.c revision 1.353
1 /* $NetBSD: ixgbe.c,v 1.353 2024/07/10 03:23:02 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2017, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/ 36 37 /* 38 * Copyright (c) 2011 The NetBSD Foundation, Inc. 39 * All rights reserved. 40 * 41 * This code is derived from software contributed to The NetBSD Foundation 42 * by Coyote Point Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.353 2024/07/10 03:23:02 msaitoh Exp $"); 68 69 #ifdef _KERNEL_OPT 70 #include "opt_inet.h" 71 #include "opt_inet6.h" 72 #include "opt_net_mpsafe.h" 73 #endif 74 75 #include "ixgbe.h" 76 #include "ixgbe_phy.h" 77 #include "ixgbe_sriov.h" 78 79 #include <sys/cprng.h> 80 #include <dev/mii/mii.h> 81 #include <dev/mii/miivar.h> 82 83 /************************************************************************ 84 * Driver version 85 ************************************************************************/ 86 static const char ixgbe_driver_version[] = "4.0.1-k"; 87 /* XXX NetBSD: + 3.3.24 */ 88 89 /************************************************************************ 90 * PCI Device ID Table 91 * 92 * Used by probe to select devices to load on 93 * Last field stores an index into ixgbe_strings 94 * Last entry must be all 0s 95 * 96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 97 ************************************************************************/ 98 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 99 { 100 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 101 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 102 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 103 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 104 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 105 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 106 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0}, 107 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 108 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 109 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 110 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 111 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 112 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0}, 113 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 114 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 115 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 116 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0}, 117 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 118 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 119 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 120 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS, 0, 0, 0}, 121 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 122 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 123 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 124 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 125 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 126 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 127 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 128 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 129 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 130 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 131 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 132 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 133 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 134 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 135 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0}, 136 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 137 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0}, 138 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0}, 139 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0}, 140 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0}, 141 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0}, 142 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0}, 143 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0}, 144 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0}, 145 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0}, 146 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0}, 147 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0}, 148 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0}, 149 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0}, 150 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0}, 151 /* required last entry */ 152 {0, 0, 0, 0, 0} 153 }; 154 155 /************************************************************************ 156 * Table of branding strings 157 ************************************************************************/ 158 static const char *ixgbe_strings[] = { 159 "Intel(R) PRO/10GbE PCI-Express Network Driver" 160 }; 161 162 /************************************************************************ 163 * Function prototypes 164 ************************************************************************/ 165 static int ixgbe_probe(device_t, cfdata_t, void *); 166 static void ixgbe_quirks(struct ixgbe_softc *); 167 static void ixgbe_attach(device_t, device_t, void *); 168 static int ixgbe_detach(device_t, int); 169 #if 0 170 static int ixgbe_shutdown(device_t); 171 #endif 172 static bool ixgbe_suspend(device_t, const pmf_qual_t *); 173 static bool ixgbe_resume(device_t, const pmf_qual_t *); 174 static int ixgbe_ifflags_cb(struct ethercom *); 175 static int ixgbe_ioctl(struct ifnet *, u_long, void *); 176 static int ixgbe_init(struct ifnet *); 177 static void ixgbe_init_locked(struct ixgbe_softc *); 178 static void ixgbe_ifstop(struct ifnet *, int); 179 static void ixgbe_stop_locked(void *); 180 static void ixgbe_init_device_features(struct ixgbe_softc *); 181 static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool); 182 static void ixgbe_add_media_types(struct ixgbe_softc *); 183 static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 184 static int ixgbe_media_change(struct ifnet *); 185 static int ixgbe_allocate_pci_resources(struct ixgbe_softc *, 186 const struct pci_attach_args *); 187 static void ixgbe_free_deferred_handlers(struct ixgbe_softc *); 188 static void ixgbe_get_slot_info(struct ixgbe_softc *); 189 static int ixgbe_allocate_msix(struct ixgbe_softc *, 190 const struct pci_attach_args *); 191 static int ixgbe_allocate_legacy(struct ixgbe_softc *, 192 const struct pci_attach_args *); 193 static int ixgbe_configure_interrupts(struct ixgbe_softc *); 194 static void ixgbe_free_pciintr_resources(struct ixgbe_softc *); 195 static void ixgbe_free_pci_resources(struct ixgbe_softc *); 196 static void ixgbe_local_timer(void *); 197 static void ixgbe_handle_timer(struct work *, void *); 198 static void ixgbe_recovery_mode_timer(void *); 199 static void ixgbe_handle_recovery_mode_timer(struct work *, void *); 200 static int ixgbe_setup_interface(device_t, struct ixgbe_softc *); 201 static void ixgbe_config_gpie(struct ixgbe_softc *); 202 static void ixgbe_config_dmac(struct ixgbe_softc *); 203 static void ixgbe_config_delay_values(struct ixgbe_softc *); 204 static void ixgbe_schedule_admin_tasklet(struct ixgbe_softc *); 205 static void ixgbe_config_link(struct ixgbe_softc *); 206 static void ixgbe_check_wol_support(struct ixgbe_softc *); 207 static int ixgbe_setup_low_power_mode(struct ixgbe_softc *); 208 #if 0 209 static void ixgbe_rearm_queues(struct ixgbe_softc *, u64); 210 #endif 211 212 static void ixgbe_initialize_transmit_units(struct ixgbe_softc *); 213 static void ixgbe_initialize_receive_units(struct ixgbe_softc *); 214 static void ixgbe_enable_rx_drop(struct ixgbe_softc *); 215 static void ixgbe_disable_rx_drop(struct ixgbe_softc *); 216 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *); 217 218 static void ixgbe_enable_intr(struct ixgbe_softc *); 219 static void ixgbe_disable_intr(struct ixgbe_softc *); 220 static void ixgbe_update_stats_counters(struct ixgbe_softc *); 221 static void ixgbe_set_rxfilter(struct ixgbe_softc *); 222 static void ixgbe_update_link_status(struct ixgbe_softc *); 223 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8); 224 static void ixgbe_configure_ivars(struct ixgbe_softc *); 225 static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 226 static void ixgbe_eitr_write(struct ixgbe_softc *, uint32_t, uint32_t); 227 228 static void ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *); 229 static void ixgbe_setup_vlan_hw_support(struct ixgbe_softc *); 230 static int ixgbe_vlan_cb(struct ethercom *, uint16_t, bool); 231 static int ixgbe_register_vlan(struct ixgbe_softc *, u16); 232 static int ixgbe_unregister_vlan(struct ixgbe_softc *, u16); 233 234 static void ixgbe_add_device_sysctls(struct ixgbe_softc *); 235 static void ixgbe_add_hw_stats(struct ixgbe_softc *); 236 static void ixgbe_clear_evcnt(struct ixgbe_softc *); 237 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int); 238 static int ixgbe_set_advertise(struct ixgbe_softc *, int); 239 static int ixgbe_get_default_advertise(struct ixgbe_softc *); 240 241 /* Sysctl handlers */ 242 static int ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO); 243 static int ixgbe_sysctl_advertise(SYSCTLFN_PROTO); 244 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO); 245 static int ixgbe_sysctl_dmac(SYSCTLFN_PROTO); 246 static int ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO); 247 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO); 248 #ifdef IXGBE_DEBUG 249 static int ixgbe_sysctl_power_state(SYSCTLFN_PROTO); 250 static int ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO); 251 #endif 252 static int ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO); 253 static int ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_PROTO); 254 static int ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO); 255 static int ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO); 256 static int ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO); 257 static int ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO); 258 static int ixgbe_sysctl_eee_state(SYSCTLFN_PROTO); 259 static int ixgbe_sysctl_debug(SYSCTLFN_PROTO); 260 static int ixgbe_sysctl_rx_copy_len(SYSCTLFN_PROTO); 261 static int ixgbe_sysctl_tx_process_limit(SYSCTLFN_PROTO); 262 static int ixgbe_sysctl_rx_process_limit(SYSCTLFN_PROTO); 263 static int ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO); 264 static int ixgbe_sysctl_wufc(SYSCTLFN_PROTO); 265 266 /* Interrupt functions */ 267 static int ixgbe_msix_que(void *); 268 static int ixgbe_msix_admin(void *); 269 static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *); 270 static int ixgbe_legacy_irq(void *); 271 272 /* Event handlers running on workqueue */ 273 static void ixgbe_handle_que(void *); 274 static void ixgbe_handle_link(void *); 275 static void ixgbe_handle_msf(void *); 276 static void ixgbe_handle_mod(void *, bool); 277 static void ixgbe_handle_phy(void *); 278 279 /* Deferred workqueue handlers */ 280 static void ixgbe_handle_admin(struct work *, void *); 281 static void ixgbe_handle_que_work(struct work *, void *); 282 283 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *); 284 285 /************************************************************************ 286 * NetBSD Device Interface Entry Points 287 ************************************************************************/ 288 CFATTACH_DECL3_NEW(ixg, sizeof(struct ixgbe_softc), 289 ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL, 290 DVF_DETACH_SHUTDOWN); 291 292 #if 0 293 devclass_t ix_devclass; 294 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 295 296 MODULE_DEPEND(ix, pci, 1, 1, 1); 297 MODULE_DEPEND(ix, ether, 1, 1, 1); 298 #ifdef DEV_NETMAP 299 MODULE_DEPEND(ix, netmap, 1, 1, 1); 300 #endif 301 #endif 302 303 /* 304 * TUNEABLE PARAMETERS: 305 */ 306 307 /* 308 * AIM: Adaptive Interrupt Moderation 309 * which means that the interrupt rate 310 * is varied over time based on the 311 * traffic for that interrupt vector 312 */ 313 static bool ixgbe_enable_aim = true; 314 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7) 315 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0, 316 "Enable adaptive interrupt moderation"); 317 318 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 319 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 320 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 321 322 /* How many packets rxeof tries to clean at a time */ 323 static int ixgbe_rx_process_limit = 256; 324 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 325 &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited"); 326 327 /* How many packets txeof tries to clean at a time */ 328 static int ixgbe_tx_process_limit = 256; 329 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 330 &ixgbe_tx_process_limit, 0, 331 "Maximum number of sent packets to process at a time, -1 means unlimited"); 332 333 /* Flow control setting, default to full */ 334 static int ixgbe_flow_control = ixgbe_fc_full; 335 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN, 336 &ixgbe_flow_control, 0, "Default flow control used for all adapters"); 337 338 /* Which packet processing uses workqueue or softint */ 339 static bool ixgbe_txrx_workqueue = false; 340 341 /* 342 * Smart speed setting, default to on 343 * this only works as a compile option 344 * right now as its during attach, set 345 * this to 'ixgbe_smart_speed_off' to 346 * disable. 347 */ 348 static int ixgbe_smart_speed = ixgbe_smart_speed_on; 349 350 /* 351 * MSI-X should be the default for best performance, 352 * but this allows it to be forced off for testing. 353 */ 354 static int ixgbe_enable_msix = 1; 355 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 356 "Enable MSI-X interrupts"); 357 358 /* 359 * Number of Queues, can be set to 0, 360 * it then autoconfigures based on the 361 * number of cpus and number of MSI-X vectors. 362 * This can be overridden manually here. 363 */ 364 static int ixgbe_num_queues = 0; 365 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 366 "Number of queues to configure, 0 indicates autoconfigure"); 367 368 /* 369 * Number of TX descriptors per ring, 370 * setting higher than RX as this seems 371 * the better performing choice. 372 */ 373 static int ixgbe_txd = DEFAULT_TXD; 374 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 375 "Number of transmit descriptors per queue"); 376 377 /* Number of RX descriptors per ring */ 378 static int ixgbe_rxd = DEFAULT_RXD; 379 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 380 "Number of receive descriptors per queue"); 381 382 /* 383 * Defining this on will allow the use 384 * of unsupported SFP+ modules, note that 385 * doing so you are on your own :) 386 */ 387 static int allow_unsupported_sfp = false; 388 #define TUNABLE_INT(__x, __y) 389 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 390 391 /* 392 * Not sure if Flow Director is fully baked, 393 * so we'll default to turning it off. 394 */ 395 static int ixgbe_enable_fdir = 0; 396 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0, 397 "Enable Flow Director"); 398 399 /* Legacy Transmit (single queue) */ 400 static int ixgbe_enable_legacy_tx = 0; 401 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN, 402 &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow"); 403 404 /* Receive-Side Scaling */ 405 static int ixgbe_enable_rss = 1; 406 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0, 407 "Enable Receive-Side Scaling (RSS)"); 408 409 #if 0 410 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *); 411 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *); 412 #endif 413 414 #ifdef NET_MPSAFE 415 #define IXGBE_CALLOUT_FLAGS CALLOUT_MPSAFE 416 #define IXGBE_SOFTINT_FLAGS SOFTINT_MPSAFE 417 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU | WQ_MPSAFE 418 #define IXGBE_TASKLET_WQ_FLAGS WQ_MPSAFE 419 #else 420 #define IXGBE_CALLOUT_FLAGS 0 421 #define IXGBE_SOFTINT_FLAGS 0 422 #define IXGBE_WORKQUEUE_FLAGS WQ_PERCPU 423 #define IXGBE_TASKLET_WQ_FLAGS 0 424 #endif 425 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET 426 427 /* Interval between reports of errors */ 428 static const struct timeval ixgbe_errlog_intrvl = { 60, 0 }; /* 60s */ 429 430 /************************************************************************ 431 * ixgbe_initialize_rss_mapping 432 ************************************************************************/ 433 static void 434 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc) 435 { 436 struct ixgbe_hw *hw = &sc->hw; 437 u32 reta = 0, mrqc, rss_key[10]; 438 int queue_id, table_size, index_mult; 439 int i, j; 440 u32 rss_hash_config; 441 442 /* force use default RSS key. */ 443 #ifdef __NetBSD__ 444 rss_getkey((uint8_t *) &rss_key); 445 #else 446 if (sc->feat_en & IXGBE_FEATURE_RSS) { 447 /* Fetch the configured RSS key */ 448 rss_getkey((uint8_t *) &rss_key); 449 } else { 450 /* set up random bits */ 451 cprng_fast(&rss_key, sizeof(rss_key)); 452 } 453 #endif 454 455 /* Set multiplier for RETA setup and table size based on MAC */ 456 index_mult = 0x1; 457 table_size = 128; 458 switch (sc->hw.mac.type) { 459 case ixgbe_mac_82598EB: 460 index_mult = 0x11; 461 break; 462 case ixgbe_mac_X550: 463 case ixgbe_mac_X550EM_x: 464 case ixgbe_mac_X550EM_a: 465 table_size = 512; 466 break; 467 default: 468 break; 469 } 470 471 /* Set up the redirection table */ 472 for (i = 0, j = 0; i < table_size; i++, j++) { 473 if (j == sc->num_queues) 474 j = 0; 475 476 if (sc->feat_en & IXGBE_FEATURE_RSS) { 477 /* 478 * Fetch the RSS bucket id for the given indirection 479 * entry. Cap it at the number of configured buckets 480 * (which is num_queues.) 481 */ 482 queue_id = rss_get_indirection_to_bucket(i); 483 queue_id = queue_id % sc->num_queues; 484 } else 485 queue_id = (j * index_mult); 486 487 /* 488 * The low 8 bits are for hash value (n+0); 489 * The next 8 bits are for hash value (n+1), etc. 490 */ 491 reta = reta >> 8; 492 reta = reta | (((uint32_t) queue_id) << 24); 493 if ((i & 3) == 3) { 494 if (i < 128) 495 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 496 else 497 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), 498 reta); 499 reta = 0; 500 } 501 } 502 503 /* Now fill our hash function seeds */ 504 for (i = 0; i < 10; i++) 505 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 506 507 /* Perform hash on these packet types */ 508 if (sc->feat_en & IXGBE_FEATURE_RSS) 509 rss_hash_config = rss_gethashconfig(); 510 else { 511 /* 512 * Disable UDP - IP fragments aren't currently being handled 513 * and so we end up with a mix of 2-tuple and 4-tuple 514 * traffic. 515 */ 516 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 517 | RSS_HASHTYPE_RSS_TCP_IPV4 518 | RSS_HASHTYPE_RSS_IPV6 519 | RSS_HASHTYPE_RSS_TCP_IPV6 520 | RSS_HASHTYPE_RSS_IPV6_EX 521 | RSS_HASHTYPE_RSS_TCP_IPV6_EX; 522 } 523 524 mrqc = IXGBE_MRQC_RSSEN; 525 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 526 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 527 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 528 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 529 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 530 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 531 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 532 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 533 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 534 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 535 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 536 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 537 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 538 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 539 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 540 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 541 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 542 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 543 mrqc |= ixgbe_get_mrqc(sc->iov_mode); 544 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 545 } /* ixgbe_initialize_rss_mapping */ 546 547 /************************************************************************ 548 * ixgbe_initialize_receive_units - Setup receive registers and features. 549 ************************************************************************/ 550 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 551 552 static void 553 ixgbe_initialize_receive_units(struct ixgbe_softc *sc) 554 { 555 struct rx_ring *rxr = sc->rx_rings; 556 struct ixgbe_hw *hw = &sc->hw; 557 struct ifnet *ifp = sc->ifp; 558 int i, j; 559 u32 bufsz, fctrl, srrctl, rxcsum; 560 u32 hlreg; 561 562 /* 563 * Make sure receives are disabled while 564 * setting up the descriptor ring 565 */ 566 ixgbe_disable_rx(hw); 567 568 /* Enable broadcasts */ 569 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 570 fctrl |= IXGBE_FCTRL_BAM; 571 if (sc->hw.mac.type == ixgbe_mac_82598EB) { 572 fctrl |= IXGBE_FCTRL_DPF; 573 fctrl |= IXGBE_FCTRL_PMCF; 574 } 575 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 576 577 /* Set for Jumbo Frames? */ 578 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 579 if (ifp->if_mtu > ETHERMTU) 580 hlreg |= IXGBE_HLREG0_JUMBOEN; 581 else 582 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 583 584 #ifdef DEV_NETMAP 585 /* CRC stripping is conditional in Netmap */ 586 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 587 (ifp->if_capenable & IFCAP_NETMAP) && 588 !ix_crcstrip) 589 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 590 else 591 #endif /* DEV_NETMAP */ 592 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 593 594 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 595 596 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> 597 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 598 599 for (i = 0; i < sc->num_queues; i++, rxr++) { 600 u64 rdba = rxr->rxdma.dma_paddr; 601 u32 reg; 602 int regnum = i / 4; /* 1 register per 4 queues */ 603 int regshift = i % 4; /* 4 bits per 1 queue */ 604 j = rxr->me; 605 606 /* Setup the Base and Length of the Rx Descriptor Ring */ 607 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 608 (rdba & 0x00000000ffffffffULL)); 609 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 610 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 611 sc->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 612 613 /* Set up the SRRCTL register */ 614 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 615 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 616 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 617 srrctl |= bufsz; 618 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 619 620 /* Set RQSMR (Receive Queue Statistic Mapping) register */ 621 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum)); 622 reg &= ~(0x000000ffUL << (regshift * 8)); 623 reg |= i << (regshift * 8); 624 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg); 625 626 /* 627 * Set DROP_EN iff we have no flow control and >1 queue. 628 * Note that srrctl was cleared shortly before during reset, 629 * so we do not need to clear the bit, but do it just in case 630 * this code is moved elsewhere. 631 */ 632 if ((sc->num_queues > 1) && 633 (sc->hw.fc.requested_mode == ixgbe_fc_none)) 634 srrctl |= IXGBE_SRRCTL_DROP_EN; 635 else 636 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 637 638 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 639 640 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 641 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 642 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 643 644 /* Set the driver rx tail address */ 645 rxr->tail = IXGBE_RDT(rxr->me); 646 } 647 648 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 649 u32 psrtype = IXGBE_PSRTYPE_TCPHDR 650 | IXGBE_PSRTYPE_UDPHDR 651 | IXGBE_PSRTYPE_IPV4HDR 652 | IXGBE_PSRTYPE_IPV6HDR; 653 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 654 } 655 656 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 657 658 ixgbe_initialize_rss_mapping(sc); 659 660 if (sc->num_queues > 1) { 661 /* RSS and RX IPP Checksum are mutually exclusive */ 662 rxcsum |= IXGBE_RXCSUM_PCSD; 663 } 664 665 if (ifp->if_capenable & IFCAP_RXCSUM) 666 rxcsum |= IXGBE_RXCSUM_PCSD; 667 668 /* This is useful for calculating UDP/IP fragment checksums */ 669 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 670 rxcsum |= IXGBE_RXCSUM_IPPCSE; 671 672 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 673 674 } /* ixgbe_initialize_receive_units */ 675 676 /************************************************************************ 677 * ixgbe_initialize_transmit_units - Enable transmit units. 678 ************************************************************************/ 679 static void 680 ixgbe_initialize_transmit_units(struct ixgbe_softc *sc) 681 { 682 struct tx_ring *txr = sc->tx_rings; 683 struct ixgbe_hw *hw = &sc->hw; 684 int i; 685 686 INIT_DEBUGOUT("ixgbe_initialize_transmit_units"); 687 688 /* Setup the Base and Length of the Tx Descriptor Ring */ 689 for (i = 0; i < sc->num_queues; i++, txr++) { 690 u64 tdba = txr->txdma.dma_paddr; 691 u32 txctrl = 0; 692 u32 tqsmreg, reg; 693 int regnum = i / 4; /* 1 register per 4 queues */ 694 int regshift = i % 4; /* 4 bits per 1 queue */ 695 int j = txr->me; 696 697 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 698 (tdba & 0x00000000ffffffffULL)); 699 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 700 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 701 sc->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 702 703 /* 704 * Set TQSMR (Transmit Queue Statistic Mapping) register. 705 * Register location is different between 82598 and others. 706 */ 707 if (sc->hw.mac.type == ixgbe_mac_82598EB) 708 tqsmreg = IXGBE_TQSMR(regnum); 709 else 710 tqsmreg = IXGBE_TQSM(regnum); 711 reg = IXGBE_READ_REG(hw, tqsmreg); 712 reg &= ~(0x000000ffUL << (regshift * 8)); 713 reg |= i << (regshift * 8); 714 IXGBE_WRITE_REG(hw, tqsmreg, reg); 715 716 /* Setup the HW Tx Head and Tail descriptor pointers */ 717 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 718 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 719 720 /* Cache the tail address */ 721 txr->tail = IXGBE_TDT(j); 722 723 txr->txr_no_space = false; 724 725 /* Disable relax ordering */ 726 /* 727 * Note: for X550 series devices, these registers are actually 728 * prefixed with TPH_ instead of DCA_, but the addresses and 729 * fields remain the same. 730 */ 731 switch (hw->mac.type) { 732 case ixgbe_mac_82598EB: 733 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 734 break; 735 default: 736 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 737 break; 738 } 739 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 740 switch (hw->mac.type) { 741 case ixgbe_mac_82598EB: 742 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 743 break; 744 default: 745 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 746 break; 747 } 748 749 } 750 751 if (hw->mac.type != ixgbe_mac_82598EB) { 752 u32 dmatxctl, rttdcs; 753 754 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 755 dmatxctl |= IXGBE_DMATXCTL_TE; 756 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 757 /* Disable arbiter to set MTQC */ 758 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 759 rttdcs |= IXGBE_RTTDCS_ARBDIS; 760 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 761 IXGBE_WRITE_REG(hw, IXGBE_MTQC, 762 ixgbe_get_mtqc(sc->iov_mode)); 763 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 764 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 765 } 766 } /* ixgbe_initialize_transmit_units */ 767 768 static void 769 ixgbe_quirks(struct ixgbe_softc *sc) 770 { 771 device_t dev = sc->dev; 772 struct ixgbe_hw *hw = &sc->hw; 773 const char *vendor, *product; 774 775 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { 776 /* 777 * Quirk for inverted logic of SFP+'s MOD_ABS on GIGABYTE 778 * MA10-ST0. 779 */ 780 vendor = pmf_get_platform("system-vendor"); 781 product = pmf_get_platform("system-product"); 782 783 if ((vendor == NULL) || (product == NULL)) 784 return; 785 786 if ((strcmp(vendor, "GIGABYTE") == 0) && 787 (strcmp(product, "MA10-ST0") == 0)) { 788 aprint_verbose_dev(dev, 789 "Enable SFP+ MOD_ABS inverse quirk\n"); 790 sc->hw.quirks |= IXGBE_QUIRK_MOD_ABS_INVERT; 791 } 792 } 793 } 794 795 /************************************************************************ 796 * ixgbe_attach - Device initialization routine 797 * 798 * Called when the driver is being loaded. 799 * Identifies the type of hardware, allocates all resources 800 * and initializes the hardware. 801 * 802 * return 0 on success, positive on failure 803 ************************************************************************/ 804 static void 805 ixgbe_attach(device_t parent, device_t dev, void *aux) 806 { 807 struct ixgbe_softc *sc; 808 struct ixgbe_hw *hw; 809 int error = -1; 810 u32 ctrl_ext; 811 u16 high, low, nvmreg, dev_caps; 812 pcireg_t id, subid; 813 const ixgbe_vendor_info_t *ent; 814 struct pci_attach_args *pa = aux; 815 bool unsupported_sfp = false; 816 const char *str; 817 char wqname[MAXCOMLEN]; 818 char buf[256]; 819 820 INIT_DEBUGOUT("ixgbe_attach: begin"); 821 822 /* Allocate, clear, and link in our adapter structure */ 823 sc = device_private(dev); 824 sc->hw.back = sc; 825 sc->dev = dev; 826 hw = &sc->hw; 827 sc->osdep.pc = pa->pa_pc; 828 sc->osdep.tag = pa->pa_tag; 829 if (pci_dma64_available(pa)) 830 sc->osdep.dmat = pa->pa_dmat64; 831 else 832 sc->osdep.dmat = pa->pa_dmat; 833 sc->osdep.attached = false; 834 sc->osdep.detaching = false; 835 836 ent = ixgbe_lookup(pa); 837 838 KASSERT(ent != NULL); 839 840 aprint_normal(": %s, Version - %s\n", 841 ixgbe_strings[ent->index], ixgbe_driver_version); 842 843 /* Core Lock Init */ 844 IXGBE_CORE_LOCK_INIT(sc, device_xname(dev)); 845 846 /* Set up the timer callout and workqueue */ 847 callout_init(&sc->timer, IXGBE_CALLOUT_FLAGS); 848 snprintf(wqname, sizeof(wqname), "%s-timer", device_xname(dev)); 849 error = workqueue_create(&sc->timer_wq, wqname, 850 ixgbe_handle_timer, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 851 IXGBE_TASKLET_WQ_FLAGS); 852 if (error) { 853 aprint_error_dev(dev, 854 "could not create timer workqueue (%d)\n", error); 855 goto err_out; 856 } 857 858 /* Determine hardware revision */ 859 id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG); 860 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 861 862 hw->vendor_id = PCI_VENDOR(id); 863 hw->device_id = PCI_PRODUCT(id); 864 hw->revision_id = 865 PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG)); 866 hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid); 867 hw->subsystem_device_id = PCI_SUBSYS_ID(subid); 868 869 /* Set quirk flags */ 870 ixgbe_quirks(sc); 871 872 /* 873 * Make sure BUSMASTER is set 874 */ 875 ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag); 876 877 /* Do base PCI setup - map BAR0 */ 878 if (ixgbe_allocate_pci_resources(sc, pa)) { 879 aprint_error_dev(dev, "Allocation of PCI resources failed\n"); 880 error = ENXIO; 881 goto err_out; 882 } 883 884 /* let hardware know driver is loaded */ 885 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 886 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 887 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 888 889 /* 890 * Initialize the shared code 891 */ 892 if (ixgbe_init_shared_code(hw) != 0) { 893 aprint_error_dev(dev, 894 "Unable to initialize the shared code\n"); 895 error = ENXIO; 896 goto err_out; 897 } 898 899 switch (hw->mac.type) { 900 case ixgbe_mac_82598EB: 901 str = "82598EB"; 902 break; 903 case ixgbe_mac_82599EB: 904 str = "82599EB"; 905 break; 906 case ixgbe_mac_X540: 907 str = "X540"; 908 break; 909 case ixgbe_mac_X550: 910 str = "X550"; 911 break; 912 case ixgbe_mac_X550EM_x: 913 str = "X550EM X"; 914 break; 915 case ixgbe_mac_X550EM_a: 916 str = "X550EM A"; 917 break; 918 default: 919 str = "Unknown"; 920 break; 921 } 922 aprint_normal_dev(dev, "device %s\n", str); 923 924 hw->allow_unsupported_sfp = allow_unsupported_sfp; 925 926 /* Pick up the 82599 settings */ 927 if (hw->mac.type != ixgbe_mac_82598EB) 928 hw->phy.smart_speed = ixgbe_smart_speed; 929 930 /* Set the right number of segments */ 931 KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT); 932 sc->num_segs = IXGBE_SCATTER_DEFAULT; 933 934 /* Ensure SW/FW semaphore is free */ 935 ixgbe_init_swfw_semaphore(hw); 936 937 hw->mac.ops.set_lan_id(hw); 938 ixgbe_init_device_features(sc); 939 940 if (ixgbe_configure_interrupts(sc)) { 941 error = ENXIO; 942 goto err_out; 943 } 944 945 /* Allocate multicast array memory. */ 946 sc->mta = malloc(sizeof(*sc->mta) * 947 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_WAITOK); 948 949 /* Enable WoL (if supported) */ 950 ixgbe_check_wol_support(sc); 951 952 /* Register for VLAN events */ 953 ether_set_vlan_cb(&sc->osdep.ec, ixgbe_vlan_cb); 954 955 /* Verify adapter fan is still functional (if applicable) */ 956 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) { 957 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); 958 ixgbe_check_fan_failure(sc, esdp, FALSE); 959 } 960 961 /* Set an initial default flow control value */ 962 hw->fc.requested_mode = ixgbe_flow_control; 963 964 /* Do descriptor calc and sanity checks */ 965 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 966 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 967 aprint_error_dev(dev, "Invalid TX ring size (%d). " 968 "It must be between %d and %d, " 969 "inclusive, and must be a multiple of %zu. " 970 "Using default value of %d instead.\n", 971 ixgbe_txd, MIN_TXD, MAX_TXD, 972 DBA_ALIGN / sizeof(union ixgbe_adv_tx_desc), 973 DEFAULT_TXD); 974 sc->num_tx_desc = DEFAULT_TXD; 975 } else 976 sc->num_tx_desc = ixgbe_txd; 977 978 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 979 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 980 aprint_error_dev(dev, "Invalid RX ring size (%d). " 981 "It must be between %d and %d, " 982 "inclusive, and must be a multiple of %zu. " 983 "Using default value of %d instead.\n", 984 ixgbe_rxd, MIN_RXD, MAX_RXD, 985 DBA_ALIGN / sizeof(union ixgbe_adv_rx_desc), 986 DEFAULT_RXD); 987 sc->num_rx_desc = DEFAULT_RXD; 988 } else 989 sc->num_rx_desc = ixgbe_rxd; 990 991 /* Sysctls for limiting the amount of work done in the taskqueues */ 992 sc->rx_process_limit 993 = (ixgbe_rx_process_limit <= sc->num_rx_desc) 994 ? ixgbe_rx_process_limit : sc->num_rx_desc; 995 sc->tx_process_limit 996 = (ixgbe_tx_process_limit <= sc->num_tx_desc) 997 ? ixgbe_tx_process_limit : sc->num_tx_desc; 998 999 /* Set default high limit of copying mbuf in rxeof */ 1000 sc->rx_copy_len = IXGBE_RX_COPY_LEN_MAX; 1001 1002 /* Allocate our TX/RX Queues */ 1003 if (ixgbe_allocate_queues(sc)) { 1004 error = ENOMEM; 1005 goto err_out; 1006 } 1007 1008 hw->phy.reset_if_overtemp = TRUE; 1009 error = ixgbe_reset_hw(hw); 1010 hw->phy.reset_if_overtemp = FALSE; 1011 if (error == IXGBE_ERR_SFP_NOT_PRESENT) 1012 error = IXGBE_SUCCESS; 1013 else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1014 aprint_error_dev(dev, 1015 "Unsupported SFP+ module type was detected.\n"); 1016 unsupported_sfp = true; 1017 error = IXGBE_SUCCESS; 1018 } else if (error) { 1019 aprint_error_dev(dev, 1020 "Hardware initialization failed(error = %d)\n", error); 1021 error = EIO; 1022 goto err_late; 1023 } 1024 1025 /* Make sure we have a good EEPROM before we read from it */ 1026 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) { 1027 aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n"); 1028 error = EIO; 1029 goto err_late; 1030 } 1031 1032 aprint_normal("%s:", device_xname(dev)); 1033 /* NVM Image Version */ 1034 high = low = 0; 1035 switch (hw->mac.type) { 1036 case ixgbe_mac_82598EB: 1037 /* 1038 * Print version from the dev starter version (0x29). The 1039 * location is the same as newer device's IXGBE_NVM_MAP_VER. 1040 */ 1041 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1042 if (nvmreg == 0xffff) 1043 break; 1044 high = (nvmreg >> 12) & 0x0f; 1045 low = (nvmreg >> 4) & 0xff; 1046 id = nvmreg & 0x0f; 1047 /* 1048 * The following output might not be correct. Some 82598 cards 1049 * have 0x1070 or 0x2090. 82598 spec update notes about 2.9.0. 1050 */ 1051 aprint_normal(" NVM Image Version %u.%u.%u,", high, low, id); 1052 break; 1053 case ixgbe_mac_X540: 1054 case ixgbe_mac_X550EM_a: 1055 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1056 if (nvmreg == 0xffff) 1057 break; 1058 high = (nvmreg >> 12) & 0x0f; 1059 low = (nvmreg >> 4) & 0xff; 1060 id = nvmreg & 0x0f; 1061 aprint_normal(" NVM Image Version %u.", high); 1062 if (hw->mac.type == ixgbe_mac_X540) 1063 str = "%x"; 1064 else 1065 str = "%02x"; 1066 aprint_normal(str, low); 1067 aprint_normal(" ID 0x%x,", id); 1068 break; 1069 case ixgbe_mac_X550EM_x: 1070 case ixgbe_mac_X550: 1071 hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg); 1072 if (nvmreg == 0xffff) 1073 break; 1074 high = (nvmreg >> 12) & 0x0f; 1075 low = nvmreg & 0xff; 1076 aprint_normal(" NVM Image Version %u.%02x,", high, low); 1077 break; 1078 default: 1079 break; 1080 } 1081 hw->eeprom.nvm_image_ver_high = high; 1082 hw->eeprom.nvm_image_ver_low = low; 1083 1084 /* PHY firmware revision */ 1085 switch (hw->mac.type) { 1086 case ixgbe_mac_X540: 1087 case ixgbe_mac_X550: 1088 hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg); 1089 if (nvmreg == 0xffff) 1090 break; 1091 high = (nvmreg >> 12) & 0x0f; 1092 low = (nvmreg >> 4) & 0xff; 1093 id = nvmreg & 0x000f; 1094 aprint_normal(" PHY FW Revision %u.", high); 1095 if (hw->mac.type == ixgbe_mac_X540) 1096 str = "%x"; 1097 else 1098 str = "%02x"; 1099 aprint_normal(str, low); 1100 aprint_normal(" ID 0x%x,", id); 1101 break; 1102 default: 1103 break; 1104 } 1105 1106 /* NVM Map version & OEM NVM Image version */ 1107 switch (hw->mac.type) { 1108 case ixgbe_mac_X550: 1109 case ixgbe_mac_X550EM_x: 1110 case ixgbe_mac_X550EM_a: 1111 hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg); 1112 if (nvmreg != 0xffff) { 1113 high = (nvmreg >> 12) & 0x0f; 1114 low = nvmreg & 0x00ff; 1115 aprint_normal(" NVM Map version %u.%02x,", high, low); 1116 } 1117 hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg); 1118 if (nvmreg != 0xffff) { 1119 high = (nvmreg >> 12) & 0x0f; 1120 low = nvmreg & 0x00ff; 1121 aprint_verbose(" OEM NVM Image version %u.%02x,", high, 1122 low); 1123 } 1124 break; 1125 default: 1126 break; 1127 } 1128 1129 /* Print the ETrackID */ 1130 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high); 1131 hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low); 1132 aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low); 1133 1134 /* Printed Board Assembly number */ 1135 error = ixgbe_read_pba_string(hw, buf, IXGBE_PBANUM_LENGTH); 1136 aprint_normal_dev(dev, "PBA number %s\n", error ? "unknown" : buf); 1137 1138 /* Recovery mode */ 1139 switch (sc->hw.mac.type) { 1140 case ixgbe_mac_X550: 1141 case ixgbe_mac_X550EM_x: 1142 case ixgbe_mac_X550EM_a: 1143 /* >= 2.00 */ 1144 if (hw->eeprom.nvm_image_ver_high >= 2) { 1145 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE; 1146 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE; 1147 } 1148 break; 1149 default: 1150 break; 1151 } 1152 1153 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 1154 error = ixgbe_allocate_msix(sc, pa); 1155 if (error) { 1156 /* Free allocated queue structures first */ 1157 ixgbe_free_queues(sc); 1158 1159 /* Fallback to legacy interrupt */ 1160 if (sc->feat_cap & IXGBE_FEATURE_MSI) 1161 sc->feat_en |= IXGBE_FEATURE_MSI; 1162 sc->num_queues = 1; 1163 1164 /* Allocate our TX/RX Queues again */ 1165 if (ixgbe_allocate_queues(sc)) { 1166 error = ENOMEM; 1167 goto err_out; 1168 } 1169 } 1170 } 1171 1172 if ((sc->feat_en & IXGBE_FEATURE_MSIX) == 0) 1173 error = ixgbe_allocate_legacy(sc, pa); 1174 if (error) 1175 goto err_late; 1176 1177 /* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */ 1178 mutex_init(&(sc)->admin_mtx, MUTEX_DEFAULT, IPL_NET); 1179 snprintf(wqname, sizeof(wqname), "%s-admin", device_xname(dev)); 1180 error = workqueue_create(&sc->admin_wq, wqname, 1181 ixgbe_handle_admin, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 1182 IXGBE_TASKLET_WQ_FLAGS); 1183 if (error) { 1184 aprint_error_dev(dev, 1185 "could not create admin workqueue (%d)\n", error); 1186 goto err_out; 1187 } 1188 1189 error = ixgbe_start_hw(hw); 1190 switch (error) { 1191 case IXGBE_ERR_EEPROM_VERSION: 1192 aprint_error_dev(dev, 1193 "This device is a pre-production adapter/" 1194 "LOM. Please be aware there may be issues associated " 1195 "with your hardware.\nIf you are experiencing problems " 1196 "please contact your Intel or hardware representative " 1197 "who provided you with this hardware.\n"); 1198 break; 1199 default: 1200 break; 1201 } 1202 1203 /* Setup OS specific network interface */ 1204 if (ixgbe_setup_interface(dev, sc) != 0) 1205 goto err_late; 1206 1207 /* 1208 * Print PHY ID only for copper PHY. On device which has SFP(+) cage 1209 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID. 1210 */ 1211 if (hw->phy.media_type == ixgbe_media_type_copper) { 1212 uint16_t id1, id2; 1213 int oui, model, rev; 1214 char descr[MII_MAX_DESCR_LEN]; 1215 1216 id1 = hw->phy.id >> 16; 1217 id2 = hw->phy.id & 0xffff; 1218 oui = MII_OUI(id1, id2); 1219 model = MII_MODEL(id2); 1220 rev = MII_REV(id2); 1221 mii_get_descr(descr, sizeof(descr), oui, model); 1222 if (descr[0]) 1223 aprint_normal_dev(dev, "PHY: %s, rev. %d\n", 1224 descr, rev); 1225 else 1226 aprint_normal_dev(dev, 1227 "PHY OUI 0x%06x, model 0x%04x, rev. %d\n", 1228 oui, model, rev); 1229 } 1230 1231 /* Enable EEE power saving */ 1232 if (sc->feat_cap & IXGBE_FEATURE_EEE) 1233 hw->mac.ops.setup_eee(hw, 1234 sc->feat_en & IXGBE_FEATURE_EEE); 1235 1236 /* Enable power to the phy. */ 1237 if (!unsupported_sfp) { 1238 /* Enable the optics for 82599 SFP+ fiber */ 1239 ixgbe_enable_tx_laser(hw); 1240 1241 /* 1242 * XXX Currently, ixgbe_set_phy_power() supports only copper 1243 * PHY, so it's not required to test with !unsupported_sfp. 1244 */ 1245 ixgbe_set_phy_power(hw, TRUE); 1246 } 1247 1248 /* Initialize statistics */ 1249 ixgbe_update_stats_counters(sc); 1250 1251 /* Check PCIE slot type/speed/width */ 1252 ixgbe_get_slot_info(sc); 1253 1254 /* 1255 * Do time init and sysctl init here, but 1256 * only on the first port of a bypass adapter. 1257 */ 1258 ixgbe_bypass_init(sc); 1259 1260 /* Set an initial dmac value */ 1261 sc->dmac = 0; 1262 /* Set initial advertised speeds (if applicable) */ 1263 sc->advertise = ixgbe_get_default_advertise(sc); 1264 1265 if (sc->feat_cap & IXGBE_FEATURE_SRIOV) 1266 ixgbe_define_iov_schemas(dev, &error); 1267 1268 /* Add sysctls */ 1269 ixgbe_add_device_sysctls(sc); 1270 ixgbe_add_hw_stats(sc); 1271 1272 /* For Netmap */ 1273 sc->init_locked = ixgbe_init_locked; 1274 sc->stop_locked = ixgbe_stop_locked; 1275 1276 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 1277 ixgbe_netmap_attach(sc); 1278 1279 /* Print some flags */ 1280 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_cap); 1281 aprint_verbose_dev(dev, "feature cap %s\n", buf); 1282 snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, sc->feat_en); 1283 aprint_verbose_dev(dev, "feature ena %s\n", buf); 1284 if (ixgbe_get_device_caps(hw, &dev_caps) == 0) { 1285 snprintb(buf, sizeof(buf), IXGBE_DEVICE_CAPS_FLAGS, dev_caps); 1286 aprint_verbose_dev(dev, "device cap %s\n", buf); 1287 } 1288 1289 if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume)) 1290 pmf_class_network_register(dev, sc->ifp); 1291 else 1292 aprint_error_dev(dev, "couldn't establish power handler\n"); 1293 1294 /* Init recovery mode timer and state variable */ 1295 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) { 1296 sc->recovery_mode = 0; 1297 1298 /* Set up the timer callout */ 1299 callout_init(&sc->recovery_mode_timer, 1300 IXGBE_CALLOUT_FLAGS); 1301 snprintf(wqname, sizeof(wqname), "%s-recovery", 1302 device_xname(dev)); 1303 error = workqueue_create(&sc->recovery_mode_timer_wq, 1304 wqname, ixgbe_handle_recovery_mode_timer, sc, 1305 IXGBE_WORKQUEUE_PRI, IPL_NET, IXGBE_TASKLET_WQ_FLAGS); 1306 if (error) { 1307 aprint_error_dev(dev, "could not create " 1308 "recovery_mode_timer workqueue (%d)\n", error); 1309 goto err_out; 1310 } 1311 1312 /* Start the task */ 1313 callout_reset(&sc->recovery_mode_timer, hz, 1314 ixgbe_recovery_mode_timer, sc); 1315 } 1316 1317 INIT_DEBUGOUT("ixgbe_attach: end"); 1318 sc->osdep.attached = true; 1319 1320 return; 1321 1322 err_late: 1323 ixgbe_free_queues(sc); 1324 err_out: 1325 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 1326 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 1327 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 1328 ixgbe_free_deferred_handlers(sc); 1329 ixgbe_free_pci_resources(sc); 1330 if (sc->mta != NULL) 1331 free(sc->mta, M_DEVBUF); 1332 mutex_destroy(&(sc)->admin_mtx); /* XXX appropriate order? */ 1333 IXGBE_CORE_LOCK_DESTROY(sc); 1334 1335 return; 1336 } /* ixgbe_attach */ 1337 1338 /************************************************************************ 1339 * ixgbe_check_wol_support 1340 * 1341 * Checks whether the adapter's ports are capable of 1342 * Wake On LAN by reading the adapter's NVM. 1343 * 1344 * Sets each port's hw->wol_enabled value depending 1345 * on the value read here. 1346 ************************************************************************/ 1347 static void 1348 ixgbe_check_wol_support(struct ixgbe_softc *sc) 1349 { 1350 struct ixgbe_hw *hw = &sc->hw; 1351 u16 dev_caps = 0; 1352 1353 /* Find out WoL support for port */ 1354 sc->wol_support = hw->wol_enabled = 0; 1355 ixgbe_get_device_caps(hw, &dev_caps); 1356 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 1357 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 1358 hw->bus.func == 0)) 1359 sc->wol_support = hw->wol_enabled = 1; 1360 1361 /* Save initial wake up filter configuration */ 1362 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 1363 1364 return; 1365 } /* ixgbe_check_wol_support */ 1366 1367 /************************************************************************ 1368 * ixgbe_setup_interface 1369 * 1370 * Setup networking device structure and register an interface. 1371 ************************************************************************/ 1372 static int 1373 ixgbe_setup_interface(device_t dev, struct ixgbe_softc *sc) 1374 { 1375 struct ethercom *ec = &sc->osdep.ec; 1376 struct ifnet *ifp; 1377 1378 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 1379 1380 ifp = sc->ifp = &ec->ec_if; 1381 strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ); 1382 ifp->if_baudrate = IF_Gbps(10); 1383 ifp->if_init = ixgbe_init; 1384 ifp->if_stop = ixgbe_ifstop; 1385 ifp->if_softc = sc; 1386 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1387 ifp->if_extflags = IFEF_MPSAFE; 1388 ifp->if_ioctl = ixgbe_ioctl; 1389 #if __FreeBSD_version >= 1100045 1390 /* TSO parameters */ 1391 ifp->if_hw_tsomax = 65518; 1392 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 1393 ifp->if_hw_tsomaxsegsize = 2048; 1394 #endif 1395 if (sc->feat_en & IXGBE_FEATURE_LEGACY_TX) { 1396 #if 0 1397 ixgbe_start_locked = ixgbe_legacy_start_locked; 1398 #endif 1399 } else { 1400 ifp->if_transmit = ixgbe_mq_start; 1401 #if 0 1402 ixgbe_start_locked = ixgbe_mq_start_locked; 1403 #endif 1404 } 1405 ifp->if_start = ixgbe_legacy_start; 1406 IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 2); 1407 IFQ_SET_READY(&ifp->if_snd); 1408 1409 if_initialize(ifp); 1410 sc->ipq = if_percpuq_create(&sc->osdep.ec.ec_if); 1411 /* 1412 * We use per TX queue softint, so if_deferred_start_init() isn't 1413 * used. 1414 */ 1415 1416 sc->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 1417 1418 /* 1419 * Tell the upper layer(s) we support long frames. 1420 */ 1421 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 1422 1423 /* Set capability flags */ 1424 ifp->if_capabilities |= IFCAP_RXCSUM 1425 | IFCAP_TXCSUM 1426 | IFCAP_TSOv4 1427 | IFCAP_TSOv6; 1428 ifp->if_capenable = 0; 1429 1430 ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING 1431 | ETHERCAP_VLAN_HWCSUM 1432 | ETHERCAP_JUMBO_MTU 1433 | ETHERCAP_VLAN_MTU; 1434 1435 /* Enable the above capabilities by default */ 1436 ec->ec_capenable = ec->ec_capabilities; 1437 1438 ether_ifattach(ifp, sc->hw.mac.addr); 1439 aprint_normal_dev(dev, "Ethernet address %s\n", 1440 ether_sprintf(sc->hw.mac.addr)); 1441 ether_set_ifflags_cb(ec, ixgbe_ifflags_cb); 1442 1443 /* 1444 * Don't turn this on by default, if vlans are 1445 * created on another pseudo device (eg. lagg) 1446 * then vlan events are not passed thru, breaking 1447 * operation, but with HW FILTER off it works. If 1448 * using vlans directly on the ixgbe driver you can 1449 * enable this and get full hardware tag filtering. 1450 */ 1451 ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER; 1452 1453 /* 1454 * Specify the media types supported by this adapter and register 1455 * callbacks to update media and link information 1456 */ 1457 ec->ec_ifmedia = &sc->media; 1458 ifmedia_init_with_lock(&sc->media, IFM_IMASK, ixgbe_media_change, 1459 ixgbe_media_status, &sc->core_mtx); 1460 1461 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw); 1462 ixgbe_add_media_types(sc); 1463 1464 /* Set autoselect media by default */ 1465 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 1466 1467 if_register(ifp); 1468 1469 return (0); 1470 } /* ixgbe_setup_interface */ 1471 1472 /************************************************************************ 1473 * ixgbe_add_media_types 1474 ************************************************************************/ 1475 static void 1476 ixgbe_add_media_types(struct ixgbe_softc *sc) 1477 { 1478 struct ixgbe_hw *hw = &sc->hw; 1479 u64 layer; 1480 1481 layer = sc->phy_layer; 1482 1483 #define ADD(mm, dd) \ 1484 ifmedia_add(&sc->media, IFM_ETHER | (mm), (dd), NULL); 1485 1486 ADD(IFM_NONE, 0); 1487 1488 /* Media types with matching NetBSD media defines */ 1489 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 1490 ADD(IFM_10G_T | IFM_FDX, 0); 1491 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 1492 ADD(IFM_1000_T | IFM_FDX, 0); 1493 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1494 ADD(IFM_100_TX | IFM_FDX, 0); 1495 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 1496 ADD(IFM_10_T | IFM_FDX, 0); 1497 1498 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1499 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1500 ADD(IFM_10G_TWINAX | IFM_FDX, 0); 1501 1502 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 1503 ADD(IFM_10G_LR | IFM_FDX, 0); 1504 if (hw->phy.multispeed_fiber) 1505 ADD(IFM_1000_LX | IFM_FDX, 0); 1506 } 1507 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 1508 ADD(IFM_10G_SR | IFM_FDX, 0); 1509 if (hw->phy.multispeed_fiber) 1510 ADD(IFM_1000_SX | IFM_FDX, 0); 1511 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1512 ADD(IFM_1000_SX | IFM_FDX, 0); 1513 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1514 ADD(IFM_10G_CX4 | IFM_FDX, 0); 1515 1516 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1517 ADD(IFM_10G_KR | IFM_FDX, 0); 1518 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 1519 ADD(IFM_10G_KX4 | IFM_FDX, 0); 1520 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1521 ADD(IFM_1000_KX | IFM_FDX, 0); 1522 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) 1523 ADD(IFM_2500_KX | IFM_FDX, 0); 1524 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) 1525 ADD(IFM_2500_T | IFM_FDX, 0); 1526 if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) 1527 ADD(IFM_5000_T | IFM_FDX, 0); 1528 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 1529 ADD(IFM_1000_BX10 | IFM_FDX, 0); 1530 /* XXX no ifmedia_set? */ 1531 1532 ADD(IFM_AUTO, 0); 1533 1534 #undef ADD 1535 } /* ixgbe_add_media_types */ 1536 1537 /************************************************************************ 1538 * ixgbe_is_sfp 1539 ************************************************************************/ 1540 static inline bool 1541 ixgbe_is_sfp(struct ixgbe_hw *hw) 1542 { 1543 switch (hw->mac.type) { 1544 case ixgbe_mac_82598EB: 1545 if (hw->phy.type == ixgbe_phy_nl) 1546 return (TRUE); 1547 return (FALSE); 1548 case ixgbe_mac_82599EB: 1549 case ixgbe_mac_X550EM_x: 1550 case ixgbe_mac_X550EM_a: 1551 switch (hw->mac.ops.get_media_type(hw)) { 1552 case ixgbe_media_type_fiber: 1553 case ixgbe_media_type_fiber_qsfp: 1554 return (TRUE); 1555 default: 1556 return (FALSE); 1557 } 1558 default: 1559 return (FALSE); 1560 } 1561 } /* ixgbe_is_sfp */ 1562 1563 static void 1564 ixgbe_schedule_admin_tasklet(struct ixgbe_softc *sc) 1565 { 1566 1567 KASSERT(mutex_owned(&sc->admin_mtx)); 1568 1569 if (__predict_true(sc->osdep.detaching == false)) { 1570 if (sc->admin_pending == 0) 1571 workqueue_enqueue(sc->admin_wq, 1572 &sc->admin_wc, NULL); 1573 sc->admin_pending = 1; 1574 } 1575 } 1576 1577 /************************************************************************ 1578 * ixgbe_config_link 1579 ************************************************************************/ 1580 static void 1581 ixgbe_config_link(struct ixgbe_softc *sc) 1582 { 1583 struct ixgbe_hw *hw = &sc->hw; 1584 u32 autoneg, err = 0; 1585 u32 task_requests = 0; 1586 bool sfp, negotiate = false; 1587 1588 sfp = ixgbe_is_sfp(hw); 1589 1590 if (sfp) { 1591 if (hw->phy.multispeed_fiber) { 1592 ixgbe_enable_tx_laser(hw); 1593 task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 1594 } 1595 task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 1596 1597 mutex_enter(&sc->admin_mtx); 1598 sc->task_requests |= task_requests; 1599 ixgbe_schedule_admin_tasklet(sc); 1600 mutex_exit(&sc->admin_mtx); 1601 } else { 1602 struct ifmedia *ifm = &sc->media; 1603 1604 if (hw->mac.ops.check_link) 1605 err = ixgbe_check_link(hw, &sc->link_speed, 1606 &sc->link_up, FALSE); 1607 if (err) 1608 return; 1609 1610 /* 1611 * Check if it's the first call. If it's the first call, 1612 * get value for auto negotiation. 1613 */ 1614 autoneg = hw->phy.autoneg_advertised; 1615 if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE) 1616 && ((!autoneg) && (hw->mac.ops.get_link_capabilities))) 1617 err = hw->mac.ops.get_link_capabilities(hw, &autoneg, 1618 &negotiate); 1619 if (err) 1620 return; 1621 if (hw->mac.ops.setup_link) 1622 err = hw->mac.ops.setup_link(hw, autoneg, 1623 sc->link_up); 1624 } 1625 } /* ixgbe_config_link */ 1626 1627 /************************************************************************ 1628 * ixgbe_update_stats_counters - Update board statistics counters. 1629 ************************************************************************/ 1630 static void 1631 ixgbe_update_stats_counters(struct ixgbe_softc *sc) 1632 { 1633 struct ifnet *ifp = sc->ifp; 1634 struct ixgbe_hw *hw = &sc->hw; 1635 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1636 u32 missed_rx = 0, bprc, lxontxc, lxofftxc; 1637 u64 total, total_missed_rx = 0, total_qprdc = 0; 1638 uint64_t crcerrs, illerrc, rlec, ruc, rfc, roc, rjc; 1639 unsigned int queue_counters; 1640 int i; 1641 1642 IXGBE_EVC_REGADD2(hw, stats, IXGBE_CRCERRS, crcerrs); 1643 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ILLERRC, illerrc); 1644 1645 IXGBE_EVC_REGADD(hw, stats, IXGBE_ERRBC, errbc); 1646 IXGBE_EVC_REGADD(hw, stats, IXGBE_MSPDC, mspdc); 1647 if (hw->mac.type >= ixgbe_mac_X550) 1648 IXGBE_EVC_REGADD(hw, stats, IXGBE_MBSDC, mbsdc); 1649 1650 /* 16 registers exist */ 1651 queue_counters = uimin(__arraycount(stats->qprc), sc->num_queues); 1652 for (i = 0; i < queue_counters; i++) { 1653 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPRC(i), qprc[i]); 1654 IXGBE_EVC_REGADD(hw, stats, IXGBE_QPTC(i), qptc[i]); 1655 if (hw->mac.type >= ixgbe_mac_82599EB) { 1656 uint32_t qprdc; 1657 1658 IXGBE_EVC_ADD(&stats->qbrc[i], 1659 IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)) + 1660 ((u64)IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)) << 32)); 1661 IXGBE_EVC_ADD(&stats->qbtc[i], 1662 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)) + 1663 ((u64)IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)) << 32)); 1664 /* QPRDC will be added to iqdrops. */ 1665 qprdc = IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 1666 IXGBE_EVC_ADD(&stats->qprdc[i], qprdc); 1667 total_qprdc += qprdc; 1668 } else { 1669 /* 82598 */ 1670 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBRC(i), qbrc[i]); 1671 IXGBE_EVC_REGADD(hw, stats, IXGBE_QBTC(i), qbtc[i]); 1672 } 1673 } 1674 1675 /* 8 registers exist */ 1676 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1677 uint32_t mp; 1678 1679 /* MPC */ 1680 mp = IXGBE_READ_REG(hw, IXGBE_MPC(i)); 1681 /* global total per queue */ 1682 IXGBE_EVC_ADD(&stats->mpc[i], mp); 1683 /* running comprehensive total for stats display */ 1684 total_missed_rx += mp; 1685 1686 if (hw->mac.type == ixgbe_mac_82598EB) 1687 IXGBE_EVC_REGADD(hw, stats, IXGBE_RNBC(i), rnbc[i]); 1688 1689 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXONTXC(i), pxontxc[i]); 1690 IXGBE_EVC_REGADD(hw, stats, IXGBE_PXOFFTXC(i), pxofftxc[i]); 1691 if (hw->mac.type >= ixgbe_mac_82599EB) { 1692 IXGBE_EVC_REGADD(hw, stats, 1693 IXGBE_PXONRXCNT(i), pxonrxc[i]); 1694 IXGBE_EVC_REGADD(hw, stats, 1695 IXGBE_PXOFFRXCNT(i), pxoffrxc[i]); 1696 IXGBE_EVC_REGADD(hw, stats, 1697 IXGBE_PXON2OFFCNT(i), pxon2offc[i]); 1698 } else { 1699 IXGBE_EVC_REGADD(hw, stats, 1700 IXGBE_PXONRXC(i), pxonrxc[i]); 1701 IXGBE_EVC_REGADD(hw, stats, 1702 IXGBE_PXOFFRXC(i), pxoffrxc[i]); 1703 } 1704 } 1705 IXGBE_EVC_ADD(&stats->mpctotal, total_missed_rx); 1706 1707 /* Document says M[LR]FC are valid when link is up and 10Gbps */ 1708 if ((sc->link_active == LINK_STATE_UP) 1709 && (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) { 1710 IXGBE_EVC_REGADD(hw, stats, IXGBE_MLFC, mlfc); 1711 IXGBE_EVC_REGADD(hw, stats, IXGBE_MRFC, mrfc); 1712 } 1713 if (hw->mac.type == ixgbe_mac_X550EM_a) 1714 IXGBE_EVC_REGADD(hw, stats, IXGBE_LINK_DN_CNT, link_dn_cnt); 1715 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RLEC, rlec); 1716 1717 /* Hardware workaround, gprc counts missed packets */ 1718 IXGBE_EVC_ADD(&stats->gprc, 1719 IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx); 1720 1721 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXONTXC, lxontxc); 1722 IXGBE_EVC_REGADD2(hw, stats, IXGBE_LXOFFTXC, lxofftxc); 1723 total = lxontxc + lxofftxc; 1724 1725 if (hw->mac.type != ixgbe_mac_82598EB) { 1726 IXGBE_EVC_ADD(&stats->gorc, IXGBE_READ_REG(hw, IXGBE_GORCL) + 1727 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32)); 1728 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCL) + 1729 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) 1730 - total * ETHER_MIN_LEN); 1731 IXGBE_EVC_ADD(&stats->tor, IXGBE_READ_REG(hw, IXGBE_TORL) + 1732 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32)); 1733 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXCNT, lxonrxc); 1734 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXCNT, lxoffrxc); 1735 } else { 1736 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXONRXC, lxonrxc); 1737 IXGBE_EVC_REGADD(hw, stats, IXGBE_LXOFFRXC, lxoffrxc); 1738 /* 82598 only has a counter in the high register */ 1739 IXGBE_EVC_REGADD(hw, stats, IXGBE_GORCH, gorc); 1740 IXGBE_EVC_ADD(&stats->gotc, IXGBE_READ_REG(hw, IXGBE_GOTCH) 1741 - total * ETHER_MIN_LEN); 1742 IXGBE_EVC_REGADD(hw, stats, IXGBE_TORH, tor); 1743 } 1744 1745 /* 1746 * Workaround: mprc hardware is incorrectly counting 1747 * broadcasts, so for now we subtract those. 1748 */ 1749 IXGBE_EVC_REGADD2(hw, stats, IXGBE_BPRC, bprc); 1750 IXGBE_EVC_ADD(&stats->mprc, IXGBE_READ_REG(hw, IXGBE_MPRC) 1751 - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0)); 1752 1753 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC64, prc64); 1754 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC127, prc127); 1755 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC255, prc255); 1756 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC511, prc511); 1757 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1023, prc1023); 1758 IXGBE_EVC_REGADD(hw, stats, IXGBE_PRC1522, prc1522); 1759 1760 IXGBE_EVC_ADD(&stats->gptc, IXGBE_READ_REG(hw, IXGBE_GPTC) - total); 1761 IXGBE_EVC_ADD(&stats->mptc, IXGBE_READ_REG(hw, IXGBE_MPTC) - total); 1762 IXGBE_EVC_ADD(&stats->ptc64, IXGBE_READ_REG(hw, IXGBE_PTC64) - total); 1763 1764 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RUC, ruc); 1765 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RFC, rfc); 1766 IXGBE_EVC_REGADD2(hw, stats, IXGBE_ROC, roc); 1767 IXGBE_EVC_REGADD2(hw, stats, IXGBE_RJC, rjc); 1768 1769 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPRC, mngprc); 1770 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPDC, mngpdc); 1771 IXGBE_EVC_REGADD(hw, stats, IXGBE_MNGPTC, mngptc); 1772 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPR, tpr); 1773 IXGBE_EVC_REGADD(hw, stats, IXGBE_TPT, tpt); 1774 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC127, ptc127); 1775 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC255, ptc255); 1776 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC511, ptc511); 1777 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1023, ptc1023); 1778 IXGBE_EVC_REGADD(hw, stats, IXGBE_PTC1522, ptc1522); 1779 IXGBE_EVC_REGADD(hw, stats, IXGBE_BPTC, bptc); 1780 IXGBE_EVC_REGADD(hw, stats, IXGBE_XEC, xec); 1781 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCCRC, fccrc); 1782 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCLAST, fclast); 1783 /* Only read FCOE on 82599 */ 1784 if (hw->mac.type != ixgbe_mac_82598EB) { 1785 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOERPDC, fcoerpdc); 1786 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPRC, fcoeprc); 1787 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEPTC, fcoeptc); 1788 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWRC, fcoedwrc); 1789 IXGBE_EVC_REGADD(hw, stats, IXGBE_FCOEDWTC, fcoedwtc); 1790 } 1791 1792 /* 1793 * Fill out the OS statistics structure. Only RX errors are required 1794 * here because all TX counters are incremented in the TX path and 1795 * normal RX counters are prepared in ether_input(). 1796 */ 1797 net_stat_ref_t nsr = IF_STAT_GETREF(ifp); 1798 if_statadd_ref(ifp, nsr, if_iqdrops, total_missed_rx + total_qprdc); 1799 1800 /* 1801 * Aggregate following types of errors as RX errors: 1802 * - CRC error count, 1803 * - illegal byte error count, 1804 * - length error count, 1805 * - undersized packets count, 1806 * - fragmented packets count, 1807 * - oversized packets count, 1808 * - jabber count. 1809 */ 1810 if_statadd_ref(ifp, nsr, if_ierrors, 1811 crcerrs + illerrc + rlec + ruc + rfc + roc + rjc); 1812 1813 IF_STAT_PUTREF(ifp); 1814 } /* ixgbe_update_stats_counters */ 1815 1816 /************************************************************************ 1817 * ixgbe_add_hw_stats 1818 * 1819 * Add sysctl variables, one per statistic, to the system. 1820 ************************************************************************/ 1821 static void 1822 ixgbe_add_hw_stats(struct ixgbe_softc *sc) 1823 { 1824 device_t dev = sc->dev; 1825 const struct sysctlnode *rnode, *cnode; 1826 struct sysctllog **log = &sc->sysctllog; 1827 struct tx_ring *txr = sc->tx_rings; 1828 struct rx_ring *rxr = sc->rx_rings; 1829 struct ixgbe_hw *hw = &sc->hw; 1830 struct ixgbe_hw_stats *stats = &sc->stats.pf; 1831 const char *xname = device_xname(dev); 1832 int i; 1833 1834 /* Driver Statistics */ 1835 evcnt_attach_dynamic(&sc->efbig_tx_dma_setup, EVCNT_TYPE_MISC, 1836 NULL, xname, "Driver tx dma soft fail EFBIG"); 1837 evcnt_attach_dynamic(&sc->mbuf_defrag_failed, EVCNT_TYPE_MISC, 1838 NULL, xname, "m_defrag() failed"); 1839 evcnt_attach_dynamic(&sc->efbig2_tx_dma_setup, EVCNT_TYPE_MISC, 1840 NULL, xname, "Driver tx dma hard fail EFBIG"); 1841 evcnt_attach_dynamic(&sc->einval_tx_dma_setup, EVCNT_TYPE_MISC, 1842 NULL, xname, "Driver tx dma hard fail EINVAL"); 1843 evcnt_attach_dynamic(&sc->other_tx_dma_setup, EVCNT_TYPE_MISC, 1844 NULL, xname, "Driver tx dma hard fail other"); 1845 evcnt_attach_dynamic(&sc->eagain_tx_dma_setup, EVCNT_TYPE_MISC, 1846 NULL, xname, "Driver tx dma soft fail EAGAIN"); 1847 evcnt_attach_dynamic(&sc->enomem_tx_dma_setup, EVCNT_TYPE_MISC, 1848 NULL, xname, "Driver tx dma soft fail ENOMEM"); 1849 evcnt_attach_dynamic(&sc->watchdog_events, EVCNT_TYPE_MISC, 1850 NULL, xname, "Watchdog timeouts"); 1851 evcnt_attach_dynamic(&sc->tso_err, EVCNT_TYPE_MISC, 1852 NULL, xname, "TSO errors"); 1853 evcnt_attach_dynamic(&sc->admin_irqev, EVCNT_TYPE_INTR, 1854 NULL, xname, "Admin MSI-X IRQ Handled"); 1855 evcnt_attach_dynamic(&sc->link_workev, EVCNT_TYPE_INTR, 1856 NULL, xname, "Link event"); 1857 evcnt_attach_dynamic(&sc->mod_workev, EVCNT_TYPE_INTR, 1858 NULL, xname, "SFP+ module event"); 1859 evcnt_attach_dynamic(&sc->msf_workev, EVCNT_TYPE_INTR, 1860 NULL, xname, "Multispeed event"); 1861 evcnt_attach_dynamic(&sc->phy_workev, EVCNT_TYPE_INTR, 1862 NULL, xname, "External PHY event"); 1863 1864 /* Max number of traffic class is 8 */ 1865 KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8); 1866 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 1867 snprintf(sc->tcs[i].evnamebuf, 1868 sizeof(sc->tcs[i].evnamebuf), "%s tc%d", xname, i); 1869 if (i < __arraycount(stats->mpc)) { 1870 evcnt_attach_dynamic(&stats->mpc[i], 1871 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1872 "RX Missed Packet Count"); 1873 if (hw->mac.type == ixgbe_mac_82598EB) 1874 evcnt_attach_dynamic(&stats->rnbc[i], 1875 EVCNT_TYPE_MISC, NULL, 1876 sc->tcs[i].evnamebuf, 1877 "Receive No Buffers"); 1878 } 1879 if (i < __arraycount(stats->pxontxc)) { 1880 evcnt_attach_dynamic(&stats->pxontxc[i], 1881 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1882 "Priority XON Transmitted"); 1883 evcnt_attach_dynamic(&stats->pxofftxc[i], 1884 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1885 "Priority XOFF Transmitted"); 1886 if (hw->mac.type >= ixgbe_mac_82599EB) 1887 evcnt_attach_dynamic(&stats->pxon2offc[i], 1888 EVCNT_TYPE_MISC, NULL, 1889 sc->tcs[i].evnamebuf, 1890 "Priority XON to XOFF"); 1891 evcnt_attach_dynamic(&stats->pxonrxc[i], 1892 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1893 "Priority XON Received"); 1894 evcnt_attach_dynamic(&stats->pxoffrxc[i], 1895 EVCNT_TYPE_MISC, NULL, sc->tcs[i].evnamebuf, 1896 "Priority XOFF Received"); 1897 } 1898 } 1899 1900 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 1901 #ifdef LRO 1902 struct lro_ctrl *lro = &rxr->lro; 1903 #endif 1904 1905 snprintf(sc->queues[i].evnamebuf, 1906 sizeof(sc->queues[i].evnamebuf), "%s q%d", xname, i); 1907 snprintf(sc->queues[i].namebuf, 1908 sizeof(sc->queues[i].namebuf), "q%d", i); 1909 1910 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 1911 aprint_error_dev(dev, 1912 "could not create sysctl root\n"); 1913 break; 1914 } 1915 1916 if (sysctl_createv(log, 0, &rnode, &rnode, 1917 0, CTLTYPE_NODE, 1918 sc->queues[i].namebuf, SYSCTL_DESCR("Queue Name"), 1919 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) 1920 break; 1921 1922 if (sysctl_createv(log, 0, &rnode, &cnode, 1923 CTLFLAG_READWRITE, CTLTYPE_INT, 1924 "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"), 1925 ixgbe_sysctl_interrupt_rate_handler, 0, 1926 (void *)&sc->queues[i], 0, CTL_CREATE, CTL_EOL) != 0) 1927 break; 1928 1929 if (sysctl_createv(log, 0, &rnode, &cnode, 1930 CTLFLAG_READONLY, CTLTYPE_INT, 1931 "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"), 1932 ixgbe_sysctl_tdh_handler, 0, (void *)txr, 1933 0, CTL_CREATE, CTL_EOL) != 0) 1934 break; 1935 1936 if (sysctl_createv(log, 0, &rnode, &cnode, 1937 CTLFLAG_READONLY, CTLTYPE_INT, 1938 "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"), 1939 ixgbe_sysctl_tdt_handler, 0, (void *)txr, 1940 0, CTL_CREATE, CTL_EOL) != 0) 1941 break; 1942 1943 if (sysctl_createv(log, 0, &rnode, &cnode, 1944 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxck", 1945 SYSCTL_DESCR("Receive Descriptor next to check"), 1946 ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0, 1947 CTL_CREATE, CTL_EOL) != 0) 1948 break; 1949 1950 if (sysctl_createv(log, 0, &rnode, &cnode, 1951 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_nxrf", 1952 SYSCTL_DESCR("Receive Descriptor next to refresh"), 1953 ixgbe_sysctl_next_to_refresh_handler, 0, (void *)rxr, 0, 1954 CTL_CREATE, CTL_EOL) != 0) 1955 break; 1956 1957 if (sysctl_createv(log, 0, &rnode, &cnode, 1958 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_head", 1959 SYSCTL_DESCR("Receive Descriptor Head"), 1960 ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0, 1961 CTL_CREATE, CTL_EOL) != 0) 1962 break; 1963 1964 if (sysctl_createv(log, 0, &rnode, &cnode, 1965 CTLFLAG_READONLY, CTLTYPE_INT, "rxd_tail", 1966 SYSCTL_DESCR("Receive Descriptor Tail"), 1967 ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0, 1968 CTL_CREATE, CTL_EOL) != 0) 1969 break; 1970 1971 evcnt_attach_dynamic(&sc->queues[i].irqs, EVCNT_TYPE_INTR, 1972 NULL, sc->queues[i].evnamebuf, "IRQs on queue"); 1973 evcnt_attach_dynamic(&sc->queues[i].handleq, 1974 EVCNT_TYPE_MISC, NULL, sc->queues[i].evnamebuf, 1975 "Handled queue in softint"); 1976 evcnt_attach_dynamic(&sc->queues[i].req, EVCNT_TYPE_MISC, 1977 NULL, sc->queues[i].evnamebuf, "Requeued in softint"); 1978 if (i < __arraycount(stats->qbtc)) 1979 evcnt_attach_dynamic(&stats->qbtc[i], EVCNT_TYPE_MISC, 1980 NULL, sc->queues[i].evnamebuf, 1981 "Queue Bytes Transmitted (reg)"); 1982 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC, 1983 NULL, sc->queues[i].evnamebuf, 1984 "Queue Packets Transmitted (soft)"); 1985 if (i < __arraycount(stats->qptc)) 1986 evcnt_attach_dynamic(&stats->qptc[i], EVCNT_TYPE_MISC, 1987 NULL, sc->queues[i].evnamebuf, 1988 "Queue Packets Transmitted (reg)"); 1989 #ifndef IXGBE_LEGACY_TX 1990 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC, 1991 NULL, sc->queues[i].evnamebuf, 1992 "Packets dropped in pcq"); 1993 #endif 1994 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC, 1995 NULL, sc->queues[i].evnamebuf, 1996 "TX Queue No Descriptor Available"); 1997 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC, 1998 NULL, sc->queues[i].evnamebuf, "TSO"); 1999 2000 evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC, 2001 NULL, sc->queues[i].evnamebuf, 2002 "Queue Bytes Received (soft)"); 2003 if (i < __arraycount(stats->qbrc)) 2004 evcnt_attach_dynamic(&stats->qbrc[i], EVCNT_TYPE_MISC, 2005 NULL, sc->queues[i].evnamebuf, 2006 "Queue Bytes Received (reg)"); 2007 evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC, 2008 NULL, sc->queues[i].evnamebuf, 2009 "Queue Packets Received (soft)"); 2010 if (i < __arraycount(stats->qprc)) 2011 evcnt_attach_dynamic(&stats->qprc[i], EVCNT_TYPE_MISC, 2012 NULL, sc->queues[i].evnamebuf, 2013 "Queue Packets Received (reg)"); 2014 if ((i < __arraycount(stats->qprdc)) && 2015 (hw->mac.type >= ixgbe_mac_82599EB)) 2016 evcnt_attach_dynamic(&stats->qprdc[i], 2017 EVCNT_TYPE_MISC, NULL, 2018 sc->queues[i].evnamebuf, 2019 "Queue Packets Received Drop"); 2020 2021 evcnt_attach_dynamic(&rxr->no_mbuf, EVCNT_TYPE_MISC, 2022 NULL, sc->queues[i].evnamebuf, "Rx no mbuf"); 2023 evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC, 2024 NULL, sc->queues[i].evnamebuf, "Rx discarded"); 2025 evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC, 2026 NULL, sc->queues[i].evnamebuf, "Copied RX Frames"); 2027 #ifdef LRO 2028 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 2029 CTLFLAG_RD, &lro->lro_queued, 0, 2030 "LRO Queued"); 2031 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 2032 CTLFLAG_RD, &lro->lro_flushed, 0, 2033 "LRO Flushed"); 2034 #endif /* LRO */ 2035 } 2036 2037 /* MAC stats get their own sub node */ 2038 2039 snprintf(stats->namebuf, 2040 sizeof(stats->namebuf), "%s MAC Statistics", xname); 2041 2042 evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL, 2043 stats->namebuf, "rx csum offload - IP"); 2044 evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL, 2045 stats->namebuf, "rx csum offload - L4"); 2046 evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL, 2047 stats->namebuf, "rx csum offload - IP bad"); 2048 evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL, 2049 stats->namebuf, "rx csum offload - L4 bad"); 2050 evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL, 2051 stats->namebuf, "Interrupt conditions zero"); 2052 evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL, 2053 stats->namebuf, "Legacy interrupts"); 2054 2055 evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL, 2056 stats->namebuf, "CRC Errors"); 2057 evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL, 2058 stats->namebuf, "Illegal Byte Errors"); 2059 evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL, 2060 stats->namebuf, "Byte Errors"); 2061 evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL, 2062 stats->namebuf, "MAC Short Packets Discarded"); 2063 if (hw->mac.type >= ixgbe_mac_X550) 2064 evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL, 2065 stats->namebuf, "Bad SFD"); 2066 evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL, 2067 stats->namebuf, "Total Packets Missed"); 2068 evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL, 2069 stats->namebuf, "MAC Local Faults"); 2070 evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL, 2071 stats->namebuf, "MAC Remote Faults"); 2072 if (hw->mac.type == ixgbe_mac_X550EM_a) 2073 evcnt_attach_dynamic(&stats->link_dn_cnt, EVCNT_TYPE_MISC, 2074 NULL, stats->namebuf, "Link down event in the MAC"); 2075 evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL, 2076 stats->namebuf, "Receive Length Errors"); 2077 evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL, 2078 stats->namebuf, "Link XON Transmitted"); 2079 evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL, 2080 stats->namebuf, "Link XOFF Transmitted"); 2081 evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL, 2082 stats->namebuf, "Link XON Received"); 2083 evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL, 2084 stats->namebuf, "Link XOFF Received"); 2085 2086 /* Packet Reception Stats */ 2087 evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL, 2088 stats->namebuf, "Total Octets Received"); 2089 evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL, 2090 stats->namebuf, "Good Octets Received"); 2091 evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL, 2092 stats->namebuf, "Total Packets Received"); 2093 evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL, 2094 stats->namebuf, "Good Packets Received"); 2095 evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL, 2096 stats->namebuf, "Multicast Packets Received"); 2097 evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL, 2098 stats->namebuf, "Broadcast Packets Received"); 2099 evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL, 2100 stats->namebuf, "64 byte frames received "); 2101 evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL, 2102 stats->namebuf, "65-127 byte frames received"); 2103 evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL, 2104 stats->namebuf, "128-255 byte frames received"); 2105 evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL, 2106 stats->namebuf, "256-511 byte frames received"); 2107 evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL, 2108 stats->namebuf, "512-1023 byte frames received"); 2109 evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL, 2110 stats->namebuf, "1023-1522 byte frames received"); 2111 evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL, 2112 stats->namebuf, "Receive Undersized"); 2113 evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL, 2114 stats->namebuf, "Fragmented Packets Received "); 2115 evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL, 2116 stats->namebuf, "Oversized Packets Received"); 2117 evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL, 2118 stats->namebuf, "Received Jabber"); 2119 evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL, 2120 stats->namebuf, "Management Packets Received"); 2121 evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL, 2122 stats->namebuf, "Management Packets Dropped"); 2123 evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL, 2124 stats->namebuf, "Checksum Errors"); 2125 2126 /* Packet Transmission Stats */ 2127 evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL, 2128 stats->namebuf, "Good Octets Transmitted"); 2129 evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL, 2130 stats->namebuf, "Total Packets Transmitted"); 2131 evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL, 2132 stats->namebuf, "Good Packets Transmitted"); 2133 evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL, 2134 stats->namebuf, "Broadcast Packets Transmitted"); 2135 evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL, 2136 stats->namebuf, "Multicast Packets Transmitted"); 2137 evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL, 2138 stats->namebuf, "Management Packets Transmitted"); 2139 evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL, 2140 stats->namebuf, "64 byte frames transmitted "); 2141 evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL, 2142 stats->namebuf, "65-127 byte frames transmitted"); 2143 evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL, 2144 stats->namebuf, "128-255 byte frames transmitted"); 2145 evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL, 2146 stats->namebuf, "256-511 byte frames transmitted"); 2147 evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL, 2148 stats->namebuf, "512-1023 byte frames transmitted"); 2149 evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL, 2150 stats->namebuf, "1024-1522 byte frames transmitted"); 2151 } /* ixgbe_add_hw_stats */ 2152 2153 static void 2154 ixgbe_clear_evcnt(struct ixgbe_softc *sc) 2155 { 2156 struct tx_ring *txr = sc->tx_rings; 2157 struct rx_ring *rxr = sc->rx_rings; 2158 struct ixgbe_hw *hw = &sc->hw; 2159 struct ixgbe_hw_stats *stats = &sc->stats.pf; 2160 int i; 2161 2162 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, 0); 2163 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, 0); 2164 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, 0); 2165 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, 0); 2166 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, 0); 2167 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, 0); 2168 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, 0); 2169 IXGBE_EVC_STORE(&sc->tso_err, 0); 2170 IXGBE_EVC_STORE(&sc->watchdog_events, 0); 2171 IXGBE_EVC_STORE(&sc->admin_irqev, 0); 2172 IXGBE_EVC_STORE(&sc->link_workev, 0); 2173 IXGBE_EVC_STORE(&sc->mod_workev, 0); 2174 IXGBE_EVC_STORE(&sc->msf_workev, 0); 2175 IXGBE_EVC_STORE(&sc->phy_workev, 0); 2176 2177 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 2178 if (i < __arraycount(stats->mpc)) { 2179 IXGBE_EVC_STORE(&stats->mpc[i], 0); 2180 if (hw->mac.type == ixgbe_mac_82598EB) 2181 IXGBE_EVC_STORE(&stats->rnbc[i], 0); 2182 } 2183 if (i < __arraycount(stats->pxontxc)) { 2184 IXGBE_EVC_STORE(&stats->pxontxc[i], 0); 2185 IXGBE_EVC_STORE(&stats->pxonrxc[i], 0); 2186 IXGBE_EVC_STORE(&stats->pxofftxc[i], 0); 2187 IXGBE_EVC_STORE(&stats->pxoffrxc[i], 0); 2188 if (hw->mac.type >= ixgbe_mac_82599EB) 2189 IXGBE_EVC_STORE(&stats->pxon2offc[i], 0); 2190 } 2191 } 2192 2193 txr = sc->tx_rings; 2194 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 2195 IXGBE_EVC_STORE(&sc->queues[i].irqs, 0); 2196 IXGBE_EVC_STORE(&sc->queues[i].handleq, 0); 2197 IXGBE_EVC_STORE(&sc->queues[i].req, 0); 2198 IXGBE_EVC_STORE(&txr->total_packets, 0); 2199 #ifndef IXGBE_LEGACY_TX 2200 IXGBE_EVC_STORE(&txr->pcq_drops, 0); 2201 #endif 2202 IXGBE_EVC_STORE(&txr->no_desc_avail, 0); 2203 IXGBE_EVC_STORE(&txr->tso_tx, 0); 2204 txr->q_efbig_tx_dma_setup = 0; 2205 txr->q_mbuf_defrag_failed = 0; 2206 txr->q_efbig2_tx_dma_setup = 0; 2207 txr->q_einval_tx_dma_setup = 0; 2208 txr->q_other_tx_dma_setup = 0; 2209 txr->q_eagain_tx_dma_setup = 0; 2210 txr->q_enomem_tx_dma_setup = 0; 2211 txr->q_tso_err = 0; 2212 2213 if (i < __arraycount(stats->qprc)) { 2214 IXGBE_EVC_STORE(&stats->qprc[i], 0); 2215 IXGBE_EVC_STORE(&stats->qptc[i], 0); 2216 IXGBE_EVC_STORE(&stats->qbrc[i], 0); 2217 IXGBE_EVC_STORE(&stats->qbtc[i], 0); 2218 if (hw->mac.type >= ixgbe_mac_82599EB) 2219 IXGBE_EVC_STORE(&stats->qprdc[i], 0); 2220 } 2221 2222 IXGBE_EVC_STORE(&rxr->rx_packets, 0); 2223 IXGBE_EVC_STORE(&rxr->rx_bytes, 0); 2224 IXGBE_EVC_STORE(&rxr->rx_copies, 0); 2225 IXGBE_EVC_STORE(&rxr->no_mbuf, 0); 2226 IXGBE_EVC_STORE(&rxr->rx_discarded, 0); 2227 } 2228 IXGBE_EVC_STORE(&stats->ipcs, 0); 2229 IXGBE_EVC_STORE(&stats->l4cs, 0); 2230 IXGBE_EVC_STORE(&stats->ipcs_bad, 0); 2231 IXGBE_EVC_STORE(&stats->l4cs_bad, 0); 2232 IXGBE_EVC_STORE(&stats->intzero, 0); 2233 IXGBE_EVC_STORE(&stats->legint, 0); 2234 IXGBE_EVC_STORE(&stats->crcerrs, 0); 2235 IXGBE_EVC_STORE(&stats->illerrc, 0); 2236 IXGBE_EVC_STORE(&stats->errbc, 0); 2237 IXGBE_EVC_STORE(&stats->mspdc, 0); 2238 if (hw->mac.type >= ixgbe_mac_X550) 2239 IXGBE_EVC_STORE(&stats->mbsdc, 0); 2240 IXGBE_EVC_STORE(&stats->mpctotal, 0); 2241 IXGBE_EVC_STORE(&stats->mlfc, 0); 2242 IXGBE_EVC_STORE(&stats->mrfc, 0); 2243 if (hw->mac.type == ixgbe_mac_X550EM_a) 2244 IXGBE_EVC_STORE(&stats->link_dn_cnt, 0); 2245 IXGBE_EVC_STORE(&stats->rlec, 0); 2246 IXGBE_EVC_STORE(&stats->lxontxc, 0); 2247 IXGBE_EVC_STORE(&stats->lxonrxc, 0); 2248 IXGBE_EVC_STORE(&stats->lxofftxc, 0); 2249 IXGBE_EVC_STORE(&stats->lxoffrxc, 0); 2250 2251 /* Packet Reception Stats */ 2252 IXGBE_EVC_STORE(&stats->tor, 0); 2253 IXGBE_EVC_STORE(&stats->gorc, 0); 2254 IXGBE_EVC_STORE(&stats->tpr, 0); 2255 IXGBE_EVC_STORE(&stats->gprc, 0); 2256 IXGBE_EVC_STORE(&stats->mprc, 0); 2257 IXGBE_EVC_STORE(&stats->bprc, 0); 2258 IXGBE_EVC_STORE(&stats->prc64, 0); 2259 IXGBE_EVC_STORE(&stats->prc127, 0); 2260 IXGBE_EVC_STORE(&stats->prc255, 0); 2261 IXGBE_EVC_STORE(&stats->prc511, 0); 2262 IXGBE_EVC_STORE(&stats->prc1023, 0); 2263 IXGBE_EVC_STORE(&stats->prc1522, 0); 2264 IXGBE_EVC_STORE(&stats->ruc, 0); 2265 IXGBE_EVC_STORE(&stats->rfc, 0); 2266 IXGBE_EVC_STORE(&stats->roc, 0); 2267 IXGBE_EVC_STORE(&stats->rjc, 0); 2268 IXGBE_EVC_STORE(&stats->mngprc, 0); 2269 IXGBE_EVC_STORE(&stats->mngpdc, 0); 2270 IXGBE_EVC_STORE(&stats->xec, 0); 2271 2272 /* Packet Transmission Stats */ 2273 IXGBE_EVC_STORE(&stats->gotc, 0); 2274 IXGBE_EVC_STORE(&stats->tpt, 0); 2275 IXGBE_EVC_STORE(&stats->gptc, 0); 2276 IXGBE_EVC_STORE(&stats->bptc, 0); 2277 IXGBE_EVC_STORE(&stats->mptc, 0); 2278 IXGBE_EVC_STORE(&stats->mngptc, 0); 2279 IXGBE_EVC_STORE(&stats->ptc64, 0); 2280 IXGBE_EVC_STORE(&stats->ptc127, 0); 2281 IXGBE_EVC_STORE(&stats->ptc255, 0); 2282 IXGBE_EVC_STORE(&stats->ptc511, 0); 2283 IXGBE_EVC_STORE(&stats->ptc1023, 0); 2284 IXGBE_EVC_STORE(&stats->ptc1522, 0); 2285 } 2286 2287 /************************************************************************ 2288 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function 2289 * 2290 * Retrieves the TDH value from the hardware 2291 ************************************************************************/ 2292 static int 2293 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS) 2294 { 2295 struct sysctlnode node = *rnode; 2296 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2297 struct ixgbe_softc *sc; 2298 uint32_t val; 2299 2300 if (!txr) 2301 return (0); 2302 2303 sc = txr->sc; 2304 if (ixgbe_fw_recovery_mode_swflag(sc)) 2305 return (EPERM); 2306 2307 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me)); 2308 node.sysctl_data = &val; 2309 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2310 } /* ixgbe_sysctl_tdh_handler */ 2311 2312 /************************************************************************ 2313 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function 2314 * 2315 * Retrieves the TDT value from the hardware 2316 ************************************************************************/ 2317 static int 2318 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS) 2319 { 2320 struct sysctlnode node = *rnode; 2321 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data; 2322 struct ixgbe_softc *sc; 2323 uint32_t val; 2324 2325 if (!txr) 2326 return (0); 2327 2328 sc = txr->sc; 2329 if (ixgbe_fw_recovery_mode_swflag(sc)) 2330 return (EPERM); 2331 2332 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me)); 2333 node.sysctl_data = &val; 2334 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2335 } /* ixgbe_sysctl_tdt_handler */ 2336 2337 /************************************************************************ 2338 * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check 2339 * handler function 2340 * 2341 * Retrieves the next_to_check value 2342 ************************************************************************/ 2343 static int 2344 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS) 2345 { 2346 struct sysctlnode node = *rnode; 2347 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2348 struct ixgbe_softc *sc; 2349 uint32_t val; 2350 2351 if (!rxr) 2352 return (0); 2353 2354 sc = rxr->sc; 2355 if (ixgbe_fw_recovery_mode_swflag(sc)) 2356 return (EPERM); 2357 2358 val = rxr->next_to_check; 2359 node.sysctl_data = &val; 2360 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2361 } /* ixgbe_sysctl_next_to_check_handler */ 2362 2363 /************************************************************************ 2364 * ixgbe_sysctl_next_to_refresh_handler - Receive Descriptor next to check 2365 * handler function 2366 * 2367 * Retrieves the next_to_refresh value 2368 ************************************************************************/ 2369 static int 2370 ixgbe_sysctl_next_to_refresh_handler(SYSCTLFN_ARGS) 2371 { 2372 struct sysctlnode node = *rnode; 2373 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2374 struct ixgbe_softc *sc; 2375 uint32_t val; 2376 2377 if (!rxr) 2378 return (0); 2379 2380 sc = rxr->sc; 2381 if (ixgbe_fw_recovery_mode_swflag(sc)) 2382 return (EPERM); 2383 2384 val = rxr->next_to_refresh; 2385 node.sysctl_data = &val; 2386 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2387 } /* ixgbe_sysctl_next_to_refresh_handler */ 2388 2389 /************************************************************************ 2390 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function 2391 * 2392 * Retrieves the RDH value from the hardware 2393 ************************************************************************/ 2394 static int 2395 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS) 2396 { 2397 struct sysctlnode node = *rnode; 2398 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2399 struct ixgbe_softc *sc; 2400 uint32_t val; 2401 2402 if (!rxr) 2403 return (0); 2404 2405 sc = rxr->sc; 2406 if (ixgbe_fw_recovery_mode_swflag(sc)) 2407 return (EPERM); 2408 2409 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me)); 2410 node.sysctl_data = &val; 2411 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2412 } /* ixgbe_sysctl_rdh_handler */ 2413 2414 /************************************************************************ 2415 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function 2416 * 2417 * Retrieves the RDT value from the hardware 2418 ************************************************************************/ 2419 static int 2420 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS) 2421 { 2422 struct sysctlnode node = *rnode; 2423 struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data; 2424 struct ixgbe_softc *sc; 2425 uint32_t val; 2426 2427 if (!rxr) 2428 return (0); 2429 2430 sc = rxr->sc; 2431 if (ixgbe_fw_recovery_mode_swflag(sc)) 2432 return (EPERM); 2433 2434 val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me)); 2435 node.sysctl_data = &val; 2436 return sysctl_lookup(SYSCTLFN_CALL(&node)); 2437 } /* ixgbe_sysctl_rdt_handler */ 2438 2439 static int 2440 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set) 2441 { 2442 struct ifnet *ifp = &ec->ec_if; 2443 struct ixgbe_softc *sc = ifp->if_softc; 2444 int rv; 2445 2446 if (set) 2447 rv = ixgbe_register_vlan(sc, vid); 2448 else 2449 rv = ixgbe_unregister_vlan(sc, vid); 2450 2451 if (rv != 0) 2452 return rv; 2453 2454 /* 2455 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0 2456 * or 0 to 1. 2457 */ 2458 if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0))) 2459 ixgbe_setup_vlan_hw_tagging(sc); 2460 2461 return rv; 2462 } 2463 2464 /************************************************************************ 2465 * ixgbe_register_vlan 2466 * 2467 * Run via vlan config EVENT, it enables us to use the 2468 * HW Filter table since we can get the vlan id. This 2469 * just creates the entry in the soft version of the 2470 * VFTA, init will repopulate the real table. 2471 ************************************************************************/ 2472 static int 2473 ixgbe_register_vlan(struct ixgbe_softc *sc, u16 vtag) 2474 { 2475 u16 index, bit; 2476 int error; 2477 2478 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2479 return EINVAL; 2480 2481 IXGBE_CORE_LOCK(sc); 2482 index = (vtag >> 5) & 0x7F; 2483 bit = vtag & 0x1F; 2484 sc->shadow_vfta[index] |= ((u32)1 << bit); 2485 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, true, 2486 true); 2487 IXGBE_CORE_UNLOCK(sc); 2488 if (error != 0) 2489 error = EACCES; 2490 2491 return error; 2492 } /* ixgbe_register_vlan */ 2493 2494 /************************************************************************ 2495 * ixgbe_unregister_vlan 2496 * 2497 * Run via vlan unconfig EVENT, remove our entry in the soft vfta. 2498 ************************************************************************/ 2499 static int 2500 ixgbe_unregister_vlan(struct ixgbe_softc *sc, u16 vtag) 2501 { 2502 u16 index, bit; 2503 int error; 2504 2505 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 2506 return EINVAL; 2507 2508 IXGBE_CORE_LOCK(sc); 2509 index = (vtag >> 5) & 0x7F; 2510 bit = vtag & 0x1F; 2511 sc->shadow_vfta[index] &= ~((u32)1 << bit); 2512 error = sc->hw.mac.ops.set_vfta(&sc->hw, vtag, 0, false, 2513 true); 2514 IXGBE_CORE_UNLOCK(sc); 2515 if (error != 0) 2516 error = EACCES; 2517 2518 return error; 2519 } /* ixgbe_unregister_vlan */ 2520 2521 static void 2522 ixgbe_setup_vlan_hw_tagging(struct ixgbe_softc *sc) 2523 { 2524 struct ethercom *ec = &sc->osdep.ec; 2525 struct ixgbe_hw *hw = &sc->hw; 2526 struct rx_ring *rxr; 2527 u32 ctrl; 2528 int i; 2529 bool hwtagging; 2530 2531 /* Enable HW tagging only if any vlan is attached */ 2532 hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) 2533 && VLAN_ATTACHED(ec); 2534 2535 /* Setup the queues for vlans */ 2536 for (i = 0; i < sc->num_queues; i++) { 2537 rxr = &sc->rx_rings[i]; 2538 /* 2539 * On 82599 and later, the VLAN enable is per/queue in RXDCTL. 2540 */ 2541 if (hw->mac.type != ixgbe_mac_82598EB) { 2542 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 2543 if (hwtagging) 2544 ctrl |= IXGBE_RXDCTL_VME; 2545 else 2546 ctrl &= ~IXGBE_RXDCTL_VME; 2547 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 2548 } 2549 rxr->vtag_strip = hwtagging ? TRUE : FALSE; 2550 } 2551 2552 /* VLAN hw tagging for 82598 */ 2553 if (hw->mac.type == ixgbe_mac_82598EB) { 2554 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2555 if (hwtagging) 2556 ctrl |= IXGBE_VLNCTRL_VME; 2557 else 2558 ctrl &= ~IXGBE_VLNCTRL_VME; 2559 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2560 } 2561 } /* ixgbe_setup_vlan_hw_tagging */ 2562 2563 static void 2564 ixgbe_setup_vlan_hw_support(struct ixgbe_softc *sc) 2565 { 2566 struct ethercom *ec = &sc->osdep.ec; 2567 struct ixgbe_hw *hw = &sc->hw; 2568 int i; 2569 u32 ctrl; 2570 struct vlanid_list *vlanidp; 2571 2572 /* 2573 * This function is called from both if_init and ifflags_cb() 2574 * on NetBSD. 2575 */ 2576 2577 /* 2578 * Part 1: 2579 * Setup VLAN HW tagging 2580 */ 2581 ixgbe_setup_vlan_hw_tagging(sc); 2582 2583 /* 2584 * Part 2: 2585 * Setup VLAN HW filter 2586 */ 2587 /* Cleanup shadow_vfta */ 2588 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2589 sc->shadow_vfta[i] = 0; 2590 /* Generate shadow_vfta from ec_vids */ 2591 ETHER_LOCK(ec); 2592 SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) { 2593 uint32_t idx; 2594 2595 idx = vlanidp->vid / 32; 2596 KASSERT(idx < IXGBE_VFTA_SIZE); 2597 sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32); 2598 } 2599 ETHER_UNLOCK(ec); 2600 for (i = 0; i < IXGBE_VFTA_SIZE; i++) 2601 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]); 2602 2603 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 2604 /* Enable the Filter Table if enabled */ 2605 if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER) 2606 ctrl |= IXGBE_VLNCTRL_VFE; 2607 else 2608 ctrl &= ~IXGBE_VLNCTRL_VFE; 2609 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 2610 } /* ixgbe_setup_vlan_hw_support */ 2611 2612 /************************************************************************ 2613 * ixgbe_get_slot_info 2614 * 2615 * Get the width and transaction speed of 2616 * the slot this adapter is plugged into. 2617 ************************************************************************/ 2618 static void 2619 ixgbe_get_slot_info(struct ixgbe_softc *sc) 2620 { 2621 device_t dev = sc->dev; 2622 struct ixgbe_hw *hw = &sc->hw; 2623 u32 offset; 2624 u16 link; 2625 int bus_info_valid = TRUE; 2626 2627 /* Some devices are behind an internal bridge */ 2628 switch (hw->device_id) { 2629 case IXGBE_DEV_ID_82599_SFP_SF_QP: 2630 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 2631 goto get_parent_info; 2632 default: 2633 break; 2634 } 2635 2636 ixgbe_get_bus_info(hw); 2637 2638 /* 2639 * Some devices don't use PCI-E, but there is no need 2640 * to display "Unknown" for bus speed and width. 2641 */ 2642 switch (hw->mac.type) { 2643 case ixgbe_mac_X550EM_x: 2644 case ixgbe_mac_X550EM_a: 2645 return; 2646 default: 2647 goto display; 2648 } 2649 2650 get_parent_info: 2651 /* 2652 * For the Quad port adapter we need to parse back 2653 * up the PCI tree to find the speed of the expansion 2654 * slot into which this adapter is plugged. A bit more work. 2655 */ 2656 dev = device_parent(device_parent(dev)); 2657 #if 0 2658 #ifdef IXGBE_DEBUG 2659 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev), 2660 pci_get_slot(dev), pci_get_function(dev)); 2661 #endif 2662 dev = device_parent(device_parent(dev)); 2663 #ifdef IXGBE_DEBUG 2664 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev), 2665 pci_get_slot(dev), pci_get_function(dev)); 2666 #endif 2667 #endif 2668 /* Now get the PCI Express Capabilities offset */ 2669 if (pci_get_capability(sc->osdep.pc, sc->osdep.tag, 2670 PCI_CAP_PCIEXPRESS, &offset, NULL)) { 2671 /* 2672 * Hmm...can't get PCI-Express capabilities. 2673 * Falling back to default method. 2674 */ 2675 bus_info_valid = FALSE; 2676 ixgbe_get_bus_info(hw); 2677 goto display; 2678 } 2679 /* ...and read the Link Status Register */ 2680 link = pci_conf_read(sc->osdep.pc, sc->osdep.tag, 2681 offset + PCIE_LCSR) >> 16; 2682 ixgbe_set_pci_config_data_generic(hw, link); 2683 2684 display: 2685 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n", 2686 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" : 2687 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" : 2688 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" : 2689 "Unknown"), 2690 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" : 2691 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" : 2692 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" : 2693 "Unknown")); 2694 2695 if (bus_info_valid) { 2696 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 2697 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 2698 (hw->bus.speed == ixgbe_bus_speed_2500))) { 2699 device_printf(dev, "PCI-Express bandwidth available" 2700 " for this card\n is not sufficient for" 2701 " optimal performance.\n"); 2702 device_printf(dev, "For optimal performance a x8 " 2703 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 2704 } 2705 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 2706 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 2707 (hw->bus.speed < ixgbe_bus_speed_8000))) { 2708 device_printf(dev, "PCI-Express bandwidth available" 2709 " for this card\n is not sufficient for" 2710 " optimal performance.\n"); 2711 device_printf(dev, "For optimal performance a x8 " 2712 "PCIE Gen3 slot is required.\n"); 2713 } 2714 } else 2715 device_printf(dev, 2716 "Unable to determine slot speed/width. The speed/width " 2717 "reported are that of the internal switch.\n"); 2718 2719 return; 2720 } /* ixgbe_get_slot_info */ 2721 2722 /************************************************************************ 2723 * ixgbe_enable_queue - Queue Interrupt Enabler 2724 ************************************************************************/ 2725 static inline void 2726 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector) 2727 { 2728 struct ixgbe_hw *hw = &sc->hw; 2729 struct ix_queue *que = &sc->queues[vector]; 2730 u64 queue = 1ULL << vector; 2731 u32 mask; 2732 2733 mutex_enter(&que->dc_mtx); 2734 if (que->disabled_count > 0 && --que->disabled_count > 0) 2735 goto out; 2736 2737 if (hw->mac.type == ixgbe_mac_82598EB) { 2738 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2739 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 2740 } else { 2741 mask = (queue & 0xFFFFFFFF); 2742 if (mask) 2743 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2744 mask = (queue >> 32); 2745 if (mask) 2746 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 2747 } 2748 out: 2749 mutex_exit(&que->dc_mtx); 2750 } /* ixgbe_enable_queue */ 2751 2752 /************************************************************************ 2753 * ixgbe_disable_queue_internal 2754 ************************************************************************/ 2755 static inline void 2756 ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok) 2757 { 2758 struct ixgbe_hw *hw = &sc->hw; 2759 struct ix_queue *que = &sc->queues[vector]; 2760 u64 queue = 1ULL << vector; 2761 u32 mask; 2762 2763 mutex_enter(&que->dc_mtx); 2764 2765 if (que->disabled_count > 0) { 2766 if (nestok) 2767 que->disabled_count++; 2768 goto out; 2769 } 2770 que->disabled_count++; 2771 2772 if (hw->mac.type == ixgbe_mac_82598EB) { 2773 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 2774 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 2775 } else { 2776 mask = (queue & 0xFFFFFFFF); 2777 if (mask) 2778 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2779 mask = (queue >> 32); 2780 if (mask) 2781 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 2782 } 2783 out: 2784 mutex_exit(&que->dc_mtx); 2785 } /* ixgbe_disable_queue_internal */ 2786 2787 /************************************************************************ 2788 * ixgbe_disable_queue 2789 ************************************************************************/ 2790 static inline void 2791 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector) 2792 { 2793 2794 ixgbe_disable_queue_internal(sc, vector, true); 2795 } /* ixgbe_disable_queue */ 2796 2797 /************************************************************************ 2798 * ixgbe_sched_handle_que - schedule deferred packet processing 2799 ************************************************************************/ 2800 static inline void 2801 ixgbe_sched_handle_que(struct ixgbe_softc *sc, struct ix_queue *que) 2802 { 2803 2804 if (que->txrx_use_workqueue) { 2805 /* 2806 * sc->que_wq is bound to each CPU instead of 2807 * each NIC queue to reduce workqueue kthread. As we 2808 * should consider about interrupt affinity in this 2809 * function, the workqueue kthread must be WQ_PERCPU. 2810 * If create WQ_PERCPU workqueue kthread for each NIC 2811 * queue, that number of created workqueue kthread is 2812 * (number of used NIC queue) * (number of CPUs) = 2813 * (number of CPUs) ^ 2 most often. 2814 * 2815 * The same NIC queue's interrupts are avoided by 2816 * masking the queue's interrupt. And different 2817 * NIC queue's interrupts use different struct work 2818 * (que->wq_cookie). So, "enqueued flag" to avoid 2819 * twice workqueue_enqueue() is not required . 2820 */ 2821 workqueue_enqueue(sc->que_wq, &que->wq_cookie, curcpu()); 2822 } else 2823 softint_schedule(que->que_si); 2824 } 2825 2826 /************************************************************************ 2827 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine 2828 ************************************************************************/ 2829 static int 2830 ixgbe_msix_que(void *arg) 2831 { 2832 struct ix_queue *que = arg; 2833 struct ixgbe_softc *sc = que->sc; 2834 struct ifnet *ifp = sc->ifp; 2835 struct tx_ring *txr = que->txr; 2836 struct rx_ring *rxr = que->rxr; 2837 u32 newitr = 0; 2838 2839 /* Protect against spurious interrupts */ 2840 if ((ifp->if_flags & IFF_RUNNING) == 0) 2841 return 0; 2842 2843 ixgbe_disable_queue(sc, que->msix); 2844 IXGBE_EVC_ADD(&que->irqs, 1); 2845 2846 /* 2847 * Don't change "que->txrx_use_workqueue" from this point to avoid 2848 * flip-flopping softint/workqueue mode in one deferred processing. 2849 */ 2850 que->txrx_use_workqueue = sc->txrx_use_workqueue; 2851 2852 IXGBE_TX_LOCK(txr); 2853 ixgbe_txeof(txr); 2854 IXGBE_TX_UNLOCK(txr); 2855 2856 /* Do AIM now? */ 2857 2858 if (sc->enable_aim == false) 2859 goto no_calc; 2860 /* 2861 * Do Adaptive Interrupt Moderation: 2862 * - Write out last calculated setting 2863 * - Calculate based on average size over 2864 * the last interval. 2865 */ 2866 if (que->eitr_setting) 2867 ixgbe_eitr_write(sc, que->msix, que->eitr_setting); 2868 2869 que->eitr_setting = 0; 2870 2871 /* Idle, do nothing */ 2872 if ((txr->bytes == 0) && (rxr->bytes == 0)) 2873 goto no_calc; 2874 2875 if ((txr->bytes) && (txr->packets)) 2876 newitr = txr->bytes/txr->packets; 2877 if ((rxr->bytes) && (rxr->packets)) 2878 newitr = uimax(newitr, (rxr->bytes / rxr->packets)); 2879 newitr += 24; /* account for hardware frame, crc */ 2880 2881 /* set an upper boundary */ 2882 newitr = uimin(newitr, 3000); 2883 2884 /* Be nice to the mid range */ 2885 if ((newitr > 300) && (newitr < 1200)) 2886 newitr = (newitr / 3); 2887 else 2888 newitr = (newitr / 2); 2889 2890 /* 2891 * When RSC is used, ITR interval must be larger than RSC_DELAY. 2892 * Currently, we use 2us for RSC_DELAY. The minimum value is always 2893 * greater than 2us on 100M (and 10M?(not documented)), but it's not 2894 * on 1G and higher. 2895 */ 2896 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 2897 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) 2898 if (newitr < IXGBE_MIN_RSC_EITR_10G1G) 2899 newitr = IXGBE_MIN_RSC_EITR_10G1G; 2900 2901 /* save for next interrupt */ 2902 que->eitr_setting = newitr; 2903 2904 /* Reset state */ 2905 txr->bytes = 0; 2906 txr->packets = 0; 2907 rxr->bytes = 0; 2908 rxr->packets = 0; 2909 2910 no_calc: 2911 ixgbe_sched_handle_que(sc, que); 2912 2913 return 1; 2914 } /* ixgbe_msix_que */ 2915 2916 /************************************************************************ 2917 * ixgbe_media_status - Media Ioctl callback 2918 * 2919 * Called whenever the user queries the status of 2920 * the interface using ifconfig. 2921 ************************************************************************/ 2922 static void 2923 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2924 { 2925 struct ixgbe_softc *sc = ifp->if_softc; 2926 struct ixgbe_hw *hw = &sc->hw; 2927 int layer; 2928 2929 INIT_DEBUGOUT("ixgbe_media_status: begin"); 2930 ixgbe_update_link_status(sc); 2931 2932 ifmr->ifm_status = IFM_AVALID; 2933 ifmr->ifm_active = IFM_ETHER; 2934 2935 if (sc->link_active != LINK_STATE_UP) { 2936 ifmr->ifm_active |= IFM_NONE; 2937 return; 2938 } 2939 2940 ifmr->ifm_status |= IFM_ACTIVE; 2941 layer = sc->phy_layer; 2942 2943 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 2944 layer & IXGBE_PHYSICAL_LAYER_5GBASE_T || 2945 layer & IXGBE_PHYSICAL_LAYER_2500BASE_T || 2946 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 2947 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX || 2948 layer & IXGBE_PHYSICAL_LAYER_10BASE_T) 2949 switch (sc->link_speed) { 2950 case IXGBE_LINK_SPEED_10GB_FULL: 2951 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2952 break; 2953 case IXGBE_LINK_SPEED_5GB_FULL: 2954 ifmr->ifm_active |= IFM_5000_T | IFM_FDX; 2955 break; 2956 case IXGBE_LINK_SPEED_2_5GB_FULL: 2957 ifmr->ifm_active |= IFM_2500_T | IFM_FDX; 2958 break; 2959 case IXGBE_LINK_SPEED_1GB_FULL: 2960 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 2961 break; 2962 case IXGBE_LINK_SPEED_100_FULL: 2963 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 2964 break; 2965 case IXGBE_LINK_SPEED_10_FULL: 2966 ifmr->ifm_active |= IFM_10_T | IFM_FDX; 2967 break; 2968 } 2969 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2970 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2971 switch (sc->link_speed) { 2972 case IXGBE_LINK_SPEED_10GB_FULL: 2973 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 2974 break; 2975 } 2976 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 2977 switch (sc->link_speed) { 2978 case IXGBE_LINK_SPEED_10GB_FULL: 2979 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 2980 break; 2981 case IXGBE_LINK_SPEED_1GB_FULL: 2982 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2983 break; 2984 } 2985 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 2986 switch (sc->link_speed) { 2987 case IXGBE_LINK_SPEED_10GB_FULL: 2988 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 2989 break; 2990 case IXGBE_LINK_SPEED_1GB_FULL: 2991 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 2992 break; 2993 } 2994 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 2995 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2996 switch (sc->link_speed) { 2997 case IXGBE_LINK_SPEED_10GB_FULL: 2998 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 2999 break; 3000 case IXGBE_LINK_SPEED_1GB_FULL: 3001 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 3002 break; 3003 } 3004 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 3005 switch (sc->link_speed) { 3006 case IXGBE_LINK_SPEED_10GB_FULL: 3007 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 3008 break; 3009 } 3010 /* 3011 * XXX: These need to use the proper media types once 3012 * they're added. 3013 */ 3014 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 3015 switch (sc->link_speed) { 3016 case IXGBE_LINK_SPEED_10GB_FULL: 3017 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 3018 break; 3019 case IXGBE_LINK_SPEED_2_5GB_FULL: 3020 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3021 break; 3022 case IXGBE_LINK_SPEED_1GB_FULL: 3023 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3024 break; 3025 } 3026 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 || 3027 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX || 3028 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 3029 switch (sc->link_speed) { 3030 case IXGBE_LINK_SPEED_10GB_FULL: 3031 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 3032 break; 3033 case IXGBE_LINK_SPEED_2_5GB_FULL: 3034 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 3035 break; 3036 case IXGBE_LINK_SPEED_1GB_FULL: 3037 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 3038 break; 3039 } 3040 3041 /* If nothing is recognized... */ 3042 #if 0 3043 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 3044 ifmr->ifm_active |= IFM_UNKNOWN; 3045 #endif 3046 3047 ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active); 3048 3049 /* Display current flow control setting used on link */ 3050 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 3051 hw->fc.current_mode == ixgbe_fc_full) 3052 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 3053 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 3054 hw->fc.current_mode == ixgbe_fc_full) 3055 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 3056 3057 return; 3058 } /* ixgbe_media_status */ 3059 3060 /************************************************************************ 3061 * ixgbe_media_change - Media Ioctl callback 3062 * 3063 * Called when the user changes speed/duplex using 3064 * media/mediopt option with ifconfig. 3065 ************************************************************************/ 3066 static int 3067 ixgbe_media_change(struct ifnet *ifp) 3068 { 3069 struct ixgbe_softc *sc = ifp->if_softc; 3070 struct ifmedia *ifm = &sc->media; 3071 struct ixgbe_hw *hw = &sc->hw; 3072 ixgbe_link_speed speed = 0; 3073 ixgbe_link_speed link_caps = 0; 3074 bool negotiate = false; 3075 s32 err = IXGBE_NOT_IMPLEMENTED; 3076 3077 INIT_DEBUGOUT("ixgbe_media_change: begin"); 3078 3079 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 3080 return (EINVAL); 3081 3082 if (hw->phy.media_type == ixgbe_media_type_backplane) 3083 return (EPERM); 3084 3085 /* 3086 * We don't actually need to check against the supported 3087 * media types of the adapter; ifmedia will take care of 3088 * that for us. 3089 */ 3090 switch (IFM_SUBTYPE(ifm->ifm_media)) { 3091 case IFM_AUTO: 3092 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 3093 &negotiate); 3094 if (err != IXGBE_SUCCESS) { 3095 device_printf(sc->dev, "Unable to determine " 3096 "supported advertise speeds\n"); 3097 return (ENODEV); 3098 } 3099 speed |= link_caps; 3100 break; 3101 case IFM_10G_T: 3102 case IFM_10G_LRM: 3103 case IFM_10G_LR: 3104 case IFM_10G_TWINAX: 3105 case IFM_10G_SR: 3106 case IFM_10G_CX4: 3107 case IFM_10G_KR: 3108 case IFM_10G_KX4: 3109 speed |= IXGBE_LINK_SPEED_10GB_FULL; 3110 break; 3111 case IFM_5000_T: 3112 speed |= IXGBE_LINK_SPEED_5GB_FULL; 3113 break; 3114 case IFM_2500_T: 3115 case IFM_2500_KX: 3116 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 3117 break; 3118 case IFM_1000_T: 3119 case IFM_1000_LX: 3120 case IFM_1000_SX: 3121 case IFM_1000_KX: 3122 speed |= IXGBE_LINK_SPEED_1GB_FULL; 3123 break; 3124 case IFM_100_TX: 3125 speed |= IXGBE_LINK_SPEED_100_FULL; 3126 break; 3127 case IFM_10_T: 3128 speed |= IXGBE_LINK_SPEED_10_FULL; 3129 break; 3130 case IFM_NONE: 3131 break; 3132 default: 3133 goto invalid; 3134 } 3135 3136 hw->mac.autotry_restart = TRUE; 3137 hw->mac.ops.setup_link(hw, speed, TRUE); 3138 sc->advertise = 0; 3139 if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) { 3140 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 3141 sc->advertise |= 1 << 2; 3142 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 3143 sc->advertise |= 1 << 1; 3144 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 3145 sc->advertise |= 1 << 0; 3146 if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0) 3147 sc->advertise |= 1 << 3; 3148 if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0) 3149 sc->advertise |= 1 << 4; 3150 if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0) 3151 sc->advertise |= 1 << 5; 3152 } 3153 3154 return (0); 3155 3156 invalid: 3157 device_printf(sc->dev, "Invalid media type!\n"); 3158 3159 return (EINVAL); 3160 } /* ixgbe_media_change */ 3161 3162 /************************************************************************ 3163 * ixgbe_msix_admin - Link status change ISR (MSI-X) 3164 ************************************************************************/ 3165 static int 3166 ixgbe_msix_admin(void *arg) 3167 { 3168 struct ixgbe_softc *sc = arg; 3169 struct ixgbe_hw *hw = &sc->hw; 3170 u32 eicr; 3171 u32 eims_orig; 3172 u32 eims_disable = 0; 3173 3174 IXGBE_EVC_ADD(&sc->admin_irqev, 1); 3175 3176 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 3177 /* Pause other interrupts */ 3178 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_MSIX_OTHER_CLEAR_MASK); 3179 3180 /* 3181 * First get the cause. 3182 * 3183 * The specifications of 82598, 82599, X540 and X550 say EICS register 3184 * is write only. However, Linux says it is a workaround for silicon 3185 * errata to read EICS instead of EICR to get interrupt cause. 3186 * At least, reading EICR clears lower 16bits of EIMS on 82598. 3187 */ 3188 eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 3189 /* Be sure the queue bits are not cleared */ 3190 eicr &= ~IXGBE_EICR_RTX_QUEUE; 3191 /* Clear all OTHER interrupts with write */ 3192 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); 3193 3194 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 3195 3196 /* Re-enable some OTHER interrupts */ 3197 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig & ~eims_disable); 3198 3199 return 1; 3200 } /* ixgbe_msix_admin */ 3201 3202 static void 3203 ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable) 3204 { 3205 struct ixgbe_hw *hw = &sc->hw; 3206 u32 task_requests = 0; 3207 s32 retval; 3208 3209 /* Link status change */ 3210 if (eicr & IXGBE_EICR_LSC) { 3211 task_requests |= IXGBE_REQUEST_TASK_LSC; 3212 *eims_disable |= IXGBE_EIMS_LSC; 3213 } 3214 3215 if (ixgbe_is_sfp(hw)) { 3216 u32 eicr_mask; 3217 3218 /* Pluggable optics-related interrupt */ 3219 if (hw->mac.type >= ixgbe_mac_X540) 3220 eicr_mask = IXGBE_EICR_GPI_SDP0_X540; 3221 else 3222 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 3223 3224 /* 3225 * An interrupt might not arrive when a module is inserted. 3226 * When an link status change interrupt occurred and the driver 3227 * still regard SFP as unplugged, issue the module softint 3228 * and then issue LSC interrupt. 3229 */ 3230 if ((eicr & eicr_mask) 3231 || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present) 3232 && (eicr & IXGBE_EICR_LSC))) { 3233 task_requests |= IXGBE_REQUEST_TASK_MOD; 3234 *eims_disable |= IXGBE_EIMS_LSC; 3235 } 3236 3237 if ((hw->mac.type == ixgbe_mac_82599EB) && 3238 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { 3239 task_requests |= IXGBE_REQUEST_TASK_MSF; 3240 *eims_disable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 3241 } 3242 } 3243 3244 if (sc->hw.mac.type != ixgbe_mac_82598EB) { 3245 #ifdef IXGBE_FDIR 3246 if ((sc->feat_en & IXGBE_FEATURE_FDIR) && 3247 (eicr & IXGBE_EICR_FLOW_DIR)) { 3248 if (!atomic_cas_uint(&sc->fdir_reinit, 0, 1)) { 3249 task_requests |= IXGBE_REQUEST_TASK_FDIR; 3250 /* Disable the interrupt */ 3251 *eims_disable |= IXGBE_EIMS_FLOW_DIR; 3252 } 3253 } 3254 #endif 3255 3256 if (eicr & IXGBE_EICR_ECC) { 3257 if (ratecheck(&sc->lasterr_time, 3258 &ixgbe_errlog_intrvl)) 3259 device_printf(sc->dev, 3260 "CRITICAL: ECC ERROR!! Please Reboot!!\n"); 3261 } 3262 3263 /* Check for over temp condition */ 3264 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) { 3265 switch (sc->hw.mac.type) { 3266 case ixgbe_mac_X550EM_a: 3267 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a)) 3268 break; 3269 retval = hw->phy.ops.check_overtemp(hw); 3270 if (retval != IXGBE_ERR_OVERTEMP) 3271 break; 3272 if (ratecheck(&sc->lasterr_time, 3273 &ixgbe_errlog_intrvl)) { 3274 device_printf(sc->dev, 3275 "CRITICAL: OVER TEMP!! " 3276 "PHY IS SHUT DOWN!!\n"); 3277 device_printf(sc->dev, 3278 "System shutdown required!\n"); 3279 } 3280 break; 3281 default: 3282 if (!(eicr & IXGBE_EICR_TS)) 3283 break; 3284 retval = hw->phy.ops.check_overtemp(hw); 3285 if (retval != IXGBE_ERR_OVERTEMP) 3286 break; 3287 if (ratecheck(&sc->lasterr_time, 3288 &ixgbe_errlog_intrvl)) { 3289 device_printf(sc->dev, 3290 "CRITICAL: OVER TEMP!! " 3291 "PHY IS SHUT DOWN!!\n"); 3292 device_printf(sc->dev, 3293 "System shutdown required!\n"); 3294 } 3295 break; 3296 } 3297 } 3298 3299 /* Check for VF message */ 3300 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) && 3301 (eicr & IXGBE_EICR_MAILBOX)) { 3302 task_requests |= IXGBE_REQUEST_TASK_MBX; 3303 *eims_disable |= IXGBE_EIMS_MAILBOX; 3304 } 3305 } 3306 3307 /* Check for fan failure */ 3308 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 3309 ixgbe_check_fan_failure(sc, eicr, true); 3310 3311 /* External PHY interrupt */ 3312 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) && 3313 (eicr & IXGBE_EICR_GPI_SDP0_X540)) { 3314 task_requests |= IXGBE_REQUEST_TASK_PHY; 3315 *eims_disable |= IXGBE_EICR_GPI_SDP0_X540; 3316 } 3317 3318 if (task_requests != 0) { 3319 mutex_enter(&sc->admin_mtx); 3320 sc->task_requests |= task_requests; 3321 ixgbe_schedule_admin_tasklet(sc); 3322 mutex_exit(&sc->admin_mtx); 3323 } 3324 } 3325 3326 static void 3327 ixgbe_eitr_write(struct ixgbe_softc *sc, uint32_t index, uint32_t itr) 3328 { 3329 3330 if (sc->hw.mac.type == ixgbe_mac_82598EB) 3331 itr |= itr << 16; 3332 else 3333 itr |= IXGBE_EITR_CNT_WDIS; 3334 3335 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(index), itr); 3336 } 3337 3338 3339 /************************************************************************ 3340 * ixgbe_sysctl_interrupt_rate_handler 3341 ************************************************************************/ 3342 static int 3343 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS) 3344 { 3345 struct sysctlnode node = *rnode; 3346 struct ix_queue *que = (struct ix_queue *)node.sysctl_data; 3347 struct ixgbe_softc *sc; 3348 uint32_t reg, usec, rate; 3349 int error; 3350 3351 if (que == NULL) 3352 return 0; 3353 3354 sc = que->sc; 3355 if (ixgbe_fw_recovery_mode_swflag(sc)) 3356 return (EPERM); 3357 3358 reg = IXGBE_READ_REG(&sc->hw, IXGBE_EITR(que->msix)); 3359 usec = ((reg & 0x0FF8) >> 3); 3360 if (usec > 0) 3361 rate = 500000 / usec; 3362 else 3363 rate = 0; 3364 node.sysctl_data = &rate; 3365 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 3366 if (error || newp == NULL) 3367 return error; 3368 reg &= ~0xfff; /* default, no limitation */ 3369 if (rate > 0 && rate < 500000) { 3370 if (rate < 1000) 3371 rate = 1000; 3372 reg |= ((4000000 / rate) & 0xff8); 3373 /* 3374 * When RSC is used, ITR interval must be larger than 3375 * RSC_DELAY. Currently, we use 2us for RSC_DELAY. 3376 * The minimum value is always greater than 2us on 100M 3377 * (and 10M?(not documented)), but it's not on 1G and higher. 3378 */ 3379 if ((sc->link_speed != IXGBE_LINK_SPEED_100_FULL) 3380 && (sc->link_speed != IXGBE_LINK_SPEED_10_FULL)) { 3381 if ((sc->num_queues > 1) 3382 && (reg < IXGBE_MIN_RSC_EITR_10G1G)) 3383 return EINVAL; 3384 } 3385 sc->max_interrupt_rate = rate; 3386 } else 3387 sc->max_interrupt_rate = 0; 3388 ixgbe_eitr_write(sc, que->msix, reg); 3389 3390 return (0); 3391 } /* ixgbe_sysctl_interrupt_rate_handler */ 3392 3393 const struct sysctlnode * 3394 ixgbe_sysctl_instance(struct ixgbe_softc *sc) 3395 { 3396 const char *dvname; 3397 struct sysctllog **log; 3398 int rc; 3399 const struct sysctlnode *rnode; 3400 3401 if (sc->sysctltop != NULL) 3402 return sc->sysctltop; 3403 3404 log = &sc->sysctllog; 3405 dvname = device_xname(sc->dev); 3406 3407 if ((rc = sysctl_createv(log, 0, NULL, &rnode, 3408 0, CTLTYPE_NODE, dvname, 3409 SYSCTL_DESCR("ixgbe information and settings"), 3410 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 3411 goto err; 3412 3413 return rnode; 3414 err: 3415 device_printf(sc->dev, 3416 "%s: sysctl_createv failed, rc = %d\n", __func__, rc); 3417 return NULL; 3418 } 3419 3420 /************************************************************************ 3421 * ixgbe_add_device_sysctls 3422 ************************************************************************/ 3423 static void 3424 ixgbe_add_device_sysctls(struct ixgbe_softc *sc) 3425 { 3426 device_t dev = sc->dev; 3427 struct ixgbe_hw *hw = &sc->hw; 3428 struct sysctllog **log; 3429 const struct sysctlnode *rnode, *cnode; 3430 3431 log = &sc->sysctllog; 3432 3433 if ((rnode = ixgbe_sysctl_instance(sc)) == NULL) { 3434 aprint_error_dev(dev, "could not create sysctl root\n"); 3435 return; 3436 } 3437 3438 if (sysctl_createv(log, 0, &rnode, &cnode, 3439 CTLFLAG_READWRITE, CTLTYPE_INT, 3440 "debug", SYSCTL_DESCR("Debug Info"), 3441 ixgbe_sysctl_debug, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL) 3442 != 0) 3443 aprint_error_dev(dev, "could not create sysctl\n"); 3444 3445 if (sysctl_createv(log, 0, &rnode, &cnode, 3446 CTLFLAG_READWRITE, CTLTYPE_INT, 3447 "rx_copy_len", SYSCTL_DESCR("RX Copy Length"), 3448 ixgbe_sysctl_rx_copy_len, 0, 3449 (void *)sc, 0, CTL_CREATE, CTL_EOL) != 0) 3450 aprint_error_dev(dev, "could not create sysctl\n"); 3451 3452 if (sysctl_createv(log, 0, &rnode, &cnode, 3453 CTLFLAG_READONLY, CTLTYPE_INT, 3454 "num_tx_desc", SYSCTL_DESCR("Number of TX descriptors"), 3455 NULL, 0, &sc->num_tx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3456 aprint_error_dev(dev, "could not create sysctl\n"); 3457 3458 if (sysctl_createv(log, 0, &rnode, &cnode, 3459 CTLFLAG_READONLY, CTLTYPE_INT, 3460 "num_rx_desc", SYSCTL_DESCR("Number of RX descriptors"), 3461 NULL, 0, &sc->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0) 3462 aprint_error_dev(dev, "could not create sysctl\n"); 3463 3464 if (sysctl_createv(log, 0, &rnode, &cnode, 3465 CTLFLAG_READWRITE, CTLTYPE_INT, "rx_process_limit", 3466 SYSCTL_DESCR("max number of RX packets to process"), 3467 ixgbe_sysctl_rx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3468 CTL_EOL) != 0) 3469 aprint_error_dev(dev, "could not create sysctl\n"); 3470 3471 if (sysctl_createv(log, 0, &rnode, &cnode, 3472 CTLFLAG_READWRITE, CTLTYPE_INT, "tx_process_limit", 3473 SYSCTL_DESCR("max number of TX packets to process"), 3474 ixgbe_sysctl_tx_process_limit, 0, (void *)sc, 0, CTL_CREATE, 3475 CTL_EOL) != 0) 3476 aprint_error_dev(dev, "could not create sysctl\n"); 3477 3478 if (sysctl_createv(log, 0, &rnode, &cnode, 3479 CTLFLAG_READONLY, CTLTYPE_INT, 3480 "num_queues", SYSCTL_DESCR("Number of queues"), 3481 NULL, 0, &sc->num_queues, 0, CTL_CREATE, CTL_EOL) != 0) 3482 aprint_error_dev(dev, "could not create sysctl\n"); 3483 3484 /* Sysctls for all devices */ 3485 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3486 CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC), 3487 ixgbe_sysctl_flowcntl, 0, (void *)sc, 0, CTL_CREATE, 3488 CTL_EOL) != 0) 3489 aprint_error_dev(dev, "could not create sysctl\n"); 3490 3491 sc->enable_aim = ixgbe_enable_aim; 3492 sc->max_interrupt_rate = ixgbe_max_interrupt_rate; 3493 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3494 CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"), 3495 NULL, 0, &sc->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0) 3496 aprint_error_dev(dev, "could not create sysctl\n"); 3497 3498 if (sysctl_createv(log, 0, &rnode, &cnode, 3499 CTLFLAG_READWRITE, CTLTYPE_INT, 3500 "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED), 3501 ixgbe_sysctl_advertise, 0, (void *)sc, 0, CTL_CREATE, 3502 CTL_EOL) != 0) 3503 aprint_error_dev(dev, "could not create sysctl\n"); 3504 3505 /* 3506 * If each "que->txrx_use_workqueue" is changed in sysctl handler, 3507 * it causesflip-flopping softint/workqueue mode in one deferred 3508 * processing. Therefore, preempt_disable()/preempt_enable() are 3509 * required in ixgbe_sched_handle_que() to avoid 3510 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule(). 3511 * I think changing "que->txrx_use_workqueue" in interrupt handler 3512 * is lighter than doing preempt_disable()/preempt_enable() in every 3513 * ixgbe_sched_handle_que(). 3514 */ 3515 sc->txrx_use_workqueue = ixgbe_txrx_workqueue; 3516 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3517 CTLTYPE_BOOL, "txrx_workqueue", 3518 SYSCTL_DESCR("Use workqueue for packet processing"), 3519 NULL, 0, &sc->txrx_use_workqueue, 0, CTL_CREATE, 3520 CTL_EOL) != 0) 3521 aprint_error_dev(dev, "could not create sysctl\n"); 3522 3523 #ifdef IXGBE_DEBUG 3524 /* testing sysctls (for all devices) */ 3525 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3526 CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"), 3527 ixgbe_sysctl_power_state, 0, (void *)sc, 0, CTL_CREATE, 3528 CTL_EOL) != 0) 3529 aprint_error_dev(dev, "could not create sysctl\n"); 3530 3531 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY, 3532 CTLTYPE_STRING, "print_rss_config", 3533 SYSCTL_DESCR("Prints RSS Configuration"), 3534 ixgbe_sysctl_print_rss_config, 0, (void *)sc, 0, CTL_CREATE, 3535 CTL_EOL) != 0) 3536 aprint_error_dev(dev, "could not create sysctl\n"); 3537 #endif 3538 /* for X550 series devices */ 3539 if (hw->mac.type >= ixgbe_mac_X550) 3540 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3541 CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"), 3542 ixgbe_sysctl_dmac, 0, (void *)sc, 0, CTL_CREATE, 3543 CTL_EOL) != 0) 3544 aprint_error_dev(dev, "could not create sysctl\n"); 3545 3546 /* for WoL-capable devices */ 3547 if (sc->wol_support) { 3548 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3549 CTLTYPE_BOOL, "wol_enable", 3550 SYSCTL_DESCR("Enable/Disable Wake on LAN"), 3551 ixgbe_sysctl_wol_enable, 0, (void *)sc, 0, CTL_CREATE, 3552 CTL_EOL) != 0) 3553 aprint_error_dev(dev, "could not create sysctl\n"); 3554 3555 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3556 CTLTYPE_INT, "wufc", 3557 SYSCTL_DESCR("Enable/Disable Wake Up Filters"), 3558 ixgbe_sysctl_wufc, 0, (void *)sc, 0, CTL_CREATE, 3559 CTL_EOL) != 0) 3560 aprint_error_dev(dev, "could not create sysctl\n"); 3561 } 3562 3563 /* for X552/X557-AT devices */ 3564 if ((hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) || 3565 (hw->device_id == IXGBE_DEV_ID_X550EM_A_10G_T)) { 3566 const struct sysctlnode *phy_node; 3567 3568 if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE, 3569 "phy", SYSCTL_DESCR("External PHY sysctls"), 3570 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) { 3571 aprint_error_dev(dev, "could not create sysctl\n"); 3572 return; 3573 } 3574 3575 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3576 CTLTYPE_INT, "temp", 3577 SYSCTL_DESCR("Current External PHY Temperature (Celsius)"), 3578 ixgbe_sysctl_phy_temp, 0, (void *)sc, 0, CTL_CREATE, 3579 CTL_EOL) != 0) 3580 aprint_error_dev(dev, "could not create sysctl\n"); 3581 3582 if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY, 3583 CTLTYPE_INT, "overtemp_occurred", 3584 SYSCTL_DESCR( 3585 "External PHY High Temperature Event Occurred"), 3586 ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)sc, 0, 3587 CTL_CREATE, CTL_EOL) != 0) 3588 aprint_error_dev(dev, "could not create sysctl\n"); 3589 } 3590 3591 if ((hw->mac.type == ixgbe_mac_X550EM_a) 3592 && (hw->phy.type == ixgbe_phy_fw)) 3593 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3594 CTLTYPE_BOOL, "force_10_100_autonego", 3595 SYSCTL_DESCR("Force autonego on 10M and 100M"), 3596 NULL, 0, &hw->phy.force_10_100_autonego, 0, 3597 CTL_CREATE, CTL_EOL) != 0) 3598 aprint_error_dev(dev, "could not create sysctl\n"); 3599 3600 if (sc->feat_cap & IXGBE_FEATURE_EEE) { 3601 if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE, 3602 CTLTYPE_INT, "eee_state", 3603 SYSCTL_DESCR("EEE Power Save State"), 3604 ixgbe_sysctl_eee_state, 0, (void *)sc, 0, CTL_CREATE, 3605 CTL_EOL) != 0) 3606 aprint_error_dev(dev, "could not create sysctl\n"); 3607 } 3608 } /* ixgbe_add_device_sysctls */ 3609 3610 /************************************************************************ 3611 * ixgbe_allocate_pci_resources 3612 ************************************************************************/ 3613 static int 3614 ixgbe_allocate_pci_resources(struct ixgbe_softc *sc, 3615 const struct pci_attach_args *pa) 3616 { 3617 pcireg_t memtype, csr; 3618 device_t dev = sc->dev; 3619 bus_addr_t addr; 3620 int flags; 3621 3622 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0)); 3623 switch (memtype) { 3624 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 3625 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 3626 sc->osdep.mem_bus_space_tag = pa->pa_memt; 3627 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0), 3628 memtype, &addr, &sc->osdep.mem_size, &flags) != 0) 3629 goto map_err; 3630 if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) { 3631 aprint_normal_dev(dev, "clearing prefetchable bit\n"); 3632 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 3633 } 3634 if (bus_space_map(sc->osdep.mem_bus_space_tag, addr, 3635 sc->osdep.mem_size, flags, 3636 &sc->osdep.mem_bus_space_handle) != 0) { 3637 map_err: 3638 sc->osdep.mem_size = 0; 3639 aprint_error_dev(dev, "unable to map BAR0\n"); 3640 return ENXIO; 3641 } 3642 /* 3643 * Enable address decoding for memory range in case BIOS or 3644 * UEFI don't set it. 3645 */ 3646 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 3647 PCI_COMMAND_STATUS_REG); 3648 csr |= PCI_COMMAND_MEM_ENABLE; 3649 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 3650 csr); 3651 break; 3652 default: 3653 aprint_error_dev(dev, "unexpected type on BAR0\n"); 3654 return ENXIO; 3655 } 3656 3657 return (0); 3658 } /* ixgbe_allocate_pci_resources */ 3659 3660 static void 3661 ixgbe_free_deferred_handlers(struct ixgbe_softc *sc) 3662 { 3663 struct ix_queue *que = sc->queues; 3664 struct tx_ring *txr = sc->tx_rings; 3665 int i; 3666 3667 for (i = 0; i < sc->num_queues; i++, que++, txr++) { 3668 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 3669 if (txr->txr_si != NULL) 3670 softint_disestablish(txr->txr_si); 3671 } 3672 if (que->que_si != NULL) 3673 softint_disestablish(que->que_si); 3674 } 3675 if (sc->txr_wq != NULL) 3676 workqueue_destroy(sc->txr_wq); 3677 if (sc->txr_wq_enqueued != NULL) 3678 percpu_free(sc->txr_wq_enqueued, sizeof(u_int)); 3679 if (sc->que_wq != NULL) 3680 workqueue_destroy(sc->que_wq); 3681 3682 if (sc->admin_wq != NULL) { 3683 workqueue_destroy(sc->admin_wq); 3684 sc->admin_wq = NULL; 3685 } 3686 if (sc->timer_wq != NULL) { 3687 workqueue_destroy(sc->timer_wq); 3688 sc->timer_wq = NULL; 3689 } 3690 if (sc->recovery_mode_timer_wq != NULL) { 3691 /* 3692 * ixgbe_ifstop() doesn't call the workqueue_wait() for 3693 * the recovery_mode_timer workqueue, so call it here. 3694 */ 3695 workqueue_wait(sc->recovery_mode_timer_wq, 3696 &sc->recovery_mode_timer_wc); 3697 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 3698 workqueue_destroy(sc->recovery_mode_timer_wq); 3699 sc->recovery_mode_timer_wq = NULL; 3700 } 3701 } /* ixgbe_free_deferred_handlers */ 3702 3703 /************************************************************************ 3704 * ixgbe_detach - Device removal routine 3705 * 3706 * Called when the driver is being removed. 3707 * Stops the adapter and deallocates all the resources 3708 * that were allocated for driver operation. 3709 * 3710 * return 0 on success, positive on failure 3711 ************************************************************************/ 3712 static int 3713 ixgbe_detach(device_t dev, int flags) 3714 { 3715 struct ixgbe_softc *sc = device_private(dev); 3716 struct rx_ring *rxr = sc->rx_rings; 3717 struct tx_ring *txr = sc->tx_rings; 3718 struct ixgbe_hw *hw = &sc->hw; 3719 struct ixgbe_hw_stats *stats = &sc->stats.pf; 3720 u32 ctrl_ext; 3721 int i; 3722 3723 INIT_DEBUGOUT("ixgbe_detach: begin"); 3724 if (sc->osdep.attached == false) 3725 return 0; 3726 3727 if (ixgbe_pci_iov_detach(dev) != 0) { 3728 device_printf(dev, "SR-IOV in use; detach first.\n"); 3729 return (EBUSY); 3730 } 3731 3732 if (VLAN_ATTACHED(&sc->osdep.ec) && 3733 (flags & (DETACH_SHUTDOWN | DETACH_FORCE)) == 0) { 3734 aprint_error_dev(dev, "VLANs in use, detach first\n"); 3735 return (EBUSY); 3736 } 3737 3738 ether_ifdetach(sc->ifp); 3739 3740 sc->osdep.detaching = true; 3741 /* 3742 * Stop the interface. ixgbe_setup_low_power_mode() calls 3743 * ixgbe_ifstop(), so it's not required to call ixgbe_ifstop() 3744 * directly. 3745 */ 3746 ixgbe_setup_low_power_mode(sc); 3747 3748 callout_halt(&sc->timer, NULL); 3749 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 3750 callout_halt(&sc->recovery_mode_timer, NULL); 3751 3752 workqueue_wait(sc->admin_wq, &sc->admin_wc); 3753 atomic_store_relaxed(&sc->admin_pending, 0); 3754 workqueue_wait(sc->timer_wq, &sc->timer_wc); 3755 atomic_store_relaxed(&sc->timer_pending, 0); 3756 3757 pmf_device_deregister(dev); 3758 3759 ixgbe_free_deferred_handlers(sc); 3760 3761 /* let hardware know driver is unloading */ 3762 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT); 3763 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 3764 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext); 3765 3766 if (sc->feat_en & IXGBE_FEATURE_NETMAP) 3767 netmap_detach(sc->ifp); 3768 3769 ixgbe_free_pci_resources(sc); 3770 #if 0 /* XXX the NetBSD port is probably missing something here */ 3771 bus_generic_detach(dev); 3772 #endif 3773 if_detach(sc->ifp); 3774 ifmedia_fini(&sc->media); 3775 if_percpuq_destroy(sc->ipq); 3776 3777 sysctl_teardown(&sc->sysctllog); 3778 evcnt_detach(&sc->efbig_tx_dma_setup); 3779 evcnt_detach(&sc->mbuf_defrag_failed); 3780 evcnt_detach(&sc->efbig2_tx_dma_setup); 3781 evcnt_detach(&sc->einval_tx_dma_setup); 3782 evcnt_detach(&sc->other_tx_dma_setup); 3783 evcnt_detach(&sc->eagain_tx_dma_setup); 3784 evcnt_detach(&sc->enomem_tx_dma_setup); 3785 evcnt_detach(&sc->watchdog_events); 3786 evcnt_detach(&sc->tso_err); 3787 evcnt_detach(&sc->admin_irqev); 3788 evcnt_detach(&sc->link_workev); 3789 evcnt_detach(&sc->mod_workev); 3790 evcnt_detach(&sc->msf_workev); 3791 evcnt_detach(&sc->phy_workev); 3792 3793 for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) { 3794 if (i < __arraycount(stats->mpc)) { 3795 evcnt_detach(&stats->mpc[i]); 3796 if (hw->mac.type == ixgbe_mac_82598EB) 3797 evcnt_detach(&stats->rnbc[i]); 3798 } 3799 if (i < __arraycount(stats->pxontxc)) { 3800 evcnt_detach(&stats->pxontxc[i]); 3801 evcnt_detach(&stats->pxonrxc[i]); 3802 evcnt_detach(&stats->pxofftxc[i]); 3803 evcnt_detach(&stats->pxoffrxc[i]); 3804 if (hw->mac.type >= ixgbe_mac_82599EB) 3805 evcnt_detach(&stats->pxon2offc[i]); 3806 } 3807 } 3808 3809 txr = sc->tx_rings; 3810 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) { 3811 evcnt_detach(&sc->queues[i].irqs); 3812 evcnt_detach(&sc->queues[i].handleq); 3813 evcnt_detach(&sc->queues[i].req); 3814 evcnt_detach(&txr->total_packets); 3815 #ifndef IXGBE_LEGACY_TX 3816 evcnt_detach(&txr->pcq_drops); 3817 #endif 3818 evcnt_detach(&txr->no_desc_avail); 3819 evcnt_detach(&txr->tso_tx); 3820 3821 if (i < __arraycount(stats->qprc)) { 3822 evcnt_detach(&stats->qprc[i]); 3823 evcnt_detach(&stats->qptc[i]); 3824 evcnt_detach(&stats->qbrc[i]); 3825 evcnt_detach(&stats->qbtc[i]); 3826 if (hw->mac.type >= ixgbe_mac_82599EB) 3827 evcnt_detach(&stats->qprdc[i]); 3828 } 3829 3830 evcnt_detach(&rxr->rx_packets); 3831 evcnt_detach(&rxr->rx_bytes); 3832 evcnt_detach(&rxr->rx_copies); 3833 evcnt_detach(&rxr->no_mbuf); 3834 evcnt_detach(&rxr->rx_discarded); 3835 } 3836 evcnt_detach(&stats->ipcs); 3837 evcnt_detach(&stats->l4cs); 3838 evcnt_detach(&stats->ipcs_bad); 3839 evcnt_detach(&stats->l4cs_bad); 3840 evcnt_detach(&stats->intzero); 3841 evcnt_detach(&stats->legint); 3842 evcnt_detach(&stats->crcerrs); 3843 evcnt_detach(&stats->illerrc); 3844 evcnt_detach(&stats->errbc); 3845 evcnt_detach(&stats->mspdc); 3846 if (hw->mac.type >= ixgbe_mac_X550) 3847 evcnt_detach(&stats->mbsdc); 3848 evcnt_detach(&stats->mpctotal); 3849 evcnt_detach(&stats->mlfc); 3850 evcnt_detach(&stats->mrfc); 3851 if (hw->mac.type == ixgbe_mac_X550EM_a) 3852 evcnt_detach(&stats->link_dn_cnt); 3853 evcnt_detach(&stats->rlec); 3854 evcnt_detach(&stats->lxontxc); 3855 evcnt_detach(&stats->lxonrxc); 3856 evcnt_detach(&stats->lxofftxc); 3857 evcnt_detach(&stats->lxoffrxc); 3858 3859 /* Packet Reception Stats */ 3860 evcnt_detach(&stats->tor); 3861 evcnt_detach(&stats->gorc); 3862 evcnt_detach(&stats->tpr); 3863 evcnt_detach(&stats->gprc); 3864 evcnt_detach(&stats->mprc); 3865 evcnt_detach(&stats->bprc); 3866 evcnt_detach(&stats->prc64); 3867 evcnt_detach(&stats->prc127); 3868 evcnt_detach(&stats->prc255); 3869 evcnt_detach(&stats->prc511); 3870 evcnt_detach(&stats->prc1023); 3871 evcnt_detach(&stats->prc1522); 3872 evcnt_detach(&stats->ruc); 3873 evcnt_detach(&stats->rfc); 3874 evcnt_detach(&stats->roc); 3875 evcnt_detach(&stats->rjc); 3876 evcnt_detach(&stats->mngprc); 3877 evcnt_detach(&stats->mngpdc); 3878 evcnt_detach(&stats->xec); 3879 3880 /* Packet Transmission Stats */ 3881 evcnt_detach(&stats->gotc); 3882 evcnt_detach(&stats->tpt); 3883 evcnt_detach(&stats->gptc); 3884 evcnt_detach(&stats->bptc); 3885 evcnt_detach(&stats->mptc); 3886 evcnt_detach(&stats->mngptc); 3887 evcnt_detach(&stats->ptc64); 3888 evcnt_detach(&stats->ptc127); 3889 evcnt_detach(&stats->ptc255); 3890 evcnt_detach(&stats->ptc511); 3891 evcnt_detach(&stats->ptc1023); 3892 evcnt_detach(&stats->ptc1522); 3893 3894 ixgbe_free_queues(sc); 3895 free(sc->mta, M_DEVBUF); 3896 3897 mutex_destroy(&sc->admin_mtx); /* XXX appropriate order? */ 3898 IXGBE_CORE_LOCK_DESTROY(sc); 3899 3900 return (0); 3901 } /* ixgbe_detach */ 3902 3903 /************************************************************************ 3904 * ixgbe_setup_low_power_mode - LPLU/WoL preparation 3905 * 3906 * Prepare the adapter/port for LPLU and/or WoL 3907 ************************************************************************/ 3908 static int 3909 ixgbe_setup_low_power_mode(struct ixgbe_softc *sc) 3910 { 3911 struct ixgbe_hw *hw = &sc->hw; 3912 device_t dev = sc->dev; 3913 struct ifnet *ifp = sc->ifp; 3914 s32 error = 0; 3915 3916 /* Limit power management flow to X550EM baseT */ 3917 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 3918 hw->phy.ops.enter_lplu) { 3919 /* X550EM baseT adapters need a special LPLU flow */ 3920 hw->phy.reset_disable = true; 3921 ixgbe_ifstop(ifp, 1); 3922 error = hw->phy.ops.enter_lplu(hw); 3923 if (error) 3924 device_printf(dev, 3925 "Error entering LPLU: %d\n", error); 3926 hw->phy.reset_disable = false; 3927 } else { 3928 /* Just stop for other adapters */ 3929 ixgbe_ifstop(ifp, 1); 3930 } 3931 3932 IXGBE_CORE_LOCK(sc); 3933 3934 if (!hw->wol_enabled) { 3935 ixgbe_set_phy_power(hw, FALSE); 3936 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 3937 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); 3938 } else { 3939 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3940 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw), 3941 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2); 3942 3943 /* 3944 * Clear Wake Up Status register to prevent any previous wakeup 3945 * events from waking us up immediately after we suspend. 3946 */ 3947 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3948 3949 /* 3950 * Program the Wakeup Filter Control register with user filter 3951 * settings 3952 */ 3953 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc); 3954 3955 /* Enable wakeups and power management in Wakeup Control */ 3956 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3957 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3958 } 3959 3960 IXGBE_CORE_UNLOCK(sc); 3961 3962 return error; 3963 } /* ixgbe_setup_low_power_mode */ 3964 3965 /************************************************************************ 3966 * ixgbe_shutdown - Shutdown entry point 3967 ************************************************************************/ 3968 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */ 3969 static int 3970 ixgbe_shutdown(device_t dev) 3971 { 3972 struct ixgbe_softc *sc = device_private(dev); 3973 int error = 0; 3974 3975 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 3976 3977 error = ixgbe_setup_low_power_mode(sc); 3978 3979 return (error); 3980 } /* ixgbe_shutdown */ 3981 #endif 3982 3983 /************************************************************************ 3984 * ixgbe_suspend 3985 * 3986 * From D0 to D3 3987 ************************************************************************/ 3988 static bool 3989 ixgbe_suspend(device_t dev, const pmf_qual_t *qual) 3990 { 3991 struct ixgbe_softc *sc = device_private(dev); 3992 int error = 0; 3993 3994 INIT_DEBUGOUT("ixgbe_suspend: begin"); 3995 3996 error = ixgbe_setup_low_power_mode(sc); 3997 3998 return (error); 3999 } /* ixgbe_suspend */ 4000 4001 /************************************************************************ 4002 * ixgbe_resume 4003 * 4004 * From D3 to D0 4005 ************************************************************************/ 4006 static bool 4007 ixgbe_resume(device_t dev, const pmf_qual_t *qual) 4008 { 4009 struct ixgbe_softc *sc = device_private(dev); 4010 struct ifnet *ifp = sc->ifp; 4011 struct ixgbe_hw *hw = &sc->hw; 4012 u32 wus; 4013 4014 INIT_DEBUGOUT("ixgbe_resume: begin"); 4015 4016 IXGBE_CORE_LOCK(sc); 4017 4018 /* Read & clear WUS register */ 4019 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 4020 if (wus) 4021 device_printf(dev, "Woken up by (WUS): %#010x\n", 4022 IXGBE_READ_REG(hw, IXGBE_WUS)); 4023 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 4024 /* And clear WUFC until next low-power transition */ 4025 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4026 4027 /* 4028 * Required after D3->D0 transition; 4029 * will re-advertise all previous advertised speeds 4030 */ 4031 if (ifp->if_flags & IFF_UP) 4032 ixgbe_init_locked(sc); 4033 4034 IXGBE_CORE_UNLOCK(sc); 4035 4036 return true; 4037 } /* ixgbe_resume */ 4038 4039 /* 4040 * Set the various hardware offload abilities. 4041 * 4042 * This takes the ifnet's if_capenable flags (e.g. set by the user using 4043 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 4044 * mbuf offload flags the driver will understand. 4045 */ 4046 static void 4047 ixgbe_set_if_hwassist(struct ixgbe_softc *sc) 4048 { 4049 /* XXX */ 4050 } 4051 4052 /************************************************************************ 4053 * ixgbe_init_locked - Init entry point 4054 * 4055 * Used in two ways: It is used by the stack as an init 4056 * entry point in network interface structure. It is also 4057 * used by the driver as a hw/sw initialization routine to 4058 * get to a consistent state. 4059 * 4060 * return 0 on success, positive on failure 4061 ************************************************************************/ 4062 static void 4063 ixgbe_init_locked(struct ixgbe_softc *sc) 4064 { 4065 struct ifnet *ifp = sc->ifp; 4066 device_t dev = sc->dev; 4067 struct ixgbe_hw *hw = &sc->hw; 4068 struct ix_queue *que; 4069 struct tx_ring *txr; 4070 struct rx_ring *rxr; 4071 u32 txdctl, mhadd; 4072 u32 rxdctl, rxctrl; 4073 u32 ctrl_ext; 4074 bool unsupported_sfp = false; 4075 int i, j, error; 4076 4077 /* XXX check IFF_UP and IFF_RUNNING, power-saving state! */ 4078 4079 KASSERT(mutex_owned(&sc->core_mtx)); 4080 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 4081 4082 hw->need_unsupported_sfp_recovery = false; 4083 hw->adapter_stopped = FALSE; 4084 ixgbe_stop_adapter(hw); 4085 callout_stop(&sc->timer); 4086 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4087 callout_stop(&sc->recovery_mode_timer); 4088 for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) 4089 que->disabled_count = 0; 4090 4091 /* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */ 4092 sc->max_frame_size = 4093 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 4094 4095 /* Queue indices may change with IOV mode */ 4096 ixgbe_align_all_queue_indices(sc); 4097 4098 /* reprogram the RAR[0] in case user changed it. */ 4099 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV); 4100 4101 /* Get the latest mac address, User can use a LAA */ 4102 memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl), 4103 IXGBE_ETH_LENGTH_OF_ADDRESS); 4104 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1); 4105 hw->addr_ctrl.rar_used_count = 1; 4106 4107 /* Set hardware offload abilities from ifnet flags */ 4108 ixgbe_set_if_hwassist(sc); 4109 4110 /* Prepare transmit descriptors and buffers */ 4111 if (ixgbe_setup_transmit_structures(sc)) { 4112 device_printf(dev, "Could not setup transmit structures\n"); 4113 ixgbe_stop_locked(sc); 4114 return; 4115 } 4116 4117 ixgbe_init_hw(hw); 4118 4119 ixgbe_initialize_iov(sc); 4120 4121 ixgbe_initialize_transmit_units(sc); 4122 4123 /* Setup Multicast table */ 4124 ixgbe_set_rxfilter(sc); 4125 4126 /* Use fixed buffer size, even for jumbo frames */ 4127 sc->rx_mbuf_sz = MCLBYTES; 4128 4129 /* Prepare receive descriptors and buffers */ 4130 error = ixgbe_setup_receive_structures(sc); 4131 if (error) { 4132 device_printf(dev, 4133 "Could not setup receive structures (err = %d)\n", error); 4134 ixgbe_stop_locked(sc); 4135 return; 4136 } 4137 4138 /* Configure RX settings */ 4139 ixgbe_initialize_receive_units(sc); 4140 4141 /* Initialize variable holding task enqueue requests interrupts */ 4142 sc->task_requests = 0; 4143 4144 /* Enable SDP & MSI-X interrupts based on adapter */ 4145 ixgbe_config_gpie(sc); 4146 4147 /* Set MTU size */ 4148 if (ifp->if_mtu > ETHERMTU) { 4149 /* aka IXGBE_MAXFRS on 82599 and newer */ 4150 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 4151 mhadd &= ~IXGBE_MHADD_MFS_MASK; 4152 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 4153 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 4154 } 4155 4156 /* Now enable all the queues */ 4157 for (i = 0; i < sc->num_queues; i++) { 4158 txr = &sc->tx_rings[i]; 4159 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 4160 txdctl |= IXGBE_TXDCTL_ENABLE; 4161 /* Set WTHRESH to 8, burst writeback */ 4162 txdctl &= ~IXGBE_TXDCTL_WTHRESH_MASK; 4163 txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT; 4164 /* 4165 * When the internal queue falls below PTHRESH (32), 4166 * start prefetching as long as there are at least 4167 * HTHRESH (1) buffers ready. The values are taken 4168 * from the Intel linux driver 3.8.21. 4169 * Prefetching enables tx line rate even with 1 queue. 4170 */ 4171 txdctl |= (32 << 0) | (1 << 8); 4172 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 4173 } 4174 4175 for (i = 0; i < sc->num_queues; i++) { 4176 rxr = &sc->rx_rings[i]; 4177 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 4178 if (hw->mac.type == ixgbe_mac_82598EB) { 4179 /* 4180 * PTHRESH = 21 4181 * HTHRESH = 4 4182 * WTHRESH = 8 4183 */ 4184 rxdctl &= ~0x3FFFFF; 4185 rxdctl |= 0x080420; 4186 } 4187 rxdctl |= IXGBE_RXDCTL_ENABLE; 4188 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 4189 for (j = 0; j < 10; j++) { 4190 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 4191 IXGBE_RXDCTL_ENABLE) 4192 break; 4193 else 4194 msec_delay(1); 4195 } 4196 IXGBE_WRITE_BARRIER(hw); 4197 4198 /* 4199 * In netmap mode, we must preserve the buffers made 4200 * available to userspace before the if_init() 4201 * (this is true by default on the TX side, because 4202 * init makes all buffers available to userspace). 4203 * 4204 * netmap_reset() and the device specific routines 4205 * (e.g. ixgbe_setup_receive_rings()) map these 4206 * buffers at the end of the NIC ring, so here we 4207 * must set the RDT (tail) register to make sure 4208 * they are not overwritten. 4209 * 4210 * In this driver the NIC ring starts at RDH = 0, 4211 * RDT points to the last slot available for reception (?), 4212 * so RDT = num_rx_desc - 1 means the whole ring is available. 4213 */ 4214 #ifdef DEV_NETMAP 4215 if ((sc->feat_en & IXGBE_FEATURE_NETMAP) && 4216 (ifp->if_capenable & IFCAP_NETMAP)) { 4217 struct netmap_adapter *na = NA(sc->ifp); 4218 struct netmap_kring *kring = na->rx_rings[i]; 4219 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 4220 4221 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 4222 } else 4223 #endif /* DEV_NETMAP */ 4224 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), 4225 sc->num_rx_desc - 1); 4226 } 4227 4228 /* Enable Receive engine */ 4229 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 4230 if (hw->mac.type == ixgbe_mac_82598EB) 4231 rxctrl |= IXGBE_RXCTRL_DMBYPS; 4232 rxctrl |= IXGBE_RXCTRL_RXEN; 4233 ixgbe_enable_rx_dma(hw, rxctrl); 4234 4235 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4236 atomic_store_relaxed(&sc->timer_pending, 0); 4237 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) 4238 callout_reset(&sc->recovery_mode_timer, hz, 4239 ixgbe_recovery_mode_timer, sc); 4240 4241 /* Set up MSI/MSI-X routing */ 4242 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4243 ixgbe_configure_ivars(sc); 4244 /* Set up auto-mask */ 4245 if (hw->mac.type == ixgbe_mac_82598EB) 4246 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4247 else { 4248 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4249 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4250 } 4251 } else { /* Simple settings for Legacy/MSI */ 4252 ixgbe_set_ivar(sc, 0, 0, 0); 4253 ixgbe_set_ivar(sc, 0, 0, 1); 4254 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 4255 } 4256 4257 ixgbe_init_fdir(sc); 4258 4259 /* 4260 * Check on any SFP devices that 4261 * need to be kick-started 4262 */ 4263 if (hw->phy.type == ixgbe_phy_none) { 4264 error = hw->phy.ops.identify(hw); 4265 if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) 4266 unsupported_sfp = true; 4267 } else if (hw->phy.type == ixgbe_phy_sfp_unsupported) 4268 unsupported_sfp = true; 4269 4270 if (unsupported_sfp) 4271 device_printf(dev, 4272 "Unsupported SFP+ module type was detected.\n"); 4273 4274 /* Set moderation on the Link interrupt */ 4275 ixgbe_eitr_write(sc, sc->vector, IXGBE_LINK_ITR); 4276 4277 /* Enable EEE power saving */ 4278 if (sc->feat_cap & IXGBE_FEATURE_EEE) 4279 hw->mac.ops.setup_eee(hw, 4280 sc->feat_en & IXGBE_FEATURE_EEE); 4281 4282 /* Enable power to the phy. */ 4283 if (!unsupported_sfp) { 4284 ixgbe_set_phy_power(hw, TRUE); 4285 4286 /* Config/Enable Link */ 4287 ixgbe_config_link(sc); 4288 } 4289 4290 /* Hardware Packet Buffer & Flow Control setup */ 4291 ixgbe_config_delay_values(sc); 4292 4293 /* Initialize the FC settings */ 4294 ixgbe_start_hw(hw); 4295 4296 /* Set up VLAN support and filter */ 4297 ixgbe_setup_vlan_hw_support(sc); 4298 4299 /* Setup DMA Coalescing */ 4300 ixgbe_config_dmac(sc); 4301 4302 /* OK to schedule workqueues. */ 4303 sc->schedule_wqs_ok = true; 4304 4305 /* Enable the use of the MBX by the VF's */ 4306 if (sc->feat_en & IXGBE_FEATURE_SRIOV) { 4307 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 4308 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; 4309 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 4310 } 4311 4312 /* Update saved flags. See ixgbe_ifflags_cb() */ 4313 sc->if_flags = ifp->if_flags; 4314 sc->ec_capenable = sc->osdep.ec.ec_capenable; 4315 4316 /* Inform the stack we're ready */ 4317 ifp->if_flags |= IFF_RUNNING; 4318 4319 /* And now turn on interrupts */ 4320 ixgbe_enable_intr(sc); 4321 4322 return; 4323 } /* ixgbe_init_locked */ 4324 4325 /************************************************************************ 4326 * ixgbe_init 4327 ************************************************************************/ 4328 static int 4329 ixgbe_init(struct ifnet *ifp) 4330 { 4331 struct ixgbe_softc *sc = ifp->if_softc; 4332 4333 IXGBE_CORE_LOCK(sc); 4334 ixgbe_init_locked(sc); 4335 IXGBE_CORE_UNLOCK(sc); 4336 4337 return 0; /* XXX ixgbe_init_locked cannot fail? really? */ 4338 } /* ixgbe_init */ 4339 4340 /************************************************************************ 4341 * ixgbe_set_ivar 4342 * 4343 * Setup the correct IVAR register for a particular MSI-X interrupt 4344 * (yes this is all very magic and confusing :) 4345 * - entry is the register array entry 4346 * - vector is the MSI-X vector for this queue 4347 * - type is RX/TX/MISC 4348 ************************************************************************/ 4349 static void 4350 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type) 4351 { 4352 struct ixgbe_hw *hw = &sc->hw; 4353 u32 ivar, index; 4354 4355 vector |= IXGBE_IVAR_ALLOC_VAL; 4356 4357 switch (hw->mac.type) { 4358 case ixgbe_mac_82598EB: 4359 if (type == -1) 4360 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 4361 else 4362 entry += (type * 64); 4363 index = (entry >> 2) & 0x1F; 4364 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 4365 ivar &= ~(0xffUL << (8 * (entry & 0x3))); 4366 ivar |= ((u32)vector << (8 * (entry & 0x3))); 4367 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar); 4368 break; 4369 case ixgbe_mac_82599EB: 4370 case ixgbe_mac_X540: 4371 case ixgbe_mac_X550: 4372 case ixgbe_mac_X550EM_x: 4373 case ixgbe_mac_X550EM_a: 4374 if (type == -1) { /* MISC IVAR */ 4375 index = (entry & 1) * 8; 4376 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 4377 ivar &= ~(0xffUL << index); 4378 ivar |= ((u32)vector << index); 4379 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 4380 } else { /* RX/TX IVARS */ 4381 index = (16 * (entry & 1)) + (8 * type); 4382 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 4383 ivar &= ~(0xffUL << index); 4384 ivar |= ((u32)vector << index); 4385 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 4386 } 4387 break; 4388 default: 4389 break; 4390 } 4391 } /* ixgbe_set_ivar */ 4392 4393 /************************************************************************ 4394 * ixgbe_configure_ivars 4395 ************************************************************************/ 4396 static void 4397 ixgbe_configure_ivars(struct ixgbe_softc *sc) 4398 { 4399 struct ix_queue *que = sc->queues; 4400 u32 newitr; 4401 4402 if (sc->max_interrupt_rate > 0) 4403 newitr = (4000000 / sc->max_interrupt_rate) & 0x0FF8; 4404 else { 4405 /* 4406 * Disable DMA coalescing if interrupt moderation is 4407 * disabled. 4408 */ 4409 sc->dmac = 0; 4410 newitr = 0; 4411 } 4412 4413 for (int i = 0; i < sc->num_queues; i++, que++) { 4414 struct rx_ring *rxr = &sc->rx_rings[i]; 4415 struct tx_ring *txr = &sc->tx_rings[i]; 4416 /* First the RX queue entry */ 4417 ixgbe_set_ivar(sc, rxr->me, que->msix, 0); 4418 /* ... and the TX */ 4419 ixgbe_set_ivar(sc, txr->me, que->msix, 1); 4420 /* Set an Initial EITR value */ 4421 ixgbe_eitr_write(sc, que->msix, newitr); 4422 /* 4423 * To eliminate influence of the previous state. 4424 * At this point, Tx/Rx interrupt handler 4425 * (ixgbe_msix_que()) cannot be called, so both 4426 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required. 4427 */ 4428 que->eitr_setting = 0; 4429 } 4430 4431 /* For the Link interrupt */ 4432 ixgbe_set_ivar(sc, 1, sc->vector, -1); 4433 } /* ixgbe_configure_ivars */ 4434 4435 /************************************************************************ 4436 * ixgbe_config_gpie 4437 ************************************************************************/ 4438 static void 4439 ixgbe_config_gpie(struct ixgbe_softc *sc) 4440 { 4441 struct ixgbe_hw *hw = &sc->hw; 4442 u32 gpie; 4443 4444 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 4445 4446 if (sc->feat_en & IXGBE_FEATURE_MSIX) { 4447 /* Enable Enhanced MSI-X mode */ 4448 gpie |= IXGBE_GPIE_MSIX_MODE 4449 | IXGBE_GPIE_EIAME 4450 | IXGBE_GPIE_PBA_SUPPORT 4451 | IXGBE_GPIE_OCD; 4452 } 4453 4454 /* Fan Failure Interrupt */ 4455 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 4456 gpie |= IXGBE_SDP1_GPIEN; 4457 4458 /* Thermal Sensor Interrupt */ 4459 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) 4460 gpie |= IXGBE_SDP0_GPIEN_X540; 4461 4462 /* Link detection */ 4463 switch (hw->mac.type) { 4464 case ixgbe_mac_82599EB: 4465 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; 4466 break; 4467 case ixgbe_mac_X550EM_x: 4468 case ixgbe_mac_X550EM_a: 4469 gpie |= IXGBE_SDP0_GPIEN_X540; 4470 break; 4471 default: 4472 break; 4473 } 4474 4475 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 4476 4477 } /* ixgbe_config_gpie */ 4478 4479 /************************************************************************ 4480 * ixgbe_config_delay_values 4481 * 4482 * Requires sc->max_frame_size to be set. 4483 ************************************************************************/ 4484 static void 4485 ixgbe_config_delay_values(struct ixgbe_softc *sc) 4486 { 4487 struct ixgbe_hw *hw = &sc->hw; 4488 u32 rxpb, frame, size, tmp; 4489 4490 frame = sc->max_frame_size; 4491 4492 /* Calculate High Water */ 4493 switch (hw->mac.type) { 4494 case ixgbe_mac_X540: 4495 case ixgbe_mac_X550: 4496 case ixgbe_mac_X550EM_x: 4497 case ixgbe_mac_X550EM_a: 4498 tmp = IXGBE_DV_X540(frame, frame); 4499 break; 4500 default: 4501 tmp = IXGBE_DV(frame, frame); 4502 break; 4503 } 4504 size = IXGBE_BT2KB(tmp); 4505 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 4506 hw->fc.high_water[0] = rxpb - size; 4507 4508 /* Now calculate Low Water */ 4509 switch (hw->mac.type) { 4510 case ixgbe_mac_X540: 4511 case ixgbe_mac_X550: 4512 case ixgbe_mac_X550EM_x: 4513 case ixgbe_mac_X550EM_a: 4514 tmp = IXGBE_LOW_DV_X540(frame); 4515 break; 4516 default: 4517 tmp = IXGBE_LOW_DV(frame); 4518 break; 4519 } 4520 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 4521 4522 hw->fc.pause_time = IXGBE_FC_PAUSE; 4523 hw->fc.send_xon = TRUE; 4524 } /* ixgbe_config_delay_values */ 4525 4526 /************************************************************************ 4527 * ixgbe_set_rxfilter - Multicast Update 4528 * 4529 * Called whenever multicast address list is updated. 4530 ************************************************************************/ 4531 static void 4532 ixgbe_set_rxfilter(struct ixgbe_softc *sc) 4533 { 4534 struct ixgbe_mc_addr *mta; 4535 struct ifnet *ifp = sc->ifp; 4536 u8 *update_ptr; 4537 int mcnt = 0; 4538 u32 fctrl; 4539 struct ethercom *ec = &sc->osdep.ec; 4540 struct ether_multi *enm; 4541 struct ether_multistep step; 4542 4543 KASSERT(mutex_owned(&sc->core_mtx)); 4544 IOCTL_DEBUGOUT("ixgbe_set_rxfilter: begin"); 4545 4546 mta = sc->mta; 4547 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 4548 4549 ETHER_LOCK(ec); 4550 ec->ec_flags &= ~ETHER_F_ALLMULTI; 4551 ETHER_FIRST_MULTI(step, ec, enm); 4552 while (enm != NULL) { 4553 if ((mcnt == MAX_NUM_MULTICAST_ADDRESSES) || 4554 (memcmp(enm->enm_addrlo, enm->enm_addrhi, 4555 ETHER_ADDR_LEN) != 0)) { 4556 ec->ec_flags |= ETHER_F_ALLMULTI; 4557 break; 4558 } 4559 bcopy(enm->enm_addrlo, 4560 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 4561 mta[mcnt].vmdq = sc->pool; 4562 mcnt++; 4563 ETHER_NEXT_MULTI(step, enm); 4564 } 4565 4566 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL); 4567 if (ifp->if_flags & IFF_PROMISC) 4568 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4569 else if (ec->ec_flags & ETHER_F_ALLMULTI) { 4570 fctrl |= IXGBE_FCTRL_MPE; 4571 fctrl &= ~IXGBE_FCTRL_UPE; 4572 } else 4573 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 4574 4575 /* Update multicast filter entries only when it's not ALLMULTI */ 4576 if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) { 4577 ETHER_UNLOCK(ec); 4578 update_ptr = (u8 *)mta; 4579 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt, 4580 ixgbe_mc_array_itr, TRUE); 4581 } else 4582 ETHER_UNLOCK(ec); 4583 4584 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl); 4585 } /* ixgbe_set_rxfilter */ 4586 4587 /************************************************************************ 4588 * ixgbe_mc_array_itr 4589 * 4590 * An iterator function needed by the multicast shared code. 4591 * It feeds the shared code routine the addresses in the 4592 * array of ixgbe_set_rxfilter() one by one. 4593 ************************************************************************/ 4594 static u8 * 4595 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 4596 { 4597 struct ixgbe_mc_addr *mta; 4598 4599 mta = (struct ixgbe_mc_addr *)*update_ptr; 4600 *vmdq = mta->vmdq; 4601 4602 *update_ptr = (u8*)(mta + 1); 4603 4604 return (mta->addr); 4605 } /* ixgbe_mc_array_itr */ 4606 4607 /************************************************************************ 4608 * ixgbe_local_timer - Timer routine 4609 * 4610 * Checks for link status, updates statistics, 4611 * and runs the watchdog check. 4612 ************************************************************************/ 4613 static void 4614 ixgbe_local_timer(void *arg) 4615 { 4616 struct ixgbe_softc *sc = arg; 4617 4618 if (sc->schedule_wqs_ok) { 4619 if (atomic_cas_uint(&sc->timer_pending, 0, 1) == 0) 4620 workqueue_enqueue(sc->timer_wq, 4621 &sc->timer_wc, NULL); 4622 } 4623 } 4624 4625 static void 4626 ixgbe_handle_timer(struct work *wk, void *context) 4627 { 4628 struct ixgbe_softc *sc = context; 4629 struct ixgbe_hw *hw = &sc->hw; 4630 device_t dev = sc->dev; 4631 struct ix_queue *que = sc->queues; 4632 u64 queues = 0; 4633 u64 v0, v1, v2, v3, v4, v5, v6, v7; 4634 int hung = 0; 4635 int i; 4636 4637 IXGBE_CORE_LOCK(sc); 4638 4639 /* Check for pluggable optics */ 4640 if (ixgbe_is_sfp(hw)) { 4641 bool sched_mod_task = false; 4642 4643 if (hw->mac.type == ixgbe_mac_82598EB) { 4644 /* 4645 * On 82598EB, SFP+'s MOD_ABS pin is not connected to 4646 * any GPIO(SDP). So just schedule TASK_MOD. 4647 */ 4648 sched_mod_task = true; 4649 } else { 4650 bool was_full, is_full; 4651 4652 was_full = 4653 hw->phy.sfp_type != ixgbe_sfp_type_not_present; 4654 is_full = ixgbe_sfp_cage_full(hw); 4655 4656 /* Do probe if cage state changed */ 4657 if (was_full ^ is_full) 4658 sched_mod_task = true; 4659 } 4660 if (sched_mod_task) { 4661 mutex_enter(&sc->admin_mtx); 4662 sc->task_requests |= IXGBE_REQUEST_TASK_MOD_WOI; 4663 ixgbe_schedule_admin_tasklet(sc); 4664 mutex_exit(&sc->admin_mtx); 4665 } 4666 } 4667 4668 ixgbe_update_link_status(sc); 4669 ixgbe_update_stats_counters(sc); 4670 4671 /* Update some event counters */ 4672 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0; 4673 que = sc->queues; 4674 for (i = 0; i < sc->num_queues; i++, que++) { 4675 struct tx_ring *txr = que->txr; 4676 4677 v0 += txr->q_efbig_tx_dma_setup; 4678 v1 += txr->q_mbuf_defrag_failed; 4679 v2 += txr->q_efbig2_tx_dma_setup; 4680 v3 += txr->q_einval_tx_dma_setup; 4681 v4 += txr->q_other_tx_dma_setup; 4682 v5 += txr->q_eagain_tx_dma_setup; 4683 v6 += txr->q_enomem_tx_dma_setup; 4684 v7 += txr->q_tso_err; 4685 } 4686 IXGBE_EVC_STORE(&sc->efbig_tx_dma_setup, v0); 4687 IXGBE_EVC_STORE(&sc->mbuf_defrag_failed, v1); 4688 IXGBE_EVC_STORE(&sc->efbig2_tx_dma_setup, v2); 4689 IXGBE_EVC_STORE(&sc->einval_tx_dma_setup, v3); 4690 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4); 4691 IXGBE_EVC_STORE(&sc->eagain_tx_dma_setup, v5); 4692 IXGBE_EVC_STORE(&sc->enomem_tx_dma_setup, v6); 4693 IXGBE_EVC_STORE(&sc->tso_err, v7); 4694 4695 /* 4696 * Check the TX queues status 4697 * - mark hung queues so we don't schedule on them 4698 * - watchdog only if all queues show hung 4699 */ 4700 que = sc->queues; 4701 for (i = 0; i < sc->num_queues; i++, que++) { 4702 /* Keep track of queues with work for soft irq */ 4703 if (que->txr->busy) 4704 queues |= 1ULL << que->me; 4705 /* 4706 * Each time txeof runs without cleaning, but there 4707 * are uncleaned descriptors it increments busy. If 4708 * we get to the MAX we declare it hung. 4709 */ 4710 if (que->busy == IXGBE_QUEUE_HUNG) { 4711 ++hung; 4712 /* Mark the queue as inactive */ 4713 sc->active_queues &= ~(1ULL << que->me); 4714 continue; 4715 } else { 4716 /* Check if we've come back from hung */ 4717 if ((sc->active_queues & (1ULL << que->me)) == 0) 4718 sc->active_queues |= 1ULL << que->me; 4719 } 4720 if (que->busy >= IXGBE_MAX_TX_BUSY) { 4721 device_printf(dev, 4722 "Warning queue %d appears to be hung!\n", i); 4723 que->txr->busy = IXGBE_QUEUE_HUNG; 4724 ++hung; 4725 } 4726 } 4727 4728 /* Only truly watchdog if all queues show hung */ 4729 if (hung == sc->num_queues) 4730 goto watchdog; 4731 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */ 4732 else if (queues != 0) { /* Force an IRQ on queues with work */ 4733 que = sc->queues; 4734 for (i = 0; i < sc->num_queues; i++, que++) { 4735 mutex_enter(&que->dc_mtx); 4736 if (que->disabled_count == 0) 4737 ixgbe_rearm_queues(sc, 4738 queues & ((u64)1 << i)); 4739 mutex_exit(&que->dc_mtx); 4740 } 4741 } 4742 #endif 4743 4744 atomic_store_relaxed(&sc->timer_pending, 0); 4745 IXGBE_CORE_UNLOCK(sc); 4746 callout_reset(&sc->timer, hz, ixgbe_local_timer, sc); 4747 return; 4748 4749 watchdog: 4750 device_printf(sc->dev, "Watchdog timeout -- resetting\n"); 4751 sc->ifp->if_flags &= ~IFF_RUNNING; 4752 IXGBE_EVC_ADD(&sc->watchdog_events, 1); 4753 ixgbe_init_locked(sc); 4754 IXGBE_CORE_UNLOCK(sc); 4755 } /* ixgbe_handle_timer */ 4756 4757 /************************************************************************ 4758 * ixgbe_recovery_mode_timer - Recovery mode timer routine 4759 ************************************************************************/ 4760 static void 4761 ixgbe_recovery_mode_timer(void *arg) 4762 { 4763 struct ixgbe_softc *sc = arg; 4764 4765 if (__predict_true(sc->osdep.detaching == false)) { 4766 if (atomic_cas_uint(&sc->recovery_mode_timer_pending, 4767 0, 1) == 0) { 4768 workqueue_enqueue(sc->recovery_mode_timer_wq, 4769 &sc->recovery_mode_timer_wc, NULL); 4770 } 4771 } 4772 } 4773 4774 static void 4775 ixgbe_handle_recovery_mode_timer(struct work *wk, void *context) 4776 { 4777 struct ixgbe_softc *sc = context; 4778 struct ixgbe_hw *hw = &sc->hw; 4779 4780 IXGBE_CORE_LOCK(sc); 4781 if (ixgbe_fw_recovery_mode(hw)) { 4782 if (atomic_cas_uint(&sc->recovery_mode, 0, 1) == 0) { 4783 /* Firmware error detected, entering recovery mode */ 4784 device_printf(sc->dev, 4785 "Firmware recovery mode detected. Limiting " 4786 "functionality. Refer to the Intel(R) Ethernet " 4787 "Adapters and Devices User Guide for details on " 4788 "firmware recovery mode.\n"); 4789 4790 if (hw->adapter_stopped == FALSE) 4791 ixgbe_stop_locked(sc); 4792 } 4793 } else 4794 atomic_cas_uint(&sc->recovery_mode, 1, 0); 4795 4796 atomic_store_relaxed(&sc->recovery_mode_timer_pending, 0); 4797 callout_reset(&sc->recovery_mode_timer, hz, 4798 ixgbe_recovery_mode_timer, sc); 4799 IXGBE_CORE_UNLOCK(sc); 4800 } /* ixgbe_handle_recovery_mode_timer */ 4801 4802 /************************************************************************ 4803 * ixgbe_handle_mod - Tasklet for SFP module interrupts 4804 * bool int_en: true if it's called when the interrupt is enabled. 4805 ************************************************************************/ 4806 static void 4807 ixgbe_handle_mod(void *context, bool int_en) 4808 { 4809 struct ixgbe_softc *sc = context; 4810 struct ixgbe_hw *hw = &sc->hw; 4811 device_t dev = sc->dev; 4812 enum ixgbe_sfp_type last_sfp_type; 4813 u32 err; 4814 bool last_unsupported_sfp_recovery; 4815 4816 KASSERT(mutex_owned(&sc->core_mtx)); 4817 4818 last_sfp_type = hw->phy.sfp_type; 4819 last_unsupported_sfp_recovery = hw->need_unsupported_sfp_recovery; 4820 IXGBE_EVC_ADD(&sc->mod_workev, 1); 4821 if (sc->hw.need_crosstalk_fix) { 4822 if ((hw->mac.type != ixgbe_mac_82598EB) && 4823 !ixgbe_sfp_cage_full(hw)) 4824 goto out; 4825 } 4826 4827 err = hw->phy.ops.identify_sfp(hw); 4828 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4829 if (last_unsupported_sfp_recovery == false) 4830 device_printf(dev, 4831 "Unsupported SFP+ module type was detected.\n"); 4832 goto out; 4833 } 4834 4835 if (hw->need_unsupported_sfp_recovery) { 4836 device_printf(dev, "Recovering from unsupported SFP\n"); 4837 /* 4838 * We could recover the status by calling setup_sfp(), 4839 * setup_link() and some others. It's complex and might not 4840 * work correctly on some unknown cases. To avoid such type of 4841 * problem, call ixgbe_init_locked(). It's simple and safe 4842 * approach. 4843 */ 4844 ixgbe_init_locked(sc); 4845 } else if ((hw->phy.sfp_type != ixgbe_sfp_type_not_present) && 4846 (hw->phy.sfp_type != last_sfp_type)) { 4847 /* A module is inserted and changed. */ 4848 4849 if (hw->mac.type == ixgbe_mac_82598EB) 4850 err = hw->phy.ops.reset(hw); 4851 else { 4852 err = hw->mac.ops.setup_sfp(hw); 4853 hw->phy.sfp_setup_needed = FALSE; 4854 } 4855 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4856 device_printf(dev, 4857 "Setup failure - unsupported SFP+ module type.\n"); 4858 goto out; 4859 } 4860 } 4861 4862 out: 4863 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 4864 sc->phy_layer = ixgbe_get_supported_physical_layer(hw); 4865 4866 /* Adjust media types shown in ifconfig */ 4867 IXGBE_CORE_UNLOCK(sc); 4868 ifmedia_removeall(&sc->media); 4869 ixgbe_add_media_types(sc); 4870 ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); 4871 IXGBE_CORE_LOCK(sc); 4872 4873 /* 4874 * Don't schedule MSF event if the chip is 82598. 82598 doesn't support 4875 * MSF. At least, calling ixgbe_handle_msf on 82598 DA makes the link 4876 * flap because the function calls setup_link(). 4877 */ 4878 if (hw->mac.type != ixgbe_mac_82598EB) { 4879 mutex_enter(&sc->admin_mtx); 4880 if (int_en) 4881 sc->task_requests |= IXGBE_REQUEST_TASK_MSF; 4882 else 4883 sc->task_requests |= IXGBE_REQUEST_TASK_MSF_WOI; 4884 mutex_exit(&sc->admin_mtx); 4885 } 4886 4887 /* 4888 * Don't call ixgbe_schedule_admin_tasklet() because we are on 4889 * the workqueue now. 4890 */ 4891 } /* ixgbe_handle_mod */ 4892 4893 4894 /************************************************************************ 4895 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts 4896 ************************************************************************/ 4897 static void 4898 ixgbe_handle_msf(void *context) 4899 { 4900 struct ixgbe_softc *sc = context; 4901 struct ixgbe_hw *hw = &sc->hw; 4902 u32 autoneg; 4903 bool negotiate; 4904 4905 KASSERT(mutex_owned(&sc->core_mtx)); 4906 4907 IXGBE_EVC_ADD(&sc->msf_workev, 1); 4908 4909 autoneg = hw->phy.autoneg_advertised; 4910 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 4911 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 4912 if (hw->mac.ops.setup_link) 4913 hw->mac.ops.setup_link(hw, autoneg, TRUE); 4914 } /* ixgbe_handle_msf */ 4915 4916 /************************************************************************ 4917 * ixgbe_handle_phy - Tasklet for external PHY interrupts 4918 ************************************************************************/ 4919 static void 4920 ixgbe_handle_phy(void *context) 4921 { 4922 struct ixgbe_softc *sc = context; 4923 struct ixgbe_hw *hw = &sc->hw; 4924 int error; 4925 4926 KASSERT(mutex_owned(&sc->core_mtx)); 4927 4928 IXGBE_EVC_ADD(&sc->phy_workev, 1); 4929 error = hw->phy.ops.handle_lasi(hw); 4930 if (error == IXGBE_ERR_OVERTEMP) 4931 device_printf(sc->dev, 4932 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 4933 " PHY will downshift to lower power state!\n"); 4934 else if (error) 4935 device_printf(sc->dev, 4936 "Error handling LASI interrupt: %d\n", error); 4937 } /* ixgbe_handle_phy */ 4938 4939 static void 4940 ixgbe_handle_admin(struct work *wk, void *context) 4941 { 4942 struct ixgbe_softc *sc = context; 4943 struct ifnet *ifp = sc->ifp; 4944 struct ixgbe_hw *hw = &sc->hw; 4945 u32 task_requests; 4946 u32 eims_enable = 0; 4947 4948 mutex_enter(&sc->admin_mtx); 4949 sc->admin_pending = 0; 4950 task_requests = sc->task_requests; 4951 sc->task_requests = 0; 4952 mutex_exit(&sc->admin_mtx); 4953 4954 /* 4955 * Hold the IFNET_LOCK across this entire call. This will 4956 * prevent additional changes to sc->phy_layer 4957 * and serialize calls to this tasklet. We cannot hold the 4958 * CORE_LOCK while calling into the ifmedia functions as 4959 * they call ifmedia_lock() and the lock is CORE_LOCK. 4960 */ 4961 IFNET_LOCK(ifp); 4962 IXGBE_CORE_LOCK(sc); 4963 if ((task_requests & IXGBE_REQUEST_TASK_LSC) != 0) { 4964 ixgbe_handle_link(sc); 4965 eims_enable |= IXGBE_EIMS_LSC; 4966 } 4967 if ((task_requests & IXGBE_REQUEST_TASK_MOD_WOI) != 0) 4968 ixgbe_handle_mod(sc, false); 4969 if ((task_requests & IXGBE_REQUEST_TASK_MOD) != 0) { 4970 ixgbe_handle_mod(sc, true); 4971 if (hw->mac.type >= ixgbe_mac_X540) 4972 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4973 else 4974 eims_enable |= IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 4975 } 4976 if ((task_requests 4977 & (IXGBE_REQUEST_TASK_MSF_WOI | IXGBE_REQUEST_TASK_MSF)) != 0) { 4978 ixgbe_handle_msf(sc); 4979 if (((task_requests & IXGBE_REQUEST_TASK_MSF) != 0) && 4980 (hw->mac.type == ixgbe_mac_82599EB)) 4981 eims_enable |= IXGBE_EIMS_GPI_SDP1_BY_MAC(hw); 4982 } 4983 if ((task_requests & IXGBE_REQUEST_TASK_PHY) != 0) { 4984 ixgbe_handle_phy(sc); 4985 eims_enable |= IXGBE_EICR_GPI_SDP0_X540; 4986 } 4987 if ((task_requests & IXGBE_REQUEST_TASK_FDIR) != 0) { 4988 ixgbe_reinit_fdir(sc); 4989 eims_enable |= IXGBE_EIMS_FLOW_DIR; 4990 } 4991 #if 0 /* notyet */ 4992 if ((task_requests & IXGBE_REQUEST_TASK_MBX) != 0) { 4993 ixgbe_handle_mbx(sc); 4994 eims_enable |= IXGBE_EIMS_MAILBOX; 4995 } 4996 #endif 4997 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_enable); 4998 4999 IXGBE_CORE_UNLOCK(sc); 5000 IFNET_UNLOCK(ifp); 5001 } /* ixgbe_handle_admin */ 5002 5003 static void 5004 ixgbe_ifstop(struct ifnet *ifp, int disable) 5005 { 5006 struct ixgbe_softc *sc = ifp->if_softc; 5007 5008 IXGBE_CORE_LOCK(sc); 5009 ixgbe_stop_locked(sc); 5010 IXGBE_CORE_UNLOCK(sc); 5011 5012 workqueue_wait(sc->timer_wq, &sc->timer_wc); 5013 atomic_store_relaxed(&sc->timer_pending, 0); 5014 } 5015 5016 /************************************************************************ 5017 * ixgbe_stop_locked - Stop the hardware 5018 * 5019 * Disables all traffic on the adapter by issuing a 5020 * global reset on the MAC and deallocates TX/RX buffers. 5021 ************************************************************************/ 5022 static void 5023 ixgbe_stop_locked(void *arg) 5024 { 5025 struct ifnet *ifp; 5026 struct ixgbe_softc *sc = arg; 5027 struct ixgbe_hw *hw = &sc->hw; 5028 5029 ifp = sc->ifp; 5030 5031 KASSERT(mutex_owned(&sc->core_mtx)); 5032 5033 INIT_DEBUGOUT("ixgbe_stop_locked: begin\n"); 5034 ixgbe_disable_intr(sc); 5035 callout_stop(&sc->timer); 5036 5037 /* Don't schedule workqueues. */ 5038 sc->schedule_wqs_ok = false; 5039 5040 /* Let the stack know...*/ 5041 ifp->if_flags &= ~IFF_RUNNING; 5042 5043 ixgbe_reset_hw(hw); 5044 hw->adapter_stopped = FALSE; 5045 ixgbe_stop_adapter(hw); 5046 if (hw->mac.type == ixgbe_mac_82599EB) 5047 ixgbe_stop_mac_link_on_d3_82599(hw); 5048 /* Turn off the laser - noop with no optics */ 5049 ixgbe_disable_tx_laser(hw); 5050 5051 /* Update the stack */ 5052 sc->link_up = FALSE; 5053 ixgbe_update_link_status(sc); 5054 5055 /* reprogram the RAR[0] in case user changed it. */ 5056 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV); 5057 5058 return; 5059 } /* ixgbe_stop_locked */ 5060 5061 /************************************************************************ 5062 * ixgbe_update_link_status - Update OS on link state 5063 * 5064 * Note: Only updates the OS on the cached link state. 5065 * The real check of the hardware only happens with 5066 * a link interrupt. 5067 ************************************************************************/ 5068 static void 5069 ixgbe_update_link_status(struct ixgbe_softc *sc) 5070 { 5071 struct ifnet *ifp = sc->ifp; 5072 device_t dev = sc->dev; 5073 struct ixgbe_hw *hw = &sc->hw; 5074 5075 KASSERT(mutex_owned(&sc->core_mtx)); 5076 5077 if (sc->link_up) { 5078 if (sc->link_active != LINK_STATE_UP) { 5079 /* 5080 * To eliminate influence of the previous state 5081 * in the same way as ixgbe_init_locked(). 5082 */ 5083 struct ix_queue *que = sc->queues; 5084 for (int i = 0; i < sc->num_queues; i++, que++) 5085 que->eitr_setting = 0; 5086 5087 if (sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL) { 5088 /* 5089 * Discard count for both MAC Local Fault and 5090 * Remote Fault because those registers are 5091 * valid only when the link speed is up and 5092 * 10Gbps. 5093 */ 5094 IXGBE_READ_REG(hw, IXGBE_MLFC); 5095 IXGBE_READ_REG(hw, IXGBE_MRFC); 5096 } 5097 5098 if (bootverbose) { 5099 const char *bpsmsg; 5100 5101 switch (sc->link_speed) { 5102 case IXGBE_LINK_SPEED_10GB_FULL: 5103 bpsmsg = "10 Gbps"; 5104 break; 5105 case IXGBE_LINK_SPEED_5GB_FULL: 5106 bpsmsg = "5 Gbps"; 5107 break; 5108 case IXGBE_LINK_SPEED_2_5GB_FULL: 5109 bpsmsg = "2.5 Gbps"; 5110 break; 5111 case IXGBE_LINK_SPEED_1GB_FULL: 5112 bpsmsg = "1 Gbps"; 5113 break; 5114 case IXGBE_LINK_SPEED_100_FULL: 5115 bpsmsg = "100 Mbps"; 5116 break; 5117 case IXGBE_LINK_SPEED_10_FULL: 5118 bpsmsg = "10 Mbps"; 5119 break; 5120 default: 5121 bpsmsg = "unknown speed"; 5122 break; 5123 } 5124 device_printf(dev, "Link is up %s %s \n", 5125 bpsmsg, "Full Duplex"); 5126 } 5127 sc->link_active = LINK_STATE_UP; 5128 /* Update any Flow Control changes */ 5129 ixgbe_fc_enable(&sc->hw); 5130 /* Update DMA coalescing config */ 5131 ixgbe_config_dmac(sc); 5132 if_link_state_change(ifp, LINK_STATE_UP); 5133 5134 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5135 ixgbe_ping_all_vfs(sc); 5136 } 5137 } else { 5138 /* 5139 * Do it when link active changes to DOWN. i.e. 5140 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN 5141 * b) LINK_STATE_UP -> LINK_STATE_DOWN 5142 */ 5143 if (sc->link_active != LINK_STATE_DOWN) { 5144 if (bootverbose) 5145 device_printf(dev, "Link is Down\n"); 5146 if_link_state_change(ifp, LINK_STATE_DOWN); 5147 sc->link_active = LINK_STATE_DOWN; 5148 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5149 ixgbe_ping_all_vfs(sc); 5150 ixgbe_drain_all(sc); 5151 } 5152 } 5153 } /* ixgbe_update_link_status */ 5154 5155 /************************************************************************ 5156 * ixgbe_config_dmac - Configure DMA Coalescing 5157 ************************************************************************/ 5158 static void 5159 ixgbe_config_dmac(struct ixgbe_softc *sc) 5160 { 5161 struct ixgbe_hw *hw = &sc->hw; 5162 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 5163 5164 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config) 5165 return; 5166 5167 if (dcfg->watchdog_timer ^ sc->dmac || 5168 dcfg->link_speed ^ sc->link_speed) { 5169 dcfg->watchdog_timer = sc->dmac; 5170 dcfg->fcoe_en = false; 5171 dcfg->link_speed = sc->link_speed; 5172 dcfg->num_tcs = 1; 5173 5174 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 5175 dcfg->watchdog_timer, dcfg->link_speed); 5176 5177 hw->mac.ops.dmac_config(hw); 5178 } 5179 } /* ixgbe_config_dmac */ 5180 5181 /************************************************************************ 5182 * ixgbe_enable_intr 5183 ************************************************************************/ 5184 static void 5185 ixgbe_enable_intr(struct ixgbe_softc *sc) 5186 { 5187 struct ixgbe_hw *hw = &sc->hw; 5188 struct ix_queue *que = sc->queues; 5189 u32 mask, fwsm; 5190 5191 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 5192 5193 switch (sc->hw.mac.type) { 5194 case ixgbe_mac_82599EB: 5195 mask |= IXGBE_EIMS_ECC; 5196 /* Temperature sensor on some adapters */ 5197 mask |= IXGBE_EIMS_GPI_SDP0; 5198 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 5199 mask |= IXGBE_EIMS_GPI_SDP1; 5200 mask |= IXGBE_EIMS_GPI_SDP2; 5201 break; 5202 case ixgbe_mac_X540: 5203 /* Detect if Thermal Sensor is enabled */ 5204 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 5205 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5206 mask |= IXGBE_EIMS_TS; 5207 mask |= IXGBE_EIMS_ECC; 5208 break; 5209 case ixgbe_mac_X550: 5210 /* MAC thermal sensor is automatically enabled */ 5211 mask |= IXGBE_EIMS_TS; 5212 mask |= IXGBE_EIMS_ECC; 5213 break; 5214 case ixgbe_mac_X550EM_x: 5215 case ixgbe_mac_X550EM_a: 5216 /* Some devices use SDP0 for important information */ 5217 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 5218 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP || 5219 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N || 5220 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 5221 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 5222 if (hw->phy.type == ixgbe_phy_x550em_ext_t) 5223 mask |= IXGBE_EICR_GPI_SDP0_X540; 5224 mask |= IXGBE_EIMS_ECC; 5225 break; 5226 default: 5227 break; 5228 } 5229 5230 /* Enable Fan Failure detection */ 5231 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) 5232 mask |= IXGBE_EIMS_GPI_SDP1; 5233 /* Enable SR-IOV */ 5234 if (sc->feat_en & IXGBE_FEATURE_SRIOV) 5235 mask |= IXGBE_EIMS_MAILBOX; 5236 /* Enable Flow Director */ 5237 if (sc->feat_en & IXGBE_FEATURE_FDIR) 5238 mask |= IXGBE_EIMS_FLOW_DIR; 5239 5240 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 5241 5242 /* With MSI-X we use auto clear */ 5243 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) { 5244 /* 5245 * We use auto clear for RTX_QUEUE only. Don't use other 5246 * interrupts (e.g. link interrupt). BTW, we don't use 5247 * TCP_TIMER interrupt itself. 5248 */ 5249 IXGBE_WRITE_REG(hw, IXGBE_EIAC, IXGBE_EIMS_RTX_QUEUE); 5250 } 5251 5252 /* 5253 * Now enable all queues, this is done separately to 5254 * allow for handling the extended (beyond 32) MSI-X 5255 * vectors that can be used by 82599 5256 */ 5257 for (int i = 0; i < sc->num_queues; i++, que++) 5258 ixgbe_enable_queue(sc, que->msix); 5259 5260 IXGBE_WRITE_FLUSH(hw); 5261 5262 } /* ixgbe_enable_intr */ 5263 5264 /************************************************************************ 5265 * ixgbe_disable_intr_internal 5266 ************************************************************************/ 5267 static void 5268 ixgbe_disable_intr_internal(struct ixgbe_softc *sc, bool nestok) 5269 { 5270 struct ix_queue *que = sc->queues; 5271 5272 /* disable interrupts other than queues */ 5273 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE); 5274 5275 if ((sc->feat_en & IXGBE_FEATURE_MSIX) != 0) 5276 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0); 5277 5278 for (int i = 0; i < sc->num_queues; i++, que++) 5279 ixgbe_disable_queue_internal(sc, que->msix, nestok); 5280 5281 IXGBE_WRITE_FLUSH(&sc->hw); 5282 5283 } /* ixgbe_do_disable_intr_internal */ 5284 5285 /************************************************************************ 5286 * ixgbe_disable_intr 5287 ************************************************************************/ 5288 static void 5289 ixgbe_disable_intr(struct ixgbe_softc *sc) 5290 { 5291 5292 ixgbe_disable_intr_internal(sc, true); 5293 } /* ixgbe_disable_intr */ 5294 5295 /************************************************************************ 5296 * ixgbe_ensure_disabled_intr 5297 ************************************************************************/ 5298 void 5299 ixgbe_ensure_disabled_intr(struct ixgbe_softc *sc) 5300 { 5301 5302 ixgbe_disable_intr_internal(sc, false); 5303 } /* ixgbe_ensure_disabled_intr */ 5304 5305 /************************************************************************ 5306 * ixgbe_legacy_irq - Legacy Interrupt Service routine 5307 ************************************************************************/ 5308 static int 5309 ixgbe_legacy_irq(void *arg) 5310 { 5311 struct ix_queue *que = arg; 5312 struct ixgbe_softc *sc = que->sc; 5313 struct ixgbe_hw *hw = &sc->hw; 5314 struct ifnet *ifp = sc->ifp; 5315 struct tx_ring *txr = sc->tx_rings; 5316 u32 eicr; 5317 u32 eims_orig; 5318 u32 eims_enable = 0; 5319 u32 eims_disable = 0; 5320 5321 eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS); 5322 /* 5323 * Silicon errata #26 on 82598. Disable all interrupts before reading 5324 * EICR. 5325 */ 5326 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); 5327 5328 /* Read and clear EICR */ 5329 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 5330 5331 if (eicr == 0) { 5332 IXGBE_EVC_ADD(&sc->stats.pf.intzero, 1); 5333 IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig); 5334 return 0; 5335 } 5336 IXGBE_EVC_ADD(&sc->stats.pf.legint, 1); 5337 5338 /* Queue (0) intr */ 5339 if (((ifp->if_flags & IFF_RUNNING) != 0) && 5340 (eicr & IXGBE_EIMC_RTX_QUEUE) != 0) { 5341 IXGBE_EVC_ADD(&que->irqs, 1); 5342 5343 /* 5344 * The same as ixgbe_msix_que() about 5345 * "que->txrx_use_workqueue". 5346 */ 5347 que->txrx_use_workqueue = sc->txrx_use_workqueue; 5348 5349 IXGBE_TX_LOCK(txr); 5350 ixgbe_txeof(txr); 5351 #ifdef notyet 5352 if (!ixgbe_ring_empty(ifp, txr->br)) 5353 ixgbe_start_locked(ifp, txr); 5354 #endif 5355 IXGBE_TX_UNLOCK(txr); 5356 5357 IXGBE_EVC_ADD(&que->req, 1); 5358 ixgbe_sched_handle_que(sc, que); 5359 /* Disable queue 0 interrupt */ 5360 eims_disable |= 1UL << 0; 5361 } else 5362 eims_enable |= eims_orig & IXGBE_EIMC_RTX_QUEUE; 5363 5364 ixgbe_intr_admin_common(sc, eicr, &eims_disable); 5365 5366 /* Re-enable some interrupts */ 5367 IXGBE_WRITE_REG(hw, IXGBE_EIMS, 5368 (eims_orig & ~eims_disable) | eims_enable); 5369 5370 return 1; 5371 } /* ixgbe_legacy_irq */ 5372 5373 /************************************************************************ 5374 * ixgbe_free_pciintr_resources 5375 ************************************************************************/ 5376 static void 5377 ixgbe_free_pciintr_resources(struct ixgbe_softc *sc) 5378 { 5379 struct ix_queue *que = sc->queues; 5380 int rid; 5381 5382 /* 5383 * Release all msix queue resources: 5384 */ 5385 for (int i = 0; i < sc->num_queues; i++, que++) { 5386 if (que->res != NULL) { 5387 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[i]); 5388 sc->osdep.ihs[i] = NULL; 5389 } 5390 } 5391 5392 /* Clean the Legacy or Link interrupt last */ 5393 if (sc->vector) /* we are doing MSIX */ 5394 rid = sc->vector; 5395 else 5396 rid = 0; 5397 5398 if (sc->osdep.ihs[rid] != NULL) { 5399 pci_intr_disestablish(sc->osdep.pc, sc->osdep.ihs[rid]); 5400 sc->osdep.ihs[rid] = NULL; 5401 } 5402 5403 if (sc->osdep.intrs != NULL) { 5404 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 5405 sc->osdep.nintrs); 5406 sc->osdep.intrs = NULL; 5407 } 5408 } /* ixgbe_free_pciintr_resources */ 5409 5410 /************************************************************************ 5411 * ixgbe_free_pci_resources 5412 ************************************************************************/ 5413 static void 5414 ixgbe_free_pci_resources(struct ixgbe_softc *sc) 5415 { 5416 5417 ixgbe_free_pciintr_resources(sc); 5418 5419 if (sc->osdep.mem_size != 0) { 5420 bus_space_unmap(sc->osdep.mem_bus_space_tag, 5421 sc->osdep.mem_bus_space_handle, 5422 sc->osdep.mem_size); 5423 } 5424 } /* ixgbe_free_pci_resources */ 5425 5426 /************************************************************************ 5427 * ixgbe_sysctl_flowcntl 5428 * 5429 * SYSCTL wrapper around setting Flow Control 5430 ************************************************************************/ 5431 static int 5432 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS) 5433 { 5434 struct sysctlnode node = *rnode; 5435 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5436 int error, fc; 5437 5438 if (ixgbe_fw_recovery_mode_swflag(sc)) 5439 return (EPERM); 5440 5441 fc = sc->hw.fc.current_mode; 5442 node.sysctl_data = &fc; 5443 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5444 if (error != 0 || newp == NULL) 5445 return error; 5446 5447 /* Don't bother if it's not changed */ 5448 if (fc == sc->hw.fc.current_mode) 5449 return (0); 5450 5451 return ixgbe_set_flowcntl(sc, fc); 5452 } /* ixgbe_sysctl_flowcntl */ 5453 5454 /************************************************************************ 5455 * ixgbe_set_flowcntl - Set flow control 5456 * 5457 * Flow control values: 5458 * 0 - off 5459 * 1 - rx pause 5460 * 2 - tx pause 5461 * 3 - full 5462 ************************************************************************/ 5463 static int 5464 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc) 5465 { 5466 switch (fc) { 5467 case ixgbe_fc_rx_pause: 5468 case ixgbe_fc_tx_pause: 5469 case ixgbe_fc_full: 5470 sc->hw.fc.requested_mode = fc; 5471 if (sc->num_queues > 1) 5472 ixgbe_disable_rx_drop(sc); 5473 break; 5474 case ixgbe_fc_none: 5475 sc->hw.fc.requested_mode = ixgbe_fc_none; 5476 if (sc->num_queues > 1) 5477 ixgbe_enable_rx_drop(sc); 5478 break; 5479 default: 5480 return (EINVAL); 5481 } 5482 5483 #if 0 /* XXX NetBSD */ 5484 /* Don't autoneg if forcing a value */ 5485 sc->hw.fc.disable_fc_autoneg = TRUE; 5486 #endif 5487 ixgbe_fc_enable(&sc->hw); 5488 5489 return (0); 5490 } /* ixgbe_set_flowcntl */ 5491 5492 /************************************************************************ 5493 * ixgbe_enable_rx_drop 5494 * 5495 * Enable the hardware to drop packets when the buffer is 5496 * full. This is useful with multiqueue, so that no single 5497 * queue being full stalls the entire RX engine. We only 5498 * enable this when Multiqueue is enabled AND Flow Control 5499 * is disabled. 5500 ************************************************************************/ 5501 static void 5502 ixgbe_enable_rx_drop(struct ixgbe_softc *sc) 5503 { 5504 struct ixgbe_hw *hw = &sc->hw; 5505 struct rx_ring *rxr; 5506 u32 srrctl; 5507 5508 for (int i = 0; i < sc->num_queues; i++) { 5509 rxr = &sc->rx_rings[i]; 5510 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5511 srrctl |= IXGBE_SRRCTL_DROP_EN; 5512 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5513 } 5514 5515 /* enable drop for each vf */ 5516 for (int i = 0; i < sc->num_vfs; i++) { 5517 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5518 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5519 IXGBE_QDE_ENABLE)); 5520 } 5521 } /* ixgbe_enable_rx_drop */ 5522 5523 /************************************************************************ 5524 * ixgbe_disable_rx_drop 5525 ************************************************************************/ 5526 static void 5527 ixgbe_disable_rx_drop(struct ixgbe_softc *sc) 5528 { 5529 struct ixgbe_hw *hw = &sc->hw; 5530 struct rx_ring *rxr; 5531 u32 srrctl; 5532 5533 for (int i = 0; i < sc->num_queues; i++) { 5534 rxr = &sc->rx_rings[i]; 5535 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5536 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5537 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5538 } 5539 5540 /* disable drop for each vf */ 5541 for (int i = 0; i < sc->num_vfs; i++) { 5542 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5543 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5544 } 5545 } /* ixgbe_disable_rx_drop */ 5546 5547 /************************************************************************ 5548 * ixgbe_sysctl_advertise 5549 * 5550 * SYSCTL wrapper around setting advertised speed 5551 ************************************************************************/ 5552 static int 5553 ixgbe_sysctl_advertise(SYSCTLFN_ARGS) 5554 { 5555 struct sysctlnode node = *rnode; 5556 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5557 int error = 0, advertise; 5558 5559 if (ixgbe_fw_recovery_mode_swflag(sc)) 5560 return (EPERM); 5561 5562 advertise = sc->advertise; 5563 node.sysctl_data = &advertise; 5564 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5565 if (error != 0 || newp == NULL) 5566 return error; 5567 5568 return ixgbe_set_advertise(sc, advertise); 5569 } /* ixgbe_sysctl_advertise */ 5570 5571 /************************************************************************ 5572 * ixgbe_set_advertise - Control advertised link speed 5573 * 5574 * Flags: 5575 * 0x00 - Default (all capable link speed) 5576 * 0x1 - advertise 100 Mb 5577 * 0x2 - advertise 1G 5578 * 0x4 - advertise 10G 5579 * 0x8 - advertise 10 Mb (yes, Mb) 5580 * 0x10 - advertise 2.5G 5581 * 0x20 - advertise 5G 5582 ************************************************************************/ 5583 static int 5584 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise) 5585 { 5586 device_t dev; 5587 struct ixgbe_hw *hw; 5588 ixgbe_link_speed speed = 0; 5589 ixgbe_link_speed link_caps = 0; 5590 s32 err = IXGBE_NOT_IMPLEMENTED; 5591 bool negotiate = FALSE; 5592 5593 /* Checks to validate new value */ 5594 if (sc->advertise == advertise) /* no change */ 5595 return (0); 5596 5597 dev = sc->dev; 5598 hw = &sc->hw; 5599 5600 /* No speed changes for backplane media */ 5601 if (hw->phy.media_type == ixgbe_media_type_backplane) 5602 return (ENODEV); 5603 5604 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 5605 (hw->phy.multispeed_fiber))) { 5606 device_printf(dev, 5607 "Advertised speed can only be set on copper or " 5608 "multispeed fiber media types.\n"); 5609 return (EINVAL); 5610 } 5611 5612 if (advertise < 0x0 || advertise > 0x3f) { 5613 device_printf(dev, "Invalid advertised speed; " 5614 "valid modes are 0x0 through 0x3f\n"); 5615 return (EINVAL); 5616 } 5617 5618 if (hw->mac.ops.get_link_capabilities) { 5619 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, 5620 &negotiate); 5621 if (err != IXGBE_SUCCESS) { 5622 device_printf(dev, "Unable to determine supported " 5623 "advertise speeds\n"); 5624 return (ENODEV); 5625 } 5626 } 5627 5628 /* Set new value and report new advertised mode */ 5629 if (advertise & 0x1) { 5630 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) { 5631 device_printf(dev, "Interface does not support 100Mb " 5632 "advertised speed\n"); 5633 return (EINVAL); 5634 } 5635 speed |= IXGBE_LINK_SPEED_100_FULL; 5636 } 5637 if (advertise & 0x2) { 5638 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) { 5639 device_printf(dev, "Interface does not support 1Gb " 5640 "advertised speed\n"); 5641 return (EINVAL); 5642 } 5643 speed |= IXGBE_LINK_SPEED_1GB_FULL; 5644 } 5645 if (advertise & 0x4) { 5646 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) { 5647 device_printf(dev, "Interface does not support 10Gb " 5648 "advertised speed\n"); 5649 return (EINVAL); 5650 } 5651 speed |= IXGBE_LINK_SPEED_10GB_FULL; 5652 } 5653 if (advertise & 0x8) { 5654 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) { 5655 device_printf(dev, "Interface does not support 10Mb " 5656 "advertised speed\n"); 5657 return (EINVAL); 5658 } 5659 speed |= IXGBE_LINK_SPEED_10_FULL; 5660 } 5661 if (advertise & 0x10) { 5662 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) { 5663 device_printf(dev, "Interface does not support 2.5Gb " 5664 "advertised speed\n"); 5665 return (EINVAL); 5666 } 5667 speed |= IXGBE_LINK_SPEED_2_5GB_FULL; 5668 } 5669 if (advertise & 0x20) { 5670 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) { 5671 device_printf(dev, "Interface does not support 5Gb " 5672 "advertised speed\n"); 5673 return (EINVAL); 5674 } 5675 speed |= IXGBE_LINK_SPEED_5GB_FULL; 5676 } 5677 if (advertise == 0) 5678 speed = link_caps; /* All capable link speed */ 5679 5680 hw->mac.autotry_restart = TRUE; 5681 hw->mac.ops.setup_link(hw, speed, TRUE); 5682 sc->advertise = advertise; 5683 5684 return (0); 5685 } /* ixgbe_set_advertise */ 5686 5687 /************************************************************************ 5688 * ixgbe_get_default_advertise - Get default advertised speed settings 5689 * 5690 * Formatted for sysctl usage. 5691 * Flags: 5692 * 0x1 - advertise 100 Mb 5693 * 0x2 - advertise 1G 5694 * 0x4 - advertise 10G 5695 * 0x8 - advertise 10 Mb (yes, Mb) 5696 * 0x10 - advertise 2.5G 5697 * 0x20 - advertise 5G 5698 ************************************************************************/ 5699 static int 5700 ixgbe_get_default_advertise(struct ixgbe_softc *sc) 5701 { 5702 struct ixgbe_hw *hw = &sc->hw; 5703 int speed; 5704 ixgbe_link_speed link_caps = 0; 5705 s32 err; 5706 bool negotiate = FALSE; 5707 5708 /* 5709 * Advertised speed means nothing unless it's copper or 5710 * multi-speed fiber 5711 */ 5712 if (!(hw->phy.media_type == ixgbe_media_type_copper) && 5713 !(hw->phy.multispeed_fiber)) 5714 return (0); 5715 5716 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate); 5717 if (err != IXGBE_SUCCESS) 5718 return (0); 5719 5720 speed = 5721 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) | 5722 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) | 5723 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) | 5724 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) | 5725 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) | 5726 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0); 5727 5728 return speed; 5729 } /* ixgbe_get_default_advertise */ 5730 5731 /************************************************************************ 5732 * ixgbe_sysctl_dmac - Manage DMA Coalescing 5733 * 5734 * Control values: 5735 * 0/1 - off / on (use default value of 1000) 5736 * 5737 * Legal timer values are: 5738 * 50,100,250,500,1000,2000,5000,10000 5739 * 5740 * Turning off interrupt moderation will also turn this off. 5741 ************************************************************************/ 5742 static int 5743 ixgbe_sysctl_dmac(SYSCTLFN_ARGS) 5744 { 5745 struct sysctlnode node = *rnode; 5746 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5747 struct ifnet *ifp = sc->ifp; 5748 int error; 5749 int newval; 5750 5751 if (ixgbe_fw_recovery_mode_swflag(sc)) 5752 return (EPERM); 5753 5754 newval = sc->dmac; 5755 node.sysctl_data = &newval; 5756 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5757 if ((error) || (newp == NULL)) 5758 return (error); 5759 5760 switch (newval) { 5761 case 0: 5762 /* Disabled */ 5763 sc->dmac = 0; 5764 break; 5765 case 1: 5766 /* Enable and use default */ 5767 sc->dmac = 1000; 5768 break; 5769 case 50: 5770 case 100: 5771 case 250: 5772 case 500: 5773 case 1000: 5774 case 2000: 5775 case 5000: 5776 case 10000: 5777 /* Legal values - allow */ 5778 sc->dmac = newval; 5779 break; 5780 default: 5781 /* Do nothing, illegal value */ 5782 return (EINVAL); 5783 } 5784 5785 /* Re-initialize hardware if it's already running */ 5786 if (ifp->if_flags & IFF_RUNNING) 5787 if_init(ifp); 5788 5789 return (0); 5790 } 5791 5792 #ifdef IXGBE_DEBUG 5793 /************************************************************************ 5794 * ixgbe_sysctl_power_state 5795 * 5796 * Sysctl to test power states 5797 * Values: 5798 * 0 - set device to D0 5799 * 3 - set device to D3 5800 * (none) - get current device power state 5801 ************************************************************************/ 5802 static int 5803 ixgbe_sysctl_power_state(SYSCTLFN_ARGS) 5804 { 5805 #ifdef notyet 5806 struct sysctlnode node = *rnode; 5807 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5808 device_t dev = sc->dev; 5809 int curr_ps, new_ps, error = 0; 5810 5811 if (ixgbe_fw_recovery_mode_swflag(sc)) 5812 return (EPERM); 5813 5814 curr_ps = new_ps = pci_get_powerstate(dev); 5815 5816 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5817 if ((error) || (req->newp == NULL)) 5818 return (error); 5819 5820 if (new_ps == curr_ps) 5821 return (0); 5822 5823 if (new_ps == 3 && curr_ps == 0) 5824 error = DEVICE_SUSPEND(dev); 5825 else if (new_ps == 0 && curr_ps == 3) 5826 error = DEVICE_RESUME(dev); 5827 else 5828 return (EINVAL); 5829 5830 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 5831 5832 return (error); 5833 #else 5834 return 0; 5835 #endif 5836 } /* ixgbe_sysctl_power_state */ 5837 #endif 5838 5839 /************************************************************************ 5840 * ixgbe_sysctl_wol_enable 5841 * 5842 * Sysctl to enable/disable the WoL capability, 5843 * if supported by the adapter. 5844 * 5845 * Values: 5846 * 0 - disabled 5847 * 1 - enabled 5848 ************************************************************************/ 5849 static int 5850 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS) 5851 { 5852 struct sysctlnode node = *rnode; 5853 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5854 struct ixgbe_hw *hw = &sc->hw; 5855 bool new_wol_enabled; 5856 int error = 0; 5857 5858 /* 5859 * It's not required to check recovery mode because this function never 5860 * touches hardware. 5861 */ 5862 new_wol_enabled = hw->wol_enabled; 5863 node.sysctl_data = &new_wol_enabled; 5864 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5865 if ((error) || (newp == NULL)) 5866 return (error); 5867 if (new_wol_enabled == hw->wol_enabled) 5868 return (0); 5869 5870 if (new_wol_enabled && !sc->wol_support) 5871 return (ENODEV); 5872 else 5873 hw->wol_enabled = new_wol_enabled; 5874 5875 return (0); 5876 } /* ixgbe_sysctl_wol_enable */ 5877 5878 /************************************************************************ 5879 * ixgbe_sysctl_wufc - Wake Up Filter Control 5880 * 5881 * Sysctl to enable/disable the types of packets that the 5882 * adapter will wake up on upon receipt. 5883 * Flags: 5884 * 0x1 - Link Status Change 5885 * 0x2 - Magic Packet 5886 * 0x4 - Direct Exact 5887 * 0x8 - Directed Multicast 5888 * 0x10 - Broadcast 5889 * 0x20 - ARP/IPv4 Request Packet 5890 * 0x40 - Direct IPv4 Packet 5891 * 0x80 - Direct IPv6 Packet 5892 * 5893 * Settings not listed above will cause the sysctl to return an error. 5894 ************************************************************************/ 5895 static int 5896 ixgbe_sysctl_wufc(SYSCTLFN_ARGS) 5897 { 5898 struct sysctlnode node = *rnode; 5899 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5900 int error = 0; 5901 u32 new_wufc; 5902 5903 /* 5904 * It's not required to check recovery mode because this function never 5905 * touches hardware. 5906 */ 5907 new_wufc = sc->wufc; 5908 node.sysctl_data = &new_wufc; 5909 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 5910 if ((error) || (newp == NULL)) 5911 return (error); 5912 if (new_wufc == sc->wufc) 5913 return (0); 5914 5915 if (new_wufc & 0xffffff00) 5916 return (EINVAL); 5917 5918 new_wufc &= 0xff; 5919 new_wufc |= (0xffffff & sc->wufc); 5920 sc->wufc = new_wufc; 5921 5922 return (0); 5923 } /* ixgbe_sysctl_wufc */ 5924 5925 #ifdef IXGBE_DEBUG 5926 /************************************************************************ 5927 * ixgbe_sysctl_print_rss_config 5928 ************************************************************************/ 5929 static int 5930 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS) 5931 { 5932 #ifdef notyet 5933 struct sysctlnode node = *rnode; 5934 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5935 struct ixgbe_hw *hw = &sc->hw; 5936 device_t dev = sc->dev; 5937 struct sbuf *buf; 5938 int error = 0, reta_size; 5939 u32 reg; 5940 5941 if (ixgbe_fw_recovery_mode_swflag(sc)) 5942 return (EPERM); 5943 5944 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5945 if (!buf) { 5946 device_printf(dev, "Could not allocate sbuf for output.\n"); 5947 return (ENOMEM); 5948 } 5949 5950 // TODO: use sbufs to make a string to print out 5951 /* Set multiplier for RETA setup and table size based on MAC */ 5952 switch (sc->hw.mac.type) { 5953 case ixgbe_mac_X550: 5954 case ixgbe_mac_X550EM_x: 5955 case ixgbe_mac_X550EM_a: 5956 reta_size = 128; 5957 break; 5958 default: 5959 reta_size = 32; 5960 break; 5961 } 5962 5963 /* Print out the redirection table */ 5964 sbuf_cat(buf, "\n"); 5965 for (int i = 0; i < reta_size; i++) { 5966 if (i < 32) { 5967 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5968 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5969 } else { 5970 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5971 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5972 } 5973 } 5974 5975 // TODO: print more config 5976 5977 error = sbuf_finish(buf); 5978 if (error) 5979 device_printf(dev, "Error finishing sbuf: %d\n", error); 5980 5981 sbuf_delete(buf); 5982 #endif 5983 return (0); 5984 } /* ixgbe_sysctl_print_rss_config */ 5985 #endif /* IXGBE_DEBUG */ 5986 5987 /************************************************************************ 5988 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY 5989 * 5990 * For X552/X557-AT devices using an external PHY 5991 ************************************************************************/ 5992 static int 5993 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS) 5994 { 5995 struct sysctlnode node = *rnode; 5996 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 5997 struct ixgbe_hw *hw = &sc->hw; 5998 int val; 5999 u16 reg; 6000 int error; 6001 6002 if (ixgbe_fw_recovery_mode_swflag(sc)) 6003 return (EPERM); 6004 6005 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6006 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6007 device_printf(sc->dev, 6008 "Device has no supported external thermal sensor.\n"); 6009 return (ENODEV); 6010 } 6011 6012 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 6013 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6014 device_printf(sc->dev, 6015 "Error reading from PHY's current temperature register\n"); 6016 return (EAGAIN); 6017 } 6018 6019 node.sysctl_data = &val; 6020 6021 /* Shift temp for output */ 6022 val = reg >> 8; 6023 6024 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6025 if ((error) || (newp == NULL)) 6026 return (error); 6027 6028 return (0); 6029 } /* ixgbe_sysctl_phy_temp */ 6030 6031 /************************************************************************ 6032 * ixgbe_sysctl_phy_overtemp_occurred 6033 * 6034 * Reports (directly from the PHY) whether the current PHY 6035 * temperature is over the overtemp threshold. 6036 ************************************************************************/ 6037 static int 6038 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS) 6039 { 6040 struct sysctlnode node = *rnode; 6041 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6042 struct ixgbe_hw *hw = &sc->hw; 6043 int val, error; 6044 u16 reg; 6045 6046 if (ixgbe_fw_recovery_mode_swflag(sc)) 6047 return (EPERM); 6048 6049 if ((hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) && 6050 (hw->device_id != IXGBE_DEV_ID_X550EM_A_10G_T)) { 6051 device_printf(sc->dev, 6052 "Device has no supported external thermal sensor.\n"); 6053 return (ENODEV); 6054 } 6055 6056 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 6057 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) { 6058 device_printf(sc->dev, 6059 "Error reading from PHY's temperature status register\n"); 6060 return (EAGAIN); 6061 } 6062 6063 node.sysctl_data = &val; 6064 6065 /* Get occurrence bit */ 6066 val = !!(reg & 0x4000); 6067 6068 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6069 if ((error) || (newp == NULL)) 6070 return (error); 6071 6072 return (0); 6073 } /* ixgbe_sysctl_phy_overtemp_occurred */ 6074 6075 /************************************************************************ 6076 * ixgbe_sysctl_eee_state 6077 * 6078 * Sysctl to set EEE power saving feature 6079 * Values: 6080 * 0 - disable EEE 6081 * 1 - enable EEE 6082 * (none) - get current device EEE state 6083 ************************************************************************/ 6084 static int 6085 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS) 6086 { 6087 struct sysctlnode node = *rnode; 6088 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6089 struct ifnet *ifp = sc->ifp; 6090 device_t dev = sc->dev; 6091 int curr_eee, new_eee, error = 0; 6092 s32 retval; 6093 6094 if (ixgbe_fw_recovery_mode_swflag(sc)) 6095 return (EPERM); 6096 6097 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE); 6098 node.sysctl_data = &new_eee; 6099 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6100 if ((error) || (newp == NULL)) 6101 return (error); 6102 6103 /* Nothing to do */ 6104 if (new_eee == curr_eee) 6105 return (0); 6106 6107 /* Not supported */ 6108 if (!(sc->feat_cap & IXGBE_FEATURE_EEE)) 6109 return (EINVAL); 6110 6111 /* Bounds checking */ 6112 if ((new_eee < 0) || (new_eee > 1)) 6113 return (EINVAL); 6114 6115 retval = ixgbe_setup_eee(&sc->hw, new_eee); 6116 if (retval) { 6117 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval); 6118 return (EINVAL); 6119 } 6120 6121 /* Restart auto-neg */ 6122 if_init(ifp); 6123 6124 device_printf(dev, "New EEE state: %d\n", new_eee); 6125 6126 /* Cache new value */ 6127 if (new_eee) 6128 sc->feat_en |= IXGBE_FEATURE_EEE; 6129 else 6130 sc->feat_en &= ~IXGBE_FEATURE_EEE; 6131 6132 return (error); 6133 } /* ixgbe_sysctl_eee_state */ 6134 6135 #define PRINTQS(sc, regname) \ 6136 do { \ 6137 struct ixgbe_hw *_hw = &(sc)->hw; \ 6138 int _i; \ 6139 \ 6140 printf("%s: %s", device_xname((sc)->dev), #regname); \ 6141 for (_i = 0; _i < (sc)->num_queues; _i++) { \ 6142 printf((_i == 0) ? "\t" : " "); \ 6143 printf("%08x", IXGBE_READ_REG(_hw, \ 6144 IXGBE_##regname(_i))); \ 6145 } \ 6146 printf("\n"); \ 6147 } while (0) 6148 6149 /************************************************************************ 6150 * ixgbe_print_debug_info 6151 * 6152 * Called only when em_display_debug_stats is enabled. 6153 * Provides a way to take a look at important statistics 6154 * maintained by the driver and hardware. 6155 ************************************************************************/ 6156 static void 6157 ixgbe_print_debug_info(struct ixgbe_softc *sc) 6158 { 6159 device_t dev = sc->dev; 6160 struct ixgbe_hw *hw = &sc->hw; 6161 int table_size; 6162 int i; 6163 6164 switch (sc->hw.mac.type) { 6165 case ixgbe_mac_X550: 6166 case ixgbe_mac_X550EM_x: 6167 case ixgbe_mac_X550EM_a: 6168 table_size = 128; 6169 break; 6170 default: 6171 table_size = 32; 6172 break; 6173 } 6174 6175 device_printf(dev, "[E]RETA:\n"); 6176 for (i = 0; i < table_size; i++) { 6177 if (i < 32) 6178 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6179 IXGBE_RETA(i))); 6180 else 6181 printf("%02x: %08x\n", i, IXGBE_READ_REG(hw, 6182 IXGBE_ERETA(i - 32))); 6183 } 6184 6185 device_printf(dev, "queue:"); 6186 for (i = 0; i < sc->num_queues; i++) { 6187 printf((i == 0) ? "\t" : " "); 6188 printf("%8d", i); 6189 } 6190 printf("\n"); 6191 PRINTQS(sc, RDBAL); 6192 PRINTQS(sc, RDBAH); 6193 PRINTQS(sc, RDLEN); 6194 PRINTQS(sc, SRRCTL); 6195 PRINTQS(sc, RDH); 6196 PRINTQS(sc, RDT); 6197 PRINTQS(sc, RXDCTL); 6198 6199 device_printf(dev, "RQSMR:"); 6200 for (i = 0; i < sc->num_queues / 4; i++) { 6201 printf((i == 0) ? "\t" : " "); 6202 printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i))); 6203 } 6204 printf("\n"); 6205 6206 device_printf(dev, "disabled_count:"); 6207 for (i = 0; i < sc->num_queues; i++) { 6208 printf((i == 0) ? "\t" : " "); 6209 printf("%8d", sc->queues[i].disabled_count); 6210 } 6211 printf("\n"); 6212 6213 device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); 6214 if (hw->mac.type != ixgbe_mac_82598EB) { 6215 device_printf(dev, "EIMS_EX(0):\t%08x\n", 6216 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0))); 6217 device_printf(dev, "EIMS_EX(1):\t%08x\n", 6218 IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1))); 6219 } 6220 device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); 6221 device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); 6222 } /* ixgbe_print_debug_info */ 6223 6224 /************************************************************************ 6225 * ixgbe_sysctl_debug 6226 ************************************************************************/ 6227 static int 6228 ixgbe_sysctl_debug(SYSCTLFN_ARGS) 6229 { 6230 struct sysctlnode node = *rnode; 6231 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6232 int error, result = 0; 6233 6234 if (ixgbe_fw_recovery_mode_swflag(sc)) 6235 return (EPERM); 6236 6237 node.sysctl_data = &result; 6238 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6239 6240 if (error || newp == NULL) 6241 return error; 6242 6243 if (result == 1) 6244 ixgbe_print_debug_info(sc); 6245 6246 return 0; 6247 } /* ixgbe_sysctl_debug */ 6248 6249 /************************************************************************ 6250 * ixgbe_sysctl_rx_copy_len 6251 ************************************************************************/ 6252 static int 6253 ixgbe_sysctl_rx_copy_len(SYSCTLFN_ARGS) 6254 { 6255 struct sysctlnode node = *rnode; 6256 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6257 int error; 6258 int result = sc->rx_copy_len; 6259 6260 node.sysctl_data = &result; 6261 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6262 6263 if (error || newp == NULL) 6264 return error; 6265 6266 if ((result < 0) || (result > IXGBE_RX_COPY_LEN_MAX)) 6267 return EINVAL; 6268 6269 sc->rx_copy_len = result; 6270 6271 return 0; 6272 } /* ixgbe_sysctl_rx_copy_len */ 6273 6274 /************************************************************************ 6275 * ixgbe_sysctl_tx_process_limit 6276 ************************************************************************/ 6277 static int 6278 ixgbe_sysctl_tx_process_limit(SYSCTLFN_ARGS) 6279 { 6280 struct sysctlnode node = *rnode; 6281 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6282 int error; 6283 int result = sc->tx_process_limit; 6284 6285 node.sysctl_data = &result; 6286 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6287 6288 if (error || newp == NULL) 6289 return error; 6290 6291 if ((result <= 0) || (result > sc->num_tx_desc)) 6292 return EINVAL; 6293 6294 sc->tx_process_limit = result; 6295 6296 return 0; 6297 } /* ixgbe_sysctl_tx_process_limit */ 6298 6299 /************************************************************************ 6300 * ixgbe_sysctl_rx_process_limit 6301 ************************************************************************/ 6302 static int 6303 ixgbe_sysctl_rx_process_limit(SYSCTLFN_ARGS) 6304 { 6305 struct sysctlnode node = *rnode; 6306 struct ixgbe_softc *sc = (struct ixgbe_softc *)node.sysctl_data; 6307 int error; 6308 int result = sc->rx_process_limit; 6309 6310 node.sysctl_data = &result; 6311 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 6312 6313 if (error || newp == NULL) 6314 return error; 6315 6316 if ((result <= 0) || (result > sc->num_rx_desc)) 6317 return EINVAL; 6318 6319 sc->rx_process_limit = result; 6320 6321 return 0; 6322 } /* ixgbe_sysctl_rx_process_limit */ 6323 6324 /************************************************************************ 6325 * ixgbe_init_device_features 6326 ************************************************************************/ 6327 static void 6328 ixgbe_init_device_features(struct ixgbe_softc *sc) 6329 { 6330 sc->feat_cap = IXGBE_FEATURE_NETMAP 6331 | IXGBE_FEATURE_RSS 6332 | IXGBE_FEATURE_MSI 6333 | IXGBE_FEATURE_MSIX 6334 | IXGBE_FEATURE_LEGACY_IRQ 6335 | IXGBE_FEATURE_LEGACY_TX; 6336 6337 /* Set capabilities first... */ 6338 switch (sc->hw.mac.type) { 6339 case ixgbe_mac_82598EB: 6340 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT) 6341 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL; 6342 break; 6343 case ixgbe_mac_X540: 6344 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6345 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6346 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) && 6347 (sc->hw.bus.func == 0)) 6348 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6349 break; 6350 case ixgbe_mac_X550: 6351 /* 6352 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6353 * NVM Image version. 6354 */ 6355 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6356 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6357 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6358 break; 6359 case ixgbe_mac_X550EM_x: 6360 /* 6361 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6362 * NVM Image version. 6363 */ 6364 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6365 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6366 break; 6367 case ixgbe_mac_X550EM_a: 6368 /* 6369 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading 6370 * NVM Image version. 6371 */ 6372 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6373 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6374 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6375 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) || 6376 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) { 6377 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR; 6378 sc->feat_cap |= IXGBE_FEATURE_EEE; 6379 } 6380 break; 6381 case ixgbe_mac_82599EB: 6382 sc->feat_cap |= IXGBE_FEATURE_SRIOV; 6383 sc->feat_cap |= IXGBE_FEATURE_FDIR; 6384 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) && 6385 (sc->hw.bus.func == 0)) 6386 sc->feat_cap |= IXGBE_FEATURE_BYPASS; 6387 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) 6388 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ; 6389 break; 6390 default: 6391 break; 6392 } 6393 6394 /* Enabled by default... */ 6395 /* Fan failure detection */ 6396 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL) 6397 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL; 6398 /* Netmap */ 6399 if (sc->feat_cap & IXGBE_FEATURE_NETMAP) 6400 sc->feat_en |= IXGBE_FEATURE_NETMAP; 6401 /* EEE */ 6402 if (sc->feat_cap & IXGBE_FEATURE_EEE) 6403 sc->feat_en |= IXGBE_FEATURE_EEE; 6404 /* Thermal Sensor */ 6405 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR) 6406 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR; 6407 /* 6408 * Recovery mode: 6409 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading 6410 * NVM Image version. 6411 */ 6412 6413 /* Enabled via global sysctl... */ 6414 /* Flow Director */ 6415 if (ixgbe_enable_fdir) { 6416 if (sc->feat_cap & IXGBE_FEATURE_FDIR) 6417 sc->feat_en |= IXGBE_FEATURE_FDIR; 6418 else 6419 device_printf(sc->dev, "Device does not support " 6420 "Flow Director. Leaving disabled."); 6421 } 6422 /* Legacy (single queue) transmit */ 6423 if ((sc->feat_cap & IXGBE_FEATURE_LEGACY_TX) && 6424 ixgbe_enable_legacy_tx) 6425 sc->feat_en |= IXGBE_FEATURE_LEGACY_TX; 6426 /* 6427 * Message Signal Interrupts - Extended (MSI-X) 6428 * Normal MSI is only enabled if MSI-X calls fail. 6429 */ 6430 if (!ixgbe_enable_msix) 6431 sc->feat_cap &= ~IXGBE_FEATURE_MSIX; 6432 /* Receive-Side Scaling (RSS) */ 6433 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss) 6434 sc->feat_en |= IXGBE_FEATURE_RSS; 6435 6436 /* Disable features with unmet dependencies... */ 6437 /* No MSI-X */ 6438 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) { 6439 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 6440 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 6441 sc->feat_en &= ~IXGBE_FEATURE_RSS; 6442 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 6443 } 6444 } /* ixgbe_init_device_features */ 6445 6446 /************************************************************************ 6447 * ixgbe_probe - Device identification routine 6448 * 6449 * Determines if the driver should be loaded on 6450 * adapter based on its PCI vendor/device ID. 6451 * 6452 * return BUS_PROBE_DEFAULT on success, positive on failure 6453 ************************************************************************/ 6454 static int 6455 ixgbe_probe(device_t dev, cfdata_t cf, void *aux) 6456 { 6457 const struct pci_attach_args *pa = aux; 6458 6459 return (ixgbe_lookup(pa) != NULL) ? 1 : 0; 6460 } 6461 6462 static const ixgbe_vendor_info_t * 6463 ixgbe_lookup(const struct pci_attach_args *pa) 6464 { 6465 const ixgbe_vendor_info_t *ent; 6466 pcireg_t subid; 6467 6468 INIT_DEBUGOUT("ixgbe_lookup: begin"); 6469 6470 if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID) 6471 return NULL; 6472 6473 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 6474 6475 for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) { 6476 if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) && 6477 (PCI_PRODUCT(pa->pa_id) == ent->device_id) && 6478 ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) || 6479 (ent->subvendor_id == 0)) && 6480 ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) || 6481 (ent->subdevice_id == 0))) { 6482 return ent; 6483 } 6484 } 6485 return NULL; 6486 } 6487 6488 static int 6489 ixgbe_ifflags_cb(struct ethercom *ec) 6490 { 6491 struct ifnet *ifp = &ec->ec_if; 6492 struct ixgbe_softc *sc = ifp->if_softc; 6493 u_short change; 6494 int rv = 0; 6495 6496 IXGBE_CORE_LOCK(sc); 6497 6498 change = ifp->if_flags ^ sc->if_flags; 6499 if (change != 0) 6500 sc->if_flags = ifp->if_flags; 6501 6502 if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) { 6503 rv = ENETRESET; 6504 goto out; 6505 } else if ((change & IFF_PROMISC) != 0) 6506 ixgbe_set_rxfilter(sc); 6507 6508 /* Check for ec_capenable. */ 6509 change = ec->ec_capenable ^ sc->ec_capenable; 6510 sc->ec_capenable = ec->ec_capenable; 6511 if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING 6512 | ETHERCAP_VLAN_HWFILTER)) != 0) { 6513 rv = ENETRESET; 6514 goto out; 6515 } 6516 6517 /* 6518 * Special handling is not required for ETHERCAP_VLAN_MTU. 6519 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header. 6520 */ 6521 6522 /* Set up VLAN support and filter */ 6523 if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0) 6524 ixgbe_setup_vlan_hw_support(sc); 6525 6526 out: 6527 IXGBE_CORE_UNLOCK(sc); 6528 6529 return rv; 6530 } 6531 6532 /************************************************************************ 6533 * ixgbe_ioctl - Ioctl entry point 6534 * 6535 * Called when the user wants to configure the interface. 6536 * 6537 * return 0 on success, positive on failure 6538 ************************************************************************/ 6539 static int 6540 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 6541 { 6542 struct ixgbe_softc *sc = ifp->if_softc; 6543 struct ixgbe_hw *hw = &sc->hw; 6544 struct ifcapreq *ifcr = data; 6545 struct ifreq *ifr = data; 6546 int error = 0; 6547 int l4csum_en; 6548 const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx | 6549 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx; 6550 6551 if (ixgbe_fw_recovery_mode_swflag(sc)) 6552 return (EPERM); 6553 6554 switch (command) { 6555 case SIOCSIFFLAGS: 6556 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 6557 break; 6558 case SIOCADDMULTI: 6559 case SIOCDELMULTI: 6560 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 6561 break; 6562 case SIOCSIFMEDIA: 6563 case SIOCGIFMEDIA: 6564 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 6565 break; 6566 case SIOCSIFCAP: 6567 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 6568 break; 6569 case SIOCSIFMTU: 6570 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 6571 break; 6572 #ifdef __NetBSD__ 6573 case SIOCINITIFADDR: 6574 IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR"); 6575 break; 6576 case SIOCGIFFLAGS: 6577 IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS"); 6578 break; 6579 case SIOCGIFAFLAG_IN: 6580 IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN"); 6581 break; 6582 case SIOCGIFADDR: 6583 IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR"); 6584 break; 6585 case SIOCGIFMTU: 6586 IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)"); 6587 break; 6588 case SIOCGIFCAP: 6589 IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)"); 6590 break; 6591 case SIOCGETHERCAP: 6592 IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)"); 6593 break; 6594 case SIOCGLIFADDR: 6595 IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)"); 6596 break; 6597 case SIOCZIFDATA: 6598 IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)"); 6599 hw->mac.ops.clear_hw_cntrs(hw); 6600 ixgbe_clear_evcnt(sc); 6601 break; 6602 case SIOCAIFADDR: 6603 IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)"); 6604 break; 6605 #endif 6606 default: 6607 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command); 6608 break; 6609 } 6610 6611 switch (command) { 6612 case SIOCGI2C: 6613 { 6614 struct ixgbe_i2c_req i2c; 6615 6616 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 6617 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 6618 if (error != 0) 6619 break; 6620 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 6621 error = EINVAL; 6622 break; 6623 } 6624 if (i2c.len > sizeof(i2c.data)) { 6625 error = EINVAL; 6626 break; 6627 } 6628 6629 hw->phy.ops.read_i2c_byte(hw, i2c.offset, 6630 i2c.dev_addr, i2c.data); 6631 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 6632 break; 6633 } 6634 case SIOCSIFCAP: 6635 /* Layer-4 Rx checksum offload has to be turned on and 6636 * off as a unit. 6637 */ 6638 l4csum_en = ifcr->ifcr_capenable & l4csum; 6639 if (l4csum_en != l4csum && l4csum_en != 0) 6640 return EINVAL; 6641 /*FALLTHROUGH*/ 6642 case SIOCADDMULTI: 6643 case SIOCDELMULTI: 6644 case SIOCSIFFLAGS: 6645 case SIOCSIFMTU: 6646 default: 6647 if ((error = ether_ioctl(ifp, command, data)) != ENETRESET) 6648 return error; 6649 if ((ifp->if_flags & IFF_RUNNING) == 0) 6650 ; 6651 else if (command == SIOCSIFCAP || command == SIOCSIFMTU) { 6652 IXGBE_CORE_LOCK(sc); 6653 if ((ifp->if_flags & IFF_RUNNING) != 0) 6654 ixgbe_init_locked(sc); 6655 ixgbe_recalculate_max_frame(sc); 6656 IXGBE_CORE_UNLOCK(sc); 6657 } else if (command == SIOCADDMULTI || command == SIOCDELMULTI) { 6658 /* 6659 * Multicast list has changed; set the hardware filter 6660 * accordingly. 6661 */ 6662 IXGBE_CORE_LOCK(sc); 6663 ixgbe_disable_intr(sc); 6664 ixgbe_set_rxfilter(sc); 6665 ixgbe_enable_intr(sc); 6666 IXGBE_CORE_UNLOCK(sc); 6667 } 6668 return 0; 6669 } 6670 6671 return error; 6672 } /* ixgbe_ioctl */ 6673 6674 /************************************************************************ 6675 * ixgbe_check_fan_failure 6676 ************************************************************************/ 6677 static int 6678 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt) 6679 { 6680 u32 mask; 6681 6682 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : 6683 IXGBE_ESDP_SDP1; 6684 6685 if ((reg & mask) == 0) 6686 return IXGBE_SUCCESS; 6687 6688 /* 6689 * Use ratecheck() just in case interrupt occur frequently. 6690 * When EXPX9501AT's fan stopped, interrupt occurred only once, 6691 * an red LED on the board turned on and link never up until 6692 * power off. 6693 */ 6694 if (ratecheck(&sc->lasterr_time, &ixgbe_errlog_intrvl)) 6695 device_printf(sc->dev, 6696 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n"); 6697 6698 return IXGBE_ERR_FAN_FAILURE; 6699 } /* ixgbe_check_fan_failure */ 6700 6701 /************************************************************************ 6702 * ixgbe_handle_que 6703 ************************************************************************/ 6704 static void 6705 ixgbe_handle_que(void *context) 6706 { 6707 struct ix_queue *que = context; 6708 struct ixgbe_softc *sc = que->sc; 6709 struct tx_ring *txr = que->txr; 6710 struct ifnet *ifp = sc->ifp; 6711 bool more = false; 6712 6713 IXGBE_EVC_ADD(&que->handleq, 1); 6714 6715 if (ifp->if_flags & IFF_RUNNING) { 6716 IXGBE_TX_LOCK(txr); 6717 more = ixgbe_txeof(txr); 6718 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) 6719 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq)) 6720 ixgbe_mq_start_locked(ifp, txr); 6721 /* Only for queue 0 */ 6722 /* NetBSD still needs this for CBQ */ 6723 if ((&sc->queues[0] == que) 6724 && (!ixgbe_legacy_ring_empty(ifp, NULL))) 6725 ixgbe_legacy_start_locked(ifp, txr); 6726 IXGBE_TX_UNLOCK(txr); 6727 more |= ixgbe_rxeof(que); 6728 } 6729 6730 if (more) { 6731 IXGBE_EVC_ADD(&que->req, 1); 6732 ixgbe_sched_handle_que(sc, que); 6733 } else if (que->res != NULL) { 6734 /* MSIX: Re-enable this interrupt */ 6735 ixgbe_enable_queue(sc, que->msix); 6736 } else { 6737 /* INTx or MSI */ 6738 ixgbe_enable_queue(sc, 0); 6739 } 6740 6741 return; 6742 } /* ixgbe_handle_que */ 6743 6744 /************************************************************************ 6745 * ixgbe_handle_que_work 6746 ************************************************************************/ 6747 static void 6748 ixgbe_handle_que_work(struct work *wk, void *context) 6749 { 6750 struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie); 6751 6752 /* 6753 * "enqueued flag" is not required here. 6754 * See ixgbe_msix_que(). 6755 */ 6756 ixgbe_handle_que(que); 6757 } 6758 6759 /************************************************************************ 6760 * ixgbe_allocate_legacy - Setup the Legacy or MSI Interrupt handler 6761 ************************************************************************/ 6762 static int 6763 ixgbe_allocate_legacy(struct ixgbe_softc *sc, 6764 const struct pci_attach_args *pa) 6765 { 6766 device_t dev = sc->dev; 6767 struct ix_queue *que = sc->queues; 6768 struct tx_ring *txr = sc->tx_rings; 6769 int counts[PCI_INTR_TYPE_SIZE]; 6770 pci_intr_type_t intr_type, max_type; 6771 char intrbuf[PCI_INTRSTR_LEN]; 6772 char wqname[MAXCOMLEN]; 6773 const char *intrstr = NULL; 6774 int defertx_error = 0, error; 6775 6776 /* We allocate a single interrupt resource */ 6777 max_type = PCI_INTR_TYPE_MSI; 6778 counts[PCI_INTR_TYPE_MSIX] = 0; 6779 counts[PCI_INTR_TYPE_MSI] = 6780 (sc->feat_en & IXGBE_FEATURE_MSI) ? 1 : 0; 6781 /* Check not feat_en but feat_cap to fallback to INTx */ 6782 counts[PCI_INTR_TYPE_INTX] = 6783 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) ? 1 : 0; 6784 6785 alloc_retry: 6786 if (pci_intr_alloc(pa, &sc->osdep.intrs, counts, max_type) != 0) { 6787 aprint_error_dev(dev, "couldn't alloc interrupt\n"); 6788 return ENXIO; 6789 } 6790 sc->osdep.nintrs = 1; 6791 intrstr = pci_intr_string(sc->osdep.pc, sc->osdep.intrs[0], 6792 intrbuf, sizeof(intrbuf)); 6793 sc->osdep.ihs[0] = pci_intr_establish_xname(sc->osdep.pc, 6794 sc->osdep.intrs[0], IPL_NET, ixgbe_legacy_irq, que, 6795 device_xname(dev)); 6796 intr_type = pci_intr_type(sc->osdep.pc, sc->osdep.intrs[0]); 6797 if (sc->osdep.ihs[0] == NULL) { 6798 aprint_error_dev(dev,"unable to establish %s\n", 6799 (intr_type == PCI_INTR_TYPE_MSI) ? "MSI" : "INTx"); 6800 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6801 sc->osdep.intrs = NULL; 6802 switch (intr_type) { 6803 case PCI_INTR_TYPE_MSI: 6804 /* The next try is for INTx: Disable MSI */ 6805 max_type = PCI_INTR_TYPE_INTX; 6806 counts[PCI_INTR_TYPE_INTX] = 1; 6807 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6808 if (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) { 6809 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6810 goto alloc_retry; 6811 } else 6812 break; 6813 case PCI_INTR_TYPE_INTX: 6814 default: 6815 /* See below */ 6816 break; 6817 } 6818 } 6819 if (intr_type == PCI_INTR_TYPE_INTX) { 6820 sc->feat_en &= ~IXGBE_FEATURE_MSI; 6821 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 6822 } 6823 if (sc->osdep.ihs[0] == NULL) { 6824 aprint_error_dev(dev, 6825 "couldn't establish interrupt%s%s\n", 6826 intrstr ? " at " : "", intrstr ? intrstr : ""); 6827 pci_intr_release(sc->osdep.pc, sc->osdep.intrs, 1); 6828 sc->osdep.intrs = NULL; 6829 return ENXIO; 6830 } 6831 aprint_normal_dev(dev, "interrupting at %s\n", intrstr); 6832 /* 6833 * Try allocating a fast interrupt and the associated deferred 6834 * processing contexts. 6835 */ 6836 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6837 txr->txr_si = 6838 softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6839 ixgbe_deferred_mq_start, txr); 6840 6841 snprintf(wqname, sizeof(wqname), "%sdeferTx", 6842 device_xname(dev)); 6843 defertx_error = workqueue_create(&sc->txr_wq, wqname, 6844 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, 6845 IPL_NET, IXGBE_WORKQUEUE_FLAGS); 6846 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 6847 } 6848 que->que_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6849 ixgbe_handle_que, que); 6850 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 6851 error = workqueue_create(&sc->que_wq, wqname, 6852 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 6853 IXGBE_WORKQUEUE_FLAGS); 6854 6855 if ((!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX) 6856 && ((txr->txr_si == NULL) || defertx_error != 0)) 6857 || (que->que_si == NULL) || error != 0) { 6858 aprint_error_dev(dev, 6859 "could not establish software interrupts\n"); 6860 6861 return ENXIO; 6862 } 6863 /* For simplicity in the handlers */ 6864 sc->active_queues = IXGBE_EIMS_ENABLE_MASK; 6865 6866 return (0); 6867 } /* ixgbe_allocate_legacy */ 6868 6869 /************************************************************************ 6870 * ixgbe_allocate_msix - Setup MSI-X Interrupt resources and handlers 6871 ************************************************************************/ 6872 static int 6873 ixgbe_allocate_msix(struct ixgbe_softc *sc, const struct pci_attach_args *pa) 6874 { 6875 device_t dev = sc->dev; 6876 struct ix_queue *que = sc->queues; 6877 struct tx_ring *txr = sc->tx_rings; 6878 pci_chipset_tag_t pc; 6879 char intrbuf[PCI_INTRSTR_LEN]; 6880 char intr_xname[32]; 6881 char wqname[MAXCOMLEN]; 6882 const char *intrstr = NULL; 6883 int error, vector = 0; 6884 int cpu_id = 0; 6885 kcpuset_t *affinity; 6886 #ifdef RSS 6887 unsigned int rss_buckets = 0; 6888 kcpuset_t cpu_mask; 6889 #endif 6890 6891 pc = sc->osdep.pc; 6892 #ifdef RSS 6893 /* 6894 * If we're doing RSS, the number of queues needs to 6895 * match the number of RSS buckets that are configured. 6896 * 6897 * + If there's more queues than RSS buckets, we'll end 6898 * up with queues that get no traffic. 6899 * 6900 * + If there's more RSS buckets than queues, we'll end 6901 * up having multiple RSS buckets map to the same queue, 6902 * so there'll be some contention. 6903 */ 6904 rss_buckets = rss_getnumbuckets(); 6905 if ((sc->feat_en & IXGBE_FEATURE_RSS) && 6906 (sc->num_queues != rss_buckets)) { 6907 device_printf(dev, 6908 "%s: number of queues (%d) != number of RSS buckets (%d)" 6909 "; performance will be impacted.\n", 6910 __func__, sc->num_queues, rss_buckets); 6911 } 6912 #endif 6913 6914 sc->osdep.nintrs = sc->num_queues + 1; 6915 if (pci_msix_alloc_exact(pa, &sc->osdep.intrs, 6916 sc->osdep.nintrs) != 0) { 6917 aprint_error_dev(dev, 6918 "failed to allocate MSI-X interrupt\n"); 6919 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 6920 return (ENXIO); 6921 } 6922 6923 kcpuset_create(&affinity, false); 6924 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) { 6925 snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d", 6926 device_xname(dev), i); 6927 intrstr = pci_intr_string(pc, sc->osdep.intrs[i], intrbuf, 6928 sizeof(intrbuf)); 6929 pci_intr_setattr(pc, &sc->osdep.intrs[i], PCI_INTR_MPSAFE, 6930 true); 6931 6932 /* Set the handler function */ 6933 que->res = sc->osdep.ihs[i] = pci_intr_establish_xname(pc, 6934 sc->osdep.intrs[i], IPL_NET, ixgbe_msix_que, que, 6935 intr_xname); 6936 if (que->res == NULL) { 6937 aprint_error_dev(dev, 6938 "Failed to register QUE handler\n"); 6939 error = ENXIO; 6940 goto err_out; 6941 } 6942 que->msix = vector; 6943 sc->active_queues |= 1ULL << que->msix; 6944 6945 if (sc->feat_en & IXGBE_FEATURE_RSS) { 6946 #ifdef RSS 6947 /* 6948 * The queue ID is used as the RSS layer bucket ID. 6949 * We look up the queue ID -> RSS CPU ID and select 6950 * that. 6951 */ 6952 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 6953 CPU_SETOF(cpu_id, &cpu_mask); 6954 #endif 6955 } else { 6956 /* 6957 * Bind the MSI-X vector, and thus the 6958 * rings to the corresponding CPU. 6959 * 6960 * This just happens to match the default RSS 6961 * round-robin bucket -> queue -> CPU allocation. 6962 */ 6963 if (sc->num_queues > 1) 6964 cpu_id = i; 6965 } 6966 /* Round-robin affinity */ 6967 kcpuset_zero(affinity); 6968 kcpuset_set(affinity, cpu_id % ncpu); 6969 error = interrupt_distribute(sc->osdep.ihs[i], affinity, 6970 NULL); 6971 aprint_normal_dev(dev, "for TX/RX, interrupting at %s", 6972 intrstr); 6973 if (error == 0) { 6974 #if 1 /* def IXGBE_DEBUG */ 6975 #ifdef RSS 6976 aprint_normal(", bound RSS bucket %d to CPU %d", i, 6977 cpu_id % ncpu); 6978 #else 6979 aprint_normal(", bound queue %d to cpu %d", i, 6980 cpu_id % ncpu); 6981 #endif 6982 #endif /* IXGBE_DEBUG */ 6983 } 6984 aprint_normal("\n"); 6985 6986 if (!(sc->feat_en & IXGBE_FEATURE_LEGACY_TX)) { 6987 txr->txr_si = softint_establish( 6988 SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6989 ixgbe_deferred_mq_start, txr); 6990 if (txr->txr_si == NULL) { 6991 aprint_error_dev(dev, 6992 "couldn't establish software interrupt\n"); 6993 error = ENXIO; 6994 goto err_out; 6995 } 6996 } 6997 que->que_si 6998 = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS, 6999 ixgbe_handle_que, que); 7000 if (que->que_si == NULL) { 7001 aprint_error_dev(dev, 7002 "couldn't establish software interrupt\n"); 7003 error = ENXIO; 7004 goto err_out; 7005 } 7006 } 7007 snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev)); 7008 error = workqueue_create(&sc->txr_wq, wqname, 7009 ixgbe_deferred_mq_start_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7010 IXGBE_WORKQUEUE_FLAGS); 7011 if (error) { 7012 aprint_error_dev(dev, 7013 "couldn't create workqueue for deferred Tx\n"); 7014 goto err_out; 7015 } 7016 sc->txr_wq_enqueued = percpu_alloc(sizeof(u_int)); 7017 7018 snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev)); 7019 error = workqueue_create(&sc->que_wq, wqname, 7020 ixgbe_handle_que_work, sc, IXGBE_WORKQUEUE_PRI, IPL_NET, 7021 IXGBE_WORKQUEUE_FLAGS); 7022 if (error) { 7023 aprint_error_dev(dev, "couldn't create workqueue for Tx/Rx\n"); 7024 goto err_out; 7025 } 7026 7027 /* and Link */ 7028 cpu_id++; 7029 snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev)); 7030 sc->vector = vector; 7031 intrstr = pci_intr_string(pc, sc->osdep.intrs[vector], intrbuf, 7032 sizeof(intrbuf)); 7033 pci_intr_setattr(pc, &sc->osdep.intrs[vector], PCI_INTR_MPSAFE, true); 7034 7035 /* Set the link handler function */ 7036 sc->osdep.ihs[vector] = pci_intr_establish_xname(pc, 7037 sc->osdep.intrs[vector], IPL_NET, ixgbe_msix_admin, sc, 7038 intr_xname); 7039 if (sc->osdep.ihs[vector] == NULL) { 7040 aprint_error_dev(dev, "Failed to register LINK handler\n"); 7041 error = ENXIO; 7042 goto err_out; 7043 } 7044 /* Round-robin affinity */ 7045 kcpuset_zero(affinity); 7046 kcpuset_set(affinity, cpu_id % ncpu); 7047 error = interrupt_distribute(sc->osdep.ihs[vector], affinity, 7048 NULL); 7049 7050 aprint_normal_dev(dev, 7051 "for link, interrupting at %s", intrstr); 7052 if (error == 0) 7053 aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu); 7054 else 7055 aprint_normal("\n"); 7056 7057 kcpuset_destroy(affinity); 7058 aprint_normal_dev(dev, 7059 "Using MSI-X interrupts with %d vectors\n", vector + 1); 7060 7061 return (0); 7062 7063 err_out: 7064 kcpuset_destroy(affinity); 7065 ixgbe_free_deferred_handlers(sc); 7066 ixgbe_free_pciintr_resources(sc); 7067 return (error); 7068 } /* ixgbe_allocate_msix */ 7069 7070 /************************************************************************ 7071 * ixgbe_configure_interrupts 7072 * 7073 * Setup MSI-X, MSI, or legacy interrupts (in that order). 7074 * This will also depend on user settings. 7075 ************************************************************************/ 7076 static int 7077 ixgbe_configure_interrupts(struct ixgbe_softc *sc) 7078 { 7079 device_t dev = sc->dev; 7080 struct ixgbe_mac_info *mac = &sc->hw.mac; 7081 int want, queues, msgs; 7082 7083 /* Default to 1 queue if MSI-X setup fails */ 7084 sc->num_queues = 1; 7085 7086 /* Override by tuneable */ 7087 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) 7088 goto msi; 7089 7090 /* 7091 * NetBSD only: Use single vector MSI when number of CPU is 1 to save 7092 * interrupt slot. 7093 */ 7094 if (ncpu == 1) 7095 goto msi; 7096 7097 /* First try MSI-X */ 7098 msgs = pci_msix_count(sc->osdep.pc, sc->osdep.tag); 7099 msgs = MIN(msgs, IXG_MAX_NINTR); 7100 if (msgs < 2) 7101 goto msi; 7102 7103 sc->feat_en |= IXGBE_FEATURE_MSIX; 7104 7105 /* Figure out a reasonable auto config value */ 7106 queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu; 7107 7108 #ifdef RSS 7109 /* If we're doing RSS, clamp at the number of RSS buckets */ 7110 if (sc->feat_en & IXGBE_FEATURE_RSS) 7111 queues = uimin(queues, rss_getnumbuckets()); 7112 #endif 7113 if (ixgbe_num_queues > queues) { 7114 aprint_error_dev(sc->dev, 7115 "ixgbe_num_queues (%d) is too large, " 7116 "using reduced amount (%d).\n", ixgbe_num_queues, queues); 7117 ixgbe_num_queues = queues; 7118 } 7119 7120 if (ixgbe_num_queues != 0) 7121 queues = ixgbe_num_queues; 7122 else 7123 queues = uimin(queues, 7124 uimin(mac->max_tx_queues, mac->max_rx_queues)); 7125 7126 /* 7127 * Want one vector (RX/TX pair) per queue 7128 * plus an additional for Link. 7129 */ 7130 want = queues + 1; 7131 if (msgs >= want) 7132 msgs = want; 7133 else { 7134 aprint_error_dev(dev, "MSI-X Configuration Problem, " 7135 "%d vectors but %d queues wanted!\n", msgs, want); 7136 goto msi; 7137 } 7138 sc->num_queues = queues; 7139 sc->feat_en |= IXGBE_FEATURE_MSIX; 7140 return (0); 7141 7142 /* 7143 * MSI-X allocation failed or provided us with 7144 * less vectors than needed. Free MSI-X resources 7145 * and we'll try enabling MSI. 7146 */ 7147 msi: 7148 /* Without MSI-X, some features are no longer supported */ 7149 sc->feat_cap &= ~IXGBE_FEATURE_RSS; 7150 sc->feat_en &= ~IXGBE_FEATURE_RSS; 7151 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV; 7152 sc->feat_en &= ~IXGBE_FEATURE_SRIOV; 7153 7154 msgs = pci_msi_count(sc->osdep.pc, sc->osdep.tag); 7155 sc->feat_en &= ~IXGBE_FEATURE_MSIX; 7156 if (msgs > 1) 7157 msgs = 1; 7158 if (msgs != 0) { 7159 msgs = 1; 7160 sc->feat_en |= IXGBE_FEATURE_MSI; 7161 return (0); 7162 } 7163 7164 if (!(sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ)) { 7165 aprint_error_dev(dev, 7166 "Device does not support legacy interrupts.\n"); 7167 return 1; 7168 } 7169 7170 sc->feat_en |= IXGBE_FEATURE_LEGACY_IRQ; 7171 7172 return (0); 7173 } /* ixgbe_configure_interrupts */ 7174 7175 7176 /************************************************************************ 7177 * ixgbe_handle_link - Tasklet for MSI-X Link interrupts 7178 * 7179 * Done outside of interrupt context since the driver might sleep 7180 ************************************************************************/ 7181 static void 7182 ixgbe_handle_link(void *context) 7183 { 7184 struct ixgbe_softc *sc = context; 7185 struct ixgbe_hw *hw = &sc->hw; 7186 7187 KASSERT(mutex_owned(&sc->core_mtx)); 7188 7189 IXGBE_EVC_ADD(&sc->link_workev, 1); 7190 ixgbe_check_link(hw, &sc->link_speed, &sc->link_up, 0); 7191 ixgbe_update_link_status(sc); 7192 7193 /* Re-enable link interrupts */ 7194 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 7195 } /* ixgbe_handle_link */ 7196 7197 #if 0 7198 /************************************************************************ 7199 * ixgbe_rearm_queues 7200 ************************************************************************/ 7201 static __inline void 7202 ixgbe_rearm_queues(struct ixgbe_softc *sc, u64 queues) 7203 { 7204 u32 mask; 7205 7206 switch (sc->hw.mac.type) { 7207 case ixgbe_mac_82598EB: 7208 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 7209 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS, mask); 7210 break; 7211 case ixgbe_mac_82599EB: 7212 case ixgbe_mac_X540: 7213 case ixgbe_mac_X550: 7214 case ixgbe_mac_X550EM_x: 7215 case ixgbe_mac_X550EM_a: 7216 mask = (queues & 0xFFFFFFFF); 7217 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(0), mask); 7218 mask = (queues >> 32); 7219 IXGBE_WRITE_REG(&sc->hw, IXGBE_EICS_EX(1), mask); 7220 break; 7221 default: 7222 break; 7223 } 7224 } /* ixgbe_rearm_queues */ 7225 #endif 7226
Indexes created Tue Sep 30 20:09:53 GMT 2025