ixgbe.h revision 1.8 1 1.1 dyoung /******************************************************************************
2 1.1 dyoung
3 1.8 msaitoh Copyright (c) 2001-2013, Intel Corporation
4 1.1 dyoung All rights reserved.
5 1.1 dyoung
6 1.1 dyoung Redistribution and use in source and binary forms, with or without
7 1.1 dyoung modification, are permitted provided that the following conditions are met:
8 1.1 dyoung
9 1.1 dyoung 1. Redistributions of source code must retain the above copyright notice,
10 1.1 dyoung this list of conditions and the following disclaimer.
11 1.1 dyoung
12 1.1 dyoung 2. Redistributions in binary form must reproduce the above copyright
13 1.1 dyoung notice, this list of conditions and the following disclaimer in the
14 1.1 dyoung documentation and/or other materials provided with the distribution.
15 1.1 dyoung
16 1.1 dyoung 3. Neither the name of the Intel Corporation nor the names of its
17 1.1 dyoung contributors may be used to endorse or promote products derived from
18 1.1 dyoung this software without specific prior written permission.
19 1.1 dyoung
20 1.1 dyoung THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 1.1 dyoung AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 1.1 dyoung IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 1.1 dyoung ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 1.1 dyoung LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 dyoung CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 dyoung SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 dyoung INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 dyoung CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 dyoung ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 dyoung POSSIBILITY OF SUCH DAMAGE.
31 1.1 dyoung
32 1.1 dyoung ******************************************************************************/
33 1.1 dyoung /*
34 1.1 dyoung * Copyright (c) 2011 The NetBSD Foundation, Inc.
35 1.1 dyoung * All rights reserved.
36 1.1 dyoung *
37 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
38 1.1 dyoung * by Coyote Point Systems, Inc.
39 1.1 dyoung *
40 1.1 dyoung * Redistribution and use in source and binary forms, with or without
41 1.1 dyoung * modification, are permitted provided that the following conditions
42 1.1 dyoung * are met:
43 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
44 1.1 dyoung * notice, this list of conditions and the following disclaimer.
45 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
46 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
47 1.1 dyoung * documentation and/or other materials provided with the distribution.
48 1.1 dyoung *
49 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
50 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
51 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
52 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
53 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
54 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
55 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
56 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
57 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
58 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
59 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
60 1.1 dyoung */
61 1.8 msaitoh /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 279393 2015-02-28 14:57:57Z ngie $*/
62 1.8 msaitoh /*$NetBSD: ixgbe.h,v 1.8 2015/08/05 04:08:44 msaitoh Exp $*/
63 1.1 dyoung
64 1.1 dyoung
65 1.1 dyoung #ifndef _IXGBE_H_
66 1.1 dyoung #define _IXGBE_H_
67 1.1 dyoung
68 1.1 dyoung
69 1.1 dyoung #include <sys/param.h>
70 1.1 dyoung #include <sys/reboot.h>
71 1.1 dyoung #include <sys/systm.h>
72 1.1 dyoung #include <sys/time.h>
73 1.1 dyoung #if __FreeBSD_version >= 800000
74 1.1 dyoung #include <sys/buf_ring.h>
75 1.1 dyoung #endif
76 1.1 dyoung #include <sys/mbuf.h>
77 1.1 dyoung #include <sys/protosw.h>
78 1.1 dyoung #include <sys/socket.h>
79 1.1 dyoung #include <sys/malloc.h>
80 1.1 dyoung #include <sys/kernel.h>
81 1.1 dyoung #include <sys/module.h>
82 1.1 dyoung #include <sys/sockio.h>
83 1.1 dyoung
84 1.1 dyoung #include <net/if.h>
85 1.1 dyoung #include <net/if_arp.h>
86 1.1 dyoung #include <net/bpf.h>
87 1.1 dyoung #include <net/if_ether.h>
88 1.1 dyoung #include <net/if_dl.h>
89 1.1 dyoung #include <net/if_media.h>
90 1.1 dyoung
91 1.1 dyoung #include <net/bpf.h>
92 1.1 dyoung #include <net/if_types.h>
93 1.1 dyoung #include <net/if_vlanvar.h>
94 1.1 dyoung
95 1.1 dyoung #include <netinet/in_systm.h>
96 1.1 dyoung #include <netinet/in.h>
97 1.1 dyoung #include <netinet/ip.h>
98 1.1 dyoung #include <netinet/ip6.h>
99 1.1 dyoung #include <netinet/tcp.h>
100 1.1 dyoung #include <netinet/udp.h>
101 1.1 dyoung
102 1.1 dyoung #include <sys/bus.h>
103 1.1 dyoung #include <dev/pci/pcivar.h>
104 1.1 dyoung #include <dev/pci/pcireg.h>
105 1.1 dyoung #include <sys/proc.h>
106 1.1 dyoung #include <sys/sysctl.h>
107 1.1 dyoung #include <sys/endian.h>
108 1.1 dyoung #include <sys/workqueue.h>
109 1.7 msaitoh #include <sys/cpu.h>
110 1.1 dyoung
111 1.1 dyoung #include "ixgbe_netbsd.h"
112 1.1 dyoung #include "ixgbe_api.h"
113 1.1 dyoung
114 1.1 dyoung /* Tunables */
115 1.1 dyoung
116 1.1 dyoung /*
117 1.1 dyoung * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
118 1.1 dyoung * number of transmit descriptors allocated by the driver. Increasing this
119 1.1 dyoung * value allows the driver to queue more transmits. Each descriptor is 16
120 1.1 dyoung * bytes. Performance tests have show the 2K value to be optimal for top
121 1.1 dyoung * performance.
122 1.1 dyoung */
123 1.1 dyoung #define DEFAULT_TXD 1024
124 1.1 dyoung #define PERFORM_TXD 2048
125 1.1 dyoung #define MAX_TXD 4096
126 1.1 dyoung #define MIN_TXD 64
127 1.1 dyoung
128 1.1 dyoung /*
129 1.1 dyoung * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
130 1.1 dyoung * number of receive descriptors allocated for each RX queue. Increasing this
131 1.1 dyoung * value allows the driver to buffer more incoming packets. Each descriptor
132 1.1 dyoung * is 16 bytes. A receive buffer is also allocated for each descriptor.
133 1.1 dyoung *
134 1.1 dyoung * Note: with 8 rings and a dual port card, it is possible to bump up
135 1.1 dyoung * against the system mbuf pool limit, you can tune nmbclusters
136 1.1 dyoung * to adjust for this.
137 1.1 dyoung */
138 1.1 dyoung #define DEFAULT_RXD 1024
139 1.1 dyoung #define PERFORM_RXD 2048
140 1.1 dyoung #define MAX_RXD 4096
141 1.1 dyoung #define MIN_RXD 64
142 1.1 dyoung
143 1.1 dyoung /* Alignment for rings */
144 1.1 dyoung #define DBA_ALIGN 128
145 1.1 dyoung
146 1.1 dyoung /*
147 1.1 dyoung * This parameter controls the maximum no of times the driver will loop in
148 1.1 dyoung * the isr. Minimum Value = 1
149 1.1 dyoung */
150 1.1 dyoung #define MAX_LOOP 10
151 1.1 dyoung
152 1.1 dyoung /*
153 1.1 dyoung * This is the max watchdog interval, ie. the time that can
154 1.1 dyoung * pass between any two TX clean operations, such only happening
155 1.1 dyoung * when the TX hardware is functioning.
156 1.1 dyoung */
157 1.1 dyoung #define IXGBE_WATCHDOG (10 * hz)
158 1.1 dyoung
159 1.1 dyoung /*
160 1.1 dyoung * This parameters control when the driver calls the routine to reclaim
161 1.1 dyoung * transmit descriptors.
162 1.1 dyoung */
163 1.1 dyoung #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
164 1.1 dyoung #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
165 1.1 dyoung
166 1.1 dyoung #define IXGBE_MAX_FRAME_SIZE 0x3F00
167 1.1 dyoung
168 1.1 dyoung /* Flow control constants */
169 1.1 dyoung #define IXGBE_FC_PAUSE 0xFFFF
170 1.1 dyoung #define IXGBE_FC_HI 0x20000
171 1.1 dyoung #define IXGBE_FC_LO 0x10000
172 1.1 dyoung
173 1.6 msaitoh /*
174 1.6 msaitoh * Used for optimizing small rx mbufs. Effort is made to keep the copy
175 1.6 msaitoh * small and aligned for the CPU L1 cache.
176 1.6 msaitoh *
177 1.6 msaitoh * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
178 1.6 msaitoh * 32 byte alignment needed for the fast bcopy results in 8 bytes being
179 1.6 msaitoh * wasted. Getting 64 byte alignment, which _should_ be ideal for
180 1.6 msaitoh * modern Intel CPUs, results in 40 bytes wasted and a significant drop
181 1.6 msaitoh * in observed efficiency of the optimization, 97.9% -> 81.8%.
182 1.6 msaitoh */
183 1.8 msaitoh #define MPKTHSIZE (offsetof(struct _mbuf_dummy, m_pktdat))
184 1.8 msaitoh #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
185 1.8 msaitoh #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
186 1.8 msaitoh #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
187 1.6 msaitoh
188 1.1 dyoung /* Keep older OS drivers building... */
189 1.1 dyoung #if !defined(SYSCTL_ADD_UQUAD)
190 1.1 dyoung #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
191 1.1 dyoung #endif
192 1.1 dyoung
193 1.1 dyoung /* Defines for printing debug information */
194 1.1 dyoung #define DEBUG_INIT 0
195 1.1 dyoung #define DEBUG_IOCTL 0
196 1.1 dyoung #define DEBUG_HW 0
197 1.1 dyoung
198 1.1 dyoung #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
199 1.1 dyoung #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
200 1.1 dyoung #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
201 1.1 dyoung #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
202 1.1 dyoung #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
203 1.1 dyoung #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
204 1.1 dyoung #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
205 1.1 dyoung #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
206 1.1 dyoung #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
207 1.1 dyoung
208 1.1 dyoung #define MAX_NUM_MULTICAST_ADDRESSES 128
209 1.1 dyoung #define IXGBE_82598_SCATTER 100
210 1.1 dyoung #define IXGBE_82599_SCATTER 32
211 1.1 dyoung #define MSIX_82598_BAR 3
212 1.1 dyoung #define MSIX_82599_BAR 4
213 1.5 msaitoh #define IXGBE_TSO_SIZE 262140
214 1.1 dyoung #define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
215 1.1 dyoung #define IXGBE_RX_HDR 128
216 1.1 dyoung #define IXGBE_VFTA_SIZE 128
217 1.1 dyoung #define IXGBE_BR_SIZE 4096
218 1.4 msaitoh #define IXGBE_QUEUE_MIN_FREE 32
219 1.1 dyoung
220 1.7 msaitoh /* IOCTL define to gather SFP+ Diagnostic data */
221 1.7 msaitoh #define SIOCGI2C SIOCGIFGENERIC
222 1.7 msaitoh
223 1.1 dyoung /* Offload bits in mbuf flag */
224 1.1 dyoung #define M_CSUM_OFFLOAD \
225 1.1 dyoung (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6)
226 1.1 dyoung
227 1.1 dyoung /*
228 1.1 dyoung * Interrupt Moderation parameters
229 1.1 dyoung */
230 1.1 dyoung #define IXGBE_LOW_LATENCY 128
231 1.1 dyoung #define IXGBE_AVE_LATENCY 400
232 1.1 dyoung #define IXGBE_BULK_LATENCY 1200
233 1.1 dyoung #define IXGBE_LINK_ITR 2000
234 1.1 dyoung
235 1.8 msaitoh
236 1.1 dyoung /*
237 1.1 dyoung *****************************************************************************
238 1.1 dyoung * vendor_info_array
239 1.1 dyoung *
240 1.1 dyoung * This array contains the list of Subvendor/Subdevice IDs on which the driver
241 1.1 dyoung * should load.
242 1.1 dyoung *
243 1.1 dyoung *****************************************************************************
244 1.1 dyoung */
245 1.1 dyoung typedef struct _ixgbe_vendor_info_t {
246 1.1 dyoung unsigned int vendor_id;
247 1.1 dyoung unsigned int device_id;
248 1.1 dyoung unsigned int subvendor_id;
249 1.1 dyoung unsigned int subdevice_id;
250 1.1 dyoung unsigned int index;
251 1.1 dyoung } ixgbe_vendor_info_t;
252 1.1 dyoung
253 1.7 msaitoh /* This is used to get SFP+ module data */
254 1.7 msaitoh struct ixgbe_i2c_req {
255 1.7 msaitoh u8 dev_addr;
256 1.7 msaitoh u8 offset;
257 1.7 msaitoh u8 len;
258 1.7 msaitoh u8 data[8];
259 1.7 msaitoh };
260 1.1 dyoung
261 1.1 dyoung struct ixgbe_tx_buf {
262 1.7 msaitoh union ixgbe_adv_tx_desc *eop;
263 1.1 dyoung struct mbuf *m_head;
264 1.1 dyoung bus_dmamap_t map;
265 1.1 dyoung };
266 1.1 dyoung
267 1.1 dyoung struct ixgbe_rx_buf {
268 1.6 msaitoh struct mbuf *buf;
269 1.1 dyoung struct mbuf *fmp;
270 1.7 msaitoh bus_dmamap_t pmap;
271 1.6 msaitoh u_int flags;
272 1.6 msaitoh #define IXGBE_RX_COPY 0x01
273 1.6 msaitoh uint64_t addr;
274 1.1 dyoung };
275 1.1 dyoung
276 1.1 dyoung /*
277 1.1 dyoung * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
278 1.1 dyoung */
279 1.1 dyoung struct ixgbe_dma_alloc {
280 1.1 dyoung bus_addr_t dma_paddr;
281 1.1 dyoung void *dma_vaddr;
282 1.1 dyoung ixgbe_dma_tag_t *dma_tag;
283 1.1 dyoung bus_dmamap_t dma_map;
284 1.1 dyoung bus_dma_segment_t dma_seg;
285 1.1 dyoung bus_size_t dma_size;
286 1.1 dyoung };
287 1.1 dyoung
288 1.1 dyoung /*
289 1.1 dyoung ** Driver queue struct: this is the interrupt container
290 1.1 dyoung ** for the associated tx and rx ring.
291 1.1 dyoung */
292 1.1 dyoung struct ix_queue {
293 1.1 dyoung struct adapter *adapter;
294 1.1 dyoung u32 msix; /* This queue's MSIX vector */
295 1.1 dyoung u32 eims; /* This queue's EIMS bit */
296 1.1 dyoung u32 eitr_setting;
297 1.1 dyoung struct resource *res;
298 1.1 dyoung void *tag;
299 1.1 dyoung struct tx_ring *txr;
300 1.1 dyoung struct rx_ring *rxr;
301 1.1 dyoung void *que_si;
302 1.1 dyoung u64 irqs;
303 1.1 dyoung char namebuf[32];
304 1.1 dyoung char evnamebuf[32];
305 1.1 dyoung };
306 1.1 dyoung
307 1.1 dyoung /*
308 1.1 dyoung * The transmit ring, one per queue
309 1.1 dyoung */
310 1.1 dyoung struct tx_ring {
311 1.1 dyoung struct adapter *adapter;
312 1.1 dyoung kmutex_t tx_mtx;
313 1.1 dyoung u32 me;
314 1.7 msaitoh struct timeval watchdog_time;
315 1.7 msaitoh union ixgbe_adv_tx_desc *tx_base;
316 1.7 msaitoh struct ixgbe_tx_buf *tx_buffers;
317 1.7 msaitoh struct ixgbe_dma_alloc txdma;
318 1.7 msaitoh volatile u16 tx_avail;
319 1.7 msaitoh u16 next_avail_desc;
320 1.7 msaitoh u16 next_to_clean;
321 1.7 msaitoh u32 process_limit;
322 1.7 msaitoh u16 num_desc;
323 1.6 msaitoh enum {
324 1.6 msaitoh IXGBE_QUEUE_IDLE,
325 1.6 msaitoh IXGBE_QUEUE_WORKING,
326 1.6 msaitoh IXGBE_QUEUE_HUNG,
327 1.6 msaitoh } queue_status;
328 1.1 dyoung u32 txd_cmd;
329 1.1 dyoung ixgbe_dma_tag_t *txtag;
330 1.1 dyoung char mtx_name[16];
331 1.7 msaitoh #ifndef IXGBE_LEGACY_TX
332 1.1 dyoung struct buf_ring *br;
333 1.7 msaitoh void *txq_si;
334 1.1 dyoung #endif
335 1.1 dyoung #ifdef IXGBE_FDIR
336 1.1 dyoung u16 atr_sample;
337 1.1 dyoung u16 atr_count;
338 1.1 dyoung #endif
339 1.1 dyoung u32 bytes; /* used for AIM */
340 1.1 dyoung u32 packets;
341 1.1 dyoung /* Soft Stats */
342 1.7 msaitoh struct evcnt tso_tx;
343 1.7 msaitoh struct evcnt no_tx_map_avail;
344 1.1 dyoung struct evcnt no_desc_avail;
345 1.1 dyoung struct evcnt total_packets;
346 1.1 dyoung };
347 1.1 dyoung
348 1.1 dyoung
349 1.1 dyoung /*
350 1.1 dyoung * The Receive ring, one per rx queue
351 1.1 dyoung */
352 1.1 dyoung struct rx_ring {
353 1.1 dyoung struct adapter *adapter;
354 1.1 dyoung kmutex_t rx_mtx;
355 1.1 dyoung u32 me;
356 1.1 dyoung union ixgbe_adv_rx_desc *rx_base;
357 1.1 dyoung struct ixgbe_dma_alloc rxdma;
358 1.1 dyoung #ifdef LRO
359 1.1 dyoung struct lro_ctrl lro;
360 1.1 dyoung #endif /* LRO */
361 1.1 dyoung bool lro_enabled;
362 1.1 dyoung bool hw_rsc;
363 1.4 msaitoh bool vtag_strip;
364 1.7 msaitoh u16 next_to_refresh;
365 1.7 msaitoh u16 next_to_check;
366 1.7 msaitoh u16 num_desc;
367 1.7 msaitoh u16 mbuf_sz;
368 1.7 msaitoh u32 process_limit;
369 1.1 dyoung char mtx_name[16];
370 1.1 dyoung struct ixgbe_rx_buf *rx_buffers;
371 1.7 msaitoh ixgbe_dma_tag_t *ptag;
372 1.1 dyoung
373 1.1 dyoung u32 bytes; /* Used for AIM calc */
374 1.1 dyoung u32 packets;
375 1.1 dyoung
376 1.1 dyoung /* Soft stats */
377 1.1 dyoung struct evcnt rx_irq;
378 1.6 msaitoh struct evcnt rx_copies;
379 1.1 dyoung struct evcnt rx_packets;
380 1.1 dyoung struct evcnt rx_bytes;
381 1.1 dyoung struct evcnt rx_discarded;
382 1.1 dyoung struct evcnt no_jmbuf;
383 1.1 dyoung u64 rsc_num;
384 1.1 dyoung #ifdef IXGBE_FDIR
385 1.1 dyoung u64 flm;
386 1.1 dyoung #endif
387 1.1 dyoung };
388 1.1 dyoung
389 1.1 dyoung /* Our adapter structure */
390 1.1 dyoung struct adapter {
391 1.1 dyoung struct ifnet *ifp;
392 1.1 dyoung struct ixgbe_hw hw;
393 1.1 dyoung
394 1.1 dyoung struct ixgbe_osdep osdep;
395 1.1 dyoung device_t dev;
396 1.1 dyoung
397 1.1 dyoung struct resource *pci_mem;
398 1.1 dyoung struct resource *msix_mem;
399 1.1 dyoung
400 1.1 dyoung /*
401 1.1 dyoung * Interrupt resources: this set is
402 1.1 dyoung * either used for legacy, or for Link
403 1.1 dyoung * when doing MSIX
404 1.1 dyoung */
405 1.1 dyoung void *tag;
406 1.1 dyoung struct resource *res;
407 1.1 dyoung
408 1.1 dyoung struct ifmedia media;
409 1.1 dyoung callout_t timer;
410 1.1 dyoung int msix;
411 1.1 dyoung int if_flags;
412 1.1 dyoung
413 1.1 dyoung kmutex_t core_mtx;
414 1.1 dyoung
415 1.1 dyoung unsigned int num_queues;
416 1.1 dyoung
417 1.1 dyoung /*
418 1.1 dyoung ** Shadow VFTA table, this is needed because
419 1.1 dyoung ** the real vlan filter table gets cleared during
420 1.1 dyoung ** a soft reset and the driver needs to be able
421 1.1 dyoung ** to repopulate it.
422 1.1 dyoung */
423 1.1 dyoung u32 shadow_vfta[IXGBE_VFTA_SIZE];
424 1.1 dyoung
425 1.1 dyoung /* Info about the interface */
426 1.1 dyoung u32 optics;
427 1.4 msaitoh u32 fc; /* local flow ctrl setting */
428 1.1 dyoung int advertise; /* link speeds */
429 1.1 dyoung bool link_active;
430 1.1 dyoung u16 max_frame_size;
431 1.1 dyoung u16 num_segs;
432 1.1 dyoung u32 link_speed;
433 1.1 dyoung bool link_up;
434 1.1 dyoung u32 linkvec;
435 1.1 dyoung
436 1.1 dyoung /* Mbuf cluster size */
437 1.1 dyoung u32 rx_mbuf_sz;
438 1.1 dyoung
439 1.1 dyoung /* Support for pluggable optics */
440 1.1 dyoung bool sfp_probe;
441 1.1 dyoung void *link_si; /* Link tasklet */
442 1.1 dyoung void *mod_si; /* SFP tasklet */
443 1.1 dyoung void *msf_si; /* Multispeed Fiber */
444 1.1 dyoung #ifdef IXGBE_FDIR
445 1.1 dyoung int fdir_reinit;
446 1.1 dyoung void *fdir_si;
447 1.1 dyoung #endif
448 1.1 dyoung
449 1.1 dyoung /*
450 1.1 dyoung ** Queues:
451 1.1 dyoung ** This is the irq holder, it has
452 1.1 dyoung ** and RX/TX pair or rings associated
453 1.1 dyoung ** with it.
454 1.1 dyoung */
455 1.1 dyoung struct ix_queue *queues;
456 1.1 dyoung
457 1.1 dyoung /*
458 1.1 dyoung * Transmit rings:
459 1.1 dyoung * Allocated at run time, an array of rings.
460 1.1 dyoung */
461 1.1 dyoung struct tx_ring *tx_rings;
462 1.7 msaitoh u32 num_tx_desc;
463 1.1 dyoung
464 1.1 dyoung /*
465 1.1 dyoung * Receive rings:
466 1.1 dyoung * Allocated at run time, an array of rings.
467 1.1 dyoung */
468 1.1 dyoung struct rx_ring *rx_rings;
469 1.1 dyoung u64 que_mask;
470 1.7 msaitoh u32 num_rx_desc;
471 1.1 dyoung
472 1.1 dyoung /* Multicast array memory */
473 1.1 dyoung u8 *mta;
474 1.1 dyoung
475 1.8 msaitoh
476 1.1 dyoung /* Misc stats maintained by the driver */
477 1.1 dyoung struct evcnt dropped_pkts;
478 1.1 dyoung struct evcnt mbuf_defrag_failed;
479 1.1 dyoung struct evcnt mbuf_header_failed;
480 1.1 dyoung struct evcnt mbuf_packet_failed;
481 1.1 dyoung struct evcnt efbig_tx_dma_setup;
482 1.1 dyoung struct evcnt efbig2_tx_dma_setup;
483 1.1 dyoung struct evcnt m_defrag_failed;
484 1.1 dyoung struct evcnt einval_tx_dma_setup;
485 1.1 dyoung struct evcnt other_tx_dma_setup;
486 1.1 dyoung struct evcnt eagain_tx_dma_setup;
487 1.1 dyoung struct evcnt enomem_tx_dma_setup;
488 1.1 dyoung struct evcnt watchdog_events;
489 1.1 dyoung struct evcnt tso_err;
490 1.1 dyoung struct evcnt link_irq;
491 1.1 dyoung struct evcnt morerx;
492 1.1 dyoung struct evcnt moretx;
493 1.1 dyoung struct evcnt txloops;
494 1.1 dyoung struct evcnt handleq;
495 1.1 dyoung struct evcnt req;
496 1.1 dyoung
497 1.1 dyoung struct ixgbe_hw_stats stats;
498 1.1 dyoung struct sysctllog *sysctllog;
499 1.1 dyoung ixgbe_extmem_head_t jcl_head;
500 1.1 dyoung };
501 1.1 dyoung
502 1.8 msaitoh
503 1.1 dyoung /* Precision Time Sync (IEEE 1588) defines */
504 1.1 dyoung #define ETHERTYPE_IEEE1588 0x88F7
505 1.1 dyoung #define PICOSECS_PER_TICK 20833
506 1.1 dyoung #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
507 1.1 dyoung #define IXGBE_ADVTXD_TSTAMP 0x00080000
508 1.1 dyoung
509 1.1 dyoung
510 1.1 dyoung #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
511 1.2 msaitoh mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
512 1.1 dyoung #define IXGBE_CORE_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->core_mtx)
513 1.1 dyoung #define IXGBE_TX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->tx_mtx)
514 1.1 dyoung #define IXGBE_RX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->rx_mtx)
515 1.1 dyoung #define IXGBE_CORE_LOCK(_sc) mutex_enter(&(_sc)->core_mtx)
516 1.1 dyoung #define IXGBE_TX_LOCK(_sc) mutex_enter(&(_sc)->tx_mtx)
517 1.1 dyoung #define IXGBE_TX_TRYLOCK(_sc) mutex_tryenter(&(_sc)->tx_mtx)
518 1.1 dyoung #define IXGBE_RX_LOCK(_sc) mutex_enter(&(_sc)->rx_mtx)
519 1.1 dyoung #define IXGBE_CORE_UNLOCK(_sc) mutex_exit(&(_sc)->core_mtx)
520 1.1 dyoung #define IXGBE_TX_UNLOCK(_sc) mutex_exit(&(_sc)->tx_mtx)
521 1.1 dyoung #define IXGBE_RX_UNLOCK(_sc) mutex_exit(&(_sc)->rx_mtx)
522 1.3 msaitoh #define IXGBE_CORE_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->core_mtx))
523 1.1 dyoung #define IXGBE_TX_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->tx_mtx))
524 1.1 dyoung
525 1.1 dyoung static inline bool
526 1.1 dyoung ixgbe_is_sfp(struct ixgbe_hw *hw)
527 1.1 dyoung {
528 1.1 dyoung switch (hw->phy.type) {
529 1.1 dyoung case ixgbe_phy_sfp_avago:
530 1.1 dyoung case ixgbe_phy_sfp_ftl:
531 1.1 dyoung case ixgbe_phy_sfp_intel:
532 1.1 dyoung case ixgbe_phy_sfp_unknown:
533 1.1 dyoung case ixgbe_phy_sfp_passive_tyco:
534 1.1 dyoung case ixgbe_phy_sfp_passive_unknown:
535 1.1 dyoung return TRUE;
536 1.1 dyoung default:
537 1.1 dyoung return FALSE;
538 1.1 dyoung }
539 1.1 dyoung }
540 1.1 dyoung
541 1.1 dyoung /* Workaround to make 8.0 buildable */
542 1.1 dyoung #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
543 1.1 dyoung static __inline int
544 1.1 dyoung drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
545 1.1 dyoung {
546 1.1 dyoung #ifdef ALTQ
547 1.1 dyoung if (ALTQ_IS_ENABLED(&ifp->if_snd))
548 1.1 dyoung return (1);
549 1.1 dyoung #endif
550 1.1 dyoung return (!buf_ring_empty(br));
551 1.1 dyoung }
552 1.1 dyoung #endif
553 1.1 dyoung
554 1.1 dyoung /*
555 1.1 dyoung ** Find the number of unrefreshed RX descriptors
556 1.1 dyoung */
557 1.1 dyoung static inline u16
558 1.1 dyoung ixgbe_rx_unrefreshed(struct rx_ring *rxr)
559 1.1 dyoung {
560 1.1 dyoung if (rxr->next_to_check > rxr->next_to_refresh)
561 1.1 dyoung return (rxr->next_to_check - rxr->next_to_refresh - 1);
562 1.1 dyoung else
563 1.7 msaitoh return ((rxr->num_desc + rxr->next_to_check) -
564 1.1 dyoung rxr->next_to_refresh - 1);
565 1.1 dyoung }
566 1.1 dyoung
567 1.1 dyoung #endif /* _IXGBE_H_ */
568