Home | History | Annotate | Line # | Download | only in ixgbe
ixgbe.h revision 1.11
      1 /******************************************************************************
      2 
      3   Copyright (c) 2001-2015, Intel Corporation
      4   All rights reserved.
      5 
      6   Redistribution and use in source and binary forms, with or without
      7   modification, are permitted provided that the following conditions are met:
      8 
      9    1. Redistributions of source code must retain the above copyright notice,
     10       this list of conditions and the following disclaimer.
     11 
     12    2. Redistributions in binary form must reproduce the above copyright
     13       notice, this list of conditions and the following disclaimer in the
     14       documentation and/or other materials provided with the distribution.
     15 
     16    3. Neither the name of the Intel Corporation nor the names of its
     17       contributors may be used to endorse or promote products derived from
     18       this software without specific prior written permission.
     19 
     20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30   POSSIBILITY OF SUCH DAMAGE.
     31 
     32 ******************************************************************************/
     33 /*
     34  * Copyright (c) 2011 The NetBSD Foundation, Inc.
     35  * All rights reserved.
     36  *
     37  * This code is derived from software contributed to The NetBSD Foundation
     38  * by Coyote Point Systems, Inc.
     39  *
     40  * Redistribution and use in source and binary forms, with or without
     41  * modification, are permitted provided that the following conditions
     42  * are met:
     43  * 1. Redistributions of source code must retain the above copyright
     44  *    notice, this list of conditions and the following disclaimer.
     45  * 2. Redistributions in binary form must reproduce the above copyright
     46  *    notice, this list of conditions and the following disclaimer in the
     47  *    documentation and/or other materials provided with the distribution.
     48  *
     49  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     50  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     51  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     52  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     53  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     54  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     55  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     56  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     57  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     58  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     59  * POSSIBILITY OF SUCH DAMAGE.
     60  */
     61 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 280182 2015-03-17 18:32:28Z jfv $*/
     62 /*$NetBSD: ixgbe.h,v 1.11 2016/12/01 06:27:18 msaitoh Exp $*/
     63 
     64 
     65 #ifndef _IXGBE_H_
     66 #define _IXGBE_H_
     67 
     68 
     69 #include <sys/param.h>
     70 #include <sys/reboot.h>
     71 #include <sys/systm.h>
     72 #if __FreeBSD_version >= 800000
     73 #include <sys/buf_ring.h>
     74 #endif
     75 #include <sys/mbuf.h>
     76 #include <sys/protosw.h>
     77 #include <sys/socket.h>
     78 #include <sys/malloc.h>
     79 #include <sys/kernel.h>
     80 #include <sys/module.h>
     81 #include <sys/sockio.h>
     82 
     83 #include <net/if.h>
     84 #include <net/if_arp.h>
     85 #include <net/bpf.h>
     86 #include <net/if_ether.h>
     87 #include <net/if_dl.h>
     88 #include <net/if_media.h>
     89 
     90 #include <net/bpf.h>
     91 #include <net/if_types.h>
     92 #include <net/if_vlanvar.h>
     93 
     94 #include <netinet/in_systm.h>
     95 #include <netinet/in.h>
     96 #include <netinet/ip.h>
     97 #include <netinet/ip6.h>
     98 #include <netinet/tcp.h>
     99 #include <netinet/udp.h>
    100 
    101 #include <sys/bus.h>
    102 #include <dev/pci/pcivar.h>
    103 #include <dev/pci/pcireg.h>
    104 #include <sys/proc.h>
    105 #include <sys/sysctl.h>
    106 #include <sys/endian.h>
    107 #include <sys/workqueue.h>
    108 #include <sys/cpu.h>
    109 #include <sys/interrupt.h>
    110 
    111 #include "ixgbe_netbsd.h"
    112 #include "ixgbe_api.h"
    113 #include "ixgbe_vf.h"
    114 
    115 /* Tunables */
    116 
    117 /*
    118  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
    119  * number of transmit descriptors allocated by the driver. Increasing this
    120  * value allows the driver to queue more transmits. Each descriptor is 16
    121  * bytes. Performance tests have show the 2K value to be optimal for top
    122  * performance.
    123  */
    124 #define DEFAULT_TXD	1024
    125 #define PERFORM_TXD	2048
    126 #define MAX_TXD		4096
    127 #define MIN_TXD		64
    128 
    129 /*
    130  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
    131  * number of receive descriptors allocated for each RX queue. Increasing this
    132  * value allows the driver to buffer more incoming packets. Each descriptor
    133  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
    134  *
    135  * Note: with 8 rings and a dual port card, it is possible to bump up
    136  *	against the system mbuf pool limit, you can tune nmbclusters
    137  *	to adjust for this.
    138  */
    139 #define DEFAULT_RXD	1024
    140 #define PERFORM_RXD	2048
    141 #define MAX_RXD		4096
    142 #define MIN_RXD		64
    143 
    144 /* Alignment for rings */
    145 #define DBA_ALIGN	128
    146 
    147 /*
    148  * This parameter controls the maximum no of times the driver will loop in
    149  * the isr. Minimum Value = 1
    150  */
    151 #define MAX_LOOP	10
    152 
    153 /*
    154  * This is the max watchdog interval, ie. the time that can
    155  * pass between any two TX clean operations, such only happening
    156  * when the TX hardware is functioning.
    157  */
    158 #define IXGBE_WATCHDOG                   (10 * hz)
    159 
    160 /*
    161  * This parameters control when the driver calls the routine to reclaim
    162  * transmit descriptors.
    163  */
    164 #define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
    165 #define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
    166 
    167 #define IXGBE_MAX_FRAME_SIZE	0x3F00
    168 
    169 /* Flow control constants */
    170 #define IXGBE_FC_PAUSE		0xFFFF
    171 #define IXGBE_FC_HI		0x20000
    172 #define IXGBE_FC_LO		0x10000
    173 
    174 /*
    175  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
    176  * small and aligned for the CPU L1 cache.
    177  *
    178  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
    179  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
    180  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
    181  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
    182  * in observed efficiency of the optimization, 97.9% -> 81.8%.
    183  */
    184 #define	MPKTHSIZE		(offsetof(struct _mbuf_dummy, m_pktdat))
    185 #define IXGBE_RX_COPY_HDR_PADDED	((((MPKTHSIZE - 1) / 32) + 1) * 32)
    186 #define IXGBE_RX_COPY_LEN		(MSIZE - IXGBE_RX_COPY_HDR_PADDED)
    187 #define IXGBE_RX_COPY_ALIGN		(IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
    188 
    189 /* Keep older OS drivers building... */
    190 #if !defined(SYSCTL_ADD_UQUAD)
    191 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
    192 #endif
    193 
    194 /* Defines for printing debug information */
    195 #define DEBUG_INIT  0
    196 #define DEBUG_IOCTL 0
    197 #define DEBUG_HW    0
    198 
    199 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
    200 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
    201 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
    202 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
    203 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
    204 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
    205 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
    206 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
    207 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
    208 
    209 #define MAX_NUM_MULTICAST_ADDRESSES     128
    210 #define IXGBE_82598_SCATTER		100
    211 #define IXGBE_82599_SCATTER		32
    212 #define MSIX_82598_BAR			3
    213 #define MSIX_82599_BAR			4
    214 #define IXGBE_TSO_SIZE			262140
    215 #define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
    216 #define IXGBE_RX_HDR			128
    217 #define IXGBE_VFTA_SIZE			128
    218 #define IXGBE_BR_SIZE			4096
    219 #define IXGBE_QUEUE_MIN_FREE		32
    220 #define IXGBE_MAX_TX_BUSY		10
    221 #define IXGBE_QUEUE_HUNG		0x80000000
    222 
    223 #define IXV_EITR_DEFAULT		128
    224 
    225 #define IXV_EITR_DEFAULT		128
    226 
    227 /* IOCTL define to gather SFP+ Diagnostic data */
    228 #define SIOCGI2C	SIOCGIFGENERIC
    229 
    230 /* Offload bits in mbuf flag */
    231 #define	M_CSUM_OFFLOAD	\
    232     (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6)
    233 
    234 /* Backward compatibility items for very old versions */
    235 #ifndef pci_find_cap
    236 #define pci_find_cap pci_find_extcap
    237 #endif
    238 
    239 #ifndef DEVMETHOD_END
    240 #define DEVMETHOD_END { NULL, NULL }
    241 #endif
    242 
    243 /*
    244  * Interrupt Moderation parameters
    245  */
    246 #define IXGBE_LOW_LATENCY	128
    247 #define IXGBE_AVE_LATENCY	400
    248 #define IXGBE_BULK_LATENCY	1200
    249 #define IXGBE_LINK_ITR		2000
    250 
    251 /*
    252  *****************************************************************************
    253  * vendor_info_array
    254  *
    255  * This array contains the list of Subvendor/Subdevice IDs on which the driver
    256  * should load.
    257  *
    258  *****************************************************************************
    259  */
    260 typedef struct _ixgbe_vendor_info_t {
    261 	unsigned int    vendor_id;
    262 	unsigned int    device_id;
    263 	unsigned int    subvendor_id;
    264 	unsigned int    subdevice_id;
    265 	unsigned int    index;
    266 } ixgbe_vendor_info_t;
    267 
    268 /* This is used to get SFP+ module data */
    269 struct ixgbe_i2c_req {
    270         u8 dev_addr;
    271         u8 offset;
    272         u8 len;
    273         u8 data[8];
    274 };
    275 
    276 struct ixgbe_tx_buf {
    277 	union ixgbe_adv_tx_desc	*eop;
    278 	struct mbuf	*m_head;
    279 	bus_dmamap_t	map;
    280 };
    281 
    282 struct ixgbe_rx_buf {
    283 	struct mbuf	*buf;
    284 	struct mbuf	*fmp;
    285 	bus_dmamap_t	pmap;
    286 	u_int		flags;
    287 #define IXGBE_RX_COPY	0x01
    288 	uint64_t	addr;
    289 };
    290 
    291 /*
    292  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
    293  */
    294 struct ixgbe_dma_alloc {
    295 	bus_addr_t		dma_paddr;
    296 	void			*dma_vaddr;
    297 	ixgbe_dma_tag_t		*dma_tag;
    298 	bus_dmamap_t		dma_map;
    299 	bus_dma_segment_t	dma_seg;
    300 	bus_size_t		dma_size;
    301 };
    302 
    303 /*
    304 ** Driver queue struct: this is the interrupt container
    305 **  for the associated tx and rx ring.
    306 */
    307 struct ix_queue {
    308 	struct adapter		*adapter;
    309 	u32			msix;           /* This queue's MSIX vector */
    310 	u32			eims;           /* This queue's EIMS bit */
    311 	u32			eitr_setting;
    312 	u32			me;
    313 	struct resource		*res;
    314 	void			*tag;
    315 	int			busy;
    316 	struct tx_ring		*txr;
    317 	struct rx_ring		*rxr;
    318 	void			*que_si;
    319 	struct evcnt		irqs;
    320 	char			namebuf[32];
    321 	char			evnamebuf[32];
    322 };
    323 
    324 /*
    325  * The transmit ring, one per queue
    326  */
    327 struct tx_ring {
    328         struct adapter		*adapter;
    329 	kmutex_t		tx_mtx;
    330 	u32			me;
    331 	u32			tail;
    332 	int			busy;
    333 	union ixgbe_adv_tx_desc	*tx_base;
    334 	struct ixgbe_tx_buf	*tx_buffers;
    335 	struct ixgbe_dma_alloc	txdma;
    336 	volatile u16		tx_avail;
    337 	u16			next_avail_desc;
    338 	u16			next_to_clean;
    339 	u32			process_limit;
    340 	u16			num_desc;
    341 	u32			txd_cmd;
    342 	ixgbe_dma_tag_t		*txtag;
    343 	char			mtx_name[16];
    344 #ifndef IXGBE_LEGACY_TX
    345 	struct buf_ring		*br;
    346 	void			*txq_si;
    347 #endif
    348 #ifdef IXGBE_FDIR
    349 	u16			atr_sample;
    350 	u16			atr_count;
    351 #endif
    352 	u32			bytes;  /* used for AIM */
    353 	u32			packets;
    354 	/* Soft Stats */
    355 	struct evcnt	   	tx_bytes;
    356 	struct evcnt	   	tso_tx;
    357 	struct evcnt	   	no_tx_map_avail;
    358 	struct evcnt		no_desc_avail;
    359 	struct evcnt		total_packets;
    360 };
    361 
    362 
    363 /*
    364  * The Receive ring, one per rx queue
    365  */
    366 struct rx_ring {
    367         struct adapter		*adapter;
    368 	kmutex_t		rx_mtx;
    369 	u32			me;
    370 	u32			tail;
    371 	union ixgbe_adv_rx_desc	*rx_base;
    372 	struct ixgbe_dma_alloc	rxdma;
    373 #ifdef LRO
    374 	struct lro_ctrl		lro;
    375 #endif /* LRO */
    376 	bool			lro_enabled;
    377 	bool			hw_rsc;
    378 	bool			vtag_strip;
    379         u16			next_to_refresh;
    380         u16 			next_to_check;
    381 	u16			num_desc;
    382 	u16			mbuf_sz;
    383 	u32			process_limit;
    384 	char			mtx_name[16];
    385 	struct ixgbe_rx_buf	*rx_buffers;
    386 	ixgbe_dma_tag_t		*ptag;
    387 
    388 	u32			bytes; /* Used for AIM calc */
    389 	u32			packets;
    390 
    391 	/* Soft stats */
    392 	struct evcnt		rx_irq;
    393 	struct evcnt		rx_copies;
    394 	struct evcnt		rx_packets;
    395 	struct evcnt 		rx_bytes;
    396 	struct evcnt 		rx_discarded;
    397 	struct evcnt 		no_jmbuf;
    398 	u64 			rsc_num;
    399 #ifdef IXGBE_FDIR
    400 	u64			flm;
    401 #endif
    402 };
    403 
    404 /* Our adapter structure */
    405 struct adapter {
    406 	struct ifnet		*ifp;
    407 	struct ixgbe_hw		hw;
    408 
    409 	struct ixgbe_osdep	osdep;
    410 	device_t		dev;
    411 
    412 	struct resource		*pci_mem;
    413 	struct resource		*msix_mem;
    414 
    415 	/*
    416 	 * Interrupt resources: this set is
    417 	 * either used for legacy, or for Link
    418 	 * when doing MSIX
    419 	 */
    420 	void			*tag;
    421 	struct resource 	*res;
    422 
    423 	struct ifmedia		media;
    424 	callout_t		timer;
    425 	int			msix;
    426 	int			if_flags;
    427 
    428 	kmutex_t		core_mtx;
    429 
    430 	unsigned int		num_queues;
    431 
    432 	/*
    433 	** Shadow VFTA table, this is needed because
    434 	** the real vlan filter table gets cleared during
    435 	** a soft reset and the driver needs to be able
    436 	** to repopulate it.
    437 	*/
    438 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
    439 
    440 	/* Info about the interface */
    441 	u32			optics;
    442 	u32			fc; /* local flow ctrl setting */
    443 	int			advertise;  /* link speeds */
    444 	bool			link_active;
    445 	u16			max_frame_size;
    446 	u16			num_segs;
    447 	u32			link_speed;
    448 	bool			link_up;
    449 	u32 			vector;
    450 
    451 	/* Mbuf cluster size */
    452 	u32			rx_mbuf_sz;
    453 
    454 	/* Support for pluggable optics */
    455 	bool			sfp_probe;
    456 	void			*link_si;  /* Link tasklet */
    457 	void			*mod_si;   /* SFP tasklet */
    458 	void			*msf_si;   /* Multispeed Fiber */
    459 #ifdef IXGBE_FDIR
    460 	int			fdir_reinit;
    461 	void			*fdir_si;
    462 #endif
    463 
    464 	/*
    465 	** Queues:
    466 	**   This is the irq holder, it has
    467 	**   and RX/TX pair or rings associated
    468 	**   with it.
    469 	*/
    470 	struct ix_queue		*queues;
    471 
    472 	/*
    473 	 * Transmit rings:
    474 	 *	Allocated at run time, an array of rings.
    475 	 */
    476 	struct tx_ring		*tx_rings;
    477 	u32			num_tx_desc;
    478 
    479 	/*
    480 	 * Receive rings:
    481 	 *	Allocated at run time, an array of rings.
    482 	 */
    483 	struct rx_ring		*rx_rings;
    484 	u64			active_queues;
    485 	u32			num_rx_desc;
    486 
    487 	/* Multicast array memory */
    488 	u8			*mta;
    489 
    490 
    491 	/* Misc stats maintained by the driver */
    492 	struct evcnt   		dropped_pkts;
    493 	struct evcnt   		mbuf_defrag_failed;
    494 	struct evcnt	   	mbuf_header_failed;
    495 	struct evcnt	   	mbuf_packet_failed;
    496 	struct evcnt	   	efbig_tx_dma_setup;
    497 	struct evcnt	   	efbig2_tx_dma_setup;
    498 	struct evcnt	   	m_defrag_failed;
    499 	struct evcnt	   	einval_tx_dma_setup;
    500 	struct evcnt	   	other_tx_dma_setup;
    501 	struct evcnt	   	eagain_tx_dma_setup;
    502 	struct evcnt	   	enomem_tx_dma_setup;
    503 	struct evcnt	   	watchdog_events;
    504 	struct evcnt	   	tso_err;
    505 	struct evcnt		vector_irq;
    506 	struct evcnt		morerx;
    507 	struct evcnt		moretx;
    508 	struct evcnt		txloops;
    509 	struct evcnt		handleq;
    510 	struct evcnt		req;
    511 
    512 	union {
    513 		struct ixgbe_hw_stats pf;
    514 		struct ixgbevf_hw_stats	vf;
    515 	} stats;
    516 #if __FreeBSD_version >= 1100036
    517 	/* counter(9) stats */
    518 	u64			ipackets;
    519 	u64			ierrors;
    520 	u64			opackets;
    521 	u64			oerrors;
    522 	u64			ibytes;
    523 	u64			obytes;
    524 	u64			imcasts;
    525 	u64			omcasts;
    526 	u64			iqdrops;
    527 	u64			noproto;
    528 #endif
    529 	struct sysctllog	*sysctllog;
    530 	ixgbe_extmem_head_t jcl_head;
    531 };
    532 
    533 
    534 /* Precision Time Sync (IEEE 1588) defines */
    535 #define ETHERTYPE_IEEE1588      0x88F7
    536 #define PICOSECS_PER_TICK       20833
    537 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
    538 #define IXGBE_ADVTXD_TSTAMP	0x00080000
    539 
    540 
    541 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
    542         mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
    543 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mutex_destroy(&(_sc)->core_mtx)
    544 #define IXGBE_TX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->tx_mtx)
    545 #define IXGBE_RX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->rx_mtx)
    546 #define IXGBE_CORE_LOCK(_sc)              mutex_enter(&(_sc)->core_mtx)
    547 #define IXGBE_TX_LOCK(_sc)                mutex_enter(&(_sc)->tx_mtx)
    548 #define IXGBE_TX_TRYLOCK(_sc)             mutex_tryenter(&(_sc)->tx_mtx)
    549 #define IXGBE_RX_LOCK(_sc)                mutex_enter(&(_sc)->rx_mtx)
    550 #define IXGBE_CORE_UNLOCK(_sc)            mutex_exit(&(_sc)->core_mtx)
    551 #define IXGBE_TX_UNLOCK(_sc)              mutex_exit(&(_sc)->tx_mtx)
    552 #define IXGBE_RX_UNLOCK(_sc)              mutex_exit(&(_sc)->rx_mtx)
    553 #define IXGBE_CORE_LOCK_ASSERT(_sc)       KASSERT(mutex_owned(&(_sc)->core_mtx))
    554 #define IXGBE_TX_LOCK_ASSERT(_sc)         KASSERT(mutex_owned(&(_sc)->tx_mtx))
    555 
    556 /* Stats macros */
    557 #if __FreeBSD_version >= 1100036
    558 #define IXGBE_SET_IPACKETS(sc, count)    (sc)->ipackets = (count)
    559 #define IXGBE_SET_IERRORS(sc, count)     (sc)->ierrors = (count)
    560 #define IXGBE_SET_OPACKETS(sc, count)    (sc)->opackets = (count)
    561 #define IXGBE_SET_OERRORS(sc, count)     (sc)->oerrors = (count)
    562 #define IXGBE_SET_COLLISIONS(sc, count)
    563 #define IXGBE_SET_IBYTES(sc, count)      (sc)->ibytes = (count)
    564 #define IXGBE_SET_OBYTES(sc, count)      (sc)->obytes = (count)
    565 #define IXGBE_SET_IMCASTS(sc, count)     (sc)->imcasts = (count)
    566 #define IXGBE_SET_OMCASTS(sc, count)     (sc)->omcasts = (count)
    567 #define IXGBE_SET_IQDROPS(sc, count)     (sc)->iqdrops = (count)
    568 #else
    569 #define IXGBE_SET_IPACKETS(sc, count)    (sc)->ifp->if_ipackets = (count)
    570 #define IXGBE_SET_IERRORS(sc, count)     (sc)->ifp->if_ierrors = (count)
    571 #define IXGBE_SET_OPACKETS(sc, count)    (sc)->ifp->if_opackets = (count)
    572 #define IXGBE_SET_OERRORS(sc, count)     (sc)->ifp->if_oerrors = (count)
    573 #define IXGBE_SET_COLLISIONS(sc, count)  (sc)->ifp->if_collisions = (count)
    574 #define IXGBE_SET_IBYTES(sc, count)      (sc)->ifp->if_ibytes = (count)
    575 #define IXGBE_SET_OBYTES(sc, count)      (sc)->ifp->if_obytes = (count)
    576 #define IXGBE_SET_IMCASTS(sc, count)     (sc)->ifp->if_imcasts = (count)
    577 #define IXGBE_SET_OMCASTS(sc, count)     (sc)->ifp->if_omcasts = (count)
    578 #define IXGBE_SET_IQDROPS(sc, count)     (sc)->ifp->if_iqdrops = (count)
    579 #endif
    580 
    581 /* Sysctl help messages; displayed with sysctl -d */
    582 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
    583 	"\nControl advertised link speed using these flags:\n" \
    584 	"\t0x1 - advertise 100M\n" \
    585 	"\t0x2 - advertise 1G\n" \
    586 	"\t0x4 - advertise 10G"
    587 
    588 #define IXGBE_SYSCTL_DESC_SET_FC \
    589 	"\nSet flow control mode using these values:\n" \
    590 	"\t0 - off\n" \
    591 	"\t1 - rx pause\n" \
    592 	"\t2 - tx pause\n" \
    593 	"\t3 - tx and rx pause"
    594 
    595 static inline bool
    596 ixgbe_is_sfp(struct ixgbe_hw *hw)
    597 {
    598 	switch (hw->phy.type) {
    599 	case ixgbe_phy_sfp_avago:
    600 	case ixgbe_phy_sfp_ftl:
    601 	case ixgbe_phy_sfp_intel:
    602 	case ixgbe_phy_sfp_unknown:
    603 	case ixgbe_phy_sfp_passive_tyco:
    604 	case ixgbe_phy_sfp_passive_unknown:
    605 	case ixgbe_phy_qsfp_passive_unknown:
    606 	case ixgbe_phy_qsfp_active_unknown:
    607 	case ixgbe_phy_qsfp_intel:
    608 	case ixgbe_phy_qsfp_unknown:
    609 		return TRUE;
    610 	default:
    611 		return FALSE;
    612 	}
    613 }
    614 
    615 /* Workaround to make 8.0 buildable */
    616 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
    617 static __inline int
    618 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
    619 {
    620 #ifdef ALTQ
    621         if (ALTQ_IS_ENABLED(&ifp->if_snd))
    622                 return (1);
    623 #endif
    624         return (!buf_ring_empty(br));
    625 }
    626 #endif
    627 
    628 /*
    629 ** Find the number of unrefreshed RX descriptors
    630 */
    631 static inline u16
    632 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
    633 {
    634 	if (rxr->next_to_check > rxr->next_to_refresh)
    635 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
    636 	else
    637 		return ((rxr->num_desc + rxr->next_to_check) -
    638 		    rxr->next_to_refresh - 1);
    639 }
    640 
    641 /*
    642 ** This checks for a zero mac addr, something that will be likely
    643 ** unless the Admin on the Host has created one.
    644 */
    645 static inline bool
    646 ixv_check_ether_addr(u8 *addr)
    647 {
    648 	bool status = TRUE;
    649 
    650 	if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
    651 	    addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
    652 		status = FALSE;
    653 	return (status);
    654 }
    655 
    656 /* Shared Prototypes */
    657 
    658 #ifdef IXGBE_LEGACY_TX
    659 void	ixgbe_start(struct ifnet *);
    660 void	ixgbe_start_locked(struct tx_ring *, struct ifnet *);
    661 #else /* ! IXGBE_LEGACY_TX */
    662 int	ixgbe_mq_start(struct ifnet *, struct mbuf *);
    663 int	ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
    664 void	ixgbe_qflush(struct ifnet *);
    665 void	ixgbe_deferred_mq_start(void *, int);
    666 #endif /* IXGBE_LEGACY_TX */
    667 
    668 int	ixgbe_allocate_queues(struct adapter *);
    669 int	ixgbe_allocate_transmit_buffers(struct tx_ring *);
    670 int	ixgbe_setup_transmit_structures(struct adapter *);
    671 void	ixgbe_free_transmit_structures(struct adapter *);
    672 int	ixgbe_allocate_receive_buffers(struct rx_ring *);
    673 int	ixgbe_setup_receive_structures(struct adapter *);
    674 void	ixgbe_free_receive_structures(struct adapter *);
    675 void	ixgbe_txeof(struct tx_ring *);
    676 bool	ixgbe_rxeof(struct ix_queue *);
    677 
    678 int	ixgbe_dma_malloc(struct adapter *,
    679 	    bus_size_t, struct ixgbe_dma_alloc *, int);
    680 void	ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
    681 #endif /* _IXGBE_H_ */
    682