ixgbe.h revision 1.42
1 /* $NetBSD: ixgbe.h,v 1.42 2018/04/17 05:23:58 knakahara Exp $ */ 2 3 /****************************************************************************** 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Copyright (c) 2001-2017, Intel Corporation 7 All rights reserved. 8 9 Redistribution and use in source and binary forms, with or without 10 modification, are permitted provided that the following conditions are met: 11 12 1. Redistributions of source code must retain the above copyright notice, 13 this list of conditions and the following disclaimer. 14 15 2. Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 19 3. Neither the name of the Intel Corporation nor the names of its 20 contributors may be used to endorse or promote products derived from 21 this software without specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 POSSIBILITY OF SUCH DAMAGE. 34 35 ******************************************************************************/ 36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 327031 2017-12-20 18:15:06Z erj $*/ 37 38 /* 39 * Copyright (c) 2011 The NetBSD Foundation, Inc. 40 * All rights reserved. 41 * 42 * This code is derived from software contributed to The NetBSD Foundation 43 * by Coyote Point Systems, Inc. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 68 #ifndef _IXGBE_H_ 69 #define _IXGBE_H_ 70 71 72 #include <sys/param.h> 73 #include <sys/reboot.h> 74 #include <sys/systm.h> 75 #include <sys/pcq.h> 76 #include <sys/mbuf.h> 77 #include <sys/protosw.h> 78 #include <sys/socket.h> 79 #include <sys/malloc.h> 80 #include <sys/kernel.h> 81 #include <sys/module.h> 82 #include <sys/sockio.h> 83 #include <sys/percpu.h> 84 85 #include <net/if.h> 86 #include <net/if_arp.h> 87 #include <net/bpf.h> 88 #include <net/if_ether.h> 89 #include <net/if_dl.h> 90 #include <net/if_media.h> 91 92 #include <net/bpf.h> 93 #include <net/if_types.h> 94 #include <net/if_vlanvar.h> 95 96 #include <netinet/in_systm.h> 97 #include <netinet/in.h> 98 #include <netinet/ip.h> 99 #include <netinet/ip6.h> 100 #include <netinet/tcp.h> 101 #include <netinet/udp.h> 102 103 #include <sys/bus.h> 104 #include <dev/pci/pcivar.h> 105 #include <dev/pci/pcireg.h> 106 #include <sys/proc.h> 107 #include <sys/sysctl.h> 108 #include <sys/endian.h> 109 #include <sys/workqueue.h> 110 #include <sys/cpu.h> 111 #include <sys/interrupt.h> 112 #include <sys/bitops.h> 113 114 #include "ixgbe_netbsd.h" 115 #include "ixgbe_api.h" 116 #include "ixgbe_common.h" 117 #include "ixgbe_vf.h" 118 #include "ixgbe_features.h" 119 120 /* Tunables */ 121 122 /* 123 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 124 * number of transmit descriptors allocated by the driver. Increasing this 125 * value allows the driver to queue more transmits. Each descriptor is 16 126 * bytes. Performance tests have show the 2K value to be optimal for top 127 * performance. 128 */ 129 #define DEFAULT_TXD 1024 130 #define PERFORM_TXD 2048 131 #define MAX_TXD 4096 132 #define MIN_TXD 64 133 134 /* 135 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 136 * number of receive descriptors allocated for each RX queue. Increasing this 137 * value allows the driver to buffer more incoming packets. Each descriptor 138 * is 16 bytes. A receive buffer is also allocated for each descriptor. 139 * 140 * Note: with 8 rings and a dual port card, it is possible to bump up 141 * against the system mbuf pool limit, you can tune nmbclusters 142 * to adjust for this. 143 */ 144 #define DEFAULT_RXD 1024 145 #define PERFORM_RXD 2048 146 #define MAX_RXD 4096 147 #define MIN_RXD 64 148 149 /* Alignment for rings */ 150 #define DBA_ALIGN 128 151 152 /* 153 * This is the max watchdog interval, ie. the time that can 154 * pass between any two TX clean operations, such only happening 155 * when the TX hardware is functioning. 156 */ 157 #define IXGBE_WATCHDOG (10 * hz) 158 159 /* 160 * This parameters control when the driver calls the routine to reclaim 161 * transmit descriptors. 162 */ 163 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 164 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 165 166 /* These defines are used in MTU calculations */ 167 #define IXGBE_MAX_FRAME_SIZE 9728 168 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 169 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 170 ETHER_VLAN_ENCAP_LEN) 171 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 172 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 173 174 /* Flow control constants */ 175 #define IXGBE_FC_PAUSE 0xFFFF 176 #define IXGBE_FC_HI 0x20000 177 #define IXGBE_FC_LO 0x10000 178 179 /* 180 * Used for optimizing small rx mbufs. Effort is made to keep the copy 181 * small and aligned for the CPU L1 cache. 182 * 183 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 184 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 185 * wasted. Getting 64 byte alignment, which _should_ be ideal for 186 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 187 * in observed efficiency of the optimization, 97.9% -> 81.8%. 188 */ 189 #define MPKTHSIZE (offsetof(struct _mbuf_dummy, m_pktdat)) 190 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 191 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 192 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 193 194 /* Keep older OS drivers building... */ 195 #if !defined(SYSCTL_ADD_UQUAD) 196 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 197 #endif 198 199 /* Defines for printing debug information */ 200 #define DEBUG_INIT 0 201 #define DEBUG_IOCTL 0 202 #define DEBUG_HW 0 203 204 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 205 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 206 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 207 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 208 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 209 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 210 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 211 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 212 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 213 214 #define MAX_NUM_MULTICAST_ADDRESSES 128 215 #define IXGBE_82598_SCATTER 100 216 #define IXGBE_82599_SCATTER 32 217 #define MSIX_82598_BAR 3 218 #define MSIX_82599_BAR 4 219 #define IXGBE_TSO_SIZE 262140 220 #define IXGBE_RX_HDR 128 221 #define IXGBE_VFTA_SIZE 128 222 #define IXGBE_BR_SIZE 4096 223 #define IXGBE_QUEUE_MIN_FREE 32 224 #define IXGBE_MAX_TX_BUSY 10 225 #define IXGBE_QUEUE_HUNG 0x80000000 226 227 #define IXGBE_EITR_DEFAULT 128 228 229 /* IOCTL define to gather SFP+ Diagnostic data */ 230 #define SIOCGI2C SIOCGIFGENERIC 231 232 /* Offload bits in mbuf flag */ 233 #define M_CSUM_OFFLOAD \ 234 (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6) 235 236 /* Backward compatibility items for very old versions */ 237 #ifndef pci_find_cap 238 #define pci_find_cap pci_find_extcap 239 #endif 240 241 #ifndef DEVMETHOD_END 242 #define DEVMETHOD_END { NULL, NULL } 243 #endif 244 245 /* 246 * Interrupt Moderation parameters 247 */ 248 #define IXGBE_LOW_LATENCY 128 249 #define IXGBE_AVE_LATENCY 400 250 #define IXGBE_BULK_LATENCY 1200 251 252 /* Using 1FF (the max value), the interval is ~1.05ms */ 253 #define IXGBE_LINK_ITR_QUANTA 0x1FF 254 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 255 IXGBE_EITR_ITR_INT_MASK) 256 257 258 /************************************************************************ 259 * vendor_info_array 260 * 261 * Contains the list of Subvendor/Subdevice IDs on 262 * which the driver should load. 263 ************************************************************************/ 264 typedef struct _ixgbe_vendor_info_t { 265 unsigned int vendor_id; 266 unsigned int device_id; 267 unsigned int subvendor_id; 268 unsigned int subdevice_id; 269 unsigned int index; 270 } ixgbe_vendor_info_t; 271 272 /* This is used to get SFP+ module data */ 273 struct ixgbe_i2c_req { 274 u8 dev_addr; 275 u8 offset; 276 u8 len; 277 u8 data[8]; 278 }; 279 280 struct ixgbe_bp_data { 281 u32 low; 282 u32 high; 283 u32 log; 284 }; 285 286 struct ixgbe_tx_buf { 287 union ixgbe_adv_tx_desc *eop; 288 struct mbuf *m_head; 289 bus_dmamap_t map; 290 }; 291 292 struct ixgbe_rx_buf { 293 struct mbuf *buf; 294 struct mbuf *fmp; 295 bus_dmamap_t pmap; 296 u_int flags; 297 #define IXGBE_RX_COPY 0x01 298 uint64_t addr; 299 }; 300 301 /* 302 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free 303 */ 304 struct ixgbe_dma_alloc { 305 bus_addr_t dma_paddr; 306 void *dma_vaddr; 307 ixgbe_dma_tag_t *dma_tag; 308 bus_dmamap_t dma_map; 309 bus_dma_segment_t dma_seg; 310 bus_size_t dma_size; 311 }; 312 313 struct ixgbe_mc_addr { 314 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 315 u32 vmdq; 316 }; 317 318 /* 319 * Driver queue struct: this is the interrupt container 320 * for the associated tx and rx ring. 321 */ 322 struct ix_queue { 323 struct adapter *adapter; 324 u32 msix; /* This queue's MSI-X vector */ 325 u32 eims; /* This queue's EIMS bit */ 326 u32 eitr_setting; 327 u32 me; 328 struct resource *res; 329 void *tag; 330 int busy; 331 struct tx_ring *txr; 332 struct rx_ring *rxr; 333 struct work wq_cookie; 334 void *que_si; 335 /* Per queue event conters */ 336 struct evcnt irqs; /* Hardware interrupt */ 337 struct evcnt handleq; /* software_interrupt */ 338 struct evcnt req; /* deferred */ 339 char namebuf[32]; 340 char evnamebuf[32]; 341 342 kmutex_t dc_mtx; /* lock for disabled_count and this queue's EIMS/EIMC bit */ 343 int disabled_count;/* 344 * means 345 * 0 : this queue is enabled 346 * > 0 : this queue is disabled 347 * the value is ixgbe_disable_queue() called count 348 */ 349 bool txrx_use_workqueue; 350 }; 351 352 /* 353 * The transmit ring, one per queue 354 */ 355 struct tx_ring { 356 struct adapter *adapter; 357 kmutex_t tx_mtx; 358 u32 me; 359 u32 tail; 360 int busy; 361 union ixgbe_adv_tx_desc *tx_base; 362 struct ixgbe_tx_buf *tx_buffers; 363 struct ixgbe_dma_alloc txdma; 364 volatile u16 tx_avail; 365 u16 next_avail_desc; 366 u16 next_to_clean; 367 u16 num_desc; 368 u32 txd_cmd; 369 ixgbe_dma_tag_t *txtag; 370 char mtx_name[16]; 371 pcq_t *txr_interq; 372 struct work wq_cookie; 373 void *txr_si; 374 375 /* Flow Director */ 376 u16 atr_sample; 377 u16 atr_count; 378 379 u64 bytes; /* used for AIM */ 380 u64 packets; 381 /* Soft Stats */ 382 struct evcnt tso_tx; 383 struct evcnt no_desc_avail; 384 struct evcnt total_packets; 385 struct evcnt pcq_drops; 386 /* Per queue conters. The adapter total is in struct adapter */ 387 u64 q_efbig_tx_dma_setup; 388 u64 q_mbuf_defrag_failed; 389 u64 q_efbig2_tx_dma_setup; 390 u64 q_einval_tx_dma_setup; 391 u64 q_other_tx_dma_setup; 392 u64 q_eagain_tx_dma_setup; 393 u64 q_enomem_tx_dma_setup; 394 u64 q_tso_err; 395 }; 396 397 398 /* 399 * The Receive ring, one per rx queue 400 */ 401 struct rx_ring { 402 struct adapter *adapter; 403 kmutex_t rx_mtx; 404 u32 me; 405 u32 tail; 406 union ixgbe_adv_rx_desc *rx_base; 407 struct ixgbe_dma_alloc rxdma; 408 #ifdef LRO 409 struct lro_ctrl lro; 410 #endif /* LRO */ 411 bool lro_enabled; 412 bool hw_rsc; 413 bool vtag_strip; 414 u16 next_to_refresh; 415 u16 next_to_check; 416 u16 num_desc; 417 u16 mbuf_sz; 418 char mtx_name[16]; 419 struct ixgbe_rx_buf *rx_buffers; 420 ixgbe_dma_tag_t *ptag; 421 422 u64 bytes; /* Used for AIM calc */ 423 u64 packets; 424 425 /* Soft stats */ 426 struct evcnt rx_copies; 427 struct evcnt rx_packets; 428 struct evcnt rx_bytes; 429 struct evcnt rx_discarded; 430 struct evcnt no_jmbuf; 431 u64 rsc_num; 432 433 /* Flow Director */ 434 u64 flm; 435 }; 436 437 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 438 439 struct ixgbe_vf { 440 u_int pool; 441 u_int rar_index; 442 u_int max_frame_size; 443 uint32_t flags; 444 uint8_t ether_addr[ETHER_ADDR_LEN]; 445 uint16_t mc_hash[IXGBE_MAX_VF_MC]; 446 uint16_t num_mc_hashes; 447 uint16_t default_vlan; 448 uint16_t vlan_tag; 449 uint16_t api_ver; 450 }; 451 452 /* Our adapter structure */ 453 struct adapter { 454 struct ixgbe_hw hw; 455 struct ixgbe_osdep osdep; 456 457 device_t dev; 458 struct ifnet *ifp; 459 struct if_percpuq *ipq; /* softint-based input queues */ 460 461 struct resource *pci_mem; 462 struct resource *msix_mem; 463 464 /* 465 * Interrupt resources: this set is 466 * either used for legacy, or for Link 467 * when doing MSI-X 468 */ 469 void *tag; 470 struct resource *res; 471 472 struct ifmedia media; 473 callout_t timer; 474 int link_rid; 475 int if_flags; 476 477 kmutex_t core_mtx; 478 479 unsigned int num_queues; 480 481 /* 482 * Shadow VFTA table, this is needed because 483 * the real vlan filter table gets cleared during 484 * a soft reset and the driver needs to be able 485 * to repopulate it. 486 */ 487 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 488 489 /* Info about the interface */ 490 int advertise; /* link speeds */ 491 bool enable_aim; /* adaptive interrupt moderation */ 492 bool link_active; 493 u16 max_frame_size; 494 u16 num_segs; 495 u32 link_speed; 496 bool link_up; 497 u32 vector; 498 u16 dmac; 499 u32 phy_layer; 500 501 /* Power management-related */ 502 bool wol_support; 503 u32 wufc; 504 505 /* Mbuf cluster size */ 506 u32 rx_mbuf_sz; 507 508 /* Support for pluggable optics */ 509 bool sfp_probe; 510 void *link_si; /* Link tasklet */ 511 void *mod_si; /* SFP tasklet */ 512 void *msf_si; /* Multispeed Fiber */ 513 void *mbx_si; /* VF -> PF mailbox interrupt */ 514 515 /* Flow Director */ 516 int fdir_reinit; 517 void *fdir_si; 518 519 void *phy_si; /* PHY intr tasklet */ 520 521 bool txrx_use_workqueue; 522 struct workqueue *que_wq; /* workqueue for ixgbe_handle_que_work() */ 523 /* 524 * que_wq's "enqueued flag" is not required, 525 * because twice workqueue_enqueue() for 526 * ixgbe_handle_que_work() is avoided by masking 527 * the queue's interrupt by EIMC. 528 * See also ixgbe_msix_que(). 529 */ 530 struct workqueue *txr_wq; /* workqueue for ixgbe_deferred_mq_start_work() */ 531 percpu_t *txr_wq_enqueued; 532 533 /* 534 * Queues: 535 * This is the irq holder, it has 536 * and RX/TX pair or rings associated 537 * with it. 538 */ 539 struct ix_queue *queues; 540 541 /* 542 * Transmit rings 543 * Allocated at run time, an array of rings 544 */ 545 struct tx_ring *tx_rings; 546 u32 num_tx_desc; 547 u32 tx_process_limit; 548 549 /* 550 * Receive rings 551 * Allocated at run time, an array of rings 552 */ 553 struct rx_ring *rx_rings; 554 u64 active_queues; 555 u32 num_rx_desc; 556 u32 rx_process_limit; 557 558 /* Multicast array memory */ 559 struct ixgbe_mc_addr *mta; 560 561 /* SR-IOV */ 562 int iov_mode; 563 int num_vfs; 564 int pool; 565 struct ixgbe_vf *vfs; 566 567 /* Bypass */ 568 struct ixgbe_bp_data bypass; 569 570 /* Netmap */ 571 void (*init_locked)(struct adapter *); 572 void (*stop_locked)(void *); 573 574 /* Misc stats maintained by the driver */ 575 struct evcnt efbig_tx_dma_setup; 576 struct evcnt mbuf_defrag_failed; 577 struct evcnt efbig2_tx_dma_setup; 578 struct evcnt einval_tx_dma_setup; 579 struct evcnt other_tx_dma_setup; 580 struct evcnt eagain_tx_dma_setup; 581 struct evcnt enomem_tx_dma_setup; 582 struct evcnt tso_err; 583 struct evcnt watchdog_events; 584 struct evcnt link_irq; 585 struct evcnt link_sicount; 586 struct evcnt mod_sicount; 587 struct evcnt msf_sicount; 588 struct evcnt phy_sicount; 589 590 union { 591 struct ixgbe_hw_stats pf; 592 struct ixgbevf_hw_stats vf; 593 } stats; 594 #if __FreeBSD_version >= 1100036 595 /* counter(9) stats */ 596 u64 ipackets; 597 u64 ierrors; 598 u64 opackets; 599 u64 oerrors; 600 u64 ibytes; 601 u64 obytes; 602 u64 imcasts; 603 u64 omcasts; 604 u64 iqdrops; 605 u64 noproto; 606 #endif 607 /* Feature capable/enabled flags. See ixgbe_features.h */ 608 u32 feat_cap; 609 u32 feat_en; 610 611 struct sysctllog *sysctllog; 612 const struct sysctlnode *sysctltop; 613 ixgbe_extmem_head_t jcl_head; 614 }; 615 616 /* Precision Time Sync (IEEE 1588) defines */ 617 #define ETHERTYPE_IEEE1588 0x88F7 618 #define PICOSECS_PER_TICK 20833 619 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 620 #define IXGBE_ADVTXD_TSTAMP 0x00080000 621 622 623 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 624 mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET) 625 #define IXGBE_CORE_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->core_mtx) 626 #define IXGBE_TX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->tx_mtx) 627 #define IXGBE_RX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->rx_mtx) 628 #define IXGBE_CORE_LOCK(_sc) mutex_enter(&(_sc)->core_mtx) 629 #define IXGBE_TX_LOCK(_sc) mutex_enter(&(_sc)->tx_mtx) 630 #define IXGBE_TX_TRYLOCK(_sc) mutex_tryenter(&(_sc)->tx_mtx) 631 #define IXGBE_RX_LOCK(_sc) mutex_enter(&(_sc)->rx_mtx) 632 #define IXGBE_CORE_UNLOCK(_sc) mutex_exit(&(_sc)->core_mtx) 633 #define IXGBE_TX_UNLOCK(_sc) mutex_exit(&(_sc)->tx_mtx) 634 #define IXGBE_RX_UNLOCK(_sc) mutex_exit(&(_sc)->rx_mtx) 635 #define IXGBE_CORE_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->core_mtx)) 636 #define IXGBE_TX_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->tx_mtx)) 637 638 /* Stats macros */ 639 #if __FreeBSD_version >= 1100036 640 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 641 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 642 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 643 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 644 #define IXGBE_SET_COLLISIONS(sc, count) 645 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 646 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 647 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 648 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 649 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 650 #else 651 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 652 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 653 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 654 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 655 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 656 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 657 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 658 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 659 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 660 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 661 #endif 662 663 /* External PHY register addresses */ 664 #define IXGBE_PHY_CURRENT_TEMP 0xC820 665 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 666 667 /* Sysctl help messages; displayed with sysctl -d */ 668 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 669 "\nControl advertised link speed using these flags:\n" \ 670 "\t0x01 - advertise 100M\n" \ 671 "\t0x02 - advertise 1G\n" \ 672 "\t0x04 - advertise 10G\n" \ 673 "\t0x08 - advertise 10M\n" \ 674 "\t0x10 - advertise 2.5G\n" \ 675 "\t0x20 - advertise 5G\n\n" \ 676 "\t5G, 2.5G, 100M and 10M are only supported on certain adapters." 677 678 #define IXGBE_SYSCTL_DESC_SET_FC \ 679 "\nSet flow control mode using these values:\n" \ 680 "\t0 - off\n" \ 681 "\t1 - rx pause\n" \ 682 "\t2 - tx pause\n" \ 683 "\t3 - tx and rx pause" 684 685 /* Workaround to make 8.0 buildable */ 686 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 687 static __inline int 688 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 689 { 690 #ifdef ALTQ 691 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 692 return (1); 693 #endif 694 return (!buf_ring_empty(br)); 695 } 696 #endif 697 698 /* 699 * Find the number of unrefreshed RX descriptors 700 */ 701 static inline u16 702 ixgbe_rx_unrefreshed(struct rx_ring *rxr) 703 { 704 if (rxr->next_to_check > rxr->next_to_refresh) 705 return (rxr->next_to_check - rxr->next_to_refresh - 1); 706 else 707 return ((rxr->num_desc + rxr->next_to_check) - 708 rxr->next_to_refresh - 1); 709 } 710 711 static inline int 712 ixgbe_legacy_ring_empty(struct ifnet *ifp, pcq_t *dummy) 713 { 714 UNREFERENCED_1PARAMETER(dummy); 715 716 return IFQ_IS_EMPTY(&ifp->if_snd); 717 } 718 719 static inline int 720 ixgbe_mq_ring_empty(struct ifnet *dummy, pcq_t *interq) 721 { 722 UNREFERENCED_1PARAMETER(dummy); 723 724 return (pcq_peek(interq) == NULL); 725 } 726 727 /* 728 * This checks for a zero mac addr, something that will be likely 729 * unless the Admin on the Host has created one. 730 */ 731 static inline bool 732 ixv_check_ether_addr(u8 *addr) 733 { 734 bool status = TRUE; 735 736 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 737 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 738 status = FALSE; 739 740 return (status); 741 } 742 743 /* Shared Prototypes */ 744 void ixgbe_legacy_start(struct ifnet *); 745 int ixgbe_legacy_start_locked(struct ifnet *, struct tx_ring *); 746 int ixgbe_mq_start(struct ifnet *, struct mbuf *); 747 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *); 748 void ixgbe_deferred_mq_start(void *); 749 void ixgbe_deferred_mq_start_work(struct work *, void *); 750 void ixgbe_drain_all(struct adapter *); 751 752 int ixgbe_allocate_queues(struct adapter *); 753 int ixgbe_setup_transmit_structures(struct adapter *); 754 void ixgbe_free_transmit_structures(struct adapter *); 755 int ixgbe_setup_receive_structures(struct adapter *); 756 void ixgbe_free_receive_structures(struct adapter *); 757 bool ixgbe_txeof(struct tx_ring *); 758 bool ixgbe_rxeof(struct ix_queue *); 759 760 const struct sysctlnode *ixgbe_sysctl_instance(struct adapter *); 761 762 #include "ixgbe_bypass.h" 763 #include "ixgbe_fdir.h" 764 #include "ixgbe_rss.h" 765 #include "ixgbe_netmap.h" 766 767 #endif /* _IXGBE_H_ */ 768
Indexes created Tue Sep 30 20:09:53 GMT 2025