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ixgbe.h revision 1.6
      1 /******************************************************************************
      2 
      3   Copyright (c) 2001-2012, Intel Corporation
      4   All rights reserved.
      5 
      6   Redistribution and use in source and binary forms, with or without
      7   modification, are permitted provided that the following conditions are met:
      8 
      9    1. Redistributions of source code must retain the above copyright notice,
     10       this list of conditions and the following disclaimer.
     11 
     12    2. Redistributions in binary form must reproduce the above copyright
     13       notice, this list of conditions and the following disclaimer in the
     14       documentation and/or other materials provided with the distribution.
     15 
     16    3. Neither the name of the Intel Corporation nor the names of its
     17       contributors may be used to endorse or promote products derived from
     18       this software without specific prior written permission.
     19 
     20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30   POSSIBILITY OF SUCH DAMAGE.
     31 
     32 ******************************************************************************/
     33 /*
     34  * Copyright (c) 2011 The NetBSD Foundation, Inc.
     35  * All rights reserved.
     36  *
     37  * This code is derived from software contributed to The NetBSD Foundation
     38  * by Coyote Point Systems, Inc.
     39  *
     40  * Redistribution and use in source and binary forms, with or without
     41  * modification, are permitted provided that the following conditions
     42  * are met:
     43  * 1. Redistributions of source code must retain the above copyright
     44  *    notice, this list of conditions and the following disclaimer.
     45  * 2. Redistributions in binary form must reproduce the above copyright
     46  *    notice, this list of conditions and the following disclaimer in the
     47  *    documentation and/or other materials provided with the distribution.
     48  *
     49  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     50  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     51  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     52  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     53  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     54  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     55  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     56  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     57  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     58  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     59  * POSSIBILITY OF SUCH DAMAGE.
     60  */
     61 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 243716 2012-11-30 22:33:21Z jfv $*/
     62 /*$NetBSD: ixgbe.h,v 1.6 2015/04/14 07:17:06 msaitoh Exp $*/
     63 
     64 
     65 #ifndef _IXGBE_H_
     66 #define _IXGBE_H_
     67 
     68 
     69 #include <sys/param.h>
     70 #include <sys/reboot.h>
     71 #include <sys/systm.h>
     72 #include <sys/time.h>
     73 #if __FreeBSD_version >= 800000
     74 #include <sys/buf_ring.h>
     75 #endif
     76 #include <sys/mbuf.h>
     77 #include <sys/protosw.h>
     78 #include <sys/socket.h>
     79 #include <sys/malloc.h>
     80 #include <sys/kernel.h>
     81 #include <sys/module.h>
     82 #include <sys/sockio.h>
     83 
     84 #include <net/if.h>
     85 #include <net/if_arp.h>
     86 #include <net/bpf.h>
     87 #include <net/if_ether.h>
     88 #include <net/if_dl.h>
     89 #include <net/if_media.h>
     90 
     91 #include <net/bpf.h>
     92 #include <net/if_types.h>
     93 #include <net/if_vlanvar.h>
     94 
     95 #include <netinet/in_systm.h>
     96 #include <netinet/in.h>
     97 #include <netinet/ip.h>
     98 #include <netinet/ip6.h>
     99 #include <netinet/tcp.h>
    100 #include <netinet/udp.h>
    101 
    102 #include <sys/bus.h>
    103 #include <dev/pci/pcivar.h>
    104 #include <dev/pci/pcireg.h>
    105 #include <sys/proc.h>
    106 #include <sys/sysctl.h>
    107 #include <sys/endian.h>
    108 #include <sys/workqueue.h>
    109 
    110 #ifdef IXGBE_IEEE1588
    111 #include <sys/ieee1588.h>
    112 #endif
    113 
    114 #include "ixgbe_netbsd.h"
    115 #include "ixgbe_api.h"
    116 
    117 /* Tunables */
    118 
    119 /*
    120  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
    121  * number of transmit descriptors allocated by the driver. Increasing this
    122  * value allows the driver to queue more transmits. Each descriptor is 16
    123  * bytes. Performance tests have show the 2K value to be optimal for top
    124  * performance.
    125  */
    126 #define DEFAULT_TXD	1024
    127 #define PERFORM_TXD	2048
    128 #define MAX_TXD		4096
    129 #define MIN_TXD		64
    130 
    131 /*
    132  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
    133  * number of receive descriptors allocated for each RX queue. Increasing this
    134  * value allows the driver to buffer more incoming packets. Each descriptor
    135  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
    136  *
    137  * Note: with 8 rings and a dual port card, it is possible to bump up
    138  *	against the system mbuf pool limit, you can tune nmbclusters
    139  *	to adjust for this.
    140  */
    141 #define DEFAULT_RXD	1024
    142 #define PERFORM_RXD	2048
    143 #define MAX_RXD		4096
    144 #define MIN_RXD		64
    145 
    146 /* Alignment for rings */
    147 #define DBA_ALIGN	128
    148 
    149 /*
    150  * This parameter controls the maximum no of times the driver will loop in
    151  * the isr. Minimum Value = 1
    152  */
    153 #define MAX_LOOP	10
    154 
    155 /*
    156  * This is the max watchdog interval, ie. the time that can
    157  * pass between any two TX clean operations, such only happening
    158  * when the TX hardware is functioning.
    159  */
    160 #define IXGBE_WATCHDOG                   (10 * hz)
    161 
    162 /*
    163  * This parameters control when the driver calls the routine to reclaim
    164  * transmit descriptors.
    165  */
    166 #define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
    167 #define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
    168 
    169 #define IXGBE_MAX_FRAME_SIZE	0x3F00
    170 
    171 /* Flow control constants */
    172 #define IXGBE_FC_PAUSE		0xFFFF
    173 #define IXGBE_FC_HI		0x20000
    174 #define IXGBE_FC_LO		0x10000
    175 
    176 /*
    177  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
    178  * small and aligned for the CPU L1 cache.
    179  *
    180  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
    181  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
    182  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
    183  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
    184  * in observed efficiency of the optimization, 97.9% -> 81.8%.
    185  */
    186 #define IXGBE_RX_COPY_LEN	160
    187 #define IXGBE_RX_COPY_ALIGN	(MHLEN - IXGBE_RX_COPY_LEN)
    188 
    189 /* Keep older OS drivers building... */
    190 #if !defined(SYSCTL_ADD_UQUAD)
    191 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
    192 #endif
    193 
    194 /* Defines for printing debug information */
    195 #define DEBUG_INIT  0
    196 #define DEBUG_IOCTL 0
    197 #define DEBUG_HW    0
    198 
    199 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
    200 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
    201 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
    202 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
    203 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
    204 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
    205 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
    206 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
    207 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
    208 
    209 #define MAX_NUM_MULTICAST_ADDRESSES     128
    210 #define IXGBE_82598_SCATTER		100
    211 #define IXGBE_82599_SCATTER		32
    212 #define MSIX_82598_BAR			3
    213 #define MSIX_82599_BAR			4
    214 #define IXGBE_TSO_SIZE			262140
    215 #define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
    216 #define IXGBE_RX_HDR			128
    217 #define IXGBE_VFTA_SIZE			128
    218 #define IXGBE_BR_SIZE			4096
    219 #define IXGBE_QUEUE_MIN_FREE		32
    220 
    221 /* Offload bits in mbuf flag */
    222 #define	M_CSUM_OFFLOAD	\
    223     (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6)
    224 
    225 /*
    226  * Interrupt Moderation parameters
    227  */
    228 #define IXGBE_LOW_LATENCY	128
    229 #define IXGBE_AVE_LATENCY	400
    230 #define IXGBE_BULK_LATENCY	1200
    231 #define IXGBE_LINK_ITR		2000
    232 
    233 /*
    234  *****************************************************************************
    235  * vendor_info_array
    236  *
    237  * This array contains the list of Subvendor/Subdevice IDs on which the driver
    238  * should load.
    239  *
    240  *****************************************************************************
    241  */
    242 typedef struct _ixgbe_vendor_info_t {
    243 	unsigned int    vendor_id;
    244 	unsigned int    device_id;
    245 	unsigned int    subvendor_id;
    246 	unsigned int    subdevice_id;
    247 	unsigned int    index;
    248 } ixgbe_vendor_info_t;
    249 
    250 
    251 struct ixgbe_tx_buf {
    252 	u32		eop_index;
    253 	struct mbuf	*m_head;
    254 	bus_dmamap_t	map;
    255 };
    256 
    257 struct ixgbe_rx_buf {
    258 	struct mbuf	*buf;
    259 	struct mbuf	*fmp;
    260 	bus_dmamap_t	map;
    261 	u_int		flags;
    262 #define IXGBE_RX_COPY	0x01
    263 	uint64_t	addr;
    264 };
    265 
    266 /*
    267  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
    268  */
    269 struct ixgbe_dma_alloc {
    270 	bus_addr_t		dma_paddr;
    271 	void			*dma_vaddr;
    272 	ixgbe_dma_tag_t		*dma_tag;
    273 	bus_dmamap_t		dma_map;
    274 	bus_dma_segment_t	dma_seg;
    275 	bus_size_t		dma_size;
    276 };
    277 
    278 /*
    279 ** Driver queue struct: this is the interrupt container
    280 **  for the associated tx and rx ring.
    281 */
    282 struct ix_queue {
    283 	struct adapter		*adapter;
    284 	u32			msix;           /* This queue's MSIX vector */
    285 	u32			eims;           /* This queue's EIMS bit */
    286 	u32			eitr_setting;
    287 	struct resource		*res;
    288 	void			*tag;
    289 	struct tx_ring		*txr;
    290 	struct rx_ring		*rxr;
    291 	void			*que_si;
    292 	u64			irqs;
    293 	char			namebuf[32];
    294 	char			evnamebuf[32];
    295 };
    296 
    297 /*
    298  * The transmit ring, one per queue
    299  */
    300 struct tx_ring {
    301         struct adapter		*adapter;
    302 	kmutex_t		tx_mtx;
    303 	u32			me;
    304 	enum {
    305 	    IXGBE_QUEUE_IDLE,
    306 	    IXGBE_QUEUE_WORKING,
    307 	    IXGBE_QUEUE_HUNG,
    308 	}			queue_status;
    309 	struct timeval		watchdog_time;
    310 	union ixgbe_adv_tx_desc	*tx_base;
    311 	struct ixgbe_dma_alloc	txdma;
    312 	u32			next_avail_desc;
    313 	u32			next_to_clean;
    314 	struct ixgbe_tx_buf	*tx_buffers;
    315 	volatile u16		tx_avail;
    316 	u32			txd_cmd;
    317 	ixgbe_dma_tag_t		*txtag;
    318 	char			mtx_name[16];
    319 #if __FreeBSD_version >= 800000
    320 	struct buf_ring		*br;
    321 	struct task		txq_task;
    322 #endif
    323 #ifdef IXGBE_FDIR
    324 	u16			atr_sample;
    325 	u16			atr_count;
    326 #endif
    327 	u32			bytes;  /* used for AIM */
    328 	u32			packets;
    329 	/* Soft Stats */
    330 	struct evcnt		no_desc_avail;
    331 	struct evcnt		total_packets;
    332 };
    333 
    334 
    335 /*
    336  * The Receive ring, one per rx queue
    337  */
    338 struct rx_ring {
    339         struct adapter		*adapter;
    340 	kmutex_t		rx_mtx;
    341 	u32			me;
    342 	union ixgbe_adv_rx_desc	*rx_base;
    343 	struct ixgbe_dma_alloc	rxdma;
    344 #ifdef LRO
    345 	struct lro_ctrl		lro;
    346 #endif /* LRO */
    347 	bool			lro_enabled;
    348 	bool			hw_rsc;
    349 	bool			discard;
    350 	bool			vtag_strip;
    351         u32			next_to_refresh;
    352         u32 			next_to_check;
    353 	char			mtx_name[16];
    354 	struct ixgbe_rx_buf	*rx_buffers;
    355 	ixgbe_dma_tag_t		*tag;
    356 
    357 	u32			bytes; /* Used for AIM calc */
    358 	u32			packets;
    359 
    360 	/* Soft stats */
    361 	struct evcnt		rx_irq;
    362 	struct evcnt		rx_copies;
    363 	struct evcnt		rx_packets;
    364 	struct evcnt 		rx_bytes;
    365 	struct evcnt 		rx_discarded;
    366 	struct evcnt 		no_jmbuf;
    367 	u64 			rsc_num;
    368 #ifdef IXGBE_FDIR
    369 	u64			flm;
    370 #endif
    371 };
    372 
    373 /* Our adapter structure */
    374 struct adapter {
    375 	struct ifnet		*ifp;
    376 	struct ixgbe_hw		hw;
    377 
    378 	struct ixgbe_osdep	osdep;
    379 	device_t		dev;
    380 
    381 	struct resource		*pci_mem;
    382 	struct resource		*msix_mem;
    383 
    384 	/*
    385 	 * Interrupt resources: this set is
    386 	 * either used for legacy, or for Link
    387 	 * when doing MSIX
    388 	 */
    389 	void			*tag;
    390 	struct resource 	*res;
    391 
    392 	struct ifmedia		media;
    393 	callout_t		timer;
    394 	int			msix;
    395 	int			if_flags;
    396 
    397 	kmutex_t		core_mtx;
    398 
    399 	unsigned int		num_queues;
    400 
    401 	/*
    402 	** Shadow VFTA table, this is needed because
    403 	** the real vlan filter table gets cleared during
    404 	** a soft reset and the driver needs to be able
    405 	** to repopulate it.
    406 	*/
    407 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
    408 
    409 	/* Info about the interface */
    410 	u32			optics;
    411 	u32			fc; /* local flow ctrl setting */
    412 	int			advertise;  /* link speeds */
    413 	bool			link_active;
    414 	u16			max_frame_size;
    415 	u16			num_segs;
    416 	u32			link_speed;
    417 	bool			link_up;
    418 	u32 			linkvec;
    419 
    420 	/* Mbuf cluster size */
    421 	u32			rx_mbuf_sz;
    422 
    423 	/* Support for pluggable optics */
    424 	bool			sfp_probe;
    425 	void			*link_si;  /* Link tasklet */
    426 	void			*mod_si;   /* SFP tasklet */
    427 	void			*msf_si;   /* Multispeed Fiber */
    428 #ifdef IXGBE_FDIR
    429 	int			fdir_reinit;
    430 	void			*fdir_si;
    431 #endif
    432 
    433 	/*
    434 	** Queues:
    435 	**   This is the irq holder, it has
    436 	**   and RX/TX pair or rings associated
    437 	**   with it.
    438 	*/
    439 	struct ix_queue		*queues;
    440 
    441 	/*
    442 	 * Transmit rings:
    443 	 *	Allocated at run time, an array of rings.
    444 	 */
    445 	struct tx_ring		*tx_rings;
    446 	int			num_tx_desc;
    447 
    448 	/*
    449 	 * Receive rings:
    450 	 *	Allocated at run time, an array of rings.
    451 	 */
    452 	struct rx_ring		*rx_rings;
    453 	int			num_rx_desc;
    454 	u64			que_mask;
    455 	u32			rx_process_limit;
    456 
    457 	/* Multicast array memory */
    458 	u8			*mta;
    459 
    460 	/* Misc stats maintained by the driver */
    461 	struct evcnt   		dropped_pkts;
    462 	struct evcnt   		mbuf_defrag_failed;
    463 	struct evcnt	   	mbuf_header_failed;
    464 	struct evcnt	   	mbuf_packet_failed;
    465 	struct evcnt	   	no_tx_map_avail;
    466 	struct evcnt	   	efbig_tx_dma_setup;
    467 	struct evcnt	   	efbig2_tx_dma_setup;
    468 	struct evcnt	   	m_defrag_failed;
    469 	struct evcnt	   	einval_tx_dma_setup;
    470 	struct evcnt	   	other_tx_dma_setup;
    471 	struct evcnt	   	eagain_tx_dma_setup;
    472 	struct evcnt	   	enomem_tx_dma_setup;
    473 	struct evcnt	   	watchdog_events;
    474 	struct evcnt	   	tso_err;
    475 	struct evcnt	   	tso_tx;
    476 	struct evcnt		link_irq;
    477 	struct evcnt		morerx;
    478 	struct evcnt		moretx;
    479 	struct evcnt		txloops;
    480 	struct evcnt		handleq;
    481 	struct evcnt		req;
    482 
    483 	struct ixgbe_hw_stats 	stats;
    484 	struct sysctllog	*sysctllog;
    485 	ixgbe_extmem_head_t jcl_head;
    486 };
    487 
    488 /* Precision Time Sync (IEEE 1588) defines */
    489 #define ETHERTYPE_IEEE1588      0x88F7
    490 #define PICOSECS_PER_TICK       20833
    491 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
    492 #define IXGBE_ADVTXD_TSTAMP	0x00080000
    493 
    494 
    495 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
    496         mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
    497 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mutex_destroy(&(_sc)->core_mtx)
    498 #define IXGBE_TX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->tx_mtx)
    499 #define IXGBE_RX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->rx_mtx)
    500 #define IXGBE_CORE_LOCK(_sc)              mutex_enter(&(_sc)->core_mtx)
    501 #define IXGBE_TX_LOCK(_sc)                mutex_enter(&(_sc)->tx_mtx)
    502 #define IXGBE_TX_TRYLOCK(_sc)             mutex_tryenter(&(_sc)->tx_mtx)
    503 #define IXGBE_RX_LOCK(_sc)                mutex_enter(&(_sc)->rx_mtx)
    504 #define IXGBE_CORE_UNLOCK(_sc)            mutex_exit(&(_sc)->core_mtx)
    505 #define IXGBE_TX_UNLOCK(_sc)              mutex_exit(&(_sc)->tx_mtx)
    506 #define IXGBE_RX_UNLOCK(_sc)              mutex_exit(&(_sc)->rx_mtx)
    507 #define IXGBE_CORE_LOCK_ASSERT(_sc)       KASSERT(mutex_owned(&(_sc)->core_mtx))
    508 #define IXGBE_TX_LOCK_ASSERT(_sc)         KASSERT(mutex_owned(&(_sc)->tx_mtx))
    509 
    510 
    511 static inline bool
    512 ixgbe_is_sfp(struct ixgbe_hw *hw)
    513 {
    514 	switch (hw->phy.type) {
    515 	case ixgbe_phy_sfp_avago:
    516 	case ixgbe_phy_sfp_ftl:
    517 	case ixgbe_phy_sfp_intel:
    518 	case ixgbe_phy_sfp_unknown:
    519 	case ixgbe_phy_sfp_passive_tyco:
    520 	case ixgbe_phy_sfp_passive_unknown:
    521 		return TRUE;
    522 	default:
    523 		return FALSE;
    524 	}
    525 }
    526 
    527 /* Workaround to make 8.0 buildable */
    528 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
    529 static __inline int
    530 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
    531 {
    532 #ifdef ALTQ
    533         if (ALTQ_IS_ENABLED(&ifp->if_snd))
    534                 return (1);
    535 #endif
    536         return (!buf_ring_empty(br));
    537 }
    538 #endif
    539 
    540 /*
    541 ** Find the number of unrefreshed RX descriptors
    542 */
    543 static inline u16
    544 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
    545 {
    546 	struct adapter  *adapter = rxr->adapter;
    547 
    548 	if (rxr->next_to_check > rxr->next_to_refresh)
    549 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
    550 	else
    551 		return ((adapter->num_rx_desc + rxr->next_to_check) -
    552 		    rxr->next_to_refresh - 1);
    553 }
    554 
    555 #endif /* _IXGBE_H_ */
    556