ixgbe_common.h revision 1.17
1 /* $NetBSD: ixgbe_common.h,v 1.17 2023/10/06 14:37:04 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Copyright (c) 2001-2020, Intel Corporation 7 All rights reserved. 8 9 Redistribution and use in source and binary forms, with or without 10 modification, are permitted provided that the following conditions are met: 11 12 1. Redistributions of source code must retain the above copyright notice, 13 this list of conditions and the following disclaimer. 14 15 2. Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 19 3. Neither the name of the Intel Corporation nor the names of its 20 contributors may be used to endorse or promote products derived from 21 this software without specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 POSSIBILITY OF SUCH DAMAGE. 34 35 ******************************************************************************/ 36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_common.h 331224 2018-03-19 20:55:05Z erj $*/ 37 38 #ifndef _IXGBE_COMMON_H_ 39 #define _IXGBE_COMMON_H_ 40 41 #include "ixgbe_type.h" 42 #define IXGBE_WRITE_REG64(hw, reg, value) \ 43 do { \ 44 IXGBE_WRITE_REG(hw, reg, (u32) value); \ 45 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ 46 } while (0) 47 #define IXGBE_REMOVED(a) (0) 48 #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW) 49 struct ixgbe_pba { 50 u16 word[2]; 51 u16 *pba_block; 52 }; 53 #endif 54 55 void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map); 56 57 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 58 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 59 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 60 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 61 void ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 62 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 63 s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num); 64 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 65 u32 pba_num_size); 66 s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, 67 u32 eeprom_buf_size, u16 max_pba_block_size, 68 struct ixgbe_pba *pba); 69 s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, 70 u32 eeprom_buf_size, struct ixgbe_pba *pba); 71 s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf, 72 u32 eeprom_buf_size, u16 *pba_block_size); 73 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 74 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 75 void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status); 76 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 77 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 78 79 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 80 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 81 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); 82 83 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 84 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 85 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 86 u16 words, u16 *data); 87 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 88 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, 89 u16 words, u16 *data); 90 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 91 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 92 u16 words, u16 *data); 93 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 94 u16 *data); 95 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 96 u16 words, u16 *data); 97 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 98 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 99 u16 *checksum_val); 100 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 101 s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); 102 103 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 104 u32 enable_addr); 105 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 106 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 107 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, 108 u32 mc_addr_count, 109 ixgbe_mc_addr_itr func, bool clear); 110 s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 111 u32 addr_count, ixgbe_mc_addr_itr func); 112 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 113 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 114 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 115 s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); 116 s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); 117 118 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); 119 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); 120 void ixgbe_fc_autoneg(struct ixgbe_hw *hw); 121 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw); 122 123 s32 ixgbe_validate_mac_addr(u8 *mac_addr); 124 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); 125 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); 126 s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw); 127 128 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); 129 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); 130 131 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 132 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 133 134 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 135 s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 136 137 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 138 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); 139 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 140 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 141 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 142 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 143 u32 vind, bool vlan_on, bool vlvf_bypass); 144 s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, 145 bool vlan_on, u32 *vfta_delta, u32 vfta, 146 bool vlvf_bypass); 147 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 148 s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass); 149 s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind); 150 151 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 152 ixgbe_link_speed *speed, 153 bool *link_up, bool link_up_wait_to_complete); 154 155 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 156 u16 *wwpn_prefix); 157 158 s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); 159 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 160 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 161 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); 162 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, 163 int strategy); 164 void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw); 165 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 166 u8 build, u8 ver, u16 len, const char *str); 167 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); 168 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 169 u32 length, u32 timeout, bool return_data); 170 s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout); 171 s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *); 172 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity, 173 u32 (*data)[FW_PHY_ACT_DATA_COUNT]); 174 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 175 s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status); 176 bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg); 177 s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event, 178 u32 action); 179 s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value); 180 181 extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); 182 bool ixgbe_mng_present(struct ixgbe_hw *hw); 183 bool ixgbe_mng_enabled(struct ixgbe_hw *hw); 184 185 void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver); 186 void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, 187 struct ixgbe_nvm_version *nvm_ver); 188 void ixgbe_get_orom_version(struct ixgbe_hw *hw, 189 struct ixgbe_nvm_version *nvm_ver); 190 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); 191 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); 192 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 193 ixgbe_link_speed speed, 194 bool autoneg_wait_to_complete); 195 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, 196 ixgbe_link_speed speed); 197 #endif /* IXGBE_COMMON */ 198
Indexes created Sun Sep 28 12:09:53 GMT 2025