ixgbe_dcb.c revision 1.5.2.2
1 1.5.2.2 jdolecek /****************************************************************************** 2 1.5.2.2 jdolecek 3 1.5.2.2 jdolecek Copyright (c) 2001-2017, Intel Corporation 4 1.5.2.2 jdolecek All rights reserved. 5 1.5.2.2 jdolecek 6 1.5.2.2 jdolecek Redistribution and use in source and binary forms, with or without 7 1.5.2.2 jdolecek modification, are permitted provided that the following conditions are met: 8 1.5.2.2 jdolecek 9 1.5.2.2 jdolecek 1. Redistributions of source code must retain the above copyright notice, 10 1.5.2.2 jdolecek this list of conditions and the following disclaimer. 11 1.5.2.2 jdolecek 12 1.5.2.2 jdolecek 2. Redistributions in binary form must reproduce the above copyright 13 1.5.2.2 jdolecek notice, this list of conditions and the following disclaimer in the 14 1.5.2.2 jdolecek documentation and/or other materials provided with the distribution. 15 1.5.2.2 jdolecek 16 1.5.2.2 jdolecek 3. Neither the name of the Intel Corporation nor the names of its 17 1.5.2.2 jdolecek contributors may be used to endorse or promote products derived from 18 1.5.2.2 jdolecek this software without specific prior written permission. 19 1.5.2.2 jdolecek 20 1.5.2.2 jdolecek THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 1.5.2.2 jdolecek AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 1.5.2.2 jdolecek IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 1.5.2.2 jdolecek ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 1.5.2.2 jdolecek LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 1.5.2.2 jdolecek CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 1.5.2.2 jdolecek SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 1.5.2.2 jdolecek INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 1.5.2.2 jdolecek CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 1.5.2.2 jdolecek ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 1.5.2.2 jdolecek POSSIBILITY OF SUCH DAMAGE. 31 1.5.2.2 jdolecek 32 1.5.2.2 jdolecek ******************************************************************************/ 33 1.5.2.2 jdolecek /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_dcb.c 320688 2017-07-05 17:27:03Z erj $*/ 34 1.5.2.2 jdolecek 35 1.5.2.2 jdolecek 36 1.5.2.2 jdolecek #include "ixgbe_type.h" 37 1.5.2.2 jdolecek #include "ixgbe_dcb.h" 38 1.5.2.2 jdolecek #include "ixgbe_dcb_82598.h" 39 1.5.2.2 jdolecek #include "ixgbe_dcb_82599.h" 40 1.5.2.2 jdolecek 41 1.5.2.2 jdolecek /** 42 1.5.2.2 jdolecek * ixgbe_dcb_calculate_tc_credits - This calculates the ieee traffic class 43 1.5.2.2 jdolecek * credits from the configured bandwidth percentages. Credits 44 1.5.2.2 jdolecek * are the smallest unit programmable into the underlying 45 1.5.2.2 jdolecek * hardware. The IEEE 802.1Qaz specification do not use bandwidth 46 1.5.2.2 jdolecek * groups so this is much simplified from the CEE case. 47 1.5.2.2 jdolecek */ 48 1.5.2.2 jdolecek s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max, 49 1.5.2.2 jdolecek int max_frame_size) 50 1.5.2.2 jdolecek { 51 1.5.2.2 jdolecek int min_percent = 100; 52 1.5.2.2 jdolecek int min_credit, multiplier; 53 1.5.2.2 jdolecek int i; 54 1.5.2.2 jdolecek 55 1.5.2.2 jdolecek min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) / 56 1.5.2.2 jdolecek IXGBE_DCB_CREDIT_QUANTUM; 57 1.5.2.2 jdolecek 58 1.5.2.2 jdolecek for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 59 1.5.2.2 jdolecek if (bw[i] < min_percent && bw[i]) 60 1.5.2.2 jdolecek min_percent = bw[i]; 61 1.5.2.2 jdolecek } 62 1.5.2.2 jdolecek 63 1.5.2.2 jdolecek multiplier = (min_credit / min_percent) + 1; 64 1.5.2.2 jdolecek 65 1.5.2.2 jdolecek /* Find out the hw credits for each TC */ 66 1.5.2.2 jdolecek for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 67 1.5.2.2 jdolecek int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL); 68 1.5.2.2 jdolecek 69 1.5.2.2 jdolecek if (val < min_credit) 70 1.5.2.2 jdolecek val = min_credit; 71 1.5.2.2 jdolecek refill[i] = (u16)val; 72 1.5.2.2 jdolecek 73 1.5.2.2 jdolecek max[i] = bw[i] ? (bw[i]*IXGBE_DCB_MAX_CREDIT)/100 : min_credit; 74 1.5.2.2 jdolecek } 75 1.5.2.2 jdolecek 76 1.5.2.2 jdolecek return 0; 77 1.5.2.2 jdolecek } 78 1.5.2.2 jdolecek 79 1.5.2.2 jdolecek /** 80 1.5.2.2 jdolecek * ixgbe_dcb_calculate_tc_credits_cee - Calculates traffic class credits 81 1.5.2.2 jdolecek * @ixgbe_dcb_config: Struct containing DCB settings. 82 1.5.2.2 jdolecek * @direction: Configuring either Tx or Rx. 83 1.5.2.2 jdolecek * 84 1.5.2.2 jdolecek * This function calculates the credits allocated to each traffic class. 85 1.5.2.2 jdolecek * It should be called only after the rules are checked by 86 1.5.2.2 jdolecek * ixgbe_dcb_check_config_cee(). 87 1.5.2.2 jdolecek */ 88 1.5.2.2 jdolecek s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *hw, 89 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config, 90 1.5.2.2 jdolecek u32 max_frame_size, u8 direction) 91 1.5.2.2 jdolecek { 92 1.5.2.2 jdolecek struct ixgbe_dcb_tc_path *p; 93 1.5.2.2 jdolecek u32 min_multiplier = 0; 94 1.5.2.2 jdolecek u16 min_percent = 100; 95 1.5.2.2 jdolecek s32 ret_val = IXGBE_SUCCESS; 96 1.5.2.2 jdolecek /* Initialization values default for Tx settings */ 97 1.5.2.2 jdolecek u32 min_credit = 0; 98 1.5.2.2 jdolecek u32 credit_refill = 0; 99 1.5.2.2 jdolecek u32 credit_max = 0; 100 1.5.2.2 jdolecek u16 link_percentage = 0; 101 1.5.2.2 jdolecek u8 bw_percent = 0; 102 1.5.2.2 jdolecek u8 i; 103 1.5.2.2 jdolecek 104 1.5.2.2 jdolecek if (dcb_config == NULL) { 105 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 106 1.5.2.2 jdolecek goto out; 107 1.5.2.2 jdolecek } 108 1.5.2.2 jdolecek 109 1.5.2.2 jdolecek min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) / 110 1.5.2.2 jdolecek IXGBE_DCB_CREDIT_QUANTUM; 111 1.5.2.2 jdolecek 112 1.5.2.2 jdolecek /* Find smallest link percentage */ 113 1.5.2.2 jdolecek for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 114 1.5.2.2 jdolecek p = &dcb_config->tc_config[i].path[direction]; 115 1.5.2.2 jdolecek bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; 116 1.5.2.2 jdolecek link_percentage = p->bwg_percent; 117 1.5.2.2 jdolecek 118 1.5.2.2 jdolecek link_percentage = (link_percentage * bw_percent) / 100; 119 1.5.2.2 jdolecek 120 1.5.2.2 jdolecek if (link_percentage && link_percentage < min_percent) 121 1.5.2.2 jdolecek min_percent = link_percentage; 122 1.5.2.2 jdolecek } 123 1.5.2.2 jdolecek 124 1.5.2.2 jdolecek /* 125 1.5.2.2 jdolecek * The ratio between traffic classes will control the bandwidth 126 1.5.2.2 jdolecek * percentages seen on the wire. To calculate this ratio we use 127 1.5.2.2 jdolecek * a multiplier. It is required that the refill credits must be 128 1.5.2.2 jdolecek * larger than the max frame size so here we find the smallest 129 1.5.2.2 jdolecek * multiplier that will allow all bandwidth percentages to be 130 1.5.2.2 jdolecek * greater than the max frame size. 131 1.5.2.2 jdolecek */ 132 1.5.2.2 jdolecek min_multiplier = (min_credit / min_percent) + 1; 133 1.5.2.2 jdolecek 134 1.5.2.2 jdolecek /* Find out the link percentage for each TC first */ 135 1.5.2.2 jdolecek for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 136 1.5.2.2 jdolecek p = &dcb_config->tc_config[i].path[direction]; 137 1.5.2.2 jdolecek bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; 138 1.5.2.2 jdolecek 139 1.5.2.2 jdolecek link_percentage = p->bwg_percent; 140 1.5.2.2 jdolecek /* Must be careful of integer division for very small nums */ 141 1.5.2.2 jdolecek link_percentage = (link_percentage * bw_percent) / 100; 142 1.5.2.2 jdolecek if (p->bwg_percent > 0 && link_percentage == 0) 143 1.5.2.2 jdolecek link_percentage = 1; 144 1.5.2.2 jdolecek 145 1.5.2.2 jdolecek /* Save link_percentage for reference */ 146 1.5.2.2 jdolecek p->link_percent = (u8)link_percentage; 147 1.5.2.2 jdolecek 148 1.5.2.2 jdolecek /* Calculate credit refill ratio using multiplier */ 149 1.5.2.2 jdolecek credit_refill = min(link_percentage * min_multiplier, 150 1.5.2.2 jdolecek (u32)IXGBE_DCB_MAX_CREDIT_REFILL); 151 1.5.2.2 jdolecek 152 1.5.2.2 jdolecek /* Refill at least minimum credit */ 153 1.5.2.2 jdolecek if (credit_refill < min_credit) 154 1.5.2.2 jdolecek credit_refill = min_credit; 155 1.5.2.2 jdolecek 156 1.5.2.2 jdolecek p->data_credits_refill = (u16)credit_refill; 157 1.5.2.2 jdolecek 158 1.5.2.2 jdolecek /* Calculate maximum credit for the TC */ 159 1.5.2.2 jdolecek credit_max = (link_percentage * IXGBE_DCB_MAX_CREDIT) / 100; 160 1.5.2.2 jdolecek 161 1.5.2.2 jdolecek /* 162 1.5.2.2 jdolecek * Adjustment based on rule checking, if the percentage 163 1.5.2.2 jdolecek * of a TC is too small, the maximum credit may not be 164 1.5.2.2 jdolecek * enough to send out a jumbo frame in data plane arbitration. 165 1.5.2.2 jdolecek */ 166 1.5.2.2 jdolecek if (credit_max < min_credit) 167 1.5.2.2 jdolecek credit_max = min_credit; 168 1.5.2.2 jdolecek 169 1.5.2.2 jdolecek if (direction == IXGBE_DCB_TX_CONFIG) { 170 1.5.2.2 jdolecek /* 171 1.5.2.2 jdolecek * Adjustment based on rule checking, if the 172 1.5.2.2 jdolecek * percentage of a TC is too small, the maximum 173 1.5.2.2 jdolecek * credit may not be enough to send out a TSO 174 1.5.2.2 jdolecek * packet in descriptor plane arbitration. 175 1.5.2.2 jdolecek */ 176 1.5.2.2 jdolecek if (credit_max && (credit_max < 177 1.5.2.2 jdolecek IXGBE_DCB_MIN_TSO_CREDIT) 178 1.5.2.2 jdolecek && (hw->mac.type == ixgbe_mac_82598EB)) 179 1.5.2.2 jdolecek credit_max = IXGBE_DCB_MIN_TSO_CREDIT; 180 1.5.2.2 jdolecek 181 1.5.2.2 jdolecek dcb_config->tc_config[i].desc_credits_max = 182 1.5.2.2 jdolecek (u16)credit_max; 183 1.5.2.2 jdolecek } 184 1.5.2.2 jdolecek 185 1.5.2.2 jdolecek p->data_credits_max = (u16)credit_max; 186 1.5.2.2 jdolecek } 187 1.5.2.2 jdolecek 188 1.5.2.2 jdolecek out: 189 1.5.2.2 jdolecek return ret_val; 190 1.5.2.2 jdolecek } 191 1.5.2.2 jdolecek 192 1.5.2.2 jdolecek /** 193 1.5.2.2 jdolecek * ixgbe_dcb_unpack_pfc_cee - Unpack dcb_config PFC info 194 1.5.2.2 jdolecek * @cfg: dcb configuration to unpack into hardware consumable fields 195 1.5.2.2 jdolecek * @map: user priority to traffic class map 196 1.5.2.2 jdolecek * @pfc_up: u8 to store user priority PFC bitmask 197 1.5.2.2 jdolecek * 198 1.5.2.2 jdolecek * This unpacks the dcb configuration PFC info which is stored per 199 1.5.2.2 jdolecek * traffic class into a 8bit user priority bitmask that can be 200 1.5.2.2 jdolecek * consumed by hardware routines. The priority to tc map must be 201 1.5.2.2 jdolecek * updated before calling this routine to use current up-to maps. 202 1.5.2.2 jdolecek */ 203 1.5.2.2 jdolecek void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *cfg, u8 *map, u8 *pfc_up) 204 1.5.2.2 jdolecek { 205 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 206 1.5.2.2 jdolecek int up; 207 1.5.2.2 jdolecek 208 1.5.2.2 jdolecek /* 209 1.5.2.2 jdolecek * If the TC for this user priority has PFC enabled then set the 210 1.5.2.2 jdolecek * matching bit in 'pfc_up' to reflect that PFC is enabled. 211 1.5.2.2 jdolecek */ 212 1.5.2.2 jdolecek for (*pfc_up = 0, up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) { 213 1.5.2.2 jdolecek if (tc_config[map[up]].pfc != ixgbe_dcb_pfc_disabled) 214 1.5.2.2 jdolecek *pfc_up |= 1 << up; 215 1.5.2.2 jdolecek } 216 1.5.2.2 jdolecek } 217 1.5.2.2 jdolecek 218 1.5.2.2 jdolecek void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *cfg, int direction, 219 1.5.2.2 jdolecek u16 *refill) 220 1.5.2.2 jdolecek { 221 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 222 1.5.2.2 jdolecek int tc; 223 1.5.2.2 jdolecek 224 1.5.2.2 jdolecek for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) 225 1.5.2.2 jdolecek refill[tc] = tc_config[tc].path[direction].data_credits_refill; 226 1.5.2.2 jdolecek } 227 1.5.2.2 jdolecek 228 1.5.2.2 jdolecek void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *cfg, u16 *max) 229 1.5.2.2 jdolecek { 230 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 231 1.5.2.2 jdolecek int tc; 232 1.5.2.2 jdolecek 233 1.5.2.2 jdolecek for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) 234 1.5.2.2 jdolecek max[tc] = tc_config[tc].desc_credits_max; 235 1.5.2.2 jdolecek } 236 1.5.2.2 jdolecek 237 1.5.2.2 jdolecek void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *cfg, int direction, 238 1.5.2.2 jdolecek u8 *bwgid) 239 1.5.2.2 jdolecek { 240 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 241 1.5.2.2 jdolecek int tc; 242 1.5.2.2 jdolecek 243 1.5.2.2 jdolecek for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) 244 1.5.2.2 jdolecek bwgid[tc] = tc_config[tc].path[direction].bwg_id; 245 1.5.2.2 jdolecek } 246 1.5.2.2 jdolecek 247 1.5.2.2 jdolecek void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *cfg, int direction, 248 1.5.2.2 jdolecek u8 *tsa) 249 1.5.2.2 jdolecek { 250 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 251 1.5.2.2 jdolecek int tc; 252 1.5.2.2 jdolecek 253 1.5.2.2 jdolecek for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) 254 1.5.2.2 jdolecek tsa[tc] = tc_config[tc].path[direction].tsa; 255 1.5.2.2 jdolecek } 256 1.5.2.2 jdolecek 257 1.5.2.2 jdolecek u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up) 258 1.5.2.2 jdolecek { 259 1.5.2.2 jdolecek struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; 260 1.5.2.2 jdolecek u8 prio_mask = 1 << up; 261 1.5.2.2 jdolecek u8 tc = cfg->num_tcs.pg_tcs; 262 1.5.2.2 jdolecek 263 1.5.2.2 jdolecek /* If tc is 0 then DCB is likely not enabled or supported */ 264 1.5.2.2 jdolecek if (!tc) 265 1.5.2.2 jdolecek goto out; 266 1.5.2.2 jdolecek 267 1.5.2.2 jdolecek /* 268 1.5.2.2 jdolecek * Test from maximum TC to 1 and report the first match we find. If 269 1.5.2.2 jdolecek * we find no match we can assume that the TC is 0 since the TC must 270 1.5.2.2 jdolecek * be set for all user priorities 271 1.5.2.2 jdolecek */ 272 1.5.2.2 jdolecek for (tc--; tc; tc--) { 273 1.5.2.2 jdolecek if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap) 274 1.5.2.2 jdolecek break; 275 1.5.2.2 jdolecek } 276 1.5.2.2 jdolecek out: 277 1.5.2.2 jdolecek return tc; 278 1.5.2.2 jdolecek } 279 1.5.2.2 jdolecek 280 1.5.2.2 jdolecek void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *cfg, int direction, 281 1.5.2.2 jdolecek u8 *map) 282 1.5.2.2 jdolecek { 283 1.5.2.2 jdolecek u8 up; 284 1.5.2.2 jdolecek 285 1.5.2.2 jdolecek for (up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) 286 1.5.2.2 jdolecek map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up); 287 1.5.2.2 jdolecek } 288 1.5.2.2 jdolecek 289 1.5.2.2 jdolecek /** 290 1.5.2.2 jdolecek * ixgbe_dcb_config - Struct containing DCB settings. 291 1.5.2.2 jdolecek * @dcb_config: Pointer to DCB config structure 292 1.5.2.2 jdolecek * 293 1.5.2.2 jdolecek * This function checks DCB rules for DCB settings. 294 1.5.2.2 jdolecek * The following rules are checked: 295 1.5.2.2 jdolecek * 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%. 296 1.5.2.2 jdolecek * 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth 297 1.5.2.2 jdolecek * Group must total 100. 298 1.5.2.2 jdolecek * 3. A Traffic Class should not be set to both Link Strict Priority 299 1.5.2.2 jdolecek * and Group Strict Priority. 300 1.5.2.2 jdolecek * 4. Link strict Bandwidth Groups can only have link strict traffic classes 301 1.5.2.2 jdolecek * with zero bandwidth. 302 1.5.2.2 jdolecek */ 303 1.5.2.2 jdolecek s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config) 304 1.5.2.2 jdolecek { 305 1.5.2.2 jdolecek struct ixgbe_dcb_tc_path *p; 306 1.5.2.2 jdolecek s32 ret_val = IXGBE_SUCCESS; 307 1.5.2.2 jdolecek u8 i, j, bw = 0, bw_id; 308 1.5.2.2 jdolecek u8 bw_sum[2][IXGBE_DCB_MAX_BW_GROUP]; 309 1.5.2.2 jdolecek bool link_strict[2][IXGBE_DCB_MAX_BW_GROUP]; 310 1.5.2.2 jdolecek 311 1.5.2.2 jdolecek memset(bw_sum, 0, sizeof(bw_sum)); 312 1.5.2.2 jdolecek memset(link_strict, 0, sizeof(link_strict)); 313 1.5.2.2 jdolecek 314 1.5.2.2 jdolecek /* First Tx, then Rx */ 315 1.5.2.2 jdolecek for (i = 0; i < 2; i++) { 316 1.5.2.2 jdolecek /* Check each traffic class for rule violation */ 317 1.5.2.2 jdolecek for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { 318 1.5.2.2 jdolecek p = &dcb_config->tc_config[j].path[i]; 319 1.5.2.2 jdolecek 320 1.5.2.2 jdolecek bw = p->bwg_percent; 321 1.5.2.2 jdolecek bw_id = p->bwg_id; 322 1.5.2.2 jdolecek 323 1.5.2.2 jdolecek if (bw_id >= IXGBE_DCB_MAX_BW_GROUP) { 324 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 325 1.5.2.2 jdolecek goto err_config; 326 1.5.2.2 jdolecek } 327 1.5.2.2 jdolecek if (p->tsa == ixgbe_dcb_tsa_strict) { 328 1.5.2.2 jdolecek link_strict[i][bw_id] = TRUE; 329 1.5.2.2 jdolecek /* Link strict should have zero bandwidth */ 330 1.5.2.2 jdolecek if (bw) { 331 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 332 1.5.2.2 jdolecek goto err_config; 333 1.5.2.2 jdolecek } 334 1.5.2.2 jdolecek } else if (!bw) { 335 1.5.2.2 jdolecek /* 336 1.5.2.2 jdolecek * Traffic classes without link strict 337 1.5.2.2 jdolecek * should have non-zero bandwidth. 338 1.5.2.2 jdolecek */ 339 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 340 1.5.2.2 jdolecek goto err_config; 341 1.5.2.2 jdolecek } 342 1.5.2.2 jdolecek bw_sum[i][bw_id] += bw; 343 1.5.2.2 jdolecek } 344 1.5.2.2 jdolecek 345 1.5.2.2 jdolecek bw = 0; 346 1.5.2.2 jdolecek 347 1.5.2.2 jdolecek /* Check each bandwidth group for rule violation */ 348 1.5.2.2 jdolecek for (j = 0; j < IXGBE_DCB_MAX_BW_GROUP; j++) { 349 1.5.2.2 jdolecek bw += dcb_config->bw_percentage[i][j]; 350 1.5.2.2 jdolecek /* 351 1.5.2.2 jdolecek * Sum of bandwidth percentages of all traffic classes 352 1.5.2.2 jdolecek * within a Bandwidth Group must total 100 except for 353 1.5.2.2 jdolecek * link strict group (zero bandwidth). 354 1.5.2.2 jdolecek */ 355 1.5.2.2 jdolecek if (link_strict[i][j]) { 356 1.5.2.2 jdolecek if (bw_sum[i][j]) { 357 1.5.2.2 jdolecek /* 358 1.5.2.2 jdolecek * Link strict group should have zero 359 1.5.2.2 jdolecek * bandwidth. 360 1.5.2.2 jdolecek */ 361 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 362 1.5.2.2 jdolecek goto err_config; 363 1.5.2.2 jdolecek } 364 1.5.2.2 jdolecek } else if (bw_sum[i][j] != IXGBE_DCB_BW_PERCENT && 365 1.5.2.2 jdolecek bw_sum[i][j] != 0) { 366 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 367 1.5.2.2 jdolecek goto err_config; 368 1.5.2.2 jdolecek } 369 1.5.2.2 jdolecek } 370 1.5.2.2 jdolecek 371 1.5.2.2 jdolecek if (bw != IXGBE_DCB_BW_PERCENT) { 372 1.5.2.2 jdolecek ret_val = IXGBE_ERR_CONFIG; 373 1.5.2.2 jdolecek goto err_config; 374 1.5.2.2 jdolecek } 375 1.5.2.2 jdolecek } 376 1.5.2.2 jdolecek 377 1.5.2.2 jdolecek err_config: 378 1.5.2.2 jdolecek DEBUGOUT2("DCB error code %d while checking %s settings.\n", 379 1.5.2.2 jdolecek ret_val, (i == IXGBE_DCB_TX_CONFIG) ? "Tx" : "Rx"); 380 1.5.2.2 jdolecek 381 1.5.2.2 jdolecek return ret_val; 382 1.5.2.2 jdolecek } 383 1.5.2.2 jdolecek 384 1.5.2.2 jdolecek /** 385 1.5.2.2 jdolecek * ixgbe_dcb_get_tc_stats - Returns status of each traffic class 386 1.5.2.2 jdolecek * @hw: pointer to hardware structure 387 1.5.2.2 jdolecek * @stats: pointer to statistics structure 388 1.5.2.2 jdolecek * @tc_count: Number of elements in bwg_array. 389 1.5.2.2 jdolecek * 390 1.5.2.2 jdolecek * This function returns the status data for each of the Traffic Classes in use. 391 1.5.2.2 jdolecek */ 392 1.5.2.2 jdolecek s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, 393 1.5.2.2 jdolecek u8 tc_count) 394 1.5.2.2 jdolecek { 395 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 396 1.5.2.2 jdolecek switch (hw->mac.type) { 397 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 398 1.5.2.2 jdolecek ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count); 399 1.5.2.2 jdolecek break; 400 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 401 1.5.2.2 jdolecek case ixgbe_mac_X540: 402 1.5.2.2 jdolecek case ixgbe_mac_X550: 403 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 404 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 405 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 406 1.5.2.2 jdolecek ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count); 407 1.5.2.2 jdolecek break; 408 1.5.2.2 jdolecek #endif 409 1.5.2.2 jdolecek default: 410 1.5.2.2 jdolecek break; 411 1.5.2.2 jdolecek } 412 1.5.2.2 jdolecek return ret; 413 1.5.2.2 jdolecek } 414 1.5.2.2 jdolecek 415 1.5.2.2 jdolecek /** 416 1.5.2.2 jdolecek * ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class 417 1.5.2.2 jdolecek * @hw: pointer to hardware structure 418 1.5.2.2 jdolecek * @stats: pointer to statistics structure 419 1.5.2.2 jdolecek * @tc_count: Number of elements in bwg_array. 420 1.5.2.2 jdolecek * 421 1.5.2.2 jdolecek * This function returns the CBFC status data for each of the Traffic Classes. 422 1.5.2.2 jdolecek */ 423 1.5.2.2 jdolecek s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, 424 1.5.2.2 jdolecek u8 tc_count) 425 1.5.2.2 jdolecek { 426 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 427 1.5.2.2 jdolecek switch (hw->mac.type) { 428 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 429 1.5.2.2 jdolecek ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count); 430 1.5.2.2 jdolecek break; 431 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 432 1.5.2.2 jdolecek case ixgbe_mac_X540: 433 1.5.2.2 jdolecek case ixgbe_mac_X550: 434 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 435 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 436 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 437 1.5.2.2 jdolecek ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count); 438 1.5.2.2 jdolecek break; 439 1.5.2.2 jdolecek #endif 440 1.5.2.2 jdolecek default: 441 1.5.2.2 jdolecek break; 442 1.5.2.2 jdolecek } 443 1.5.2.2 jdolecek return ret; 444 1.5.2.2 jdolecek } 445 1.5.2.2 jdolecek 446 1.5.2.2 jdolecek /** 447 1.5.2.2 jdolecek * ixgbe_dcb_config_rx_arbiter_cee - Config Rx arbiter 448 1.5.2.2 jdolecek * @hw: pointer to hardware structure 449 1.5.2.2 jdolecek * @dcb_config: pointer to ixgbe_dcb_config structure 450 1.5.2.2 jdolecek * 451 1.5.2.2 jdolecek * Configure Rx Data Arbiter and credits for each traffic class. 452 1.5.2.2 jdolecek */ 453 1.5.2.2 jdolecek s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw, 454 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config) 455 1.5.2.2 jdolecek { 456 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 457 1.5.2.2 jdolecek u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; 458 1.5.2.2 jdolecek u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; 459 1.5.2.2 jdolecek u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; 460 1.5.2.2 jdolecek u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; 461 1.5.2.2 jdolecek u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; 462 1.5.2.2 jdolecek 463 1.5.2.2 jdolecek ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); 464 1.5.2.2 jdolecek ixgbe_dcb_unpack_max_cee(dcb_config, max); 465 1.5.2.2 jdolecek ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); 466 1.5.2.2 jdolecek ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); 467 1.5.2.2 jdolecek ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); 468 1.5.2.2 jdolecek 469 1.5.2.2 jdolecek switch (hw->mac.type) { 470 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 471 1.5.2.2 jdolecek ret = ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); 472 1.5.2.2 jdolecek break; 473 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 474 1.5.2.2 jdolecek case ixgbe_mac_X540: 475 1.5.2.2 jdolecek case ixgbe_mac_X550: 476 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 477 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 478 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 479 1.5.2.2 jdolecek ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid, 480 1.5.2.2 jdolecek tsa, map); 481 1.5.2.2 jdolecek break; 482 1.5.2.2 jdolecek #endif 483 1.5.2.2 jdolecek default: 484 1.5.2.2 jdolecek break; 485 1.5.2.2 jdolecek } 486 1.5.2.2 jdolecek return ret; 487 1.5.2.2 jdolecek } 488 1.5.2.2 jdolecek 489 1.5.2.2 jdolecek /** 490 1.5.2.2 jdolecek * ixgbe_dcb_config_tx_desc_arbiter_cee - Config Tx Desc arbiter 491 1.5.2.2 jdolecek * @hw: pointer to hardware structure 492 1.5.2.2 jdolecek * @dcb_config: pointer to ixgbe_dcb_config structure 493 1.5.2.2 jdolecek * 494 1.5.2.2 jdolecek * Configure Tx Descriptor Arbiter and credits for each traffic class. 495 1.5.2.2 jdolecek */ 496 1.5.2.2 jdolecek s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw, 497 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config) 498 1.5.2.2 jdolecek { 499 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 500 1.5.2.2 jdolecek u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 501 1.5.2.2 jdolecek u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 502 1.5.2.2 jdolecek u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 503 1.5.2.2 jdolecek u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 504 1.5.2.2 jdolecek 505 1.5.2.2 jdolecek ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); 506 1.5.2.2 jdolecek ixgbe_dcb_unpack_max_cee(dcb_config, max); 507 1.5.2.2 jdolecek ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); 508 1.5.2.2 jdolecek ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); 509 1.5.2.2 jdolecek 510 1.5.2.2 jdolecek switch (hw->mac.type) { 511 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 512 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, 513 1.5.2.2 jdolecek bwgid, tsa); 514 1.5.2.2 jdolecek break; 515 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 516 1.5.2.2 jdolecek case ixgbe_mac_X540: 517 1.5.2.2 jdolecek case ixgbe_mac_X550: 518 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 519 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 520 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 521 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, 522 1.5.2.2 jdolecek bwgid, tsa); 523 1.5.2.2 jdolecek break; 524 1.5.2.2 jdolecek #endif 525 1.5.2.2 jdolecek default: 526 1.5.2.2 jdolecek break; 527 1.5.2.2 jdolecek } 528 1.5.2.2 jdolecek return ret; 529 1.5.2.2 jdolecek } 530 1.5.2.2 jdolecek 531 1.5.2.2 jdolecek /** 532 1.5.2.2 jdolecek * ixgbe_dcb_config_tx_data_arbiter_cee - Config Tx data arbiter 533 1.5.2.2 jdolecek * @hw: pointer to hardware structure 534 1.5.2.2 jdolecek * @dcb_config: pointer to ixgbe_dcb_config structure 535 1.5.2.2 jdolecek * 536 1.5.2.2 jdolecek * Configure Tx Data Arbiter and credits for each traffic class. 537 1.5.2.2 jdolecek */ 538 1.5.2.2 jdolecek s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw, 539 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config) 540 1.5.2.2 jdolecek { 541 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 542 1.5.2.2 jdolecek u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 543 1.5.2.2 jdolecek u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 544 1.5.2.2 jdolecek u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; 545 1.5.2.2 jdolecek u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 546 1.5.2.2 jdolecek u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 547 1.5.2.2 jdolecek 548 1.5.2.2 jdolecek ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); 549 1.5.2.2 jdolecek ixgbe_dcb_unpack_max_cee(dcb_config, max); 550 1.5.2.2 jdolecek ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); 551 1.5.2.2 jdolecek ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); 552 1.5.2.2 jdolecek ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); 553 1.5.2.2 jdolecek 554 1.5.2.2 jdolecek switch (hw->mac.type) { 555 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 556 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, 557 1.5.2.2 jdolecek bwgid, tsa); 558 1.5.2.2 jdolecek break; 559 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 560 1.5.2.2 jdolecek case ixgbe_mac_X540: 561 1.5.2.2 jdolecek case ixgbe_mac_X550: 562 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 563 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 564 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 565 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, 566 1.5.2.2 jdolecek bwgid, tsa, 567 1.5.2.2 jdolecek map); 568 1.5.2.2 jdolecek break; 569 1.5.2.2 jdolecek #endif 570 1.5.2.2 jdolecek default: 571 1.5.2.2 jdolecek break; 572 1.5.2.2 jdolecek } 573 1.5.2.2 jdolecek return ret; 574 1.5.2.2 jdolecek } 575 1.5.2.2 jdolecek 576 1.5.2.2 jdolecek /** 577 1.5.2.2 jdolecek * ixgbe_dcb_config_pfc_cee - Config priority flow control 578 1.5.2.2 jdolecek * @hw: pointer to hardware structure 579 1.5.2.2 jdolecek * @dcb_config: pointer to ixgbe_dcb_config structure 580 1.5.2.2 jdolecek * 581 1.5.2.2 jdolecek * Configure Priority Flow Control for each traffic class. 582 1.5.2.2 jdolecek */ 583 1.5.2.2 jdolecek s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw, 584 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config) 585 1.5.2.2 jdolecek { 586 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 587 1.5.2.2 jdolecek u8 pfc_en; 588 1.5.2.2 jdolecek u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; 589 1.5.2.2 jdolecek 590 1.5.2.2 jdolecek ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); 591 1.5.2.2 jdolecek ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en); 592 1.5.2.2 jdolecek 593 1.5.2.2 jdolecek switch (hw->mac.type) { 594 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 595 1.5.2.2 jdolecek ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en); 596 1.5.2.2 jdolecek break; 597 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 598 1.5.2.2 jdolecek case ixgbe_mac_X540: 599 1.5.2.2 jdolecek case ixgbe_mac_X550: 600 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 601 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 602 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 603 1.5.2.2 jdolecek ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map); 604 1.5.2.2 jdolecek break; 605 1.5.2.2 jdolecek #endif 606 1.5.2.2 jdolecek default: 607 1.5.2.2 jdolecek break; 608 1.5.2.2 jdolecek } 609 1.5.2.2 jdolecek return ret; 610 1.5.2.2 jdolecek } 611 1.5.2.2 jdolecek 612 1.5.2.2 jdolecek /** 613 1.5.2.2 jdolecek * ixgbe_dcb_config_tc_stats - Config traffic class statistics 614 1.5.2.2 jdolecek * @hw: pointer to hardware structure 615 1.5.2.2 jdolecek * 616 1.5.2.2 jdolecek * Configure queue statistics registers, all queues belonging to same traffic 617 1.5.2.2 jdolecek * class uses a single set of queue statistics counters. 618 1.5.2.2 jdolecek */ 619 1.5.2.2 jdolecek s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw) 620 1.5.2.2 jdolecek { 621 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 622 1.5.2.2 jdolecek switch (hw->mac.type) { 623 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 624 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tc_stats_82598(hw); 625 1.5.2.2 jdolecek break; 626 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 627 1.5.2.2 jdolecek case ixgbe_mac_X540: 628 1.5.2.2 jdolecek case ixgbe_mac_X550: 629 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 630 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 631 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 632 1.5.2.2 jdolecek ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL); 633 1.5.2.2 jdolecek break; 634 1.5.2.2 jdolecek #endif 635 1.5.2.2 jdolecek default: 636 1.5.2.2 jdolecek break; 637 1.5.2.2 jdolecek } 638 1.5.2.2 jdolecek return ret; 639 1.5.2.2 jdolecek } 640 1.5.2.2 jdolecek 641 1.5.2.2 jdolecek /** 642 1.5.2.2 jdolecek * ixgbe_dcb_hw_config_cee - Config and enable DCB 643 1.5.2.2 jdolecek * @hw: pointer to hardware structure 644 1.5.2.2 jdolecek * @dcb_config: pointer to ixgbe_dcb_config structure 645 1.5.2.2 jdolecek * 646 1.5.2.2 jdolecek * Configure dcb settings and enable dcb mode. 647 1.5.2.2 jdolecek */ 648 1.5.2.2 jdolecek s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw, 649 1.5.2.2 jdolecek struct ixgbe_dcb_config *dcb_config) 650 1.5.2.2 jdolecek { 651 1.5.2.2 jdolecek s32 ret = IXGBE_NOT_IMPLEMENTED; 652 1.5.2.2 jdolecek u8 pfc_en; 653 1.5.2.2 jdolecek u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 654 1.5.2.2 jdolecek u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 655 1.5.2.2 jdolecek u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; 656 1.5.2.2 jdolecek u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 657 1.5.2.2 jdolecek u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 658 1.5.2.2 jdolecek 659 1.5.2.2 jdolecek /* Unpack CEE standard containers */ 660 1.5.2.2 jdolecek ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); 661 1.5.2.2 jdolecek ixgbe_dcb_unpack_max_cee(dcb_config, max); 662 1.5.2.2 jdolecek ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); 663 1.5.2.2 jdolecek ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); 664 1.5.2.2 jdolecek ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); 665 1.5.2.2 jdolecek 666 1.5.2.2 jdolecek hw->mac.ops.setup_rxpba(hw, dcb_config->num_tcs.pg_tcs, 667 1.5.2.2 jdolecek 0, dcb_config->rx_pba_cfg); 668 1.5.2.2 jdolecek 669 1.5.2.2 jdolecek switch (hw->mac.type) { 670 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 671 1.5.2.2 jdolecek ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed, 672 1.5.2.2 jdolecek refill, max, bwgid, tsa); 673 1.5.2.2 jdolecek break; 674 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 675 1.5.2.2 jdolecek case ixgbe_mac_X540: 676 1.5.2.2 jdolecek case ixgbe_mac_X550: 677 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 678 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 679 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 680 1.5.2.2 jdolecek ixgbe_dcb_config_82599(hw, dcb_config); 681 1.5.2.2 jdolecek ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed, 682 1.5.2.2 jdolecek refill, max, bwgid, 683 1.5.2.2 jdolecek tsa, map); 684 1.5.2.2 jdolecek 685 1.5.2.2 jdolecek ixgbe_dcb_config_tc_stats_82599(hw, dcb_config); 686 1.5.2.2 jdolecek break; 687 1.5.2.2 jdolecek #endif 688 1.5.2.2 jdolecek default: 689 1.5.2.2 jdolecek break; 690 1.5.2.2 jdolecek } 691 1.5.2.2 jdolecek 692 1.5.2.2 jdolecek if (!ret && dcb_config->pfc_mode_enable) { 693 1.5.2.2 jdolecek ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en); 694 1.5.2.2 jdolecek ret = ixgbe_dcb_config_pfc(hw, pfc_en, map); 695 1.5.2.2 jdolecek } 696 1.5.2.2 jdolecek 697 1.5.2.2 jdolecek return ret; 698 1.5.2.2 jdolecek } 699 1.5.2.2 jdolecek 700 1.5.2.2 jdolecek /* Helper routines to abstract HW specifics from DCB netlink ops */ 701 1.5.2.2 jdolecek s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map) 702 1.5.2.2 jdolecek { 703 1.5.2.2 jdolecek int ret = IXGBE_ERR_PARAM; 704 1.5.2.2 jdolecek 705 1.5.2.2 jdolecek switch (hw->mac.type) { 706 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 707 1.5.2.2 jdolecek ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en); 708 1.5.2.2 jdolecek break; 709 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 710 1.5.2.2 jdolecek case ixgbe_mac_X540: 711 1.5.2.2 jdolecek case ixgbe_mac_X550: 712 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 713 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 714 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 715 1.5.2.2 jdolecek ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map); 716 1.5.2.2 jdolecek break; 717 1.5.2.2 jdolecek #endif 718 1.5.2.2 jdolecek default: 719 1.5.2.2 jdolecek break; 720 1.5.2.2 jdolecek } 721 1.5.2.2 jdolecek return ret; 722 1.5.2.2 jdolecek } 723 1.5.2.2 jdolecek 724 1.5.2.2 jdolecek s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max, 725 1.5.2.2 jdolecek u8 *bwg_id, u8 *tsa, u8 *map) 726 1.5.2.2 jdolecek { 727 1.5.2.2 jdolecek switch (hw->mac.type) { 728 1.5.2.2 jdolecek case ixgbe_mac_82598EB: 729 1.5.2.2 jdolecek ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); 730 1.5.2.2 jdolecek ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id, 731 1.5.2.2 jdolecek tsa); 732 1.5.2.2 jdolecek ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id, 733 1.5.2.2 jdolecek tsa); 734 1.5.2.2 jdolecek break; 735 1.5.2.2 jdolecek case ixgbe_mac_82599EB: 736 1.5.2.2 jdolecek case ixgbe_mac_X540: 737 1.5.2.2 jdolecek case ixgbe_mac_X550: 738 1.5.2.2 jdolecek case ixgbe_mac_X550EM_x: 739 1.5.2.2 jdolecek case ixgbe_mac_X550EM_a: 740 1.5.2.2 jdolecek #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) 741 1.5.2.2 jdolecek ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id, 742 1.5.2.2 jdolecek tsa, map); 743 1.5.2.2 jdolecek ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id, 744 1.5.2.2 jdolecek tsa); 745 1.5.2.2 jdolecek ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id, 746 1.5.2.2 jdolecek tsa, map); 747 1.5.2.2 jdolecek break; 748 1.5.2.2 jdolecek #endif 749 1.5.2.2 jdolecek default: 750 1.5.2.2 jdolecek break; 751 1.5.2.2 jdolecek } 752 1.5.2.2 jdolecek return 0; 753 1.5.2.2 jdolecek } 754
Indexes created Sun Oct 26 20:09:54 GMT 2025