ixgbe_osdep.c revision 1.1.2.2
1 1.1.2.2 skrll /****************************************************************************** 2 1.1.2.2 skrll 3 1.1.2.2 skrll Copyright (c) 2001-2015, Intel Corporation 4 1.1.2.2 skrll All rights reserved. 5 1.1.2.2 skrll 6 1.1.2.2 skrll Redistribution and use in source and binary forms, with or without 7 1.1.2.2 skrll modification, are permitted provided that the following conditions are met: 8 1.1.2.2 skrll 9 1.1.2.2 skrll 1. Redistributions of source code must retain the above copyright notice, 10 1.1.2.2 skrll this list of conditions and the following disclaimer. 11 1.1.2.2 skrll 12 1.1.2.2 skrll 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 skrll notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 skrll documentation and/or other materials provided with the distribution. 15 1.1.2.2 skrll 16 1.1.2.2 skrll 3. Neither the name of the Intel Corporation nor the names of its 17 1.1.2.2 skrll contributors may be used to endorse or promote products derived from 18 1.1.2.2 skrll this software without specific prior written permission. 19 1.1.2.2 skrll 20 1.1.2.2 skrll THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 1.1.2.2 skrll AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 1.1.2.2 skrll IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 1.1.2.2 skrll ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 1.1.2.2 skrll LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 1.1.2.2 skrll CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 1.1.2.2 skrll SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 1.1.2.2 skrll INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 1.1.2.2 skrll CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 1.1.2.2 skrll ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 1.1.2.2 skrll POSSIBILITY OF SUCH DAMAGE. 31 1.1.2.2 skrll 32 1.1.2.2 skrll ******************************************************************************/ 33 1.1.2.2 skrll /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.c 292674 2015-12-23 22:45:17Z sbruno $*/ 34 1.1.2.2 skrll 35 1.1.2.2 skrll #include "ixgbe_osdep.h" 36 1.1.2.2 skrll #include "ixgbe.h" 37 1.1.2.2 skrll 38 1.1.2.2 skrll inline device_t 39 1.1.2.2 skrll ixgbe_dev_from_hw(struct ixgbe_hw *hw) 40 1.1.2.2 skrll { 41 1.1.2.2 skrll return ((struct adapter *)hw->back)->dev; 42 1.1.2.2 skrll } 43 1.1.2.2 skrll 44 1.1.2.2 skrll u16 45 1.1.2.2 skrll ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg) 46 1.1.2.2 skrll { 47 1.1.2.2 skrll pci_chipset_tag_t pc = hw->back->osdep.pc; 48 1.1.2.2 skrll pcitag_t tag = hw->back->osdep.tag; 49 1.1.2.2 skrll 50 1.1.2.2 skrll switch (reg % 4) { 51 1.1.2.2 skrll case 0: 52 1.1.2.2 skrll return pci_conf_read(pc, tag, reg) & __BITS(15, 0); 53 1.1.2.2 skrll case 2: 54 1.1.2.2 skrll return __SHIFTOUT(pci_conf_read(pc, tag, reg - 2), 55 1.1.2.2 skrll __BITS(31, 16)); 56 1.1.2.2 skrll default: 57 1.1.2.2 skrll panic("%s: invalid register (%" PRIx32, __func__, reg); 58 1.1.2.2 skrll break; 59 1.1.2.2 skrll } 60 1.1.2.2 skrll } 61 1.1.2.2 skrll 62 1.1.2.2 skrll void 63 1.1.2.2 skrll ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value) 64 1.1.2.2 skrll { 65 1.1.2.2 skrll pci_chipset_tag_t pc = hw->back->osdep.pc; 66 1.1.2.2 skrll pcitag_t tag = hw->back->osdep.tag; 67 1.1.2.2 skrll pcireg_t old; 68 1.1.2.2 skrll 69 1.1.2.2 skrll switch (reg % 4) { 70 1.1.2.2 skrll case 0: 71 1.1.2.2 skrll old = pci_conf_read(pc, tag, reg) & __BITS(31, 16); 72 1.1.2.2 skrll pci_conf_write(pc, tag, reg, value | old); 73 1.1.2.2 skrll break; 74 1.1.2.2 skrll case 2: 75 1.1.2.2 skrll old = pci_conf_read(pc, tag, reg - 2) & __BITS(15, 0); 76 1.1.2.2 skrll pci_conf_write(pc, tag, reg - 2, 77 1.1.2.2 skrll __SHIFTIN(value, __BITS(31, 16)) | old); 78 1.1.2.2 skrll break; 79 1.1.2.2 skrll default: 80 1.1.2.2 skrll panic("%s: invalid register (%" PRIx32, __func__, reg); 81 1.1.2.2 skrll break; 82 1.1.2.2 skrll } 83 1.1.2.2 skrll 84 1.1.2.2 skrll return; 85 1.1.2.2 skrll } 86 1.1.2.2 skrll 87 1.1.2.2 skrll inline u32 88 1.1.2.2 skrll ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 89 1.1.2.2 skrll { 90 1.1.2.2 skrll return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag, 91 1.1.2.2 skrll ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, 92 1.1.2.2 skrll reg); 93 1.1.2.2 skrll } 94 1.1.2.2 skrll 95 1.1.2.2 skrll inline void 96 1.1.2.2 skrll ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val) 97 1.1.2.2 skrll { 98 1.1.2.2 skrll bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag, 99 1.1.2.2 skrll ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, 100 1.1.2.2 skrll reg, val); 101 1.1.2.2 skrll } 102 1.1.2.2 skrll 103 1.1.2.2 skrll inline u32 104 1.1.2.2 skrll ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset) 105 1.1.2.2 skrll { 106 1.1.2.2 skrll return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag, 107 1.1.2.2 skrll ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, 108 1.1.2.2 skrll reg + (offset << 2)); 109 1.1.2.2 skrll } 110 1.1.2.2 skrll 111 1.1.2.2 skrll inline void 112 1.1.2.2 skrll ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) 113 1.1.2.2 skrll { 114 1.1.2.2 skrll bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag, 115 1.1.2.2 skrll ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, 116 1.1.2.2 skrll reg + (offset << 2), val); 117 1.1.2.2 skrll } 118
Indexes created Wed Oct 22 13:09:56 GMT 2025