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ixgbe_osdep.c revision 1.1 
      1 /******************************************************************************
      2 
      3   Copyright (c) 2001-2015, Intel Corporation
      4   All rights reserved.
      5 
      6   Redistribution and use in source and binary forms, with or without
      7   modification, are permitted provided that the following conditions are met:
      8 
      9    1. Redistributions of source code must retain the above copyright notice,
     10       this list of conditions and the following disclaimer.
     11 
     12    2. Redistributions in binary form must reproduce the above copyright
     13       notice, this list of conditions and the following disclaimer in the
     14       documentation and/or other materials provided with the distribution.
     15 
     16    3. Neither the name of the Intel Corporation nor the names of its
     17       contributors may be used to endorse or promote products derived from
     18       this software without specific prior written permission.
     19 
     20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30   POSSIBILITY OF SUCH DAMAGE.
     31 
     32 ******************************************************************************/
     33 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.c 292674 2015-12-23 22:45:17Z sbruno $*/
     34 
     35 #include "ixgbe_osdep.h"
     36 #include "ixgbe.h"
     37 
     38 inline device_t
     39 ixgbe_dev_from_hw(struct ixgbe_hw *hw)
     40 {
     41 	return ((struct adapter *)hw->back)->dev;
     42 }
     43 
     44 u16
     45 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
     46 {
     47 	pci_chipset_tag_t  pc = hw->back->osdep.pc;
     48 	pcitag_t           tag = hw->back->osdep.tag;
     49 
     50 	switch (reg % 4) {
     51 	case 0:
     52 		return pci_conf_read(pc, tag, reg) & __BITS(15, 0);
     53 	case 2:
     54 		return __SHIFTOUT(pci_conf_read(pc, tag, reg - 2),
     55 		    __BITS(31, 16));
     56 	default:
     57 		panic("%s: invalid register (%" PRIx32, __func__, reg);
     58 		break;
     59 	}
     60 }
     61 
     62 void
     63 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
     64 {
     65 	pci_chipset_tag_t  pc = hw->back->osdep.pc;
     66 	pcitag_t           tag = hw->back->osdep.tag;
     67 	pcireg_t old;
     68 
     69 	switch (reg % 4) {
     70 	case 0:
     71 		old = pci_conf_read(pc, tag, reg) & __BITS(31, 16);
     72 		pci_conf_write(pc, tag, reg, value | old);
     73 		break;
     74 	case 2:
     75 		old = pci_conf_read(pc, tag, reg - 2) & __BITS(15, 0);
     76 		pci_conf_write(pc, tag, reg - 2,
     77 		    __SHIFTIN(value, __BITS(31, 16)) | old);
     78 		break;
     79 	default:
     80 		panic("%s: invalid register (%" PRIx32, __func__, reg);
     81 		break;
     82 	}
     83 
     84 	return;
     85 }
     86 
     87 inline u32
     88 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
     89 {
     90 	return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
     91 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
     92 	    reg);
     93 }
     94 
     95 inline void
     96 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
     97 {
     98 	bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
     99 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    100 	    reg, val);
    101 }
    102 
    103 inline u32
    104 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
    105 {
    106 	return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
    107 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    108 	    reg + (offset << 2));
    109 }
    110 
    111 inline void
    112 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
    113 {
    114 	bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
    115 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    116 	    reg + (offset << 2), val);
    117 }
    118